STM MATLAB Simulator
Loading...
Searching...
No Matches
Macros
Exported_macros
CMSIS_Device » Stm32f407xx » Peripheral_memory_map
+ Collaboration diagram for Exported_macros:

Macros

#define IS_ADC_ALL_INSTANCE(INSTANCE)
 
#define IS_ADC_MULTIMODE_MASTER_INSTANCE(INSTANCE)   ((INSTANCE) == ADC1)
 
#define IS_ADC_COMMON_INSTANCE(INSTANCE)   ((INSTANCE) == ADC123_COMMON)
 
#define IS_CAN_ALL_INSTANCE(INSTANCE)
 
#define IS_CRC_ALL_INSTANCE(INSTANCE)   ((INSTANCE) == CRC)
 
#define IS_DAC_ALL_INSTANCE(INSTANCE)   ((INSTANCE) == DAC1)
 
#define IS_DCMI_ALL_INSTANCE(INSTANCE)   ((INSTANCE) == DCMI)
 
#define IS_DMA_STREAM_ALL_INSTANCE(INSTANCE)
 
#define IS_GPIO_ALL_INSTANCE(INSTANCE)
 
#define IS_I2C_ALL_INSTANCE(INSTANCE)
 
#define IS_SMBUS_ALL_INSTANCE   IS_I2C_ALL_INSTANCE
 
#define IS_I2S_ALL_INSTANCE(INSTANCE)
 
#define IS_I2S_EXT_ALL_INSTANCE(INSTANCE)
 
#define IS_I2S_ALL_INSTANCE_EXT   IS_I2S_EXT_ALL_INSTANCE
 
#define IS_RNG_ALL_INSTANCE(INSTANCE)   ((INSTANCE) == RNG)
 
#define IS_RTC_ALL_INSTANCE(INSTANCE)   ((INSTANCE) == RTC)
 
#define IS_SPI_ALL_INSTANCE(INSTANCE)
 
#define IS_TIM_INSTANCE(INSTANCE)
 
#define IS_TIM_CC1_INSTANCE(INSTANCE)
 
#define IS_TIM_CC2_INSTANCE(INSTANCE)
 
#define IS_TIM_CC3_INSTANCE(INSTANCE)
 
#define IS_TIM_CC4_INSTANCE(INSTANCE)
 
#define IS_TIM_ADVANCED_INSTANCE(INSTANCE)
 
#define IS_TIM_XOR_INSTANCE(INSTANCE)
 
#define IS_TIM_DMA_INSTANCE(INSTANCE)
 
#define IS_TIM_DMA_CC_INSTANCE(INSTANCE)
 
#define IS_TIM_CCDMA_INSTANCE(INSTANCE)
 
#define IS_TIM_DMABURST_INSTANCE(INSTANCE)
 
#define IS_TIM_MASTER_INSTANCE(INSTANCE)
 
#define IS_TIM_SLAVE_INSTANCE(INSTANCE)
 
#define IS_TIM_32B_COUNTER_INSTANCE(INSTANCE)
 
#define IS_TIM_ETR_INSTANCE(INSTANCE)
 
#define IS_TIM_REMAP_INSTANCE(INSTANCE)
 
#define IS_TIM_CCX_INSTANCE(INSTANCE, CHANNEL)
 
#define IS_TIM_CCXN_INSTANCE(INSTANCE, CHANNEL)
 
#define IS_TIM_COUNTER_MODE_SELECT_INSTANCE(INSTANCE)
 
#define IS_TIM_CLOCK_DIVISION_INSTANCE(INSTANCE)
 
#define IS_TIM_COMMUTATION_EVENT_INSTANCE(INSTANCE)
 
#define IS_TIM_OCXREF_CLEAR_INSTANCE(INSTANCE)
 
#define IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE(INSTANCE)
 
#define IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(INSTANCE)
 
#define IS_TIM_CLOCKSOURCE_TIX_INSTANCE(INSTANCE)
 
#define IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(INSTANCE)
 
#define IS_TIM_REPETITION_COUNTER_INSTANCE(INSTANCE)
 
#define IS_TIM_ENCODER_INTERFACE_INSTANCE(INSTANCE)
 
#define IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(INSTANCE)
 
#define IS_TIM_BREAK_INSTANCE(INSTANCE)
 
#define IS_USART_INSTANCE(INSTANCE)
 
#define IS_UART_HALFDUPLEX_INSTANCE(INSTANCE)
 
#define IS_UART_INSTANCE   IS_UART_HALFDUPLEX_INSTANCE
 
#define IS_UART_HWFLOW_INSTANCE(INSTANCE)
 
#define IS_UART_LIN_INSTANCE   IS_UART_HALFDUPLEX_INSTANCE
 
#define IS_SMARTCARD_INSTANCE(INSTANCE)
 
#define IS_IRDA_INSTANCE(INSTANCE)
 
#define IS_PCD_ALL_INSTANCE(INSTANCE)
 
#define IS_HCD_ALL_INSTANCE(INSTANCE)
 
#define IS_SDIO_ALL_INSTANCE(INSTANCE)   ((INSTANCE) == SDIO)
 
#define IS_IWDG_ALL_INSTANCE(INSTANCE)   ((INSTANCE) == IWDG)
 
#define IS_WWDG_ALL_INSTANCE(INSTANCE)   ((INSTANCE) == WWDG)
 
#define USB_OTG_FS_HOST_MAX_CHANNEL_NBR   8U
 
#define USB_OTG_FS_MAX_IN_ENDPOINTS   4U /* Including EP0 */
 
#define USB_OTG_FS_MAX_OUT_ENDPOINTS   4U /* Including EP0 */
 
#define USB_OTG_FS_TOTAL_FIFO_SIZE   1280U /* in Bytes */
 
#define RCC_PLLCFGR_RST_VALUE   0x24003010U
 
#define RCC_PLLI2SCFGR_RST_VALUE   0x20003000U
 
#define RCC_MAX_FREQUENCY   168000000U
 
#define RCC_MAX_FREQUENCY_SCALE1   RCC_MAX_FREQUENCY
 
#define RCC_MAX_FREQUENCY_SCALE2   144000000U
 
#define RCC_PLLVCO_OUTPUT_MIN   100000000U
 
#define RCC_PLLVCO_INPUT_MIN   950000U
 
#define RCC_PLLVCO_INPUT_MAX   2100000U
 
#define RCC_PLLVCO_OUTPUT_MAX   432000000U
 
#define RCC_PLLN_MIN_VALUE   50U
 
#define RCC_PLLN_MAX_VALUE   432U
 
#define FLASH_SCALE1_LATENCY1_FREQ   30000000U
 
#define FLASH_SCALE1_LATENCY2_FREQ   60000000U
 
#define FLASH_SCALE1_LATENCY3_FREQ   90000000U
 
#define FLASH_SCALE1_LATENCY4_FREQ   120000000U
 
#define FLASH_SCALE1_LATENCY5_FREQ   150000000U
 
#define FLASH_SCALE2_LATENCY1_FREQ   30000000U
 
#define FLASH_SCALE2_LATENCY2_FREQ   60000000U
 
#define FLASH_SCALE2_LATENCY3_FREQ   90000000U
 
#define FLASH_SCALE2_LATENCY4_FREQ   12000000U
 
#define USB_OTG_HS_HOST_MAX_CHANNEL_NBR   12U
 
#define USB_OTG_HS_MAX_IN_ENDPOINTS   6U /* Including EP0 */
 
#define USB_OTG_HS_MAX_OUT_ENDPOINTS   6U /* Including EP0 */
 
#define USB_OTG_HS_TOTAL_FIFO_SIZE   4096U /* in Bytes */
 
#define FMC_IRQn   FSMC_IRQn
 
#define FMC_IRQHandler   FSMC_IRQHandler
 

Detailed Description

Macro Definition Documentation

◆ IS_ADC_ALL_INSTANCE

#define IS_ADC_ALL_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == ADC1) || \
((INSTANCE) == ADC2) || \
((INSTANCE) == ADC3))
ADC1
#define ADC1
Definition stm32f407xx_matlab.h:1161
ADC2
#define ADC2
Definition stm32f407xx_matlab.h:1162
ADC3
#define ADC3
Definition stm32f407xx_matlab.h:1163

◆ IS_ADC_MULTIMODE_MASTER_INSTANCE

#define IS_ADC_MULTIMODE_MASTER_INSTANCE ( INSTANCE)    ((INSTANCE) == ADC1)

◆ IS_ADC_COMMON_INSTANCE

#define IS_ADC_COMMON_INSTANCE ( INSTANCE)    ((INSTANCE) == ADC123_COMMON)

◆ IS_CAN_ALL_INSTANCE

#define IS_CAN_ALL_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == CAN1) || \
((INSTANCE) == CAN2))
CAN1
#define CAN1
Definition stm32f407xx_matlab.h:1152
CAN2
#define CAN2
Definition stm32f407xx_matlab.h:1153

◆ IS_CRC_ALL_INSTANCE

#define IS_CRC_ALL_INSTANCE ( INSTANCE)    ((INSTANCE) == CRC)

◆ IS_DAC_ALL_INSTANCE

#define IS_DAC_ALL_INSTANCE ( INSTANCE)    ((INSTANCE) == DAC1)

◆ IS_DCMI_ALL_INSTANCE

#define IS_DCMI_ALL_INSTANCE ( INSTANCE)    ((INSTANCE) == DCMI)

◆ IS_DMA_STREAM_ALL_INSTANCE

#define IS_DMA_STREAM_ALL_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == DMA1_Stream0) || \
((INSTANCE) == DMA1_Stream1) || \
((INSTANCE) == DMA1_Stream2) || \
((INSTANCE) == DMA1_Stream3) || \
((INSTANCE) == DMA1_Stream4) || \
((INSTANCE) == DMA1_Stream5) || \
((INSTANCE) == DMA1_Stream6) || \
((INSTANCE) == DMA1_Stream7) || \
((INSTANCE) == DMA2_Stream0) || \
((INSTANCE) == DMA2_Stream1) || \
((INSTANCE) == DMA2_Stream2) || \
((INSTANCE) == DMA2_Stream3) || \
((INSTANCE) == DMA2_Stream4) || \
((INSTANCE) == DMA2_Stream5) || \
((INSTANCE) == DMA2_Stream6) || \
((INSTANCE) == DMA2_Stream7))
DMA2_Stream6
#define DMA2_Stream6
Definition stm32f407xx_matlab.h:1202
DMA2_Stream0
#define DMA2_Stream0
Definition stm32f407xx_matlab.h:1196
DMA1_Stream0
#define DMA1_Stream0
Definition stm32f407xx_matlab.h:1187
DMA2_Stream2
#define DMA2_Stream2
Definition stm32f407xx_matlab.h:1198
DMA1_Stream4
#define DMA1_Stream4
Definition stm32f407xx_matlab.h:1191
DMA1_Stream7
#define DMA1_Stream7
Definition stm32f407xx_matlab.h:1194
DMA1_Stream3
#define DMA1_Stream3
Definition stm32f407xx_matlab.h:1190
DMA2_Stream3
#define DMA2_Stream3
Definition stm32f407xx_matlab.h:1199
DMA1_Stream5
#define DMA1_Stream5
Definition stm32f407xx_matlab.h:1192
DMA2_Stream5
#define DMA2_Stream5
Definition stm32f407xx_matlab.h:1201
DMA1_Stream6
#define DMA1_Stream6
Definition stm32f407xx_matlab.h:1193
DMA2_Stream7
#define DMA2_Stream7
Definition stm32f407xx_matlab.h:1203
DMA1_Stream2
#define DMA1_Stream2
Definition stm32f407xx_matlab.h:1189
DMA2_Stream4
#define DMA2_Stream4
Definition stm32f407xx_matlab.h:1200
DMA2_Stream1
#define DMA2_Stream1
Definition stm32f407xx_matlab.h:1197
DMA1_Stream1
#define DMA1_Stream1
Definition stm32f407xx_matlab.h:1188

◆ IS_GPIO_ALL_INSTANCE

#define IS_GPIO_ALL_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == GPIOA) || \
((INSTANCE) == GPIOB) || \
((INSTANCE) == GPIOC) || \
((INSTANCE) == GPIOD) || \
((INSTANCE) == GPIOE) || \
((INSTANCE) == GPIOF) || \
((INSTANCE) == GPIOG) || \
((INSTANCE) == GPIOH) || \
((INSTANCE) == GPIOI))
GPIOG
#define GPIOG
Definition stm32f407xx_matlab.h:1180
GPIOC
#define GPIOC
Definition stm32f407xx_matlab.h:1176
GPIOF
#define GPIOF
Definition stm32f407xx_matlab.h:1179
GPIOB
#define GPIOB
Definition stm32f407xx_matlab.h:1175
GPIOD
#define GPIOD
Definition stm32f407xx_matlab.h:1177
GPIOA
#define GPIOA
Definition stm32f407xx_matlab.h:1174
GPIOI
#define GPIOI
Definition stm32f407xx_matlab.h:1182
GPIOH
#define GPIOH
Definition stm32f407xx_matlab.h:1181
GPIOE
#define GPIOE
Definition stm32f407xx_matlab.h:1178

◆ IS_I2C_ALL_INSTANCE

#define IS_I2C_ALL_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == I2C1) || \
((INSTANCE) == I2C2) || \
((INSTANCE) == I2C3))
I2C3
#define I2C3
Definition stm32f407xx_matlab.h:1151
I2C1
#define I2C1
Definition stm32f407xx_matlab.h:1149
I2C2
#define I2C2
Definition stm32f407xx_matlab.h:1150

◆ IS_SMBUS_ALL_INSTANCE

#define IS_SMBUS_ALL_INSTANCE   IS_I2C_ALL_INSTANCE

◆ IS_I2S_ALL_INSTANCE

#define IS_I2S_ALL_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == SPI2) || \
((INSTANCE) == SPI3))
SPI3
#define SPI3
Definition stm32f407xx_matlab.h:1143
SPI2
#define SPI2
Definition stm32f407xx_matlab.h:1142

◆ IS_I2S_EXT_ALL_INSTANCE

#define IS_I2S_EXT_ALL_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == I2S2ext)|| \
((INSTANCE) == I2S3ext))
I2S3ext
#define I2S3ext
Definition stm32f407xx_matlab.h:1144
I2S2ext
#define I2S2ext
Definition stm32f407xx_matlab.h:1141

◆ IS_I2S_ALL_INSTANCE_EXT

#define IS_I2S_ALL_INSTANCE_EXT   IS_I2S_EXT_ALL_INSTANCE

◆ IS_RNG_ALL_INSTANCE

#define IS_RNG_ALL_INSTANCE ( INSTANCE)    ((INSTANCE) == RNG)

◆ IS_RTC_ALL_INSTANCE

#define IS_RTC_ALL_INSTANCE ( INSTANCE)    ((INSTANCE) == RTC)

◆ IS_SPI_ALL_INSTANCE

#define IS_SPI_ALL_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == SPI1) || \
((INSTANCE) == SPI2) || \
((INSTANCE) == SPI3))
SPI1
#define SPI1
Definition stm32f407xx_matlab.h:1168

◆ IS_TIM_INSTANCE

#define IS_TIM_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4) || \
((INSTANCE) == TIM5) || \
((INSTANCE) == TIM6) || \
((INSTANCE) == TIM7) || \
((INSTANCE) == TIM8) || \
((INSTANCE) == TIM9) || \
((INSTANCE) == TIM10)|| \
((INSTANCE) == TIM11)|| \
((INSTANCE) == TIM12)|| \
((INSTANCE) == TIM13)|| \
((INSTANCE) == TIM14))
TIM12
#define TIM12
Definition stm32f407xx_matlab.h:1135
TIM14
#define TIM14
Definition stm32f407xx_matlab.h:1137
TIM1
#define TIM1
Definition stm32f407xx_matlab.h:1157
TIM2
#define TIM2
Definition stm32f407xx_matlab.h:1129
TIM10
#define TIM10
Definition stm32f407xx_matlab.h:1172
TIM7
#define TIM7
Definition stm32f407xx_matlab.h:1134
TIM5
#define TIM5
Definition stm32f407xx_matlab.h:1132
TIM13
#define TIM13
Definition stm32f407xx_matlab.h:1136
TIM3
#define TIM3
Definition stm32f407xx_matlab.h:1130
TIM4
#define TIM4
Definition stm32f407xx_matlab.h:1131
TIM8
#define TIM8
Definition stm32f407xx_matlab.h:1158
TIM6
#define TIM6
Definition stm32f407xx_matlab.h:1133
TIM11
#define TIM11
Definition stm32f407xx_matlab.h:1173
TIM9
#define TIM9
Definition stm32f407xx_matlab.h:1171

◆ IS_TIM_CC1_INSTANCE

#define IS_TIM_CC1_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4) || \
((INSTANCE) == TIM5) || \
((INSTANCE) == TIM8) || \
((INSTANCE) == TIM9) || \
((INSTANCE) == TIM10) || \
((INSTANCE) == TIM11) || \
((INSTANCE) == TIM12) || \
((INSTANCE) == TIM13) || \
((INSTANCE) == TIM14))

◆ IS_TIM_CC2_INSTANCE

#define IS_TIM_CC2_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4) || \
((INSTANCE) == TIM5) || \
((INSTANCE) == TIM8) || \
((INSTANCE) == TIM9) || \
((INSTANCE) == TIM12))

◆ IS_TIM_CC3_INSTANCE

#define IS_TIM_CC3_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4) || \
((INSTANCE) == TIM5) || \
((INSTANCE) == TIM8))

◆ IS_TIM_CC4_INSTANCE

#define IS_TIM_CC4_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4) || \
((INSTANCE) == TIM5) || \
((INSTANCE) == TIM8))

◆ IS_TIM_ADVANCED_INSTANCE

#define IS_TIM_ADVANCED_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == TIM1) || \
((INSTANCE) == TIM8))

◆ IS_TIM_XOR_INSTANCE

#define IS_TIM_XOR_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4) || \
((INSTANCE) == TIM5) || \
((INSTANCE) == TIM8))

◆ IS_TIM_DMA_INSTANCE

#define IS_TIM_DMA_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4) || \
((INSTANCE) == TIM5) || \
((INSTANCE) == TIM6) || \
((INSTANCE) == TIM7) || \
((INSTANCE) == TIM8))

◆ IS_TIM_DMA_CC_INSTANCE

#define IS_TIM_DMA_CC_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4) || \
((INSTANCE) == TIM5) || \
((INSTANCE) == TIM8))

◆ IS_TIM_CCDMA_INSTANCE

#define IS_TIM_CCDMA_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4) || \
((INSTANCE) == TIM5) || \
((INSTANCE) == TIM8))

◆ IS_TIM_DMABURST_INSTANCE

#define IS_TIM_DMABURST_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4) || \
((INSTANCE) == TIM5) || \
((INSTANCE) == TIM8))

◆ IS_TIM_MASTER_INSTANCE

#define IS_TIM_MASTER_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4) || \
((INSTANCE) == TIM5) || \
((INSTANCE) == TIM6) || \
((INSTANCE) == TIM7) || \
((INSTANCE) == TIM8))

◆ IS_TIM_SLAVE_INSTANCE

#define IS_TIM_SLAVE_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4) || \
((INSTANCE) == TIM5) || \
((INSTANCE) == TIM8) || \
((INSTANCE) == TIM9) || \
((INSTANCE) == TIM12))

◆ IS_TIM_32B_COUNTER_INSTANCE

#define IS_TIM_32B_COUNTER_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == TIM2) || \
((INSTANCE) == TIM5))

◆ IS_TIM_ETR_INSTANCE

#define IS_TIM_ETR_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4) || \
((INSTANCE) == TIM5) || \
((INSTANCE) == TIM8))

◆ IS_TIM_REMAP_INSTANCE

#define IS_TIM_REMAP_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == TIM2) || \
((INSTANCE) == TIM5) || \
((INSTANCE) == TIM11))

◆ IS_TIM_CCX_INSTANCE

#define IS_TIM_CCX_INSTANCE ( INSTANCE,
CHANNEL )

◆ IS_TIM_CCXN_INSTANCE

#define IS_TIM_CCXN_INSTANCE ( INSTANCE,
CHANNEL )
Value:
((((INSTANCE) == TIM1) && \
(((CHANNEL) == TIM_CHANNEL_1) || \
((CHANNEL) == TIM_CHANNEL_2) || \
((CHANNEL) == TIM_CHANNEL_3))) \
|| \
(((INSTANCE) == TIM8) && \
(((CHANNEL) == TIM_CHANNEL_1) || \
((CHANNEL) == TIM_CHANNEL_2) || \
((CHANNEL) == TIM_CHANNEL_3))))

◆ IS_TIM_COUNTER_MODE_SELECT_INSTANCE

#define IS_TIM_COUNTER_MODE_SELECT_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4) || \
((INSTANCE) == TIM5) || \
((INSTANCE) == TIM8))

◆ IS_TIM_CLOCK_DIVISION_INSTANCE

#define IS_TIM_CLOCK_DIVISION_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4) || \
((INSTANCE) == TIM5) || \
((INSTANCE) == TIM8) || \
((INSTANCE) == TIM9) || \
((INSTANCE) == TIM10)|| \
((INSTANCE) == TIM11)|| \
((INSTANCE) == TIM12)|| \
((INSTANCE) == TIM13)|| \
((INSTANCE) == TIM14))

◆ IS_TIM_COMMUTATION_EVENT_INSTANCE

#define IS_TIM_COMMUTATION_EVENT_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == TIM1)|| \
((INSTANCE) == TIM8))

◆ IS_TIM_OCXREF_CLEAR_INSTANCE

#define IS_TIM_OCXREF_CLEAR_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4) || \
((INSTANCE) == TIM5) || \
((INSTANCE) == TIM8))

◆ IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE

#define IS_TIM_CLOCKSOURCE_ETRMODE1_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4) || \
((INSTANCE) == TIM5) || \
((INSTANCE) == TIM8) || \
((INSTANCE) == TIM9) || \
((INSTANCE) == TIM12))

◆ IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE

#define IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4) || \
((INSTANCE) == TIM5) || \
((INSTANCE) == TIM8))

◆ IS_TIM_CLOCKSOURCE_TIX_INSTANCE

#define IS_TIM_CLOCKSOURCE_TIX_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4) || \
((INSTANCE) == TIM5) || \
((INSTANCE) == TIM8) || \
((INSTANCE) == TIM9) || \
((INSTANCE) == TIM12))

◆ IS_TIM_CLOCKSOURCE_ITRX_INSTANCE

#define IS_TIM_CLOCKSOURCE_ITRX_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4) || \
((INSTANCE) == TIM5) || \
((INSTANCE) == TIM8) || \
((INSTANCE) == TIM9) || \
((INSTANCE) == TIM12))

◆ IS_TIM_REPETITION_COUNTER_INSTANCE

#define IS_TIM_REPETITION_COUNTER_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == TIM1) || \
((INSTANCE) == TIM8))

◆ IS_TIM_ENCODER_INTERFACE_INSTANCE

#define IS_TIM_ENCODER_INTERFACE_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4) || \
((INSTANCE) == TIM5) || \
((INSTANCE) == TIM8) || \
((INSTANCE) == TIM9) || \
((INSTANCE) == TIM12))

◆ IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE

#define IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4) || \
((INSTANCE) == TIM5) || \
((INSTANCE) == TIM8))

◆ IS_TIM_BREAK_INSTANCE

#define IS_TIM_BREAK_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == TIM1) || \
((INSTANCE) == TIM8))

◆ IS_USART_INSTANCE

#define IS_USART_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == USART1) || \
((INSTANCE) == USART2) || \
((INSTANCE) == USART3) || \
((INSTANCE) == USART6))
USART3
#define USART3
Definition stm32f407xx_matlab.h:1146
USART6
#define USART6
Definition stm32f407xx_matlab.h:1160
USART1
#define USART1
Definition stm32f407xx_matlab.h:1159
USART2
#define USART2
Definition stm32f407xx_matlab.h:1145

◆ IS_UART_HALFDUPLEX_INSTANCE

#define IS_UART_HALFDUPLEX_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == USART1) || \
((INSTANCE) == USART2) || \
((INSTANCE) == USART3) || \
((INSTANCE) == UART4) || \
((INSTANCE) == UART5) || \
((INSTANCE) == USART6))
UART4
#define UART4
Definition stm32f407xx_matlab.h:1147
UART5
#define UART5
Definition stm32f407xx_matlab.h:1148

◆ IS_UART_INSTANCE

#define IS_UART_INSTANCE   IS_UART_HALFDUPLEX_INSTANCE

◆ IS_UART_HWFLOW_INSTANCE

#define IS_UART_HWFLOW_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == USART1) || \
((INSTANCE) == USART2) || \
((INSTANCE) == USART3) || \
((INSTANCE) == USART6))

◆ IS_UART_LIN_INSTANCE

#define IS_UART_LIN_INSTANCE   IS_UART_HALFDUPLEX_INSTANCE

◆ IS_SMARTCARD_INSTANCE

#define IS_SMARTCARD_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == USART1) || \
((INSTANCE) == USART2) || \
((INSTANCE) == USART3) || \
((INSTANCE) == USART6))

◆ IS_IRDA_INSTANCE

#define IS_IRDA_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == USART1) || \
((INSTANCE) == USART2) || \
((INSTANCE) == USART3) || \
((INSTANCE) == UART4) || \
((INSTANCE) == UART5) || \
((INSTANCE) == USART6))

◆ IS_PCD_ALL_INSTANCE

#define IS_PCD_ALL_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == USB_OTG_FS) || \
((INSTANCE) == USB_OTG_HS))
USB_OTG_HS
#define USB_OTG_HS
Definition stm32f407xx_matlab.h:1213
USB_OTG_FS
#define USB_OTG_FS
Definition stm32f407xx_matlab.h:1212

◆ IS_HCD_ALL_INSTANCE

#define IS_HCD_ALL_INSTANCE ( INSTANCE)
Value:
(((INSTANCE) == USB_OTG_FS) || \
((INSTANCE) == USB_OTG_HS))

◆ IS_SDIO_ALL_INSTANCE

#define IS_SDIO_ALL_INSTANCE ( INSTANCE)    ((INSTANCE) == SDIO)

◆ IS_IWDG_ALL_INSTANCE

#define IS_IWDG_ALL_INSTANCE ( INSTANCE)    ((INSTANCE) == IWDG)

◆ IS_WWDG_ALL_INSTANCE

#define IS_WWDG_ALL_INSTANCE ( INSTANCE)    ((INSTANCE) == WWDG)

◆ USB_OTG_FS_HOST_MAX_CHANNEL_NBR

#define USB_OTG_FS_HOST_MAX_CHANNEL_NBR   8U

◆ USB_OTG_FS_MAX_IN_ENDPOINTS

#define USB_OTG_FS_MAX_IN_ENDPOINTS   4U /* Including EP0 */

◆ USB_OTG_FS_MAX_OUT_ENDPOINTS

#define USB_OTG_FS_MAX_OUT_ENDPOINTS   4U /* Including EP0 */

◆ USB_OTG_FS_TOTAL_FIFO_SIZE

#define USB_OTG_FS_TOTAL_FIFO_SIZE   1280U /* in Bytes */

◆ RCC_PLLCFGR_RST_VALUE

#define RCC_PLLCFGR_RST_VALUE   0x24003010U

◆ RCC_PLLI2SCFGR_RST_VALUE

#define RCC_PLLI2SCFGR_RST_VALUE   0x20003000U

◆ RCC_MAX_FREQUENCY

#define RCC_MAX_FREQUENCY   168000000U

Max frequency of family in Hz

◆ RCC_MAX_FREQUENCY_SCALE1

#define RCC_MAX_FREQUENCY_SCALE1   RCC_MAX_FREQUENCY

Maximum frequency for system clock at power scale1, in Hz

◆ RCC_MAX_FREQUENCY_SCALE2

#define RCC_MAX_FREQUENCY_SCALE2   144000000U

Maximum frequency for system clock at power scale2, in Hz

◆ RCC_PLLVCO_OUTPUT_MIN

#define RCC_PLLVCO_OUTPUT_MIN   100000000U

Frequency min for PLLVCO output, in Hz

◆ RCC_PLLVCO_INPUT_MIN

#define RCC_PLLVCO_INPUT_MIN   950000U

Frequency min for PLLVCO input, in Hz

◆ RCC_PLLVCO_INPUT_MAX

#define RCC_PLLVCO_INPUT_MAX   2100000U

Frequency max for PLLVCO input, in Hz

◆ RCC_PLLVCO_OUTPUT_MAX

#define RCC_PLLVCO_OUTPUT_MAX   432000000U

Frequency max for PLLVCO output, in Hz

◆ RCC_PLLN_MIN_VALUE

#define RCC_PLLN_MIN_VALUE   50U

◆ RCC_PLLN_MAX_VALUE

#define RCC_PLLN_MAX_VALUE   432U

◆ FLASH_SCALE1_LATENCY1_FREQ

#define FLASH_SCALE1_LATENCY1_FREQ   30000000U

HCLK frequency to set FLASH latency 1 in power scale 1

◆ FLASH_SCALE1_LATENCY2_FREQ

#define FLASH_SCALE1_LATENCY2_FREQ   60000000U

HCLK frequency to set FLASH latency 2 in power scale 1

◆ FLASH_SCALE1_LATENCY3_FREQ

#define FLASH_SCALE1_LATENCY3_FREQ   90000000U

HCLK frequency to set FLASH latency 3 in power scale 1

◆ FLASH_SCALE1_LATENCY4_FREQ

#define FLASH_SCALE1_LATENCY4_FREQ   120000000U

HCLK frequency to set FLASH latency 4 in power scale 1

◆ FLASH_SCALE1_LATENCY5_FREQ

#define FLASH_SCALE1_LATENCY5_FREQ   150000000U

HCLK frequency to set FLASH latency 5 in power scale 1

◆ FLASH_SCALE2_LATENCY1_FREQ

#define FLASH_SCALE2_LATENCY1_FREQ   30000000U

HCLK frequency to set FLASH latency 1 in power scale 2

◆ FLASH_SCALE2_LATENCY2_FREQ

#define FLASH_SCALE2_LATENCY2_FREQ   60000000U

HCLK frequency to set FLASH latency 2 in power scale 2

◆ FLASH_SCALE2_LATENCY3_FREQ

#define FLASH_SCALE2_LATENCY3_FREQ   90000000U

HCLK frequency to set FLASH latency 3 in power scale 2

◆ FLASH_SCALE2_LATENCY4_FREQ

#define FLASH_SCALE2_LATENCY4_FREQ   12000000U

HCLK frequency to set FLASH latency 4 in power scale 2

◆ USB_OTG_HS_HOST_MAX_CHANNEL_NBR

#define USB_OTG_HS_HOST_MAX_CHANNEL_NBR   12U

◆ USB_OTG_HS_MAX_IN_ENDPOINTS

#define USB_OTG_HS_MAX_IN_ENDPOINTS   6U /* Including EP0 */

◆ USB_OTG_HS_MAX_OUT_ENDPOINTS

#define USB_OTG_HS_MAX_OUT_ENDPOINTS   6U /* Including EP0 */

◆ USB_OTG_HS_TOTAL_FIFO_SIZE

#define USB_OTG_HS_TOTAL_FIFO_SIZE   4096U /* in Bytes */

◆ FMC_IRQn

#define FMC_IRQn   FSMC_IRQn

◆ FMC_IRQHandler

#define FMC_IRQHandler   FSMC_IRQHandler
Generated by doxygen 1.10.0