96 lines
4.9 KiB
Markdown
96 lines
4.9 KiB
Markdown
# MD / Motor Driver Map
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## Status
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No STM32G474CEU6 motor-driver files such as `md.c`, `motor_driver.c`, `gate_driver.c`, `drv.c`, `inverter.c`, `pwm.c`, or STM32 `tim.c/adc.c/gpio.c` were found in the current `AD` workspace.
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The available motor-driver evidence is a C2000/TMS320 INU implementation under `Inu_im_1wnd_3lvl/Inu`.
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A sibling STM32G474 candidate was found at `F:\set\workspace\setcorp\set506\git_project\stm32g474\stm32g474_IHM08M\IHM08M`, but it targets `STM32G474RETx`/NUCLEO-G474RE, not the requested `STM32G474CEU6`.
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## Driver pins
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| Function | STM32G474 status | Existing source evidence | Notes |
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|----------|------------------|--------------------------|-------|
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| Gate/PWM outputs | UNKNOWN/TODO | GPIO0..GPIO11 mapped to ePWM1A/B..ePWM6A/B in `Inu/init28335.c:177..188` | STM32 TIM channels must be extracted from `.ioc` when available |
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| Driver enable | UNKNOWN/TODO | No explicit `EN_GATE`/`DRV_EN` STM32 pin found | Existing C2000 enables pulses by clearing Trip-Zone latch in `pwm()` |
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| Driver fault | UNKNOWN/TODO | `DI_24V_SOURCE_FAULT` on C2000 GPIO50, active high | Real STM32 fault input must be documented from schematic/CubeMX |
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| EEPROM/SPI CS | UNKNOWN/TODO | C2000 GPIO57 `CS_SET/CS_CLEAR`, SPIA on GPIO54..56 | Exact external device UNKNOWN |
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| Status LEDs | UNKNOWN/TODO | GPIO59..61 active-low LEDs | Board-specific, not motor-driver critical |
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## PWM generation
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Existing C2000 implementation:
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- ePWM1..ePWM6 are initialized in `SetupEpwm()` in `Inu/init28335.c`.
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- ePWM period uses `T1_PRD` derived from `T_PWM`.
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- PWM compare registers are written in `pwm()` in `Inu/upr.c:537..558`.
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- Dead-time uses `DT` in `Inu/def.h`.
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- Emergency PWM disable uses Trip-Zone force `TZFRC.all = 0x0004` in `stop_inu()` in `Inu/isr.c:300..328`.
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STM32G474 TODO:
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- Identify TIM1/TIM8 or other advanced timer instance.
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- Identify complementary channels, dead-time, break input, BKIN polarity, off-state behavior.
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- Verify that all PWM outputs remain disabled after reset and during ParamID default state.
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Candidate STM32G474RETx project:
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- TIM1 PWM is configured only for `TIM_CHANNEL_1` with output pin `PA7/TIM1_CH1N`.
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- `MX_TIM1_Init()` has `DeadTime = 0`, `BreakState = TIM_BREAK_DISABLE`, `Break2State = TIM_BREAK2_DISABLE`, `AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE`.
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- Calls to `HAL_Init()`, `SystemClock_Config()`, `MX_GPIO_Init()`, and `MX_TIM1_Init()` are commented out in `Core/Src/main.c`, so the candidate firmware currently does not initialize peripherals at runtime.
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## ADC/current sense
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Existing C2000 implementation:
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| Measurement | Existing source | Notes |
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|-------------|-----------------|-------|
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| DC-link voltage `udc1` | `AdcMirror.ADCRESULT0`, `Inu/isr.c:37` | Offset `offset.Udc1`, scale `GAIN_UDC` |
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| Current `ic1` | `AdcMirror.ADCRESULT2`, `Inu/isr.c:38` | Offset `offset.Ic1`, scale `GAIN_IAC` |
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| Current `ia1` | `AdcMirror.ADCRESULT4`, `Inu/isr.c:39` | Offset `offset.Ia1`, scale `GAIN_IAC` |
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| Current `ib1` | `AdcMirror.ADCRESULT6`, `Inu/isr.c:40` | Offset `offset.Ib1`, scale `GAIN_IAC` |
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STM32G474 TODO:
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- Identify ADC instances and channels from `.ioc`.
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- Identify injected/regular conversion, DMA buffers, trigger timer, sampling time.
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- Map ADC raw values into `AD_Measurements_t`.
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Candidate STM32G474RETx project:
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- No ADC module is enabled in `stm32g4xx_hal_conf.h`.
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- No ADC pins/channels are configured in `IHM08M.ioc`.
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## Protection logic found
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| Protection | Existing implementation | Fault |
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|------------|-------------------------|-------|
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| Overcurrent | `result.ia1/ib1/ic1` checked against `protect.IacMax/IacMin` in `Inu/isr.c:97..101` | `faultNo = 22` |
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| DC-link undervoltage | `udc1Nf < protect.UdcMin` with debounce in `Inu/isr.c:104..115` | `faultNo = 30` |
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| DC-link overvoltage | `udc1Nf > protect.UdcMax` in `Inu/isr.c:121..123` | `faultNo = 24` |
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| Overspeed | `wm > protect.WmMax` with debounce in `Inu/isr.c:126..137` | `faultNo = 32` |
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| +24 V supply fault | `DI_24V_SOURCE_FAULT == 1` with debounce in `Inu/isr.c:140..151` | `faultNo = 7` |
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| PWM shutdown | `stop_inu()` forces Trip-Zone and clears compare registers | Safe stop path |
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## Missing or unverified protections
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- STM32G474 hardware break input: UNKNOWN.
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- Gate-driver fault polarity and latch behavior: UNKNOWN.
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- Overtemperature source: UNKNOWN.
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- Emergency stop pin: UNKNOWN.
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- DC-link discharge/ready signal: UNKNOWN.
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- Hardware overcurrent comparator/OPAMP/COMP chain: UNKNOWN.
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- Watchdog strategy for STM32 project: UNKNOWN.
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## New safe software interlock
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`Core/Src/ad_parameter_identification.c` adds:
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- Compile-time default `AD_PARAM_ID_ENABLE_POWER_TESTS = 0`.
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- Software enable gate via `AD_ParamID_SetSoftwareEnable`.
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- Fault latch via `AD_PARAM_ID_STATUS_FAULT_LATCHED`.
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- Emergency stop API `AD_ParamID_EmergencyStop`.
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- Checks for measurement status flags and configured current/voltage/temperature/speed limits.
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- Locked-rotor mode blocked unless `AD_ParamID_SetLockedRotorAllowed(1)` is called and power tests are compiled in.
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