4.9 KiB
4.9 KiB
MD / Motor Driver Map
Status
No STM32G474CEU6 motor-driver files such as md.c, motor_driver.c, gate_driver.c, drv.c, inverter.c, pwm.c, or STM32 tim.c/adc.c/gpio.c were found in the current AD workspace.
The available motor-driver evidence is a C2000/TMS320 INU implementation under Inu_im_1wnd_3lvl/Inu.
A sibling STM32G474 candidate was found at F:\set\workspace\setcorp\set506\git_project\stm32g474\stm32g474_IHM08M\IHM08M, but it targets STM32G474RETx/NUCLEO-G474RE, not the requested STM32G474CEU6.
Driver pins
| Function | STM32G474 status | Existing source evidence | Notes |
|---|---|---|---|
| Gate/PWM outputs | UNKNOWN/TODO | GPIO0..GPIO11 mapped to ePWM1A/B..ePWM6A/B in Inu/init28335.c:177..188 |
STM32 TIM channels must be extracted from .ioc when available |
| Driver enable | UNKNOWN/TODO | No explicit EN_GATE/DRV_EN STM32 pin found |
Existing C2000 enables pulses by clearing Trip-Zone latch in pwm() |
| Driver fault | UNKNOWN/TODO | DI_24V_SOURCE_FAULT on C2000 GPIO50, active high |
Real STM32 fault input must be documented from schematic/CubeMX |
| EEPROM/SPI CS | UNKNOWN/TODO | C2000 GPIO57 CS_SET/CS_CLEAR, SPIA on GPIO54..56 |
Exact external device UNKNOWN |
| Status LEDs | UNKNOWN/TODO | GPIO59..61 active-low LEDs | Board-specific, not motor-driver critical |
PWM generation
Existing C2000 implementation:
- ePWM1..ePWM6 are initialized in
SetupEpwm()inInu/init28335.c. - ePWM period uses
T1_PRDderived fromT_PWM. - PWM compare registers are written in
pwm()inInu/upr.c:537..558. - Dead-time uses
DTinInu/def.h. - Emergency PWM disable uses Trip-Zone force
TZFRC.all = 0x0004instop_inu()inInu/isr.c:300..328.
STM32G474 TODO:
- Identify TIM1/TIM8 or other advanced timer instance.
- Identify complementary channels, dead-time, break input, BKIN polarity, off-state behavior.
- Verify that all PWM outputs remain disabled after reset and during ParamID default state.
Candidate STM32G474RETx project:
- TIM1 PWM is configured only for
TIM_CHANNEL_1with output pinPA7/TIM1_CH1N. MX_TIM1_Init()hasDeadTime = 0,BreakState = TIM_BREAK_DISABLE,Break2State = TIM_BREAK2_DISABLE,AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE.- Calls to
HAL_Init(),SystemClock_Config(),MX_GPIO_Init(), andMX_TIM1_Init()are commented out inCore/Src/main.c, so the candidate firmware currently does not initialize peripherals at runtime.
ADC/current sense
Existing C2000 implementation:
| Measurement | Existing source | Notes |
|---|---|---|
DC-link voltage udc1 |
AdcMirror.ADCRESULT0, Inu/isr.c:37 |
Offset offset.Udc1, scale GAIN_UDC |
Current ic1 |
AdcMirror.ADCRESULT2, Inu/isr.c:38 |
Offset offset.Ic1, scale GAIN_IAC |
Current ia1 |
AdcMirror.ADCRESULT4, Inu/isr.c:39 |
Offset offset.Ia1, scale GAIN_IAC |
Current ib1 |
AdcMirror.ADCRESULT6, Inu/isr.c:40 |
Offset offset.Ib1, scale GAIN_IAC |
STM32G474 TODO:
- Identify ADC instances and channels from
.ioc. - Identify injected/regular conversion, DMA buffers, trigger timer, sampling time.
- Map ADC raw values into
AD_Measurements_t.
Candidate STM32G474RETx project:
- No ADC module is enabled in
stm32g4xx_hal_conf.h. - No ADC pins/channels are configured in
IHM08M.ioc.
Protection logic found
| Protection | Existing implementation | Fault |
|---|---|---|
| Overcurrent | result.ia1/ib1/ic1 checked against protect.IacMax/IacMin in Inu/isr.c:97..101 |
faultNo = 22 |
| DC-link undervoltage | udc1Nf < protect.UdcMin with debounce in Inu/isr.c:104..115 |
faultNo = 30 |
| DC-link overvoltage | udc1Nf > protect.UdcMax in Inu/isr.c:121..123 |
faultNo = 24 |
| Overspeed | wm > protect.WmMax with debounce in Inu/isr.c:126..137 |
faultNo = 32 |
| +24 V supply fault | DI_24V_SOURCE_FAULT == 1 with debounce in Inu/isr.c:140..151 |
faultNo = 7 |
| PWM shutdown | stop_inu() forces Trip-Zone and clears compare registers |
Safe stop path |
Missing or unverified protections
- STM32G474 hardware break input: UNKNOWN.
- Gate-driver fault polarity and latch behavior: UNKNOWN.
- Overtemperature source: UNKNOWN.
- Emergency stop pin: UNKNOWN.
- DC-link discharge/ready signal: UNKNOWN.
- Hardware overcurrent comparator/OPAMP/COMP chain: UNKNOWN.
- Watchdog strategy for STM32 project: UNKNOWN.
New safe software interlock
Core/Src/ad_parameter_identification.c adds:
- Compile-time default
AD_PARAM_ID_ENABLE_POWER_TESTS = 0. - Software enable gate via
AD_ParamID_SetSoftwareEnable. - Fault latch via
AD_PARAM_ID_STATUS_FAULT_LATCHED. - Emergency stop API
AD_ParamID_EmergencyStop. - Checks for measurement status flags and configured current/voltage/temperature/speed limits.
- Locked-rotor mode blocked unless
AD_ParamID_SetLockedRotorAllowed(1)is called and power tests are compiled in.