Aleksey/UKSS_ICE
1
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

init commit.

Browse Source 
Проект каким он достался от Димы.
This commit is contained in:
nelolik
2021-02-15 09:56:02 +03:00
commit b8a0477c5c
294 changed files with 72365 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

189
v120/DSP2833x_examples/dma_ram_to_ram/Example_2833xDMA_ram_to_ram.c Normal file
View File

@@ -0,0 +1,189 @@
// TI File $Revision: /main/3 $
// Checkin $Date: May 12, 2008 14:23:19 $
//###########################################################################
//
// FILE: Example_2833xDMA_Ram_to_Ram.c
//
// TITLE: DSP2833x DMA Ram to Ram
// ASSUMPTIONS:
//
// This program requires the DSP2833x header files.
//
// As supplied, this project is configured for "boot to SARAM"
// operation. The 2833x Boot Mode table is shown below.
// For information on configuring the boot mode of an eZdsp,
// please refer to the documentation included with the eZdsp,
//
// $Boot_Table:
//
// GPIO87 GPIO86 GPIO85 GPIO84
// XA15 XA14 XA13 XA12
// PU PU PU PU
// ==========================================
// 1 1 1 1 Jump to Flash
// 1 1 1 0 SCI-A boot
// 1 1 0 1 SPI-A boot
// 1 1 0 0 I2C-A boot
// 1 0 1 1 eCAN-A boot
// 1 0 1 0 McBSP-A boot
// 1 0 0 1 Jump to XINTF x16
// 1 0 0 0 Jump to XINTF x32
// 0 1 1 1 Jump to OTP
// 0 1 1 0 Parallel GPIO I/O boot
// 0 1 0 1 Parallel XINTF boot
// 0 1 0 0 Jump to SARAM <- "boot to SARAM"
// 0 0 1 1 Branch to check boot mode
// 0 0 1 0 Boot to flash, bypass ADC cal
// 0 0 0 1 Boot to SARAM, bypass ADC cal
// 0 0 0 0 Boot to SCI-A, bypass ADC cal
// Boot_Table_End$
//
//
// DESCRIPTION:
//
// Code will perform a block copy from L5 SARAM to L4 SARAM of 1024 words. Transfer will be started
// by Timer0. Will use 32-bit datasize to decrease the transfer time.
// Code will end in local_DINTCH1_ISR once the transfer is complete
//
// Watch Variables:
// DMABuf1
// DMABuf2
//
//###########################################################################
//
// Original source by: M.P.
//
// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
// $Release Date: August 1, 2008 $
//###########################################################################
#include "DSP28x_Project.h" // Device Headerfile and Examples Include File
#define BUF_SIZE 1024 // Sample buffer size
// DMA Defines
#define CH1_TOTAL DATA_POINTS_PER_CHANNEL
#define CH1_WORDS_PER_BURST ADC_CHANNELS_TO_CONVERT
#pragma DATA_SECTION(DMABuf1,"DMARAML4");
#pragma DATA_SECTION(DMABuf2,"DMARAML5");
volatile Uint16 DMABuf1[1024];
volatile Uint16 DMABuf2[1024];
volatile Uint16 *DMADest;
volatile Uint16 *DMASource;
interrupt void local_DINTCH1_ISR(void);
void main(void)
{
Uint16 i;
// Step 1. Initialize System Control:
// PLL, WatchDog, enable Peripheral Clocks
// This example function is found in the DSP2833x_SysCtrl.c file.
InitSysCtrl();
// Step 2. Initialize GPIO:
// This example function is found in the DSP2833x_Gpio.c file and
// illustrates how to set the GPIO to it's default state.
// InitGpio(); // Skipped for this example
// Step 3. Clear all interrupts and initialize PIE vector table:
// Disable CPU interrupts
DINT;
// Initialize the PIE control registers to their default state.
// The default state is all PIE interrupts disabled and flags
// are cleared.
// This function is found in the DSP2833x_PieCtrl.c file.
InitPieCtrl();
// Disable CPU interrupts and clear all CPU interrupt flags:
IER = 0x0000;
IFR = 0x0000;
// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
// This will populate the entire table, even if the interrupt
// is not used in this example. This is useful for debug purposes.
// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
// This function is found in DSP2833x_PieVect.c.
InitPieVectTable();
// Interrupts that are used in this example are re-mapped to
// ISR functions found within this file.
EALLOW; // Allow access to EALLOW protected registers
PieVectTable.DINTCH1= &local_DINTCH1_ISR;
EDIS; // Disable access to EALLOW protected registers
IER = M_INT7 ; //Enable INT7 (7.1 DMA Ch1)
EnableInterrupts();
CpuTimer0Regs.TCR.bit.TSS = 1; //Stop Timer0 for now
//Step 5. User specific code, enable interrupts:
// Initialize DMA
DMAInitialize();
// Initialize Tables
for (i=0; i<BUF_SIZE; i++)
{
DMABuf1[i] = 0;
DMABuf2[i] = i;
}
// Configure DMA Channel
DMADest = &DMABuf1[0];
DMASource = &DMABuf2[0];
DMACH1AddrConfig(DMADest,DMASource);
DMACH1BurstConfig(31,2,2); //Will set up to use 32-bit datasize, pointers are based on 16-bit words
DMACH1TransferConfig(31,2,2); //so need to increment by 2 to grab the correct location
DMACH1WrapConfig(0xFFFF,0,0xFFFF,0);
//Use timer0 to start the x-fer.
//Since this is a static copy use one shot mode, so only one trigger is needed
//Also using 32-bit mode to decrease x-fer time
DMACH1ModeConfig(DMA_TINT0,PERINT_ENABLE,ONESHOT_ENABLE,CONT_DISABLE,SYNC_DISABLE,SYNC_SRC,OVRFLOW_DISABLE,THIRTYTWO_BIT,CHINT_END,CHINT_ENABLE);
StartDMACH1();
//Init the timer 0
CpuTimer0Regs.TIM.half.LSW = 512; //load low value so we can start the DMA quickly
CpuTimer0Regs.TCR.bit.SOFT = 1; //Allow to free run even if halted
CpuTimer0Regs.TCR.bit.FREE = 1;
CpuTimer0Regs.TCR.bit.TIE = 1; //Enable the timer0 interrupt signal
CpuTimer0Regs.TCR.bit.TSS = 0; //restart the timer 0
for(;;){}
}
// INT7.1
interrupt void local_DINTCH1_ISR(void) // DMA Channel 1
{
// To receive more interrupts from this PIE group, acknowledge this interrupt
PieCtrlRegs.PIEACK.all = PIEACK_GROUP7;
// Next two lines for debug only to halt the processor here
// Remove after inserting ISR Code
asm (" ESTOP0");
for(;;);
}

36
v120/DSP2833x_examples/dma_ram_to_ram/Example_2833xDMA_ram_to_ram.gel Normal file
View File

@@ -0,0 +1,36 @@
/*
// TI File $Revision: /main/1 $
// Checkin $Date: August 14, 2007 16:28:46 $
//###########################################################################
//
// This .gel file can be used to help load and build the example project.
// It should be unloaded from Code Composer Studio before loading another
// project.
//
//###########################################################################
// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
// $Release Date: August 1, 2008 $
//###########################################################################
*/
menuitem "DSP2833x DMA Ram to Ram Example"
hotmenu Load_and_Build_Project()
{
GEL_ProjectLoad("Example_2833xDMA_ram_to_ram.pjt");
GEL_ProjectBuild("Example_2833xDMA_ram_to_ram.pjt");
Setup_WatchWindow();
}
hotmenu Load_Code()
{
GEL_Load(".\\debug\\Example_2833xDMA_ram_to_ram.out");
Setup_WatchWindow();
}
hotmenu Setup_WatchWindow()
{
GEL_WatchReset();
GEL_WatchAdd("DMABuf1,x");
GEL_WatchAdd("DMABuf2,x");
}

47
v120/DSP2833x_examples/dma_ram_to_ram/Example_2833xDMA_ram_to_ram.pjt Normal file
View File

@@ -0,0 +1,47 @@
; Code Composer Project File, Version 2.0 (do not modify or remove this line)
[Project Settings]
ProjectName="DSP28"
ProjectDir="C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\dma_ram_to_ram\"
ProjectType=Executable
CPUFamily=TMS320C28XX
Tool="Compiler"
Tool="CustomBuilder"
Tool="DspBiosBuilder"
Tool="Linker"
Config="Debug"
Config="Release"
[Source Files]
Source="..\..\DSP2833x_common\source\DSP2833x_Adc.c"
Source="..\..\DSP2833x_common\source\DSP2833x_ADC_cal.asm"
Source="..\..\DSP2833x_common\source\DSP2833x_CodeStartBranch.asm"
Source="..\..\DSP2833x_common\source\DSP2833x_DefaultIsr.c"
Source="..\..\DSP2833x_common\source\DSP2833x_DMA.c"
Source="..\..\DSP2833x_common\source\DSP2833x_PieCtrl.c"
Source="..\..\DSP2833x_common\source\DSP2833x_PieVect.c"
Source="..\..\DSP2833x_common\source\DSP2833x_SysCtrl.c"
Source="..\..\DSP2833x_common\source\DSP2833x_usDelay.asm"
Source="..\..\DSP2833x_headers\source\DSP2833x_GlobalVariableDefs.c"
Source="Example_2833xDMA_ram_to_ram.c"
Source="..\..\DSP2833x_common\cmd\28335_RAM_lnk.cmd"
Source="..\..\DSP2833x_headers\cmd\DSP2833x_Headers_nonBIOS.cmd"
["Compiler" Settings: "Debug"]
Options=-g -q -pdr -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\dma_ram_to_ram\Debug" -fs"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\dma_ram_to_ram\Debug" -i"..\..\DSP2833x_headers\include" -i"..\..\DSP2833x_common\include" -d"_DEBUG" -d"LARGE_MODEL" --float_support=fpu32 -ml -mt -v28
["Compiler" Settings: "Release"]
Options=-q -o3 -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\dma_ram_to_ram\Release" -d"LARGE_MODEL" -ml -v28
["DspBiosBuilder" Settings: "Debug"]
Options=-v28
["DspBiosBuilder" Settings: "Release"]
Options=-v28
["Linker" Settings: "Debug"]
Options=-q -c -ecode_start -m".\Debug\Example_2833xDMA_ram_to_ram.map" -o".\Debug\Example_2833xDMA_ram_to_ram.out" -stack0x380 -w -x -i"..\..\DSP2833x_headers\include" -l"rts2800_fpu32.lib"
["Linker" Settings: "Release"]
Options=-q -c -o".\Release\Example_2833xDMA_ram_to_ram.out" -x