sokolovstanislav
beef10a15b
Увеличили размерность памяти 8х32. Со стороны контроллера ввели ножки nBL. Это выбор байта (от 0 до 3) в ячейки памяти. Добавили описание блока памяти. После синтеза, который стал занимать намного больше времени, блок памяти перестал определятся как синхронная память. Данные по загрузке ПЛИС: Total logic elements 10,706 / 24,624 ( 43 % ) Total combinational functions 6,603 / 24,624 ( 27 % ) Dedicated logic registers 8,249 / 24,624 ( 33 % ) Total registers 8249 Total pins 25 / 149 ( 17 % ) Total PLLs 1 / 4 ( 25 % )
133 lines
8.5 KiB
Plaintext
133 lines
8.5 KiB
Plaintext
Flow report for MainController
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Thu Mar 14 11:15:55 2024
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Quartus II 64-Bit Version 13.1.0 Build 162 10/23/2013 SJ Full Version
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; Table of Contents ;
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---------------------
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1. Legal Notice
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2. Flow Summary
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3. Flow Settings
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4. Flow Non-Default Global Settings
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5. Flow Elapsed Time
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6. Flow OS Summary
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7. Flow Log
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8. Flow Messages
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9. Flow Suppressed Messages
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----------------
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; Legal Notice ;
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----------------
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Copyright (C) 1991-2013 Altera Corporation
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Your use of Altera Corporation's design tools, logic functions
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and other software and tools, and its AMPP partner logic
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functions, and any output files from any of the foregoing
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(including device programming or simulation files), and any
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associated documentation or information are expressly subject
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to the terms and conditions of the Altera Program License
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Subscription Agreement, Altera MegaCore Function License
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Agreement, or other applicable license agreement, including,
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without limitation, that your use is for the sole purpose of
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programming logic devices manufactured by Altera and sold by
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Altera or its authorized distributors. Please refer to the
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applicable agreement for further details.
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+----------------------------------------------------------------------------------+
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; Flow Summary ;
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+------------------------------------+---------------------------------------------+
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; Flow Status ; Successful - Thu Mar 14 11:15:55 2024 ;
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; Quartus II 64-Bit Version ; 13.1.0 Build 162 10/23/2013 SJ Full Version ;
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; Revision Name ; MainController ;
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; Top-level Entity Name ; MainController ;
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; Family ; Cyclone III ;
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; Device ; EP3C25Q240C8 ;
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; Timing Models ; Final ;
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; Total logic elements ; 10,706 / 24,624 ( 43 % ) ;
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; Total combinational functions ; 6,603 / 24,624 ( 27 % ) ;
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; Dedicated logic registers ; 8,249 / 24,624 ( 33 % ) ;
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; Total registers ; 8249 ;
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; Total pins ; 25 / 149 ( 17 % ) ;
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; Total virtual pins ; 0 ;
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; Total memory bits ; 0 / 608,256 ( 0 % ) ;
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; Embedded Multiplier 9-bit elements ; 0 / 132 ( 0 % ) ;
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; Total PLLs ; 1 / 4 ( 25 % ) ;
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+------------------------------------+---------------------------------------------+
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+-----------------------------------------+
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; Flow Settings ;
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+-------------------+---------------------+
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; Option ; Setting ;
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+-------------------+---------------------+
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; Start date & time ; 03/14/2024 11:14:32 ;
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; Main task ; Compilation ;
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; Revision Name ; MainController ;
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+-------------------+---------------------+
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+---------------------------------------------------------------------------------------------------------------------+
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; Flow Non-Default Global Settings ;
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+-------------------------------------+--------------------------------+---------------+-------------+----------------+
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; Assignment Name ; Value ; Default Value ; Entity Name ; Section Id ;
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+-------------------------------------+--------------------------------+---------------+-------------+----------------+
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; COMPILER_SIGNATURE_ID ; 30902508249626.171040407115236 ; -- ; -- ; -- ;
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; EDA_OUTPUT_DATA_FORMAT ; Vhdl ; -- ; -- ; eda_simulation ;
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; EDA_SIMULATION_TOOL ; ModelSim-Altera (VHDL) ; <None> ; -- ; -- ;
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; IP_TOOL_NAME ; ALTPLL ; -- ; -- ; -- ;
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; IP_TOOL_VERSION ; 13.1 ; -- ; -- ; -- ;
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; MAX_CORE_JUNCTION_TEMP ; 85 ; -- ; -- ; -- ;
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; MIN_CORE_JUNCTION_TEMP ; 0 ; -- ; -- ; -- ;
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; MISC_FILE ; AlteraPLL.cmp ; -- ; -- ; -- ;
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; MISC_FILE ; AlteraPLL.ppf ; -- ; -- ; -- ;
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; NOMINAL_CORE_SUPPLY_VOLTAGE ; 1.2V ; -- ; -- ; -- ;
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; PARTITION_COLOR ; 16764057 ; -- ; -- ; Top ;
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; PARTITION_FITTER_PRESERVATION_LEVEL ; PLACEMENT_AND_ROUTING ; -- ; -- ; Top ;
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; PARTITION_NETLIST_TYPE ; SOURCE ; -- ; -- ; Top ;
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; PROJECT_OUTPUT_DIRECTORY ; output_files ; -- ; -- ; -- ;
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+-------------------------------------+--------------------------------+---------------+-------------+----------------+
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+-------------------------------------------------------------------------------------------------------------------------------+
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; Flow Elapsed Time ;
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+---------------------------+--------------+-------------------------+---------------------+------------------------------------+
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; Module Name ; Elapsed Time ; Average Processors Used ; Peak Virtual Memory ; Total CPU Time (on all processors) ;
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+---------------------------+--------------+-------------------------+---------------------+------------------------------------+
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; Analysis & Synthesis ; 00:00:21 ; 1.0 ; 4793 MB ; 00:00:21 ;
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; Fitter ; 00:00:38 ; 2.2 ; 5541 MB ; 00:00:53 ;
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; Assembler ; 00:00:02 ; 1.0 ; 4629 MB ; 00:00:02 ;
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; TimeQuest Timing Analyzer ; 00:00:05 ; 1.8 ; 4845 MB ; 00:00:08 ;
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; EDA Netlist Writer ; 00:00:09 ; 1.0 ; 4655 MB ; 00:00:09 ;
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; Total ; 00:01:15 ; -- ; -- ; 00:01:33 ;
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+---------------------------+--------------+-------------------------+---------------------+------------------------------------+
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+----------------------------------------------------------------------------------------+
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; Flow OS Summary ;
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+---------------------------+------------------+-----------+------------+----------------+
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; Module Name ; Machine Hostname ; OS Name ; OS Version ; Processor type ;
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+---------------------------+------------------+-----------+------------+----------------+
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; Analysis & Synthesis ; STAS-W10 ; Windows 7 ; 6.2 ; x86_64 ;
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; Fitter ; STAS-W10 ; Windows 7 ; 6.2 ; x86_64 ;
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; Assembler ; STAS-W10 ; Windows 7 ; 6.2 ; x86_64 ;
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; TimeQuest Timing Analyzer ; STAS-W10 ; Windows 7 ; 6.2 ; x86_64 ;
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; EDA Netlist Writer ; STAS-W10 ; Windows 7 ; 6.2 ; x86_64 ;
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+---------------------------+------------------+-----------+------------+----------------+
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------------
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; Flow Log ;
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------------
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quartus_map --read_settings_files=on --write_settings_files=off MainController -c MainController
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quartus_fit --read_settings_files=off --write_settings_files=off MainController -c MainController
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quartus_asm --read_settings_files=off --write_settings_files=off MainController -c MainController
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quartus_sta MainController -c MainController
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quartus_eda --read_settings_files=off --write_settings_files=off MainController -c MainController
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