Три блока на шине: PWM, LedController и TEST. В TEST можно прочитать линию Er0_in, а так же управлять светодиодами FPGA_LEDS с пятого по второй. Первый сетодиод остался как индикатор работы ПЛИС.

This commit is contained in:
sokolovstanislav 2024-04-09 17:11:52 +03:00
parent a9a45aaad4
commit 5adc23b007
5 changed files with 557 additions and 140 deletions

View File

@ -225,7 +225,7 @@ applicable agreement for further details.
) )
(pin (pin
(output) (output)
(rect 1840 128 2016 144) (rect 1856 2176 2032 2192)
(text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6))) (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
(text "FPGA_LED_2" (rect 90 0 158 12)(font "Arial" )) (text "FPGA_LED_2" (rect 90 0 158 12)(font "Arial" ))
(pt 0 8) (pt 0 8)
@ -238,11 +238,11 @@ applicable agreement for further details.
(line (pt 82 8)(pt 78 12)) (line (pt 82 8)(pt 78 12))
(line (pt 78 12)(pt 82 8)) (line (pt 78 12)(pt 82 8))
) )
(annotation_block (location)(rect 2024 128 2080 144)) (annotation_block (location)(rect 2040 2176 2096 2192))
) )
(pin (pin
(output) (output)
(rect 1840 144 2016 160) (rect 1856 2192 2032 2208)
(text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6))) (text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
(text "FPGA_LED_3" (rect 90 0 158 12)(font "Arial" )) (text "FPGA_LED_3" (rect 90 0 158 12)(font "Arial" ))
(pt 0 8) (pt 0 8)
@ -255,7 +255,7 @@ applicable agreement for further details.
(line (pt 82 8)(pt 78 12)) (line (pt 82 8)(pt 78 12))
(line (pt 78 12)(pt 82 8)) (line (pt 78 12)(pt 82 8))
) )
(annotation_block (location)(rect 2024 144 2080 160)) (annotation_block (location)(rect 2040 2192 2096 2208))
) )
(pin (pin
(output) (output)
@ -699,6 +699,40 @@ applicable agreement for further details.
) )
(annotation_block (location)(rect 2032 1952 2080 1968)) (annotation_block (location)(rect 2032 1952 2080 1968))
) )
(pin
(output)
(rect 1856 2208 2032 2224)
(text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
(text "FPGA_LED_4" (rect 90 0 158 12)(font "Arial" ))
(pt 0 8)
(drawing
(line (pt 0 8)(pt 52 8))
(line (pt 52 4)(pt 78 4))
(line (pt 52 12)(pt 78 12))
(line (pt 52 12)(pt 52 4))
(line (pt 78 4)(pt 82 8))
(line (pt 82 8)(pt 78 12))
(line (pt 78 12)(pt 82 8))
)
(annotation_block (location)(rect 2104 2192 2160 2208))
)
(pin
(output)
(rect 1856 2224 2032 2240)
(text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
(text "FPGA_LED_5" (rect 90 0 158 12)(font "Arial" ))
(pt 0 8)
(drawing
(line (pt 0 8)(pt 52 8))
(line (pt 52 4)(pt 78 4))
(line (pt 52 12)(pt 78 12))
(line (pt 52 12)(pt 52 4))
(line (pt 78 4)(pt 82 8))
(line (pt 82 8)(pt 78 12))
(line (pt 78 12)(pt 82 8))
)
(annotation_block (location)(rect 2104 2208 2160 2224))
)
(pin (pin
(bidir) (bidir)
(rect 1856 2104 2032 2120) (rect 1856 2104 2032 2120)
@ -923,7 +957,7 @@ applicable agreement for further details.
) )
) )
(symbol (symbol
(rect 704 208 936 336) (rect 640 208 872 336)
(text "DigitalFilterBlock" (rect 5 0 95 14)(font "Arial" (font_size 8))) (text "DigitalFilterBlock" (rect 5 0 95 14)(font "Arial" (font_size 8)))
(text "inst3" (rect 8 112 31 124)(font "Arial" )) (text "inst3" (rect 8 112 31 124)(font "Arial" ))
(port (port
@ -1052,7 +1086,7 @@ applicable agreement for further details.
) )
) )
(symbol (symbol
(rect 744 1480 872 1576) (rect 704 1480 832 1576)
(text "DigitalFilterBlock6" (rect 5 0 102 14)(font "Arial" (font_size 8))) (text "DigitalFilterBlock6" (rect 5 0 102 14)(font "Arial" (font_size 8)))
(text "inst17" (rect 8 80 37 92)(font "Arial" )) (text "inst17" (rect 8 80 37 92)(font "Arial" ))
(port (port
@ -1081,7 +1115,7 @@ applicable agreement for further details.
) )
) )
(symbol (symbol
(rect 896 1480 928 1496) (rect 920 1480 952 1496)
(text "VCC" (rect 7 0 27 10)(font "Arial" (font_size 6))) (text "VCC" (rect 7 0 27 10)(font "Arial" (font_size 6)))
(text "inst18" (rect 3 5 32 17)(font "Arial" )(invisible)) (text "inst18" (rect 3 5 32 17)(font "Arial" )(invisible))
(port (port
@ -2299,53 +2333,113 @@ applicable agreement for further details.
) )
(annotation_block (parameter)(rect 1032 1584 1344 1880)) (annotation_block (parameter)(rect 1032 1584 1344 1880))
) )
(connector (symbol
(pt 544 272) (rect 1048 2136 1376 2280)
(pt 704 272) (text "RAM9X8_TEST" (rect 5 0 78 12)(font "Arial" ))
) (text "inst24" (rect 8 128 37 140)(font "Arial" ))
(connector (port
(pt 544 288) (pt 0 32)
(pt 704 288) (input)
) (text "clk" (rect 0 0 14 12)(font "Arial" ))
(connector (text "clk" (rect 21 27 35 39)(font "Arial" ))
(pt 704 304) (line (pt 0 32)(pt 16 32))
(pt 544 304) )
(bus) (port
(pt 0 48)
(input)
(text "address[address_bus_width-1..0]" (rect 0 0 161 12)(font "Arial" ))
(text "address[address_bus_width-1..0]" (rect 21 43 182 55)(font "Arial" ))
(line (pt 0 48)(pt 16 48)(line_width 3))
)
(port
(pt 0 64)
(input)
(text "we" (rect 0 0 12 12)(font "Arial" ))
(text "we" (rect 21 59 33 71)(font "Arial" ))
(line (pt 0 64)(pt 16 64))
)
(port
(pt 0 80)
(input)
(text "oe" (rect 0 0 11 12)(font "Arial" ))
(text "oe" (rect 21 75 32 87)(font "Arial" ))
(line (pt 0 80)(pt 16 80))
)
(port
(pt 0 96)
(input)
(text "ce" (rect 0 0 11 12)(font "Arial" ))
(text "ce" (rect 21 91 32 103)(font "Arial" ))
(line (pt 0 96)(pt 16 96))
)
(port
(pt 0 112)
(input)
(text "er0_in" (rect 0 0 29 12)(font "Arial" ))
(text "er0_in" (rect 21 107 50 119)(font "Arial" ))
(line (pt 0 112)(pt 16 112))
)
(port
(pt 328 48)
(output)
(text "leds[3..0]" (rect 0 0 46 12)(font "Arial" ))
(text "leds[3..0]" (rect 269 43 315 55)(font "Arial" ))
(line (pt 328 48)(pt 312 48)(line_width 3))
)
(port
(pt 328 32)
(bidir)
(text "data[data_bus_width-1..0]" (rect 0 0 126 12)(font "Arial" ))
(text "data[data_bus_width-1..0]" (rect 208 27 334 39)(font "Arial" ))
(line (pt 328 32)(pt 312 32)(line_width 3))
)
(parameter
"REG_ADDR_TEST_LOWER_BYTE"
"72"
""
(type "PARAMETER_SIGNED_DEC") )
(parameter
"REG_ADDR_TEST_UPPER_BYTE"
"73"
""
(type "PARAMETER_SIGNED_DEC") )
(parameter
"REG_ADDR_LEDS_LOWER_BYTE"
"74"
""
(type "PARAMETER_SIGNED_DEC") )
(parameter
"REG_ADDR_LEDS_UPPER_BYTE"
"75"
""
(type "PARAMETER_SIGNED_DEC") )
(parameter
"DATA_BUS_WIDTH"
"8"
""
(type "PARAMETER_SIGNED_DEC") )
(parameter
"ADDRESS_BUS_WIDTH"
"9"
""
(type "PARAMETER_SIGNED_DEC") )
(drawing
(rectangle (rect 16 16 312 128))
)
(annotation_block (parameter)(rect 1032 2032 1328 2136))
) )
(connector (connector
(pt 1040 336) (pt 1040 336)
(pt 952 336) (pt 952 336)
) )
(connector
(pt 936 240)
(pt 952 240)
)
(connector
(pt 936 256)
(pt 968 256)
)
(connector (connector
(pt 1040 320) (pt 1040 320)
(pt 968 320) (pt 968 320)
) )
(connector
(pt 936 272)
(pt 984 272)
)
(connector (connector
(pt 1040 304) (pt 1040 304)
(pt 984 304) (pt 984 304)
) )
(connector
(pt 936 288)
(pt 1000 288)
(bus)
)
(connector
(pt 1000 288)
(pt 1040 288)
(bus)
)
(connector (connector
(pt 1040 576) (pt 1040 576)
(pt 608 576) (pt 608 576)
@ -2367,10 +2461,6 @@ applicable agreement for further details.
(pt 1040 640) (pt 1040 640)
(pt 952 640) (pt 952 640)
) )
(connector
(pt 704 256)
(pt 544 256)
)
(connector (connector
(pt 1368 608) (pt 1368 608)
(pt 1592 608) (pt 1592 608)
@ -2696,18 +2786,6 @@ applicable agreement for further details.
(pt 1000 592) (pt 1000 592)
(bus) (bus)
) )
(connector
(pt 984 272)
(pt 984 304)
)
(connector
(pt 968 256)
(pt 968 320)
)
(connector
(pt 952 240)
(pt 952 336)
)
(connector (connector
(text "addrDevice[3..0]" (rect 1378 -112 1460 -100)(font "Arial" )) (text "addrDevice[3..0]" (rect 1378 -112 1460 -100)(font "Arial" ))
(pt 1368 -96) (pt 1368 -96)
@ -2732,10 +2810,6 @@ applicable agreement for further details.
(pt 608 -112) (pt 608 -112)
(pt 608 -16) (pt 608 -16)
) )
(connector
(pt 1040 -32)
(pt 800 -32)
)
(connector (connector
(pt 544 -32) (pt 544 -32)
(pt 704 -32) (pt 704 -32)
@ -2791,26 +2865,14 @@ applicable agreement for further details.
(pt 984 -328) (pt 984 -328)
(pt 984 -80) (pt 984 -80)
) )
(connector
(pt 984 -80)
(pt 984 272)
)
(connector (connector
(pt 968 -312) (pt 968 -312)
(pt 968 -64) (pt 968 -64)
) )
(connector
(pt 968 -64)
(pt 968 256)
)
(connector (connector
(pt 952 -296) (pt 952 -296)
(pt 952 -48) (pt 952 -48)
) )
(connector
(pt 952 -48)
(pt 952 240)
)
(connector (connector
(pt 1368 -328) (pt 1368 -328)
(pt 1384 -328) (pt 1384 -328)
@ -2941,18 +3003,6 @@ applicable agreement for further details.
(pt 608 368) (pt 608 368)
(pt 608 408) (pt 608 408)
) )
(connector
(pt 704 240)
(pt 688 240)
)
(connector
(pt 688 192)
(pt 688 240)
)
(connector
(pt 1016 192)
(pt 688 192)
)
(connector (connector
(pt 1016 192) (pt 1016 192)
(pt 1016 -480) (pt 1016 -480)
@ -2981,21 +3031,11 @@ applicable agreement for further details.
(pt 576 -496) (pt 576 -496)
(pt 576 -480) (pt 576 -480)
) )
(connector
(pt 1856 2112)
(pt 1424 2112)
(bus)
)
(connector (connector
(pt 1368 272) (pt 1368 272)
(pt 1496 272) (pt 1496 272)
(bus) (bus)
) )
(connector
(pt 1496 272)
(pt 1496 1432)
(bus)
)
(connector (connector
(pt 608 1432) (pt 608 1432)
(pt 1048 1432) (pt 1048 1432)
@ -3013,14 +3053,6 @@ applicable agreement for further details.
(pt 968 1480) (pt 968 1480)
(pt 1048 1480) (pt 1048 1480)
) )
(connector
(pt 912 1528)
(pt 1048 1528)
)
(connector
(pt 912 1496)
(pt 912 1528)
)
(connector (connector
(pt 952 1496) (pt 952 1496)
(pt 1048 1496) (pt 1048 1496)
@ -3050,20 +3082,6 @@ applicable agreement for further details.
(pt 952 960) (pt 952 960)
(pt 952 1496) (pt 952 1496)
) )
(connector
(pt 608 1512)
(pt 744 1512)
)
(connector
(pt 536 1528)
(pt 744 1528)
(bus)
)
(connector
(pt 1048 1512)
(pt 872 1512)
(bus)
)
(connector (connector
(pt 1376 1448) (pt 1376 1448)
(pt 1848 1448) (pt 1848 1448)
@ -3074,23 +3092,6 @@ applicable agreement for further details.
(pt 1496 1432) (pt 1496 1432)
(bus) (bus)
) )
(connector
(pt 1000 2112)
(pt 1048 2112)
(bus)
)
(connector
(pt 984 2128)
(pt 1048 2128)
)
(connector
(pt 968 2144)
(pt 1048 2144)
)
(connector
(pt 952 2160)
(pt 1048 2160)
)
(connector (connector
(pt 1000 1928) (pt 1000 1928)
(pt 1048 1928) (pt 1048 1928)
@ -3120,6 +3121,159 @@ applicable agreement for further details.
(pt 608 1912) (pt 608 1912)
(pt 1048 1912) (pt 1048 1912)
) )
(connector
(pt 1496 2112)
(pt 1856 2112)
(bus)
)
(connector
(pt 1496 272)
(pt 1496 1432)
(bus)
)
(connector
(pt 608 1512)
(pt 704 1512)
)
(connector
(pt 536 1528)
(pt 704 1528)
(bus)
)
(connector
(pt 608 1432)
(pt 608 1512)
)
(connector
(pt 832 1512)
(pt 1048 1512)
(bus)
)
(connector
(pt 1016 192)
(pt 624 192)
)
(connector
(pt 544 256)
(pt 640 256)
)
(connector
(pt 544 272)
(pt 640 272)
)
(connector
(pt 544 288)
(pt 640 288)
)
(connector
(pt 544 304)
(pt 640 304)
(bus)
)
(connector
(pt 624 240)
(pt 640 240)
)
(connector
(pt 624 192)
(pt 624 240)
)
(connector
(pt 952 -48)
(pt 952 240)
)
(connector
(pt 952 240)
(pt 952 336)
)
(connector
(pt 968 -64)
(pt 968 256)
)
(connector
(pt 968 256)
(pt 968 320)
)
(connector
(pt 984 -80)
(pt 984 272)
)
(connector
(pt 984 272)
(pt 984 304)
)
(connector
(pt 1000 288)
(pt 1040 288)
(bus)
)
(connector
(pt 872 240)
(pt 952 240)
)
(connector
(pt 872 256)
(pt 968 256)
)
(connector
(pt 872 272)
(pt 984 272)
)
(connector
(pt 872 288)
(pt 1000 288)
(bus)
)
(connector
(pt 1048 1528)
(pt 936 1528)
)
(connector
(pt 936 1528)
(pt 936 1496)
)
(connector
(pt 1000 2184)
(pt 1048 2184)
(bus)
)
(connector
(pt 984 2200)
(pt 1048 2200)
)
(connector
(pt 968 2216)
(pt 1048 2216)
)
(connector
(pt 952 2232)
(pt 1048 2232)
)
(connector
(pt 1496 2168)
(pt 1376 2168)
(bus)
)
(connector
(pt 608 2168)
(pt 1048 2168)
)
(connector
(pt 904 -32)
(pt 904 2248)
)
(connector
(pt 904 2248)
(pt 1048 2248)
)
(connector
(pt 800 -32)
(pt 904 -32)
)
(connector
(pt 904 -32)
(pt 1040 -32)
)
(connector (connector
(pt 1000 1448) (pt 1000 1448)
(pt 1000 1928) (pt 1000 1928)
@ -3127,7 +3281,7 @@ applicable agreement for further details.
) )
(connector (connector
(pt 1000 1928) (pt 1000 1928)
(pt 1000 2112) (pt 1000 2184)
(bus) (bus)
) )
(connector (connector
@ -3136,7 +3290,7 @@ applicable agreement for further details.
) )
(connector (connector
(pt 984 1944) (pt 984 1944)
(pt 984 2128) (pt 984 2200)
) )
(connector (connector
(pt 968 1480) (pt 968 1480)
@ -3144,7 +3298,7 @@ applicable agreement for further details.
) )
(connector (connector
(pt 968 1960) (pt 968 1960)
(pt 968 2144) (pt 968 2216)
) )
(connector (connector
(pt 952 1496) (pt 952 1496)
@ -3152,16 +3306,67 @@ applicable agreement for further details.
) )
(connector (connector
(pt 952 1976) (pt 952 1976)
(pt 952 2160) (pt 952 2232)
) )
(connector (connector
(pt 608 1432) (pt 1496 1432)
(pt 608 1512) (pt 1496 2112)
(bus)
)
(connector
(pt 1496 2112)
(pt 1496 2168)
(bus)
) )
(connector (connector
(pt 608 1512) (pt 608 1512)
(pt 608 1912) (pt 608 1912)
) )
(connector
(pt 608 1912)
(pt 608 2168)
)
(connector
(text "leds[3..0]" (rect 1386 2168 1432 2180)(font "Arial" ))
(pt 1376 2184)
(pt 1784 2184)
(bus)
)
(connector
(text "leds[0]" (rect 1794 2168 1827 2180)(font "Arial" ))
(pt 1784 2184)
(pt 1856 2184)
)
(connector
(pt 1784 2184)
(pt 1784 2200)
(bus)
)
(connector
(text "leds[1]" (rect 1794 2184 1827 2196)(font "Arial" ))
(pt 1784 2200)
(pt 1856 2200)
)
(connector
(text "leds[2]" (rect 1794 2200 1827 2212)(font "Arial" ))
(pt 1784 2216)
(pt 1856 2216)
)
(connector
(pt 1784 2200)
(pt 1784 2216)
(bus)
)
(connector
(pt 1784 2216)
(pt 1784 2232)
(bus)
)
(connector
(text "leds[3]" (rect 1794 2216 1827 2228)(font "Arial" ))
(pt 1856 2232)
(pt 1784 2232)
)
(junction (pt 1000 288)) (junction (pt 1000 288))
(junction (pt 984 304)) (junction (pt 984 304))
(junction (pt 968 320)) (junction (pt 968 320))
@ -3213,3 +3418,10 @@ applicable agreement for further details.
(junction (pt 968 1480)) (junction (pt 968 1480))
(junction (pt 952 1496)) (junction (pt 952 1496))
(junction (pt 608 1512)) (junction (pt 608 1512))
(junction (pt 1496 1432))
(junction (pt 1496 2112))
(junction (pt 608 1912))
(junction (pt 904 -32))
(junction (pt 1784 2184))
(junction (pt 1784 2200))
(junction (pt 1784 2216))

View File

@ -313,4 +313,9 @@ set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HWPdatain[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HWPdatain[0] set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to HWPdatain[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to OBclk set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to OBclk
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to OBdata set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to OBdata
set_global_assignment -name VHDL_FILE RAM9X8_TEST.vhd
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FPGA_LED_4
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to FPGA_LED_5
set_location_assignment PIN_169 -to FPGA_LED_4
set_location_assignment PIN_171 -to FPGA_LED_5
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top

View File

@ -0,0 +1,116 @@
/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to occur.
*/
/*
Copyright (C) 1991-2013 Altera Corporation
Your use of Altera Corporation's design tools, logic functions
and other software and tools, and its AMPP partner logic
functions, and any output files from any of the foregoing
(including device programming or simulation files), and any
associated documentation or information are expressly subject
to the terms and conditions of the Altera Program License
Subscription Agreement, Altera MegaCore Function License
Agreement, or other applicable license agreement, including,
without limitation, that your use is for the sole purpose of
programming logic devices manufactured by Altera and sold by
Altera or its authorized distributors. Please refer to the
applicable agreement for further details.
*/
(header "symbol" (version "1.1"))
(symbol
(rect 16 16 344 160)
(text "RAM9X8_TEST" (rect 5 0 75 12)(font "Arial" ))
(text "inst" (rect 8 128 20 140)(font "Arial" ))
(port
(pt 0 32)
(input)
(text "clk" (rect 0 0 10 12)(font "Arial" ))
(text "clk" (rect 21 27 31 39)(font "Arial" ))
(line (pt 0 32)(pt 16 32)(line_width 1))
)
(port
(pt 0 48)
(input)
(text "address[address_bus_width-1..0]" (rect 0 0 129 12)(font "Arial" ))
(text "address[address_bus_width-1..0]" (rect 21 43 150 55)(font "Arial" ))
(line (pt 0 48)(pt 16 48)(line_width 3))
)
(port
(pt 0 64)
(input)
(text "we" (rect 0 0 10 12)(font "Arial" ))
(text "we" (rect 21 59 31 71)(font "Arial" ))
(line (pt 0 64)(pt 16 64)(line_width 1))
)
(port
(pt 0 80)
(input)
(text "oe" (rect 0 0 9 12)(font "Arial" ))
(text "oe" (rect 21 75 30 87)(font "Arial" ))
(line (pt 0 80)(pt 16 80)(line_width 1))
)
(port
(pt 0 96)
(input)
(text "ce" (rect 0 0 9 12)(font "Arial" ))
(text "ce" (rect 21 91 30 103)(font "Arial" ))
(line (pt 0 96)(pt 16 96)(line_width 1))
)
(port
(pt 0 112)
(input)
(text "er0_in" (rect 0 0 24 12)(font "Arial" ))
(text "er0_in" (rect 21 107 45 119)(font "Arial" ))
(line (pt 0 112)(pt 16 112)(line_width 1))
)
(port
(pt 328 48)
(output)
(text "leds[3..0]" (rect 0 0 35 12)(font "Arial" ))
(text "leds[3..0]" (rect 272 43 307 55)(font "Arial" ))
(line (pt 328 48)(pt 312 48)(line_width 3))
)
(port
(pt 328 32)
(bidir)
(text "data[data_bus_width-1..0]" (rect 0 0 99 12)(font "Arial" ))
(text "data[data_bus_width-1..0]" (rect 208 27 307 39)(font "Arial" ))
(line (pt 328 32)(pt 312 32)(line_width 3))
)
(parameter
"REG_ADDR_TEST_LOWER_BYTE"
"72"
""
(type "PARAMETER_SIGNED_DEC") )
(parameter
"REG_ADDR_TEST_UPPER_BYTE"
"73"
""
(type "PARAMETER_SIGNED_DEC") )
(parameter
"REG_ADDR_LEDS_LOWER_BYTE"
"74"
""
(type "PARAMETER_SIGNED_DEC") )
(parameter
"REG_ADDR_LEDS_UPPER_BYTE"
"75"
""
(type "PARAMETER_SIGNED_DEC") )
(parameter
"DATA_BUS_WIDTH"
"8"
""
(type "PARAMETER_SIGNED_DEC") )
(parameter
"ADDRESS_BUS_WIDTH"
"9"
""
(type "PARAMETER_SIGNED_DEC") )
(drawing
(rectangle (rect 16 16 312 128)(line_width 1))
)
(annotation_block (parameter)(rect 344 -64 444 16))
)

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@ -0,0 +1,84 @@
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity RAM9X8_TEST is
generic(
REG_ADDR_TEST_LOWER_BYTE : integer := 72;
REG_ADDR_TEST_UPPER_BYTE : integer := 73;
REG_ADDR_LEDS_LOWER_BYTE : integer := 74;
REG_ADDR_LEDS_UPPER_BYTE : integer := 75;
DATA_BUS_WIDTH : integer := 8;
ADDRESS_BUS_WIDTH : integer := 9
);
port(
clk : in std_logic;
data : inout std_logic_vector(DATA_BUS_WIDTH - 1 downto 0);
address : in std_logic_vector(ADDRESS_BUS_WIDTH - 1 downto 0);
we : in std_logic;
oe : in std_logic;
ce : in std_logic;
er0_in : in std_logic;
leds : out std_logic_vector(3 downto 0)
);
end entity;
architecture behavorial of RAM9X8_TEST is
signal ledsBuf : std_logic_vector(15 downto 0) := (others => '0');
begin
process (we, oe, ce)
variable addr : integer range 0 to 2**ADDRESS_BUS_WIDTH - 1 := 0;
begin
if (ce = '0') then -- Если микросхема выбрана
addr := conv_integer(address);
if (addr = REG_ADDR_TEST_UPPER_BYTE or addr = REG_ADDR_TEST_LOWER_BYTE) then
if (oe = '0' and we = '1') then -- Если сигнал чтения активен, а записи нет
case addr is
when REG_ADDR_TEST_UPPER_BYTE =>
data <= (others => '0');
when REG_ADDR_TEST_LOWER_BYTE =>
data(7 downto 1) <= (others => '0');
data(0) <= er0_in;
when REG_ADDR_LEDS_UPPER_BYTE =>
data <= ledsBuf(15 downto 8);
when REG_ADDR_LEDS_LOWER_BYTE =>
data <= ledsBuf(7 downto 0);
when others =>
data <= (others => 'Z'); -- Запретить запись на шину
end case;
elsif (oe = '1' and we = '0') then -- Если сигнал записи активен, а чтения нет
case addr is
when REG_ADDR_LEDS_UPPER_BYTE =>
ledsBuf(15 downto 8) <= data;
when REG_ADDR_LEDS_LOWER_BYTE =>
ledsBuf(7 downto 0) <= data;
when others =>
data <= (others => 'Z'); -- Запретить запись на шину
end case;
else
data <= (others => 'Z'); -- Запретить запись на шину
end if;
else
data <= (others => 'Z'); -- Запретить запись на шину
end if;
else
data <= (others => 'Z'); -- Запретить запись на шину
end if;
end process;
process(clk)
begin
if rising_edge(clk) then
leds <= ledsBuf(3 downto 0);
end if;
end process;
end behavorial;

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