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Razvalyaev
2025-11-18 14:16:20 +03:00
parent edac877616
commit 6882d6d014
21 changed files with 421 additions and 303 deletions
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89
MATLAB/MCU_STM32_Matlab/Drivers/STM32_SIMULINK/stm32_matlab_tim.c
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@@ -18,24 +18,33 @@ void TIM_Simulation(TIM_TypeDef *TIMx, struct TIM_Sim *TIMS)
// Выбор режима работы таймера
switch (TIMx->SMCR & TIM_SMCR_SMS) // TIMER MODE
{
// обычный счет
case(TIM_SLAVEMODE_DISABLE):// NORMAL MODE counting
TIMx_Count(TIMx, TIMS);
Channels_Simulation(TIMx, TIMS); // CaptureCompare and PWM channels simulation
Write_TRGO(TIMx, TIMS);
break;
switch (TIMx->SMCR & TIM_SMCR_SMS) // TIMER MODE
{
// обычный счет
case(TIM_SLAVEMODE_DISABLE):// NORMAL MODE counting
TIMx_Count(TIMx, TIMS);
Channels_Simulation(TIMx, TIMS); // CaptureCompare and PWM channels simulation
Write_TRGO(TIMx, TIMS);
break;
// включение слейв таймера по ивенту
case(TIM_SLAVEMODE_TRIGGER): // SLAVE MODE: TRIGGER MODE
Slave_Mode_Check_Source(TIMx, TIMS);
TIMx_Count(TIMx, TIMS);
Channels_Simulation(TIMx, TIMS); // CaptureCompare and PWM channels simulation
Write_TRGO(TIMx, TIMS);
break;
}
// включение слейв таймера по ивенту
case(TIM_SLAVEMODE_TRIGGER): // SLAVE MODE: TRIGGER MODE
Slave_Mode_Check_Source(TIMx, TIMS);
TIMx_Count(TIMx, TIMS);
Channels_Simulation(TIMx, TIMS); // CaptureCompare and PWM channels simulation
Write_TRGO(TIMx, TIMS);
break;
}
// EGR
TIM_EGR_Simulation(TIMx);
// Прерывание если какое-то выставлено
if (TIMx->SR & (TIM_SR_UIF | TIM_SR_CC1IF | TIM_SR_CC2IF | TIM_SR_CC3IF | TIM_SR_CC4IF))
{
TIM_Call_IRQHandller(TIMx); // call HANDLER
}
}
/* Счет таймера за один такт */
@@ -68,7 +77,9 @@ void Overflow_Check(TIM_TypeDef* TIMx, struct TIM_Sim* TIMS)
if(TIMS->tx_step > TIMS->RELOAD)
TIMS->tx_cnt = 0;
TIM_Call_IRQHandller(TIMx); // call HANDLER
if (TIMx->DIER & TIM_DIER_UIE) {
TIMx->SR |= TIM_SR_UIF;
}
}
}
}
@@ -134,12 +145,10 @@ void CC_PWM_Ch1_Simulation(TIM_TypeDef *TIMx, struct TIM_Sim *TIMS)
if (((TIMS->tx_cnt - TIMS->tx_step) < TIMx->CCR1) && (TIMS->tx_cnt >= TIMx->CCR1))
{
TIMx->SR |= TIM_SR_CC1IF;
TIM_Call_IRQHandller(TIMx);
}
else if (((TIMS->tx_cnt - TIMS->tx_step) > TIMx->CCR1) && (TIMS->tx_cnt <= TIMx->CCR1))
{
TIMx->SR |= TIM_SR_CC1IF;
TIM_Call_IRQHandller(TIMx);
}
}
}
@@ -188,12 +197,10 @@ void CC_PWM_Ch2_Simulation(TIM_TypeDef *TIMx, struct TIM_Sim *TIMS)
if (((TIMS->tx_cnt - TIMS->tx_step) < TIMx->CCR2) && (TIMS->tx_cnt >= TIMx->CCR2))
{
TIMx->SR |= TIM_SR_CC2IF;
TIM_Call_IRQHandller(TIMx);
}
else if (((TIMS->tx_cnt - TIMS->tx_step) > TIMx->CCR2) && (TIMS->tx_cnt <= TIMx->CCR2))
{
TIMx->SR |= TIM_SR_CC2IF;
TIM_Call_IRQHandller(TIMx);
}
}
}
@@ -242,12 +249,10 @@ void CC_PWM_Ch3_Simulation(TIM_TypeDef *TIMx, struct TIM_Sim *TIMS)
if (((TIMS->tx_cnt - TIMS->tx_step) < TIMx->CCR3) && (TIMS->tx_cnt >= TIMx->CCR3))
{
TIMx->SR |= TIM_SR_CC3IF;
TIM_Call_IRQHandller(TIMx);
}
else if (((TIMS->tx_cnt - TIMS->tx_step) > TIMx->CCR3) && (TIMS->tx_cnt <= TIMx->CCR3))
{
TIMx->SR |= TIM_SR_CC3IF;
TIM_Call_IRQHandller(TIMx);
}
}
}
@@ -296,12 +301,10 @@ void CC_PWM_Ch4_Simulation(TIM_TypeDef *TIMx, struct TIM_Sim *TIMS)
if (((TIMS->tx_cnt - TIMS->tx_step) < TIMx->CCR4) && (TIMS->tx_cnt >= TIMx->CCR4))
{
TIMx->SR |= TIM_SR_CC4IF;
TIM_Call_IRQHandller(TIMx);
}
else if (((TIMS->tx_cnt - TIMS->tx_step) > TIMx->CCR4) && (TIMS->tx_cnt <= TIMx->CCR4))
{
TIMx->SR |= TIM_SR_CC4IF;
TIM_Call_IRQHandller(TIMx);
}
}
}
@@ -456,6 +459,42 @@ void Write_TRGO(TIM_TypeDef* TIMx, struct TIM_Sim* TIMS)
//--------------------MISC (temporary) FUNCTIONS--------------------//
void TIM_EGR_Simulation(TIM_TypeDef* TIMx, struct TIM_Sim* TIMS)
{
// Update
if (TIMx->EGR & TIM_EGR_UG) {
TIMx->EGR &= ~TIM_EGR_UG;
if (TIMx->DIER & TIM_DIER_UIE) {
TIMx->SR |= TIM_SR_UIF;
}
}
// Channels
if (TIMx->EGR & TIM_EGR_CC1G) {
TIMx->EGR &= ~TIM_EGR_CC1G;
if (TIMx->DIER & TIM_IT_CC1) {
TIMx->SR |= TIM_SR_CC1IF;
}
}
if (TIMx->EGR & TIM_EGR_CC2G) {
TIMx->EGR &= ~TIM_EGR_CC2G;
if (TIMx->DIER & TIM_IT_CC2) {
TIMx->SR |= TIM_SR_CC2IF;
}
}
if (TIMx->EGR & TIM_EGR_CC3G) {
TIMx->EGR &= ~TIM_EGR_CC3G;
if (TIMx->DIER & TIM_IT_CC3) {
TIMx->SR |= TIM_SR_CC3IF;
}
}
if (TIMx->EGR & TIM_EGR_CC4G) {
TIMx->EGR &= ~TIM_EGR_CC4G;
if (TIMx->DIER & TIM_IT_CC4) {
TIMx->SR |= TIM_SR_CC4IF;
}
}
}
/* Определение источника для запуска таймера в SLAVE MODE */
void Slave_Mode_Check_Source(TIM_TypeDef* TIMx, struct TIM_Sim* TIMS)
{

2
MATLAB/MCU_STM32_Matlab/Drivers/STM32_SIMULINK/stm32_matlab_tim.h
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@@ -108,6 +108,8 @@ void Write_TRGO(TIM_TypeDef* TIMx, struct TIM_Sim* TIMS);
//--------------------MISC (temporary) FUNCTIONS--------------------//
void TIM_Call_IRQHandller(TIM_TypeDef* TIMx);
/* Определение источника для запуска таймера в SLAVE MODE */
void Slave_Mode_Check_Source(TIM_TypeDef* TIMx, struct TIM_Sim* TIMS);
//------------------------------------------------------------------//

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MATLAB/upp_r2023.slx
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