фикс прошивки под c3
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@@ -5,6 +5,7 @@
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// ------------------------- Hardware configuration -------------------------
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// ------------------------- Hardware configuration -------------------------
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// Enabled for the hand-wired prototype. Comment out for the production PCB.
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// Enabled for the hand-wired prototype. Comment out for the production PCB.
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// Both profiles map S3 signals by physical header position with 5V/GND aligned.
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// Both profiles map S3 signals by physical header position with 5V/GND aligned.
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//#define MAKETKA
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//#define MAKETKA
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// Select exactly one populated receiver circuit. Use
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// Select exactly one populated receiver circuit. Use
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@@ -12,7 +13,7 @@
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#define BOARD_RX_INTERFACE_ADC 1
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#define BOARD_RX_INTERFACE_ADC 1
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#define BOARD_RX_INTERFACE_DIGITAL 2
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#define BOARD_RX_INTERFACE_DIGITAL 2
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#ifndef BOARD_RX_INTERFACE
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#ifndef BOARD_RX_INTERFACE
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#define BOARD_RX_INTERFACE BOARD_RX_INTERFACE_DIGITAL
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#define BOARD_RX_INTERFACE BOARD_RX_INTERFACE_ADC
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#endif
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#endif
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#if BOARD_RX_INTERFACE != BOARD_RX_INTERFACE_ADC && \
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#if BOARD_RX_INTERFACE != BOARD_RX_INTERFACE_ADC && \
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@@ -10,15 +10,26 @@
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#include <esp32-hal-cpu.h>
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#include <esp32-hal-cpu.h>
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#include <soc/gpio_struct.h>
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#include <soc/gpio_struct.h>
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#include <string.h>
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#include <string.h>
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#if CONFIG_IDF_TARGET_ESP32C3
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#include <riscv/rv_utils.h>
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#endif
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static inline uint32_t IRAM_ATTR maskAllInterrupts() {
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static inline uint32_t IRAM_ATTR maskAllInterrupts() {
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#if CONFIG_IDF_TARGET_ESP32C3
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return RV_CLEAR_CSR(mstatus, MSTATUS_MIE);
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#else
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uint32_t state;
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uint32_t state;
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asm volatile("rsil %0, 15" : "=a"(state) :: "memory");
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asm volatile("rsil %0, 15" : "=a"(state) :: "memory");
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return state;
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return state;
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#endif
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}
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}
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static inline void IRAM_ATTR restoreInterrupts(uint32_t state) {
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static inline void IRAM_ATTR restoreInterrupts(uint32_t state) {
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#if CONFIG_IDF_TARGET_ESP32C3
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RV_SET_CSR(mstatus, state & MSTATUS_MIE);
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#else
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asm volatile("wsr %0, ps\nrsync" :: "a"(state) : "memory");
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asm volatile("wsr %0, ps\nrsync" :: "a"(state) : "memory");
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#endif
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}
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}
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void DriverEdgeStats::reset() {
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void DriverEdgeStats::reset() {
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@@ -193,7 +204,7 @@ void IRAM_ATTR DriverTest::pollTaskLoop() {
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constexpr uint32_t PIN_MASK = (1UL << GPIO_PWM) | (1UL << GPIO_RX);
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constexpr uint32_t PIN_MASK = (1UL << GPIO_PWM) | (1UL << GPIO_RX);
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for (;;) {
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for (;;) {
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ulTaskNotifyTake(pdTRUE, portMAX_DELAY);
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ulTaskNotifyTake(pdTRUE, portMAX_DELAY);
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uint32_t levels = GPIO.in & PIN_MASK;
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uint32_t levels = GPIO.in.val & PIN_MASK;
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uint32_t nextStart = 0;
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uint32_t nextStart = 0;
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uint32_t windowEnd = 0;
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uint32_t windowEnd = 0;
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uint32_t lastTxStart = 0;
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uint32_t lastTxStart = 0;
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@@ -205,7 +216,7 @@ void IRAM_ATTR DriverTest::pollTaskLoop() {
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uint32_t interruptState = 0;
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uint32_t interruptState = 0;
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auto sampleOnce = [&]() {
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auto sampleOnce = [&]() {
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const uint32_t current = GPIO.in & PIN_MASK;
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const uint32_t current = GPIO.in.val & PIN_MASK;
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if (current == levels) return;
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if (current == levels) return;
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const uint32_t now = esp_cpu_get_cycle_count();
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const uint32_t now = esp_cpu_get_cycle_count();
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const uint32_t changed = current ^ levels;
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const uint32_t changed = current ^ levels;
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@@ -636,8 +647,7 @@ void IRAM_ATTR DriverTest::recordRaw(uint32_t tick, bool rising,
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return;
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return;
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}
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}
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ring_[write] = {tick, rising, source};
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ring_[write] = {tick, rising, source};
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asm volatile("memw" ::: "memory");
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__atomic_store_n(&ringWrite_, next, __ATOMIC_RELEASE);
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ringWrite_ = next;
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}
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}
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size_t DriverTest::readRaw(TimedEvent *events, size_t capacity,
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size_t DriverTest::readRaw(TimedEvent *events, size_t capacity,
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