diff --git a/OpticalChannelTester/Config.h b/OpticalChannelTester/Config.h index 244b9ac..82d53de 100644 --- a/OpticalChannelTester/Config.h +++ b/OpticalChannelTester/Config.h @@ -5,6 +5,7 @@ // ------------------------- Hardware configuration ------------------------- // Enabled for the hand-wired prototype. Comment out for the production PCB. // Both profiles map S3 signals by physical header position with 5V/GND aligned. + //#define MAKETKA // Select exactly one populated receiver circuit. Use @@ -12,7 +13,7 @@ #define BOARD_RX_INTERFACE_ADC 1 #define BOARD_RX_INTERFACE_DIGITAL 2 #ifndef BOARD_RX_INTERFACE -#define BOARD_RX_INTERFACE BOARD_RX_INTERFACE_DIGITAL +#define BOARD_RX_INTERFACE BOARD_RX_INTERFACE_ADC #endif #if BOARD_RX_INTERFACE != BOARD_RX_INTERFACE_ADC && \ diff --git a/OpticalChannelTester/DriverTest.cpp b/OpticalChannelTester/DriverTest.cpp index 0d46b83..583635e 100644 --- a/OpticalChannelTester/DriverTest.cpp +++ b/OpticalChannelTester/DriverTest.cpp @@ -10,15 +10,26 @@ #include #include #include +#if CONFIG_IDF_TARGET_ESP32C3 +#include +#endif static inline uint32_t IRAM_ATTR maskAllInterrupts() { +#if CONFIG_IDF_TARGET_ESP32C3 + return RV_CLEAR_CSR(mstatus, MSTATUS_MIE); +#else uint32_t state; asm volatile("rsil %0, 15" : "=a"(state) :: "memory"); return state; +#endif } static inline void IRAM_ATTR restoreInterrupts(uint32_t state) { +#if CONFIG_IDF_TARGET_ESP32C3 + RV_SET_CSR(mstatus, state & MSTATUS_MIE); +#else asm volatile("wsr %0, ps\nrsync" :: "a"(state) : "memory"); +#endif } void DriverEdgeStats::reset() { @@ -193,7 +204,7 @@ void IRAM_ATTR DriverTest::pollTaskLoop() { constexpr uint32_t PIN_MASK = (1UL << GPIO_PWM) | (1UL << GPIO_RX); for (;;) { ulTaskNotifyTake(pdTRUE, portMAX_DELAY); - uint32_t levels = GPIO.in & PIN_MASK; + uint32_t levels = GPIO.in.val & PIN_MASK; uint32_t nextStart = 0; uint32_t windowEnd = 0; uint32_t lastTxStart = 0; @@ -205,7 +216,7 @@ void IRAM_ATTR DriverTest::pollTaskLoop() { uint32_t interruptState = 0; auto sampleOnce = [&]() { - const uint32_t current = GPIO.in & PIN_MASK; + const uint32_t current = GPIO.in.val & PIN_MASK; if (current == levels) return; const uint32_t now = esp_cpu_get_cycle_count(); const uint32_t changed = current ^ levels; @@ -636,8 +647,7 @@ void IRAM_ATTR DriverTest::recordRaw(uint32_t tick, bool rising, return; } ring_[write] = {tick, rising, source}; - asm volatile("memw" ::: "memory"); - ringWrite_ = next; + __atomic_store_n(&ringWrite_, next, __ATOMIC_RELEASE); } size_t DriverTest::readRaw(TimedEvent *events, size_t capacity, diff --git a/PCB/OptoTest.PcbDoc b/PCB/OptoTest.PcbDoc index ab9aaa2..a5c0e51 100644 Binary files a/PCB/OptoTest.PcbDoc and b/PCB/OptoTest.PcbDoc differ diff --git a/PCB/OptoTest.SchDoc b/PCB/OptoTest.SchDoc index fbedecc..fbc66d7 100644 Binary files a/PCB/OptoTest.SchDoc and b/PCB/OptoTest.SchDoc differ