483 lines
11 KiB
C
483 lines
11 KiB
C
/**************************************************************************
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Description: Âñÿêèå ðàçíûå ïåðåêëþ÷àòåëè è óñòàâêè.
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Àâòîð: Óëèòîâñêèé Ä.È.
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Äàòà ïîñëåäíåãî îáíîâëåíèÿ: 2021.11.08
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**************************************************************************/
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#ifndef DEF
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#define DEF
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// ðàñêîììåíòèðîâàòü, åñëè åñòü ñäâèã ìåæäó îáìîòêàìè ÃÝÄ (30 ãðàä.)
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#define SHIFT
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// ðåæèìû ðàáîòû (äëÿ state)
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#define STATE_SHUTDOWN 0 //àâàðèéíàÿ îñòàíîâêà
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#define STATE_STOP 1 //øòàòíàÿ îñòàíîâêà
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#define STATE_WORK 2 //ðàáîòà
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// ÷àñòîòà òàêòîâûõ èìïóëüñîâ ïðîöåññîðà, Ãö
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#define FSYSCLKOUT 200e6 //150e6 //
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// prescaled version of the system clock and is used by
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// all submodules within the ePWM, Ãö
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// (ñì. EPwmxRegs.TBCTL.bit.CLKDIV è EPwmxRegs.TBCTL.bit.HSPCLKDIV)
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#define FTBCLK (FSYSCLKOUT*0.5*0.5)
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//#define FTBCLK (FSYSCLKOUT*0.5*0.5*0.5*0.5)
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// ïåðèîä ØÈÌ, c
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#define T_PWM 2220e-6 //F_PWM = 450 Ãö
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//#define T_PWM 6000e-6 //F_PWM = 166.7 Ãö
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// ïåðèîä âûçîâà îñíîâíîé ïðîãðàììû, ñ
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#define TY (T_PWM*0.5)
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// "ìåðòâîå âðåìÿ", ñ
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#define DT 30e-6
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//#define DT 60e-6
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// Time-Base Period Register, åä. ñ÷¸ò÷èêà òàéìåðà
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#define T1_PRD (FTBCLK*T_PWM*0.5)
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// ìàêñèìàëüíîå çíà÷åíèå àìïëèòóäû íàïðÿæåíèÿ óïðàâëåíèÿ óñòàíàâëèâàåì òàê,
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// ÷òîáû ìèíèìàëüíàÿ øèðèíà èìïóëüñà áûëà 10 ìêñ, åä. ñ÷¸ò÷èêà òàéìåðà
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#define Y_LIM (T1_PRD - (DT + 10e-6)*FTBCLK)
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// êîíñòàíòû äëÿ âû÷èñëåíèÿ âñÿêîãî
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#define PI2 6.283185307179586476925286766559 //pi*2
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#define SQRT2 1.4142135623730950488016887242097 //sqrt(2)
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#define SQRT3 1.7320508075688772935274463415059 //sqrt(3)
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#define ISQRT3 0.57735026918962576450914878050196 //1./sqrt(3)
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// Íîìèíàëüíûå âåëè÷èíû ÃÝÄ
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// ... ìîùíîñòü íà âàëó, Âò
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#define P_NOM (5000e3*2.)
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// ... ëèíåéíîå íàïðÿæåíèå, Â (ampl)
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#define U_NOM (3000.*SQRT2)
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// ... ìåõàíè÷åñêàÿ ñêîðîñòü, îá/ìèí
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#define N_NOM 165.
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// ... ÷èñëî ïàð ïîëþñîâ
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#define PP 6.
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// ... êîýôôèöèåíò ìîùíîñòè
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#define COS_FI 0.89
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// ... ÊÏÄ
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#define EFF 0.962
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// ... ïðèâåäåííûé ê âàëó ìîìåíò èíåðöèè, êã*ì^2
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#define J (87e3*0.50)
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// ... ïîëíàÿ ìîùíîñòü, ÂÀ
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#define S_NOM (P_NOM/(COS_FI*EFF))
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// ... ìåõàíè÷åñêàÿ ñêîðîñòü, ðàä/ñ
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#define WM_NOM (N_NOM/60.*PI2)
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// ... ìîìåíò íà âàëó, Í*ì
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#define M_NOM (P_NOM/WM_NOM)
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// Áàçîâûå âåëè÷èíû ÃÝÄ
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// ... ïîëíàÿ ìîùíîñòü, BA
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#define S_BAZ S_NOM
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// ... ëèíåéíîå íàïðÿæåíèå, Â (ampl)
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#define U_BAZ U_NOM
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// ... ôàçíûé òîê, À (ampl)
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#define I_BAZ (S_BAZ*2./(U_BAZ*SQRT3)*0.5) //0.5 - ò.ê. îáìîòîê äâå
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// ... ìåõàíè÷åñêàÿ ñêîðîñòü, îá/ìèí
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#define N_BAZ N_NOM
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// ... ìåõàíè÷åñêàÿ ñêîðîñòü, ðàä/ñ
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#define WM_BAZ (N_BAZ/60.*PI2)
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// ... ýëåêòðè÷åñêàÿ ñêîðîñòü, ðàä/ñ
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#define WE_BAZ (WM_BAZ*PP)
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// ... ìîìåíò íà âàëó, Í*ì
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#define M_BAZ (S_BAZ/WM_BAZ)
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// ... ïîòîêîñöåïëåíèå ñòàòîðà, Âá
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#define PSI_BAZ (U_BAZ/(WE_BAZ*SQRT3))
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// ... èíäóêòèâíîñòü, Ãí
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#define L_BAZ (PSI_BAZ/I_BAZ)
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// ... ñîïðîòèâëåíèå, Îì
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#define R_BAZ (U_BAZ/(I_BAZ*SQRT3))
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// äëÿ ïåðåñ÷¸òà èç àìïëèòóäû ôàçíîãî íàïðÿæåíèÿ â åäèíèöû ñèãíàëà óïðàâëåíèÿ
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#define U_2_Y (T1_PRD*SQRT3/U_BAZ)
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// íàïðÿæåíèå â çâåíå ïîñò. òîêà, êîòîðîå äàëî áû íà âûõîäå ÀÖÏ çíà÷. 2048, Â
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#define UDC_SENS_MAX (U_BAZ*1.15*1.3)
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// âûõîäíîé òîê, êîòîðûé äàë áû íà âûõîäå ÀÖÏ çíà÷. 2048, À (ampl)
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#define IAC_SENS_MAX (I_BAZ*1.5)
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// number of pulses per rev. (from tacho, Hall, optical sensor...etc)
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#define NOP 1024.
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// ïðèðàùåíèå ñ÷¸ò÷èêà QEP çà TY ñåê. ïðè ÷àñòîòå âðàù. WM_BAZ
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#define QEP_CNT_DEL_NOM (NOP*4.*TY*WM_BAZ/PI2)
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// êîýôôèöèåíòû äëÿ ïåðåâîäà èçìåðåííûõ âåëè÷èí â o.e.
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#define GAIN_UDC (UDC_SENS_MAX/(2048.*U_BAZ))
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#define GAIN_IAC (IAC_SENS_MAX/(2048.*I_BAZ))
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#define GAIN_WM (1.0/QEP_CNT_DEL_NOM)
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// ìèíèìàëüíàÿ ñêîðîñòü äëÿ ïåðåñ÷¸òà ìîùíîñòè â òîê, o.e.
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#define WM_MIN 0.03 //0.003 //?
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// äëÿ ïðîðåæèâàíèÿ ðåãóëÿòîðîâ ïîòîêà, ñêîðîñòè è ìîùíîñòè
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#define DECIM_PSI_WM_PM 2. //1. //5. //?
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// for specify the PLL
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#define PLLSTS_DIVSEL 2
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#define PLLCR_DIV 10
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// äëÿ âûâîäà
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#define CONTROLLER_BIAS 3.2
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#define CONTROLLER_GAIN 2500.
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// îáùåå êîëè÷åñòâî ïàðàìåòðîâ
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#define PAR_NUMBER 400
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// íîìåð ïåðâîãî ðåäàêòèðóåìîãî ïàðàìåòðà
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#define FIRST_WRITE_PAR_NUM 150
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// Äèñêðåòíûå âõîäû/âûõîäû (begin)
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//-------------------------------------------------------------------------
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// âõîäû
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// ----------------------------
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#define DI_24V_SOURCE_FAULT GpioDataRegs.GPBDAT.bit.GPIO50
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// âûõîäû
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// ----------------------------
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// ... ðàçíîå
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#define DO_GPIO00_SET GpioDataRegs.GPASET.bit.GPIO0 = 1
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#define DO_GPIO00_CLEAR GpioDataRegs.GPACLEAR.bit.GPIO0 = 1
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#define DO_GPIO01_SET GpioDataRegs.GPASET.bit.GPIO1 = 1
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#define DO_GPIO01_CLEAR GpioDataRegs.GPACLEAR.bit.GPIO1 = 1
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#define DO_GPIO02_SET GpioDataRegs.GPASET.bit.GPIO2 = 1
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#define DO_GPIO02_CLEAR GpioDataRegs.GPACLEAR.bit.GPIO2 = 1
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#define DO_GPIO03_SET GpioDataRegs.GPASET.bit.GPIO3 = 1
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#define DO_GPIO03_CLEAR GpioDataRegs.GPACLEAR.bit.GPIO3 = 1
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#define DO_GPIO04_SET GpioDataRegs.GPASET.bit.GPIO4 = 1
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#define DO_GPIO04_CLEAR GpioDataRegs.GPACLEAR.bit.GPIO4 = 1
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#define DO_GPIO05_SET GpioDataRegs.GPASET.bit.GPIO5 = 1
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#define DO_GPIO05_CLEAR GpioDataRegs.GPACLEAR.bit.GPIO5 = 1
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#define DO_GPIO06_SET GpioDataRegs.GPASET.bit.GPIO6 = 1
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#define DO_GPIO06_CLEAR GpioDataRegs.GPACLEAR.bit.GPIO6 = 1
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#define DO_GPIO07_SET GpioDataRegs.GPASET.bit.GPIO7 = 1
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#define DO_GPIO07_CLEAR GpioDataRegs.GPACLEAR.bit.GPIO7 = 1
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#define DO_GPIO08_SET GpioDataRegs.GPASET.bit.GPIO8 = 1
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#define DO_GPIO08_CLEAR GpioDataRegs.GPACLEAR.bit.GPIO8 = 1
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#define DO_GPIO09_SET GpioDataRegs.GPASET.bit.GPIO9 = 1
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#define DO_GPIO09_CLEAR GpioDataRegs.GPACLEAR.bit.GPIO9 = 1
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#define DO_GPIO10_SET GpioDataRegs.GPASET.bit.GPIO10 = 1
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#define DO_GPIO10_CLEAR GpioDataRegs.GPACLEAR.bit.GPIO10 = 1
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#define DO_GPIO11_SET GpioDataRegs.GPASET.bit.GPIO11 = 1
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#define DO_GPIO11_CLEAR GpioDataRegs.GPACLEAR.bit.GPIO11 = 1
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// ... íå èñïîëüçóþòñÿ
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#define DO_GPIO019_SET GpioDataRegs.GPASET.bit.GPIO19 = 1
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#define DO_GPIO019_CLEAR GpioDataRegs.GPACLEAR.bit.GPIO19 = 1
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#define DO_GPIO020_SET GpioDataRegs.GPASET.bit.GPIO20 = 1
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#define DO_GPIO020_CLEAR GpioDataRegs.GPACLEAR.bit.GPIO20 = 1
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#define DO_GPIO022_SET GpioDataRegs.GPASET.bit.GPIO22 = 1
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#define DO_GPIO022_CLEAR GpioDataRegs.GPACLEAR.bit.GPIO22 = 1
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#define DO_GPIO48_SET GpioDataRegs.GPBSET.bit.GPIO48 = 1
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#define DO_GPIO48_CLEAR GpioDataRegs.GPBCLEAR.bit.GPIO48 = 1
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#define DO_GPIO49_SET GpioDataRegs.GPBSET.bit.GPIO49 = 1
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#define DO_GPIO49_CLEAR GpioDataRegs.GPBCLEAR.bit.GPIO49 = 1
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// ... äëÿ óïðàâëåíèÿ íîæêîé CS EEPROM
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#define CS_SET GpioDataRegs.GPBSET.bit.GPIO57 = 1
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#define CS_CLEAR GpioDataRegs.GPBCLEAR.bit.GPIO57 = 1
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// ... ñâåòîäèîäû
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// (çåë¸íûé "Ãîòîâíîñòü")
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#define LED_GREEN1_ON GpioDataRegs.GPBCLEAR.bit.GPIO59 = 1
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#define LED_GREEN1_OFF GpioDataRegs.GPBSET.bit.GPIO59 = 1
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#define LED_GREEN1_TOGGLE GpioDataRegs.GPBTOGGLE.bit.GPIO59 = 1
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// (çåë¸íûé "Ðàáîòà")
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#define LED_GREEN2_ON GpioDataRegs.GPBCLEAR.bit.GPIO60 = 1
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#define LED_GREEN2_OFF GpioDataRegs.GPBSET.bit.GPIO60 = 1
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#define LED_GREEN2_TOGGLE GpioDataRegs.GPBTOGGLE.bit.GPIO60 = 1
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// (êðàñíûé "Àâàðèÿ")
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#define LED_RED_ON GpioDataRegs.GPBCLEAR.bit.GPIO61 = 1
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#define LED_RED_OFF GpioDataRegs.GPBSET.bit.GPIO61 = 1
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#define LED_RED_TOGGLE GpioDataRegs.GPBTOGGLE.bit.GPIO61 = 1
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// ... íå èñïîëüçóåòñÿ
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#define DO_GPIO63_SET GpioDataRegs.GPBSET.bit.GPIO63 = 1
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#define DO_GPIO63_CLEAR GpioDataRegs.GPBCLEAR.bit.GPIO63 = 1
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//-------------------------------------------------------------------------
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// Äèñêðåòíûå âõîäû/âûõîäû (end)
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#include "DSP2833x_Device.h"
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#include "math.h"
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#include "C28x_FPU_FastRTS.h"
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// ñòðóêòóðà äëÿ ðåãóëÿòîðîâ òîêà (ñì. control_current())
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struct Cc {
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short once;
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float KpOrig;
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float KiOrig;
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float Kp;
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float Ki;
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float K1;
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float K2;
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float K3;
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float Xyff;
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float yffAux2;
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float yffAux3;
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float del;
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float kYlim;
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float yd1P;
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float yd1I;
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float yd1FF;
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float yd1;
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float yq1P;
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float yq1I;
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float yq1FF;
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float yq1;
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float y1;
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float yd2P;
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float yd2I;
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float yd2FF;
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float yd2;
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float yq2P;
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float yq2I;
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float yq2FF;
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float yq2;
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float y2;
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short y1LimFlag;
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short y2LimFlag;
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}; //Cc
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// ñòðóêòóðà äëÿ ðåãóëÿòîðà ïîòîêà (ñì. control_flux())
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struct Cf {
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short once;
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float KpOrig;
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float KiOrig;
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float Kp;
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float Ki;
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float IdLim;
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float IdLimNeg;
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float del;
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float idP;
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float idI;
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float idFF;
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short idLimFlag;
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}; //Cf
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// ñòðóêòóðà äëÿ ðåãóëÿòîðîâ ñêîðîñòè è ìîùíîñòè (ñì. control_speed_power())
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struct Csp {
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short once;
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float KpOrig;
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float KiOrig;
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float Kp;
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float Ki;
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float kMeNom;
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float del;
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float iqP;
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float iqI;
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float iqFF;
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float IlimIncr;
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float iqLimAux;
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float iqLimZi;
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float IqLim;
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float IqLimNeg;
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float iqLim;
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float iqLimNeg;
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float delWmAbs;
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float KizIncr;
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float pmZiRampDown;
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float wmLimZi;
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float pmLimZi;
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short iqLimFlag;
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}; //Csp
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// ñòðóêòóðà äëÿ çàïèñè â EEPROM âñÿêîãî
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struct Eprom {
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short writeRequestNumber;
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short readFaultNo;
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}; //Eprom
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// ñòðóêòóðà äëÿ çàïîìèíàíèÿ âåëè÷èí â ìîìåíò ñðàáàòûâàíèÿ çàùèòû
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struct Emerg {
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float udc1;
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float udc2;
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float iac1;
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float iac2;
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float me;
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float wm;
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float pm;
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}; //Emerg
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// ñòðóêòóðà äëÿ inverse park (ñì. ipark())
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struct Ip {
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float yx1Aux;
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float yy1Aux;
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float yx2Aux;
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float yy2Aux;
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float theta;
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float sinTheta;
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float cosTheta;
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float yx1;
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float yy1;
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float yx2;
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float yy2;
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}; //Ip
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// ñòðóêòóðà äëÿ indirect vector control (ñì. indirect_vector_control())
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struct Ivc {
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short once;
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float im;
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float wr;
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float wsNf;
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float ws;
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float sinTheta;
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float cosTheta;
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float id1;
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float iq1;
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float psi;
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float id2;
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float iq2;
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}; //Ivc
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// ñòðóêòóðà äëÿ äàííûõ, ïîëó÷åííûõ ñ ÂÓ
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struct Mst {
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short pzMode;
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short faultReset;
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short start;
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float wmZz;
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float pmZz;
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float wmLim;
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float pmLim;
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float pIncrMaxTy;
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float pDecrMaxTy;
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}; //Mst
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// ñòðóêòóðà äëÿ ñìåùåíèé íóëÿ äàò÷èêîâ
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struct Offset {
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short Udc1;
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short Udc2;
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short Ic1;
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short Ic2;
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short Ia1;
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short Ia2;
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short Ib1;
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short Ib2;
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}; //Offset
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// ñòðóêòóðà äëÿ âûâîäà
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struct Out {
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float K;
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float udc1;
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float udc2;
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float iac1;
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float iac2;
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float me;
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float wm;
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float pm;
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}; //Out
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// ñòðóêòóðà äëÿ çàùèò
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struct Protect {
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short IacMax;
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short IacMin;
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unsigned short Tdi24VSource;
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volatile unsigned short tDI24VSource;
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unsigned short TudcMin;
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volatile unsigned short tUdc1Min;
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volatile unsigned short tUdc2Min;
|
|
unsigned short TwmMax;
|
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volatile unsigned short tWmMax;
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float UdcMin;
|
|
float UdcMax;
|
|
float WmMax;
|
|
}; //Protect
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|
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|
|
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// ñòðóêòóðà äëÿ ðåçóëüòàòîâ ÀÖÏ
|
|
struct Result {
|
|
short udc1;
|
|
short udc2;
|
|
short ic1;
|
|
short ic2;
|
|
short ia1;
|
|
short ia2;
|
|
short ib1;
|
|
short ib2;
|
|
}; //Result
|
|
|
|
|
|
// ñòðóêòóðà äëÿ çàäàííîãî ïîòîêà (ñì. reference_flux())
|
|
struct Rf {
|
|
short once;
|
|
float PsiZ;
|
|
float PsizIncr;
|
|
float psiZi;
|
|
float psiZCorr;
|
|
float psiSub;
|
|
float psiZCorr2;
|
|
float psiZ;
|
|
float KpsiSub;
|
|
float Kpsiz;
|
|
float WmNomPsi;
|
|
float YlimPsi;
|
|
float pPsiZ;
|
|
float psiZPrev1;
|
|
float psiZPrev2;
|
|
float psiZPrev3;
|
|
}; //Rf
|
|
|
|
|
|
// ñòðóêòóðà äëÿ çàäàííîé ìîùíîñòè (ñì. reference_power())
|
|
struct Rp {
|
|
short once;
|
|
float pmZz;
|
|
float pmZi;
|
|
float pmZ;
|
|
float Kpmz;
|
|
float PlimIncr;
|
|
float KpIncrDecr;
|
|
volatile float pmEqv;
|
|
}; //Rp
|
|
|
|
|
|
// ñòðóêòóðà äëÿ çàäàííîé ñêîðîñòè (ñì. reference_speed())
|
|
struct Rs {
|
|
short once;
|
|
float wmZz;
|
|
float wmZi;
|
|
float wmZ;
|
|
float Kwmz;
|
|
float WlimIncr;
|
|
float wzIncrNf;
|
|
float wzIncr;
|
|
float pWmZ;
|
|
float wmZPrev1;
|
|
float wmZPrev2;
|
|
float wmZPrev3;
|
|
short tPwmZ;
|
|
}; //Rs
|
|
|
|
|
|
// ñòðóêòóðà äëÿ ïàðàìåòðîâ ÃÝÄ
|
|
struct SgmPar {
|
|
float Rs;
|
|
float Lls;
|
|
float Rr;
|
|
float Llr;
|
|
float Lm;
|
|
float Ls;
|
|
float Lr;
|
|
float SigmaLs;
|
|
float LmInv;
|
|
float LrInv;
|
|
float Tr;
|
|
float TrInv;
|
|
float Kl;
|
|
float KlInv;
|
|
}; //SgmPar
|
|
|
|
#endif //DEF
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