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Razvalyaev 2024-12-27 10:50:32 +03:00
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25
.gitignore vendored Normal file
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/.vs/Inu_im_2wnd_3lvl_23550/v16/.suo
/.vs/Inu_im_2wnd_3lvl_23550/v16/Browse.VC.db
/.vs/Inu_im_2wnd_3lvl_23550/v16/Browse.VC.db-shm
/.vs/Inu_im_2wnd_3lvl_23550/v16/Browse.VC.db-wal
/.vs/Inu_im_2wnd_3lvl_23550/v16/Browse.VC.opendb
/.vs/ProjectSettings.json
/.vs/slnx.sqlite
/slprj/_cgxe/inu_im_2wnd_3lvl/inu_im_2wnd_3lvl_Cache.mat
/slprj/_jitprj/4jSHq6tpkAOru8OWjpPNFB.l
/slprj/_jitprj/4jSHq6tpkAOru8OWjpPNFB.mat
/slprj/accel/inu_im_2wnd_3lvl/amsi_serial.mat
/slprj/accel/inu_im_2wnd_3lvl/inu_im_2wnd_3lvl_instrumentation_settings.mat
/slprj/accel/inu_im_2wnd_3lvl/inu_im_2wnd_3lvl_SolverChangeInfo.mat
/slprj/accel/inu_im_2wnd_3lvl/inu_im_2wnd_3lvl_top_vm.bc
/slprj/accel/inu_im_2wnd_3lvl/inu_im_2wnd_3lvl_top_vm.ll
/slprj/accel/inu_im_2wnd_3lvl/tmwinternal/simulink_cache.xml
/slprj/sim/varcache/inu_im_2wnd_3lvl/checksumOfCache.mat
/slprj/sim/varcache/inu_im_2wnd_3lvl/tmwinternal/simulink_cache.xml
/slprj/sim/varcache/inu_im_2wnd_3lvl/varInfo.mat
/slprj/sl_proj.tmw
/slprj/
/.vs/

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Inu/Src/.vscode/c_cpp_properties.json vendored Normal file
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{
"configurations": [
{
"name": "Win32",
"includePath": [
"${workspaceFolder}/**;",
"C:/ti/ccs1011/ccs/tools/compiler/ti-cgt-c2000_20.2.1.LTS/**"
],
"defines": [
"_DEBUG",
"UNICODE",
"_UNICODE"
],
"cStandard": "c99",
"cppStandard": "c++17",
"intelliSenseMode": "clang-x64",
"compilerPath": "C:/ti/ccs1011/ccs/tools/compiler/ti-cgt-c2000_20.2.1.LTS/bin/cl2000.exe"
}
],
"version": 4
}

23
Inu/Src/VectorControl/abc_to_alphabeta.c Normal file
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#include "IQmathLib.h" // Include header for IQmath library
#include "abc_to_alphabeta.h"
/////////////////////////////////////////////////
#pragma CODE_SECTION(abc_to_alphabeta_calc,".fast_run");
void abc_to_alphabeta_calc(ABC_TO_ALPHABETA *v)
{
static _iq iq_1_sqrt3 = _IQ(0.57735026918962576450914878050196); // = 1/sqrt(3)
static _iq iq_2_sqrt3 = _IQ(1.1547005383792515290182975610039); // =2/sqrt(3)
v->Ualpha = v->Ua;
v->Ubeta = _IQmpy(iq_1_sqrt3,v->Ua) + _IQmpy(iq_2_sqrt3,v->Ub);
}
/////////////////////////////////////////////////

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Inu/Src/VectorControl/abc_to_alphabeta.h Normal file
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#ifndef __ABC_ALPHABETA_H__
#define __ABC_ALPHABETA_H__
typedef struct { _iq Ua; //phase A voltage, input
_iq Ub; //phase B voltage, input
_iq Uc; //phase C voltage, input
// _iq Tetta; //phase angle, input
_iq Ualpha; // axis d voltage, output
_iq Ubeta; // axis q voltage, output
void (*calc)(); // Pointer to calculation function
}ABC_TO_ALPHABETA;
typedef ABC_TO_ALPHABETA *ABC_TO_ALPHABETA_handle;
#define ABC_TO_ALPHABETA_DEFAULTS { 0, \
0, \
0, \
0, \
0, \
(void (*)(unsigned long))abc_to_alphabeta_calc\
}
void abc_to_alphabeta_calc(ABC_TO_ALPHABETA_handle);
#endif // end __ABC_ALPHABETA_H

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Inu/Src/VectorControl/abc_to_dq.c Normal file
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#include "IQmathLib.h" // Include header for IQmath library
#include "abc_to_dq.h"
/////////////////////////////////////////////////
#pragma CODE_SECTION(abc_to_dq_calc,".fast_run");
void abc_to_dq_calc(ABC_TO_DQ *v)
{
static _iq iq_two_third_pi = _IQ(6.283185307179586476925286766559/3.0);
static _iq iq_two_third = _IQ(2.0/3.0);
v->Id = _IQmpy(iq_two_third,_IQmpy(v->Ia, _IQsin(v->Tetta)) + _IQmpy(v->Ib, _IQsin(v->Tetta - iq_two_third_pi)) + _IQmpy(v->Ic, _IQsin(v->Tetta + iq_two_third_pi)));
v->Iq = _IQmpy(iq_two_third,_IQmpy(v->Ia, _IQcos(v->Tetta)) + _IQmpy(v->Ib, _IQcos(v->Tetta - iq_two_third_pi)) + _IQmpy(v->Ic, _IQcos(v->Tetta + iq_two_third_pi)));
}
#pragma CODE_SECTION(abc_to_dq_calc_v2,".fast_run");
void abc_to_dq_calc_v2(ABC_TO_DQ *v)
{
static _iq iq_two_third_pi = _IQ(6.283185307179586476925286766559/3.0);
static _iq iq_two_third = _IQ(2.0/3.0);
v->Id = _IQmpy(iq_two_third,_IQmpy(v->Ia, _IQcos(v->Tetta)) + _IQmpy(v->Ib, _IQcos(v->Tetta - iq_two_third_pi)) + _IQmpy(v->Ic, _IQcos(v->Tetta + iq_two_third_pi)));
v->Iq = _IQmpy(iq_two_third,_IQmpy(-v->Ia, _IQsin(v->Tetta)) - _IQmpy(v->Ib, _IQcos(v->Tetta - iq_two_third_pi)) - _IQmpy(v->Ic, _IQcos(v->Tetta + iq_two_third_pi)));
}
/////////////////////////////////////////////////

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Inu/Src/VectorControl/abc_to_dq.h Normal file
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#ifndef __ABC_DQ_H__
#define __ABC_DQ_H__
typedef struct { _iq Ia; //phase A voltage, input
_iq Ib; //phase B voltage, input
_iq Ic; //phase C voltage, input
_iq Tetta; //phase angle, input
_iq Id; // axis d voltage, output
_iq Iq; // axis q voltage, output
void (*calc)(); // Pointer to calculation function
void (*calc_v2)(); // Pointer to calculation function
}ABC_TO_DQ;
typedef ABC_TO_DQ *ABC_TO_DQ_handle;
#define ABC_TO_DQ_DEFAULTS { 0, \
0, \
0, \
0, \
0, \
0, \
(void (*)(Uint32))abc_to_dq_calc, \
(void (*)(Uint32))abc_to_dq_calc_v2 }
void abc_to_dq_calc(ABC_TO_DQ_handle);
void abc_to_dq_calc_v2(ABC_TO_DQ_handle);
#endif // end __ABC_DQ_H

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Inu/Src/VectorControl/alg_pll.c Normal file
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#include "IQmathLib.h"
#include "alg_pll.h"
#include "params_pll.h"
#include "params_norma.h"
//#define NORMA_ACP 3000
//#define FREQ_PWM_VIPR 1975
//#define SIZE_PLL_AVG 50
//_iq w_in_avg[SIZE_PLL_AVG];
//_iq w_out_avg[SIZE_PLL_AVG];
#define DETECT_PLL_D (2000.0/NORMA_ACP) // ampl
#define DETECT_PLL_Q (500.0/NORMA_ACP) // zero
_iq iqDetect_PLL_d=_IQ(DETECT_PLL_D);
_iq iqDetect_PLL_q=_IQ(DETECT_PLL_Q);
#define MAX_COUNT_ERR_PLL 5000 //20
#ifdef USE_SMOOTH_FOR_CALC_WC
SMOOTH mysmooth=SMOOTH_DEFAULTS;
#endif
//
///////////////////////////////////////////
//PLL_REC pll2 = PLL_REC_DEFAULT;
///////////////////////////////////////////
ABC_TO_ALPHABETA abc_to_alphabeta_u_input = ABC_TO_ALPHABETA_DEFAULTS;
ALPHABETA_TO_DQ alphabeta_to_dq_u_input = ALPHABETA_TO_DQ_DEFAULTS;
PIDREG3 pidUdq = PIDREG3_DEFAULTS;
//int count_wait_pll=0;
int count_err_pll = 0;
//int c_start=0;
//int c_stop=0;
#define MAX_TIME_WAIT_PLL 5000
//_iq iqUab=0, iqUbc=0, iqUca=0;
//_iq koef_Um_filter = _IQ(0.000125/0.09);
//_iq koef_AddIq_minus_1_filter = _IQ(0.00034/0.009);//9576244354248046875
#pragma CODE_SECTION(minus_plus_2_pi,".fast_run");
_iq minus_plus_2_pi(_iq a)
{
while (a>=CONST_IQ_2PI)
a -= CONST_IQ_2PI;
while (a<=-CONST_IQ_2PI)
a += CONST_IQ_2PI;
return a;
}
#pragma CODE_SECTION(minus_plus_2_pi_v2,".fast_run");
_iq minus_plus_2_pi_v2(_iq a)
{
while (a>=CONST_IQ_2PI)
a -= CONST_IQ_2PI;
while (a<0)
a += CONST_IQ_2PI;
return a;
}
#pragma CODE_SECTION(AB_BC_CA_To_ABC,".fast_run");
void AB_BC_CA_To_ABC(_iq U_AB, _iq U_BC, _iq U_CA, _iq *Ua, _iq *Ub, _iq *Uc)
{
// static _iq c2 = _IQ(2.0);
// static _iq c13_sqrt = _IQ(1.7320508075688772935274463415059 / 3.0);
*Ua = U_AB;
*Ub = U_BC;
*Uc = U_CA;
/*
*Ua = _IQmpy(c13_sqrt, (_IQmpy(c2,U_AB)+U_BC));// 2*U_AB/3+U_BC/3;
*Ub = _IQmpy(c13_sqrt, (_IQmpy(c2,U_BC)+U_CA));// 2*U_BC/3+U_CA/3;
*Uc = _IQmpy(c13_sqrt, (_IQmpy(c2,U_CA)+U_AB));// 2*U_CA/3+U_AB/3;
*/
}
/////////////////////////////////////////////////
#pragma CODE_SECTION(PLLController,".fast_run");
/////////////////////////////////////////////////
void PLLController(PLL_REC *v)
{
static unsigned int count_wait_pll=0;
static _iq prev_Tetta_z=0;
_iq Tetta_z_t=0;
static int prev_flag_find_pll = 0;
static int flag_reset_Tetta_p = 0;
// static _iq prev_Tetta_v2 = 0;
v->vars.Uab = v->input.Input_U_AB - v->vars.iqZeroUAB;
v->vars.Ubc = v->input.Input_U_BC - v->vars.iqZeroUBC;
v->vars.Uca = v->input.Input_U_CA - v->vars.iqZeroUCA;
v->vars.sum_zeroU_AB_BC_CA = v->vars.Uab + v->vars.Ubc + v->vars.Uca;
if (v->setup.rotation_u_cba)
{
AB_BC_CA_To_ABC(v->vars.Uab, v->vars.Uca, v->vars.Ubc, &v->vars.Ua, &v->vars.Ub, &v->vars.Uc);
}
else
{
AB_BC_CA_To_ABC(v->vars.Uab,v->vars.Ubc,v->vars.Uca, &v->vars.Ua, &v->vars.Ub, &v->vars.Uc);
}
#ifdef ROTATION_U_CBA
#else
#endif
v->vars.sum_zeroU_A_B_C = v->vars.Ua + v->vars.Ub + v->vars.Uc;
abc_to_alphabeta_u_input.Ua = v->vars.Ua;
abc_to_alphabeta_u_input.Ub = v->vars.Ub;
abc_to_alphabeta_u_input.Uc = v->vars.Uc;
abc_to_alphabeta_u_input.calc(&abc_to_alphabeta_u_input);
v->vars.Ualpha = abc_to_alphabeta_u_input.Ualpha;
v->vars.Ubeta = abc_to_alphabeta_u_input.Ubeta;
alphabeta_to_dq_u_input.Ualpha = v->vars.Ualpha;
alphabeta_to_dq_u_input.Ubeta = v->vars.Ubeta;
alphabeta_to_dq_u_input.Tetta = v->vars.Tetta;
alphabeta_to_dq_u_input.calc(&alphabeta_to_dq_u_input);
v->vars.pll_Ud = alphabeta_to_dq_u_input.Ud;
v->vars.pll_Uq = alphabeta_to_dq_u_input.Uq;
// pidUdq.Fdb = v->pll_Ud;//.pll_Uq; //err = Ref - Fdb
// pidUdq.Ref = 0;
pidUdq.Ref = v->vars.pll_Uq; //err = Ref - Fdb
pidUdq.Fdb = 0;
pidUdq.calc(&pidUdq);
v->vars.wc = pidUdq.Out;
if (prev_flag_find_pll==0)
{
flag_reset_Tetta_p = 0;
}
if (v->output.flag_find_pll)
{
#ifdef USE_SMOOTH_FOR_CALC_WC
mysmooth.input = _IQtoIQ23(v->vars.wc);
mysmooth.add(&mysmooth);
mysmooth.calc(&mysmooth);
v->vars.w_shtrih = _IQ23toIQ(mysmooth.av);
#else
v->vars.w_shtrih = v->vars.wc;
#endif
}
else
{
v->vars.w_shtrih = v->vars.wc;
}
v->vars.Tetta += v->vars.wc;
v->vars.Tetta = minus_plus_2_pi(v->vars.Tetta); // +- 2PI
if (v->output.flag_find_pll)
{
v->vars.dwc = v->vars.wc - v->vars.w_shtrih;
v->vars.Tetta_p += v->vars.dwc;
v->vars.Tetta_p = minus_plus_2_pi(v->vars.Tetta_p); // +- 2PI
v->vars.dTetta = v->vars.Tetta - v->vars.Tetta_p;// + iq_05Pi;
v->vars.dTetta = minus_plus_2_pi(v->vars.dTetta); // +- 2PI
v->vars.Tetta_z = v->vars.dTetta;
// if (v->Tetta_z>=iq_05Pi && prev_Tetta_z<iq_05Pi)
// v->Tetta_p = 0;
Tetta_z_t = minus_plus_2_pi_v2(v->vars.Tetta_z);
if ( (Tetta_z_t>=0) && (Tetta_z_t<CONST_IQ_PI05) && ( (prev_Tetta_z>(CONST_IQ_2PI-CONST_IQ_PI05)) ) )
{
if (flag_reset_Tetta_p==0)
{
v->vars.Tetta_p = 0;
// flag_reset_Tetta_p = 1;
}
}
prev_Tetta_z = Tetta_z_t;
#ifdef USE_FILTER_TETTA
//use filter teta
v->vars.Tetta_v2 = v->vars.Tetta_z;//v->Tetta;
#else
//use mgnoven teta
v->vars.Tetta_v2 = v->vars.Tetta;
#endif
v->vars.delta_Tetta_c = v->vars.Tetta_z - v->vars.Tetta;
// prev_Tetta_v2 = v->Tetta_v2;
}
else
{
v->vars.Tetta_v2 = v->vars.Tetta;
flag_reset_Tetta_p = 0;
}
// PLL OK?
//count_wait_pll=0
//new alg find pll
if (v->vars.w_shtrih >= v->vars.find_min_w_strih && v->vars.w_shtrih <= v->vars.find_max_w_strih)
{
if (v->vars.count_wait_pll_w_shtrih < v->vars.max_time_wait_pll_w_strih)
v->vars.count_wait_pll_w_shtrih++;
}
else
{
if (v->vars.count_wait_pll_w_shtrih>0)
v->vars.count_wait_pll_w_shtrih--;
}
if (v->vars.count_wait_pll_w_shtrih == v->vars.max_time_wait_pll_w_strih)
v->output.flag_find_pll = 1;
if (v->vars.count_wait_pll_w_shtrih == 0)
v->output.flag_find_pll = 0;
//end new alg find pll
if ( (_IQabs(v->vars.pll_Uq)<=_IQabs(iqDetect_PLL_q)) // zero
&& (_IQabs(v->vars.pll_Ud)>=_IQabs(iqDetect_PLL_d) ) //ampl
)
{
count_err_pll=0;
if (count_wait_pll<MAX_TIME_WAIT_PLL)
count_wait_pll++;
else
// ok, pll finded
v->output.flag_find_pll = 1;
}
else
{
if (count_err_pll>=MAX_COUNT_ERR_PLL)
{
// fail find pll
count_wait_pll=0;
v->output.flag_find_pll = 0;
if (v->output.flag_find_pll==1)
{
v->vars.pll_Uq = 0;
v->vars.pll_Ud = 0;
}
}
else
{
count_err_pll++;
if ((v->output.flag_find_pll==0) && (count_wait_pll>0))
count_wait_pll--;
}
}
// end PLL Ok?
v->vars.pi_teta_u_out = pidUdq.Out;
v->vars.pi_teta_u_i = pidUdq.Ui;
v->vars.pi_teta_u_p = pidUdq.Up;
prev_flag_find_pll = v->output.flag_find_pll;
}
//////////////////////////////////////////////////
//////////////////////////////////////////////////
//////////////////////////////////////////////////
/////////////////////////////////////////////////
//#pragma CODE_SECTION(pll_get_freq,".fast_run");
/////////////////////////////////////////////////
void pll_get_freq_float(PLL_REC *v)
{
if (v->output.flag_find_pll)
{
v->output.int_freq_net = _IQtoF( v->vars.w_shtrih) * v->setup.freq_run_pll / PI * 50.00; // freq*100
}
else
{
v->output.int_freq_net = 0;
}
}
//////////////////////////////////////////////////
//////////////////////////////////////////////////
void pll_get_freq_iq(PLL_REC *v)
{
if (v->output.flag_find_pll)
{
v->output.iq_freq_net = v->vars.w_shtrih;//_IQtoF( v->vars.w_shtrih) * v->setup.freq_run_pll / PI * 50.00; // freq*100
}
else
{
v->output.iq_freq_net = 0;
}
}
//////////////////////////////////////////////////
//#pragma CODE_SECTION(detect_phase_count,".fast_run");
void detect_phase_count(PLL_REC *v)
{
static _iq prev_Ua = 0;
static int prev_flag_find_pll=0;
// abc_to_dq.Ua
if ((v->output.flag_find_pll != prev_flag_find_pll) && (v->output.flag_find_pll == 1))
{
prev_Ua = v->vars.Ua;
v->vars.enable_detect_phase_count = 1;
v->vars.error_phase_count = 0;
}
if (v->output.flag_find_pll==0)
v->vars.enable_detect_phase_count = 0;
if (v->output.flag_find_pll)
{
if (v->vars.enable_detect_phase_count)
{
if ( (prev_Ua<0) && (v->vars.Ua>=0) )
{
if (v->vars.Uc > v->vars.Ub)
v->vars.enable_detect_phase_count = 0;
if (v->vars.Ub > v->vars.Uc)
{
v->vars.enable_detect_phase_count = 0;
v->vars.error_phase_count = 1;
}
}
}
}
prev_flag_find_pll = v->output.flag_find_pll;
prev_Ua = v->vars.Ua;
}
/////////////////////////////////////////////////
////////////////////////////////////////////////
#pragma CODE_SECTION(Find_zero_Uabc,".fast_run");
void Find_zero_Uabc(PLL_REC *v)
{
static int c_a=0;
// static int c_b=0;
// static int c_c=0;
static _iq sum_a=0;
static _iq sum_b=0;
static _iq sum_c=0;
_iq22 sum_t,c_t;
_iq22 sum_div;
// AB_BC_CA_To_ABC(analog.iqUin_AB-iqZeroUABC, analog.iqUin_BC-iqZeroUABC, analog.iqUin_CA-iqZeroUABC);
sum_a += v->input.Input_U_AB; // analog.iqUin_AB;
sum_b += v->input.Input_U_BC; // analog.iqUin_BC;
sum_c += v->input.Input_U_CA; // analog.iqUin_CA;
c_a++;
if (c_a >= v->vars.count_sum_find_zero_uabc)
{
sum_div = v->vars.sum_div_find_zero_uabc;
sum_t = _IQtoIQ22(sum_a);
c_t = _IQ22div(sum_t,sum_div);
v->vars.iqZeroUAB = _IQ22toIQ(c_t);
sum_t = _IQtoIQ22(sum_b);
c_t = _IQ22div(sum_t,sum_div);
v->vars.iqZeroUBC = _IQ22toIQ(c_t);
sum_t = _IQtoIQ22(sum_c);
c_t = _IQ22div(sum_t,sum_div);
v->vars.iqZeroUCA = _IQ22toIQ(c_t);
sum_a = 0;
sum_b = 0;
sum_c = 0;
c_a = 0;
}
}
void pll_init(PLL_REC *v)
{
v->output.status = STATUS_PLL_NOT_INITED;
abc_to_alphabeta_u_input.Ua = 0;
abc_to_alphabeta_u_input.Ub = 0;
abc_to_alphabeta_u_input.Uc = 0;
abc_to_alphabeta_u_input.Ualpha = 0;
abc_to_alphabeta_u_input.Ubeta = 0;
alphabeta_to_dq_u_input.Tetta = 0;
alphabeta_to_dq_u_input.Ualpha = 0;
alphabeta_to_dq_u_input.Ubeta = 0;
alphabeta_to_dq_u_input.Ud = 0;
alphabeta_to_dq_u_input.Uq = 0;
v->vars.count_wait_pll_w_shtrih = 0;
v->vars.pll_Ud = 0;
v->vars.pll_Uq = 0;
v->vars.Tetta = 0;
v->vars.Tetta_p = 0;
v->vars.Ua = 0;
v->vars.Ub = 0;
v->vars.Uc = 0;
v->vars.Ualpha = 0;
v->vars.Ubeta = 0;
// count_wait_pll = 0;
count_err_pll = 0;
v->output.flag_find_pll = 0;
pidUdq.Kp = _IQ(v->setup.pid_kp_pll);
pidUdq.Ki = _IQ(v->setup.pid_ki_pll);
pidUdq.Kc = _IQ(PID_KC_PLL);
pidUdq.Kd = _IQ(0.0);
pidUdq.OutMax = _IQ(K_PLL_MAX);
pidUdq.OutMin = _IQ(K_PLL_MIN);
pidUdq.Err = 0;
pidUdq.Out = 0;
pidUdq.OutPreSat = 0;
pidUdq.SatErr = 0;
if (v->setup.freq_run_pll == 0)
v->setup.freq_run_pll = DEFAULT_FREQ_RUN_PLL;
pidUdq.Ui = _IQ(2.0*PI*DEFAULT_FREQ_NET/(v->setup.freq_run_pll));
// iqDetect_PLL_d = iqDetect_PLL_d;
// iqDetect_PLL_q = iqDetect_PLL_q;
#ifdef USE_SMOOTH_FOR_CALC_WC
mysmooth.init(&mysmooth);
#endif
v->vars.count_sum_find_zero_uabc = v->setup.freq_run_pll/DEFAULT_FREQ_NET; //79*2 //1975/50*2
v->vars.sum_div_find_zero_uabc = _IQ22(v->vars.count_sum_find_zero_uabc);
v->vars.find_max_w_strih = _IQ(FIND_MAX_W_STRIH*2.0*PI*DEFAULT_FREQ_NET/(v->setup.freq_run_pll));
v->vars.find_min_w_strih = _IQ(FIND_MIN_W_STRIH*2.0*PI*DEFAULT_FREQ_NET/(v->setup.freq_run_pll));
v->vars.max_time_wait_pll_w_strih = (v->vars.count_sum_find_zero_uabc * MAX_PERIOD_WAIT_PLL_W_SHTRIH);
v->output.status = STATUS_PLL_INITED;
}
#pragma CODE_SECTION(read_error_find_pll,".fast_run2");
int read_error_find_pll(PLL_REC *v)
{
// static int enable_detect_pll_err=0;
// static int prev_flag_find_pll=0;
static int err_pll=0;
err_pll = 0;
/*
if ((v->output.flag_find_pll!=prev_flag_find_pll)
&& (v->output.flag_find_pll==1))
{
enable_detect_pll_err = 1;
}
prev_flag_find_pll = v->output.flag_find_pll;
if (v->input.enable_find_pll==0)
enable_detect_pll_err = 0;
if ((enable_detect_pll_err) && (v->output.flag_find_pll==0) && (v->input.enable_find_pll==1))
{
err_pll = 1;
}
*/
return err_pll;
}
#pragma CODE_SECTION(pll_calc,".fast_run");
void pll_calc(PLL_REC *v)
{
if (v->output.status >= STATUS_PLL_INITED)
{
Find_zero_Uabc(v);
PLLController(v);
// detect_phase_count(v);
v->output.status = STATUS_PLL_OK;
}
}

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#ifndef __ALG_PLL_H__
#define __ALG_PLL_H__
#include "IQmathLib.h"
#include "math_pi.h"
#include "pid_reg3.h"
#include "abc_to_alphabeta.h"
#include "alphabeta_to_dq.h"
#include "smooth.h"
#include "smooth.h"
#define DEFAULT_FREQ_NET 50.00 // Hz
#define DEFAULT_FREQ_RUN_PLL 4000 // Hz
#define DEFAULT_PID_KP_PLL 0.0375
#define DEFAULT_PID_KI_PLL 0.0128
#define STATUS_PLL_OK 10
#define STATUS_PLL_ERROR 2
#define STATUS_PLL_INITED 1
#define STATUS_PLL_NOT_INITED 0
#define FIND_MAX_W_STRIH 1.5 //0.12 //75Hz
#define FIND_MIN_W_STRIH 0.5 //0.045 //33Hz
#define MAX_PERIOD_WAIT_PLL_W_SHTRIH 3
////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////
typedef struct {
float pid_kp_pll; // êîýô. ðåãóëßòîðà Kp äëß ïîèñêà ñåòè
float pid_ki_pll; // êîýô. ðåãóëßòîðà Ki äëß ïîèñêà ñåòè
int freq_run_pll; // ÷àñòîòà çàïóñêà ðàñ÷åòà, Ãö.
int rotation_u_cba; // ÷åðåäîâàíèå ôàç: 0 - ïðàâèëüíîå A-B-C, 1 - íåïðàâèëüíîå A-C-B
} PLL_SETUP;
#define PLL_SETUP_DEFAULT {DEFAULT_PID_KP_PLL, DEFAULT_PID_KI_PLL, DEFAULT_FREQ_RUN_PLL,0}
////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////
typedef struct { _iq Input_U_AB; // âõîäíîå íàïðßæåíèå Uab
_iq Input_U_BC; // âõîäíîå íàïðßæåíèå Ubc
_iq Input_U_CA; // âõîäíîå íàïðßæåíèå Uca
} PLL_INPUT;
#define PLL_INPUT_DEFAULT {0, 0, 0}
////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////
typedef struct { int flag_find_pll;
int int_freq_net;
_iq iq_freq_net;
int status;
} PLL_OUTPUT;
#define PLL_OUTPUT_DEFAULT {0, 0, 0, STATUS_PLL_NOT_INITED}
////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////
typedef struct {
int enable_detect_phase_count;
int error_phase_count;
_iq pll_Ud;
_iq pll_Uq;
_iq Tetta;
_iq Tetta_v2;
_iq wc;
_iq dwc;
_iq w_shtrih;
_iq Tetta_z;
_iq Tetta_p;
_iq dTetta;
_iq zeroPLL;
_iq pi_teta_u_out;
_iq pi_teta_u_p;
_iq pi_teta_u_i;
_iq add_teta;
_iq add_teta2;
_iq Ua;
_iq Ub;
_iq Uc;
_iq Uab;
_iq Ubc;
_iq Uca;
_iq Ualpha;
_iq Ubeta;
_iq iqZeroUAB;
_iq iqZeroUBC;
_iq iqZeroUCA;
_iq sum_zeroU_AB_BC_CA;
_iq sum_zeroU_A_B_C;
_iq delta_Tetta_c;
_iq22 sum_div_find_zero_uabc;
int count_sum_find_zero_uabc;
_iq find_max_w_strih;
_iq find_min_w_strih;
int count_wait_pll_w_shtrih;
int max_time_wait_pll_w_strih;//MAX_TIME_WAIT_PLL_W_SHTRIH
int enable_find_pll;
}PLL_VARS;//39
#define PLL_VARS_DEFAULT {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}
////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////
typedef struct { PLL_INPUT input;
PLL_OUTPUT output;
PLL_SETUP setup;
PLL_VARS vars;
void (*init)(); // Pointer to calculation function
void (*calc_pll)(); // Pointer to calculation function
void (*get_freq_float)(); // Pointer to calculation function
void (*get_freq_iq)();
}PLL_REC;
typedef PLL_REC *PLL_REC_handle;
#define PLL_REC_DEFAULT {\
PLL_INPUT_DEFAULT,\
PLL_OUTPUT_DEFAULT,\
PLL_SETUP_DEFAULT,\
PLL_VARS_DEFAULT,\
(void (*)(unsigned long))pll_init,\
(void (*)(unsigned long))pll_calc,\
(void (*)(unsigned long))pll_get_freq_float,\
(void (*)(unsigned long))pll_get_freq_iq \
}
void pll_init(PLL_REC_handle);
void pll_calc(PLL_REC_handle);
void pll_get_freq_float(PLL_REC_handle);
void pll_get_freq_iq(PLL_REC_handle);
void Find_zero_Uabc(PLL_REC_handle);
void PLLController(PLL_REC *v);
void AB_BC_CA_To_ABC(_iq U_AB, _iq U_BC, _iq U_CA, _iq *Ua, _iq *Ub, _iq *Uc);
void detect_phase_count(PLL_REC *v);
int read_error_find_pll(PLL_REC *v);
_iq minus_plus_2_pi(_iq a);
_iq minus_plus_2_pi_v2(_iq a);
#endif

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#include "IQmathLib.h" // Include header for IQmath library
#include "alphabeta_to_dq.h"
/////////////////////////////////////////////////
#pragma CODE_SECTION(alphabeta_to_dq_calc,".fast_run");
void alphabeta_to_dq_calc(ALPHABETA_TO_DQ *v)
{
v->Ud = _IQmpy(v->Ualpha, _IQcos(v->Tetta)) + _IQmpy(v->Ubeta, _IQsin(v->Tetta));
v->Uq = -_IQmpy(v->Ualpha, _IQsin(v->Tetta)) + _IQmpy(v->Ubeta, _IQcos(v->Tetta));
}
/////////////////////////////////////////////////

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#ifndef __ALPHABETA_DQ_H__
#define __ALPHABETA_DQ_H__
typedef struct { _iq Ualpha; //phase A voltage, input
_iq Ubeta; //phase B voltage, input
_iq Tetta; //phase angle, input
_iq Ud; // axis d voltage, output
_iq Uq; // axis q voltage, output
void (*calc)(); // Pointer to calculation function
}ALPHABETA_TO_DQ;
typedef ALPHABETA_TO_DQ *ALPHABETA_TO_DQ_handle;
#define ALPHABETA_TO_DQ_DEFAULTS { 0, \
0, \
0, \
0, \
0, \
(void (*)(unsigned long))alphabeta_to_dq_calc \
}
void alphabeta_to_dq_calc(ALPHABETA_TO_DQ_handle);
#endif // end __ALPHABETA_DQ_H

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#include "IQmathLib.h" // Include header for IQmath library
#include "dq_to_alphabeta_cos.h"
/////////////////////////////////////////////////
//#pragma CODE_SECTION(dq_to_alphabeta_calc,".fast_run2");
void dq_to_alphabeta_calc(DQ_TO_ALPHABETA_handle v)
{
v->Ualpha = _IQmpy(v->Ud, _IQcos(v->Tetta)) + _IQmpy(v->Uq, _IQsin(v->Tetta));
v->Ubeta = -_IQmpy(v->Ud, _IQsin(v->Tetta)) + _IQmpy(v->Uq, _IQcos(v->Tetta));
}
//#pragma CODE_SECTION(dq_to_alphabeta_calc2,".fast_run2");
void dq_to_alphabeta_calc2(DQ_TO_ALPHABETA_handle v)
{
v->Ualpha = _IQmpy(v->Ud, _IQsin(v->Tetta)) + _IQmpy(v->Uq, _IQcos(v->Tetta));
v->Ubeta = -_IQmpy(v->Ud, _IQcos(v->Tetta)) + _IQmpy(v->Uq, _IQsin(v->Tetta));
}
//#pragma CODE_SECTION(dq_to_alphabeta_calc_cos,".fast_run2");
void dq_to_alphabeta_calc_cos(DQ_TO_ALPHABETA_handle v)
{
v->Ualpha = _IQmpy(v->Ud, _IQcos(v->Tetta)) - _IQmpy(v->Uq, _IQsin(v->Tetta));
v->Ubeta = _IQmpy(v->Ud, _IQsin(v->Tetta)) + _IQmpy(v->Uq, _IQcos(v->Tetta));
}
/////////////////////////////////////////////////

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#ifndef __DQ_ALPHABETA_H__
#define __DQ_ALPHABETA_H__
#include "IQmathLib.h"
typedef struct { _iq Ualpha; //phase A voltage, input
_iq Ubeta; //phase B voltage, input
_iq Tetta; //phase angle, input
_iq Ud; // axis d voltage, output
_iq Uq; // axis q voltage, output
void (*calc)(); // Pointer to calculation function
void (*calc2)(); // Pointer to calculation function. Like in MATLAB
void (*calc_cos)(); // Pointer to calculation function, Ualpha = Uq*Cos(Tetta)
}DQ_TO_ALPHABETA;
typedef DQ_TO_ALPHABETA *DQ_TO_ALPHABETA_handle;
#define DQ_TO_ALPHABETA_DEFAULTS { 0, \
0, \
0, \
0, \
0, \
(void (*)(Uint32))dq_to_alphabeta_calc, \
(void (*)(Uint32))dq_to_alphabeta_calc2, \
(void (*)(Uint32))dq_to_alphabeta_calc_cos \
}
void dq_to_alphabeta_calc(DQ_TO_ALPHABETA_handle);
void dq_to_alphabeta_calc2(DQ_TO_ALPHABETA_handle);
void dq_to_alphabeta_calc_cos(DQ_TO_ALPHABETA_handle);
#endif // end __DQ_ALPHABETA_H__

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#ifndef __PARAMS_PLL_H__
#define __PARAMS_PLL_H__
//#define USE_SMOOTH_FOR_CALC_WC 1 // èñïîëüçîâàòü äîï. àëãîðèòì ôèëüòðàöèè äëß ïëîõîé ñåòè
/////////////////////////////////////////////////////////
/////////////////////////////////////////////////////////
// stend params
/////////////////////////////////////////////////////////
/////////////////////////////////////////////////////////
////////////
//PLL
///////////
//23470 params
//#define PID_KP_PLL 0.00375
//#define PID_KI_PLL 0.128
//ship1
#define DEFAULT_PID_KP_PLL 0.0375
#define DEFAULT_PID_KI_PLL 0.0128
//
#define PID_KC_PLL 1.000 //0.16 //0.05 //0.1 //20 //200
//
#define K_PLL_MAX 10.0 //1000000
#define K_PLL_MIN -10.0 //-1000000
//
/////////////////////////////////////////////////////////
/////////////////////////////////////////////////////////
// end params
/////////////////////////////////////////////////////////
/////////////////////////////////////////////////////////
#endif

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/*
* regul_power.c
*
* Created on: 16 íîÿá. 2020 ã.
* Author: star
*/
#include "IQmathLib.h"
#include "regul_power.h"
#include <edrk_main.h>
#include <master_slave.h>
#include <params_motor.h>
#include <params_norma.h>
#include <params_pwm24.h>
#include "math.h"
#include "mathlib.h"
#define TIME_RMP_SLOW 20.0 //sec
#define TIME_RMP_FAST 20.0 //sec
POWER power = POWER_DEFAULTS;
void init_Pvect(void) {
power.pidP.Ref = 0;
power.pidP.Kp = _IQ(1);
power.pidP.Ki = _IQ(0.1);
power.pidP.Kc = _IQ(0.5);
power.pidP.OutMax = _IQ(MOTOR_CURRENT_MAX / 2.0 / NORMA_ACP);
power.pidP.OutMin = -_IQ(MOTOR_CURRENT_MAX / 2.0 / NORMA_ACP);
power.Pzad_rmp = 0;
power.koef_fast = _IQ(FROT_NOMINAL / (float)NORMA_FROTOR / TIME_RMP_FAST / (float)FREQ_PWM);
power.koef_slow = _IQ(FROT_NOMINAL / (float)NORMA_FROTOR / TIME_RMP_SLOW / (float)FREQ_PWM);
power.Iq_out_max = _IQ(MOTOR_CURRENT_MAX / 2.0 / NORMA_ACP);
power.Pnominal = _IQ(P_NOMINAL * 1000.0 / NORMA_ACP / NORMA_ACP);
}
#pragma CODE_SECTION(vector_power,".fast_run");
_iq vector_power(_iq Pzad, _iq P_measured, int n_alg, unsigned int master,
_iq Iq_measured, _iq Iq_limit, _iq *Iq_zad, int reset)
{
static int prev_n_alg = 0;
_iq Iq_out = 0;
_iq koef_rmp = 0;
if (n_alg != ALG_MODE_FOC_POWER || !edrk.Go || master != MODE_MASTER || reset) {
power.pidP.Ui = Iq_measured;
power.pidP.Out = Iq_measured;
if (reset) { power.Pzad_rmp = 0; }
}
if (n_alg == ALG_MODE_FOC_OBOROTS) {
Pzad = power.Pnominal;
}
if (master == MODE_SLAVE) {
power.Pzad_rmp = P_measured;
return *Iq_zad;
}
//Äëÿ ïåðåõîäà èç ðåæèìà ïîääåðæàíèÿ îáîðîòîâ â ðåæèì ïîääåðæàíèÿ ìîùíîñòè,
//Ò.ê. â ðåæèìå ïîääåðæàíèÿ îáîðîòîâ âñåãäà çàäà¸òñÿ ìàêñèìàëüíàÿ äîïóñòèìàÿ ìîùíîñòü
if (n_alg == ALG_MODE_FOC_POWER && prev_n_alg != ALG_MODE_FOC_POWER) {
power.Pzad_rmp = P_measured;
}
if((_IQabs(power.Pzad_rmp) <= _IQabs(Pzad)) &&
(((Pzad >= 0) && (power.Pzad_rmp >= 0)) || ((Pzad < 0) && (power.Pzad_rmp < 0))))
{
koef_rmp = power.koef_slow;
}
else
{
koef_rmp = power.koef_fast;
}
power.Pzad_rmp = zad_intensiv_q(koef_rmp, koef_rmp, power.Pzad_rmp, Pzad);
power.pidP.OutMax = Iq_limit;
power.pidP.OutMin = -Iq_limit;
power.pidP.Ref = power.Pzad_rmp;
power.pidP.Fdb = P_measured;
power.pidP.calc(&power.pidP);
Iq_out = power.pidP.Out;
Iq_out = _IQsat(Iq_out, Iq_limit, -Iq_limit);
*Iq_zad = Iq_out;
prev_n_alg = n_alg;
return Iq_out;
}

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/*
* regul_power.h
*
* Created on: 16 íîÿá. 2020 ã.
* Author: star
*/
#ifndef SRC_VECTORCONTROL_NIO12_REGUL_POWER_H_
#define SRC_VECTORCONTROL_NIO12_REGUL_POWER_H_
#include "pid_reg3.h"
typedef struct {
PIDREG3 pidP;
_iq Pzad_rmp;
_iq koef_fast;
_iq koef_slow;
_iq Iq_out_max;
_iq Pnominal;
} POWER;
#define POWER_DEFAULTS {PIDREG3_DEFAULTS, 0,0,0,0,0}
_iq vector_power(_iq Pzad, _iq P_measured, int mode, unsigned int master,
_iq Iq_measured, _iq Iq_limit, _iq* Frot_zad, int reset);
void init_Pvect(void);
extern POWER power;
#endif /* SRC_VECTORCONTROL_NIO12_REGUL_POWER_H_ */

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#include "DSP281x_Device.h"
#include "IQmathLib.h"
#include "regul_turns.h"
#include <adc_tools.h>
#include <edrk_main.h>
#include <master_slave.h>
#include <params.h>
#include <params_motor.h>
#include <params_norma.h>
#include <params_pwm24.h>
#include "math.h"
#include "mathlib.h"
#include "pid_reg3.h"
#include "vector_control.h"
#pragma DATA_SECTION(turns,".fast_vars1");
TURNS turns = TURNS_DEFAULTS;
//IQ_OUT_NOM TODO:set Iq nominal
#define IQ_165_RPM 2306867 //165îá/ìèí
#define IQ_170_RPM 2376772 //170îá/ìèí
#define IQ_5_RPM 69905 //5îá/ìèí
#define TIME_RMP_FAST 10.0 //sec
#define TIME_RMP_SLOW 30.0 //sec
#define F_DEST 3.0 //Hz
void init_Fvect()
{
turns.pidFvect.Ref = 0;
turns.pidFvect.Kp = _IQ(5); // //_IQ(30);
turns.pidFvect.Ki = _IQ(0.005); //_IQ(0.008);//_IQ(0.002); //
turns.pidFvect.Kc = _IQ(0.5);
turns.pidFvect.OutMax = _IQ(MOTOR_CURRENT_MAX / 2.0 / NORMA_ACP);
turns.pidFvect.OutMin = -_IQ(MOTOR_CURRENT_MAX / 2.0 / NORMA_ACP);
turns.Fzad_rmp = 0;
turns.Fnominal = _IQ(FROT_MAX / NORMA_FROTOR);
turns.koef_fast =
_IQ(F_DEST / (float)NORMA_FROTOR / TIME_RMP_SLOW / (float)FREQ_PWM / 1.0);
turns.koef_slow =
_IQ(F_DEST / (float)NORMA_FROTOR / TIME_RMP_SLOW / (float)FREQ_PWM / 1.0);
turns.Iq_out_max = _IQ(MOTOR_CURRENT_MAX / NORMA_ACP);
turns.Id_out_max = 0;//_IQ(ID_OUT_NOM / NORMA_ACP);
turns.mzz_zad_int = 0;
}
void reset_F_pid()
{
turns.pidFvect.Up = 0;
turns.pidFvect.Up1 = 0;
turns.pidFvect.Ui = 0;
turns.pidFvect.Ud = 0;
turns.pidFvect.Out = 0;
}
//#pragma CODE_SECTION(vector_turns,".fast_run2");
void vector_turns(_iq Fzad, _iq Frot,
_iq Iq_measured, _iq Iq_limit, int n_alg,
unsigned int master, _iq *Iq_zad, int reset)
{
static int prev_n_alg = 0;
_iq koef_rmp; //, koef_spad;
_iq Iq_out_unsat, Iq_out_sat, Id_out_sat, Id_out_unsat;
_iq deltaVar;
// turns.mzz_zad_int = zad_intensiv_q(35480, 35480, turns.mzz_zad_int, Iq_limit);
turns.mzz_zad_int = Iq_limit;
turns.pidFvect.OutMax = turns.mzz_zad_int;
turns.pidFvect.OutMin = -turns.mzz_zad_int;
//Óáèðàåì ðåæèì òîðìîæåíèÿ
if (Fzad >= 0 && Frot > 0)
{
turns.pidFvect.OutMin = 0;
}
if (Fzad <= 0 && Frot < 0)
{
turns.pidFvect.OutMax = 0;
}
if (reset) { turns.Fzad_rmp = Frot;}
if ((n_alg < ALG_MODE_FOC_OBOROTS) || (!edrk.Go))
//Çàíîñèì òåêóùåå ñîñòîÿíèå â ðåãóë-òîð, ÷òî áû ïðè ñìåíå ðåæèìà íå áûëî ñêà÷êîâ
{ //
turns.Fzad_rmp = Frot;
// prev_Fzad = Frot;
reset_F_pid(); //Áûëî íèæå, ìîæåò áûòü ÷òî-òî áûëî íå òàê
turns.pidFvect.Ui = Iq_measured;
turns.pidFvect.Out = Iq_measured;
*Iq_zad = Iq_measured;
if (!edrk.Go)
{
*Iq_zad = 0;
}
return;
}
if (master == MODE_SLAVE) {
turns.Fzad_rmp = Frot;
turns.pidFvect.Ui = Iq_measured;
turns.pidFvect.Out = Iq_measured;
return;
}
//Â ðåæèìå ïîääåðæàíèÿ ìîùíîñòè çàäàþòñÿ ìàêñèìàëüíûå äîïóñòèìûå îáîðîòû
if (n_alg == ALG_MODE_FOC_POWER) {
Fzad = turns.Fnominal;
}
//Äëÿ ïåðåõîäà èõ ðåæèìà äîääåðæàíèÿ ìîùíîñè â ðåæèì ïîääåðæàíèÿ îáîðîòîâ
//ðàìïà ïîéä¸ò îò òåêóùåãî çíà÷åíèÿ îáîðîòîâ
if (n_alg == ALG_MODE_FOC_OBOROTS && prev_n_alg != ALG_MODE_FOC_OBOROTS) {
turns.Fzad_rmp = Frot;
}
if (_IQabs(turns.Fzad_rmp) <= _IQabs(Fzad)
&& (((Fzad >= 0) && (turns.Fzad_rmp >= 0))
|| ((Fzad < 0) && (turns.Fzad_rmp < 0))))
{
koef_rmp = turns.koef_slow;
}
else
{
koef_rmp = turns.koef_fast;
}
turns.Fzad_rmp = zad_intensiv_q(koef_rmp, koef_rmp, turns.Fzad_rmp, Fzad);
turns.pidFvect.Ref = turns.Fzad_rmp;
turns.pidFvect.Fdb = Frot;
turns.pidFvect.calc(&turns.pidFvect);
Iq_out_unsat = turns.pidFvect.Out;
Iq_out_sat = _IQsat(Iq_out_unsat, turns.mzz_zad_int, -turns.mzz_zad_int); //Test
*Iq_zad = Iq_out_sat;
prev_n_alg = n_alg;
}

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#ifndef REGUL_TURNS
#define REGUL_TURNS
#include "IQmathLib.h"
#include "pid_reg3.h"
typedef struct {
PIDREG3 pidFvect;
_iq Fzad_rmp;
_iq Fnominal;
_iq koef_fast;
_iq koef_slow;
_iq Iq_out_max;
_iq Id_out_max;
_iq mzz_zad_int;
} TURNS;
#define TURNS_DEFAULTS {PIDREG3_DEFAULTS, 0,0,0,0,0,0,0}
void init_Fvect(void);
void vector_turns(_iq Fzad, _iq Frot,
_iq Iq, _iq Iq_limit, int mode,
unsigned int master, _iq *Iq_zad, int reset);
extern TURNS turns;
#endif //REGUL_TURNS

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#include "IQmathLib.h" // Include header for IQmath library
#include "smooth.h"
#include "math_pi.h"
#include "math_pi.h"
#define SIZE_SMOOTH_INPUT 180
#pragma CODE_SECTION(my_mean,".fast_run");
_iq23 my_mean(int cnt, SMOOTH *v)
{
_iq23 summ = 0;
int start;
start = v->current_pos_buf_input;
if (start==0)
start = (MAX_SIZE_SMOOTH_INPUT-1);
while(cnt>0)
{
cnt--;
start--;
summ += v->buf_input[start];
if (start==0)
start = (MAX_SIZE_SMOOTH_INPUT-1);
}
return summ;
}
void smooth_init(SMOOTH *v)
{
int i=0;
v->c = 1;
v->av = 0;
v->w = _IQ23(WINDOW_START);
for (i=0;i<MAX_SIZE_SMOOTH_INPUT;i++)
{
v->buf_input[i] = 0;
}
// current_pos_buf_input = 0;
v->current_pos_buf_input = 0;
}
#pragma CODE_SECTION(smooth_add,".fast_run");
void smooth_add(SMOOTH *v)
{
volatile int i;
i = v->current_pos_buf_input;
v->buf_input[i] = v->input;
v->current_pos_buf_input++;
if (v->current_pos_buf_input>=MAX_SIZE_SMOOTH_INPUT)
v->current_pos_buf_input = 0;
}
#pragma CODE_SECTION(smooth_calc,".fast_run");
void smooth_calc(SMOOTH *v)
{
_iq23 e=0;
_iq23 summ=0;
_iq23 w_new;
long w_int;
w_int = _IQ23int(v->w);
if (v->c <= (WINDOW_START*2))
{
summ = my_mean(v->c,v);
v->av = _IQ23div(summ,_IQ23(v->c));
e = 0;
}
else
{
e = _IQ23div(CONST_IQ_2PI,v->av) - v->w; //(2*pi*fs/av) - w
v->ee = v->ee + _IQ23mpy(v->kp,(e - v->e0)) + _IQ23mpy(v->ki, e);
w_new = v->w + v->ee;
if (w_new>_IQ23(SIZE_SMOOTH_INPUT))
w_new = _IQ23(SIZE_SMOOTH_INPUT);
w_int = _IQ23int(w_new);
summ = my_mean(w_int,v);
v->w = _IQ23(w_int);
v->av = _IQ23div(summ, v->w);
}
if (v->c<SIZE_SMOOTH_INPUT)
v->c++;
v->e0 = e;
v->w_int = w_int;
}
#pragma CODE_SECTION(smooth_simple_calc,".fast_run");
void smooth_simple_calc(SMOOTH *v)
{
volatile _iq23 summ=0;
if (v->c <= v->w_int_simple )
{
summ = my_mean(v->c, v);
v->summ = summ;
v->av = _IQ23div(summ,_IQ23(v->c));
}
else
{
summ = my_mean(v->w_int_simple, v);
v->summ = summ;
v->av = _IQ23div(summ, _IQ23(v->w_int_simple));
}
if (v->c<MAX_SIZE_SMOOTH_INPUT)
v->c++;
}
void iq_smooth (_iq23 *input, _iq23 *output, int n, int window)
{
int i,j,z,k1,k2,hw;
int fm1,fm2;
_iq23 tmp;
fm1 = window/2;
fm2 = fm1*2;
if ((window-fm2)==0)
window++;
hw = (window-1)/2;
output[0] = input[0];
for (i=1;i<n;i++)
{
tmp=0;
if(i<hw)
{
k1=0;
k2=2*i;
z=k2+1;
}
else if((i+hw)>(n-1))
{
k1=i-n+i+1;
k2=n-1;
z=k2-k1+1;
}
else
{
k1=i-hw;
k2=i+hw;
z=window;
}
for (j=k1;j<=k2;j++)
{
tmp=tmp + input[j];
}
output[i] = _IQ23div(tmp,_IQ23(z));
}
}

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#ifndef __SMOOTH_H__
#define __SMOOTH_H__
#define WINDOW_START 79.0 //39.0
#define MAX_SIZE_SMOOTH_INPUT 180
typedef struct { int current_pos_buf_input;
_iq23 kp;
_iq23 ki;
int c;
int w_int_simple;
_iq23 w;
long w_int;
_iq23 ee;
_iq23 e0;
_iq23 av;
_iq23 input;
_iq23 summ;
_iq23 buf_input[MAX_SIZE_SMOOTH_INPUT];
void (*init)(); // Pointer to calculation function
void (*add)(); // Pointer to calculation function
void (*calc)(); // Pointer to calculation function
void (*simple_calc)(); // Pointer to calculation function
}SMOOTH;
typedef SMOOTH *SMOOTH_handle;
#define SMOOTH_DEFAULTS { 0, \
_IQ23(0.1), \
_IQ23(0.01), \
1, \
1, \
_IQ23(WINDOW_START), \
WINDOW_START, \
0, \
0, \
0, \
0, \
0, \
{0},\
(void (*)(unsigned long))smooth_init,\
(void (*)(unsigned long))smooth_add,\
(void (*)(unsigned long))smooth_calc,\
(void (*)(unsigned long))smooth_simple_calc\
}
void smooth_calc(SMOOTH_handle);
void smooth_init(SMOOTH_handle);
void smooth_add(SMOOTH_handle);
void smooth_simple_calc(SMOOTH_handle);
void iq_smooth (_iq23 *input, _iq23 *output, int n, int window);
#endif // end __ABC_ALPHABETA_H

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#include "IQmathLib.h"
#include "teta_calc.h"
#include <master_slave.h>
#include <params_alg.h>
#include <params_motor.h>
#include <params_norma.h>
#include <params_pwm24.h>
#include "mathlib.h"
#include "pid_reg3.h"
#define CONST_IQ_2PI 105414357
#define PI 3.1415926535897932384626433832795
#define MAX_Ud_Pid_Out_Id 176160 //0.2 ~ 167772 //0.21 ~ 176160
#define BPSI_START 0.17 //0.15
TETTA_CALC tetta_calc = TETTA_CALC_DEF;
void init_teta_calc_struct()
{
float Tr_cm = (L_M + L_SIGMA_R) / (R_ROTOR_SHTRIH / SLIP_NOM);
// tetta_calc.k_r = _IQ(1 / FREQ_PWM / Tr_cm);
// tetta_calc.k_t = _IQ(R_ROTOR / (L_M + L_SIGMA_R) / 2.0 / 3.14 / 50 / NORMA_FROTOR);
tetta_calc.k_r = _IQ(0.005168); //_IQ(0.015);
tetta_calc.k_t = _IQ(0.0074); //_IQ(0.0045);
tetta_calc.Imds = 0;
tetta_calc.theta = 0;
tetta_calc.hz_to_angle = _IQ(2.0 * PI * NORMA_FROTOR / FREQ_PWM);
}
//#pragma CODE_SECTION(calc_teta_Id,".fast_run");
void calc_teta_Id(_iq Frot, _iq Id, _iq Iq, _iq *theta_out, _iq *theta_to_slave, _iq *Fsl_out, _iq *Fstator_out,
unsigned int master, int reset) {
_iq Fsl, Fst;
_iq add_to_tic = 0;
_iq to_slave = 0;
if (reset) {
tetta_calc.Imds = 0;
}
tetta_calc.Imds = tetta_calc.Imds + _IQmpy(tetta_calc.k_r, (Id - tetta_calc.Imds));
if (master == MODE_SLAVE){
return;
}
Fsl = _IQmpy(tetta_calc.k_t, Iq);
if (tetta_calc.Imds != 0) {
Fsl = _IQdiv(Fsl, tetta_calc.Imds);
} else {
Fsl = 0;
}
if (Fsl > MAX_Ud_Pid_Out_Id) { Fsl = MAX_Ud_Pid_Out_Id;}
if (Fsl < -MAX_Ud_Pid_Out_Id) { Fsl = -MAX_Ud_Pid_Out_Id;}
// if (Fsl < 0) { Fsl = 0;}
Fst = Frot * POLUS + Fsl;
add_to_tic = _IQmpy(Fst, tetta_calc.hz_to_angle);
tetta_calc.theta += add_to_tic;
to_slave = tetta_calc.theta + add_to_tic;
if (tetta_calc.theta > CONST_IQ_2PI) {
tetta_calc.theta -= CONST_IQ_2PI;
} else if (tetta_calc.theta < 0) {
tetta_calc.theta += CONST_IQ_2PI;
}
if (to_slave > CONST_IQ_2PI) {
to_slave -= CONST_IQ_2PI;
} else if (to_slave < 0) {
to_slave += CONST_IQ_2PI;
}
*Fsl_out = Fsl;
*theta_out = tetta_calc.theta;
*theta_to_slave = to_slave;
*Fstator_out = Fst;
// logpar.log26 = (int16)(_IQtoIQ15(Fsl));
// logpar.log27 = (int16)(_IQtoIQ15(tetta_calc.Imds));
// logpar.log28 = (int16)(_IQtoIQ15(Iq));
// logpar.log3 = (int16)(_IQtoIQ15(Id));
}

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#ifndef TETA_CALC
#define TETA_CALC
#include "IQmathLib.h"
#include "pid_reg3.h"
void calc_teta_Id(_iq Frot, _iq Id, _iq Iq, _iq *tetta_out, _iq *theta_to_slave, _iq *Fsl_out, _iq *Fstator_out,
unsigned int master, int reset);
void init_teta_calc_struct(void);
// k_r = Ts / Tr_cm
// Tr_cm = Lr / Rr
// Lr - èíäóêòèâíîñòü ðîòîðà
// Rr - ñîïðîòèâëåíèå ðîòîðà
//
// k_t = 1 / (Tr_cm * 2 * Pi * f_b)
//  íàøåì ñëó÷àå f_b = NORMA_FROT
// K = Ts * f_b
// f_b - áàçîâàÿ ýëåêòðè÷åñêàÿ ÷àñòîòà (12 Ãö)
// Ts - ïåðèîä ðàñ÷¸òà (840 Ãö)
typedef struct {
_iq Imds;
_iq theta;
_iq hz_to_angle;
_iq k_r;
_iq k_t;
} TETTA_CALC;
#define TETTA_CALC_DEF {0,0,0,0,0}
extern TETTA_CALC tetta_calc;
#endif //TETA_CALC

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/*
* vector_control.c
*
* Created on: 16 íîÿá. 2020 ã.
* Author: star
*/
#include "IQmathLib.h"
#include "vector_control.h"
#include <adc_tools.h>
#include <edrk_main.h>
#include <master_slave.h>
#include <params_motor.h>
#include <params_norma.h>
#include <params_pwm24.h>
#include "math.h"
#include "mathlib.h"
#include "filter_v1.h"
#include "abc_to_dq.h"
#include "regul_power.h"
#include "regul_turns.h"
#include "teta_calc.h"
//#define CALC_TWO_WINDINGS
#define I_ZERO_LEVEL_IQ 27962 // 111848 ~ 20A //279620 ~ 50A //55924 ~ 10A
#pragma DATA_SECTION(vect_control,".fast_vars");
VECTOR_CONTROL vect_control = VECTOR_CONTROL_DEFAULTS;
void Idq_to_Udq_2_windings(_iq Id_zad, _iq Iq_zad,
_iq Id_measured1, _iq Iq_measured1, _iq* Ud_zad1, _iq* Uq_zad1,
_iq Id_measured2, _iq Iq_measured2, _iq* Ud_zad2, _iq* Uq_zad2, int reset);
void analog_Udq_calc(_iq Ud1, _iq Uq1, _iq Ud2, _iq Uq2);
void analog_dq_calc(_iq winding_displacement);
_iq calcId(_iq Iq_limit, _iq Iq, int reset, int prepare_stop_PWM);
inline void calcUdUqCompensation(_iq Frot);
void initVectorControl() {
vect_control.pidD1.Kp = _IQ(0.3);//_IQ(0.2);
vect_control.pidD1.Ki = _IQ(0.01);//_IQ(0.9);
vect_control.pidD1.OutMax = _IQ(0.9);
vect_control.pidD1.OutMin = -_IQ(0.9);
vect_control.pidQ1.Kp = _IQ(0.3);
vect_control.pidQ1.Ki = _IQ(0.01);
vect_control.pidQ1.OutMax = _IQ(0.9);
vect_control.pidQ1.OutMin = -_IQ(0.9);
vect_control.pidD2.Kp = _IQ(0.3);
vect_control.pidD2.Ki = _IQ(0.3);
vect_control.pidD2.OutMax = _IQ(0.9);
vect_control.pidD2.OutMin = -_IQ(0.9);
vect_control.pidQ2.Kp = _IQ(0.3);
vect_control.pidQ2.Ki = _IQ(0.3);
vect_control.pidQ2.OutMax = _IQ(0.9);
vect_control.pidQ2.OutMin = -_IQ(0.9);
// vect_control.iqId_nominal = _IQ(MOTOR_CURRENT_NOMINAL * sqrtf(1 - COS_FI * COS_FI) / NORMA_ACP);
vect_control.iqId_nominal = _IQ(MOTOR_CURRENT_NOMINAL * 0.4 / NORMA_ACP);
vect_control.iqId_min = _IQ(200 / NORMA_ACP);
vect_control.iqId_start = _IQ(200.0 / NORMA_ACP);
vect_control.koef_rmp_Id = (_iq)(vect_control.iqId_nominal / FREQ_PWM);
vect_control.koef_filt_I = _IQ(0.5);
vect_control.koef_Ud_comp = _IQ((L_SIGMA_S + L_M * L_SIGMA_R / (L_M + L_SIGMA_R)) * 2 * 3.14 * NORMA_FROTOR); //Lsigm_s + Lm*Lsigm_r / (Lm + Lsigm_r)
vect_control.koef_Uq_comp = _IQ((L_M + L_SIGMA_S) * 2 * 3.14 * NORMA_FROTOR); //Lm + Lsigm_s
// vect_control.koef_Ud_comp = _IQ(0.0002369 * 2 * 3.14 * NORMA_FROTOR); //Lsigm_s + Lm*Lsigm_r / (Lm + Lsigm_r)
// vect_control.koef_Uq_comp = _IQ(0.0043567 * 2 * 3.14 * NORMA_FROTOR); //Lm + Lsigm_s
vect_control.koef_zero_Uzad = _IQ(0.993); //_IQ(0.993); //_IQ(0.03);
init_Pvect();
init_Fvect();
init_teta_calc_struct();
}
void vectorControlConstId (_iq Pzad, _iq Fzad, int direction, _iq Frot,
int n_alg, unsigned int master, _iq mzz_zad,
_iq winding_displacement,
_iq theta_from_master, _iq Iq_from_master, _iq P_from_slave,
_iq *theta_to_slave, _iq *Iq_to_slave, _iq *P_to_master,
int reset, int prepare_stop_PWM) {
_iq Iq_zad = 0, Iq_zad_power = 0, Id_zad = 0;
_iq P_measured = 0;
static _iq Ud_zad1 = 0, Uq_zad1 = 0, Ud_zad2 = 0, Uq_zad2 = 0;
// if(direction < 0) { Frot = -Frot; }
if (reset) {
Ud_zad1 = 0;
Uq_zad1 = 0;
Ud_zad2 = 0;
Uq_zad2 = 0;
}
analog_dq_calc(winding_displacement);
P_measured = vect_control.iqPvsi1 + vect_control.iqPvsi2;
*P_to_master = P_measured;
P_measured += P_from_slave;
vector_power(Pzad, P_measured, n_alg, master, (vect_control.iqIq1 + vect_control.iqIq2),
edrk.zadanie.iq_Izad_rmp, &Iq_zad_power, reset);
vector_turns(Fzad, Frot, (vect_control.iqIq1 + vect_control.iqIq2),
Iq_zad_power, n_alg, master, &Iq_zad, reset);
Id_zad = calcId(edrk.zadanie.iq_Izad, Iq_zad, reset, prepare_stop_PWM);
if (master == MODE_SLAVE) {
vect_control.iqTheta = theta_from_master;
*theta_to_slave = theta_from_master;
Iq_zad = Iq_from_master;
Iq_zad_power = Iq_from_master;
} else {
// calc_teta_Id(Frot, vect_control.iqId1, vect_control.iqIq1, &vect_control.iqTheta, theta_to_slave,
// &vect_control.iqFsl, &vect_control.iqFstator, master, reset);
calc_teta_Id(Frot, Id_zad, Iq_zad, &vect_control.iqTheta, theta_to_slave,
&vect_control.iqFsl, &vect_control.iqFstator, master, reset);
}
calcUdUqCompensation(Frot);
if (prepare_stop_PWM && Id_zad == 0) {
vect_control.iqUdKm = _IQmpy(vect_control.iqUdKm, vect_control.koef_zero_Uzad);
vect_control.iqUqKm = _IQmpy(vect_control.iqUqKm, vect_control.koef_zero_Uzad);
} else {
Idq_to_Udq_2_windings((Id_zad >> 1), (Iq_zad >> 1),
vect_control.iqId1, vect_control.iqIq1, &Ud_zad1, &Uq_zad1,
vect_control.iqId2, vect_control.iqIq2, &Ud_zad2, &Uq_zad2, reset);
vect_control.iqUdKm = Ud_zad1 + vect_control.iqUdCompensation;
vect_control.iqUqKm = Uq_zad1 + vect_control.iqUqCompensation;
}
vect_control.sqrtIdq1 = _IQsqrt(_IQmpy(vect_control.iqId1, vect_control.iqId1) + _IQmpy(vect_control.iqIq1, vect_control.iqIq1));
analog_Udq_calc(Ud_zad1, Uq_zad1, Ud_zad2, Uq_zad2);
*Iq_to_slave = Iq_zad;
vect_control.Iq_zad1 = Iq_zad;
vect_control.Id_zad1 = Id_zad;
}
#pragma CODE_SECTION(analog_dq_calc,".fast_run");
void analog_dq_calc(_iq winding_displacement)
{
ABC_TO_DQ abc_dq_converter = ABC_TO_DQ_DEFAULTS;
abc_dq_converter.Ia = analog.iqIu_1;
abc_dq_converter.Ib = analog.iqIv_1;
abc_dq_converter.Ic = analog.iqIw_1;
abc_dq_converter.Tetta = vect_control.iqTheta + winding_displacement;
abc_dq_converter.calc(&abc_dq_converter);
vect_control.iqId1 = abc_dq_converter.Id;
vect_control.iqIq1 = abc_dq_converter.Iq;
vect_control.iqId1_filt = exp_regul_iq(vect_control.koef_filt_I, vect_control.iqId1_filt, vect_control.iqId1);
vect_control.iqIq1_filt = exp_regul_iq(vect_control.koef_filt_I, vect_control.iqIq1_filt, vect_control.iqIq1);
abc_dq_converter.Ia = analog.iqIu_2;
abc_dq_converter.Ib = analog.iqIv_2;
abc_dq_converter.Ic = analog.iqIw_2;
abc_dq_converter.Tetta = vect_control.iqTheta + winding_displacement;
abc_dq_converter.calc(&abc_dq_converter);
vect_control.iqId2 = abc_dq_converter.Id;
vect_control.iqIq2 = abc_dq_converter.Iq;
vect_control.iqId2_filt = exp_regul_iq(vect_control.koef_filt_I, vect_control.iqId2_filt, vect_control.iqId2);
vect_control.iqIq2_filt = exp_regul_iq(vect_control.koef_filt_I, vect_control.iqIq2_filt, vect_control.iqIq2);
if (_IQabs(vect_control.iqId1) < I_ZERO_LEVEL_IQ) { vect_control.iqId1 = 0; }
if (_IQabs(vect_control.iqIq1) < I_ZERO_LEVEL_IQ) { vect_control.iqIq1 = 0; }
if (_IQabs(vect_control.iqId2) < I_ZERO_LEVEL_IQ) { vect_control.iqId2 = 0; }
if (_IQabs(vect_control.iqIq2) < I_ZERO_LEVEL_IQ) { vect_control.iqIq2 = 0; }
vect_control.iqPvsi1 = _IQmpy(_IQmpy(vect_control.iqIq1, _IQabs(vect_control.iqUq1)), 25165824L);
vect_control.iqPvsi2 = _IQmpy(_IQmpy(vect_control.iqIq2, _IQabs(vect_control.iqUq2)), 25165824L);
}
#pragma CODE_SECTION(analog_dq_calc_external,".fast_run");
void analog_dq_calc_external(_iq winding_displacement, _iq theta)
{
ABC_TO_DQ abc_dq_converter = ABC_TO_DQ_DEFAULTS;
abc_dq_converter.Ia = analog.iqIu_1;
abc_dq_converter.Ib = analog.iqIv_1;
abc_dq_converter.Ic = analog.iqIw_1;
abc_dq_converter.Tetta = theta + winding_displacement;
abc_dq_converter.calc(&abc_dq_converter);
vect_control.iqId1 = abc_dq_converter.Id;
vect_control.iqIq1 = abc_dq_converter.Iq;
abc_dq_converter.Ia = analog.iqIu_2;
abc_dq_converter.Ib = analog.iqIv_2;
abc_dq_converter.Ic = analog.iqIw_2;
abc_dq_converter.Tetta = theta + winding_displacement;
abc_dq_converter.calc(&abc_dq_converter);
vect_control.iqId2 = abc_dq_converter.Id;
vect_control.iqIq2 = abc_dq_converter.Iq;
if (_IQabs(vect_control.iqId1) < I_ZERO_LEVEL_IQ) { vect_control.iqId1 = 0; }
if (_IQabs(vect_control.iqIq1) < I_ZERO_LEVEL_IQ) { vect_control.iqIq1 = 0; }
if (_IQabs(vect_control.iqId2) < I_ZERO_LEVEL_IQ) { vect_control.iqId2 = 0; }
if (_IQabs(vect_control.iqIq2) < I_ZERO_LEVEL_IQ) { vect_control.iqIq2 = 0; }
vect_control.iqPvsi1 = _IQmpy(_IQmpy(vect_control.iqIq1, _IQabs(vect_control.iqUq1)), 25165824L);
vect_control.iqPvsi2 = _IQmpy(_IQmpy(vect_control.iqIq2, _IQabs(vect_control.iqUq2)), 25165824L);
}
void Idq_to_Udq_2_windings(_iq Id_zad, _iq Iq_zad,
_iq Id_measured1, _iq Iq_measured1, _iq* Ud_zad1, _iq* Uq_zad1,
_iq Id_measured2, _iq Iq_measured2, _iq* Ud_zad2, _iq* Uq_zad2, int reset)
{
if (reset) {
vect_control.pidD1.Ui = 0;
vect_control.pidD1.Out = 0;
vect_control.pidQ1.Ui = 0;
vect_control.pidQ1.Out = 0;
#ifdef CALC_TWO_WINDINGS
vect_control.pidD2.Ui = 0;
vect_control.pidD2.Out = 0;
vect_control.pidQ2.Ui = 0;
vect_control.pidQ2.Out = 0;
#endif
}
vect_control.pidD1.Ref = Id_zad;
vect_control.pidD1.Fdb = Id_measured1;
vect_control.pidD1.calc(&vect_control.pidD1);
*Ud_zad1 = vect_control.pidD1.Out;
vect_control.pidQ1.Ref = Iq_zad;
vect_control.pidQ1.Fdb = Iq_measured1;
vect_control.pidQ1.calc(&vect_control.pidQ1);
*Uq_zad1 = vect_control.pidQ1.Out;
#ifdef CALC_TWO_WINDINGS
vect_control.pidD2.Ref = Id_zad;
vect_control.pidD2.Fdb = Id_measured2;
vect_control.pidD2.calc(&vect_control.pidD2);
*Ud_zad2 = vect_control.pidD2.Out;
vect_control.pidQ2.Ref = Iq_zad;
vect_control.pidQ2.Fdb = Iq_measured2;
vect_control.pidQ2.calc(&vect_control.pidQ2);
*Uq_zad2 = vect_control.pidQ2.Out;
#else
*Ud_zad2 = *Ud_zad1;
*Uq_zad2 = *Ud_zad1;
// *Uq_zad2 = *Uq_zad1;
#endif
}
#pragma CODE_SECTION(analog_Udq_calc,".fast_run");
void analog_Udq_calc(_iq Ud1, _iq Uq1, _iq Ud2, _iq Uq2)
{
_iq Uzpt = filter.iqU_1_long + filter.iqU_2_long;
vect_control.iqUd1 = _IQmpy(Ud1, _IQmpy(Uzpt, 8388608L)); // 8388608 = _IQ(0.5)
vect_control.iqUq1 = _IQmpy(Uq1, _IQmpy(Uzpt, 8388608L));
vect_control.iqUd2 = _IQmpy(Ud2, _IQmpy(Uzpt, 8388608L));
vect_control.iqUq2 = _IQmpy(Uq2, _IQmpy(Uzpt, 8388608L));
}
_iq calcId(_iq Iq_limit, _iq Iq, int reset, int prepare_stop_PWM) {
static _iq Id_rmp = 0;
_iq Id_zad = 0;
if (reset) {
Id_rmp = 0;
}
if (prepare_stop_PWM) {
Id_zad = 0;
} else if (Iq < vect_control.iqId_min) {
Id_zad = vect_control.iqId_min;
} else if (Iq > vect_control.iqId_nominal) {
Id_zad = vect_control.iqId_nominal;
} else {
Id_zad = Iq;
}
// Id_zad = Iq_limit < vect_control.iqId_nominal ? Iq_limit : vect_control.iqId_nominal;
Id_rmp = zad_intensiv_q(vect_control.koef_rmp_Id, vect_control.koef_rmp_Id << 1, Id_rmp, Id_zad);
return Id_rmp;
}
void calcUdUqCompensation(_iq Frot) {
_iq Uzpt = (filter.iqU_1_long + filter.iqU_2_long) >> 1;
_iq UdVolt = _IQmpy(_IQmpy(Frot, vect_control.koef_Ud_comp), vect_control.iqIq1 + vect_control.iqIq2);
_iq UqVolt = _IQmpy(_IQmpy(Frot, vect_control.koef_Uq_comp), vect_control.iqId1 + vect_control.iqId2);
vect_control.iqUdCompensation = -_IQdiv(UdVolt, Uzpt);
vect_control.iqUqCompensation = _IQdiv(UqVolt, Uzpt);
}

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/*
* vector_control.h
*
* Created on: 16 íîÿá. 2020 ã.
* Author: star
*/
#ifndef SRC_VECTORCONTROL_NIO12_VECTOR_CONTROL_H_
#define SRC_VECTORCONTROL_NIO12_VECTOR_CONTROL_H_
#include "pid_reg3.h"
#include "regul_power.h"
#include "regul_turns.h"
typedef struct {
PIDREG3 pidD1;
PIDREG3 pidQ1;
PIDREG3 pidD2;
PIDREG3 pidQ2;
_iq iqId1;
_iq iqIq1;
_iq iqId2;
_iq iqIq2;
_iq iqUd1;
_iq iqUq1;
_iq iqUd2;
_iq iqUq2;
_iq iqUdKm;
_iq iqUqKm;
_iq iqUdCompensation;
_iq iqUqCompensation;
_iq iqId1_filt;
_iq iqIq1_filt;
_iq iqId2_filt;
_iq iqIq2_filt;
_iq iqPvsi1;
_iq iqPvsi2;
_iq iqTheta;
_iq iqFsl;
_iq iqFstator;
_iq iqId_nominal;
_iq iqId_min;
_iq iqId_start;
_iq koef_rmp_Id;
_iq koef_filt_I;
_iq koef_Ud_comp;
_iq koef_Uq_comp;
_iq koef_zero_Uzad;
_iq add_tetta;
_iq sqrtIdq1;
_iq sqrtIdq2;
_iq Iq_zad1;
_iq Id_zad1;
_iq add_bpsi;
} VECTOR_CONTROL;
#define VECTOR_CONTROL_DEFAULTS {PIDREG3_DEFAULTS, PIDREG3_DEFAULTS, \
PIDREG3_DEFAULTS, PIDREG3_DEFAULTS, \
0,0,0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0, \
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}
void vectorControlConstId (_iq Pzad, _iq Fzad, int direction, _iq Frot,
int n_alg, unsigned int master, _iq mzz_zad,
_iq winding_displacement,
_iq theta_from_master, _iq Iq_from_master, _iq P_from_slave,
_iq *theta_to_slave, _iq *Iq_to_slave, _iq *P_to_master,
int reset, int prepare_stop_PWM);
void analog_dq_calc_external(_iq winding_displacement, _iq theta);
void initVectorControl();
extern VECTOR_CONTROL vect_control;
#endif /* SRC_VECTORCONTROL_NIO12_VECTOR_CONTROL_H_ */

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// TI File $Revision: /main/3 $
// Checkin $Date: July 2, 2007 11:32:13 $
//###########################################################################
//
// FILE: Example_281xEvTimerPeriod.c
//
// TITLE: DSP281x Event Manager GP Timer example program.
//
// ASSUMPTIONS:
//
// This program requires the DSP281x V1.00 header files.
// As supplied, this project is configured for "boot to H0" operation.
//
// Other then boot mode pin configuration, no other hardware configuration
// is required.
//
// DESCRIPTION:
//
// This program sets up EVA Timer 1, EVA Timer 2, EVB Timer 3
// and EVB Timer 4 to fire an interrupt on a period overflow.
// A count is kept each time each interrupt passes through
// the interrupt service routine.
//
// EVA Timer 1 has the shortest period while EVB Timer4 has the
// longest period.
//
// Watch Variables:
//
// EvaTimer1InterruptCount;
// EvaTimer2InterruptCount;
// EvbTimer3InterruptCount;
// EvbTimer4InterruptCount;
//
//###########################################################################
// $TI Release: DSP281x C/C++ Header Files V1.20 $
// $Release Date: July 27, 2009 $
//###########################################################################
#include "DSP281x_Device.h" // DSP281x Headerfile Include File
#include "DSP281x_Examples.h" // DSP281x Examples Include File
#include <281xEvTimersInit.h>
#include <f281xbmsk.h>
#include "TuneUpPlane.h"
#include "profile_interrupt.h"
// Prototype statements for functions found within this file.
interrupt void eva_timer1_isr(void);
interrupt void eva_timer2_isr(void);
interrupt void evb_timer3_isr(void);
interrupt void evb_timer4_isr(void);
// Global counts used in this example
Uint32 EvaTimer1InterruptCount = 0;
Uint32 EvaTimer2InterruptCount = 0;
Uint32 EvbTimer3InterruptCount = 0;
Uint32 EvbTimer4InterruptCount = 0;
//unsigned int enable_profile_led1_Timer1 = 1;
//unsigned int enable_profile_led1_Timer2 = 1;
//unsigned int enable_profile_led1_Timer3 = 1;
//unsigned int enable_profile_led1_Timer4 = 1;
//
//unsigned int enable_profile_led2_Timer1 = 0;
//unsigned int enable_profile_led2_Timer2 = 0;
//unsigned int enable_profile_led2_Timer3 = 0;
//unsigned int enable_profile_led2_Timer4 = 0;
//Pointers to handler functions
void (*timer1_handler)() = NULL;
void (*timer2_handler)() = NULL;
void (*timer3_handler)() = NULL;
void (*timer4_handler)() = NULL;
///////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////
void init_eva_timer1(int freq, void (*timer_handler)())
{
// Initialize EVA Timer 1:
// Setup Timer 1 Registers (EV A)
EvaRegs.GPTCONA.all = 0;
// Set the Period for the GP timer 1 to 0x0200;
EvaRegs.T1PR = 0x0200; // Period
EvaRegs.T1CMPR = 0x0000; // Compare Reg
// Enable Period interrupt bits for GP timer 1
// Count up, x128, internal clk, enable compare, use own period
EvaRegs.EVAIMRA.bit.T1PINT = 0;//1;
EvaRegs.EVAIFRA.all = BIT7;
// EvaRegs.EVAIFRA.bit.T1PINT = 1;
// Clear the counter for GP timer 1
EvaRegs.T1CNT = 0x0000;
// EvaRegs.T1PR = (float64)HSPCLK/(float64)(freq / 2);
EvaRegs.T1PR = (float64)HSPCLK/(float64)(freq);
EvaRegs.T1CON.all = FREE_RUN_FLAG + TIMER_CONT_UP + TIMER_CLK_PRESCALE_X_1
+ TIMER_ENABLE_BY_OWN + TIMER_ENABLE + TIMER_ENABLE_COMPARE; //
// Start EVA ADC Conversion on timer 1 Period interrupt
EvaRegs.GPTCONA.bit.T1TOADC = 2;
// Save pointer to handler in variable
timer1_handler = timer_handler;
EALLOW; // This is needed to write to EALLOW protected registers
PieVectTable.T1PINT = &eva_timer1_isr;
EDIS; // This is needed to disable write to EALLOW protected registers
// Enable PIE group 2 interrupt 4 for T1PINT
// PieCtrlRegs.PIEIER2.all = M_INT4;
PieCtrlRegs.PIEIER2.bit.INTx4 = 1;
// Enable CPU INT2 for T1PINT, INT3 for T2PINT, INT4 for T3PINT
// and INT5 for T4PINT:
// IER |= M_INT2;
}
void stop_eva_timer1()
{
IER &= ~(M_INT2);
EvaRegs.EVAIMRA.bit.T1PINT = 0;
}
void start_eva_timer1()
{
IER |= (M_INT2);
EvaRegs.EVAIFRA.all = BIT7;
EvaRegs.EVAIMRA.bit.T1PINT = 1;
}
///////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////
void init_eva_timer2(int freq, void (*timer_handler)())
{
// Initialize EVA Timer 2:
// Setup Timer 2 Registers (EV A)
EvaRegs.GPTCONA.all = 0;
// Set the Period for the GP timer 2 to 0x0200;
EvaRegs.T2PR = 0x0400; // Period
EvaRegs.T2CMPR = 0x0000; // Compare Reg
// Enable Period interrupt bits for GP timer 2
// Count up, x128, internal clk, enable compare, use own period
EvaRegs.EVAIMRB.bit.T2PINT = 0;//1;
EvaRegs.EVAIFRB.all = BIT0;
// EvaRegs.EVAIFRB.bit.T2PINT = 1;
// Clear the counter for GP timer 2
EvaRegs.T2CNT = 0x0000;
// EvaRegs.T2PR = (float64)HSPCLK/(float64)(freq / 2);
EvaRegs.T2PR = (float64)HSPCLK/(float64)(freq);
EvaRegs.T2CON.all = FREE_RUN_FLAG + TIMER_CONT_UP + TIMER_CLK_PRESCALE_X_1
+ TIMER_ENABLE_BY_OWN + TIMER_ENABLE + TIMER_ENABLE_COMPARE; //
// Start EVA ADC Conversion on timer 2 Period interrupt
EvaRegs.GPTCONA.bit.T2TOADC = 2;
// Save pointer to handler in variable
timer2_handler = timer_handler;
EALLOW; // This is needed to write to EALLOW protected registers
PieVectTable.T2PINT = &eva_timer2_isr;
EDIS; // This is needed to disable write to EALLOW protected registers
// Enable PIE group 3 interrupt 1 for T2PINT
// PieCtrlRegs.PIEIER3.all = M_INT1;
PieCtrlRegs.PIEIER3.bit.INTx1 = 1;//M_INT1;
// Enable CPU INT2 for T1PINT, INT3 for T2PINT, INT4 for T3PINT
// and INT5 for T4PINT:
// IER |= (M_INT3);
}
void stop_eva_timer2()
{
IER &= ~(M_INT3);
EvaRegs.EVAIMRB.bit.T2PINT = 0;
}
void start_eva_timer2()
{
IER |= (M_INT3);
EvaRegs.EVAIFRB.all = BIT0;
EvaRegs.EVAIMRB.bit.T2PINT = 1;
}
///////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////
void init_evb_timer3(int freq, void (*timer_handler)())
{
// Initialize EVB Timer 3:
// Setup Timer 3 Registers (EV B)
EvbRegs.GPTCONB.all = 0;
// Set the Period for the GP timer 3 to 0x0200;
EvbRegs.T3PR = 0x0800; // Period
EvbRegs.T3CMPR = 0x0000; // Compare Reg
// Enable Period interrupt bits for GP timer 3
// Count up, x128, internal clk, enable compare, use own period
EvbRegs.EVBIMRA.bit.T3PINT = 0;//1;
EvbRegs.EVBIFRA.all = BIT7;
// EvbRegs.EVBIFRA.bit.T3PINT = 1;
// Clear the counter for GP timer 3
EvbRegs.T3CNT = 0x0000;
// EvbRegs.T3PR = (float64)HSPCLK/(float64)(freq / 2);
EvbRegs.T3PR = (float64)HSPCLK/(float64)(freq);
EvbRegs.T3CON.all = FREE_RUN_FLAG + TIMER_CONT_UP + TIMER_CLK_PRESCALE_X_1
+ TIMER_ENABLE_BY_OWN + TIMER_ENABLE + TIMER_ENABLE_COMPARE;
// EvbRegs.T3CON.all = SOFT_STOP_FLAG + TIMER_CONT_UP + TIMER_CLK_PRESCALE_X_1
// + TIMER_ENABLE_BY_OWN + TIMER_ENABLE + TIMER_ENABLE_COMPARE;
// Save pointer to handler in variable
timer3_handler = timer_handler;
// Start EVA ADC Conversion on timer 3 Period interrupt
EvbRegs.GPTCONB.bit.T3TOADC = 2;
EALLOW; // This is needed to write to EALLOW protected registers
PieVectTable.T3PINT = &evb_timer3_isr;
EDIS; // This is needed to disable write to EALLOW protected registers
// Enable PIE group 4 interrupt 4 for T3PINT
// PieCtrlRegs.PIEIER4.all = M_INT4;
PieCtrlRegs.PIEIER4.bit.INTx4 = 1;
// Enable CPU INT2 for T1PINT, INT3 for T2PINT, INT4 for T3PINT
// and INT5 for T4PINT:
// IER |= M_INT4;
}
void stop_evb_timer3()
{
IER &= ~(M_INT4);
EvbRegs.EVBIMRA.bit.T3PINT = 0;
}
void start_evb_timer3()
{
IER |= (M_INT4);
// Make sure PIEACK for group 2 is clear (default after reset)
// PieCtrlRegs.PIEACK.all = M_INT4;
EvbRegs.EVBIFRA.all = BIT7;
EvbRegs.EVBIMRA.bit.T3PINT = 1;
}
///////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////
void init_evb_timer4(int freq, void (*timer_handler)())
{
// Initialize EVB Timer 4:
// Setup Timer 4 Registers (EV B)
EvbRegs.GPTCONB.all = 0;
// Set the Period for the GP timer 4 to 0x0200;
EvbRegs.T4PR = 0x1000; // Period
EvbRegs.T4CMPR = 0x0000; // Compare Reg
// Enable Period interrupt bits for GP timer 4
// Count up, x128, internal clk, enable compare, use own period
EvbRegs.EVBIMRB.bit.T4PINT = 0;//1;
EvbRegs.EVBIFRB.all = BIT0;
// EvbRegs.EVBIFRB.bit.T4PINT = 1;
// Clear the counter for GP timer 4
EvbRegs.T4CNT = 0x0000;
// EvbRegs.T4PR = (float64)HSPCLK/(float64)(freq / 2);
EvbRegs.T4PR = (float64)HSPCLK/(float64)(freq);
EvbRegs.T4CON.all = FREE_RUN_FLAG + TIMER_CONT_UP + TIMER_CLK_PRESCALE_X_1
+ TIMER_ENABLE_BY_OWN + TIMER_ENABLE + TIMER_ENABLE_COMPARE;
// Start EVA ADC Conversion on timer 4 Period interrupt
EvbRegs.GPTCONB.bit.T4TOADC = 2;
// Save pointer to handler in variable
timer4_handler = timer_handler;
EALLOW; // This is needed to write to EALLOW protected registers
PieVectTable.T4PINT = &evb_timer4_isr;
EDIS; // This is needed to disable write to EALLOW protected registers
// Enable PIE group 5 interrupt 1 for T4PINT
// PieCtrlRegs.PIEIER5.all = M_INT1;
PieCtrlRegs.PIEIER5.bit.INTx1 = 1;
// Enable CPU INT2 for T1PINT, INT3 for T2PINT, INT4 for T3PINT
// and INT5 for T4PINT:
// IER |= M_INT5;
}
void stop_evb_timer4()
{
IER &= ~(M_INT5);
EvbRegs.EVBIMRB.bit.T4PINT = 0;
}
void start_evb_timer4()
{
IER |= (M_INT5);
EvbRegs.EVBIFRB.all = BIT0;
EvbRegs.EVBIMRB.bit.T4PINT = 1;
}
///////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////
#pragma CODE_SECTION(eva_timer1_isr,".fast_run2");
interrupt void eva_timer1_isr(void)
{
// Set interrupt priority:
volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER2.all;
IER |= M_INT2;
IER &= MINT2; // Set "global" priority
PieCtrlRegs.PIEIER2.all &= MG24; // Set "group" priority
PieCtrlRegs.PIEACK.all = 0xFFFF; // Enable PIE interrupts
#if (_ENABLE_INTERRUPT_PROFILE_LED1)
if (profile_interrupt.for_led1.bits.timer1)
i_led1_on_off_special(1);
#endif
#if (_ENABLE_INTERRUPT_PROFILE_LED2)
if (profile_interrupt.for_led2.bits.timer1)
i_led2_on_off_special(1);
#endif
EINT;
// Insert ISR Code here.......
if(timer1_handler)
{
timer1_handler();
}
// Next line for debug only (remove after inserting ISR Code):
// ESTOP0;
EvaRegs.EVAIFRA.all = BIT7;
// Restore registers saved:
DINT;
PieCtrlRegs.PIEIER2.all = TempPIEIER;
#if (_ENABLE_INTERRUPT_PROFILE_LED1)
if (profile_interrupt.for_led1.bits.timer1)
i_led1_on_off_special(0);
#endif
#if (_ENABLE_INTERRUPT_PROFILE_LED2)
if (profile_interrupt.for_led2.bits.timer1)
i_led2_on_off_special(0);
#endif
//
//
// IER &= ~(M_INT2);// stop_eva_timer1();
// // Enable more interrupts from this timer
// EvaRegs.EVAIMRA.bit.T1PINT = 1;
//
// // Note: To be safe, use a mask value to write to the entire
// // EVAIFRA register. Writing to one bit will cause a read-modify-write
// // operation that may have the result of writing 1's to clear
// // bits other then those intended.
//// EvaRegs.EVAIFRA.bit.T1PINT = 1;
// EvaRegs.EVAIFRA.all = BIT7;
//
// // Acknowledge interrupt to receive more interrupts from PIE group 2
// PieCtrlRegs.PIEACK.all = PIEACK_GROUP2;
//
// // EINT;
//
//
// if(timer1_handler)
// {
// timer1_handler();
// }
// DINT;
// IER |= (M_INT2);//start_eva_timer1();
}
///////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////
#pragma CODE_SECTION(eva_timer2_isr,".fast_run2");
interrupt void eva_timer2_isr(void)
{
// Set interrupt priority:
volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER3.all;
IER |= M_INT3;
IER &= MINT3; // Set "global" priority
PieCtrlRegs.PIEIER3.all &= MG31; // Set "group" priority
PieCtrlRegs.PIEACK.all = 0xFFFF; // Enable PIE interrupts
#if (_ENABLE_INTERRUPT_PROFILE_LED1)
if (profile_interrupt.for_led1.bits.timer2)
i_led1_on_off_special(1);
#endif
#if (_ENABLE_INTERRUPT_PROFILE_LED2)
if (profile_interrupt.for_led2.bits.timer2)
i_led2_on_off_special(1);
#endif
EINT;
// Insert ISR Code here.......
if(timer2_handler)
{
timer2_handler();
}
// Next line for debug only (remove after inserting ISR Code):
// ESTOP0;
EvaRegs.EVAIFRB.all = BIT0;
// Restore registers saved:
DINT;
PieCtrlRegs.PIEIER3.all = TempPIEIER;
#if (_ENABLE_INTERRUPT_PROFILE_LED1)
if (profile_interrupt.for_led1.bits.timer2)
i_led1_on_off_special(0);
#endif
#if (_ENABLE_INTERRUPT_PROFILE_LED2)
if (profile_interrupt.for_led2.bits.timer2)
i_led2_on_off_special(0);
#endif
//
//
// // IER &= ~(M_INT3);// stop_eva_timer2();
//
// // Enable more interrupts from this timer
// EvaRegs.EVAIMRB.bit.T2PINT = 1;
//
// // Note: To be safe, use a mask value to write to the entire
// // EVAIFRB register. Writing to one bit will cause a read-modify-write
// // operation that may have the result of writing 1's to clear
// // bits other then those intended.
// EvaRegs.EVAIFRB.all = BIT0;
//// EvaRegs.EVAIFRB.bit.T2PINT = 1;
//
//
// // Acknowledge interrupt to receive more interrupts from PIE group 3
// PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
//
//
//// EnableInterrupts();
//
// if(timer2_handler)
// {
// timer2_handler();
// }
// DINT;
// IER |= (M_INT3);//start_eva_timer2();
}
///////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////
#pragma CODE_SECTION(evb_timer3_isr,".fast_run2");
interrupt void evb_timer3_isr(void)
{
// Set interrupt priority:
volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER4.all;
IER |= M_INT4;
IER &= MINT4; // Set "global" priority
PieCtrlRegs.PIEIER4.all &= MG44; // Set "group" priority
PieCtrlRegs.PIEACK.all = 0xFFFF; // Enable PIE interrupts
#if (_ENABLE_INTERRUPT_PROFILE_LED1)
if (profile_interrupt.for_led1.bits.timer3)
i_led1_on_off_special(1);
#endif
#if (_ENABLE_INTERRUPT_PROFILE_LED2)
if (profile_interrupt.for_led2.bits.timer3)
i_led2_on_off_special(1);
#endif
EINT;
// Insert ISR Code here.......
if(timer3_handler)
{
timer3_handler();
}
// Next line for debug only (remove after inserting ISR Code):
// ESTOP0;
// EvbRegs.EVBIMRA.bit.T3PINT = 1;
EvbRegs.EVBIFRA.all = BIT7;
// PieCtrlRegs.PIEACK.all = PIEACK_GROUP4; // Enable PIE interrupts
// Restore registers saved:
DINT;
PieCtrlRegs.PIEIER4.all = TempPIEIER;
#if (_ENABLE_INTERRUPT_PROFILE_LED1)
if (profile_interrupt.for_led1.bits.timer3)
i_led1_on_off_special(0);
#endif
#if (_ENABLE_INTERRUPT_PROFILE_LED2)
if (profile_interrupt.for_led2.bits.timer3)
i_led2_on_off_special(0);
#endif
//
//
// IER &= ~(M_INT4);//stop_evb_timer3();
//
// // Enable more interrupts from this timer
// EvbRegs.EVBIMRA.bit.T3PINT = 1;
//
//
// // IER &= ~(M_INT4);
// //EvbTimer3InterruptCount++;
// // Note: To be safe, use a mask value to write to the entire
// // EVBIFRA register. Writing to one bit will cause a read-modify-write
// // operation that may have the result of writing 1's to clear
// // bits other then those intended.
// EvbRegs.EVBIFRA.all = BIT7;
//
// // Acknowledge interrupt to receive more interrupts from PIE group 4
// PieCtrlRegs.PIEACK.all = PIEACK_GROUP4;
//
// EINT;
//
//
// if(timer3_handler)
// {
// timer3_handler();
// }
// // IFR &= ~(M_INT4); // î÷èñòèì åñëè âäðóã ïðåðûâàíèå óæå ïðèøëî!
// // IER |= (M_INT4);
//
// DINT;
// IER |= (M_INT4);//start_evb_timer3();
}
///////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////
#pragma CODE_SECTION(evb_timer4_isr,".fast_run2");
interrupt void evb_timer4_isr(void)
{
// Set interrupt priority:
volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER5.all;
IER |= M_INT5;
IER &= MINT5; // Set "global" priority
PieCtrlRegs.PIEIER5.all &= MG51; // Set "group" priority
PieCtrlRegs.PIEACK.all = 0xFFFF; // Enable PIE interrupts
#if (_ENABLE_INTERRUPT_PROFILE_LED1)
if (profile_interrupt.for_led1.bits.timer4)
i_led1_on_off_special(1);
#endif
#if (_ENABLE_INTERRUPT_PROFILE_LED2)
if (profile_interrupt.for_led2.bits.timer4)
i_led2_on_off_special(1);
#endif
EINT;
// Insert ISR Code here.......
if(timer4_handler)
{
timer4_handler();
}
// Next line for debug only (remove after inserting ISR Code):
// ESTOP0;
EvbRegs.EVBIFRB.all = BIT0;
// Restore registers saved:
DINT;
PieCtrlRegs.PIEIER5.all = TempPIEIER;
#if (_ENABLE_INTERRUPT_PROFILE_LED1)
if (profile_interrupt.for_led1.bits.timer4)
i_led1_on_off_special(0);
#endif
#if (_ENABLE_INTERRUPT_PROFILE_LED2)
if (profile_interrupt.for_led2.bits.timer4)
i_led2_on_off_special(0);
#endif
//
//
//
// IER &= ~(M_INT5);//stop_evb_timer4();
//
// EvbRegs.EVBIMRB.bit.T4PINT = 1;
// //EvbTimer4InterruptCount++;
// // Note: To be safe, use a mask value to write to the entire
// // EVBIFRB register. Writing to one bit will cause a read-modify-write
// // operation that may have the result of writing 1's to clear
// // bits other then those intended.
// EvbRegs.EVBIFRB.all = BIT0;
//
// // Acknowledge interrupt to receive more interrupts from PIE group 5
// PieCtrlRegs.PIEACK.all = PIEACK_GROUP5;
// EINT;
//
//
// if(timer4_handler)
// {
// timer4_handler();
// }
//
// DINT;
// IER |= (M_INT5);//start_evb_timer4();
}
///////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////
//===========================================================================
// No more.
//===========================================================================

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#ifndef EV_TIMERS
#define EV_TIMERS
void init_eva_timer1(int freqHz, void (*timer_handler)());
void init_eva_timer2(int freqHz, void (*timer_handler)());
void init_evb_timer3(int freqHz, void (*timer_handler)());
void init_evb_timer4(int freqHz, void (*timer_handler)());
void start_eva_timer1();
void stop_eva_timer1();
void start_eva_timer2();
void stop_eva_timer2();
void start_evb_timer3();
void stop_evb_timer3();
void start_evb_timer4();
void stop_evb_timer4();
#endif //EV_TIMERS

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/*
* CAN_project.h
*
* Created on: 21 ìàÿ 2020 ã.
* Author: yura
*/
#ifndef SRC_MAIN_CAN_PROJECT_H_
#define SRC_MAIN_CAN_PROJECT_H_
#include "can_protocol_ukss.h"
//////////////////////////////////////////////////////////////////
// íàñòðîéêà áàçîâûõ àäðåñîâ CAN
// PCH_1 èëè PCH_2 âûáèðàåòñÿ äæàìïåðîâ íà ÏÌ67
//////////////////////////////////////////////////////////////////
#define CAN_BASE_ADR_MPU_PCH_1 0x0CEB0E1
#define CAN_BASE_ADR_MPU_PCH_2 0x0CEB0E1 //0x0CEB0E2
//////////////////////////////////////
#define CAN_BASE_ADR_TERMINAL_PCH_1 0x0EEEE01
#define CAN_BASE_ADR_TERMINAL_PCH_2 0x0EEEE03
//////////////////////////////////////
#define CAN_BASE_ADR_UNITS_PCH_1 0x235500
#define CAN_BASE_ADR_UNITS_PCH_2 0x235500
//////////////////////////////////////
#define CAN_BASE_ADR_ALARM_LOG_PCH_1 0x0BCDEF01
#define CAN_BASE_ADR_ALARM_LOG_PCH_2 0x0BCDEF02
//////////////////////////////////////////////////////////////////
//#define CAN_PROTOCOL_VERSION 1
#define CAN_PROTOCOL_VERSION 2
#define CAN_SPEED_BITS 125000
//#define CAN_SPEED_BITS 250000
//#define CAN_SPEED_BITS 500000
#define ENABLE_CAN_SEND_TO_UKSS_FROM_MAIN 1
#define ENABLE_CAN_SEND_TO_MPU_FROM_MAIN 1
#define ENABLE_CAN_SEND_TO_TERMINAL_FROM_MAIN 0//1
#define ENABLE_CAN_SEND_TO_TERMINAL_OSCIL 0//1
#define ENABLE_CAN_SEND_TO_ANOTHER_BSU_FROM_MAIN 1
//////////////////////////////////////////////////////
#ifndef ENABLE_CAN_SEND_TO_UKSS_FROM_MAIN
#define ENABLE_CAN_SEND_TO_UKSS_FROM_MAIN 0
#endif
#ifndef ENABLE_CAN_SEND_TO_MPU_FROM_MAIN
#define ENABLE_CAN_SEND_TO_MPU_FROM_MAIN 0
#endif
#ifndef ENABLE_CAN_SEND_TO_TERMINAL_FROM_MAIN
#define ENABLE_CAN_SEND_TO_TERMINAL_FROM_MAIN 0
#endif
#ifndef ENABLE_CAN_SEND_TO_TERMINAL_OSCIL
#define ENABLE_CAN_SEND_TO_TERMINAL_OSCIL 0
#endif
#ifndef ENABLE_CAN_SEND_TO_ANOTHER_BSU_FROM_MAIN
#define ENABLE_CAN_SEND_TO_ANOTHER_BSU_FROM_MAIN 0
#endif
///////////////////////////////////////////////////////////////////
// setup ukss boxs
///////////////////////////////////////////////////////////////////
// íàäî ðàçðåìàðèòü óñòðîéñòâà êîòîðûå èñïîëüçóþòñÿ
#define USE_UKSS_0 1
#define USE_UKSS_1 1
#define USE_UKSS_2 1
#define USE_UKSS_3 1
#define USE_UKSS_4 1
//#define USE_UKSS_5 1
//#define USE_UKSS_6 1
//#define USE_UKSS_7 1
//#define USE_UKSS_8 1
//#define USE_UKSS_9 1
//#define USE_UKSS_10 1
//#define USE_UKSS_11 1
//#define USE_UKSS_12 1
//#define USE_UKSS_13 1
//#define USE_UKSS_14 1
//#define USE_UKSS_15 1
#define OFFSET_CAN_ADR_UNITS 0x10
// Äàåì îñìûñëåííûå íàçâàíèÿ ÿùèêàì
#if USE_UKSS_0
#define ZADATCHIK_CAN 0 //Zadatchik
#endif
#if USE_UKSS_1
#define VPU_CAN 1 //VPU
#endif
#if USE_UKSS_2
#define UMU_CAN_DEVICE 2 //Voltage control UMU
#endif
#if USE_UKSS_3
#define BKSSD_CAN_DEVICE 3 //AC DRIVE
#endif
#if USE_UKSS_4
#define ANOTHER_BSU1_CAN_DEVICE 4 //Another BSU1
// Unites revers box or not
// revers box used only on CAN between BS1 BS2
//#define USE_R_B_4 1 //0
#endif
//#if USE_UKSS_5
//#define ANOTHER_BSU2_CAN_DEVICE 5 //Another BSU2
//// Unites revers box or not
//// revers box used only on CAN between BS1 BS2
////#define USE_R_B_5 1 //0
//#endif
///////////////////////////////////////////////////////////////////
// setup mpu boxes
///////////////////////////////////////////////////////////////////
// íàäî ðàçðåìàðèòü óñòðîéñòâà êîòîðûå èñïîëüçóþòñÿ
#define USE_MPU_0 1
#define USE_MPU_1 1
//#define USE_MPU_2 1
//#define USE_MPU_3 1
#define OFFSET_CAN_ADR_MPU 0x10
//#define MPU_CAN_DEVICE 2 // MPU
#define TIME_PAUSE_CAN_FROM_MPU 1000
///////////////////////////////////////////////////////////////////
// setup terminal boxes
///////////////////////////////////////////////////////////////////
// íàäî ðàçðåìàðèòü óñòðîéñòâà êîòîðûå èñïîëüçóþòñÿ
#define USE_TERMINAL_1_OSCIL 1
#define USE_TERMINAL_1_CMD 1
#define USE_TERMINAL_2_OSCIL 1
#define USE_TERMINAL_2_CMD 1
#define OFFSET_CAN_ADR_TERMINAL 0x10
#define TIME_PAUSE_CAN_FROM_TERMINAL 2
///////////////////////////////////////////////////////////////////
// setup ALARM_LOG box
///////////////////////////////////////////////////////////////////
#define USE_ALARM_LOG_0 1
///////////////////////////////////////////////////////////////////
// setup can_open boxes
///////////////////////////////////////////////////////////////////
//#define BWC_CAN_DEVICE 7 // Water cooler
//#define INGITIM 9
//#define BWC_CAN_FATEC 1
//#define BWC_CAN_SIEMENS 1
//#define INGITIM_CAN_OPEN 1
#define CANOPENUNIT_LEN 30
/////////words from zadatchik from Ingitim
#define PDO1_W1_ADR 0x11
#define PDO1_W2_ADR 0x12
#define PDO1_W3_ADR 0x13
#define PDO1_W4_ADR 0x14
#define PDO2_W1_ADR 0x15
#define PDO2_W2_ADR 0x16
#define PDO2_W3_ADR 0x17
#define PDO2_W4_ADR 0x18
#define PDO3_W1_ADR 0x19
#define PDO3_W2_ADR 0x1A
#define PDO3_W3_ADR 0x1B
#define PDO3_W4_ADR 0x1C
#define PDO5_W1_ADR 0x1D
#define PDO5_W2_ADR 0x1E
#define PDO5_W3_ADR 0x1F
#define PDO5_W4_ADR 0x20
#define PDO6_W1_ADR 0x21
#define PDO6_W2_ADR 0x22
#define PDO6_W3_ADR 0x23
#define PDO6_W4_ADR 0x24
//////////////////////////////////////
///////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////
#define UNITS_NUMERATION_FROM_0_OR_1 0 //1
#define MAX_CAN_WAIT_TIMEOUT 7500 // 2500
//-------------------------------------------------//
//#define CAN_ADR_TEST_LAMP 0x0CE031 //0x1CE030
///////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////
// äëÿ ukss äåôàéíû
//////////////////////////////////////////////////////////////////
#define ADR_CAN_NUMBER1_ON_ZAD 0x00
#define ADR_CAN_NUMBER2_ON_ZAD 0x01
#define ADR_CAN_LAMPS_ON_ZAD 0x02
#define ADR_CAN_LAMPS_2_ON_ZAD 0x03
#define ADR_CAN_KEY_ON_ZAD 0x10
//////////////////////////////////////
//////////////////////////////////////
#define CAN_SPEED_UKSS8 10
#define CAN_SPEED_VPU1 20
#define CAN_SPEED_VPU2 20
#define CAN_SPEED_UMP1 5//30
//#define ADR_CAN_SPEED 99
//#define ADR_CAN_LENGTH_FINISH_ADR 97
//#define ADR_CAN_CMD 127
//#define ADR_CAN_KEY_ON_VPU 16 //
//#define ADR_CAN_DOOR 0 //
//////////////////////////////////////
//////////////////////////////////////
#endif /* SRC_MAIN_CAN_PROJECT_H_ */

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#include "DSP281x_Examples.h" // DSP281x Examples Include File
#include "DSP281x_SWPrioritizedIsrLevels.h" // DSP281x Examples Include File
#include "DSP281x_Device.h"
#include <edrk_main.h>
#include "RS_Functions.h"
#include "xp_project.h"
#include "x_wdog.h"
void main()
{
// Step 1. Initialize System Control:
// PLL, WatchDog, enable Peripheral Clocks
// This example function is found in the DSP281x_SysCtrl.c file.
InitSysCtrl();
XintfZone0_Timing();//Xilinx Zone
XintfZone6_And7_Timing();//Flash Zone
XintfZone2_Timing();//External RAM Zone
// Step 2. Initalize GPIO:
// This example function is found in the DSP281x_Gpio.c file and
// illustrates how to set the GPIO to it's default state.
// InitGpio(); // Skipped for this example
// For this example use the following configuration:
//Gpio_select();
// Step 3. Clear all interrupts and initialize PIE vector table:
// Disable CPU interrupts
DINT;
// status_interrupts = __disable_interrupts();
// Initialize PIE control registers to their default state.
// The default state is all PIE interrupts disabled and flags
// are cleared.
// This function is found in the DSP281x_PieCtrl.c file.
InitPieCtrl();
// __disable_interrupts();
// Disable CPU interrupts and clear all CPU interrupt flags:
IER = 0x0000;
IFR = 0x0000;
// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
// This will populate the entire table, even if the interrupt
// is not used in this example. This is useful for debug purposes.
// The shell ISR routines are found in DSP281x_DefaultIsr.c.
// This function is found in DSP281x_PieVect.c.
InitPieVectTable();
// Step 4. Initialize all the Device Peripherals:
// This function is found in DSP281x_InitPeripherals.c
// InitPeripherals(); // Not required for this example
FlashInit();
SetupLedsLine();
//while(1)
{
i_led2_on_off(0);
i_led1_on_off(1);
DELAY_US(500000);
i_led2_on_off(1);
i_led1_on_off(0);
DELAY_US(500000);
i_led2_on_off(0);
i_led1_on_off(0);
}
RS232_TuneUp(RS232_SPEED_A, RS232_SPEED_B);
KickDog();
// íàñòðîéêà ïðîåêòà, âñå òàì!
edrk_init_before_main();
// ðàçðåøàåì ïðåðûâàíèÿ, ÷òîá çàðàáîòàë RS232
project.enable_all_interrupt();
DINT;
i_led2_on_off(1);
i_led1_on_off(1);
DELAY_US(500000);
i_led2_on_off(0);
i_led1_on_off(0);
DELAY_US(500000);
i_led2_on_off(1);
i_led1_on_off(1);
DELAY_US(500000);
i_led2_on_off(0);
i_led1_on_off(0);
DELAY_US(500000);
project.enable_all_interrupt();
// ïîñëåäíèå çàïóñêè ïåðåä áåñêîíå÷íûì öèêëîì
edrk_init_before_loop();
// òóò îñíîâíîé öèêë main
for(;;)
{
// óõîäèì â ïðîåêò, äîëæíû âåðíóòüñÿ
edrk_go_main();
// îáìåí ïî rs232
RS232_WorkingWith(1,0,0);
// static int fff=0;
// if (fff)
// {
// Answer(&rs_a, CMD_RS232_POKE);
// fff = 0;
// }
}
}

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#include "DSP281x_Examples.h" // DSP281x Examples Include File
#include "DSP281x_Device.h" // DSP281x Headerfile Include File
#include <f281xpwm.h>
#include <params.h>
#include <project.h>
#include <PWMTMSHandle.h>
#include <PWMTools.h>
#include <v_pwm24_v2.h>
#include "CAN_Setup.h"
#include "global_time.h"
#include "RS_Functions.h"
int
m_PWM = 1, /* 1-ØÈÌ çàêðûò, 0-ØÈÌ îòêðûò */
Dpwm = 12500,
Fpwm = 1000,
Dpwm2 = 6250,
Dpwm4 = 3125,
Zpwm = 1; // äåëèòåëü
//TODO èñïðàâèòü ëîãè÷åñêèé êîñßê
static int mPWM_a = 0, mPWM_b = 0; //ØÈÌ îáìîòêè à è b 1 - âêë., 0 - âûêë.
PWMGEND pwmd = PWMGEND_DEFAULTS;
#if (TMSPWMGEN==1)
#define DMIN 750 // 15mks Dminimum
interrupt void PWM_Handler(void)
{
// static unsigned int time_tick_sec_mks=0;
static unsigned int pwm_run=0;
// Enable more interrupts from this timer
EvaRegs.EVAIMRA.bit.T1PINT = 1;
// Note: To be safe, use a mask value to write to the entire
// EVAIFRA register. Writing to one bit will cause a read-modify-write
// operation that may have the result of writing 1's to clear
// bits other then those intended.
EvaRegs.EVAIFRA.all = BIT7;
// Acknowledge interrupt to receive more interrupts from PIE group 2
PieCtrlRegs.PIEACK.all = PIEACK_GROUP2;
// PWM_ticks++;
if (pwm_run==1)
{
// stop_pwm();
}
else
{
pwm_run=1;
EnableInterrupts();
// if (time_tick_sec_mks>FREQ_PWM)
// {
// time_tick_sec++;
// time_tick_sec_mks=0;
// }
// else
// time_tick_sec_mks++;
// rs_a.time_wait_rs_out++;
// rs_b.time_wait_rs_out++;
// rs_a.time_wait_rs_out_mpu++;
// rs_b.time_wait_rs_out_mpu++;
global_time.calc(&global_time);
inc_RS_timeout_cicle();
inc_CAN_timeout_cicle();
// led1_on_off(1);
PWM_interrupt(); /* Âûçîâ ôóíêöèè óïðàâëåíèy ØÈÌîì */
// led1_on_off(0);
pwm_run=0;
}
/*
// Enable more interrupts from this timer
EvaRegs.EVAIMRA.bit.T1PINT = 1;
// Note: To be safe, use a mask value to write to the entire
// EVAIFRA register. Writing to one bit will cause a read-modify-write
// operation that may have the result of writing 1's to clear
// bits other then those intended.
EvaRegs.EVAIFRA.all = BIT7;
// Acknowledge interrupt to receive more interrupts from PIE group 2
PieCtrlRegs.PIEACK.all = PIEACK_GROUP2;
*/
// led2_on_off(0);
// disable(); /* çàïðåùàåì ïðåðûâàíèy TMS */
// SCIb_RX_Int_enable();
// SCIa_RX_Int_enable();
}
#endif
#if (TMSPWMGEN==1)
void init_eva_evb()
{
// unsigned int tload;
// stop_pwm();
EALLOW;
// EVA Configure T1PWM, T2PWM, PWM1-PWM6
// Initalize the timers
// Initalize EVA Timer1
PieVectTable.T1PINT=&PWM_Handler;
EvaRegs.EVAIMRA.bit.T1PINT = 1;
EvaRegs.EVAIFRA.bit.T1PINT = 1;
// Enable PIE group 2 interrupt 4 for T1PINT
PieCtrlRegs.PIEIER2.bit.INTx4 = 1;
// EvaRegs.EVAIFRA.bit.T1OFINT=1;
// PieVectTable.T1OFINT = &PWM_Handler2;
// EvaRegs.EVAIMRA.bit.T1OFINT = 1;
// EvaRegs.EVAIFRA.bit.T1OFINT = 1;
// Enable PIE group 2 interrupt 7 for T1PINT
// PieCtrlRegs.PIEIER2.bit.INTx7 = 1;
//#ifdef DOUBLE_UPDATE_PWM
// PieVectTable.T1UFINT = &PWM_Handler2;
// EvaRegs.EVAIMRA.bit.T1UFINT = 1;
// EvaRegs.EVAIFRA.bit.T1UFINT = 1;
// Enable PIE group 2 interrupt 7 for T1PINT
// PieCtrlRegs.PIEIER2.bit.INTx6 = 1;
//#endif
// EvaRegs.EVAIFRA.bit.T1CINT=1;
// PieVectTable.T1CINT = &PWM_Handler2;
// EvaRegs.EVAIMRA.bit.T1CINT = 1;
// EvaRegs.EVAIFRA.bit.T1CINT = 1;
// Enable PIE group 2 interrupt 7 for T1PINT
// PieCtrlRegs.PIEIER2.bit.INTx5 = 1;
IER |= M_INT2;
EDIS;
// start_pwm();
}
#endif
#if (TMSPWMGEN==1)
void setup_tms_pwm_int(int pwm_freq, int one_two, int pwm_protect)
{
float64 pwm_period;
// pwm_tick;
// int prev_interrupt;
// init_vector();
// f_disable(); /* çàïðåùàåì ïðåðûâàíèy TMS */
// *(int *)(VECT_TABLE + VECT_INT2) = (int)PWM_Handler; /* óñòàíàâëèâàåì îáðàáîò÷èê */
// SET_IEMASK_INT2(); /* Ìàñêà íà ïðåðûâàíèy */
pwm_period = (float64)HSPCLK/(float64)pwm_freq/2.0;
Fpwm = (int)pwm_freq;
Dpwm = (int)pwm_period;
Dpwm2 = (int)(pwm_period/2);
Dpwm4 = (int)(pwm_period/4);
// stop_pwm(); /* Çàïðåùåíèå âûõîäîâ ØÈÌ */
// setup_pwm_out();
init_eva_evb();
EvbRegs.EVBIFRA.bit.PDPINTB=1;
EvaRegs.EVAIFRA.bit.PDPINTA=1;
// EVBIFRB
// Initialize PWM module
pwmd.PeriodMax = Dpwm; // Perscaler X1 (T1), ISR period = T x 1
pwmd.PeriodMin = DMIN; // Perscaler X1 (T1), ISR period = T x 1
// ARpwmd.PeriodMax = Dpwm;
// ARpwmd.PeriodMin = DMIN;
//
pwmd.ShiftPhaseA = 0;//Dpwm/6.0;
pwmd.ShiftPhaseB = 0;
pwmd.init(&pwmd);
// ARpwmd.init(&pwmd);
// m.m2.bit.WDog_pwm = 0;
/* pwm1.PeriodMax = Dpwm; // Perscaler X1 (T1), ISR period = T x 1
pwm1.init(&pwm1);
pwm2.PeriodMax = Dpwm; // Perscaler X1 (T1), ISR period = T x 1
pwm2.init(&pwm2); */
// if(one_two < 1.5) one_two = 0;
// if(one_two > 1.5) one_two = 0x80000000;
// addr_xilinx(WG_COUNT) = pwm_divisor; /* Äåëèòåëü ÷àñòîòû ØÈÌà */
// addr_xilinx(WG_PERIOD) = Dpwm<<16; /* Ïåðèîä ØÈÌ */
// addr_xilinx(ADR_INT) = one_two; /* Ïðåðûâàíèé çà ïåðèîä */
// addr_xilinx(WG_PROTECT) = pwm_protect; /* Ðàçðåøåíèå áëîêèðîâêè ØÈÌ */
//Invoking the computation function
//svgen_mf1.
// Initialize the SVGEN_MF module
/*
svgen_mf1.FreqMax = _IQ(6*BASE_FREQ*T);
svgen_mf2.FreqMax = _IQ(6*BASE_FREQ*T);
svgen_mf2.Offset=_IQ(0);
svgen_mf1.Offset=_IQ(0);
svgen_mf1.Alpha = _IQ(0);
svgen_mf2.Alpha = _IQ(0.52359877559829887307710723054658);
k=0.1; //0.9;
freq = 0.499;
*/
//svgen_mf1.calc(&svgen_mf1);
//svgen_mf2.calc(&svgen_mf2);
// start_pwm_a();
// start_pwm_b();
i_WriteMemory(ADR_PWM_DRIVE_MODE, 0x0000); //Âûáèðàåì â êà÷åñòâå èñòî÷íèêà ØÈÌ TMS
}
#endif
/********************************************************************/
/* Ðàçðåøåíèå âûõîäîâ ØÈÌà */
/********************************************************************/
void start_tms_pwm_a()
{
unsigned int mask_tk_lines;
mPWM_a = 1;
EALLOW;
EvaRegs.COMCONA.all = 0xa600;//0xA600; // Init COMCONA Register
EvaRegs.ACTRA.all = 0x0999;
EDIS;
}
void start_tms_pwm_b()
{
unsigned int mask_tk_lines;
mPWM_b = 1;
EALLOW;
EvbRegs.COMCONB.all = 0xa600;//0xA600; // Init COMCONA Register
EvbRegs.ACTRB.all = 0x0999;
EDIS;
}
void start_tms_pwm(void)
{
mPWM_a = 1;
mPWM_b = 1;
m_PWM = 0;
// m.m1.bit.PWM=0;
// m.m1.bit.PWM_A=0;
// m.m1.bit.PWM_B=0;
EALLOW;
// addr_xilinx(WG_OUT)=0x00;
EvaRegs.COMCONA.all = 0xa600;//0xA600; // Init COMCONA Register
EvbRegs.COMCONB.all = 0xa600;//0xA600; // Init COMCONA Register
EvaRegs.ACTRA.all = 0x0999;
EvbRegs.ACTRB.all = 0x0999;
// EvaRegs.GPTCONA.bit.TCMPOE=0;
// EvbRegs.GPTCONB.bit.TCMPOE=0;
// EvaRegs.T1CON.bit.TECMPR=1;
// EvbRegs.T3CON.bit.TECMPR=1;
EDIS;
}
/********************************************************************/
/* Ðàçðåøåíèå îïðåäåëåííûõ âûõîäîâ ØÈÌà */
/********************************************************************/
void start_select_tms_pwm(unsigned int mask)
{
unsigned int mask_pwm_a,mask_pwm_b;
unsigned char b,i;
EALLOW;
EvaRegs.ACTRA.all = 0x0fff;
EvbRegs.ACTRB.all = 0x0fff;
EvaRegs.COMCONA.all = 0xa600;//0xA600; // Init COMCONA Register
EvbRegs.COMCONB.all = 0xa600;//0xA600; // Init COMCONA Register
mask_pwm_a=0;
for (i=0;i<6;i++)
{
b=(mask >> i) & 1;
if (b==0)
mask_pwm_a |= (1 << (2*i) );
else
mask_pwm_a |= (3 << (2*i) );
}
mask_pwm_b=0;
for (i=0;i<6;i++)
{
b=(mask >> (i+8)) & 1;
if (b==0)
mask_pwm_b |= (1 << (2*i) );
else
mask_pwm_b |= (3 << (2*i) );
}
EvaRegs.ACTRA.all = mask_pwm_a;
EvbRegs.ACTRB.all = mask_pwm_b;
EDIS;
}
/********************************************************************/
/* Çàïðåùåíèå âûõîäîâ ØÈÌà */
/********************************************************************/
//#pragma CODE_SECTION(stop_pwm,".fast_run");
void stop_tms_pwm(void)
{
mPWM_a = 0;
mPWM_b = 0;
m_PWM = 1;
// m.m1.bit.PWM=1;
// m.m1.bit.PWM_A=1;
// m.m1.bit.PWM_B=1;
EALLOW;
// EvaRegs.GPTCONA.bit.TCMPOE=1;
// EvbRegs.GPTCONB.bit.TCMPOE=1;
// EvaRegs.T1CON.bit.TECMPR=0;
// EvbRegs.T3CON.bit.TECMPR=0;
// addr_xilinx(WG_OUT)=0x0fff; // Òàêîæäå òîðìîçíîé êëþ÷
EvaRegs.ACTRA.all = 0x0fff;
EvbRegs.ACTRB.all = 0x0fff;
// EvaRegs.COMCONA.all = 0xa400;//0xA600; // Init COMCONA Register
// EvbRegs.COMCONB.all = 0xa400;//0xA600; // Init COMCONA Register
// EvaRegs.COMCONA.bit.FCMP6OE=0;
//EvbRegs.COMCONB.bit.FCOMPOE=0;
//EvaRegs.COMCONA.bit.CENABLE=0;
//EvbRegs.COMCONB.bit.CENABLE=0;
EDIS;
}
void stop_tms_pwm_a()
{
unsigned int mask_tk_lines;
// m_PWM = 1;
mPWM_a = 0;
EALLOW;
EvaRegs.ACTRA.all = 0x0fff;
EDIS;
}
void stop_tms_pwm_b()
{
unsigned int mask_tk_lines;
m_PWM = 1;
mPWM_b = 0;
EALLOW;
EvbRegs.ACTRB.all = 0x0fff;
EDIS;
}
void setup_tms_pwm_out(void)
{
//int b;
#if (TMSPWMGEN==1)
EALLOW;
// GpioMuxRegs.GPDMUX.bit.T3CTRIP_PDPB_GPIOD5=0;
// GpioMuxRegs.GPDDIR.bit.GPIOD5=0;
// GpioDataRegs.GPDSET.bit.GPIOD5=1;
// GpioDataRegs.GPDCLEAR.bit.GPIOD5=1;
GpioMuxRegs.GPAMUX.bit.PWM1_GPIOA0=1;
GpioMuxRegs.GPAMUX.bit.PWM2_GPIOA1=1;
GpioMuxRegs.GPAMUX.bit.PWM3_GPIOA2=1;
GpioMuxRegs.GPAMUX.bit.PWM4_GPIOA3=1;
GpioMuxRegs.GPAMUX.bit.PWM5_GPIOA4=1;
GpioMuxRegs.GPAMUX.bit.PWM6_GPIOA5=1;
GpioMuxRegs.GPBMUX.bit.PWM7_GPIOB0=1;
GpioMuxRegs.GPBMUX.bit.PWM8_GPIOB1=1;
GpioMuxRegs.GPBMUX.bit.PWM9_GPIOB2=1;
GpioMuxRegs.GPBMUX.bit.PWM10_GPIOB3=1;
GpioMuxRegs.GPBMUX.bit.PWM11_GPIOB4=1;
GpioMuxRegs.GPBMUX.bit.PWM12_GPIOB5=1;
EDIS;
// îòêðûâàåì áóôåðû
// write_memory(adr_oe_buf_v,0);
#endif
}

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#ifndef _PWMTMSHANDLE_H
#define _PWMTMSHANDLE_H
void setup_tms_pwm_out(void);
void start_tms_pwm(void);
void stop_tms_pwm(void);
void start_tms_pwm_b();
void start_tms_pwm_a();
void stop_tms_pwm_a();
void stop_tms_pwm_b();
void setup_tms_pwm_int(int pwm_freq, int one_two, int pwm_protect);
void start_break_pwm(void);
void stop_break_pwm(void);
#endif

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#ifndef PWMTOOLS_H
#define PWMTOOLS_H
#include <f281xpwm.h>
#include <v_pwm24_v2.h>
//////////////////////////////////////////////////
//////////////////////////////////////////////////
//////////////////////////////////////////////////
void InitPWM(void);
void PWM_interrupt(void);
void PWM_interrupt_main(void);
void stop_wdog(void);
void start_wdog(void);
void global_time_interrupt(void);
void optical_bus_read_write_interrupt(void);
void pwm_analog_ext_interrupt(void);
void pwm_inc_interrupt(void);
void fix_pwm_freq_synchro_ain(void);
void async_pwm_ext_interrupt(void);
void calc_rotors(int flag);
void detect_work_revers(int direction, _iq fzad, _iq frot);
void calc_power_full(void);
//////////////////////////////////////////////////
//////////////////////////////////////////////////
//////////////////////////////////////////////////
//////////////////////////////////////////////////
extern PWMGEND pwmd;
//extern int var_freq_pwm_xtics;
//extern int var_period_max_xtics;
//extern int var_period_min_xtics;
#endif //PWMTOOLS_H

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#define ADC_usDELAY 8000L
#define ADC_usDELAY2 20L
// Determine when the shift to right justify the data takes place
// Only one of these should be defined as 1.
// The other two should be defined as 0.
#define POST_SHIFT 0 // Shift results after the entire sample table is full
#define INLINE_SHIFT 1 // Shift results as the data is taken from the results regsiter
#define NO_SHIFT 0 // Do not shift the results
// ADC start parameters
#define ADC_MODCLK 0x3 // HSPCLK = SYSCLKOUT/2*ADC_MODCLK2 = 150/(2*3) = 25MHz
#define ADC_CKPS 0x0 // ADC module clock = HSPCLK/1 = 25MHz/(1) = 25MHz
#define ADC_SHCLK 0x1 // S/H width in ADC module periods = 2 ADC cycle
#define AVG 1000 // Average sample limit
#define ZOFFSET 0x00 // Average Zero offset
#define BUF_SIZE 100 // Sample buffer size
#define FREQ_ADC 15000.0//26.08.2009//73000.0
#define read_ADC(c) (*(&AdcRegs.ADCRESULT0+c)>>4)
#define SDVIG_K_FILTER_S 2 //1//(27.08.2009) //3

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#ifndef _ADC_TOOLS
#define _ADC_TOOLS
#include "IQmathLib.h"
#include "xp_project.h"
#include "params_norma.h"
#define COUNT_DETECT_ZERO 3000
#define COUNT_ARR_ADC_BUF_FAST_POINT 10
#define DELTA_ACP_TEMPER 0.0 // äàò÷èêè áëîêè pt100 äàåþò ïîñòîÿííîå ñìåùåíèå 0.0 ãðàäóñîâ, òàê íàñòðîåí áëîê SG3013
#define ADC_READ_FROM_PARALLEL_BUS 1
#define DEFAULT_ZERO_ADC 2048
#ifndef USE_INTERNAL_ADC
#define USE_INTERNAL_ADC 0
#endif
#if (USE_INTERNAL_ADC==1)
#define COUNT_ARR_ADC_BUF (C_adc_number+1)
#else
#define COUNT_ARR_ADC_BUF C_adc_number
#endif
#define COUNT_ARR_ADC_BUF_EXTERNAL C_adc_number
// 23550.3
#if(C_adc_number>=1)
#define R_ADC_DEFAULT_0 { 271, 271, 876, 876, 876, 876, 876, 876, 249, 249, 301, 301, 301, 301, 301, 301 }
#define K_LEM_ADC_DEFAULT_0 { 7200, 7200, 5000, 5000, 5000, 5000, 5000, 5000, 5000, 5000, 8400, 8400, 8400, 8400, 5000, 5000 }
#define NORMA_ADC_DEFAULT_0 { NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP }
#endif
#if(C_adc_number>=2)
#define R_ADC_DEFAULT_1 { 1, 6190, 6190, 6190, 6190, 6190, 6190, 6190, 6190, 6190, 6190, 6190, 6190, 6190, 6190, 6190 }
#define K_LEM_ADC_DEFAULT_1 { 1, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1 }
#define NORMA_ADC_DEFAULT_1 { NORMA_ACP, NORMA_ACP_TEMPER_MILL_AMP, NORMA_ACP_TEMPER_MILL_AMP, NORMA_ACP_TEMPER_MILL_AMP, NORMA_ACP_TEMPER_MILL_AMP, NORMA_ACP_TEMPER_MILL_AMP, NORMA_ACP_TEMPER_MILL_AMP, NORMA_ACP_TEMPER_MILL_AMP, NORMA_ACP_TEMPER_MILL_AMP, NORMA_ACP_TEMPER_MILL_AMP, NORMA_ACP_TEMPER_MILL_AMP, NORMA_ACP_TEMPER_MILL_AMP, NORMA_ACP_TEMPER_MILL_AMP, NORMA_ACP_TEMPER_MILL_AMP, NORMA_ACP_P, NORMA_ACP }
#endif
#if(C_adc_number>=3)
#define R_ADC_DEFAULT_2 { 271, 271, 887, 887, 887, 887, 887, 887, 250, 250, 3125, 3125, 3125, 3125, 309, 309 }
#define K_LEM_ADC_DEFAULT_2 { 7200, 7200, 5000, 5000, 5000, 5000, 5000, 5000, 5000, 5000, 60000, 60000, 60000, 60000, 5000, 5000 }
#define NORMA_ADC_DEFAULT_2 { NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP }
#endif
// 23550.1
//#if(C_adc_number>=1)
//#define R_ADC_DEFAULT_0 { 271, 271, 887, 887, 887, 887, 887, 887, 250, 250, 312, 312, 312, 312, 309, 309 }
//#define K_LEM_ADC_DEFAULT_0 { 7200, 7200, 5000, 5000, 5000, 5000, 5000, 5000, 5000, 5000, 8400, 8400, 8400, 8400, 5000, 5000 }
//#define NORMA_ADC_DEFAULT_0 { NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP }
//#endif
//
//#if(C_adc_number>=2)
//#define R_ADC_DEFAULT_1 { 1, 6190, 6190, 6190, 6190, 6190, 6190, 6190, 6190, 6190, 6190, 6190, 6190, 6190, 6190, 6190 }
//#define K_LEM_ADC_DEFAULT_1 { 1, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1 }
//#define NORMA_ADC_DEFAULT_1 { NORMA_ACP, NORMA_ACP_TEMPER, NORMA_ACP_TEMPER, NORMA_ACP_TEMPER, NORMA_ACP_TEMPER, NORMA_ACP_TEMPER, NORMA_ACP_TEMPER, NORMA_ACP_TEMPER, NORMA_ACP_TEMPER, NORMA_ACP_TEMPER, NORMA_ACP_TEMPER, NORMA_ACP_TEMPER, NORMA_ACP_TEMPER, NORMA_ACP_TEMPER, NORMA_ACP_P, NORMA_ACP }
//#endif
//
//#if(C_adc_number>=3)
//#define R_ADC_DEFAULT_2 { 271, 271, 887, 887, 887, 887, 887, 887, 250, 250, 3125, 3125, 3125, 3125, 309, 309 }
//#define K_LEM_ADC_DEFAULT_2 { 7200, 7200, 5000, 5000, 5000, 5000, 5000, 5000, 5000, 5000, 60000, 60000, 60000, 60000, 5000, 5000 }
//#define NORMA_ADC_DEFAULT_2 { NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP }
//#endif
#if (USE_INTERNAL_ADC==1)
#define R_ADC_DEFAULT_INTERNAL { 100,100,100,100,100,100,100,100,1248,1248,1248,100,100,100,100,100 }
#define K_LEM_ADC_DEFAULT_INTERNAL { 30,30,30,30,10,10,10,10,621,621,621,100,10,10,10,10 }
#define NORMA_ADC_DEFAULT_INTERNAL { NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP, NORMA_ACP }
#endif
/*
//awa3
//14 êàíàë out1
0 - 11 êðèâûå äàò÷èêè
//15 êàíàë out2
0 - 11 êðèâûå äàò÷èêè
//8 êàíàë
0 - 20 ìÀ | 0 ãðàä - 200 ãðàä / ëèíåéíûé
0V - 1.5V / 0 ãðàä - 200 ãðàä / ëèíåéíûé
//9 êàíàë
0 - 20 ìÀ | 0 ãðàä - 200 ãðàä / ëèíåéíûé
0V - 1.5V / 0 ãðàä - 200 ãðàä / ëèíåéíûé
//10 êàíàë
0 - 20 ìÀ | 0 ãðàä - 200 ãðàä / ëèíåéíûé
0V - 1.5V / 0 ãðàä - 200 ãðàä / ëèíåéíûé
//11 êàíàë
0 - 20 ìÀ | 0 ãðàä - 200 ãðàä / ëèíåéíûé
0V - 1.5V / 0 ãðàä - 200 ãðàä / ëèíåéíûé
//12 êàíàë
4 - 20 ìÀ | 0 áàð - 10 áàð / ëèíåéíûé
0.3V - 1.5V / 0 áàð - 10 áàð / ëèíåéíûé
//13 êàíàë
4 - 20 ìÀ | 0 áàð - 10 áàð / ëèíåéíûé
0.3V - 1.5V / 0 áàð - 10 áàð / ëèíåéíûé
*/
typedef union
{
struct
{
unsigned int c0_plus :1; /* 0 äàò÷èê+ */
unsigned int c1_plus :1; /* 0 äàò÷èê+ */
unsigned int c2_plus :1; /* 0 äàò÷èê+ */
unsigned int c3_plus :1; /* 0 äàò÷èê+ */
unsigned int c4_plus :1; /* 0 äàò÷èê+ */
unsigned int c5_plus :1; /* 0 äàò÷èê+ */
unsigned int c6_plus :1; /* 0 äàò÷èê+ */
unsigned int c7_plus :1; /* 0 äàò÷èê+ */
unsigned int c8_plus :1; /* 0 äàò÷èê+ */
unsigned int c9_plus :1; /* 0 äàò÷èê+ */
unsigned int c10_plus :1; /* 0 äàò÷èê+ */
unsigned int c11_plus :1; /* 0 äàò÷èê+ */
unsigned int c12_plus :1; /* 0 äàò÷èê+ */
unsigned int c13_plus :1; /* 0 äàò÷èê+ */
unsigned int c14_plus :1; /* 0 äàò÷èê+ */
unsigned int c15_plus :1; /* 0 äàò÷èê+ */
} bit; /* Îøèáêè ïîáèòíî */
unsigned long all; /* Îøèáêè âìåñòå */
} ERR_ADC_PLUS_PROTECT;
typedef union
{
struct
{
unsigned int c0_minus :1; /* 0 äàò÷èê- */
unsigned int c1_minus :1; /* 0 äàò÷èê- */
unsigned int c2_minus :1; /* 0 äàò÷èê- */
unsigned int c3_minus :1; /* 0 äàò÷èê- */
unsigned int c4_minus :1; /* 0 äàò÷èê- */
unsigned int c5_minus :1; /* 0 äàò÷èê- */
unsigned int c6_minus :1; /* 0 äàò÷èê- */
unsigned int c7_minus :1; /* 0 äàò÷èê- */
unsigned int c8_minus :1; /* 0 äàò÷èê- */
unsigned int c9_minus :1; /* 0 äàò÷èê- */
unsigned int c10_minus :1; /* 0 äàò÷èê- */
unsigned int c11_minus :1; /* 0 äàò÷èê- */
unsigned int c12_minus :1; /* 0 äàò÷èê- */
unsigned int c13_minus :1; /* 0 äàò÷èê- */
unsigned int c14_minus :1; /* 0 äàò÷èê- */
unsigned int c15_minus :1; /* 0 äàò÷èê- */
} bit; /* Îøèáêè ïîáèòíî */
unsigned int all; /* Îøèáêè âìåñòå */
} ERR_ADC_MINUS_PROTECT;
typedef struct
{
ERR_ADC_PLUS_PROTECT plus;
ERR_ADC_MINUS_PROTECT minus;
} ERR_ADC_PROTECT;
/* Ãëîáàëüíày ñòðóêòóðà çíà÷åíèé òîêîâ è íàïðyæåíèé ÀÈÍ */
typedef struct
{
_iq iqU_1;
_iq iqU_2;
_iq iqU_1_fast;
_iq iqU_2_fast;
_iq iqU_1_long;
_iq iqU_2_long;
_iq iqIu_1;
_iq iqIv_1;
_iq iqIw_1;
_iq iqIu_2;
_iq iqIv_2;
_iq iqIw_2;
_iq iqIu_1_rms;
_iq iqIv_1_rms;
_iq iqIw_1_rms;
_iq iqIu_2_rms;
_iq iqIv_2_rms;
_iq iqIw_2_rms;
_iq iqIu;
_iq iqIv;
_iq iqIw;
_iq iqIin_1;
_iq iqIin_2;
_iq iqUin_A1B1;
_iq iqUin_B1C1;
_iq iqUin_C1A1;
_iq iqUin_A2B2;
_iq iqUin_B2C2;
_iq iqUin_C2A2;
_iq iqUin_A1B1_rms;
_iq iqUin_B1C1_rms;
_iq iqUin_C1A1_rms;
_iq iqUin_A2B2_rms;
_iq iqUin_B2C2_rms;
_iq iqUin_C2A2_rms;
_iq iqUin_m1;
_iq iqUin_m2;
_iq iqIbreak_1;
_iq iqIbreak_2; //39
_iq T_U01;
_iq T_U02;
_iq T_U03;
_iq T_U04;
_iq T_U05;
_iq T_U06;
_iq T_U07;
_iq T_Water_external;
_iq T_Water_internal;
_iq T_Air_01;
_iq T_Air_02;
_iq T_Air_03;
_iq T_Air_04;
_iq P_Water_internal; //53
_iq iqI_vozbud;
_iq iqIin_sum;
_iq iqIm_1;
_iq iqIm_2;
_iq iqIm;
_iq iqM;
_iq PowerScalar;
_iq PowerScalarFilter2;
_iq PowerFOC;
_iq iqU_1_imit; //63
/*
_iq iqUzpt_1_2; //uzpt1 bs2
_iq iqUzpt_2_2; //uzpt2 bs2
_iq iqUzpt_1_2_fast; //uzpt1 bs2
_iq iqUzpt_2_2_fast; //uzpt2 bs2
_iq iqUzpt_1_2_long; //uzpt1 bs2
_iq iqUzpt_2_2_long; //uzpt2 bs2
_iq iqIin_1_1; //Iin AF1 BS1
_iq iqIin_2_1; //Iin AF2 BS1
_iq iqIin_3_1; //Iin AF3 BS1
_iq iqIin_4_1; //Iin AF4 BS1
_iq iqIin_5_1; //Iin AF5 BS1
_iq iqIin_6_1; //Iin AF6 BS1
_iq iqIin_1_2; //Iin AF1 BS2
_iq iqIin_2_2; //Iin AF2 BS2
_iq iqIin_3_2; //Iin AF3 BS2
_iq iqIin_4_2; //Iin AF4 BS2
_iq iqIin_5_2; //Iin AF5 BS2
_iq iqIin_6_2; //Iin AF6 BS2
_iq iqUin_AB; //Âõîäíîå ëèíåéíîå íàïðßæåíèå AB
_iq iqUin_BC; //Âõîäíîå ëèíåéíîå íàïðßæåíèå BC
_iq iqUin_CA; //Âõîäíîå ëèíåéíîå íàïðßæåíèå CA
_iq iqUin_AB_sf; //Âõîäíîå ëèíåéíîå íàïðßæåíèå AB
_iq iqUin_BC_sf; //Âõîäíîå ëèíåéíîå íàïðßæåíèå BC
_iq iqUin_CA_sf; //Âõîäíîå ëèíåéíîå íàïðßæåíèå CA
_iq iqT_WATER_in; // Òåìïåðàòóðà âîäû íà âõîäå Ï×
_iq iqT_WATER_out; // Òåìïåðàòóðà âîäû íà âûõîäå Ï×
_iq iqT_AIR_in_up; // Òåìïåðàòóðà âîçäóõà íà âõîäå Ï× (âåðõ)
_iq iqT_AIR_in_down;// Òåìïåðàòóðà âîçäóõà íà âõîäå Ï× (íèç)
_iq iqP_WATER_in; // Äàâëåíèå âîäû íà âõîäå Ï×
_iq iqP_WATER_out; // Äàâëåíèå âîäû íà âûõîäå Ï×
_iq iqT_BK1_BK12; // Òåêóùåå ïîêàçàíèå îäíîãî èç äàò÷èêîâ BK1_BK12
_iq iqT_BK13_BK24; // Òåêóùåå ïîêàçàíèå îäíîãî èç äàò÷èêîâ BK13_BK24
_iq iqUin_m1; //Àìïëèòóäà Âõîäíîå ëèíåéíîå íàïðßæåíèå
_iq iqIu_1_1; //Iu AF1 BS1
_iq iqIu_1_2; //Iu AF2 BS1
_iq iqIv_1_1; //Iv AF3 BS1
_iq iqIv_1_2; //Iv AF4 BS1
_iq iqIw_1_1; //Iw AF5 BS1
_iq iqIw_1_2; //Iw AF6 BS1
_iq iqIu_2_1; //Iu AF1 BS2
_iq iqIu_2_2; //Iu AF2 BS2
_iq iqIv_2_1; //Iv AF3 BS2
_iq iqIv_2_2; //Iv AF4 BS2
_iq iqIw_2_1; //Iw AF5 BS2
_iq iqIw_2_2; //Iw AF6 BS2
_iq iqIm_1;
_iq iqIm_2;
_iq iqWexp;
_iq iqWout;
_iq iqM;
*/
} ANALOG_VALUE;
#define ANALOG_VALUE_DEFAULT {0,0,0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0,0,0,\
0,0,0,0,0,0,0,0,0,0, 0,0,0,0,0,0,0,0,0,0, 0,0, 0}
/* Ãëîáàëüíày ñòðóêòóðà çíà÷åíèé òîêîâ è íàïðyæåíèé ÀÈÍ */
#define ERR_LEVEL_ADC_PLUS 3950 //+1270A //2950 // +650A //3467 // 3367 //3367 //3267 // 0xfff-0x29c
#define ERR_LEVEL_ADC_MINUS 150 //-1270A //1150 //-650A // 267 //367
#define ERR_LEVEL_ADC_PLUS_6 3800 //3783 //3623~1150 // 3462 ~ 1050 A // 3320 ~ 960A //3680 //3267 // 0xfff-0x29c
#define ERR_LEVEL_ADC_MINUS_6 1000 //267 //367
#define MIN_DETECT_UD_ZERO 2300
#define level_err_ADC_PLUS_default {ERR_LEVEL_ADC_PLUS,ERR_LEVEL_ADC_PLUS,ERR_LEVEL_ADC_PLUS,ERR_LEVEL_ADC_PLUS,\
ERR_LEVEL_ADC_PLUS,ERR_LEVEL_ADC_PLUS,ERR_LEVEL_ADC_PLUS,ERR_LEVEL_ADC_PLUS,\
ERR_LEVEL_ADC_PLUS,ERR_LEVEL_ADC_PLUS,ERR_LEVEL_ADC_PLUS,ERR_LEVEL_ADC_PLUS,\
ERR_LEVEL_ADC_PLUS,ERR_LEVEL_ADC_PLUS,ERR_LEVEL_ADC_PLUS,ERR_LEVEL_ADC_PLUS}
#define level_err_ADC_MINUS_default {ERR_LEVEL_ADC_MINUS,ERR_LEVEL_ADC_MINUS,ERR_LEVEL_ADC_MINUS,ERR_LEVEL_ADC_MINUS,\
ERR_LEVEL_ADC_MINUS,ERR_LEVEL_ADC_MINUS,ERR_LEVEL_ADC_MINUS,ERR_LEVEL_ADC_MINUS,\
ERR_LEVEL_ADC_MINUS,ERR_LEVEL_ADC_MINUS,ERR_LEVEL_ADC_MINUS,ERR_LEVEL_ADC_MINUS,\
ERR_LEVEL_ADC_MINUS,ERR_LEVEL_ADC_MINUS,ERR_LEVEL_ADC_MINUS,ERR_LEVEL_ADC_MINUS}
extern ANALOG_VALUE analog;
extern ANALOG_VALUE filter;
extern ANALOG_VALUE analog_zero;
//void calc_norm_ADC(int fast);
void calc_norm_ADC_0(int run_norma);
void calc_norm_ADC_1(int run_norma);
void Init_Adc_Variables(void);
void norma_adc_nc(int nc);
extern int ADC_f[COUNT_ARR_ADC_BUF][16];
extern int zero_ADC[COUNT_ARR_ADC_BUF][16];
extern ERR_ADC_PROTECT err_adc_protect[COUNT_ARR_ADC_BUF],mask_err_adc_protect[COUNT_ARR_ADC_BUF];
extern unsigned int R_ADC[COUNT_ARR_ADC_BUF][16];
extern unsigned int K_LEM_ADC[COUNT_ARR_ADC_BUF][16];
extern float K_NORMA_ADC[COUNT_ARR_ADC_BUF][16];
//void norma_all_adc(void);
extern _iq koef_Uzpt_long_filter, koef_Uzpt_fast_filter, koef_Uin_filter, koef_Im_filter, koef_Power_filter, koef_Power_filter2;
void detect_zero_analog(int nc);
#if (USE_INTERNAL_ADC==1)
void Init_Internal_Adc(void);
#endif
#endif // end _ADC_TOOLS

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/*
* alarm_log.c
*
* Created on: 11 ñåíò. 2024 ã.
* Author: yura
*/
#include "edrk_main.h"
#include "alarm_log_can.h"
#include "alarm_log.h"
#include "log_params.h"
#include "logs_hmi.h"
#include "global_time.h"
#define PAUSE_AUTO_SAVE_ALARM_LOG_SECONDS 20 // 20 sec
#define PAUSE_AUTO_STOP_ALARM_LOG_SECONDS 5 // 5 sec
void send_alarm_log_pult(void)
{
static int prev_imit_send_alarm_log_pult = 0;
int to_store = 0;
static int flag_wait_alarm = 0, prev_Ready2 = 0, flag_store_log = 0, flag_store_log_prepare = 0, flag_auto_logs = 0, flag_stop_alarm = 0;
static unsigned int pause_store_logs = 0, pause_stop_logs = 0;
// èìèòàöèÿ ñ òåðìèíàëêè
if (edrk.imit_send_alarm_log_pult && prev_imit_send_alarm_log_pult == 0)
flag_store_log = 1;
prev_imit_send_alarm_log_pult = edrk.imit_send_alarm_log_pult;
// àâòî ëîããèðîâàíèå àâàðèéíûõ ëîãîâ íà ïóëüò
// ñõåìà ñîáðàëàñü? çíà÷èò ëîâèì àâàðèþ
if (prev_Ready2==0 && edrk.Status_Ready.bits.ready_final)
{
flag_wait_alarm = 1;
flag_stop_alarm = 0;
}
if (prev_Ready2==1 && edrk.Status_Ready.bits.ready_final==0)
{
// äàåì ïàóçó, æäåì îøèáêè
init_timer_sec(&pause_stop_logs);
flag_stop_alarm = 1;
}
prev_Ready2 = edrk.Status_Ready.bits.ready_final;
//ñõåìà áûëà ñîáðàíà è ïîÿâèëàñü àâàðèÿ
if (flag_wait_alarm && edrk.summ_errors)
{
// ìîæíî ñîõðàíèòüñÿ
flag_store_log_prepare = 1;
flag_wait_alarm = 0;
flag_stop_alarm = 0;
init_timer_sec(&pause_store_logs);
}
// //ñõåìà áûëà ðàçîáðàíà, íî îøèáîê ìîæåò è íå áûòü
// if (flag_stop_alarm)
// {
//
//
// }
// îøèáîê íå ïîÿâèëîñü, ïðåêðàùàåì æäàòü
if (flag_stop_alarm && detect_pause_sec(PAUSE_AUTO_STOP_ALARM_LOG_SECONDS, &pause_stop_logs))
{
flag_stop_alarm = 0;
flag_wait_alarm = 0;
}
if (flag_store_log_prepare)
{
flag_auto_logs = detect_pause_sec(PAUSE_AUTO_SAVE_ALARM_LOG_SECONDS, &pause_store_logs);
}
if (flag_auto_logs)
{
flag_store_log_prepare = 0;
flag_auto_logs = 0;
// ñîõðàíÿåì
flag_store_log = 1;
flag_wait_alarm = 0;
flag_stop_alarm = 0;
}
// ïðîèçâîäèì ñáðîñ ëîãîâ íà ïóëüò
if (flag_store_log)
{
if (edrk.pult_cmd.log_what_memory >= 2)
to_store = 2;
else
if (edrk.pult_cmd.log_what_memory >= 1)
to_store = 1;
else
to_store = 0;
log_to_HMI.sdusb = to_store;
// åñëè åñòü íîñèòåëè òî ñîõðàíÿåì
if (log_to_HMI.sdusb)
{
log_to_HMI.send_log = 3;
}
flag_store_log = 0;
}
}
void test_send_alarm_log(int alarm_cmd)
{
static unsigned int points_alarm_log = 1000;
// static unsigned int nchannel_alarm_log = 30;
static int prev_alarm_cmd = 0;
static int local_alarm_cmd = 0;
if (alarm_cmd && prev_alarm_cmd==0 && alarm_log_can.stage==0)
{
// i_led2_on();
alarm_log_can.post_points = COUNT_SAVE_LOG_OFF;//100; // êîëè÷åñòâî ïîñòàâàðèéíûéõ çàïèñåé
alarm_log_can.oscills = log_params.BlockSizeErr;//nchannel_alarm_log; // êîëè÷åñòâî êîëîíîê
alarm_log_can.global_enable = 1;
alarm_log_can.start_adr_temp = (int *)0xc0000; // àäðåñ äëÿ âðåìåííîãî ðàçìåùåíèÿ êîïèè ëîãà, ëîã ñêîïèðóåòñÿ èç öèêëè÷åñêîãî áóôåðà â ýòîò ðàçâåðíóâøèñü.
// alarm_log_can.finish_adr_temp = (int *)0xa0000; // àäðåñ äëÿ âðåìåííîãî ðàçìåùåíèÿ êîïèè ëîãà, ëîã ñêîïèðóåòñÿ èç öèêëè÷åñêîãî áóôåðà â ýòîò ðàçâåðíóâøèñü.
alarm_log_can.start_adr_real_logs = (int *)log_params.start_address_log;//(int *)START_ADDRESS_LOG; // àäðåñ íà÷àëà ðåàëüíûõ ëîãîâ â öèêëè÷åñêîì áóôåðå
alarm_log_can.finish_adr_real_log = (int *)log_params.end_address_log;//(int *)logpar.; // êîíåö ëîãîâ â öèêëè÷åñêîì áóôåðå
alarm_log_can.current_adr_real_log = (int *)log_params.addres_mem;
alarm_log_can.temp_points = points_alarm_log; // ðåàëüíûé ðàçìåð öèêëè÷åñêãî áóôåðà â òî÷êàõ.
// alarm_log_can.real_points = 1000; // íóæíûé êóñîê äëÿ êîïèè, äàííîå êîëè÷åñòâî ñêîïèðóåòñÿ èç öèêëè÷åñêîãî áóôåðà âî âðåìåííûé ëîã.
alarm_log_can.step = 450; // mks
local_alarm_cmd = alarm_cmd;
// alarm_log_can.status_alarm = alarm_cmd;//cmd_alarm_log; // êîä àâàðèè
alarm_log_can.start = 0x1;
alarm_log_can.stop = 0x1;
alarm_log_can.copy2temp = 0x1;
alarm_log_can.clear(&alarm_log_can);
// alarm_log_can.send(&alarm_log_can);
// i_led2_off();
}
else
local_alarm_cmd = 0;
alarm_log_can.status_alarm = local_alarm_cmd;//cmd_alarm_log; // êîä àâàðèè
alarm_log_can.send(&alarm_log_can);
if (alarm_log_can.stage)
{
// i_led2_on_off(1);
}
else
{
// i_led2_on_off(0);
}
prev_alarm_cmd = alarm_cmd;
}
////////////////////////////////////////////////////////////

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/*
* alarm_log.h
*
* Created on: 11 ñåíò. 2024 ã.
* Author: yura
*/
#ifndef SRC_MAIN_ALARM_LOG_H_
#define SRC_MAIN_ALARM_LOG_H_
void test_send_alarm_log(int alarm_cmd);
void send_alarm_log_pult(void);
#endif /* SRC_MAIN_ALARM_LOG_H_ */

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/*
* alg_simple_scalar.c
*
* Created on: 26 èþí. 2020 ã.
* Author: Yura
*/
#include <alg_simple_scalar.h>
#include <edrk_main.h>
//#include <log_to_mem.h>
#include <master_slave.h>
#include <math.h>
#include <params_alg.h>
#include <params_norma.h>
#include <project.h>
//#include "log_to_mem.h"
#include "IQmathLib.h"
#include "math_pi.h"
#include "mathlib.h"
#include "params_pwm24.h"
#include "filter_v1.h"
#include "log_to_memory.h"
#pragma DATA_SECTION(simple_scalar1,".slow_vars");
ALG_SIMPLE_SCALAR simple_scalar1 = ALG_SIMPLE_SCALAR_DEFAULT;
_iq koefBpsi = _IQ(0.05); //0.05
void init_simple_scalar(void)
{
simple_scalar1.mzz_add_1 = _IQ(MZZ_ADD_1/NORMA_MZZ);
simple_scalar1.mzz_add_2 = _IQ(MZZ_ADD_2/NORMA_MZZ);
simple_scalar1.mzz_add_3 = _IQ(MZZ_ADD_3/NORMA_MZZ);
simple_scalar1.poluses = _IQ(POLUS);
simple_scalar1.iq_mzz_max_for_fzad = _IQ(1000.0/NORMA_MZZ);
simple_scalar1.powerzad_add = _IQ(POWERZAD_ADD_MAX);
simple_scalar1.powerzad_dec = _IQ(POWERZAD_DEC);
// simple_scalar1.k_freq_for_pid = _IQ(1.0);
simple_scalar1.k_freq_for_pid = _IQ(450.0/FREQ_PWM);
simple_scalar1.iq_add_kp_df = _IQ(ADD_KP_DF);
simple_scalar1.iq_add_ki_df = _IQ(ADD_KI_DF);
simple_scalar1.min_mzz_for_df = _IQ(MIN_MZZ_FOR_DF/NORMA_MZZ);
simple_scalar1.pidF_Kp = _IQ(PID_KP_F);
simple_scalar1.pidF_Ki = _IQ(PID_KI_F);
simple_scalar1.pidIm1.Kp=_IQ(PID_KP_IM);
simple_scalar1.pidIm1.Ki=_IQ(PID_KI_IM);
simple_scalar1.pidIm_Ki = simple_scalar1.pidIm1.Ki;
simple_scalar1.pidIm1.Kc=_IQ(PID_KC_IM);
simple_scalar1.pidIm1.Kd=_IQ(PID_KD_IM);
simple_scalar1.pidIm1.OutMax=_IQ(K_STATOR_MAX);
simple_scalar1.pidIm1.OutMin=_IQ(K_STATOR_MIN);
//////////////
simple_scalar1.pidF.Kp=_IQ(PID_KP_F);
simple_scalar1.pidF.Ki=_IQ(PID_KI_F);
simple_scalar1.pidF.Kc=_IQ(PID_KC_F);
simple_scalar1.pidF.Kd=_IQ(PID_KD_F);
simple_scalar1.pidF.OutMax=_IQ(500/NORMA_MZZ);
simple_scalar1.pidF.OutMin=_IQ(0);
// iq_MAX_DELTA_pidF = _IQ(MAX_DELTA_pidF/NORMA_WROTOR);
/////////////////////////
// simple_scalar1.pidPower_Kp = _IQ(PID_KP_POWER);
// simple_scalar1.pidPower_Ki = _IQ(PID_KI_POWER);
// iq_add_kp_dpower = _IQ(ADD_KP_DPOWER);
// iq_add_ki_dpower = _IQ(ADD_KI_DPOWER);
simple_scalar1.pidPower.Kp=_IQ(PID_KP_POWER);
simple_scalar1.pidPower.Ki=_IQ(PID_KI_POWER);
simple_scalar1.pidPower.Ki = _IQmpy(simple_scalar1.pidPower.Ki, simple_scalar1.k_freq_for_pid); // ââîäèì êîððåêöèþ Ki ïî ÷àñòîòå ØÈÌà
simple_scalar1.pidPower.Kc=_IQ(PID_KC_POWER);
simple_scalar1.pidPower.Kd=_IQ(PID_KD_POWER);
simple_scalar1.pidPower.OutMax=_IQ(500/NORMA_MZZ);
simple_scalar1.pidPower.OutMin=_IQ(0);
simple_scalar1.iq_spad_k = _IQ(0.993); //0.993 ~ 0.4 sek äî 5%
// ìèí. ñêîëüæåíèå
simple_scalar1.min_bpsi = _IQ(BPSI_MINIMAL/NORMA_FROTOR);
simple_scalar1.max_bpsi = _IQ(BPSI_MAXIMAL/NORMA_FROTOR);
}
/***************************************************************/
/* Ï/ï óïðàâëåíèy ïñåâäî âåêòîð 3 -
vector_moment(real Frot, - îáîðîòû ðîòîðà
real fzad, - çàäàííûå îáîðîòû ðîòîðà
real mzz_zad, - ìàêñèìàëüíûé âîçìîæíûé ìîìåíò-îãðàíè÷åíèå òîêà
real *Fz, - ðåçóëüòàò ðàñ÷åòà - ÷àñòîòà íàïðyæåíèy â ñòàòîðå
real *Uz1, - ðåçóëüòàò ðàñ÷åòà - êîýô. ìîäóëyöèè â 1 îáìîòêå ñòàòîðà
real *Uz2) - ðåçóëüòàò ðàñ÷åòà - êîýô. ìîäóëyöèè â 2 îáìîòêå ñòàòîðà
Èñïîëüçóåòñy ðåãóëyòîð ñêîðîñòè, êîòîðûé âûïîëíyåò çàäàíèå fzad ïî ñêîðîñòè
Çàâîäèòñy ïîñòîyííîå ñêîëüæåíèå = 0.5
Èäåò ðàñ÷åò íàïðyæåíèy ÷åðåç ìîäóëü òîêà ïî îäíîé èç 3-õ ôàçíîé ñòîåê.
Çàìûêàåòñy îáðàòíày ñâyçü ïî îáîðîòàì */
/****************************************************************/
//#pragma CODE_SECTION(simple_scalar,".fast_run");
void simple_scalar(int n_alg,
int n_wind_pump,
int direction,
_iq Frot_pid,
_iq Frot,
_iq fzad,
_iq iqKoefOgran,
_iq mzz_zad,
_iq bpsi_const,
_iq iqIm,
_iq iqUin,
_iq Iin,
_iq powerzad,
_iq power_pid,
_iq power_limit,
int mode_oborots_power,
_iq Izad_from_master,
int master,
int count_bs_work,
_iq *Fz,
_iq *Uz1,
_iq *Uz2,
_iq *Izad_out)
{
_iq mzz, dF, dI1, Izad, Uz_t1, Kpred_Ip, pred_Ip;//, znak_moment;
_iq dI2, Uz_t2;
_iq pkk=0,ikk=0;
_iq Im_regul=0;
static _iq bpsi=0;
// static _iq IQ_POLUS=0;
static _iq mzz_zad_int=0;
static _iq mzzi=0;
static _iq I1_i=0;
static _iq I2_i=0;
static _iq Im1=0;
static _iq Im2=0;
static _iq Uze_t1=0;
static _iq Uze_t2=0;
// static _iq fzad_ogr=0;
// static _iq koef_Uz_t_filter=0;
static _iq dI1_prev=0;
static _iq Uz_t1_prev=0;
static _iq dF_prev = 0;
static _iq mzz_prev = 0;
// static _iq mzz_add_1, mzz_add_2;
static _iq fzad_int=0;//, fzad_add_max;//,iq_mzz_max_for_fzad ;
static _iq fzad_add=0; //fzad_dec
_iq halfIm1, halfIm2;
static _iq powerzad_int=0, powerzad_add_max=0, pidFOutMax = 0, pidFOutMin = 0 ;
//powerzad_dec powerzad_add
// static _iq koef_bpsi=0;
// static _iq min_bpsi=0;
static int flag_uz_t1=0;
// static _iq correct_err=0;
// static _iq iq_dF_min1=0;
// static _iq iq_dF_min2=0;
_iq pred_dF,Kpred_dF;
static _iq dF_PREDEL_LEVEL2 = 0,dF_PREDEL_LEVEL1=0;
_iq Uze_ogr=0;
// static _iq iq_spad_k=1;
static _iq myq_temp=0;
static _iq bpsi_filter=0;
static _iq _iq_koef_im_on_tormog = _IQ(KOEF_IM_ON_TORMOG);
static _iq _iq_koef_im_on_tormog_max_temper_break = _IQ(KOEF_IM_ON_TORMOG_WITH_MAX_TEMPER_BREAK);
static _iq n_iq_koef_im_on_tormog = CONST_IQ_1, t_iq_koef_im_on_tormog = CONST_IQ_1;
static _iq _iq_koef_im_on_tormog_add =_IQ(0.0005), _iq_koef_im_on_tormog_dec = _IQ(0.01);
// static _iq F_revers_level00= _IQ(70.0/60.0/NORMA_FROTOR);
static _iq F_revers_level0 = _IQ(90.0/60.0/NORMA_FROTOR);
static _iq F_revers_level1 = _IQ(100.0/60.0/NORMA_FROTOR);
static _iq F_revers_level2 = _IQ(110.0/60.0/NORMA_FROTOR);
static _iq F_revers_level3 = _IQ(120.0/60.0/NORMA_FROTOR);
static _iq F_revers_level4 = _IQ(130.0/60.0/NORMA_FROTOR);
static _iq F_revers_level5 = _IQ(140.0/60.0/NORMA_FROTOR);
static _iq F_revers_level6 = _IQ(150.0/60.0/NORMA_FROTOR);
static _iq F_revers_level7 = _IQ(160.0/60.0/NORMA_FROTOR);
static _iq F_revers_level8 = _IQ(170.0/60.0/NORMA_FROTOR);
static _iq F_revers_level9 = _IQ(180.0/60.0/NORMA_FROTOR);
static _iq F_revers_level10 = _IQ(190.0/60.0/NORMA_FROTOR);
static _iq F_revers_level11 = _IQ(200.0/60.0/NORMA_FROTOR);
static _iq F_revers_level12 = _IQ(210.0/60.0/NORMA_FROTOR);
static _iq F_revers_level13 = _IQ(220.0/60.0/NORMA_FROTOR);
static _iq kF_revers_level00 = _IQ(0.65);
static _iq kF_revers_level0 = _IQ(0.70);
static _iq kF_revers_level1 = _IQ(0.75);
static _iq kF_revers_level2 = _IQ(0.78);
static _iq kF_revers_level3 = _IQ(0.80);
static _iq kF_revers_level4 = _IQ(0.82);
static _iq kF_revers_level5 = _IQ(0.84);
static _iq kF_revers_level6 = _IQ(0.86);
static _iq kF_revers_level7 = _IQ(0.88);
static _iq kF_revers_level8 = _IQ(0.90);
static _iq kF_revers_level9 = _IQ(0.91);
static _iq kF_revers_level10 = _IQ(0.92);
static _iq kF_revers_level11 = _IQ(0.93);
static _iq kF_revers_level12 = _IQ(0.94);
static _iq kF_revers_level13 = _IQ(0.96);
static _iq P_level0 = _IQ(70.0/60.0/NORMA_FROTOR);
static _iq P_level1 = _IQ(150.0/60.0/NORMA_FROTOR);
static _iq P_level2 = _IQ(160.0/60.0/NORMA_FROTOR);
static _iq P_level3 = _IQ(170.0/60.0/NORMA_FROTOR);
static _iq P_level4 = _IQ(180.0/60.0/NORMA_FROTOR);
static _iq P_level5 = _IQ(190.0/60.0/NORMA_FROTOR);
static _iq P_level6 = _IQ(200.0/60.0/NORMA_FROTOR);
static _iq P_level7 = _IQ(210.0/60.0/NORMA_FROTOR);
static _iq P_level8 = _IQ(220.0/60.0/NORMA_FROTOR);
static _iq P_level9 = _IQ(230.0/60.0/NORMA_FROTOR);
// static _iq P_level9 = _IQ(300.0/60.0/NORMA_FROTOR);
static _iq kP_level0 = _IQ(0.9);
static _iq kP_level1 = _IQ(0.9);
static _iq kP_level2 = _IQ(0.9);
static _iq kP_level3 = _IQ(0.85);
static _iq kP_level4 = _IQ(0.8);
static _iq kP_level5 = _IQ(0.75);
static _iq kP_level6 = _IQ(0.7);
static _iq kP_level7 = _IQ(0.65);
static _iq kP_level8 = _IQ(0.6);
static _iq kP_level9 = _IQ(0.55);
static _iq pid_kp_power = _IQ(PID_KP_POWER);
static _iq add_mzz_outmax_pidp = _IQ(100.0/NORMA_MZZ);
_iq new_pidP_OutMax = 0;
_iq k_ogr_p_koef_1 = 0;
_iq k_ogr_p_koef_2 = 0;
_iq k_ogr_n = 0;
_iq Frot_pid_abs;
_iq d_m=0;
_iq iq_decr_mzz_power;
_iq level1_power_ain_decr_mzz, level2_power_ain_decr_mzz;
_iq new_power_limit = 0;
static _iq koef_Power_filter2 = _IQ(1.0/(FREQ_PWM*EXP_FILTER_KOEF_OGRAN_POWER_LIMIT));//2.2 ñåê //30000;// 0,0012//16777;//0,001//13981;
Frot_pid_abs = _IQabs(Frot_pid);
// ïîïûòêà ïåðåñ÷èòàòü pidPower.Kp íà ëåòó
//
// if (Frot_pid_abs>=P_level0)
// {
// k_ogr_p_koef_1 = CONST_IQ_1 - _IQdiv( (Frot_pid_abs-P_level0) , (P_level9-P_level0) );
// if (k_ogr_p_koef_1<0) k_ogr_p_koef_1 = 0;
// }
// else
// k_ogr_p_koef_1 = CONST_IQ_1;
//
// //k_ogr_p_koef_1 ìåíÿåòñÿ îò 1 äî 0 ñ
//
// k_ogr_p_koef_2 = CONST_IQ_01 + _IQmpy(CONST_IQ_09, k_ogr_p_koef_1);
// simple_scalar1.pidPower.Kp = _IQmpy (pid_kp_power, k_ogr_p_koef_2);// _IQ(PID_KP_POWER)
simple_scalar1.pidPower.Kp = pid_kp_power;//_IQmpy (pid_kp_power, k_ogr_p_koef_2);// _IQ(PID_KP_POWER)
if (mode_oborots_power == ALG_MODE_SCALAR_OBOROTS)
{
if (simple_scalar1.cmd_new_calc_p_limit)
{
simple_scalar1.flag_decr_mzz_power = 0;
simple_scalar1.iq_decr_mzz_power_filter = CONST_IQ_1;
simple_scalar1.iq_decr_mzz_power = CONST_IQ_1;
new_power_limit = power_limit;
}
else
{
// ðàñ÷åò êîýô îãðàíè÷åíèÿ ìîùíîñòè ïî ïðåâûøåíèþ çàïàñà, âûøå ëèìèòà
// åñëè òåê ìîùíîñòü ïðèáëèæàåòñÿ ê ëèìèòó òî íà÷èíàåì ïðîïîðóöèîíàëüíî óìåíüøàòü òîê ÷åðåç êîýô.
// simple_scalar1.iq_decr_mzz_power_filter êîòîðûé èäåò îò 1.0 - íåò îãðàíè÷åíèÿ,
// äî 1-MAX_KOEF_OGRAN_POWER_LIMIT - ïîëíîå îãðàíè÷åíèå
new_power_limit = power_limit - simple_scalar1.sdvig_power_limit;
if (new_power_limit<MIN_DELTA_LEVEL_POWER_AIN_DECR_MZZ_DEF)
new_power_limit = MIN_DELTA_LEVEL_POWER_AIN_DECR_MZZ_DEF;
// ïåðâûé óðîâåíü
level1_power_ain_decr_mzz = new_power_limit - DELTA_LEVEL_POWER_AIN_DECR_MZZ_DEF - simple_scalar1.add_power_limit;
if (level1_power_ain_decr_mzz<0)
level1_power_ain_decr_mzz = 0;
// âòîðîé óðîâåíü
level2_power_ain_decr_mzz = level1_power_ain_decr_mzz + DELTA_LEVEL_POWER_AIN_DECR_MZZ_DEF + simple_scalar1.add_power_limit;
// ñìåñòèëè óðîâíè íà SMEWENIE_LEVEL_POWER_AIN_DECR_MZZ_DEF ââåðõ
level1_power_ain_decr_mzz = level1_power_ain_decr_mzz + SMEWENIE_LEVEL_POWER_AIN_DECR_MZZ_DEF;
level2_power_ain_decr_mzz = level2_power_ain_decr_mzz + SMEWENIE_LEVEL_POWER_AIN_DECR_MZZ_DEF;
d_m = power_pid - level1_power_ain_decr_mzz;
if (d_m<0)
d_m=0; // âñå â íîðìå
else
{
// ïîðà îãðàíè÷èâàòü ìîìåíò
if (d_m>=(level2_power_ain_decr_mzz-level1_power_ain_decr_mzz))
d_m = CONST_IQ_1;
else
d_m = _IQdiv(d_m,(level2_power_ain_decr_mzz - level1_power_ain_decr_mzz));
}
if (d_m<0)
d_m=0; // âñå â íîðìå
if (d_m>CONST_IQ_1)
d_m=CONST_IQ_1; // ïîëíîå îãðàíè÷åíèå
// ïåðåâåëè óðîâåíü îò 1.0 äî 0.0 â óðîâåíü îò MAX_KOEF_OGRAN_POWER_LIMIT äî 0.0
d_m = _IQmpy(d_m, MAX_KOEF_OGRAN_POWER_LIMIT); //
simple_scalar1.iq_decr_mzz_power = CONST_IQ_1 - d_m;// òåïåðü êîýô ìåíÿåòñÿ îò 1.0 - íåò îãðàí. äî MAX_KOEF_OGRAN_POWER_LIMIT ìàêñ. îãðàíè÷.
if (simple_scalar1.iq_decr_mzz_power<0)
simple_scalar1.iq_decr_mzz_power=0;
simple_scalar1.iq_decr_mzz_power_filter = exp_regul_iq(koef_Power_filter2,
simple_scalar1.iq_decr_mzz_power_filter,
simple_scalar1.iq_decr_mzz_power);
if (simple_scalar1.iq_decr_mzz_power_filter<0)
simple_scalar1.iq_decr_mzz_power_filter = 0;
if (d_m>0)
simple_scalar1.flag_decr_mzz_power = 1;
else
simple_scalar1.flag_decr_mzz_power=0;
}
}
else
{
simple_scalar1.flag_decr_mzz_power = 0;
simple_scalar1.iq_decr_mzz_power_filter = CONST_IQ_1;
simple_scalar1.iq_decr_mzz_power = CONST_IQ_1;
new_power_limit = power_limit;
}
#if (ENABLE_DECR_MZZ_POWER_IZAD)
if (simple_scalar1.disable_KoefOgranIzad==0)
simple_scalar1.iqKoefOgranIzad = _IQmpy(iqKoefOgran,simple_scalar1.iq_decr_mzz_power_filter);
else
simple_scalar1.iqKoefOgranIzad = iqKoefOgran;
#else
simple_scalar1.iqKoefOgranIzad = iqKoefOgran;
#endif
//static _iq _iq_1 = _IQ(1.0);
// static _iq mzz_int_level1_on_F=0;
// mzz = _IQsat(mzz,mzz_zad_int,0);
simple_scalar1.mzz_zad_in1 = mzz_zad;
simple_scalar1.Izad_from_master = Izad_from_master;
iqKoefOgran = _IQsat(iqKoefOgran,CONST_IQ_1,0);
/* óñòàíàâëèâàåì íà÷àëüíûå óñëîâèy âñåõ ðåãóëyòîðîâ */
if ( (Frot==0) && (fzad==0) )
{
mzzi = 0;
fzad_int = 0;
powerzad_int = 0;
bpsi_filter = 0;
pidFOutMax = pidFOutMin = 0;
n_iq_koef_im_on_tormog = CONST_IQ_1;//_IQ(1.0);
simple_scalar1.iq_decr_mzz_power_filter = CONST_IQ_1;
}
if (mzz_zad==0)
{
bpsi_filter = 0;
mzz=0;
I1_i=0;
mzzi=0;
mzz_zad_int = 0;
fzad_int = 0;
powerzad_int = 0;
simple_scalar1.pidIm1.Up1 = 0;
simple_scalar1.pidIm1.Ui = 0;
simple_scalar1.pidF.Up1 = 0;
simple_scalar1.pidF.Ui = 0;
simple_scalar1.pidPower.Up1 = 0;
simple_scalar1.pidPower.Ui = 0;
Uze_t1=0;
Uze_t2=0;
dI1_prev = 0;
Uz_t1_prev = 0;
dF_prev = 0;
mzz_prev = 0;
// çàäàò÷èê èíòåíñèâíîñòè fzad
fzad_add = _IQ(FZAD_ADD_MAX/NORMA_FROTOR);
// çàäàò÷èê èíòåíñèâíîñòè fzad ïî ìèíóñó
// fzad_dec = _IQ(FZAD_DEC/NORMA_FROTOR);
//
//
// çàäàò÷èê èíòåíñèâíîñòè mzz_max
// iq_mzz_max_for_fzad = _IQ(1000.0/NORMA_MZZ);
// êîýô. ôèëüòðà Uz_t_filter
// koef_Uz_t_filter = _IQ(0.001/0.5); //0.0333
// êîýô. ðàñ÷åòà ñêîëüæåíèå îò mzz
// koef_bpsi = _IQ((0.6/NORMA_WROTOR)/(200.0/NORMA_MZZ));
flag_uz_t1=0;
// êîýô. óñèëåíèß äëß èíòåãðàëüíîãî àäàïòèâíîãî êîýô. â ðåãóëßòîðå ñêîðîñòè
// correct_err = _IQ(2.5/NORMA_WROTOR);
// ìèí. óðîâåíü äëß ðàáîòû êîýô. óñèëåíèß äëß èíòåãðàëüíîãî àäàïòèâíîãî êîýô. â ðåãóëßòîðå ñêîðîñòè
// iq_dF_min1 = _IQ(1.0/NORMA_WROTOR);
// iq_dF_min2 = _IQ(1.5/NORMA_WROTOR);
// êîýô. çàäàíèß ñêîðîñòè ñïàäà Km
// iq_spad_k = _IQ(0.993); //0.993 ~ 0.4 sek äî 5%
// iq_spad_k = _IQ(0.9965); //0.993 ~ 0.4 sek äî 5%
// dF_PREDEL_LEVEL1 = _IQ(0.5/NORMA_WROTOR);
// dF_PREDEL_LEVEL2 = _IQ(1.5/NORMA_WROTOR);
// mzz_int_level1_on_F = _IQ(1.0/NORMA_WROTOR);
// mzz_int_level2_on_F = _IQ(1.5/NORMA_WROTOR);
}
// îãðàíè÷åíèå ïðè ðåêóïåðàöèè
if (direction==0)
{
// ñòîèì
n_iq_koef_im_on_tormog = CONST_IQ_1;//_IQ(1.0);
}
else
if (direction==-1 && fzad <= 0)
{
// åäåì íàçàä, çàäàíèå ñîâïàäàåò ñ íàïðàâëåíèåì âðàùåíèÿ
if (Frot_pid<-F_revers_level13)
n_iq_koef_im_on_tormog = kF_revers_level13;
else
if (Frot_pid<-F_revers_level12)
n_iq_koef_im_on_tormog = kF_revers_level12;
else
if (Frot_pid<-F_revers_level11)
n_iq_koef_im_on_tormog = kF_revers_level11;
else
if (Frot_pid<-F_revers_level10)
n_iq_koef_im_on_tormog = kF_revers_level10;
else
if (Frot_pid<-F_revers_level9)
n_iq_koef_im_on_tormog = kF_revers_level9;
else
if (Frot_pid<-F_revers_level8)
n_iq_koef_im_on_tormog = kF_revers_level8;
else
if (Frot_pid<-F_revers_level7)
n_iq_koef_im_on_tormog = kF_revers_level7;
else
if (Frot_pid<-F_revers_level6)
n_iq_koef_im_on_tormog = kF_revers_level6;
else
if (Frot_pid<-F_revers_level5)
n_iq_koef_im_on_tormog = kF_revers_level5;
else
if (Frot_pid<-F_revers_level4)
n_iq_koef_im_on_tormog = kF_revers_level4;
else
if (Frot_pid<-F_revers_level3)
n_iq_koef_im_on_tormog = kF_revers_level3;
else
if (Frot_pid<-F_revers_level2)
n_iq_koef_im_on_tormog = kF_revers_level2;
else
if (Frot_pid<-F_revers_level1)
n_iq_koef_im_on_tormog = kF_revers_level1;
if (Frot_pid<-F_revers_level0)
n_iq_koef_im_on_tormog = kF_revers_level0;
else
n_iq_koef_im_on_tormog = kF_revers_level00;
}
else
if (direction==1 && fzad>=0)
{
// åäåì âïåðåä, çàäàíèå ñîâïàäàåò ñ íàïðàâëåíèåì âðàùåíèÿ
n_iq_koef_im_on_tormog = CONST_IQ_1;//_IQ(1.0);
}
else
{
// åñëè ðåêóïåðàöèÿ òî óìåíüøèì òîê â _iq_koef_im_on_tormog ðàç ìåíüøå îò çàäàííîãî
// mzz_zad = _IQmpy(mzz_zad, _iq_koef_im_on_tormog);
if (edrk.warnings.e9.bits.BREAK_TEMPER_ALARM == 1)
// åñòü ïåðåãðåâ àâàðèéíûé, ñíèæàåì ìîùíîñòü
n_iq_koef_im_on_tormog = _iq_koef_im_on_tormog_max_temper_break;
else
n_iq_koef_im_on_tormog = _iq_koef_im_on_tormog;
}
t_iq_koef_im_on_tormog = zad_intensiv_q(_iq_koef_im_on_tormog_add,
_iq_koef_im_on_tormog_dec,
t_iq_koef_im_on_tormog,
n_iq_koef_im_on_tormog);
mzz_zad = _IQmpy(mzz_zad, t_iq_koef_im_on_tormog);
simple_scalar1.mzz_zad_in2 = mzz_zad;
/* çàäàò÷èê èíòåíñèâíîñòè ìîìåíòà */
if (n_alg==1)
{
mzz_zad_int = zad_intensiv_q(simple_scalar1.mzz_add_2, simple_scalar1.mzz_add_2, mzz_zad_int, mzz_zad);
// if (Frot_pid>mzz_int_level1_on_F)
// mzz_zad_int = zad_intensiv_q(mzz_add_1, mzz_add_1, mzz_zad_int, mzz_zad);
// else
// mzz_zad_int = zad_intensiv_q(mzz_add_2, mzz_add_2, mzz_zad_int, mzz_zad);
}
if (n_alg==2)
mzz_zad_int = zad_intensiv_q(simple_scalar1.mzz_add_2, simple_scalar1.mzz_add_2, mzz_zad_int, mzz_zad);
// myq_temp = _IQdiv(mzz_zad, simple_scalar1.iq_mzz_max_for_fzad);
// myq_temp = _IQmpy( myq_temp, fzad_add_max);
// fzad_add = myq_temp;
fzad_int = zad_intensiv_q(fzad_add, fzad_add, fzad_int, fzad );
powerzad_int = zad_intensiv_q(simple_scalar1.powerzad_add, simple_scalar1.powerzad_add, powerzad_int, powerzad);
if (n_alg==1)
{
/* ðåãóëyòîð ñêîðîñòè */
if (mzz_zad_int>=0)
{
dF = fzad_int - Frot_pid;//*direction;
////////// Power PI //////////////
//if (_IQabs(simple_scalar1.pidF.Out))
k_ogr_n = (_IQabs(power_pid) - _IQabs(powerzad_int));
// if (k_ogr_n<0) k_ogr_n = 0;
k_ogr_n = CONST_IQ_1 - _IQdiv(k_ogr_n, _IQabs(powerzad_int));
simple_scalar1.k_ogr_n = _IQsat(k_ogr_n,CONST_IQ_1,-CONST_IQ_1);
// íîâîå îãðàíè÷åíèÿ äëÿ pidP OutMax
new_pidP_OutMax = _IQabs(simple_scalar1.pidF.Out)+add_mzz_outmax_pidp;
new_pidP_OutMax = _IQsat(new_pidP_OutMax, mzz_zad_int, add_mzz_outmax_pidp ); // îò 100 äî ðåçóëüòàòà âûõîäà ðåãóëÿòîðà simple_scalar1.pidF.Out
// ñòàðûé âàðèàíò îãðàíè÷åíèÿ
// new_pidP_OutMax = mzz_zad_int;
simple_scalar1.pidPower.OutMax = new_pidP_OutMax;
simple_scalar1.pidPower.OutMin = 0;
// pidPower.Kp = _IQmpy( _IQdiv(iq_add_kp_dpower, _IQsat(mzz_zad,mzz_zad,MIN_MZZ_FOR_DPOWER)), pidPower_Kp);
// pidPower.Ki = _IQmpy( _IQdiv(iq_add_ki_dpower, _IQsat(mzz_zad,mzz_zad,MIN_MZZ_FOR_DPOWER)), pidPower_Ki);
// simple_scalar1.pidPower.Ki = _IQmpy(simple_scalar1.pidPower.Ki, simple_scalar1.k_freq_for_pid);
simple_scalar1.pidPower.Ref = _IQabs(powerzad_int); // òóò òîëüêî ïîëîæèòåëüíàÿ ìîùíîñòü
simple_scalar1.pidPower.Fdb = _IQabs(power_pid);
simple_scalar1.pidPower.calc(&simple_scalar1.pidPower);
// Saturate the integral output
if (simple_scalar1.pidPower.Ui > simple_scalar1.pidPower.OutMax)
simple_scalar1.pidPower.Ui = simple_scalar1.pidPower.OutMax;
else if (simple_scalar1.pidPower.Ui < simple_scalar1.pidPower.OutMin)
simple_scalar1.pidPower.Ui = simple_scalar1.pidPower.OutMin;
//////////////////////////////
//////////////////////////////
// îãðàíè÷åíèå ìàêñ. çíà÷èíèß âûõîäà ðåãóëßòîðà
// pidF.OutMax=mzz_zad_int;
// èëè òàê
pidFOutMax = zad_intensiv_q(simple_scalar1.mzz_add_3, simple_scalar1.mzz_add_1, pidFOutMax, simple_scalar1.pidPower.Out);
pidFOutMin = zad_intensiv_q(simple_scalar1.mzz_add_3, simple_scalar1.mzz_add_1, pidFOutMin, simple_scalar1.pidPower.Out);
// fzad
if (direction==-1 && fzad <= 0)
{
pidFOutMax = 0;
simple_scalar1.pidF.OutMax = 0;//simple_scalar1.pidPower.Out;
simple_scalar1.pidF.OutMin = -pidFOutMin;//-simple_scalar1.pidPower.Out;
}
else
if (direction==1 && fzad>=0)
{
pidFOutMin = 0;
simple_scalar1.pidF.OutMax = pidFOutMax;//simple_scalar1.pidPower.Out;
simple_scalar1.pidF.OutMin = 0;//-simple_scalar1.pidPower.Out;
}
else
{
simple_scalar1.pidF.OutMax = pidFOutMax;//simple_scalar1.pidPower.Out;
simple_scalar1.pidF.OutMin = -pidFOutMin;//-simple_scalar1.pidPower.Out;
}
/*
// pzad
if (direction==-1 && powerzad <= 0)
{
}
else
if (direction==1 && powerzad>=0)
{
}
else
{
}
*/
// pidF.OutMax = mzz_zad;
if (count_bs_work==2)
simple_scalar1.pidF.Kp = simple_scalar1.pidF_Kp;//_IQmpy( _IQdiv(simple_scalar1.iq_add_kp_df, _IQsat(mzz_zad,mzz_zad,simple_scalar1.min_mzz_for_df)), simple_scalar1.pidF_Kp);
else
simple_scalar1.pidF.Kp = _IQmpy2(simple_scalar1.pidF_Kp);
simple_scalar1.pidF.Ki = simple_scalar1.pidF_Ki;//_IQmpy( _IQdiv(simple_scalar1.iq_add_ki_df, _IQsat(mzz_zad,mzz_zad,simple_scalar1.min_mzz_for_df)), simple_scalar1.pidF_Ki);
simple_scalar1.pidF.Ki = _IQmpy(simple_scalar1.pidF.Ki,simple_scalar1.k_freq_for_pid);
/////////////////////////
// if (_IQabs(dF)<iq_dF_min1)
// {
// dF=iq_dF_min1;
// m.m1.bit.w_rotor_ust = 1;
// }
//
// if (_IQabs(dF)>iq_dF_min2)
// {
// m.m1.bit.w_rotor_ust = 0;
// }
//////////////////////////////////
// áåç êîððåêöèé dF
//fzad_int =
simple_scalar1.pidF.Ref = _IQmpy(fzad_int, iqKoefOgran);
simple_scalar1.pidF.Fdb = Frot_pid;//*direction;
simple_scalar1.pidF.calc(&simple_scalar1.pidF);
// Saturate the integral output
if (simple_scalar1.pidF.Ui > simple_scalar1.pidF.OutMax)
simple_scalar1.pidF.Ui = simple_scalar1.pidF.OutMax;
else if (simple_scalar1.pidF.Ui < simple_scalar1.pidF.OutMin)
simple_scalar1.pidF.Ui = simple_scalar1.pidF.OutMin;
/////////////////////////////////////
mzz = _IQabs(simple_scalar1.pidF.Out); // òóò ìîäóëü!!!
///////////////////////////////////////
// çàäàò÷èê èíòåíñèâíîñòè íà òîê
// mzz = zad_intensiv_q(mzz_add_2, mzz_add_2, mzz, pidF.Out);
// mzzi = zad_intensiv_q(mzz_add_2, mzz_add_2, mzzi, mzz);
// îãðàíè÷èëè äèàïàçîí mzz
mzz = _IQsat(mzz,mzz_zad_int,0);
}
else
{
mzz = 0;
}
}
if (n_alg==2)
{
mzz = mzz_zad_int;
}
if (master == MODE_SLAVE)
{
mzz = Izad_from_master;
// îãðàíè÷èëè äèàïàçîí mzz
mzz = _IQsat(mzz,mzz_zad_int,0);
}
*Izad_out = mzz;
/* ïðè ïðåâûøåíèè òîêà íåêîòîðîãî ïîðîãîâîãî çíà÷åíèy I_PREDEL_LEVEL1
íà÷èíàåì ëèíåéíî ñáàâëyòü ìîìåíò */
/*
pred_Ip = (filter.I_3+filter.I_6)-I_PREDEL_LEVEL1;
if (pred_Ip<0)
Kpred_Ip=0.0; // âñå â íîðìå
else
{
// ïîðà îãðàíè÷èâàòü ìîìåíò
if (pred_Ip>=(I_PREDEL_LEVEL2-I_PREDEL_LEVEL1))
Kpred_Ip=1;
else
Kpred_Ip = pred_Ip/(I_PREDEL_LEVEL2-I_PREDEL_LEVEL1);
}
// à âîò è îãðàíè÷åíèå
Izad = mzz * (1-Kpred_Ip);
*/
Izad = _IQmpy(mzz, simple_scalar1.iqKoefOgranIzad);
// if ((n_alg==1) || (n_alg==2))
// {
//
// Im1 = iqIm_1;
// Im2 = iqIm_2;
//
// if (n_wind_pump==0) // ðàáîòà ïî äâóì îáìîòêàì
// {
//
// halfIm1 = Im1 >> 1;
// halfIm2 = Im2 >> 1;
//
// if (Im1>halfIm2) //if (Im1>IQdiv(Im2,_IQ(2.0)))
// {
// Im_regul=Im1;
// simple_scalar1.UpravIm1=1;
// simple_scalar1.UpravIm2=0;
// }
// else
// {
// if (Im2>halfIm1)
// {
// Im_regul=Im2;
// simple_scalar1.UpravIm2=1;
// simple_scalar1.UpravIm1=0;
// }
// else
// {
// Im_regul=Im1; //Im1
// simple_scalar1.UpravIm1=1;//1
// simple_scalar1.UpravIm2=0;//0
// }
// }
// }
//
// if (n_wind_pump==1) // íà íàñîñå 1 îáìîòêà çíà÷èò áåðåì òîê ñ 2-îé
// {
// Im_regul=Im2;
// simple_scalar1.UpravIm1=0;
// simple_scalar1.UpravIm2=1;
// }
//
// if (n_wind_pump==2) // íà íàñîñå 2 îáìîòêà çíà÷èò áåðåì òîê ñ 1-îé
// {
// Im_regul=Im1;
// simple_scalar1.UpravIm1=1;
// simple_scalar1.UpravIm2=0;
// }
Im_regul = iqIm;
simple_scalar1.Im_regul = Im_regul;
simple_scalar1.Izad = Izad;
dI1 = (Izad - Im_regul );
simple_scalar1.pidIm1.Ki = simple_scalar1.pidIm_Ki;
simple_scalar1.pidIm1.Ki = _IQmpy(simple_scalar1.pidIm1.Ki,simple_scalar1.k_freq_for_pid);
simple_scalar1.pidIm1.Ref = _IQdiv(Izad,iqUin);
simple_scalar1.pidIm1.Fdb = _IQdiv(Im_regul,iqUin);
simple_scalar1.pidIm1.calc(&simple_scalar1.pidIm1);
Uz_t1 = simple_scalar1.pidIm1.Out;
// îãðàíè÷åíèå ñïàäà Km
if (Uz_t1<Uze_t1)
{
Uze_ogr =_IQmpy(Uze_t1, simple_scalar1.iq_spad_k);
if (Uze_ogr>Uz_t1) Uze_t1 = Uze_ogr;
else
Uze_t1 = Uz_t1;
}
else
{
Uze_t1 = Uz_t1;
}
Uze_t1 = _IQsat(Uze_t1,simple_scalar1.pidIm1.OutMax, simple_scalar1.pidIm1.OutMin);
// }
/* ðåçóëüòàòû îòäàåì íàðóæó */
*Uz1 = Uze_t1;
*Uz2 = Uze_t1;
bpsi = bpsi_const + simple_scalar1.add_bpsi;
// ñêîëüæ. ~ ìîìåíòó
// bpsi = _IQmpy(koef_bpsi,mzz);
bpsi = _IQsat(bpsi,simple_scalar1.max_bpsi, simple_scalar1.min_bpsi);
#ifdef BAN_ROTOR_REVERS_DIRECT
// èñïîëüçóåì çàùèòó îò íåïðàâèëüíîãî âðàùåíèß
if (analog.filter_direct_rotor==-1)
// êðóòèìñß â äðóãóþ ñòîðîíó, ïîýòîìó ïûòàåìñß ïåðåéòè íà ñêîëüæåíèè â íîðìàëüíîå âðàùåíèå
*Fz = bpsi;
else
// âñå íîðìàëüíî, íàïðàâëåíèå ïðàâèëüíîå
*Fz = _IQmpy(Frot,IQ_POLUS) + bpsi;
#else
if (simple_scalar1.pidF.Out < 0)
{
bpsi_filter = exp_regul_iq(koefBpsi, bpsi_filter, -bpsi);
}
else
if (simple_scalar1.pidF.Out > 0)
{
bpsi_filter = exp_regul_iq(koefBpsi, bpsi_filter, bpsi);
}
else
bpsi_filter = exp_regul_iq(koefBpsi, bpsi_filter, 0);
// *Fz = _IQmpy(Frot*direction,simple_scalar1.poluses) + bpsi_filter;
*Fz = _IQmpy(Frot, simple_scalar1.poluses) + bpsi_filter;
simple_scalar1.bpsi_curent = bpsi_filter;
#endif
simple_scalar1.mzz_zad_int = mzz_zad_int;
simple_scalar1.Uze_t1 = Uze_t1;
simple_scalar1.iqKoefOgran = iqKoefOgran;
simple_scalar1.Fz = *Fz;
simple_scalar1.direction = direction;
simple_scalar1.fzad_int = fzad_int;
// if (n_alg==2)
// {
//
// *Fz = fzad_provorot;
// /* bpsi - ñêîëüæåíèå, áåðåì ïîêà
// êîíñòàíòîé õîòy òîæå äîëæåí ðåãóëèðîâàòüñy */
// }
}

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/*
* alg_simple_scalar.h
*
* Created on: 26 èþí. 2020 ã.
* Author: Vladislav
*/
#ifndef SRC_MAIN_ALG_SIMPLE_SCALAR_H_
#define SRC_MAIN_ALG_SIMPLE_SCALAR_H_
#include "IQmathLib.h"
#include "pid_reg3.h"
typedef struct { PIDREG3 pidIm1;
PIDREG3 pidF;
PIDREG3 pidPower;
_iq mzz_add_1;
_iq mzz_add_2;
_iq poluses;
_iq fzad_add_max;
_iq fzad_dec;
_iq powerzad_add;
_iq powerzad_dec;
_iq min_bpsi;
_iq koef_Uz_t_filter;
_iq iq_spad_k;
_iq iq_mzz_max_for_fzad;
_iq k_freq_for_pid;
_iq iq_add_kp_df;
_iq iq_add_ki_df;
_iq min_mzz_for_df;
_iq pidF_Kp;
_iq pidF_Ki;
int UpravIm1;
int UpravIm2;
_iq pidIm_Ki;
_iq mzz_zad_in1;
_iq mzz_zad_in2;
_iq mzz_zad_int;
_iq Im_regul;
_iq Izad;
_iq Izad_from_master;
_iq bpsi_curent;
_iq Uze_t1;
_iq iqKoefOgran;
_iq Fz;
int direction;
_iq fzad_int;
_iq add_bpsi;
_iq max_bpsi;
_iq mzz_add_3;
_iq k_ogr_n;
_iq iq_decr_mzz_power;
_iq iq_decr_mzz_power_filter;
int flag_decr_mzz_power;
_iq iqKoefOgranIzad;
int disable_KoefOgranIzad;
_iq add_power_limit;
_iq sdvig_power_limit;
int cmd_new_calc_p_limit;
} ALG_SIMPLE_SCALAR;
#define ALG_SIMPLE_SCALAR_DEFAULT {PIDREG3_DEFAULTS,PIDREG3_DEFAULTS,PIDREG3_DEFAULTS,\
0,0,0,0,0,\
0,0,0,0,0,\
0,0,0,0,0,\
0,0,0,0,0,\
0,0,0,0,0,0,0, \
0,0, 0,0,0, 0,0, 0, 0, 0,0,0,0,0,0, 0,0 \
}
extern ALG_SIMPLE_SCALAR simple_scalar1;
void simple_scalar(int n_alg, int n_wind_pump, int direction,
_iq Frot_pid, _iq Frot,_iq fzad,_iq mzz_zad, _iq bpsi_const,
_iq iqKoefOgran,
_iq iqIm, _iq iqUin, _iq Iin, _iq powerzad, _iq power_pid,
_iq power_limit, int mode_oborots_power,
_iq Izad_from_master, int master, int count_bs_work,
_iq *Fz, _iq *Uz1, _iq *Uz2, _iq *Izad);
void init_simple_scalar(void);
#endif /* SRC_MAIN_ALG_SIMPLE_SCALAR_H_ */

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/*
* alg_uf_const.c
*
* Created on: 26 èþí. 2020 ã.
* Author: Yura
*/
#include <alg_uf_const.h>
#include <edrk_main.h>
#include <params_alg.h>
#include <params_norma.h>
#include <params_pwm24.h>
#include "mathlib.h"
#define T_NARAST 15 // ñåê.
//VHZPROF vhz1 = VHZPROF_DEFAULTS;
ALG_UF_CONST uf_const1 = ALG_UF_CONST_DEFAULT;
void init_uf_const(void)
{
uf_const1.freq = 0;
uf_const1.km = 0;
uf_const1.zad_plus_km = _IQ(1.0/(FREQ_PWM*T_NARAST));
uf_const1.rmp_freq.RampLowLimit = _IQ(-4); //0
uf_const1.rmp_freq.RampHighLimit = _IQ(4);
uf_const1.rmp_freq.RampPlus = _IQ(0.0002);
uf_const1.rmp_freq.RampMinus = _IQ(-0.0002);
uf_const1.rmp_freq.DesiredInput = 0;
uf_const1.rmp_freq.Out = 0;
uf_const1.max_km = _IQ(K_STATOR_MAX);
}
void uf_const(_iq *Fz, _iq *Uz1, _iq *Uz2)
{
// vhz1.HighFreq = _IQ(f.fmax_uf/F_STATOR_MAX);
/////////////
uf_const1.km = edrk.zadanie.iq_kzad_rmp;
// uf_const1.km = zad_intensiv_q(uf_const1.zad_plus_km, uf_const1.zad_plus_km, uf_const1.km, edrk.zadanie.iq_kzad);
// uf_const1.km = _IQsat(uf_const1.km,uf_const1.max_km,0);
*Uz1 = uf_const1.km;
*Uz2 = uf_const1.km;
/////////////////
uf_const1.freq = edrk.zadanie.iq_fzad_rmp;
// uf_const1.rmp_freq.DesiredInput = uf_const1.freq;
// uf_const1.rmp_freq.calc(&uf_const1.rmp_freq);
*Fz = uf_const1.freq;
/*
vhz1.Freq = Fzad;
vhz1.calc(&vhz1);
*Fz = rmp_freq.Out;
*/
}

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/*
* alg_uf_const.h
*
* Created on: 26 èþí. 2020 ã.
* Author: Yura
*/
#ifndef SRC_MAIN_ALG_UF_CONST_H_
#define SRC_MAIN_ALG_UF_CONST_H_
#include "IQmathLib.h"
#include "rmp_cntl_v1.h"
typedef struct {
RMP_V1 rmp_freq;
_iq freq;
_iq km;
_iq zad_plus_km;
_iq max_km;
} ALG_UF_CONST;
extern ALG_UF_CONST uf_const1;
#define ALG_UF_CONST_DEFAULT {RMP_V1_DEFAULTS, 0, 0, 0, 0 }
void init_uf_const(void);
void uf_const(_iq *Fz, _iq *Uz1, _iq *Uz2);
#endif /* SRC_MAIN_ALG_UF_CONST_H_ */

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/*
* another_bs.c
*
* Created on: 13 íîÿá. 2024 ã.
* Author: Evgeniy_Sokolov
*/
#include <edrk_main.h>
#include <params.h>
#include <params_alg.h>
#include <params_norma.h>
#include <params_pwm24.h>
#include <params_temper_p.h>
#include <project.h>
#include "IQmathLib.h"
#include "mathlib.h"
#include <optical_bus.h>
#include "adc_tools.h"
#include "CAN_project.h"
#include "CAN_Setup.h"
#include "global_time.h"
#include "v_rotor.h"
#include "ukss_tools.h"
#include "another_bs.h"
#include "control_station_project.h"
#include "control_station.h"
#include "can_bs2bs.h"
#include "sync_tools.h"
#include "vector_control.h"
#include "master_slave.h"
#include "digital_filters.h"
//////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////
void read_data_from_bs(void)
{
int g;
if (control_station.alive_control_station[CONTROL_STATION_ANOTHER_BS])
{
g = Unites[ANOTHER_BSU1_CAN_DEVICE][5];
edrk.int_koef_ogran_power_another_bs = g;
edrk.iq_koef_ogran_power_another_bs = ((float)edrk.int_koef_ogran_power_another_bs);
g = Unites[ANOTHER_BSU1_CAN_DEVICE][6];
edrk.power_kw_another_bs = g;
edrk.iq_power_kw_another_bs = _IQ(((float)edrk.power_kw_another_bs * 1000.0)/NORMA_ACP/NORMA_ACP);
g = Unites[ANOTHER_BSU1_CAN_DEVICE][7];
edrk.active_post_upravl_another_bs = g;
g = Unites[ANOTHER_BSU1_CAN_DEVICE][9];
edrk.Ready1_another_bs = g;
g = Unites[ANOTHER_BSU1_CAN_DEVICE][10];
edrk.Ready2_another_bs = g;
g = Unites[ANOTHER_BSU1_CAN_DEVICE][11];
edrk.MasterSlave_another_bs = g;
g = Unites[ANOTHER_BSU1_CAN_DEVICE][3] & 0x1;
edrk.ump_cmd_another_bs = g;
g = (Unites[ANOTHER_BSU1_CAN_DEVICE][3] & 0x2) >> 1;
edrk.qtv_cmd_another_bs = g;
g = Unites[ANOTHER_BSU1_CAN_DEVICE][13];
edrk.errors_another_bs_from_can = g;
}
else
{
edrk.errors_another_bs_from_can = 0;
}
}
//////////////////////////////////////////////////////////
unsigned int read_cmd_sbor_from_bs(void)
{
unsigned int g;
g = Unites[ANOTHER_BSU1_CAN_DEVICE][4];
return g;
}
void UpdateTableSecondBS(void)
{
int cmd;
int i,k;
static unsigned int counter_sum_errors = 0;
Unites2SecondBS[0]++;
Unites2SecondBS[1] = global_time.miliseconds;
Unites2SecondBS[2] = edrk.flag_second_PCH;
Unites2SecondBS[3] = (edrk.to_shema.bits.QTV_ON_OFF << 1) | (edrk.to_shema.bits.UMP_ON_OFF);
Unites2SecondBS[4] = edrk.SumSbor;
Unites2SecondBS[5] = edrk.int_koef_ogran_power;
Unites2SecondBS[6] = (int)edrk.power_kw;
Unites2SecondBS[7] = (int)edrk.active_post_upravl;
Unites2SecondBS[8] = (int)edrk.power_kw;
Unites2SecondBS[9] = edrk.Status_Ready.bits.ready1;
Unites2SecondBS[10] = edrk.Status_Ready.bits.ready_final;
Unites2SecondBS[11] = edrk.MasterSlave;
Unites2SecondBS[12] = _IQtoF(vect_control.iqId_min) * NORMA_ACP;
Unites2SecondBS[13] = pause_detect_error(&counter_sum_errors, 10, edrk.summ_errors);
for (i=0;i<CONTROL_STATION_CMD_LAST;i++)
{
if ((POS_STATION_CMD_ANOTHER_BSU1+i)<SIZE_ARR_CAN_UNITES_BS2BS)
Unites2SecondBS[POS_STATION_CMD_ANOTHER_BSU1+i] = control_station.active_array_cmd[i];
}
// Unites2SecondBS[3] = _IQtoIQ15(edrk.zadanie.iq_fzad);
// Unites2SecondBS[4] = _IQtoIQ15(edrk.zadanie.iq_kzad);
// Unites2SecondBS[5] = _IQtoIQ15(edrk.zadanie.iq_Izad);
// Unites2SecondBS[6] = (edrk.zadanie.oborots_zad);
// Unites2SecondBS[7] = _IQtoIQ15(edrk.zadanie.iq_power_zad);
if (edrk.flag_second_PCH==0)
{
// Unites2SecondBS[5] = Unites[ANOTHER_BSU1_CAN_DEVICE][8];
// Unites2SecondBS[8] = 0xaa;
//
// max_count_send_to_can2second_bs = 10;
}
else
{
// Unites2SecondBS[5] = Unites[ANOTHER_BSU1_CAN_DEVICE][8];
// Unites2SecondBS[8] = 0x55;
//
// max_count_send_to_can2second_bs = 10;
}
}
//////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////
void detect_error_from_another_bs(void)
{
if (edrk.errors_another_bs_from_can)
edrk.errors.e7.bits.ANOTHER_BS_ALARM |= 1;
}
//////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////
#define MAX_ERRORS_DETECT_ALIVE_ANOTHER_BS 30 //20
#define MAX_WAIT_READY1_DETECT_ALIVE_ANOTHER_BS 100
#define MAX_WAIT_READY2_DETECT_ALIVE_ANOTHER_BS 70 //30 // äîëæåí áûòü áîëüøå ÷åì MAX_ERRORS_DETECT_ALIVE_ANOTHER_BS
//////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////
void detect_alive_another_bs(void)
{
// static unsigned int count_wait_ready = 0;
static unsigned int prev_another_bs_maybe_on = 0;
static unsigned int prev_another_bs_maybe_on_after_ready1 = 0,
prev_alive_can_to_another_bs = 0;
int real_box;
real_box = get_real_in_mbox(UNITS_TYPE_BOX,ANOTHER_BSU1_CAN_DEVICE);
if (real_box != -1)
{
edrk.ms.err_signals.alive_can_to_another_bs = CAN_timeout[real_box];
if (edrk.ms.err_signals.alive_can_to_another_bs == 1
&& prev_alive_can_to_another_bs == 0)
{
// reinit CAN
InitCanSoft();
}
prev_alive_can_to_another_bs = edrk.ms.err_signals.alive_can_to_another_bs;
}
#if (USE_TK_3)
edrk.ms.err_signals.alive_opt_bus_read = !project.cds_tk[3].optical_data_in.ready;
edrk.ms.err_signals.alive_opt_bus_write = !project.cds_tk[3].optical_data_out.ready;
#else
edrk.ms.err_signals.alive_opt_bus_read = 1;
edrk.ms.err_signals.alive_opt_bus_write = 1;
#endif
edrk.ms.err_signals.alive_sync_line = !sync_data.global_flag_sync_1_2;
edrk.ms.err_signals.alive_sync_line_local = !sync_data.local_flag_sync_1_2;
// edrk.ms.err_signals.input_alarm_another_bs = edrk.from_ing1.bits.
// òóò ïîêà îòêëþ÷åí êàíàë.
// edrk.ms.err_signals.fast_optical_alarm = 0;//!project.cds_tk[3].read.sbus.status_tk_40pin.bit.tk5_ack;
edrk.ms.err_signals.another_rascepitel = edrk.from_second_pch.bits.RASCEPITEL;
if (edrk.ms.err_signals.alive_can_to_another_bs
&& (edrk.ms.err_signals.alive_opt_bus_read
|| edrk.ms.err_signals.alive_opt_bus_write)
&& edrk.ms.err_signals.alive_sync_line
// && edrk.ms.err_signals.fast_optical_alarm
)
{
edrk.ms.another_bs_maybe_off = 1;
edrk.ms.another_bs_maybe_on = 0;
}
else
{
edrk.ms.another_bs_maybe_off = 0;
edrk.ms.another_bs_maybe_on = 1;
}
// åñëè ñâÿçü âîññòàíîâèëàñü, òî îïÿòü æäåì íåêîòîðîå âðåìÿ ïîêà çàïóñòÿòñÿ âñå îñòàëüíûå êàíàëû ñâÿçè.
if (prev_another_bs_maybe_on!=edrk.ms.another_bs_maybe_on && edrk.ms.another_bs_maybe_on)
{
// edrk.ms.count_time_wait_ready1 = 0;
edrk.ms.count_time_wait_ready2 = 0;
prev_another_bs_maybe_on_after_ready1 = 0;
clear_errors_master_slave();
}
//
// âûñòàâëÿåì ôëàã òîëüêî ÷åðåç âðåìÿ MAX_WAIT_READY_DETECT_ALIVE_ANOTHER_BS
//
edrk.ms.ready1 = filter_err_count(&edrk.ms.count_time_wait_ready1,
MAX_WAIT_READY1_DETECT_ALIVE_ANOTHER_BS,
1,
0);
if (edrk.Status_Ready.bits.ready5)
{
edrk.ms.ready2 = filter_err_count(&edrk.ms.count_time_wait_ready2,
MAX_WAIT_READY2_DETECT_ALIVE_ANOTHER_BS,
1,
0);
}
else
{
edrk.ms.count_time_wait_ready2 = 0;
edrk.ms.ready2 = 0;
}
// edrk.ms.ready2 = edrk.Status_Ready.bits.ready5 && filter_err_count(&edrk.ms.count_time_wait_ready2,
// MAX_WAIT_READY2_DETECT_ALIVE_ANOTHER_BS,
// 1,
// 0);
prev_another_bs_maybe_on = edrk.ms.another_bs_maybe_on;
// æäåì ïîêà ïðîéäåò íåêîòîðîå âðåìÿ
if (edrk.ms.ready1==0)
{
edrk.ms.status = 1;
return;
}
// åñëè ñâÿçü áûëà ïîñëå edrk.ms.ready1==1, íî âñÿ ïðîïàëà, äàåì îøèáêó
if (prev_another_bs_maybe_on_after_ready1!=edrk.ms.another_bs_maybe_on && edrk.ms.another_bs_maybe_on==0)
{
edrk.errors.e4.bits.ANOTHER_BS_POWER_OFF |= 1;
}
prev_another_bs_maybe_on_after_ready1 = edrk.ms.another_bs_maybe_on;
edrk.ms.err_lock_signals.alive_can_to_another_bs |= filter_err_count(&edrk.ms.errors_count.alive_can_to_another_bs,
MAX_ERRORS_DETECT_ALIVE_ANOTHER_BS,
edrk.ms.err_signals.alive_can_to_another_bs,
0);
edrk.ms.err_lock_signals.alive_opt_bus_read |= filter_err_count(&edrk.ms.errors_count.alive_opt_bus_read,
MAX_ERRORS_DETECT_ALIVE_ANOTHER_BS,
edrk.ms.err_signals.alive_opt_bus_read,
0);
edrk.ms.err_lock_signals.alive_opt_bus_write |= filter_err_count(&edrk.ms.errors_count.alive_opt_bus_write,
MAX_ERRORS_DETECT_ALIVE_ANOTHER_BS,
edrk.ms.err_signals.alive_opt_bus_write,
0);
edrk.ms.err_lock_signals.alive_sync_line = filter_err_count(&edrk.ms.errors_count.alive_sync_line,
MAX_ERRORS_DETECT_ALIVE_ANOTHER_BS,
edrk.ms.err_signals.alive_sync_line,
0);
edrk.ms.err_lock_signals.alive_sync_line_local = filter_err_count(&edrk.ms.errors_count.alive_sync_line_local,
MAX_ERRORS_DETECT_ALIVE_ANOTHER_BS,
edrk.ms.err_signals.alive_sync_line_local,
0);
edrk.ms.err_lock_signals.fast_optical_alarm |= filter_err_count(&edrk.ms.errors_count.fast_optical_alarm,
MAX_ERRORS_DETECT_ALIVE_ANOTHER_BS,
edrk.ms.err_signals.fast_optical_alarm,
0);
edrk.ms.err_lock_signals.input_alarm_another_bs |= filter_err_count(&edrk.ms.errors_count.input_alarm_another_bs,
MAX_ERRORS_DETECT_ALIVE_ANOTHER_BS,
edrk.ms.err_signals.input_alarm_another_bs,
0);
edrk.ms.err_lock_signals.another_rascepitel |= filter_err_count(&edrk.ms.errors_count.another_rascepitel,
MAX_ERRORS_DETECT_ALIVE_ANOTHER_BS,
edrk.ms.err_signals.another_rascepitel,
0);
edrk.ms.err_lock_signals.input_master_slave |= filter_err_count(&edrk.ms.errors_count.input_master_slave,
MAX_ERRORS_DETECT_ALIVE_ANOTHER_BS,
edrk.ms.err_signals.input_master_slave,
0);
if (edrk.ms.err_signals.alive_can_to_another_bs
&& (edrk.ms.err_signals.alive_opt_bus_read
|| edrk.ms.err_signals.alive_opt_bus_write)
&& edrk.ms.err_signals.alive_sync_line
// && edrk.ms.err_signals.fast_optical_alarm
// && edrk.ms.err_signals.input_alarm_another_bs &&
// && edrk.ms.err_signals.another_rascepitel == 0
// && edrk.ms.err_signals.input_master_slave
)
{
if (edrk.ms.err_signals.another_rascepitel)
edrk.errors.e7.bits.ANOTHER_RASCEPITEL_ON |= 1;
// edrk.ms.another_bs_maybe_off = 1;
// edrk.ms.another_bs_maybe_on = 0;
edrk.warnings.e4.bits.ANOTHER_BS_POWER_OFF = 1;
// edrk.warnings.e4.bits.FAST_OPTICAL_ALARM = 1;
edrk.warnings.e7.bits.MASTER_SLAVE_SYNC = 1;
edrk.warnings.e7.bits.READ_OPTBUS = edrk.ms.err_signals.alive_opt_bus_read;
edrk.warnings.e7.bits.WRITE_OPTBUS = edrk.ms.err_signals.alive_opt_bus_write;
edrk.warnings.e7.bits.CAN2CAN_BS = 1;
edrk.ms.status = 2;
}
else
{
edrk.warnings.e4.bits.ANOTHER_BS_POWER_OFF = 0;
//
if (edrk.ms.err_lock_signals.alive_can_to_another_bs)
edrk.errors.e7.bits.CAN2CAN_BS |= 1;
else
edrk.warnings.e7.bits.CAN2CAN_BS = 0;
//
if (edrk.ms.err_lock_signals.alive_opt_bus_read)
edrk.errors.e7.bits.READ_OPTBUS |= 1;
else
edrk.warnings.e7.bits.READ_OPTBUS = 0;
//
if (edrk.ms.err_lock_signals.alive_opt_bus_write)
edrk.errors.e7.bits.WRITE_OPTBUS |= 1;
else
edrk.warnings.e7.bits.WRITE_OPTBUS = 0;
//
if (edrk.ms.err_lock_signals.alive_sync_line)
edrk.warnings.e7.bits.MASTER_SLAVE_SYNC = 1;
else
edrk.warnings.e7.bits.MASTER_SLAVE_SYNC = 0;
//
// if (edrk.ms.err_lock_signals.fast_optical_alarm)
// edrk.errors.e4.bits.FAST_OPTICAL_ALARM |= 1;
// else
// edrk.warnings.e4.bits.FAST_OPTICAL_ALARM = 0;
// edrk.ms.another_bs_maybe_on = 1;
// edrk.ms.another_bs_maybe_off = 0;
if (edrk.ms.err_signals.alive_can_to_another_bs
|| edrk.ms.err_signals.alive_opt_bus_read
|| edrk.ms.err_signals.alive_opt_bus_write
|| edrk.ms.err_signals.alive_sync_line
|| edrk.ms.err_signals.fast_optical_alarm
)
edrk.ms.status = 3;
else
edrk.ms.status = 4;
}
}
////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////
// îáíîâëßåì äðóãîé ÁÑÓ ïî CAN
////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////
void update_bsu_can(unsigned int pause)
{
int real_mbox;
int t1;
// if (edrk.flag_second_PCH==0)
// t1 = 125;
// if (edrk.flag_second_PCH==1)
// t1 = 150;
SendAll2SecondBS(pause);
}
////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////
// ñïåö íàñòðîéêè äëÿ ìåæáëî÷íîãî îáìåíà ÁÑ1 ÁÑ2 ïî CAN
////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////
void init_can_box_between_bs1_bs2(void)
{
// âêëþ÷àåì ðåâåðñ àäðåñîâ òîëüêî äëÿ îäíîãî ÁÑ
// èìèòèðóåì ÿùèê Unites êàêáû
//
if (edrk.flag_second_PCH==0)
{
unites_can_setup.revers_box[ANOTHER_BSU1_CAN_DEVICE] = 1;
}
unites_can_setup.adr_detect_refresh[ZADATCHIK_CAN] = 16;
}

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/*
* another_bs.h
*
* Created on: 13 íîÿá. 2024 ã.
* Author: Evgeniy_Sokolov
*/
#ifndef SRC_MAIN_ANOTHER_BS_H_
#define SRC_MAIN_ANOTHER_BS_H_
void update_bsu_can(unsigned int pause);
void init_can_box_between_bs1_bs2(void);
void detect_alive_another_bs(void);
void detect_error_from_another_bs(void);
void UpdateTableSecondBS(void);
unsigned int read_cmd_sbor_from_bs(void);
void read_data_from_bs(void);
#endif /* SRC_MAIN_ANOTHER_BS_H_ */

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#include <adc_tools.h>
#include <break_regul.h>
#include <edrk_main.h>
#include <params_pwm24.h>
#include <PWMTools.h>
#include "IQmathLib.h"
#include "pid_reg3.h"
#include "DSP281x_Examples.h" // DSP281x Examples Include File
#include "DSP281x_Device.h" // DSP281x Headerfile Include File
#pragma DATA_SECTION(break_result_1,".fast_vars");
_iq break_result_1 = 0;
#pragma DATA_SECTION(break_result_2,".fast_vars");
_iq break_result_2 = 0;
#pragma DATA_SECTION(break_result_3,".fast_vars");
_iq break_result_3 = 0;
#pragma DATA_SECTION(break_result_4,".fast_vars");
_iq break_result_4 = 0;
#pragma DATA_SECTION(koef_Krecup,".fast_vars");
_iq koef_Krecup = 0;
#pragma DATA_SECTION(koef_Min_recup,".fast_vars");
_iq koef_Min_recup = 0;
BREAK_REGUL break_reg = BREAK_REGUL_DEFAULTS;
_iq calc_recup(_iq voltage, _iq recup_level, _iq max_recup_level);
//#pragma DATA_SECTION(pidF,".fast_vars");
//PIDREG3 pidF=PIDREG3_DEFAULTS;
void break_resistor_managment_init(unsigned int freq_pwm)
{
volatile float percent;//, percent2;
_iq iq_percent1 = 0, iq_percent2 = 0;// iq_percent3 = 0, iq_percent4 = 0;
break_reg.pwm_tics = (FREQ_INTERNAL_GENERATOR_XILINX_TMS / freq_pwm );
break_reg.pwm_minimal_tics = (float)DEF_PERIOD_MIN_MKS*1000.0*FREQ_INTERNAL_GENERATOR_XILINX_TMS/1000000000.0;
break_reg.pwm_max_tics = break_reg.pwm_tics - break_reg.pwm_minimal_tics;
//Ìèíèìàëüíûé êîýôôèöèåíò ìîäóë-öèè òîðìîçíûõ êëþ÷åé. Êîëè÷åñòâî òèêîâ â IQ15.
percent = (break_reg.pwm_max_tics * RECUP_PERCENT_MIN/100.0) * 32768.0;//Çäàñü è äàëåå âû÷èñëåíèþ â _IQ15
iq_percent1 = percent;
//Ìàêñèìàëüíûé êîýôôèöèåíò ìîäóë-öèè òîðìîçíûõ êëþ÷åé. Êîëè÷åñòâî òèêîâ â IQ15.
percent = (break_reg.pwm_max_tics * RECUP_PERCENT_MAX/100.0) * 32768.0;
iq_percent2 = percent;
//Êîýôôèöèåíò ÷òîáû ïåðåâåñòè íàïð-æåíèþ â ÇÏÒ âî âðåìþ îòêðûòèþ êëþ÷åé
koef_Krecup = _IQdiv((iq_percent1 - iq_percent2),(IQ_RECUP_LEVEL_MIN - IQ_RECUP_LEVEL_MAX));
koef_Min_recup = iq_percent1; //Ìèíèìàëüíîå âðåìþ îòêðûòèþ òîðìîçíûõ êëþ÷åé â òèêàõ
}
//int break_resistor_managment_calc(int flag_on_off)
#pragma CODE_SECTION(break_resistor_managment_calc,".fast_run");
void break_resistor_managment_calc()
{
static unsigned int break_counter = 0;//MAX_BREAK_IMPULSE + 1;
if(edrk.Discharge && edrk.from_shema_filter.bits.QTV_ON_OFF==0
&& edrk.from_shema_filter.bits.UMP_ON_OFF==0)// && edrk.to_shema.bits.QTV_ON == 0)
{
if (break_counter < MAX_BREAK_IMPULSE)
{
break_counter++;
if ((filter.iqU_1_fast > BREAK_INSENSITIVE_LEVEL_MIN)
|| edrk.ManualDischarge || edrk.NoDetectUZeroDischarge)
{
if (edrk.Obmotka1 == 0)
break_result_1 = 300;
else
break_result_1 = 0;
}
else
{
break_result_1 = 0;
}
if ((filter.iqU_2_fast > BREAK_INSENSITIVE_LEVEL_MIN)
|| edrk.ManualDischarge || edrk.NoDetectUZeroDischarge )
{
if (edrk.Obmotka2 == 0)
break_result_2 = 300;
else
break_result_2 = 0;
}
else
{
break_result_2 = 0;
}
// if (filter.iqU_3_fast < BREAK_INSENSITIVE_LEVEL_MIN)
// {
// break_result_3 = 0;
// }
// else
// {
// break_result_3 = 300;
//// break_result_3 = calc_stop_run_recup(filter.iqU_3_fast);
// }
//
// if (filter.iqU_4_fast < BREAK_INSENSITIVE_LEVEL_MIN)
// {
// break_result_4 = 0;
// }
// else
// {
// break_result_4 = 300;
//// break_result_4 = calc_stop_run_recup(filter.iqU_4_fast);
// }
if((!break_result_1 && !break_result_2 && !break_result_3 && !break_result_4)
|| (break_counter >= (MAX_BREAK_IMPULSE - 1)))
{
edrk.Discharge = 0;
break_counter = 0;
}
}
else
{
break_result_1 = 0;
break_result_2 = 0;
break_result_3 = 0;
break_result_4 = 0;
break_counter = 0;
edrk.Discharge = 0;
}
}
}
#pragma CODE_SECTION(calc_recup,".fast_run");
_iq calc_recup(_iq voltage, _iq recup_level, _iq max_recup_level)
{
if (voltage <= recup_level)
{
return 0;
}
else
{
voltage = _IQsat(voltage,max_recup_level,recup_level);
voltage = _IQmpy(koef_Krecup,voltage - recup_level) + koef_Min_recup;
return voltage >> 15;
}
}
#pragma CODE_SECTION(break_resistor_recup_calc,".fast_run");
void break_resistor_recup_calc(_iq Uzpt_nominal)
{
_iq Uzpt_start_recup = Uzpt_nominal + IQ_DELTA_U_START_RECUP;
_iq Uzpt_max_open_break_keys = Uzpt_nominal + IQ_DELTA_U_MAX_OPEN_BREAK_KEYS;
if (/*edrk.Go &&*/ (edrk.SborFinishOk || edrk.Status_Ready.bits.ImitationReady2) )
{
break_result_1 = calc_recup(filter.iqU_1_fast, Uzpt_start_recup, Uzpt_max_open_break_keys);
break_result_2 = calc_recup(filter.iqU_2_fast, Uzpt_start_recup, Uzpt_max_open_break_keys);
}
}
#pragma CODE_SECTION(break_resistor_managment_update,".fast_run");
void break_resistor_managment_update()
{
if (break_result_1 < break_reg.pwm_minimal_tics)
break_result_1 = 0;
if (break_result_2 < break_reg.pwm_minimal_tics)
break_result_2 = 0;
// if (break_result_3 < break_reg.pwm_minimal_tics)
// break_result_3 = 0;
//
// if (break_result_4 < break_reg.pwm_minimal_tics)
// break_result_4 = 0;
if (break_result_1 > break_reg.pwm_max_tics)
break_result_1 = break_reg.pwm_max_tics;
if (break_result_2 > break_reg.pwm_max_tics)
break_result_2 = break_reg.pwm_max_tics;
// if (break_result_3 > break_reg.pwm_max_tics)
// break_result_3 = break_reg.pwm_max_tics;
//
// if (break_result_4 > break_reg.pwm_max_tics)
// break_result_4 = break_reg.pwm_max_tics;
}
//#pragma CODE_SECTION(break_resistor_set_closed,".fast_run");
void break_resistor_set_closed()
{
break_result_1 = 0;
break_result_2 = 0;
break_result_3 = 0;
break_result_4 = 0;
}

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#ifndef _BREAK_REGUL_H
#define _BREAK_REGUL_H
#ifdef __cplusplus
extern "C" {
#endif
typedef struct {
unsigned int pwm_tics;
unsigned int pwm_minimal_tics;
unsigned int pwm_max_tics;
} BREAK_REGUL;
#define BREAK_REGUL_DEFAULTS {0,0,0}
#define BREAK_INSENSITIVE_LEVEL_MIN 279620 //50V
#define BREAK_INSENSITIVE_LEVEL_MAX 4194304//500V//5872025//700 V//2516582//300 V//4194304//500 V//2516582 // 838860 //100 V
#define PERCENT_BREAK_MAX 13421772//80 percent
#define PERCENT_BREAK_MIN 838860//5 percent
#define MAX_RECUP_LEVEL 5872025 //700 V
#define K_RECUP_LEVEL 56 //5.6 /// 838860 / 4697620 //700 V
#define MAX_BREAK_IMPULSE 9000
#define RECUP_PERCENT_MIN 10.0
#define RECUP_PERCENT_MAX 90.0
//#define IQ_RECUP_LEVEL_MIN_ACCUM 16777216 //3000V
//#define IQ_RECUP_LEVEL_MAX_ACCUM 17895697 //3200V
#define IQ_RECUP_LEVEL_MIN 15658734L //2800V //15099494L //2700V //9507089L //1700V //8947848L //1600V //
#define IQ_RECUP_LEVEL_MAX 16777216L //3000V //16777216L //16217975L //2900V //11184810L //2000V //17895697 //3200V 10066329 //1800V //
#define IQ_DELTA_U_START_RECUP 559240 //100V //279620LL //50V
#define IQ_DELTA_U_MAX_OPEN_BREAK_KEYS 1677721LL//300 V
#define IQ_MIN_VOLTAGE_STOP_RUN 279620L //50V
#define IQ_MAX_VOLTAGE_STOP_RUN 16777216L //3000V
#define BRK_STOP_RUN_PERCENT_MIN 5
#define BRK_STOP_RUN_PERCENT_MAX 50
//int break_resistor_managment_calc(int flag_on_off);
void break_resistor_managment_calc(void);
void break_resistor_managment_init(unsigned int freq_pwm);
void break_resistor_managment_update(void);
void break_resistor_recup_calc(_iq Uzpt_nominal);
void break_resistor_set_closed(void);
_iq calc_stop_run_recup(_iq voltage);
//extern PIDREG3 break_struct_1;
//extern PIDREG3 break_struct_2;
extern _iq break_result_1;
extern _iq break_result_2;
extern _iq break_result_3;
extern _iq break_result_4;
extern _iq kp_break;
#ifdef __cplusplus
}
#endif
#endif /* _BREAK_REGUL_H */

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/*
* calc_rms_vals.c
*
* Created on: 14 äåê. 2020 ã.
* Author: star
*/
#include <adc_tools.h>
#include <calc_rms_vals.h>
#include <edrk_main.h>
#include <params_norma.h>
#include <params_pwm24.h>
#include "IQmathLib.h"
#include "mathlib.h"
#define NUM_OF_CHANNELS 6
//#define USE_CALC_U_IN_RMS 1
//#define USE_CALC_I_OUT_RMS 1
#pragma DATA_SECTION(in_U_rms_calc_buffer,".slow_vars")
RMS_BUFFER in_U_rms_calc_buffer[NUM_OF_CHANNELS] = {RMS_BUFFER_DEFAULTS, RMS_BUFFER_DEFAULTS, \
RMS_BUFFER_DEFAULTS, RMS_BUFFER_DEFAULTS, \
RMS_BUFFER_DEFAULTS, RMS_BUFFER_DEFAULTS};
#pragma DATA_SECTION(out_I_rms_calc_buffer,".slow_vars")
RMS_BUFFER_WITH_THINNING out_I_rms_calc_buffer[6] = {RMS_BUFFER_WITH_THINNING_DEFAULTS, RMS_BUFFER_WITH_THINNING_DEFAULTS, \
RMS_BUFFER_WITH_THINNING_DEFAULTS, RMS_BUFFER_WITH_THINNING_DEFAULTS, \
RMS_BUFFER_WITH_THINNING_DEFAULTS, RMS_BUFFER_WITH_THINNING_DEFAULTS};
///////////////////////////////////////////////////
void init_Uin_rms(void)
{
int k,l;
// ÷èñòêà áóôåðà íóëÿìè è íå òîëüêî
for (k=0;k<NUM_OF_CHANNELS;k++)
{
for (l=0;l<RMS_BUFFER_SIZE;l++)
in_U_rms_calc_buffer[k].values[l] = 0;
in_U_rms_calc_buffer[k].position = 0;
in_U_rms_calc_buffer[k].array_size = RMS_BUFFER_SIZE;
}
}
///////////////////////////////////////////////////
void add_to_buff(RMS_BUFFER *b, _iq val) {
b->values[b->position++] = val;
if (b->position >= b->array_size) { b->position = 0;}
}
#define add_to_buff_def(b, val) { (b)->values[(b)->position++] = (val); if ((b)->position >= (b)->array_size) { (b)->position = 0;}}
static void calc_Uin_rms(void);
static void calc_Iout_rms(void);
#define CONST_PI 52707178
//#pragma CODE_SECTION(fill_rms_array_IQ15,".fast_run1");
void fill_rms_array_IQ15(RMS_BUFFER_WITH_THINNING *v) {
static _iq norma_f_rot = NORMA_FROTOR;
int period_by_teta = 0;
// int freq = _IQtoF(v->signal_freq) * NORMA_FROTOR;
// int freq = _IQtoF(v->signal_freq * norma_f_rot); //Max IQ24 = 127. ×àñòîòà â Ãö îáû÷íî ìåíüøå
int freq = (v->signal_freq * norma_f_rot) / (1LL << GLOBAL_Q); // 10 ðàç áûñòðåå, ìåíüøå òî÷íîñòü
int count_miss_writing = 100;
if (freq != 0) {
freq *= v->elements_in_period; //"îïòèìèçàöèÿ"
count_miss_writing = (int)(v->freq_pwm / freq);
if (count_miss_writing > 100) {count_miss_writing = 100;}
}
if (v->use_teta) {
v->internal.teta_period_counter += 1;
if ((v->teta < CONST_PI && v->internal.teta_prev > CONST_PI) ||
(v->teta > CONST_PI && v->internal.teta_prev < CONST_PI)) {
v->internal.zero_teta_period = v->internal.teta_period_counter;
v->internal.teta_period_counter = 0;
}
v->internal.teta_prev = v->teta;
period_by_teta = v->internal.zero_teta_period / v->elements_in_period;
if (period_by_teta != 0) {
count_miss_writing = (count_miss_writing + period_by_teta) / 2;
}
}
if (v->internal.miss_write_counter++ < count_miss_writing) {
return;
}
v->internal.miss_write_counter = 0;
v->values[v->position++] = _IQtoIQ15(v->val);
if (v->position >= v->array_size) {
v->position = 0;
}
}
void fill_RMS_buff_interrupt(_iq teta_ch1, _iq teta_ch2) {
#ifdef USE_CALC_U_IN_RMS
// add_to_buff(&in_U_rms_calc_buffer[0], analog.iqUin_A1B1);
// add_to_buff(&in_U_rms_calc_buffer[1], analog.iqUin_B1C1);
// add_to_buff(&in_U_rms_calc_buffer[2], analog.iqUin_C1A1);
// add_to_buff(&in_U_rms_calc_buffer[3], analog.iqUin_A2B2);
// add_to_buff(&in_U_rms_calc_buffer[4], analog.iqUin_B2C2);
// add_to_buff(&in_U_rms_calc_buffer[5], analog.iqUin_C2A2);
//
add_to_buff_def(&in_U_rms_calc_buffer[0], analog.iqUin_A1B1); //define â 10 ðàç áûñòðåå
add_to_buff_def(&in_U_rms_calc_buffer[1], analog.iqUin_B1C1);
add_to_buff_def(&in_U_rms_calc_buffer[2], analog.iqUin_C1A1);
add_to_buff_def(&in_U_rms_calc_buffer[3], analog.iqUin_A2B2);
add_to_buff_def(&in_U_rms_calc_buffer[4], analog.iqUin_B2C2);
add_to_buff_def(&in_U_rms_calc_buffer[5], analog.iqUin_C2A2);
#endif //USE_CALC_U_IN_RMS
#ifdef USE_CALC_I_OUT_RMS
out_I_rms_calc_buffer[0].val = analog.iqIu_1;
out_I_rms_calc_buffer[0].teta = teta_ch1;
out_I_rms_calc_buffer[0].freq_pwm = FREQ_PWM * 2;
out_I_rms_calc_buffer[0].signal_freq = edrk.f_stator;
out_I_rms_calc_buffer[0].add_value(&out_I_rms_calc_buffer[0]);
out_I_rms_calc_buffer[1].val = analog.iqIv_1;
out_I_rms_calc_buffer[1].teta = teta_ch1;
out_I_rms_calc_buffer[1].freq_pwm = FREQ_PWM * 2;
out_I_rms_calc_buffer[1].signal_freq = edrk.f_stator;
out_I_rms_calc_buffer[1].add_value(&out_I_rms_calc_buffer[1]);
out_I_rms_calc_buffer[2].val = analog.iqIw_1;
out_I_rms_calc_buffer[2].teta = teta_ch1;
out_I_rms_calc_buffer[2].freq_pwm = FREQ_PWM * 2;
out_I_rms_calc_buffer[2].signal_freq = edrk.f_stator;
out_I_rms_calc_buffer[2].add_value(&out_I_rms_calc_buffer[2]);
out_I_rms_calc_buffer[3].val = analog.iqIu_1;
out_I_rms_calc_buffer[3].teta = teta_ch2;
out_I_rms_calc_buffer[3].freq_pwm = FREQ_PWM * 2;
out_I_rms_calc_buffer[3].signal_freq = edrk.f_stator;
out_I_rms_calc_buffer[3].add_value(&out_I_rms_calc_buffer[3]);
out_I_rms_calc_buffer[4].val = analog.iqIu_1;
out_I_rms_calc_buffer[4].teta = teta_ch2;
out_I_rms_calc_buffer[4].freq_pwm = FREQ_PWM * 2;
out_I_rms_calc_buffer[4].signal_freq = edrk.f_stator;
out_I_rms_calc_buffer[4].add_value(&out_I_rms_calc_buffer[4]);
out_I_rms_calc_buffer[5].val = analog.iqIu_1;
out_I_rms_calc_buffer[5].teta = teta_ch2;
out_I_rms_calc_buffer[5].freq_pwm = FREQ_PWM * 2;
out_I_rms_calc_buffer[5].signal_freq = edrk.f_stator;
out_I_rms_calc_buffer[5].add_value(&out_I_rms_calc_buffer[5]);
#endif //USE_CALC_I_OUT_RMS
}
void calc_Uin_rms(void) {
RMS_CALC_ARRAY rc = RMS_CALC_DEFAULTS;
rc.size_array = in_U_rms_calc_buffer[0].array_size;
rc.data_array = in_U_rms_calc_buffer[0].values;
analog.iqUin_A1B1_rms = rc.calc(&rc);
rc.size_array = in_U_rms_calc_buffer[1].array_size;
rc.data_array = in_U_rms_calc_buffer[1].values;
analog.iqUin_B1C1_rms = rc.calc(&rc);
rc.size_array = in_U_rms_calc_buffer[2].array_size;
rc.data_array = in_U_rms_calc_buffer[2].values;
analog.iqUin_C1A1_rms = rc.calc(&rc);
rc.size_array = in_U_rms_calc_buffer[3].array_size;
rc.data_array = in_U_rms_calc_buffer[3].values;
analog.iqUin_A2B2_rms = rc.calc(&rc);
rc.size_array = in_U_rms_calc_buffer[4].array_size;
rc.data_array = in_U_rms_calc_buffer[4].values;
analog.iqUin_B2C2_rms = rc.calc(&rc);
rc.size_array = in_U_rms_calc_buffer[5].array_size;
rc.data_array = in_U_rms_calc_buffer[5].values;
analog.iqUin_C2A2_rms = rc.calc(&rc);
}
void calc_Iout_rms() {
int i = 0;
_iq results[NUM_OF_CHANNELS];
RMS_CALC_ARRAY_THINNING rc_Iout = RMS_CALC_THINNING_DEFAULTS;
//Calc rms
for (i = 0; i < NUM_OF_CHANNELS; i++) {
rc_Iout.data_array = out_I_rms_calc_buffer[i].values;
rc_Iout.last_elem_position = out_I_rms_calc_buffer[i].position;
rc_Iout.size_array = out_I_rms_calc_buffer[i].array_size;
rc_Iout.signal_period = out_I_rms_calc_buffer[i].elements_in_period;
results[i] = rc_Iout.calc(&rc_Iout);
}
analog.iqIu_1_rms = results[0];
analog.iqIv_1_rms = results[1];
analog.iqIw_1_rms = results[2];
analog.iqIu_2_rms = results[3];
analog.iqIv_2_rms = results[4];
analog.iqIw_2_rms = results[5];
}
void calc_RMS_values_main() {
#ifdef USE_CALC_U_IN_RMS
calc_Uin_rms();
#endif
// i_led2_off();
// i_led2_on();
#ifdef USE_CALC_I_OUT_RMS
calc_Iout_rms();
#endif
}
//float signal_amplitude = 141;
//_iq data_arr[RMS_BUFFER_SIZE];
//_iq16 data_arr_IQ16[RMS_BUFFER_SIZE];
//_iq position = 0;
//_iq result_simple = 0;
//_iq result_simple_t = 0;
//
//RMS_BUFFER_WITH_THINNING buffer_var_freq = RMS_BUFFER_WITH_THINNING_DEFAULTS;
//int freq_mian_signal = 1;
//int counter_wait_change_freq = 0;
//#define WAIT_CHANGE_FREQ_TICS 2000
/*
void test_calc_rms (_iq teta) {
_iq amplitude = _IQ (signal_amplitude / NORMA_ACP);
_iq current_val = 0;
_iq add_var_freq = 0;
static _iq add_50hz = _IQ(6.28 * 50.0 / FREQ_PWM / 2.0);
static _iq teta_50hz = 0, teta_Low = 0;
RMS_CALC_ARRAY rc = RMS_CALC_DEFAULTS;
RMS_CALC_ARRAY_THINNING rct = RMS_CALC_THINNING_DEFAULTS;
current_val = _IQmpy(amplitude, _IQcos(teta_50hz));
data_arr[position] = current_val;
data_arr_IQ16[position] = _IQtoIQ16(current_val);
position += 1;
if (position >= RMS_BUFFER_SIZE) position = 0;
teta_50hz += add_50hz;
rc.data_array = data_arr;
rc.size_array = RMS_BUFFER_SIZE;
result_simple = rc.calc(&rc);
if (counter_wait_change_freq >= WAIT_CHANGE_FREQ_TICS) {
if (freq_mian_signal < 20) { freq_mian_signal +=1;}
counter_wait_change_freq = 0;
} else {
counter_wait_change_freq += 1;
}
add_var_freq = _IQ(6.28 * freq_mian_signal / FREQ_PWM / 2.0);
teta_Low += add_var_freq;
current_val = _IQmpy(amplitude, _IQcos(teta_Low));
buffer_var_freq.val = current_val;
buffer_var_freq.signal_freq = _IQ((float)freq_mian_signal / NORMA_FROTOR);
buffer_var_freq.teta = teta_Low;
buffer_var_freq.add_value(&buffer_var_freq);
rct.data_array = buffer_var_freq.values;
rct.size_array = buffer_var_freq.array_size;
rct.last_elem_position = buffer_var_freq.position;
rct.signal_period = buffer_var_freq.array_size;
result_simple_t = rct.calc(&rct);
}
*/

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/*
* calc_rms_vals.h
*
* Created on: 14 äåê. 2020 ã.
* Author: star
*/
#ifndef SRC_MAIN_CALC_RMS_VALS_H_
#define SRC_MAIN_CALC_RMS_VALS_H_
#include <params_pwm24.h>
#include "IQmathLib.h"
#define RMS_BUFFER_SIZE (FREQ_PWM * 2 / 50)
//#define RMS_BUFFER_SIZE 18 //For FREQ_PWM 450 and signal frequency 50 Hz
typedef struct {
_iq values[RMS_BUFFER_SIZE];
int array_size;
int position;
} RMS_BUFFER;
#define RMS_BUFFER_DEFAULTS {{0}, RMS_BUFFER_SIZE, 0}
#define RMS_THINNING_BUFFER_SIZE 40 //äîëæíî ïîëó÷èòüñÿ îêîëî 30 ýëåìåíòîâ íà ïåðèîä ñèãíàëà
#define RMS_THINNING_PERIOD (RMS_THINNING_BUFFER_SIZE * 3 / 4)
typedef struct {
_iq val; //in
_iq16 values[RMS_THINNING_BUFFER_SIZE];
int array_size;
int position;
int elements_in_period; // Ñêîëüêî ýëåìåíòîâ â ìàññèâå çàíèìàåò 1 ïåðèîä èçìåðÿåìîãî ñèãíàëà
int freq_pwm; //in
_iq signal_freq; //in
int use_teta; //Îïðåäåëÿòü ïåðèîä ñèãíàëà ñ ïîìîùüþ teta
_iq teta; //in
struct {
int miss_write_counter;
int teta_period_counter;
_iq teta_prev;
int zero_teta_period;
// int zero_teta_counter_prev;
} internal;
void (*add_value)();
} RMS_BUFFER_WITH_THINNING;
#define RMS_BUFFER_WITH_THINNING_DEFAULTS {0, {0}, RMS_THINNING_BUFFER_SIZE,0, \
RMS_THINNING_PERIOD,\
(FREQ_PWM * 2),0,0,0, {0,0,0,0}, \
fill_rms_array_IQ15}
void fill_rms_array_IQ15(RMS_BUFFER_WITH_THINNING *v);
void fill_RMS_buff_interrupt(_iq teta_ch1, _iq teta_ch2);
void calc_RMS_values_main();
void init_Uin_rms(void);
void test_calc_rms (_iq teta);
#endif /* SRC_MAIN_CALC_RMS_VALS_H_ */

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/*
* calc_tempers.c
*
* Created on: 4 äåê. 2020 ã.
* Author: star
*/
#include <adc_tools.h>
#include <calc_tempers.h>
#include <CAN_project.h>
#include <edrk_main.h>
#include <params_temper_p.h>
#include "CAN_Setup.h"
#include "IQmathLib.h"
int calc_max_temper_acdrive_bear(void);
int calc_max_temper_acdrive_winding(void);
int calc_max_temper_edrk_u(void);
int calc_max_temper_edrk_water(void);
int calc_max_temper_edrk_air(void);
int calc_min_temper_edrk_air(void);
////////////////////////////////////////////////////////////////////
int calc_max_temper_acdrive_bear(void)
{
int i, max_t=0;
for (i=0;i<edrk.temper_acdrive.bear.max_size;i++)
if (edrk.temper_acdrive.winding.filter_real_int_temper[i]>max_t)
max_t = edrk.temper_acdrive.winding.filter_real_int_temper[i];
return max_t;
}
////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////
int calc_max_temper_acdrive_winding(void)
{
int i, max_t=0;
for (i=0;i<edrk.temper_acdrive.winding.max_size;i++)
if (edrk.temper_acdrive.winding.filter_real_int_temper[i]>max_t)
max_t = edrk.temper_acdrive.winding.filter_real_int_temper[i];
return max_t;
}
////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////
int calc_max_temper_edrk_u(void)
{
int i, max_t=0;
for (i=0;i<7;i++)
if (edrk.temper_edrk.real_int_temper_u[i]>max_t)
max_t = edrk.temper_edrk.real_int_temper_u[i];
return max_t;
}
////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////
int calc_max_temper_edrk_water(void)
{
int i, max_t=0;
for (i=0;i<2;i++)
if (edrk.temper_edrk.real_int_temper_water[i]>max_t)
max_t = edrk.temper_edrk.real_int_temper_water[i];
return max_t;
}
////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////
int calc_max_temper_edrk_air(void)
{
int i, max_t=0;
for (i=0;i<4;i++)
if (edrk.temper_edrk.real_int_temper_air[i]>max_t)
max_t = edrk.temper_edrk.real_int_temper_air[i];
return max_t;
}
//////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////
int calc_min_temper_edrk_air(void)
{
int i, min_t=1000;
for (i=0;i<4;i++)
if (edrk.temper_edrk.real_int_temper_air[i]<min_t)
min_t = edrk.temper_edrk.real_int_temper_air[i];
return min_t;
}
//////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////
// ACP[V]/61.9[Om]/2.0*10000
#define koef_Temper_ENGINE_filter 1600000
#define INDEX_ACDRIVE_WINDING_CAN_UNITES 24
#define INDEX_ACDRIVE_BEAR_CAN_UNITES 30
void calc_temper_acdrive(void)
{
int i;
_iq iqtain,iq_temp;
// Winding
for (i=0;i<edrk.temper_acdrive.winding.max_size;i++)
{
edrk.temper_acdrive.winding.real_temper[i] = Unites[BKSSD_CAN_DEVICE][INDEX_ACDRIVE_WINDING_CAN_UNITES+i]/10.0;
if (Unites[BKSSD_CAN_DEVICE][INDEX_ACDRIVE_WINDING_CAN_UNITES+i]==0)
{
edrk.temper_acdrive.winding.flag_init_filter_temp[i] = 0;
edrk.temper_acdrive.winding.filter_real_int_temper[i] = 0;
edrk.temper_acdrive.winding.real_int_temper[i] = 0;
edrk.temper_acdrive.winding.real_temper[i] = 0;
continue;
}
edrk.temper_acdrive.winding.real_int_temper[i] = edrk.temper_acdrive.winding.real_temper[i]*K_TEMPER_TO_SVU;
iqtain = _IQ(edrk.temper_acdrive.winding.real_temper[i]/100.0);
iq_temp = _IQ(edrk.temper_acdrive.winding.filter_real_temper[i]/100.0);
if (edrk.temper_acdrive.winding.flag_init_filter_temp[i]==0)
{
iq_temp = iqtain;
edrk.temper_acdrive.winding.flag_init_filter_temp[i]=1;
}
// iq_temp_engine[i] = exp_regul_iq(koef_Temper_ENGINE_filter, iq_temp_engine[i], iqtain);
iq_temp += _IQmpy( (iqtain-iq_temp), koef_Temper_ENGINE_filter);
edrk.temper_acdrive.winding.filter_real_temper[i] = _IQtoF(iq_temp)*100.0;
edrk.temper_acdrive.winding.filter_real_int_temper[i] = edrk.temper_acdrive.winding.filter_real_temper[i]*K_TEMPER_TO_SVU;
}
edrk.temper_acdrive.winding.max_real_int_temper = calc_max_temper_acdrive_winding();
// Bearing
for (i=0;i<edrk.temper_acdrive.bear.max_size;i++)
{
edrk.temper_acdrive.bear.real_temper[i] = Unites[BKSSD_CAN_DEVICE][INDEX_ACDRIVE_BEAR_CAN_UNITES+i]/10.0;
if (Unites[BKSSD_CAN_DEVICE][INDEX_ACDRIVE_BEAR_CAN_UNITES+i]==0)
{
edrk.temper_acdrive.bear.flag_init_filter_temp[i] = 0;
edrk.temper_acdrive.bear.filter_real_int_temper[i] = 0;
edrk.temper_acdrive.bear.real_int_temper[i] = 0;
edrk.temper_acdrive.bear.real_temper[i] = 0;
continue;
}
edrk.temper_acdrive.bear.real_int_temper[i] = edrk.temper_acdrive.bear.real_temper[i]*K_TEMPER_TO_SVU;
iqtain = _IQ(edrk.temper_acdrive.bear.real_temper[i]/100.0);
iq_temp = _IQ(edrk.temper_acdrive.bear.filter_real_temper[i]/100.0);
if (edrk.temper_acdrive.bear.flag_init_filter_temp[i]==0)
{
iq_temp = iqtain;
edrk.temper_acdrive.bear.flag_init_filter_temp[i]=1;
}
// iq_temp_engine[i] = exp_regul_iq(koef_Temper_ENGINE_filter, iq_temp_engine[i], iqtain);
iq_temp += _IQmpy( (iqtain-iq_temp), koef_Temper_ENGINE_filter);
edrk.temper_acdrive.bear.filter_real_temper[i] = _IQtoF(iq_temp)*100.0;
edrk.temper_acdrive.bear.filter_real_int_temper[i] = edrk.temper_acdrive.bear.filter_real_temper[i]*K_TEMPER_TO_SVU;
}
edrk.temper_acdrive.bear.max_real_int_temper = calc_max_temper_acdrive_bear();
//////
}
////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////
void calc_temper_edrk(void)
{
int i;
////
edrk.temper_edrk.adc_temper_u[0] = ADC_f[1][1];
edrk.temper_edrk.adc_temper_u[1] = ADC_f[1][2];
edrk.temper_edrk.adc_temper_u[2] = ADC_f[1][3];
edrk.temper_edrk.adc_temper_u[3] = ADC_f[1][4];
edrk.temper_edrk.adc_temper_u[4] = ADC_f[1][5];
edrk.temper_edrk.adc_temper_u[5] = ADC_f[1][6];
edrk.temper_edrk.adc_temper_u[6] = ADC_f[1][7];
edrk.temper_edrk.real_temper_u[0] = (_IQtoF(analog.T_U01)*100.0 - 4.0)/16.0 * NORMA_ACP_TEMPER - DELTA_ACP_TEMPER;
edrk.temper_edrk.real_temper_u[1] = (_IQtoF(analog.T_U02)*100.0 - 4.0)/16.0 * NORMA_ACP_TEMPER - DELTA_ACP_TEMPER;
edrk.temper_edrk.real_temper_u[2] = (_IQtoF(analog.T_U03)*100.0 - 4.0)/16.0 * NORMA_ACP_TEMPER - DELTA_ACP_TEMPER;
edrk.temper_edrk.real_temper_u[3] = (_IQtoF(analog.T_U04)*100.0 - 4.0)/16.0 * NORMA_ACP_TEMPER - DELTA_ACP_TEMPER;
edrk.temper_edrk.real_temper_u[4] = (_IQtoF(analog.T_U05)*100.0 - 4.0)/16.0 * NORMA_ACP_TEMPER - DELTA_ACP_TEMPER;
edrk.temper_edrk.real_temper_u[5] = (_IQtoF(analog.T_U06)*100.0 - 4.0)/16.0 * NORMA_ACP_TEMPER - DELTA_ACP_TEMPER;
edrk.temper_edrk.real_temper_u[6] = (_IQtoF(analog.T_U07)*100.0 - 4.0)/16.0 * NORMA_ACP_TEMPER - DELTA_ACP_TEMPER;
for (i=0;i<7;i++)
edrk.temper_edrk.real_int_temper_u[i] = edrk.temper_edrk.real_temper_u[i]*K_TEMPER_TO_SVU;
edrk.temper_edrk.max_real_int_temper_u = calc_max_temper_edrk_u();
/////
edrk.temper_edrk.adc_temper_water[0] = ADC_f[1][8];
edrk.temper_edrk.adc_temper_water[1] = ADC_f[1][9];
edrk.temper_edrk.real_temper_water[0] = (_IQtoF(analog.T_Water_internal)*100.0 - 4.0)/16.0 * NORMA_ACP_TEMPER - DELTA_ACP_TEMPER;
edrk.temper_edrk.real_temper_water[1] = (_IQtoF(analog.T_Water_external)*100.0 - 4.0)/16.0 * NORMA_ACP_TEMPER - DELTA_ACP_TEMPER;
for (i=0;i<2;i++)
edrk.temper_edrk.real_int_temper_water[i] = edrk.temper_edrk.real_temper_water[i]*K_TEMPER_TO_SVU;
edrk.temper_edrk.max_real_int_temper_water = calc_max_temper_edrk_water();
//////
edrk.temper_edrk.adc_temper_air[0] = ADC_f[1][10];
edrk.temper_edrk.adc_temper_air[1] = ADC_f[1][11];
edrk.temper_edrk.adc_temper_air[2] = ADC_f[1][12];
edrk.temper_edrk.adc_temper_air[3] = ADC_f[1][13];
edrk.temper_edrk.real_temper_air[0] = (_IQtoF(analog.T_Air_01)*100.0 - 4.0)/16.0 * NORMA_ACP_TEMPER - DELTA_ACP_TEMPER;
edrk.temper_edrk.real_temper_air[1] = (_IQtoF(analog.T_Air_02)*100.0 - 4.0)/16.0 * NORMA_ACP_TEMPER - DELTA_ACP_TEMPER;
edrk.temper_edrk.real_temper_air[2] = (_IQtoF(analog.T_Air_03)*100.0 - 4.0)/16.0 * NORMA_ACP_TEMPER - DELTA_ACP_TEMPER;
edrk.temper_edrk.real_temper_air[3] = (_IQtoF(analog.T_Air_04)*100.0 - 4.0)/16.0 * NORMA_ACP_TEMPER - DELTA_ACP_TEMPER;
for (i=0;i<4;i++)
edrk.temper_edrk.real_int_temper_air[i] = edrk.temper_edrk.real_temper_air[i]*K_TEMPER_TO_SVU;
edrk.temper_edrk.max_real_int_temper_air = calc_max_temper_edrk_air();
edrk.temper_edrk.min_real_int_temper_air = calc_min_temper_edrk_air();
}
//////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////

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/*
* calc_tempers.h
*
* Created on: 4 äåê. 2020 ã.
* Author: star
*/
#ifndef SRC_MAIN_CALC_TEMPERS_H_
#define SRC_MAIN_CALC_TEMPERS_H_
void calc_temper_acdrive(void);
void calc_temper_edrk(void);
#endif /* SRC_MAIN_CALC_TEMPERS_H_ */

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/*
* can_bs2bs.c
*
* Created on: 27 îêò. 2020 ã.
* Author: stud
*/
#include <281xEvTimersInit.h>
#include <can_bs2bs.h>
#include <edrk_main.h>
#include <math.h>
#include <project.h>
#include "control_station.h"
#include "CAN_Setup.h"
#include "global_time.h"
#include "IQmathLib.h"
#include "mathlib.h"
#include "DSP281x_Examples.h" // DSP281x Examples Include File
#include "DSP281x_SWPrioritizedIsrLevels.h" // DSP281x Examples Include File
#include "DSP281x_Device.h"
#include "xp_project.h"
#include "another_bs.h"
#pragma DATA_SECTION(Unites2SecondBS, ".slow_vars")
int Unites2SecondBS[SIZE_ARR_CAN_UNITES_BS2BS]={0,0,0,0,0,0,0,0,0,0,\
0,0,0,0,0,0,0,0,0,0,\
0,0,0,0,0,0,0,0,0,0,\
0,0,0,0,0,0,0,0,0,0,\
0,0,0,0,0,0,0,0,0,0\
};
int max_count_send_to_can2second_bs = SIZE_ARR_CAN_UNITES_BS2BS;
void SendAll2SecondBS(unsigned int pause)
{
static int time_tick_modbus_can=0;
static unsigned int old_PWM_ticks=0;
static int count_write_to_modbus_can=0;
static int time_send_to_can=0;
int real_mbox, n_box;
//send to another BS
if (detect_pause_milisec(pause, &old_PWM_ticks))
{
// if (edrk.flag_second_PCH==0)
// n_box = ANOTHER_BSU2_CAN_DEVICE;
// else
n_box = ANOTHER_BSU1_CAN_DEVICE;
time_tick_modbus_can=0;
time_send_to_can=0;
UpdateTableSecondBS();
real_mbox = get_real_out_mbox (UNITS_TYPE_BOX, n_box);
if (CAN_cycle_full_free(real_mbox,CAN_BOX_STAT_ON))
{
CAN_cycle_send( UNITS_TYPE_BOX, n_box, 0, &Unites2SecondBS[0], max_count_send_to_can2second_bs, CAN_BOX_STANDART_ADR, CAN_BOX_PRIORITY_NORMAL);// ïðèìåðíî 40 ìñåê. èäåò îòïðàâêà âñåé ïîñûëêè
}
}
}

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/*
* can_bs2bs.h
*
* Created on: 27 îęň. 2020 ă.
* Author: stud
*/
#ifndef SRC_MAIN_CAN_BS2BS_H_
#define SRC_MAIN_CAN_BS2BS_H_
#define SIZE_ARR_CAN_UNITES_BS2BS 50 //100
extern int Unites2SecondBS[SIZE_ARR_CAN_UNITES_BS2BS];
void SendAll2SecondBS(unsigned int pause);
#endif /* SRC_MAIN_CAN_BS2BS_H_ */

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/*
* can_protocol_ukss.h
*
* Created on: 23 àâã. 2024 ã.
* Author: yura
*/
#ifndef SRC_MAIN_CAN_PROTOCOL_UKSS_H_
#define SRC_MAIN_CAN_PROTOCOL_UKSS_H_
#define CAN_PROTOCOL_UKSS 2 // 2
#ifndef CAN_PROTOCOL_UKSS
#define CAN_PROTOCOL_UKSS 1
#endif
#if (CAN_PROTOCOL_UKSS == 2)
#define ADR_CYCLES_TIMER_MAIN 96 //Ïåðèîä îñíîâí. ïîñûëîê CAN, * 10 mñåê
#define ADR_CYCLES_TIMER_ADD 97 //Ïåðèîä äîïîëí. ïîñûëîê CAN, * 10 mñåê
#define ADR_CYCLES_PAUSE_MAIN 98 //Ïàóçà îñíîâí. ïîñûëîê CAN, * 10 mñåê
#define ADR_CYCLES_PAUSE_ADD 99 //Ïàóçà äîïîëí. ïîñûëîê CAN, * 10 mñåê
#define ADR_CYCLES_REPEATE_MAIN 100 //Ïîâòîð îñíîâí. ïîñûëîê CAN, * 10 mñåê
#define ADR_CYCLES_REPEATE_ADD 101 //Ïîâòîð äîïîëí. ïîñûëîê CAN, * 10 mñåê
#define ADR_CYCLES_REPEATE_DIGIO 102 //Ïîâòîðÿòü ïîñûëêó äèñêð. âõîäîâ, ðàç
#define ADR_LIGHT_LED_1 104 //ßðêîñòü ëàìïû 1
#define ADR_LIGHT_LED_2 105 //ßðêîñòü ëàìïû 2
#define ADR_LIGHT_LED_3 106 //ßðêîñòü ëàìïû 3
#define ADR_LIGHT_LED_4 107 //ßðêîñòü ëàìïû 4
#define ADR_LIGHT_LED_5 108 //ßðêîñòü ëàìïû 5
#define ADR_LIGHT_LED_6 109 //ßðêîñòü ëàìïû 6
#define ADR_LIGHT_LED_7 110 //ßðêîñòü ëàìïû 7
#define ADR_COUNT_CYCLES_MAIN 120 //Êîëè÷åñòâî öèêëîâ îñíîâí. ïîñûëîê CAN
#define ADR_COUNT_CYCLES_ADD 121 //Êîëè÷åñòâî öèêëîâ äîïîëí. ïîñûëîê CAN
#define ADR_COUNT_FULL_CYCLES_MAIN 122 //Êîë-âî ïîëíûõ öèêëîâ îñíîâí. ïîñûëîê CAN
#define ADR_COUNT_FULL_CYCLES_ADD 123 //Êîë-âî ïîëíûõ öèêëîâ äîïîëí. ïîñûëîê CAN
#define ADR_PROTOCOL_VERSION 125 //Âåðñèÿ ïðîòîêîëà
#define ADR_UKSS_NUMBER 126 //Àäðåñ óñòðîéñòâà
#endif
#endif /* SRC_MAIN_CAN_PROTOCOL_UKSS_H_ */

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/*
* control_station_project.h
*
* Created on: 1 èþí. 2020 ã.
* Author: Yura
*/
#ifndef SRC_MAIN_CONTROL_STATION_PROJECT_H_
#define SRC_MAIN_CONTROL_STATION_PROJECT_H_
#define POS_STATION_CMD_ANOTHER_BSU1 15 // ïîçèöèÿ â ìàññèâå äëÿ CONTROL_STATION_CMD äëÿ ïåðåäà÷è â äðóãîé ÁÑ
// êàêèå ïîñòû âîçìîæíû:
/*
* òåðìèíàë - RS232 - äèñòàíöèÿ îò PC
* òåðìèíàë - CAN - äèñòàíöèÿ îò PC
* ïóëüò ingeteam - RS485
* ïóëüò ÌÏÓ ÑÂÓ- RS485
* ïóëüò ÌÏÓ ÑÂÓ - CAN
* ïóëüò ÌÏÓ Êëàâà - RS485
* ïóëüò ÌÏÓ Êëàâà - CAN
* Çàäàò÷èê íà áñó - CAN
* Çàäàò÷èê ÂÏÓ - CAN
* Çàäàò÷èê ÂÏÓ2 - CAN
* Çàäàò÷èê ÂÏÓ-ÀÏ - CAN
*
*/
enum
{
CONTROL_STATION_TERMINAL_RS232 = 0,
CONTROL_STATION_TERMINAL_CAN,
CONTROL_STATION_INGETEAM_PULT_RS485,
CONTROL_STATION_MPU_SVU_CAN, // svu
CONTROL_STATION_MPU_KEY_CAN, // bsu key
CONTROL_STATION_MPU_SVU_RS485, // ?
CONTROL_STATION_MPU_KEY_RS485, // ?
CONTROL_STATION_ZADATCHIK_CAN, // bsu zo
CONTROL_STATION_VPU_CAN, // vpu
CONTROL_STATION_ANOTHER_BS, // îò äðóãîãî ÁÑ â ðåæèìå slave/master
CONTROL_STATION_LAST // ïîñëåäíèé êîä â ñïèñêå, âñåãäà äîëæåí áûòü, íå óäàëÿòü åãî, èñïîëüçóåì äëÿ ðàçìåðíîñòè ìàññèâà.
};
enum
{
CONTROL_STATION_CMD_GO = 0,// cmd_go îò ïîñòà ïóñê/ñòîï ØÈÌà
CONTROL_STATION_CMD_SET_IZAD,// òîê îò ïîñòà
CONTROL_STATION_CMD_SET_ROTOR,// îáîðîòû îò ïîñòà
CONTROL_STATION_CMD_SET_POWER,// ìîùíîñòü îò ïîñòà
CONTROL_STATION_CMD_CHARGE, // ñáîð ñõåìû îò ïîñòà
CONTROL_STATION_CMD_UNCHARGE, // ðàçáîð ñõåìû îò ïîñòà
CONTROL_STATION_CMD_CHECKBACK,// êâèòèðîâàíèå îò ïîñòà
CONTROL_STATION_CMD_TEST_LEDS,// òåñò ëàìï îò ïîñòà
CONTROL_STATION_CMD_ACTIVE_CONTROL,// ýòîò ïîñò àêòèâèðîâàí, íàïðèìåð ãàëî÷êà Äèñòàíöèÿ âêëþ÷åíà íà òåðìèíàëêå.
// à íà êàêèõ-òî ïîñòàõ âíåøíèå ïåðåêëþ÷àòåëè âêëþ÷åíû
CONTROL_STATION_CMD_UFCONST_VECTOR,// Mode 0-ufconst, 1 - ñêàëÿð/âåêòîðíîå
CONTROL_STATION_CMD_ROTOR_POWER, // Mode 0-îáîðîòû, 1 - ìîùíîñòü
CONTROL_STATION_CMD_SCALAR_FOC, // Mode 0-ñêàëÿð, 1 - âåêòîðíîå
CONTROL_STATION_CMD_SET_KM,// Km äëÿ Mode 0-ufconst
// CONTROL_STATION_CMD_SET_I_VOZBUD, // Çàäàíèå òîêà âîçáóäèòåëÿ
CONTROL_STATION_CMD_SET_U_ZARYAD, // Çàäàíèå íàïðÿæåíèÿ çàðÿäà ÇÏÒ
CONTROL_STATION_CMD_SET_K_U_DISBALANCE, // Çàäàíèå Ê íàïðÿæåíèÿ äèñáàëàíñà êîýô. îáðàòíîé ñâÿçè ïî äèñáàëàíñó, íàäî >0 ÷òîá ðàáîòàë àëãîðèòì
CONTROL_STATION_CMD_SET_K_PLUS_U_DISBALANCE, //kplus_u_disbalance, åñëè =0, òî ðàáîòàåò àëãîðèòì äèñáàëàíñà, ñ÷èòàåòñÿ ýòî êîýô. àâòîìàòîì, åñëè <>0 òî îí çàäàí ïîñòîÿííûì.
CONTROL_STATION_CMD_MODE_PUMP, //ðåæèì ðàáîòû íàñîñà // // 0 - auto on - rand pump
// 1 - auto on 1 pump
// 2 - auto on 2 pump
// 3 - manual on 1 pump
// 4 - manual on 2 pump
// 5- ïåðåõîä èç manual â íåïîíÿòíîå ñîñòîÿíèå
CONTROL_STATION_CMD_DISABLE_ON_PUMP,
CONTROL_STATION_CMD_ENABLE_ON_CHARGE,
CONTROL_STATION_CMD_DISABLE_ON_QTV,
CONTROL_STATION_CMD_MANUAL_DISCHARGE,
CONTROL_STATION_CMD_DISABLE_ON_UMP,
CONTROL_STATION_CMD_WDOG_OFF,
CONTROL_STATION_CMD_SET_LIMIT_POWER,// çàïàñ ìîùíîñòü îò ïîñòà
CONTROL_STATION_CMD_BLOCK_BS, // áëîêèðîâêà ñ âåðõíåãî óðîâíÿ
CONTROL_STATION_CMD_DISABLE_INTERRUPT_SYNC,
CONTROL_STATION_CMD_DISABLE_INTERRUPT_TIMER2,
CONTROL_STATION_CMD_DISABLE_RASCEPITEL, // íå óïðàâëÿòü ðàñöåïèòåëåì, åñëè îí ñâåäåí è íå ðàáîòàåò ìîòîð ðàñöåïèòåëÿ
CONTROL_STATION_CMD_PWM_TEST_LINES, // øèì ëèíèè íà 96ïèí øèíå êàê òåñòîâûå, òîëüêî äëÿ òåñòà!!!
CONTROL_STATION_CMD_STOP_LOGS, // ñòîï ëîãîâ
CONTROL_STATION_CMD_LAST // ïîñëåäíèé êîä â ñïèñêå, âñåãäà äîëæåí áûòü, íå óäàëÿòü åãî, èñïîëüçóåì äëÿ ðàçìåðíîñòè ìàññèâà.
};
void control_station_test_alive_all_control(void);
int control_station_select_active(void);
int get_current_station_control(void);
void load_parameters_from_active_control_station(int current_control);
void parse_parameters_from_all_control_station(void);
void parse_parameters_from_one_control_station_terminal_rs232(int cc);
void parse_parameters_from_one_control_station_pult_ingeteam(int cc);
void parse_parameters_from_one_control_station_pult_zadat4ik(int cc);
void parse_parameters_from_one_control_station_pult_vpu(int cc);
void parse_parameters_from_one_control_station_another_bs(int cc);
void parse_parameters_from_one_control_station_MPU_SVU(int cc);
void parse_analog_data_from_active_control_station_to_alg(void);
void parse_data_from_master_to_alg(void);
void load_parameters_from_can_control_station_to_rs232(void);
#endif /* SRC_MAIN_CONTROL_STATION_PROJECT_H_ */

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/*
* detect_error_3_phase.c
*
* Created on: 7 äåê. 2020 ã.
* Author: star
*/
#include "DSP281x_Examples.h" // DSP281x Examples Include File
#include "DSP281x_Device.h" // DSP281x Headerfile Include File
#include "IQmathLib.h"
#include <detect_error_3_phase.h>
#include <detect_phase_break.h>
#include "global_time.h"
static int detect_system_asymmetry(DETECT_PROTECT_3_PHASE *v);
static int detect_system_asymmetry_rms(DETECT_PROTECT_3_PHASE *v);
int detect_error_3_phase(DETECT_PROTECT_3_PHASE *v) {
int err = 0;
int asymmetry = 0;
int break_channel = 0;
v->errors.all = 0;
v->over_limit.all = 0;
if (v->setup.timers_inited == 0) {
v->setup.timers_inited = 1;
init_timer_milisec(&v->timer_low_minus_10);
init_timer_milisec(&v->timer_low_minus_20);
init_timer_milisec(&v->timer_high_plus_10);
init_timer_milisec(&v->timer_high_plus_20);
}
if (v->setup.use.bits.phase_U != 0 &&
v->iqVal_U > v->setup.levels.iqVal_U_max) {
v->errors.bits.phase_U_max = 1;
v->over_limit.bits.phase_U_max = 1;
err = 1;
}
if (v->setup.use.bits.phase_V != 0 &&
v->iqVal_V > v->setup.levels.iqVal_V_max) {
v->errors.bits.phase_V_max = 1;
v->over_limit.bits.phase_V_max = 1;
err = 1;
}
if (v->setup.use.bits.phase_W != 0 &&
v->iqVal_W > v->setup.levels.iqVal_W_max) {
v->errors.bits.phase_W_max = 1;
v->over_limit.bits.phase_W_max = 1;
err = 1;
}
//-------------------------------------------------------------------------//
if (v->setup.use.bits.module) {
if (v->iqVal_mod > v->setup.levels.iqVal_module_max) {
v->errors.bits.module_max = 1;
v->over_limit.bits.module_max = 1;
err = 1;
}
}
//-------------------------------------------------------------------------//
if (v->setup.use.bits.detect_minus_10 != 0) {
if (v->iqVal_mod < v->setup.levels.iqNominal_minus10) {
if (detect_pause_milisec(PAUSE_VAL_MINIS_10_S, &v->timer_low_minus_10)){
v->errors.bits.module_10_percent_low = 1;
err = 1;
}
v->over_limit.bits.module_10_percent_low = 1;
} else {
init_timer_milisec(&v->timer_low_minus_10);
}
v->new_timer_low_minus_10 = v->timer_low_minus_10;
}
if (v->setup.use.bits.detect_minus_20 != 0) {
if (v->iqVal_mod < v->setup.levels.iqNominal_minus20) {
if (detect_pause_milisec(PAUSE_VAL_MINIS_20_S, &v->timer_low_minus_20)) {
v->errors.bits.module_20_percent_low = 1;
err = 1;
}
v->over_limit.bits.module_20_percent_low = 1;
} else {
init_timer_milisec(&v->timer_low_minus_20);
}
v->new_timer_low_minus_20 = v->timer_low_minus_20;
}
if (v->setup.use.bits.detect_plus_10 != 0) {
if (v->iqVal_mod > v->setup.levels.iqNominal_plus10) {
if (detect_pause_milisec(PAUSE_VAL_PLUS_10_S, &v->timer_high_plus_10)) {
v->errors.bits.module_10_percent_hi = 1;
err = 1;
}
v->over_limit.bits.module_10_percent_hi = 1;
} else {
init_timer_milisec(&v->timer_high_plus_10);
}
v->new_timer_high_plus_10 = v->timer_high_plus_10;
}
if (v->setup.use.bits.detect_plus_20 != 0) {
if (v->iqVal_mod > v->setup.levels.iqNominal_plus20) {
if (detect_pause_milisec(PAUSE_VAL_PLUS_20_S, &v->timer_high_plus_20)) {
v->errors.bits.module_20_percent_hi = 1;
err = 1;
}
v->over_limit.bits.module_20_percent_hi = 1;
} else {
init_timer_milisec(&v->timer_high_plus_20);
}
v->new_timer_high_plus_20 = v->timer_high_plus_20;
}
//Ïðîâåðêà íà ñèììåòðè÷íîñòü 3-õ ôàçíîé ñèñòåìû. Ñóììà 3-õ ñîñòàâëÿþùèõ ðàâíà 0
if (v->setup.use.bits.system_asymmetry_by_summ != 0) {
asymmetry = detect_system_asymmetry(v);
if (asymmetry != 0) {
v->errors.bits.system_asymmetry = 1;
err = 1;
}
}
//Ïðîâåðêà íà ñèììåòðè÷íîñòü 3-õ ôàçíîé ñèñòåìû. Äåéñòâóþùèå çíà÷åíèÿ 3-õ ñîñòàâëÿþùèõ ðàâíû ìåæäó ñîáîé
if (v->setup.use.bits.system_asymmetry_by_delta != 0) {
asymmetry = detect_system_asymmetry_rms(v);
if (asymmetry != 0) {
v->errors.bits.system_asymmetry = 1;
err = 1;
}
}
//Ïðîâåðêà íà îáðûâ ôàçû. Çíà÷åíèå â îäíîì êàíàëå ðàâíî íóëþ, â îñòàëüíûå â ïðîòèâîôàçå è ðàâíû ïî ìîäóëþ
if (v->setup.use.bits.break_phase != 0 && v->break_phase != 0) {
v->break_phase->iqIu = v->iqVal_U;
v->break_phase->iqIv = v->iqVal_V;
v->break_phase->iqIw = v->iqVal_W;
v->break_phase->iqImod = v->iqVal_mod;
v->break_phase->teta = v->iqTeta;
break_channel = v->break_phase->calc(v->break_phase);
if (break_channel) {
v->errors.bits.break_phase = 1;
err = 1;
switch (break_channel) {
case 1: v->errors.bits.break_phase_U = 1; break;
case 2: v->errors.bits.break_phase_V = 1; break;
case 3: v->errors.bits.break_phase_W = 1; break;
default: break;
}
}
}
return err;
}
int detect_system_asymmetry(DETECT_PROTECT_3_PHASE *v) {
_iq sum = v->iqVal_U + v->iqVal_V + v->iqVal_W;
return _IQabs(sum) > v->setup.levels.iqAsymmetry_delta ? 1 : 0;
}
int detect_system_asymmetry_rms(DETECT_PROTECT_3_PHASE *v) {
_iq d1 = _IQabs(v->iqVal_U - v->iqVal_V);
_iq d2 = _IQabs(v->iqVal_V - v->iqVal_W);
_iq d3 = _IQabs(v->iqVal_U - v->iqVal_W);
return d1 > v->setup.levels.iqAsymmetry_delta ||
d2 > v->setup.levels.iqAsymmetry_delta ||
d3 > v->setup.levels.iqAsymmetry_delta ? 1 : 0;
}

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/*
* detect_error_3_phase.h
*
* Created on: 7 äåê. 2020 ã.
* Author: star
*/
#ifndef SRC_MAIN_DETECT_ERROR_3_PHASE_H_
#define SRC_MAIN_DETECT_ERROR_3_PHASE_H_
#include <detect_phase_break.h>
typedef struct {
_iq iqVal_module_max;
_iq iqVal_U_max;
_iq iqVal_V_max;
_iq iqVal_W_max;
_iq iqNominal_plus10;
_iq iqNominal_plus20;
_iq iqNominal_minus10;
_iq iqNominal_minus20;
_iq iqAsymmetry_delta;
} PROTECT_LEVELS_3_PHASE;
#define PROTECT_LEVELS_3_PHASE_DEFAULTS {0,0,0,0,0,0,0, 0,0}
typedef struct {
PROTECT_LEVELS_3_PHASE levels;
union {
unsigned int all;
struct {
unsigned int phase_U :1;
unsigned int phase_V :1;
unsigned int phase_W :1;
unsigned int module :1;
unsigned int detect_minus_10 :1;
unsigned int detect_minus_20 :1;
unsigned int detect_plus_10 :1;
unsigned int detect_plus_20 :1;
unsigned int system_asymmetry_by_summ :1; //Ñóììà 3-õ ñîñòàâëÿþùèõ ðàâíà 0
unsigned int system_asymmetry_by_delta :1; //Äåéñòâóþùèå çíà÷åíèÿ 3-õ ñîñòàâëÿþùèõ ðàâíû ìåæäó ñîáîé
unsigned int break_phase :1;
unsigned int reserved :5;
} bits;
} use;
unsigned int timers_inited;
} SETUP_3_PHASE_PROTECT;
#define SETUP_3_PHASE_PROTECT_DEFAULTS {PROTECT_LEVELS_3_PHASE_DEFAULTS, {0}, 0}
typedef struct {
//In values
_iq iqVal_U;
_iq iqVal_V;
_iq iqVal_W;
_iq iqVal_mod;
_iq iqTeta; //Íóæåí äëÿ îïðåäåëåíèÿ îáðûâà ôàçû
unsigned int timer_low_minus_10;
unsigned int timer_low_minus_20;
unsigned int timer_high_plus_10;
unsigned int timer_high_plus_20;
//Break phase I state values
BREAK_PHASE_I *break_phase;
//Out values
union {
unsigned int all;
struct {
unsigned int phase_U_max :1;
unsigned int phase_V_max :1;
unsigned int phase_W_max :1;
unsigned int module_max :1;
unsigned int module_10_percent_hi :1;
unsigned int module_20_percent_hi :1;
unsigned int module_10_percent_low :1;
unsigned int module_20_percent_low :1;
unsigned int system_asymmetry :1;
unsigned int break_phase :1;
unsigned int break_phase_U :1;
unsigned int break_phase_V :1;
unsigned int break_phase_W :1;
unsigned int reserved :3;
} bits;
} errors;
union {
unsigned int all;
struct {
unsigned int phase_U_max :1;
unsigned int phase_V_max :1;
unsigned int phase_W_max :1;
unsigned int module_max :1;
unsigned int module_10_percent_hi :1;
unsigned int module_20_percent_hi :1;
unsigned int module_10_percent_low :1;
unsigned int module_20_percent_low :1;
unsigned int system_asymmetry_by_summ :1;
unsigned int break_phase :1;
unsigned int break_phase_U :1;
unsigned int break_phase_V :1;
unsigned int break_phase_W :1;
unsigned int reserved :3;
} bits;
} over_limit;
unsigned int new_timer_low_minus_10;
unsigned int new_timer_low_minus_20;
unsigned int new_timer_high_plus_10;
unsigned int new_timer_high_plus_20;
//Setup
SETUP_3_PHASE_PROTECT setup;
int (*calc_detect_error_3_phase)();
} DETECT_PROTECT_3_PHASE;
#define DETECT_PROTECT_3_PHASE_DEFAULTS {0,0,0,0,0, 0,0,0,0, 0, {0},{0}, 0,0,0,0,\
SETUP_3_PHASE_PROTECT_DEFAULTS, \
detect_error_3_phase}
#define ADC_PROTECT_LEVELS_DEFAULT {0,0,0,0, 0,0,0,0, 0}
#define PAUSE_VAL_MINIS_10_S 10000
#define PAUSE_VAL_MINIS_20_S 1000
#define PAUSE_VAL_PLUS_10_S 10000
#define PAUSE_VAL_PLUS_20_S 1000
#define PLUS_10_PERCENT 1.1
#define PLUS_20_PERCENT 1.2
#define MINUS_10_PERCENT 0.9
#define MINUS_20_PERCENT 0.8
#define ASYMMETRY_DELTA_PERCENTS 0.2
int detect_error_3_phase(DETECT_PROTECT_3_PHASE *v);
#endif /* SRC_MAIN_DETECT_ERROR_3_PHASE_H_ */

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/*
* detect_errors.h
*
* Created on: 4 äåê. 2020 ã.
* Author: star
*/
#ifndef SRC_MYLIBS_DETECT_ERRORS_H_
#define SRC_MYLIBS_DETECT_ERRORS_H_
#define TIME_WAIT_ERROR 20 // 2 sec
#define TIME_WAIT_ERROR_QTV 100 // 10 sec
#define TIME_WAIT_ERROR_CHARGE_ANSWER 60 // 6 sec
#define TIME_WAIT_ERROR_IZOL 50 //5 sec //200 // 20 sec
#define TIME_WAIT_ERROR_PUMP 100 // 10 sec
#define TIME_WAIT_ERROR_FAN 300 // 30 sec
#define TIME_WAIT_SENSOR_ROTOR_BREAK_ALL 200 // 20 sec
#define TIME_WAIT_SENSOR_ROTOR_BREAK_DIRECTION 10 // 1 sec
#define TIME_WAIT_SENSOR_ROTOR_BREAK_ONE_SENSOR 20 // 2 sec
#define MINIMAL_LEVEL_ZAD_U 27962 // 10 V
void clear_errors(void);
void clear_warnings(void);
void detect_error_all(void);
void read_plane_errors(void);
int detect_error_u_zpt_on_predzaryad(void);
int detect_error_u_in(void);
int detect_error_u_zpt_fast(void);
void detect_error_from_knopka_avaria(void);
void detect_error_ute4ka_water(void);
void detect_error_t_vipr(void);
void detect_error_power_upc(void);
void detect_error_op_pit(void);
void detect_error_p_water(void);
void detect_error_pump_2(void);
void detect_error_pump_1(void);
void detect_error_pre_ready_pump(void);
void detect_error_fan(void);
void detect_error_block_qtv_from_svu(void);
void detect_error_predohr_vipr(void);
void detect_error_qtv(void);
void detect_error_pre_charge(void);
void detect_error_block_izol(void);
void detect_error_nagrev(void);
void detect_error_ground(void);
void detect_error_block_door(void);
void detect_error_optical_bus(void);
void detect_error_sync_bus(void);
int get_status_temper_acdrive_winding(int nc);
int get_status_temper_acdrive_winding_with_limits(int nc, int alarm, int abnormal);
int get_status_temper_acdrive_bear(int nc);
int get_status_temper_acdrive_bear_with_limits(int nc, int alarm, int abnormal);
int get_status_temper_air(int nc);
int get_status_temper_air_with_limits(int nc, int alarm, int abnormal);
int get_status_temper_u(int nc);
int get_status_temper_u_with_limits(int nc, int alarm, int abnormal);
int get_status_temper_water(int nc);
int get_status_p_water_max(void);
int get_status_p_water_min(int pump_on_off);
void detect_error_t_water(void);
void detect_error_t_air(void);
void detect_error_t_u(void);
void detect_error_acdrive_winding(void);
int get_common_state_warning(void);
int get_common_state_overheat(void);
void detect_error_sensor_rotor(void);
#endif /* SRC_MYLIBS_DETECT_ERRORS_H_ */

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/*
* detect_errors_adc.c
*
* Created on: 7 äåê. 2020 ã.
* Author: star
*/
#include <adc_tools.h>
#include <detect_error_3_phase.h>
#include <detect_errors_adc.h>
#include <detect_phase_break.h>
#include <edrk_main.h>
#include <params_protect_adc.h>
#include <protect_levels.h>
#include "digital_filters.h"
#include "IQmathLib.h"
//ANALOG_PROTECT_LEVELS analog_protect_levels = ANALOG_PROTECT_LEVELS_DEFAULTS;
//#pragma DATA_SECTION(analog_protect,".fast_vars");
#pragma DATA_SECTION(analog_protect,".slow_vars");
ANALOG_ADC_PROTECT analog_protect = ANALOG_ADC_PROTECT_DEFAULTS;
//#pragma DATA_SECTION(break_Iout_1_state,".fast_vars");
#pragma DATA_SECTION(break_Iout_1_state,".slow_vars");
BREAK_PHASE_I break_Iout_1_state = BREAK_PHASE_I_DEFAULTS;
//#pragma DATA_SECTION(break_Iout_2_state,".fast_vars");
#pragma DATA_SECTION(break_Iout_2_state,".slow_vars");
BREAK_PHASE_I break_Iout_2_state = BREAK_PHASE_I_DEFAULTS;
int detect_error_Izpt();
int detect_error_Ibreak(int res_num);
void init_protect_3_phase(void);
void init_analog_protect_levels(void) {
init_protect_3_phase();
}
#define AMPL_TO_RMS 0.709
//#define LEVEL_I_1_2_DIBALANCE 1118481 // 200 A
#define LEVEL_I_1_2_DIBALANCE 1677721 // 300 A
void init_protect_3_phase(void) {
analog_protect.in_voltage[0].setup.levels.iqVal_module_max = edrk.iqMAX_U_IN;
analog_protect.in_voltage[0].setup.levels.iqVal_U_max = edrk.iqMAX_U_IN;
analog_protect.in_voltage[0].setup.levels.iqVal_V_max = edrk.iqMAX_U_IN;
analog_protect.in_voltage[0].setup.levels.iqVal_W_max = edrk.iqMAX_U_IN;
analog_protect.in_voltage[0].setup.levels.iqNominal_plus10 = _IQ(edrk.zadanie.ZadanieU_Charge*PLUS_10_PERCENT/NORMA_ACP);
analog_protect.in_voltage[0].setup.levels.iqNominal_plus20 = _IQ(edrk.zadanie.ZadanieU_Charge*PLUS_20_PERCENT/NORMA_ACP);
analog_protect.in_voltage[0].setup.levels.iqNominal_minus10 = _IQ(edrk.zadanie.ZadanieU_Charge*MINUS_10_PERCENT/NORMA_ACP);
analog_protect.in_voltage[0].setup.levels.iqNominal_minus20 = _IQ(edrk.zadanie.ZadanieU_Charge*MINUS_20_PERCENT/NORMA_ACP);
analog_protect.in_voltage[0].setup.levels.iqAsymmetry_delta = _IQ(edrk.zadanie.ZadanieU_Charge*ASYMMETRY_DELTA_PERCENTS/NORMA_ACP);
analog_protect.in_voltage[0].setup.use.all = 0;
analog_protect.in_voltage[0].setup.use.bits.phase_U = 0;
analog_protect.in_voltage[0].setup.use.bits.phase_V = 0;
analog_protect.in_voltage[0].setup.use.bits.phase_W = 0;
analog_protect.in_voltage[0].setup.use.bits.module = 0;
analog_protect.in_voltage[0].setup.use.bits.detect_minus_10 = 1;
analog_protect.in_voltage[0].setup.use.bits.detect_minus_20 = 1;
analog_protect.in_voltage[0].setup.use.bits.detect_plus_10 = 0;
analog_protect.in_voltage[0].setup.use.bits.detect_plus_20 = 1;
analog_protect.in_voltage[0].setup.use.bits.system_asymmetry_by_delta = 1;
analog_protect.in_voltage[1].setup.levels.iqVal_module_max = edrk.iqMAX_U_IN;
analog_protect.in_voltage[1].setup.levels.iqVal_U_max = edrk.iqMAX_U_IN;
analog_protect.in_voltage[1].setup.levels.iqVal_V_max = edrk.iqMAX_U_IN;
analog_protect.in_voltage[1].setup.levels.iqNominal_plus10 = _IQ(edrk.zadanie.ZadanieU_Charge*PLUS_10_PERCENT/NORMA_ACP);
analog_protect.in_voltage[1].setup.levels.iqNominal_plus20 = _IQ(edrk.zadanie.ZadanieU_Charge*PLUS_20_PERCENT/NORMA_ACP);
analog_protect.in_voltage[1].setup.levels.iqNominal_minus10 = _IQ(edrk.zadanie.ZadanieU_Charge*MINUS_10_PERCENT/NORMA_ACP);
analog_protect.in_voltage[1].setup.levels.iqNominal_minus20 = _IQ(edrk.zadanie.ZadanieU_Charge*MINUS_20_PERCENT/NORMA_ACP);
analog_protect.in_voltage[1].setup.levels.iqAsymmetry_delta = _IQ(edrk.zadanie.ZadanieU_Charge*ASYMMETRY_DELTA_PERCENTS/NORMA_ACP);
analog_protect.in_voltage[1].setup.use.all = 0;
analog_protect.in_voltage[1].setup.use.bits.phase_U = 0;
analog_protect.in_voltage[1].setup.use.bits.phase_V = 0;
analog_protect.in_voltage[1].setup.use.bits.phase_W = 0;
analog_protect.in_voltage[1].setup.use.bits.module = 0;
analog_protect.in_voltage[1].setup.use.bits.detect_minus_10 = 1;
analog_protect.in_voltage[1].setup.use.bits.detect_minus_20 = 1;
analog_protect.in_voltage[1].setup.use.bits.detect_plus_10 = 0;
analog_protect.in_voltage[1].setup.use.bits.detect_plus_20 = 1;
analog_protect.in_voltage[1].setup.use.bits.system_asymmetry_by_delta = 1;
/////////////////
analog_protect.out_I[0].setup.levels.iqVal_module_max = _IQ(LEVEL_ADC_I_AF / NORMA_ACP);
analog_protect.out_I[0].setup.levels.iqVal_U_max = _IQ(LEVEL_ADC_I_AF / NORMA_ACP);
analog_protect.out_I[0].setup.levels.iqVal_V_max = _IQ(LEVEL_ADC_I_AF / NORMA_ACP);
analog_protect.out_I[0].setup.levels.iqVal_W_max = _IQ(LEVEL_ADC_I_AF / NORMA_ACP);
analog_protect.out_I[0].setup.use.all = 0;
analog_protect.out_I[0].setup.use.bits.phase_U = 1;
analog_protect.out_I[0].setup.use.bits.phase_V = 1;
analog_protect.out_I[0].setup.use.bits.phase_W = 1;
analog_protect.out_I[0].setup.use.bits.break_phase = 1;
analog_protect.out_I[1].setup.levels.iqVal_module_max = _IQ(LEVEL_ADC_I_AF / NORMA_ACP);
analog_protect.out_I[1].setup.levels.iqVal_U_max = _IQ(LEVEL_ADC_I_AF / NORMA_ACP);
analog_protect.out_I[1].setup.levels.iqVal_V_max = _IQ(LEVEL_ADC_I_AF / NORMA_ACP);
analog_protect.out_I[1].setup.levels.iqVal_W_max = _IQ(LEVEL_ADC_I_AF / NORMA_ACP);
analog_protect.out_I[1].setup.use.all = 0;
analog_protect.out_I[1].setup.use.bits.phase_U = 1;
analog_protect.out_I[1].setup.use.bits.phase_V = 1;
analog_protect.out_I[1].setup.use.bits.phase_W = 1;
analog_protect.out_I[1].setup.use.bits.break_phase = 1;
analog_protect.iqI_zpt_level = _IQ(LEVEL_ADC_I_ZPT / NORMA_ACP);
analog_protect.iqI_break_level = _IQ(LEVEL_ADC_I_BREAK / NORMA_ACP);
}
#define min(x,y) (x) < (y) ? (x) : (y)
#define max(x,y) (x) > (y) ? (x) : (y)
void reinit_protect_I_and_U_settings(void) {
int max_I = 0;
analog_protect.in_voltage[0].setup.levels.iqVal_module_max = edrk.iqMAX_U_IN;
analog_protect.in_voltage[0].setup.levels.iqVal_U_max = edrk.iqMAX_U_IN;
analog_protect.in_voltage[0].setup.levels.iqVal_V_max = edrk.iqMAX_U_IN;
analog_protect.in_voltage[0].setup.levels.iqVal_W_max = edrk.iqMAX_U_IN;
analog_protect.in_voltage[0].setup.levels.iqNominal_plus10 = _IQ(edrk.zadanie.ZadanieU_Charge*PLUS_10_PERCENT/NORMA_ACP);
analog_protect.in_voltage[0].setup.levels.iqNominal_plus20 = _IQ(edrk.zadanie.ZadanieU_Charge*PLUS_20_PERCENT/NORMA_ACP);
analog_protect.in_voltage[0].setup.levels.iqNominal_minus10 = _IQ(edrk.zadanie.ZadanieU_Charge*MINUS_10_PERCENT/NORMA_ACP);
analog_protect.in_voltage[0].setup.levels.iqNominal_minus20 = _IQ(edrk.zadanie.ZadanieU_Charge*MINUS_20_PERCENT/NORMA_ACP);
analog_protect.in_voltage[0].setup.levels.iqAsymmetry_delta = _IQ(edrk.zadanie.ZadanieU_Charge*ASYMMETRY_DELTA_PERCENTS/NORMA_ACP);
analog_protect.in_voltage[1].setup.levels.iqVal_module_max = edrk.iqMAX_U_IN;
analog_protect.in_voltage[1].setup.levels.iqVal_U_max = edrk.iqMAX_U_IN;
analog_protect.in_voltage[1].setup.levels.iqVal_V_max = edrk.iqMAX_U_IN;
analog_protect.in_voltage[1].setup.levels.iqVal_W_max = edrk.iqMAX_U_IN;
analog_protect.in_voltage[1].setup.levels.iqNominal_plus10 = _IQ(edrk.zadanie.ZadanieU_Charge*PLUS_10_PERCENT/NORMA_ACP);
analog_protect.in_voltage[1].setup.levels.iqNominal_plus20 = _IQ(edrk.zadanie.ZadanieU_Charge*PLUS_20_PERCENT/NORMA_ACP);
analog_protect.in_voltage[1].setup.levels.iqNominal_minus10 = _IQ(edrk.zadanie.ZadanieU_Charge*MINUS_10_PERCENT/NORMA_ACP);
analog_protect.in_voltage[1].setup.levels.iqNominal_minus20 = _IQ(edrk.zadanie.ZadanieU_Charge*MINUS_20_PERCENT/NORMA_ACP);
analog_protect.in_voltage[1].setup.levels.iqAsymmetry_delta = _IQ(edrk.zadanie.ZadanieU_Charge*ASYMMETRY_DELTA_PERCENTS/NORMA_ACP);
max_I = max(protect_levels.alarm_Imax_U02, protect_levels.alarm_Imax_U03);
max_I = max(max_I, protect_levels.alarm_Imax_U04);
analog_protect.out_I[0].setup.levels.iqVal_module_max = _IQ(((float)max_I) / NORMA_ACP);
analog_protect.out_I[0].setup.levels.iqVal_U_max = _IQ(((float)protect_levels.alarm_Imax_U02) / NORMA_ACP);
analog_protect.out_I[0].setup.levels.iqVal_V_max = _IQ(((float)protect_levels.alarm_Imax_U03) / NORMA_ACP);
analog_protect.out_I[0].setup.levels.iqVal_W_max = _IQ(((float)protect_levels.alarm_Imax_U04) / NORMA_ACP);
max_I = max(protect_levels.alarm_Imax_U05, protect_levels.alarm_Imax_U06);
max_I = max(max_I, protect_levels.alarm_Imax_U07);
analog_protect.out_I[1].setup.levels.iqVal_module_max = _IQ(((float)max_I) / NORMA_ACP);
analog_protect.out_I[1].setup.levels.iqVal_U_max = _IQ(((float)protect_levels.alarm_Imax_U05) / NORMA_ACP);
analog_protect.out_I[1].setup.levels.iqVal_V_max = _IQ(((float)protect_levels.alarm_Imax_U06) / NORMA_ACP);
analog_protect.out_I[1].setup.levels.iqVal_W_max = _IQ(((float)protect_levels.alarm_Imax_U07) / NORMA_ACP);
analog_protect.iqI_zpt_level = _IQ(protect_levels.alarm_Izpt_max / NORMA_ACP);
analog_protect.iqI_break_level = _IQ(protect_levels.alarm_Imax_U01 / NORMA_ACP);
if (edrk.SumSbor == 0) {
analog_protect.in_voltage[0].setup.timers_inited = 0;
analog_protect.in_voltage[1].setup.timers_inited = 0;
analog_protect.out_I[0].setup.timers_inited = 0;
analog_protect.out_I[1].setup.timers_inited = 0;
}
}
#define TIME_DETECT_WARNING_U_PREDELS 100
void detect_protect_adc(_iq teta_ch1, _iq teta_ch2) {
static unsigned int timer_U_in1_minus10 = 0;
static unsigned int timer_U_in1_minus20 = 0;
static unsigned int timer_U_in1_plus20 = 0;
static unsigned int timer_U_in2_minus10 = 0;
static unsigned int timer_U_in2_minus20 = 0;
static unsigned int timer_U_in2_plus20 = 0;
static unsigned int counter_in1_minus10 = 0;
static unsigned int counter_in2_minus10 = 0;
static unsigned int counter_in1_minus20 = 0;
static unsigned int counter_in2_minus20 = 0;
//Âõîäíûå íàïðÿæåíèÿ
//0
analog_protect.in_voltage[0].errors.all = 0;
analog_protect.in_voltage[0].iqVal_U = analog.iqUin_A1B1_rms;
analog_protect.in_voltage[0].iqVal_V = analog.iqUin_B1C1_rms;
analog_protect.in_voltage[0].iqVal_W = analog.iqUin_C1A1_rms;
analog_protect.in_voltage[0].iqVal_mod = filter.iqUin_m1;
// analog_protect.in_voltage[0].calc(&analog_protect.in_voltage[0]);
//1
analog_protect.in_voltage[1].errors.all = 0;
analog_protect.in_voltage[1].iqVal_U = analog.iqUin_A2B2_rms;
analog_protect.in_voltage[1].iqVal_V = analog.iqUin_B2C2_rms;
analog_protect.in_voltage[1].iqVal_W = analog.iqUin_C2A2_rms;
analog_protect.in_voltage[1].iqVal_mod = filter.iqUin_m2;
// analog_protect.in_voltage[1].calc(&analog_protect.in_voltage[1]);
//
edrk.errors.e0.bits.U_A1B1_MAX |= analog_protect.in_voltage[0].errors.bits.phase_U_max;
edrk.errors.e0.bits.U_B1C1_MAX |= analog_protect.in_voltage[0].errors.bits.phase_V_max;
edrk.errors.e0.bits.U_IN_MAX |= analog_protect.in_voltage[0].errors.bits.module_max;
//
edrk.errors.e0.bits.U_A2B2_MAX |= analog_protect.in_voltage[1].errors.bits.phase_U_max;
edrk.errors.e0.bits.U_B2C2_MAX |= analog_protect.in_voltage[1].errors.bits.phase_V_max;
edrk.errors.e0.bits.U_IN_MAX |= analog_protect.in_voltage[1].errors.bits.module_max;
edrk.warnings.e8.bits.U_IN_20_PROCENTS_HIGH = analog_protect.in_voltage[0].over_limit.bits.module_20_percent_hi || analog_protect.in_voltage[1].over_limit.bits.module_20_percent_hi;
edrk.errors.e8.bits.U_IN_20_PROCENTS_HIGH |= analog_protect.in_voltage[0].errors.bits.module_20_percent_hi;
edrk.errors.e8.bits.U_IN_20_PROCENTS_HIGH |= analog_protect.in_voltage[1].errors.bits.module_20_percent_hi;
if (edrk.from_shema_filter.bits.QTV_ON_OFF == 1
// && edrk.to_shema.bits.QTV_ON
)
{
// êîíòðîëü íàïðÿæåíèé òîëüêî ïðè âêëþ÷åííîì ñèëîâîì àâòîìàòå
edrk.errors.e8.bits.U_IN_10_PROCENTS_LOW |= analog_protect.in_voltage[0].errors.bits.module_10_percent_low;
edrk.errors.e8.bits.U_IN_20_PROCENTS_LOW |= analog_protect.in_voltage[0].errors.bits.module_20_percent_low;
edrk.errors.e8.bits.U_IN_10_PROCENTS_LOW |= analog_protect.in_voltage[1].errors.bits.module_10_percent_low;
edrk.errors.e8.bits.U_IN_20_PROCENTS_LOW |= analog_protect.in_voltage[1].errors.bits.module_20_percent_low;
edrk.warnings.e8.bits.U_IN_10_PROCENTS_LOW = pause_detect_error(&counter_in1_minus10,
TIME_DETECT_WARNING_U_PREDELS,
analog_protect.in_voltage[0].over_limit.bits.module_10_percent_low);
edrk.warnings.e8.bits.U_IN_10_PROCENTS_LOW = pause_detect_error(&counter_in2_minus10,
TIME_DETECT_WARNING_U_PREDELS,
analog_protect.in_voltage[1].over_limit.bits.module_10_percent_low);
edrk.warnings.e8.bits.U_IN_20_PROCENTS_LOW = pause_detect_error(&counter_in1_minus20,
TIME_DETECT_WARNING_U_PREDELS,
analog_protect.in_voltage[0].over_limit.bits.module_20_percent_low);
edrk.warnings.e8.bits.U_IN_20_PROCENTS_LOW = pause_detect_error(&counter_in2_minus20,
TIME_DETECT_WARNING_U_PREDELS,
analog_protect.in_voltage[1].over_limit.bits.module_20_percent_low);
edrk.errors.e9.bits.DISBALANCE_Uin_1 |= analog_protect.in_voltage[0].errors.bits.system_asymmetry;
edrk.errors.e9.bits.DISBALANCE_Uin_2 |= analog_protect.in_voltage[1].errors.bits.system_asymmetry;
}
else
{
edrk.warnings.e8.bits.U_IN_10_PROCENTS_LOW = 0;
edrk.warnings.e8.bits.U_IN_20_PROCENTS_LOW = 0;
}
//Âûõîäíûå òîêè
analog_protect.out_I[0].errors.all = 0;
analog_protect.out_I[0].iqVal_U = analog.iqIu_1;
analog_protect.out_I[0].iqVal_V = analog.iqIv_1;
analog_protect.out_I[0].iqVal_W = analog.iqIw_1;
analog_protect.out_I[0].iqVal_mod = analog.iqIm_1;
analog_protect.out_I[0].break_phase = &break_Iout_1_state;
analog_protect.out_I[0].iqTeta = teta_ch1;
// analog_protect.out_I[0].calc(&analog_protect.out_I[0]);
edrk.errors.e1.bits.I_UO2_MAX = analog_protect.out_I[0].errors.bits.phase_U_max;
edrk.errors.e1.bits.I_UO3_MAX = analog_protect.out_I[0].errors.bits.phase_V_max;
edrk.errors.e1.bits.I_UO4_MAX = analog_protect.out_I[0].errors.bits.phase_W_max;
if (analog_protect.out_I[0].errors.bits.break_phase) {
edrk.errors.e8.bits.LOSS_OUTPUT_U1 = analog_protect.out_I[0].errors.bits.break_phase_U;
edrk.errors.e8.bits.LOSS_OUTPUT_V1 = analog_protect.out_I[0].errors.bits.break_phase_V;
edrk.errors.e8.bits.LOSS_OUTPUT_W1 = analog_protect.out_I[0].errors.bits.break_phase_W;
}
analog_protect.out_I[1].errors.all = 0;
analog_protect.out_I[1].iqVal_U = analog.iqIu_2;
analog_protect.out_I[1].iqVal_V = analog.iqIv_2;
analog_protect.out_I[1].iqVal_W = analog.iqIw_2;
analog_protect.out_I[1].iqVal_mod = analog.iqIm_2;
analog_protect.out_I[1].break_phase = &break_Iout_2_state;
analog_protect.out_I[1].iqTeta = teta_ch2;
// analog_protect.out_I[1].calc(&analog_protect.out_I[1]);
edrk.errors.e1.bits.I_UO5_MAX = analog_protect.out_I[1].errors.bits.phase_U_max;
edrk.errors.e1.bits.I_UO6_MAX = analog_protect.out_I[1].errors.bits.phase_V_max;
edrk.errors.e1.bits.I_UO7_MAX = analog_protect.out_I[1].errors.bits.phase_W_max;
if (analog_protect.out_I[1].errors.bits.break_phase) {
edrk.errors.e8.bits.LOSS_OUTPUT_U2 = analog_protect.out_I[1].errors.bits.break_phase_U;
edrk.errors.e8.bits.LOSS_OUTPUT_V2 = analog_protect.out_I[1].errors.bits.break_phase_V;
edrk.errors.e8.bits.LOSS_OUTPUT_W2 = analog_protect.out_I[1].errors.bits.break_phase_W;
}
edrk.errors.e8.bits.DISBALANCE_IM1_IM2 |= _IQabs(analog.iqIm_1 - analog.iqIm_2) > LEVEL_I_1_2_DIBALANCE ? 1 : 0;
//I zpt
edrk.errors.e0.bits.I_1_MAX |= detect_error_Izpt();
//Òîðìîçíûå ðåçèñòîðû
edrk.errors.e1.bits.I_BREAK_1_MAX |= detect_error_Ibreak(1);
edrk.errors.e1.bits.I_BREAK_2_MAX |= detect_error_Ibreak(2);
}
int detect_error_Izpt() {
return analog.iqIin_1 > analog_protect.iqI_zpt_level ? 1 : 0;
}
int detect_error_Ibreak(int res_num) {
if (res_num == 1) {
return analog.iqIbreak_1 > analog_protect.iqI_break_level ||
analog.iqIbreak_1 < -analog_protect.iqI_break_level ? 1 : 0;
} else if (res_num == 2) {
return analog.iqIbreak_2 > analog_protect.iqI_break_level ||
analog.iqIbreak_2 < -analog_protect.iqI_break_level ? 1 : 0;
} else {
return 0;
}
}

45
Inu/Src/main/detect_errors_adc.h Normal file
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/*
* detect_errors_adc.h
*
* Created on: 7 äåê. 2020 ã.
* Author: star
*/
#ifndef SRC_MAIN_DETECT_ERRORS_ADC_H_
#define SRC_MAIN_DETECT_ERRORS_ADC_H_
#include <detect_error_3_phase.h>
typedef struct {
SETUP_3_PHASE_PROTECT U_in;
SETUP_3_PHASE_PROTECT I_out;
_iq iqI_zpt;
_iq iqI_break;
} ANALOG_PROTECT_LEVELS;
#define ANALOG_PROTECT_LEVELS_DEFAULTS { SETUP_3_PHASE_PROTECT_DEFAULTS, \
SETUP_3_PHASE_PROTECT_DEFAULTS, \
0,0}
typedef struct {
DETECT_PROTECT_3_PHASE in_voltage[2];
DETECT_PROTECT_3_PHASE out_I[2];
_iq iqI_zpt_level;
_iq iqI_break_level;
} ANALOG_ADC_PROTECT;
#define ANALOG_ADC_PROTECT_DEFAULTS { \
{DETECT_PROTECT_3_PHASE_DEFAULTS,DETECT_PROTECT_3_PHASE_DEFAULTS},\
{DETECT_PROTECT_3_PHASE_DEFAULTS,DETECT_PROTECT_3_PHASE_DEFAULTS},\
0,0 }
void init_analog_protect_levels(void);
void detect_protect_adc (_iq teta_ch1, _iq teta_ch2);
void reinit_protect_I_and_U_settings(void);
extern ANALOG_ADC_PROTECT analog_protect;
#endif /* SRC_MAIN_DETECT_ERRORS_ADC_H_ */

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Inu/Src/main/detect_overload.c Normal file
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/*
* detect_overload.c
*
* Created on: 15 äåê. 2020 ã.
* Author: star
*/
#include <adc_tools.h>
#include <detect_overload.h>
#include <edrk_main.h>
#include <params_motor.h>
#include <params_pwm24.h>
#include "alg_simple_scalar.h"
#include "IQmathLib.h"
DETECT_OVERLOAD out_I_over_1_6 = DETECT_OVERLOAD_DEFAULTS;
#define CALLS_IN_PWM_INT 2 //Êîëè÷åñòâî ïðåðûâàíèé çà ïåðèîä ØÈÌ (1 èëè 2)
void init_detect_overloads(void) {
out_I_over_1_6.level_overload = _IQmpy(I_OUT_NOMINAL_IQ, _IQ(1.6));
out_I_over_1_6.time_over_tics = (long) 15 * FREQ_PWM * CALLS_IN_PWM_INT;
out_I_over_1_6.time_latch_tics = (long) 45 * FREQ_PWM * CALLS_IN_PWM_INT;
out_I_over_1_6.tics_counter = 0;
out_I_over_1_6.overload_detected = 0;
}
int calc_detect_overload(DETECT_OVERLOAD *v) {
if (v->val > v->level_overload) {
v->tics_counter += 1;
if (v->tics_counter > v->time_over_tics) { v->tics_counter = v->time_over_tics;}
} else {
if (v->tics_counter > 0) { v->tics_counter -= 1; }
else {v->tics_counter = 0;}
if (v->overload_detected && v->tics_counter == 0) {
v->overload_detected = 0;
}
}
if (v->tics_counter >= v->time_over_tics) {
v->overload_detected = 1;
v->tics_counter = v->time_latch_tics;
}
return v->overload_detected;
}
#define LIMIT_DETECT_LEVEL 16273899 // 0.97 //15938355 //95%
void check_all_power_limits() {
_iq level_I_nominal = 0;
//edrk.power_limit.bits.limit_by_temper = edrk.temper_limit_koeffs.code_status;
if (edrk.Go)
{
level_I_nominal = _IQmpy(LIMIT_DETECT_LEVEL, edrk.zadanie.iq_Izad_rmp);
if ((filter.iqIm > level_I_nominal) ||
out_I_over_1_6.overload_detected)
{
edrk.power_limit.bits.limit_Iout = 1;
} else
{
edrk.power_limit.bits.limit_Iout = 0;
}
}
else
edrk.power_limit.bits.limit_Iout = 0;
// if (edrk.from_uom.code>1)
// edrk.power_limit.bits.limit_UOM = 1;
// else
// edrk.power_limit.bits.limit_UOM = 0;
//filter.PowerScalar + edrk.iq_power_kw_another_bs
if ( (edrk.iq_power_kw_full_filter_abs > _IQmpy(LIMIT_DETECT_LEVEL, edrk.zadanie.iq_limit_power_zad_rmp))
|| simple_scalar1.flag_decr_mzz_power
// Äàííûé ñïîñîá äëÿ ñêàëÿðíîãî óïðàâëåíèÿ, äëÿ FOC, âîçìîæíî, íóæíà âåêòîðíàÿ ìîùíîñòü.
)
{
edrk.power_limit.bits.limit_from_SVU = 1;
}
else
{
edrk.power_limit.bits.limit_from_SVU = 0;
}
}

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/*
* detect_overload.h
*
* Created on: 15 äåê. 2020 ã.
* Author: star
*/
#ifndef SRC_MAIN_DETECT_OVERLOAD_H_
#define SRC_MAIN_DETECT_OVERLOAD_H_
typedef struct {
_iq val; //Òåêóùåå çíà÷åíèå
_iq level_overload; //Óðîâåíü ïåðåãðóçêè
int overload_detected; //Îãðàíè÷åíèå âêëþ÷åíî
unsigned long time_over_tics;
unsigned long time_latch_tics;
unsigned long tics_counter;
int (*calc)();
} DETECT_OVERLOAD;
#define DETECT_OVERLOAD_DEFAULTS {0,0,0, 0,0,0, \
calc_detect_overload }
void init_detect_overloads(void);
int calc_detect_overload(DETECT_OVERLOAD *v);
void check_all_power_limits();
extern DETECT_OVERLOAD out_I_over_1_6;
#endif /* SRC_MAIN_DETECT_OVERLOAD_H_ */

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/*
* detect_phase_break.c
*
* Created on: 10 äåê. 2020 ã.
* Author: star
*/
#include "DSP281x_Examples.h" // DSP281x Examples Include File
#include "DSP281x_Device.h" // DSP281x Headerfile Include File
#include "IQmathLib.h"
#include <detect_phase_break.h>
#define CONST_IQ_2PI 105414357 // 360 ãðàäóñîâ
#define CONST_IQ_PI2 26353589 // 90 ãðàäóñîâ
static void clear_alg_vars(BREAK_PHASE_I *v);
static int calc_direction(BREAK_PHASE_I *v);
static int calc_error_if_break(BREAK_PHASE_I *v, int num, int field_direction);
//Ôóíêöèÿ âîçâðàùàåò íîìåð êàíàäà, ïî îïðåäåëèëñÿ îáðûâ ôàçû
// 0 - íåò îáðûâà
// 1- ôàçà U
// 2- ôàçà V
// 3- ôàçà W
int calc_break_I_phase(BREAK_PHASE_I *v) {
int field_direction = 1; //1 - forward, 0 - reverse
int err = 0;
if (v->teta > CONST_IQ_2PI) {
v->teta = CONST_IQ_2PI;
}
if(v->teta < 0) {
v->teta = 0;
}
field_direction = calc_direction(v);
if (v->iqImod < v->config.iqLevelZero) {
clear_alg_vars(v);
return 0;
}
if (_IQabs(v->iqIu) < v->config.iqLevelZero &&
_IQabs(v->iqIv + v->iqIw) < v->config.iqLevelZero &&
_IQabs(v->iqIv) > v->config.iqLevelZero && _IQabs(v->iqIw) > v->config.iqLevelZero) {
err = calc_error_if_break(v, 0, field_direction);
} else {
v->latch_break_start[0] = 0;
}
if (_IQabs(v->iqIv) < v->config.iqLevelZero &&
_IQabs(v->iqIu + v->iqIw) < v->config.iqLevelZero &&
_IQabs(v->iqIu) > v->config.iqLevelZero && _IQabs(v->iqIw) > v->config.iqLevelZero) {
err = calc_error_if_break(v, 1, field_direction);
} else {
v->latch_break_start[1] = 0;
}
if (_IQabs(v->iqIw) < v->config.iqLevelZero &&
_IQabs(v->iqIv + v->iqIu) < v->config.iqLevelZero &&
_IQabs(v->iqIv) > v->config.iqLevelZero && _IQabs(v->iqIu) > v->config.iqLevelZero) {
err = calc_error_if_break(v, 2, field_direction);
} else {
v->latch_break_start[2] = 0;
}
return err;
}
void clear_alg_vars(BREAK_PHASE_I *v) {
int i = 0;
for (i = 0; i < 3; i++) {
v->latch_break_start[i] = 0;
v->latched_teta[i] = 0;
}
}
int calc_direction(BREAK_PHASE_I *v) {
int direction = 1;
if (v->teta > v->prev_teta) {
if (v->teta - v->prev_teta < CONST_IQ_PI2) { direction = 1;}
else { direction = 0;}
} else {
if (v->prev_teta - v->teta < CONST_IQ_2PI) { direction = 0;}
else { direction = 1;}
}
v->prev_teta = v->teta;
return direction;
}
int calc_error_if_break(BREAK_PHASE_I *v, int num, int field_direction) {
int err = 0;
if (v->latch_break_start[num] == 0) {
v->latch_break_start[num] = 1;
v->latched_teta[num] = v->teta;
} else {
if (field_direction == 0) {
if (v->latched_teta[num] > v->teta) {
err = v->latched_teta[num] - v->teta > CONST_IQ_PI2 ? num + 1 : 0;
} else {
err = v->teta - v->latched_teta[num] < CONST_IQ_PI2 - CONST_IQ_2PI ? num + 1 : 0;
}
} else {
if (v->latched_teta[num] < v->teta) {
err = v->teta - v->latched_teta[num] > CONST_IQ_PI2 ? num + 1 : 0;
} else {
err = v->latched_teta[num] - v->teta < CONST_IQ_PI2 - CONST_IQ_2PI ? num + 1 : 0;
}
}
}
return err;
}

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/*
* detect_phase_break.h
*
* Created on: 10 äĺę. 2020 ă.
* Author: star
*/
#ifndef SRC_MAIN_DETECT_PHASE_BREAK_H_
#define SRC_MAIN_DETECT_PHASE_BREAK_H_
typedef struct {
_iq iqIu;
_iq iqIv;
_iq iqIw;
_iq iqImod;
_iq teta;
_iq prev_teta;
_iq latched_teta[3];
int latch_break_start[3];
struct {
_iq iqLevelZero;
} config;
int (*calc)();
} BREAK_PHASE_I;
#define BREAK_PHASE_I_DEFAULTS {0,0,0,0,0,0, \
{0,0,0}, {0,0,0}, {0}, \
calc_break_I_phase }
int calc_break_I_phase(BREAK_PHASE_I *v);
#endif /* SRC_MAIN_DETECT_PHASE_BREAK_H_ */

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/*
* detect_phase_break.c
*
* Created on: 10 äåê. 2020 ã.
* Author: star
*/
#include "IQmathLib.h"
//#include "DSP281x_Examples.h" // DSP281x Examples Include File
//#include "DSP281x_Device.h" // DSP281x Headerfile Include File
#include "detect_phase_break2.h"
#define CONST_IQ_2PI 105414357 // 2*pi 360 ãðàäóñîâ
#define CONST_IQ_3_2PI 79060767 // 4/3 pi 270 ãðàäóñîâ
#define CONST_IQ_PI2 26353589 // 90 ãðàäóñîâ
void check_brocken_phase(BREAK2_PHASE *v)
{
int i;
int ph_a=0, ph_b=0, ph_c=0;
_iq plus_a, max_a;
if ( (v->iqCh[0] >= v->iqCh[1] && v->iqCh[0] < v->iqCh[2])
|| (v->iqCh[0] >= v->iqCh[2] && v->iqCh[0] < v->iqCh[1]) )
ph_a = 1;
else
ph_a = -1;
if ( (v->iqCh[1] >= v->iqCh[0] && v->iqCh[1] < v->iqCh[2])
|| (v->iqCh[1] >= v->iqCh[2] && v->iqCh[1] < v->iqCh[0]) )
ph_b = 1;
else
ph_b = -1;
if ( (v->iqCh[2] >= v->iqCh[0] && v->iqCh[2] < v->iqCh[1])
|| (v->iqCh[2] >= v->iqCh[1] && v->iqCh[2] < v->iqCh[0]) )
ph_c = 1;
else
ph_c = -1;
// plus_a = _IQ(360.0/v->config.freq_pwm * v->freq_signal);
plus_a = _IQmpy(v->config.calc_const, v->freq_signal);
v->sum_brocken_out[0] += plus_a*ph_a;
v->sum_brocken_out[1] += plus_a*ph_b;
v->sum_brocken_out[2] += plus_a*ph_c;
v->plus_a = plus_a;
for (i=0;i<3;i++)
{
if (v->sum_brocken_out[i]>=CONST_IQ_2PI) v->sum_brocken_out[i] = CONST_IQ_2PI;
if (v->sum_brocken_out[i]<=0) v->sum_brocken_out[i] = 0;
if (v->sum_brocken_out[i]>CONST_IQ_3_2PI)
v->return_brocken_code |= (1<<i);
}
max_a = 0;
if (v->sum_brocken_out[0]>=max_a) max_a = v->sum_brocken_out[0];
if (v->sum_brocken_out[1]>=max_a) max_a = v->sum_brocken_out[1];
if (v->sum_brocken_out[2]>=max_a) max_a = v->sum_brocken_out[2];
v->sum_brocken_out[3] = max_a; // íàøëè ìàêñèìóì
}
void check_i_out_brocken(float freq)
{
}
//Ôóíêöèß âîçâðàùàåò íîìåð êàíàäà, ïî îïðåäåëèëñß îáðûâ ôàçû
// 0 - íåò îáðûâà
// 1- ôàçà U
// 2- ôàçà V
// 3- ôàçà W
int calc_break2_phase(BREAK2_PHASE *v) {
// int field_direction = 1; //1 - forward, 0 - reverse
int err = 0;
if (v->freq_signal==0)
{
v->sum_brocken_out[0] = 0;
v->sum_brocken_out[1] = 0;
v->sum_brocken_out[2] = 0;
v->sum_brocken_out[3] = 0;
v->brocken_i_out = 0;
}
else
{
if (_IQabs(v->iqCh[0])>v->config.minimal_level
|| _IQabs(v->iqCh[1])>v->config.minimal_level
|| _IQabs(v->iqCh[2])>v->config.minimal_level )
{
check_brocken_phase(v);
}
else
{
v->iqCh[0] = 0;
v->iqCh[1] = 0;
v->iqCh[2] = 0;
check_brocken_phase(v);
}
}
// if (brocken_i_out & 0x1)
// error.power_errors.bit.phase_a_brocken |= 1;
// if (brocken_i_out & 0x2)
// error.power_errors.bit.phase_b_brocken |= 1;
// if (brocken_i_out & 0x4)
// error.power_errors.bit.phase_c_brocken |= 1;
//
// if(is_errors()) set_err_state();
//
// if (v->teta > CONST_IQ_2PI) {
// v->teta = CONST_IQ_2PI;
// }
// if(v->teta < 0) {
// v->teta = 0;
// }
// field_direction = calc_direction(v);
// if (v->iqImod < v->config.iqLevelZero) {
// clear_alg_vars(v);
// return 0;
// }
//
// if (_IQabs(v->iqIu) < v->config.iqLevelZero &&
// _IQabs(v->iqIv + v->iqIw) < v->config.iqLevelZero &&
// _IQabs(v->iqIv) > v->config.iqLevelZero && _IQabs(v->iqIw) > v->config.iqLevelZero) {
// err = calc_error_if_break(v, 0, field_direction);
// } else {
// v->latch_break_start[0] = 0;
// }
// if (_IQabs(v->iqIv) < v->config.iqLevelZero &&
// _IQabs(v->iqIu + v->iqIw) < v->config.iqLevelZero &&
// _IQabs(v->iqIu) > v->config.iqLevelZero && _IQabs(v->iqIw) > v->config.iqLevelZero) {
// err = calc_error_if_break(v, 1, field_direction);
// } else {
// v->latch_break_start[1] = 0;
// }
// if (_IQabs(v->iqIw) < v->config.iqLevelZero &&
// _IQabs(v->iqIv + v->iqIu) < v->config.iqLevelZero &&
// _IQabs(v->iqIv) > v->config.iqLevelZero && _IQabs(v->iqIu) > v->config.iqLevelZero) {
// err = calc_error_if_break(v, 2, field_direction);
// } else {
// v->latch_break_start[2] = 0;
// }
return err;
}
void init_break2_phase(BREAK2_PHASE *v)
{
v->config.iq_freq = _IQ(v->config.freq_pwm / v->config.norma_freq);
v->config.calc_const = _IQdiv(CONST_IQ_2PI, v->config.iq_freq);
v->return_brocken_code = 0;
}
void clear_break2_phase(BREAK2_PHASE *v)
{
v->iqCh[0] = 0;
v->iqCh[1] = 0;
v->iqCh[2] = 0;
v->sum_brocken_out[0] = 0;
v->sum_brocken_out[1] = 0;
v->sum_brocken_out[2] = 0;
v->sum_brocken_out[3] = 0;
v->brocken_i_out = 0;
v->return_brocken_code = 0;
}

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/*
* detect_phase_break2.h
*
* Created on: 10 äåê. 2020 ã.
* Author: star
*/
#ifndef SRC_MAIN_DETECT_PHASE_BREAK2_H_
#define SRC_MAIN_DETECT_PHASE_BREAK2_H_
#include "IQmathLib.h"
typedef struct {
_iq iqCh[3];
_iq sum_brocken_out[4]; // 4 ýëåìåíò - ýòî ìàêñ. èç ïåðâûõ òðåõ
_iq freq_signal;
int brocken_i_out;
int return_brocken_code;
_iq plus_a;
struct {
unsigned int freq_pwm;
unsigned int norma_freq;
_iq minimal_level;
_iq calc_const;
_iq iq_freq;
} config;
int (*calc)();
void (*init)();
void (*clear_error)();
} BREAK2_PHASE;
#define BREAK2_PHASE_DEFAULTS {{0,0,0},\
{0,0,0,0},\
0,0,0,0,\
0,0,0,0,0, \
calc_break2_phase, init_break2_phase, clear_break2_phase }
void check_brocken_phase(BREAK2_PHASE *v);
int calc_break2_phase(BREAK2_PHASE *v);
void init_break2_phase(BREAK2_PHASE *v);
void clear_break2_phase(BREAK2_PHASE *v);
#endif /* SRC_MAIN_DETECT_PHASE_BREAK2_H_ */

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/*
* digital_filters.c
*
* Created on: 13 íîÿá. 2024 ã.
* Author: Evgeniy_Sokolov
*/
////////////////////////////////////////////////////////////////////
unsigned int filter_digital_input(unsigned int prev_valus, unsigned int *c_plus, unsigned int max_wait, unsigned int flag)
{
if (flag)
{
if ((*c_plus)>=max_wait)
{
return 1;
}
else
{
(*c_plus)++;
return (prev_valus);
}
}
else
{
if ((*c_plus)==0)
{
return 0;
}
else
{
(*c_plus)--;
return (prev_valus);
}
}
}
///////////////////////////////////////////////////////////////////
//TODO: may be move to detect_errors.c
unsigned int pause_detect_error(unsigned int *c_err, unsigned int max_wait,unsigned int flag)
{
if (flag)
{
if ((*c_err)>=max_wait)
{
return 1;
}
else
{
(*c_err)++;
return 0;
}
}
else
{
(*c_err) = 0;
return 0;
}
}
//////////////////////////////////////////////////////////
unsigned int filter_err_count(unsigned int *counter, unsigned int max_errors, unsigned int err, unsigned int cmd)
{
if (cmd==1)
{
(*counter) = 0;
return 0;
}
if (err)
{
if ((*counter)>=max_errors)
return 1;
else
(*counter)++;
return 0;
}
if (err==0)
{
if ((*counter)==0)
return 0;
else
(*counter)--;
return 0;
}
return 0;
}

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/*
* digital_filters.h
*
* Created on: 13 íîÿá. 2024 ã.
* Author: Evgeniy_Sokolov
*/
#ifndef SRC_MAIN_DIGITAL_FILTERS_H_
#define SRC_MAIN_DIGITAL_FILTERS_H_
unsigned int filter_digital_input(unsigned int prev_valus, unsigned int *c_plus, unsigned int max_wait, unsigned int flag);
unsigned int pause_detect_error(unsigned int *c_err, unsigned int max_wait,unsigned int flag);
unsigned int filter_err_count(unsigned int *counter, unsigned int max_errors, unsigned int err, unsigned int cmd);
#endif /* SRC_MAIN_DIGITAL_FILTERS_H_ */

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/* ==================================================================================
File name: F281XBMSK.H
Originator: Digital Control Systems Group
Texas Instruments
Description:
Header file containing handy bitmasks for setting up register values.
This file defines the bitmasks for F281X.
Target: TMS320F281x family
=====================================================================================
History:
-------------------------------------------------------------------------------------
04-15-2005 Version 3.20: Using DSP281x v. 1.00 or higher
---------------------------------------------------------------------------------- */
#ifndef __F281X_BMSK_H__
#define __F281X_BMSK_H__
/*------------------------------------------------------------------------------
F281X Register TxCON
------------------------------------------------------------------------------*/
#define FREE_RUN_FLAG 0x8000
#define SOFT_STOP_FLAG 0x4000
#define TIMER_STOP 0x0000
#define TIMER_CONT_UPDN 0x0800
#define TIMER_CONT_UP 0x1000
#define TIMER_DIR_UPDN 0x1800
#define TIMER_CLK_PRESCALE_X_1 0x0000
#define TIMER_CLK_PRESCALE_X_2 0x0100
#define TIMER_CLK_PRESCALE_X_4 0x0200
#define TIMER_CLK_PRESCALE_X_8 0x0300
#define TIMER_CLK_PRESCALE_X_16 0x0400
#define TIMER_CLK_PRESCALE_X_32 0x0500
#define TIMER_CLK_PRESCALE_X_64 0x0600
#define TIMER_CLK_PRESCALE_X_128 0x0700
#define TIMER_ENABLE_BY_OWN 0x0000
#define TIMER_ENABLE_BY_T1 0x0080
#define TIMER_ENABLE 0x0040
#define TIMER_DISABLE 0x0000
#define TIMER_CLOCK_SRC_INTERNAL 0x0000
#define TIMER_CLOCK_SRC_EXTERNAL 0x0010
#define TIMER_CLOCK_SRC_QEP 0x0030
#define TIMER_COMPARE_LD_ON_ZERO 0x0000
#define TIMER_COMPARE_LD_ON_ZERO_OR_PRD 0x0004
#define TIMER_COMPARE_LD_IMMEDIATE 0x0008
#define TIMER_ENABLE_COMPARE 0x0002
#define TIMER_SELECT_T1_PERIOD 0x0001
/*------------------------------------------------------------------------------
F281X Register ACTR 0x7413 BIT FIELD MASKS
------------------------------------------------------------------------------*/
/*------------------------------------------------------------------------------
Space Vector Direction Commands
------------------------------------------------------------------------------*/
#define SV_DIRECTION_CW 0x8000
#define SV_DIRECTION_CCW 0x0000
/*------------------------------------------------------------------------------
Space Vector Generation Vectors
------------------------------------------------------------------------------*/
//------------------------------------------------------------------------------
#define SPACE_VECTOR_0 0x0000
#define SPACE_VECTOR_1 0x1000
#define SPACE_VECTOR_2 0x2000
#define SPACE_VECTOR_3 0x3000
#define SPACE_VECTOR_4 0x4000
#define SPACE_VECTOR_5 0x5000
#define SPACE_VECTOR_6 0x6000
#define SPACE_VECTOR_7 0x7000
/*------------------------------------------------------------------------------
Compare action definitions
------------------------------------------------------------------------------*/
#define COMPARE6_FL 0x0000
#define COMPARE6_AL 0x0400
#define COMPARE6_AH 0x0800
#define COMPARE6_FH 0x0C00
//------------------------------------------------------------------------------
#define COMPARE5_FL 0x0000
#define COMPARE5_AL 0x0100
#define COMPARE5_AH 0x0200
#define COMPARE5_FH 0x0300
//------------------------------------------------------------------------------
#define COMPARE4_FL 0x0000
#define COMPARE4_AL 0x0040
#define COMPARE4_AH 0x0080
#define COMPARE4_FH 0x00C0
//------------------------------------------------------------------------------
#define COMPARE3_FL 0x0000
#define COMPARE3_AL 0x0010
#define COMPARE3_AH 0x0020
#define COMPARE3_FH 0x0030
//------------------------------------------------------------------------------
#define COMPARE2_FL 0x0000
#define COMPARE2_AL 0x0004
#define COMPARE2_AH 0x0008
#define COMPARE2_FH 0x000C
//------------------------------------------------------------------------------
#define COMPARE1_FL 0x0000
#define COMPARE1_AL 0x0001
#define COMPARE1_AH 0x0002
#define COMPARE1_FH 0x0003
//------------------------------------------------------------------------------
/*------------------------------------------------------------------------------
F281X Register COMCONA/COMCONB
------------------------------------------------------------------------------*/
#define CMPR_ENABLE 0x8000
#define CMPR_LD_ON_ZERO 0x0000
#define CMPR_LD_ON_ZERO_OR_PRD 0x2000
#define CMPR_LD_IMMEDIATE 0x4000
#define SVENABLE 0x1000
#define SVDISABLE 0x0000
#define ACTR_LD_ON_ZERO 0x0000
#define ACTR_LD_ON_ZERO_OR_PRD 0x0400
#define ACTR_LD_IMMEDIATE 0x0800
#define FCOMPOE 0x0100
/*------------------------------------------------------------------------------
F281X Register DBTCON
------------------------------------------------------------------------------*/
#define DBT_VAL_0 0x0000
#define DBT_VAL_1 0x0100
#define DBT_VAL_2 0x0200
#define DBT_VAL_3 0x0300
#define DBT_VAL_4 0x0400
#define DBT_VAL_5 0x0500
#define DBT_VAL_6 0x0600
#define DBT_VAL_7 0x0700
#define DBT_VAL_8 0x0800
#define DBT_VAL_9 0x0900
#define DBT_VAL_10 0x0A00
#define DBT_VAL_11 0x0B00
#define DBT_VAL_12 0x0C00
#define DBT_VAL_13 0x0D00
#define DBT_VAL_14 0x0E00
#define DBT_VAL_15 0x0F00
#define EDBT3_DIS 0x0000
#define EDBT3_EN 0x0080
#define EDBT2_DIS 0x0000
#define EDBT2_EN 0x0040
#define EDBT1_DIS 0x0000
#define EDBT1_EN 0x0020
#define DBTPS_X32 0x0014
#define DBTPS_X16 0x0010
#define DBTPS_X8 0x000C
#define DBTPS_X4 0x0008
#define DBTPS_X2 0x0004
#define DBTPS_X1 0x0000
/*------------------------------------------------------------------------------
F281X Register ADCTRL1
------------------------------------------------------------------------------*/
#define ADC_SUS_MODE0 0x0000
#define ADC_SUS_MODE1 0X1000
#define ADC_SUS_MODE2 0x2000
#define ADC_SUS_MODE3 0X3000
#define ADC_RESET_FLAG 0x4000
#define ADC_ACQ_PS_1 0x0000
#define ADC_ACQ_PS_2 0x0100
#define ADC_ACQ_PS_3 0x0200
#define ADC_ACQ_PS_4 0x0300
#define ADC_ACQ_PS_5 0x0400
#define ADC_ACQ_PS_6 0x0500
#define ADC_ACQ_PS_7 0x0600
#define ADC_ACQ_PS_8 0x0700
#define ADC_ACQ_PS_9 0x0800
#define ADC_ACQ_PS_10 0x0900
#define ADC_ACQ_PS_11 0x0A00
#define ADC_ACQ_PS_12 0x0B00
#define ADC_ACQ_PS_13 0x0C00
#define ADC_ACQ_PS_14 0x0D00
#define ADC_ACQ_PS_15 0x0E00
#define ADC_ACQ_PS_16 0x0F00
#define ADC_CPS_1 0x0000
#define ADC_CPS_2 0x0080
#define ADC_CONT_RUN 0x0040
#define ADC_SEQ_CASC 0x0010
#define ADC_SEQ_DUAL 0x0000
/*------------------------------------------------------------------------------
F281X Register ADCTRL2
------------------------------------------------------------------------------*/
#define ADC_EVB_SOC 0x8000
#define ADC_RST_SEQ1 0x4000
#define ADC_SOC_SEQ1 0x2000
#define ADC_INT_ENA_SEQ1 0x0800
#define ADC_INT_MODE_SEQ1 0X0400
#define ADC_EVA_SOC_SEQ1 0x0100
#define ADC_EXT_SOC_SEQ1 0x0080
#define ADC_RST_SEQ2 0x0040
#define ADC_SOC_SEQ2 0x0020
#define ADC_INT_ENA_SEQ2 0x0008
#define ADC_INT_MODE_SEQ2 0x0004
#define ADC_EVB_SOC_SEQ2 0x0001
/*------------------------------------------------------------------------------
F281X Register ADCTRL3
------------------------------------------------------------------------------*/
#define ADC_RFDN 0x0080
#define ADC_BGDN 0x0040
#define ADC_PWDN 0x0020
#define ADC_CLKPS_X_1 0x0000
#define ADC_CLKPS_X_2 0x0002
#define ADC_CLKPS_X_4 0x0004
#define ADC_CLKPS_X_6 0x0006
#define ADC_CLKPS_X_8 0x0008
#define ADC_CLKPS_X_10 0x000A
#define ADC_CLKPS_X_12 0x000C
#define ADC_CLKPS_X_14 0x000E
#define ADC_CLKPS_X_16 0x0010
#define ADC_CLKPS_X_18 0x0012
#define ADC_CLKPS_X_20 0x0014
#define ADC_CLKPS_X_22 0x0016
#define ADC_CLKPS_X_24 0x0018
#define ADC_CLKPS_X_26 0x001A
#define ADC_CLKPS_X_28 0x001C
#define ADC_CLKPS_X_30 0x001E
#define ADC_SMODE_SIMULTANEOUS 0x0001
#define ADC_SMODE_SEQUENTIAL 0x0000
#endif // __F281X_BMSK_H__
// EOF

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/* ==================================================================================
File name: F281XPWM.C
Originator: Digital Control Systems Group
Texas Instruments
Description: This file contains source for the Full Compare PWM drivers for the F281x
Target: TMS320F281x family
=====================================================================================
History:
-------------------------------------------------------------------------------------
04-15-2005 Version 3.20: Using DSP281x v. 1.00 or higher
----------------------------------------------------------------------------------*/
#include "DSP281x_Examples.h" // DSP281x Examples Include File
#include "DSP281x_Device.h" // DSP281x Headerfile Include File
#include "IQmathLib.h"
#include <f281xpwm.h>
#include "DSP281x_Ev.h"
//#include "params.h"
void F281X_EV1_PWM_Init(PWMGEN *p)
{
EvaRegs.T1PR = p->PeriodMax; // Init Timer 1 period Register
EvaRegs.T1CON.all = PWM_INIT_STATE; // Symmetrical Operation
EvaRegs.DBTCONA.all = DBTCON_INIT_STATE; // Init DBTCONA Register
EvaRegs.ACTRA.all = ACTR_INIT_STATE; // Init ACTRA Register
EvaRegs.COMCONA.all = 0xA600; // Init COMCONA Register
EvaRegs.CMPR1 = p->PeriodMax; // Init CMPR1 Register
EvaRegs.CMPR2 = p->PeriodMax; // Init CMPR2 Register
EvaRegs.CMPR3 = p->PeriodMax; // Init CMPR3 Register
EALLOW; // Enable EALLOW
GpioMuxRegs.GPAMUX.all |= 0x003F; // Setting PWM1-6 as primary output pins
EDIS; // Disable EALLOW
}
void F281X_EV1_PWM_Update(PWMGEN *p)
{
int16 MPeriod;
int32 Tmp;
// Compute the timer period (Q0) from the period modulation input (Q15)
Tmp = (int32)p->PeriodMax*(int32)p->MfuncPeriod; // Q15 = Q0*Q15
MPeriod = (int16)(Tmp>>16) + (int16)(p->PeriodMax>>1); // Q0 = (Q15->Q0)/2 + (Q0/2)
EvaRegs.T1PR = MPeriod;
// Compute the compare 1 (Q0) from the PWM 1&2 duty cycle ratio (Q15)
Tmp = (int32)MPeriod*(int32)p->MfuncC1; // Q15 = Q0*Q15
EvaRegs.CMPR1 = (int16)(Tmp>>16) + (int16)(MPeriod>>1); // Q0 = (Q15->Q0)/2 + (Q0/2)
// Compute the compare 2 (Q0) from the PWM 3&4 duty cycle ratio (Q15)
Tmp = (int32)MPeriod*(int32)p->MfuncC2; // Q15 = Q0*Q15
EvaRegs.CMPR2 = (int16)(Tmp>>16) + (int16)(MPeriod>>1); // Q0 = (Q15->Q0)/2 + (Q0/2)
// Compute the compare 3 (Q0) from the PWM 5&6 duty cycle ratio (Q15)
Tmp = (int32)MPeriod*(int32)p->MfuncC3; // Q15 = Q0*Q15
EvaRegs.CMPR3 = (int16)(Tmp>>16) + (int16)(MPeriod>>1); // Q0 = (Q15->Q0)/2 + (Q0/2)
}
void F281X_EV2_PWM_Init(PWMGEN *p)
{
EvbRegs.T3PR = p->PeriodMax; // Init Timer 1 period Register
EvbRegs.T3CON.all = PWM_INIT_STATE; // Symmetrical Operation
EvbRegs.DBTCONB.all = DBTCON_INIT_STATE; // Init DBTCONA Register
EvbRegs.ACTRB.all = ACTR_INIT_STATE; // Init ACTRA Register
EvbRegs.COMCONB.all = 0xA600; // Init COMCONA Register
EvbRegs.CMPR4 = p->PeriodMax; // Init CMPR1 Register
EvbRegs.CMPR5 = p->PeriodMax; // Init CMPR2 Register
EvbRegs.CMPR6 = p->PeriodMax; // Init CMPR3 Register
EALLOW; // Enable EALLOW
GpioMuxRegs.GPBMUX.all |= 0x003F; // Setting PWM1-6 as primary output pins
EDIS; // Disable EALLOW
}
void F281X_EV2_PWM_Update(PWMGEN *p)
{
int16 MPeriod;
int32 Tmp;
// Compute the timer period (Q0) from the period modulation input (Q15)
Tmp = (int32)p->PeriodMax*(int32)p->MfuncPeriod; // Q15 = Q0*Q15
MPeriod = (int16)(Tmp>>16) + (int16)(p->PeriodMax>>1); // Q0 = (Q15->Q0)/2 + (Q0/2)
EvbRegs.T3PR = MPeriod;
// Compute the compare 1 (Q0) from the PWM 1&2 duty cycle ratio (Q15)
Tmp = (int32)MPeriod*(int32)p->MfuncC1; // Q15 = Q0*Q15
EvbRegs.CMPR4 = (int16)(Tmp>>16) + (int16)(MPeriod>>1); // Q0 = (Q15->Q0)/2 + (Q0/2)
// Compute the compare 2 (Q0) from the PWM 3&4 duty cycle ratio (Q15)
Tmp = (int32)MPeriod*(int32)p->MfuncC2; // Q15 = Q0*Q15
EvbRegs.CMPR5 = (int16)(Tmp>>16) + (int16)(MPeriod>>1); // Q0 = (Q15->Q0)/2 + (Q0/2)
// Compute the compare 3 (Q0) from the PWM 5&6 duty cycle ratio (Q15)
Tmp = (int32)MPeriod*(int32)p->MfuncC3; // Q15 = Q0*Q15
EvbRegs.CMPR6 = (int16)(Tmp>>16) + (int16)(MPeriod>>1); // Q0 = (Q15->Q0)/2 + (Q0/2)
}
void F281X_EVD_PWM_Init(PWMGEND *p)
{
//unsigned int pna=0,pnb=0;
EvaRegs.T1PR = p->PeriodMax; // Init Timer 1 period Register
#ifdef DOUBLE_UPDATE_PWM
EvaRegs.T1CON.all = PWM_INIT_STATE_DOUBLE_UPADTE; // Symmetrical Operation + DOUBLE UPDATE
#else
EvaRegs.T1CON.all = PWM_INIT_STATE; // Symmetrical Operation
#endif
EvaRegs.DBTCONA.all = DBTCON_INIT_STATE; // Init DBTCONA Register
EvaRegs.ACTRA.all = ACTR_INIT_STATE; // Init ACTRA Register
EvaRegs.COMCONA.all = 0xa600;//0xA600; // Init COMCONA Register
EvaRegs.CMPR1 = p->PeriodMax; // Init CMPR1 Register
EvaRegs.CMPR2 = p->PeriodMax; // Init CMPR2 Register
EvaRegs.CMPR3 = p->PeriodMax; // Init CMPR3 Register
EALLOW; // Enable EALLOW
GpioMuxRegs.GPAMUX.all |= 0x003F; // Setting PWM1-6 as primary output pins
EDIS; // Disable EALLOW
EvbRegs.T3PR = p->PeriodMax; // Init Timer 1 period Register
#ifdef DOUBLE_UPDATE_PWM
EvbRegs.T3CON.all = PWM_INIT_STATE_DOUBLE_UPADTE; // Symmetrical Operation + DOUBLE UPDATE
#else
EvbRegs.T3CON.all = PWM_INIT_STATE; // Symmetrical Operation
#endif
EvbRegs.DBTCONB.all = DBTCON_INIT_STATE; // Init DBTCONA Register
EvbRegs.ACTRB.all = ACTR_INIT_STATE; // Init ACTRA Register
EvbRegs.COMCONB.all = 0xa600;//0xA600; // Init COMCONA Register
EvbRegs.CMPR4 = p->PeriodMax; // Init CMPR1 Register
EvbRegs.CMPR5 = p->PeriodMax; // Init CMPR2 Register
EvbRegs.CMPR6 = p->PeriodMax; // Init CMPR3 Register
EALLOW; // Enable EALLOW
GpioMuxRegs.GPBMUX.all |= 0x003F; // Setting PWM1-6 as primary output pins
EDIS; // Disable EALLOW
// pna = p->ShiftPhaseA;//(p->PeriodMax);
// pnb = p->ShiftPhaseB;
EvaRegs.T1CNT = 0x0000;
EvbRegs.T3CNT = 0x0000;
}
#pragma CODE_SECTION(set_predel_dshim,".fast_run");
int16 set_predel_dshim(int16 dshim,int16 dmin,int16 dpwm)
{
if (dshim < dmin)
{
dshim = dmin;
}
if (dshim > (dpwm - dmin) )
{
dshim = (dpwm - dmin);
}
return dshim;
}
#pragma CODE_SECTION(set_predel_dshim_max,".fast_run");
int16 set_predel_dshim_max(int16 dshim,int16 dmin,int16 dpwm)
{
int d2;
/*
if (dshim < dmin)
{
return 0;
}
else
{
if (dshim > (dpwm - dmin) )
{
// dshim = (dpwm + 1);
return (dpwm + 10);
}
else
return dshim;
}
*/
d2 = dmin/2;
if (dshim < d2)
{
dshim = 0;
return dshim;
}
if (dshim < dmin)
{
dshim = dmin;
return dshim;
}
if (dshim > (dpwm - d2) )
{
dshim = dpwm+dmin;
return dshim;
}
if (dshim > (dpwm - dmin) )
{
dshim = (dpwm - dmin);
return dshim;
}
return dshim;
}
//#pragma CODE_SECTION(F281X_EVD_PWM_Update,".fast_run");
void F281X_EVD_PWM_Update(PWMGEND *p)
{
int16 MPeriod, Dshim;
int32 Tmp;
// Compute the timer period (Q0) from the period modulation input (Q15)
Tmp = (int32)p->PeriodMax*(int32)p->MfuncPeriod; // Q15 = Q0*Q15
MPeriod = (int16)(Tmp>>16) + (int16)(p->PeriodMax>>1); // Q0 = (Q15->Q0)/2 + (Q0/2)
EvaRegs.T1PR = MPeriod;
// Compute the compare 1 (Q0) from the PWM 1&2 duty cycle ratio (Q15)
Tmp = (int32)MPeriod*(int32)p->MfuncC1; // Q15 = Q0*Q15
Dshim = (int16)(Tmp>>16) + (int16)(MPeriod>>1); // Q0 = (Q15->Q0)/2 + (Q0/2)
EvaRegs.CMPR1 = set_predel_dshim(Dshim,(int16)p->PeriodMin,(int16)MPeriod);
// Compute the compare 2 (Q0) from the PWM 3&4 duty cycle ratio (Q15)
Tmp = (int32)MPeriod*(int32)p->MfuncC2; // Q15 = Q0*Q15
Dshim = (int16)(Tmp>>16) + (int16)(MPeriod>>1); // Q0 = (Q15->Q0)/2 + (Q0/2)
EvaRegs.CMPR2 = set_predel_dshim(Dshim,(int16)p->PeriodMin,(int16)MPeriod);
// Compute the compare 3 (Q0) from the PWM 5&6 duty cycle ratio (Q15)
Tmp = (int32)MPeriod*(int32)p->MfuncC3; // Q15 = Q0*Q15
Dshim = (int16)(Tmp>>16) + (int16)(MPeriod>>1); // Q0 = (Q15->Q0)/2 + (Q0/2)
EvaRegs.CMPR3 = set_predel_dshim(Dshim,(int16)p->PeriodMin,(int16)MPeriod);
// Compute the timer period (Q0) from the period modulation input (Q15)
// Tmp = (int32)p->PeriodMax*(int32)p->MfuncPeriod; // Q15 = Q0*Q15
// MPeriod = (int16)(Tmp>>16) + (int16)(p->PeriodMax>>1); // Q0 = (Q15->Q0)/2 + (Q0/2)
EvbRegs.T3PR = MPeriod;
// Compute the compare 1 (Q0) from the PWM 1&2 duty cycle ratio (Q15)
Tmp = (int32)MPeriod*(int32)p->MfuncC4; // Q15 = Q0*Q15
Dshim = (int16)(Tmp>>16) + (int16)(MPeriod>>1); // Q0 = (Q15->Q0)/2 + (Q0/2)
EvbRegs.CMPR4 = set_predel_dshim(Dshim,(int16)p->PeriodMin,(int16)MPeriod);
// Compute the compare 2 (Q0) from the PWM 3&4 duty cycle ratio (Q15)
Tmp = (int32)MPeriod*(int32)p->MfuncC5; // Q15 = Q0*Q15
Dshim = (int16)(Tmp>>16) + (int16)(MPeriod>>1); // Q0 = (Q15->Q0)/2 + (Q0/2)
EvbRegs.CMPR5 = set_predel_dshim(Dshim,(int16)p->PeriodMin,(int16)MPeriod);
// Compute the compare 3 (Q0) from the PWM 5&6 duty cycle ratio (Q15)
Tmp = (int32)MPeriod*(int32)p->MfuncC6; // Q15 = Q0*Q15
Dshim = (int16)(Tmp>>16) + (int16)(MPeriod>>1); // Q0 = (Q15->Q0)/2 + (Q0/2)
EvbRegs.CMPR6 = set_predel_dshim(Dshim,(int16)p->PeriodMin,(int16)MPeriod);
}

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/* ==================================================================================
File name: F281XPWM.H
Originator: Digital Control Systems Group
Texas Instruments
Description:
Header file containing data type and object definitions and
initializers. Also contains prototypes for the functions in F281XPWM.C.
Target: TMS320F281x family
=====================================================================================
History:
-------------------------------------------------------------------------------------
04-15-2005 Version 3.20: Using DSP281x v. 1.00 or higher
---------------------------------------------------------------------------------- */
#ifndef __F281X_PWM_H__
#define __F281X_PWM_H__
#include <f281xbmsk.h>
//#include "DSP281x_Device.h"
/*----------------------------------------------------------------------------
Initialization constant for the F281X Timer TxCON for PWM Generation.
Sets up the timer to run free upon emulation suspend, continuous up-down mode
prescaler 1, timer enabled.
----------------------------------------------------------------------------*/ //FREE_RUN_FLAG
#define PWM_INIT_STATE (FREE_RUN_FLAG + \
TIMER_CONT_UPDN + \
TIMER_CLK_PRESCALE_X_1 + \
TIMER_ENABLE_BY_OWN + \
TIMER_ENABLE)
#define PWM_INIT_STATE_DOUBLE_UPADTE (FREE_RUN_FLAG + \
TIMER_COMPARE_LD_ON_ZERO_OR_PRD + \
TIMER_CONT_UPDN + \
TIMER_CLK_PRESCALE_X_1 + \
TIMER_ENABLE_BY_OWN + \
TIMER_ENABLE)
/*----------------------------------------------------------------------------
Initialization constant for the F281X ACTRx register for PWM Generation.
Sets up PWM polarities.
----------------------------------------------------------------------------*/
#define ACTR_INIT_STATE ( COMPARE1_FH + \
COMPARE2_FH + \
COMPARE3_FH + \
COMPARE4_FH + \
COMPARE5_FH + \
COMPARE6_FH )
#define ACTR_ON_STATE ( COMPARE1_AL + \
COMPARE2_AH + \
COMPARE3_AL + \
COMPARE4_AH + \
COMPARE5_AL + \
COMPARE6_AH )
/*----------------------------------------------------------------------------
Initialization constant for the F281X DBTCONx register for PWM Generation.
Sets up the dead band for PWM and sets up dead band values.
----------------------------------------------------------------------------*/
#define DBTCON_INIT_STATE ( DBT_VAL_10 + \
EDBT3_EN + \
EDBT2_EN + \
EDBT1_EN + \
DBTPS_X32 )
/*-----------------------------------------------------------------------------
Define the structure of the PWM Driver Object
-----------------------------------------------------------------------------*/
typedef struct {
Uint16 PeriodMax; // Parameter: PWM Half-Period in CPU clock cycles (Q0)
int16 MfuncPeriod; // Input: Period scaler (Q15)
int16 MfuncC1; // Input: PWM 1&2 Duty cycle ratio (Q15)
int16 MfuncC2; // Input: PWM 3&4 Duty cycle ratio (Q15)
int16 MfuncC3; // Input: PWM 5&6 Duty cycle ratio (Q15)
void (*init)(); // Pointer to the init function
void (*update)(); // Pointer to the update function
} PWMGEN ;
typedef struct {
Uint16 PeriodMax; // Parameter: PWM Half-Period in CPU clock cycles (Q0)
Uint16 PeriodMin; // Parameter: PWM Half-Period in CPU clock cycles (Q0)
int16 MfuncPeriod; // Input: Period scaler (Q15)
int16 MfuncC1; // Input: PWM 1&2 Duty cycle ratio (Q15)
int16 MfuncC2; // Input: PWM 3&4 Duty cycle ratio (Q15)
int16 MfuncC3; // Input: PWM 5&6 Duty cycle ratio (Q15)
int16 MfuncC4; // Input: PWM 1&2 Duty cycle ratio (Q15)
int16 MfuncC5; // Input: PWM 3&4 Duty cycle ratio (Q15)
int16 MfuncC6; // Input: PWM 5&6 Duty cycle ratio (Q15)
Uint16 ShiftPhaseA; // Parameter: PWM Half-Period in CPU clock cycles (Q0)
Uint16 ShiftPhaseB; // Parameter: PWM Half-Period in CPU clock cycles (Q0)
void (*init)(); // Pointer to the init function
void (*update)(); // Pointer to the update function
} PWMGEND ;
/*-----------------------------------------------------------------------------
Define a PWMGEN_handle
-----------------------------------------------------------------------------*/
typedef PWMGEN *PWMGEN_handle;
typedef PWMGEND *PWMGEND_handle;
/*------------------------------------------------------------------------------
Default Initializers for the F281X PWMGEN Object
------------------------------------------------------------------------------*/
#define F281X_EV1_FC_PWM_GEN {1000, \
0x7FFF, \
0x4000, \
0x4000, \
0x4000, \
(void (*)(Uint32))F281X_EV1_PWM_Init, \
(void (*)(Uint32))F281X_EV1_PWM_Update \
}
#define F281X_EV2_FC_PWM_GEN {1000, \
0x7FFF, \
0x4000, \
0x4000, \
0x4000, \
(void (*)(Uint32))F281X_EV2_PWM_Init, \
(void (*)(Uint32))F281X_EV2_PWM_Update \
}
#define F281X_EVD_FC_PWM_GEN {1000, \
0, \
0x7FFF, \
0x4000, \
0x4000, \
0x4000, \
0x4000, \
0x4000, \
0x4000, \
0x000, \
0x000, \
(void (*)(Uint32))F281X_EVD_PWM_Init, \
(void (*)(Uint32))F281X_EVD_PWM_Update \
}
#define PWMGEN1_DEFAULTS F281X_EV1_FC_PWM_GEN
#define PWMGEN2_DEFAULTS F281X_EV2_FC_PWM_GEN
#define PWMGEND_DEFAULTS F281X_EVD_FC_PWM_GEN
/*------------------------------------------------------------------------------
Prototypes for the functions in F281XPWM.C
------------------------------------------------------------------------------*/
void F281X_EV1_PWM_Init(PWMGEN_handle);
void F281X_EV1_PWM_Update(PWMGEN_handle);
void F281X_EV2_PWM_Init(PWMGEN_handle);
void F281X_EV2_PWM_Update(PWMGEN_handle);
void F281X_EVD_PWM_Init(PWMGEND_handle);
void F281X_EVD_PWM_Update(PWMGEND_handle);
int16 set_predel_dshim_max(int16 dshim,int16 dmin,int16 dpwm);
int16 set_predel_dshim(int16 dshim,int16 dmin,int16 dpwm);
#endif // __F281X_PWM_H__

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/*
* limit_lib.c
*
* Created on: 15 àâã. 2024 ã.
* Author: yura
*/
#include "IQmathLib.h"
#include "math_pi.h"
_iq linear_decrease(float current, int alarm_level, int warnig_level) {
float delta = current - warnig_level;
float max_delta = alarm_level - warnig_level;
if (delta <= 0 || max_delta <= 0) {
return CONST_IQ_1;
} else {
if (delta>max_delta)
return 0;
else
return CONST_IQ_1 - _IQ(delta / max_delta);
}
}
_iq linear_decrease_iq(_iq current, _iq alarm_level, _iq warnig_level)
{
_iq delta = current - warnig_level;
_iq max_delta = alarm_level - warnig_level;
if (delta <= 0 || max_delta <= 0) {
return CONST_IQ_1;
} else {
if (delta>=max_delta)
return 0;
else
return CONST_IQ_1 - _IQdiv(delta, max_delta);
}
}

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/*
* limit_lib.h
*
* Created on: 15 àâã. 2024 ã.
* Author: yura
*/
#ifndef SRC_MAIN_LIMIT_LIB_H_
#define SRC_MAIN_LIMIT_LIB_H_
_iq linear_decrease(float current, int alarm_level, int warnig_level);
_iq linear_decrease_iq(_iq current, _iq alarm_level, _iq warnig_level);
#endif /* SRC_MAIN_LIMIT_LIB_H_ */

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/*
* limit_power.c
*
* Created on: 15 àâã. 2024 ã.
* Author: yura
*/
#include "IQmathLib.h"
#include <adc_tools.h>
#include <detect_overload.h>
#include <edrk_main.h>
#include <params_motor.h>
#include <params_pwm24.h>
#include "mathlib.h"
#include "math_pi.h"
#include "limit_power.h"
#include "limit_lib.h"
#include "pll_tools.h"
#include "uom_tools.h"
#define KOEF_50HZ (FREQ_PWM*2.0*50.0/PI)
#define LEVEL_01HZ_IQ _IQ(10.0/KOEF_50HZ) // 0.1 HZ
_iq level_50hz = _IQmpyI32(LEVEL_01HZ_IQ, 500);
_iq level_minimal_level_work_hz = _IQmpyI32(LEVEL_01HZ_IQ, 350);
_iq delta_freq_test = 0;
//_iq level_01hz = _IQ(LEVEL_01HZ);
//#define LEVEL_50HZ (5000.0/KOEF_50HZ) // 50 HZ
//#define LEVEL_05HZ (50.0/KOEF_50HZ) // 50 HZ
//
//#define LEVEL_3HZ (300.0/KOEF_50HZ) // 50 HZ
//#define LEVEL_2HZ (200.0/KOEF_50HZ) // 50 HZ
//#define LEVEL_1HZ (100.0/KOEF_50HZ) // 50 HZ
#define LEVEL1_FREQ_DECR 10 // 1.5 Hz îò 49.0
#define LEVEL2_FREQ_DECR 100 // 10 Hz äî 40
//#define LEVEL1_FREQ_DECR 15 // 1.5 Hz îò 48.5
//#define LEVEL2_FREQ_DECR 100 // 10 Hz äî 40
#define PLUS_LIMIT_KOEFFS 0.0001
#define MINUS_LIMIT_KOEFFS 0.05
#define MAX_COUNT_GO_UOM (FREQ_PWM*5) // 5 sec
#define SET_LIMIT_UOM 0.5
void calc_all_limit_koeffs(void)
{
_iq sum_limit, delta_freq;
static unsigned int prev_uom = 0;
static int flag_enable_go_uom = 0;
static _iq level1_freq_decr = _IQmpyI32(LEVEL_01HZ_IQ, LEVEL1_FREQ_DECR);
static _iq level2_freq_decr = _IQmpyI32(LEVEL_01HZ_IQ, LEVEL2_FREQ_DECR);
static _iq iq_set_limit_uom = _IQ(SET_LIMIT_UOM);
static unsigned int count_go_uom = 0;
static _iq iq_plus_limit_koeffs = _IQ(PLUS_LIMIT_KOEFFS);
static _iq iq_minus_limit_koeffs = _IQ(MINUS_LIMIT_KOEFFS);
static long freq_test = 30;
//*LEVEL_01HZ_IQ;
static _iq minus_delta_freq_test = _IQdiv32(LEVEL_01HZ_IQ); // 0.1/32
static int uom_test = 50;
static int prev_imit_limit_freq = 0, prev_imit_limit_uom = 0;
static _iq iq_new_uom_level_kwt = 0;
update_uom();
// temper
edrk.all_limit_koeffs.local_temper_limit = edrk.temper_limit_koeffs.sum_limit;
// uin_freq
if (edrk.Status_Ready.bits.ready_final) //|| edrk.imit_limit_freq
{
get_freq_50hz_iq();
// freq = LEVEL_50HZ - edrk.iq_freq_50hz;
if (edrk.imit_limit_freq && prev_imit_limit_freq == 0)
delta_freq_test = _IQmpyI32(LEVEL_01HZ_IQ, freq_test);
if (delta_freq_test>0)
{
if (delta_freq_test>0)
delta_freq_test -= minus_delta_freq_test;
if (delta_freq_test<0)
delta_freq_test = 0;
}
if (edrk.iq_freq_50hz>level_minimal_level_work_hz)
{
edrk.all_limit_koeffs.local_uin_freq_limit = linear_decrease_iq( (level_50hz - edrk.iq_freq_50hz),
level2_freq_decr, level1_freq_decr);
}
else
edrk.all_limit_koeffs.local_uin_freq_limit = CONST_IQ_1;
}
else
{
edrk.all_limit_koeffs.local_uin_freq_limit = CONST_IQ_1;
}
prev_imit_limit_freq = edrk.imit_limit_freq;
//
/// UOM
//
if (edrk.from_uom.ready || edrk.set_limit_uom_50)
{
if (edrk.set_limit_uom_50)
{
edrk.from_uom.level_value = uom_test;
}
if (edrk.imit_limit_uom && prev_imit_limit_uom == 0)
edrk.from_uom.level_value++;
if (prev_uom!=edrk.from_uom.level_value && edrk.from_uom.level_value > prev_uom)
{
if (edrk.iq_power_kw_full_filter_abs > edrk.from_uom.iq_level_value_kwt)
flag_enable_go_uom = 1;
}
else
flag_enable_go_uom = 0;
if (flag_enable_go_uom)
{
count_go_uom = MAX_COUNT_GO_UOM;
edrk.all_limit_koeffs.local_uom_limit = iq_set_limit_uom; // äàåì ñáðîñ
}
if (count_go_uom)
{
// äåðæèì ñáðîñ
count_go_uom--;
}
else
edrk.all_limit_koeffs.local_uom_limit = CONST_IQ_1; // âîçâðàùàåìñÿ
prev_uom = edrk.from_uom.level_value;
}
else
{
edrk.power_limit.bits.limit_from_uom_fast = 0;
edrk.all_limit_koeffs.uom_limit = CONST_IQ_1;
prev_uom = 0;
}
prev_imit_limit_uom = edrk.imit_limit_uom;
// if ()
//// temper
edrk.all_limit_koeffs.temper_limit = zad_intensiv_q(iq_plus_limit_koeffs, iq_minus_limit_koeffs,
edrk.all_limit_koeffs.temper_limit,
edrk.all_limit_koeffs.local_temper_limit);
edrk.power_limit.bits.limit_by_temper = (edrk.all_limit_koeffs.temper_limit<CONST_IQ_1) ? 1 : 0;
////// freq
edrk.all_limit_koeffs.uin_freq_limit = zad_intensiv_q(iq_plus_limit_koeffs, iq_minus_limit_koeffs,
edrk.all_limit_koeffs.uin_freq_limit,
edrk.all_limit_koeffs.local_uin_freq_limit);
edrk.power_limit.bits.limit_from_freq = (edrk.all_limit_koeffs.uin_freq_limit<CONST_IQ_1) ? 1 : 0;
///// uom
edrk.all_limit_koeffs.uom_limit = zad_intensiv_q(iq_plus_limit_koeffs, iq_minus_limit_koeffs,
edrk.all_limit_koeffs.uom_limit,
edrk.all_limit_koeffs.local_uom_limit);
edrk.power_limit.bits.limit_from_uom_fast = (edrk.all_limit_koeffs.uom_limit<CONST_IQ_1) ? 1 : 0;
// sum_limit
sum_limit = edrk.all_limit_koeffs.temper_limit;
sum_limit = _IQmpy(sum_limit, edrk.all_limit_koeffs.moment_limit );
sum_limit = _IQmpy(sum_limit, edrk.all_limit_koeffs.power_limit );
sum_limit = _IQmpy(sum_limit, edrk.all_limit_koeffs.uin_freq_limit );
sum_limit = _IQmpy(sum_limit, edrk.all_limit_koeffs.uom_limit );
edrk.all_limit_koeffs.sum_limit = sum_limit;
}
void init_all_limit_koeffs(void)
{
edrk.all_limit_koeffs.moment_limit = CONST_IQ_1;
edrk.all_limit_koeffs.power_limit = CONST_IQ_1;
edrk.all_limit_koeffs.temper_limit = CONST_IQ_1;
edrk.all_limit_koeffs.uin_freq_limit = CONST_IQ_1;
edrk.all_limit_koeffs.uom_limit = CONST_IQ_1;
edrk.all_limit_koeffs.sum_limit = CONST_IQ_1;
edrk.all_limit_koeffs.local_moment_limit = CONST_IQ_1;
edrk.all_limit_koeffs.local_power_limit = CONST_IQ_1;
edrk.all_limit_koeffs.local_temper_limit = CONST_IQ_1;
edrk.all_limit_koeffs.local_uin_freq_limit = CONST_IQ_1;
edrk.all_limit_koeffs.local_uom_limit = CONST_IQ_1;
edrk.all_limit_koeffs.local_sum_limit = CONST_IQ_1;
}

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/*
* limit_power.h
*
* Created on: 15 àâã. 2024 ã.
* Author: yura
*/
#ifndef SRC_MAIN_LIMIT_POWER_H_
#define SRC_MAIN_LIMIT_POWER_H_
void calc_all_limit_koeffs(void);
void init_all_limit_koeffs(void);
extern _iq level_50hz, delta_freq_test;
#endif /* SRC_MAIN_LIMIT_POWER_H_ */

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/*
* logs_hmi.h
*
* Created on: 28 àâã. 2024 ã.
* Author: Evgeniy_Sokolov
*/
#ifndef SRC_MAIN_LOGS_HMI_H_
#define SRC_MAIN_LOGS_HMI_H_
#define _LOG_HMI_SMALL_TEST 0//1
#define PLACE_STORE_LOG_PULT_SD 1 //SD
#define PLACE_STORE_LOG_PULT_USB 2 //USB Flash
typedef struct {
int send_log;
// int new_send_log_checked;
unsigned long log_size_sent;
// int flag_data_received;
// unsigned int number_of_log;
unsigned long count_write_to_modbus;
// unsigned long current_address;
unsigned long start_log_address;
// int log_address_step;
int step;
int progress_bar;
int enable_progress_bar;
int cleanLogs;
int tick_step;
// int tick_finish;
int flag_log_array_sended;
int flag_start_log_array_sent;
int flag_log_array_sent_process;
int count_data_in_buf;
unsigned long count_sended_to_pult;
unsigned long max_size_logs_hmi;
int tick_step2;
int tick_step3;
int tick_step4;
int tick_step5;
int n_log_array_sended;
unsigned long max_size_logs_hmi_small;
unsigned long max_size_logs_hmi_full;
int saveLogsToSDCard;
int ReportLogOut;
int sdusb;
} t_Logs_with_modbus;
#define LOGS_WITH_MODBUS_DEFAULTS {0,0,0,0,0, 0,0,0,0, 0,0,0,0,0, 0, 0,0,0,0,0, 0,0, 0,0,0}
extern t_Logs_with_modbus log_to_HMI;
#define LOG_START_ADRES 0xA0000UL
#define LOG_END_ADRES 0xF0000UL
#define LOG_BUFFER_SIZE 0x50000UL //0x100UL
void fillLogArea(); //TODO for testing only
int alarm_log_get_data(unsigned long pos, int type_log);
int writeLogsArray(int flag_next);
static void prepareWriteLogsArray(void);
static int fillAnalogDataArrayForLogSend(void);
int sendLogToHMI(int status_ok);
void run_store_slow_logs(void);
#endif /* SRC_MAIN_LOGS_HMI_H_ */

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#ifndef MANCH_H
#define MANCH_H
#ifdef __cplusplus
extern "C" {
#endif
struct MANCH_READ_BITS { // bits description
Uint16 but_0:1; // 1
Uint16 but_1:1; // 1
Uint16 but_2:1; // 1
Uint16 but_3:1; // 1
Uint16 but_4:1; // 1
Uint16 but_5:1; // 1
Uint16 but_6:1; // 1
Uint16 but_7:1; // 1
Uint16 press_any_key:1; // 0
};
union MANCH_READ_REG {
Uint16 all;
struct MANCH_READ_BITS bit;
};
struct MANCH_WRITE_BITS { // bits description
int number0:14; // 1
int number1:14; // 1
Uint16 data_control:1; // 1
Uint16 case_line_recive2:1; // 1
Uint16 res0:1; // 1
Uint16 res1:1; // 1
Uint16 set_ratio_indicator:4; // 1
union {
Uint16 all;
struct
{
Uint16 lamp_0:1; // 1
Uint16 lamp_1:1; // 1
Uint16 lamp_2:1; // 1
Uint16 lamp_3:1; // 1
Uint16 lamp_4:1; // 1
Uint16 lamp_5:1; // 1
Uint16 lamp_6:1; // 1
Uint16 lamp_7:1; // 1
Uint16 lamp_8:1; // 1
Uint16 lamp_9:1; // 1
Uint16 lamp_10:1; // 1
Uint16 lamp_11:1; // 1
Uint16 lamp_12:1; // 1
Uint16 lamp_13:1; // 1
Uint16 lamp_14:1; // 1
Uint16 lamp_15:1; // 1
} bit;
} lamps;
union {
Uint16 all;
struct
{
Uint16 lamp_0:1; // 1
Uint16 lamp_1:1; // 1
Uint16 lamp_2:1; // 1
Uint16 lamp_3:1; // 1
Uint16 lamp_4:1; // 1
Uint16 lamp_5:1; // 1
Uint16 lamp_6:1; // 1
Uint16 lamp_7:1; // 1
Uint16 lamp_8:1; // 1
Uint16 lamp_9:1; // 1
Uint16 lamp_10:1; // 1
Uint16 lamp_11:1; // 1
Uint16 lamp_12:1; // 1
Uint16 lamp_13:1; // 1
Uint16 lamp_14:1; // 1
Uint16 lamp_15:1; // 1
} bit;
} lamps_2;
Uint16 res2:1; // 1
Uint16 res3:1; // 1
Uint16 set_ratio_lamp:4; // 1
Uint16 case_line_receive1:1;
};
/*
struct MANCH_WRITE1_BITS { // bits description
Uint16 number0:16; // 1
};
struct MANCH_WRITE2_BITS { // bits description
Uint16 number1:8; // 1
Uint16 data_control:1; // 1
Uint16 case_line_recive2:1; // 1
Uint16 res10:1; // 1
Uint16 res11:1; // 1
Uint16 res1:6; // 1
};
struct MANCH_WRITE3_BITS { // bits description
Uint16 lamp_0:1; // 1
Uint16 lamp_1:1; // 1
Uint16 lamp_2:1; // 1
Uint16 lamp_3:1; // 1
Uint16 lamp_4:1; // 1
Uint16 lamp_5:1; // 1
Uint16 lamp_6:1; // 1
Uint16 lamp_7:1; // 1
Uint16 lamp_8:1; // 1
Uint16 lamp_9:1; // 1
Uint16 lamp_10:1; // 1
Uint16 lamp_11:1; // 1
Uint16 lamp_12:1; // 1
Uint16 lamp_13:1; // 1
Uint16 lamp_14:1; // 1
Uint16 lamp_15:1; // 1
};
union MANCH_WRITE1_REG {
Uint16 all;
struct MANCH_WRITE1_BITS bit;
};
union MANCH_WRITE2_REG {
Uint16 all;
struct MANCH_WRITE2_BITS bit;
};
union MANCH_WRITE3_REG {
Uint16 all;
struct MANCH_WRITE3_BITS bit;
};
*/
typedef volatile struct { // bits description
union MANCH_READ_REG reg1;
} MANCH_READ_REGS;
/*
typedef volatile struct { // bits description
union MANCH_WRITE1_REG reg1;
union MANCH_WRITE2_REG reg2;
union MANCH_WRITE3_REG reg3;
} MANCH_WRITE_REGS;
*/
typedef volatile struct MANCH_WRITE_BITS MANCH_WRITE_REGS;
extern MANCH_READ_REGS ManchReadRegs_00;
extern MANCH_READ_REGS ManchReadRegs_01;
extern MANCH_READ_REGS ManchReadRegs_02;
extern MANCH_READ_REGS ManchReadRegs_03;
extern MANCH_WRITE_REGS ManchWriteRegs_00;
extern MANCH_WRITE_REGS ManchWriteRegs_01;
void read_manch();
int write_manch();
void tune_manch_lines_v1();
#ifdef __cplusplus
}
#endif /* extern "C" */
#endif // end of MANCH_H definition

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/*
* master_slave.c
*
* Created on: 13 íîÿá. 2024 ã.
* Author: Evgeniy_Sokolov
*/
#include <edrk_main.h>
#include <params.h>
#include <params_alg.h>
#include <params_norma.h>
#include <params_pwm24.h>
#include <params_temper_p.h>
#include <project.h>
#include "IQmathLib.h"
#include "mathlib.h"
#include <optical_bus.h>
#include "synhro_tools.h"
#include "master_slave.h"
//////////////////////////////////////////////////////////
#pragma DATA_SECTION(buf_log_master_slave_status,".slow_vars");
unsigned int buf_log_master_slave_status[SIZE_LOG_MASTER_SLAVE_STATUS] = {0};
//AUTO_MASTER_SLAVE_DATA buf2[SIZE_BUF1] = {0};
//AUTO_MASTER_SLAVE_DATA buf3[SIZE_BUF1] = {0};
//OPTICAL_BUS_DATA_LOW_CMD buf4[SIZE_BUF1] = {0};
//OPTICAL_BUS_DATA_LOW_CMD buf5[SIZE_BUF1] = {0};
//////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////
void auto_select_master_slave(void)
{
static unsigned int count_try_master = 0;
static unsigned int count_wait_answer_confirm_mode = 0;
static unsigned int count_wait_slave_try_master = 0;
unsigned int err_confirm_mode = 0; // îøèáêà ïîäòâåðæäåíèÿ ðåæèìà äðóãèì Ï×
static unsigned int c_buf_log_master_slave_status = 0, prev_status = 0;
// logs master_slave_status
if (edrk.auto_master_slave.status != prev_status)
{
c_buf_log_master_slave_status++;
if (c_buf_log_master_slave_status>=SIZE_LOG_MASTER_SLAVE_STATUS)
c_buf_log_master_slave_status = 0;
buf_log_master_slave_status[c_buf_log_master_slave_status] = edrk.auto_master_slave.status;
}
prev_status = edrk.auto_master_slave.status;
//end logs master_slave_status
if (edrk.ms.ready2==0 && edrk.errors.e7.bits.AUTO_SET_MASTER==0)
{
edrk.auto_master_slave.remoute.all = 0;
edrk.auto_master_slave.local.all = 0;
edrk.auto_master_slave.prev_remoute.all = edrk.auto_master_slave.remoute.all;
edrk.auto_master_slave.prev_local.all = edrk.auto_master_slave.local.all;
edrk.auto_master_slave.status = 1;
// if (prev_ready!=edrk.ms.ready2)
// for (c_buf=0;c_buf<SIZE_BUF1;c_buf++)
// {
// buf2[c_buf].all = buf3[c_buf].all = buf1[c_buf] = buf4[c_buf].all = buf5[c_buf].all =0;
// }
//
// c_buf = 0;
//
// prev_ready = edrk.ms.ready2;
clear_wait_synhro_optical_bus();
return;
}
// else
// prev_ready = edrk.ms.ready2;
if (edrk.errors.e7.bits.AUTO_SET_MASTER)
{
edrk.to_second_pch.bits.MASTER = edrk.auto_master_slave.local.bits.master;
edrk.auto_master_slave.local.bits.master = 0;
edrk.auto_master_slave.local.bits.slave = 0;
edrk.auto_master_slave.local.bits.try_master = 0;
edrk.auto_master_slave.local.bits.try_slave = 0;
edrk.auto_master_slave.local.bits.nothing = 1;
// edrk.auto_master_slave.prev_remoute.all = edrk.auto_master_slave.remoute.all;
// edrk.auto_master_slave.prev_local.all = edrk.auto_master_slave.local.all;
// edrk.auto_master_slave.status = 10;
return;
}
edrk.auto_master_slave.prev_status = edrk.auto_master_slave.status;
// c_buf++;
// if (c_buf>=SIZE_BUF1)
// c_buf = 0;
//
// buf1[c_buf] = edrk.auto_master_slave.status;
// buf2[c_buf].all = edrk.auto_master_slave.local.all;
// buf3[c_buf].all = edrk.auto_master_slave.remoute.all;
// buf4[c_buf].all = optical_read_data.data.cmd.all;
// buf5[c_buf].all = optical_write_data.data.cmd.all;
//
// ñáðîñèì ñ÷åò÷èê âðåìåíè ïåðåõîäà íà ìàñòåð
if (edrk.auto_master_slave.local.bits.try_master==0 ||
(edrk.auto_master_slave.prev_local.bits.try_master != edrk.auto_master_slave.local.bits.try_master && edrk.auto_master_slave.local.bits.try_master==1))
count_try_master = 0;
// åñëè øèíà OPTICAL_BUS ñäîõëà, âûõîäèì
if (edrk.errors.e7.bits.WRITE_OPTBUS==1 || edrk.errors.e7.bits.READ_OPTBUS==1 ||
edrk.warnings.e7.bits.WRITE_OPTBUS==1 || edrk.warnings.e7.bits.READ_OPTBUS==1)
{
if (edrk.errors.e7.bits.WRITE_OPTBUS==1 || edrk.errors.e7.bits.READ_OPTBUS==1)
{
// øèíà íå ðàáîòàåò, è òîò Ï× âêëþ÷åí
// çíà÷èò ÷òî-òî ñëó÷èëîñü - âûêëþ÷àåìñÿ
edrk.errors.e7.bits.AUTO_SET_MASTER |= 1;
edrk.auto_master_slave.remoute.bits.nothing = 1;
edrk.auto_master_slave.remoute.bits.master = 0;
edrk.auto_master_slave.remoute.bits.slave = 0;
edrk.auto_master_slave.remoute.bits.try_master = 0;
edrk.auto_master_slave.remoute.bits.try_slave = 0;
edrk.auto_master_slave.local.bits.master = 0;
edrk.auto_master_slave.local.bits.slave = 0;
edrk.auto_master_slave.local.bits.try_master = 0;
edrk.auto_master_slave.local.bits.try_slave = 0;
edrk.auto_master_slave.local.bits.nothing = 1;
edrk.auto_master_slave.status = 10;
}
else
{
// øèíà íå ðàáîòàåò, è òîò Ï× âûêëþ÷åí
// çíà÷èò ìû ñðàçó ìàñòåð
edrk.warnings.e7.bits.AUTO_SET_MASTER = 1;
edrk.auto_master_slave.remoute.bits.nothing = 1;
edrk.auto_master_slave.remoute.bits.master = 0;
edrk.auto_master_slave.remoute.bits.slave = 0;
edrk.auto_master_slave.remoute.bits.try_master = 0;
edrk.auto_master_slave.remoute.bits.try_slave = 0;
edrk.auto_master_slave.local.bits.master = 1;
edrk.auto_master_slave.local.bits.slave = 0;
edrk.auto_master_slave.local.bits.try_master = 0;
edrk.auto_master_slave.local.bits.try_slave = 0;
edrk.auto_master_slave.local.bits.nothing = 1;
edrk.auto_master_slave.status = 2;
}
edrk.auto_master_slave.remoute.bits.sync_line_detect = 0;
edrk.auto_master_slave.remoute.bits.bus_off = 1;
edrk.auto_master_slave.remoute.bits.sync1_2 = 0;
}
else
{
edrk.warnings.e7.bits.AUTO_SET_MASTER = 0;
edrk.auto_master_slave.remoute.bits.bus_off = 0;
// ñèíõðîíèçèðóåì ñâîè ïðîãðàììû ÷åðåç OPTICAL_BUS
if (wait_synhro_optical_bus()==1)
{
edrk.auto_master_slave.status = 50; // wait synhro
}
else
{
edrk.auto_master_slave.remoute.bits.master = optical_read_data.data.cmd.bit.master;
edrk.auto_master_slave.remoute.bits.slave = optical_read_data.data.cmd.bit.slave;
edrk.auto_master_slave.remoute.bits.try_master = optical_read_data.data.cmd.bit.maybe_master;
edrk.auto_master_slave.remoute.bits.sync1_2 = optical_read_data.data.cmd.bit.sync_1_2;
edrk.auto_master_slave.remoute.bits.sync_line_detect = optical_read_data.data.cmd.bit.sync_line_detect;
edrk.auto_master_slave.remoute.bits.tick = optical_read_data.data.cmd.bit.wdog_tick;
if (optical_read_data.data.cmd.bit.master==0 && optical_read_data.data.cmd.bit.slave==0)
edrk.auto_master_slave.remoute.bits.nothing = 1;
//////////////////////////////////////////////////
//////////////////////////////////////////////////
// 1
// òîò Ï× óæå ìàñòåð
if (edrk.auto_master_slave.remoute.bits.master)
{
// è ýòîò Ï× ìàñòåð ïî÷åìó-òî?
if (edrk.auto_master_slave.local.bits.master)
{
edrk.errors.e7.bits.AUTO_SET_MASTER |= 1;
edrk.auto_master_slave.status = 3;
}
else
{
// ýòîò Ï× åùå íå îïðåäåëèëñÿ, ïîýòîìó ïåðåõîä íà slave
if (edrk.auto_master_slave.local.bits.master==0 && edrk.auto_master_slave.local.bits.slave==0)
{
// edrk.auto_master_slave.local.bits.try_slave = 1;
// ñòàëè slave
edrk.auto_master_slave.local.bits.slave = 1;
// ñíÿëè ñâîé çàïðîñ íà ìàñòåðà åñëè îí áûë
edrk.auto_master_slave.local.bits.try_master = 0;
edrk.auto_master_slave.status = 4;
}
else
{
edrk.auto_master_slave.status = 21;
}
}
}
else
//////////////////////////////////////////////////
//////////////////////////////////////////////////
// 2
// òîò Ï× óæå slave
if (edrk.auto_master_slave.remoute.bits.slave)
{
// è ýòîò Ï× slave ïî÷åìó-òî?
if (edrk.auto_master_slave.local.bits.slave)
{
// áûë ïåðåõîä èç ìàñòåð â slave
if (edrk.auto_master_slave.prev_remoute.bits.slave==0)
{
if (edrk.Go)
{
// çàïóùåí ØÈÌ
edrk.errors.e7.bits.AUTO_SET_MASTER |= 1;
edrk.auto_master_slave.status = 5;
}
else
{
// ïðîáóåì ïåðåõâàòèòü master
edrk.auto_master_slave.local.bits.try_master = 1;
edrk.auto_master_slave.status = 6;
}
}
else
{
edrk.errors.e7.bits.AUTO_SET_MASTER |= 1;
edrk.auto_master_slave.status = 7;
}
}
else
{
// ýòîò Ï× åùå íå îïðåäåëèëñÿ, ïîýòîìó çàïðàøèâàåò íà master
if (edrk.auto_master_slave.local.bits.master==0 && edrk.auto_master_slave.local.bits.slave==0 && edrk.auto_master_slave.local.bits.try_master==0)
{
if (edrk.flag_second_PCH==0)
edrk.auto_master_slave.local.bits.try_master = 1;
if (edrk.flag_second_PCH==1)
edrk.auto_master_slave.local.bits.try_master = 1;
edrk.auto_master_slave.status = 8;
// edrk.auto_master_slave.local.bits.slave = 1;
}
else
// ýòîò Ï× óæå â çàïðîñå íà ìàñòåð, à òîò Ï× ïîäòâåðäèë â slave ÷òî îí íå ïðîòèâ.
if (edrk.auto_master_slave.local.bits.master==0 && edrk.auto_master_slave.local.bits.slave==0 && edrk.auto_master_slave.local.bits.try_master==1)
{
// ñòàëè ìàñòåðîì
edrk.auto_master_slave.local.bits.master = 1;
edrk.auto_master_slave.local.bits.try_master = 0;
edrk.auto_master_slave.status = 9;
// edrk.auto_master_slave.local.bits.slave = 1;
}
else
{
edrk.auto_master_slave.status = 22;
}
}
}
else
//////////////////////////////////////////////////
//////////////////////////////////////////////////
// 3
// òîò Ï× çàïðàøèâàåò ïåðåõîä íà ìàñòåð
if (edrk.auto_master_slave.remoute.bits.master==0
&& edrk.auto_master_slave.remoute.bits.slave==0
&& edrk.auto_master_slave.remoute.bits.try_master)
{
// à ýòîò Ï× slave
if (edrk.auto_master_slave.local.bits.slave)
{
// âðîäå íå íîðì, îñòàåìñÿ slave
// òóò íàäî ïîäîæäàòü íåêîòðîå âðåìÿ, ïîêà òîò Ï× íå ïîéìåò ÷òî ìû ñòàëè ñëåéâîì è ïåðåéäåò èç try_master â ìàñòåð
if (count_wait_slave_try_master<MAX_COUNT_WAIT_SLAVE_TRY_MASTER)
count_wait_slave_try_master++;
else
{
edrk.auto_master_slave.status = 10;
edrk.errors.e7.bits.AUTO_SET_MASTER |= 1;
}
}
else
// à ýòîò Ï× master
if (edrk.auto_master_slave.local.bits.master)
{
// òóò ìû äîëæíû ïðèíÿòü ðåøåíèå îòäàâàòü ëè ñâîé ìàñòåð äðóãîìó Ï×?
// ïîêà âûñòàâèì îøèáêó
edrk.errors.e7.bits.AUTO_SET_MASTER |= 1;
edrk.auto_master_slave.status = 11;
}
else
// ýòîò Ï× íå ìàñòåð è íå ñëåéâ è íåò çàïðîñîâ îò íåãî íà ìàñòåð
if (edrk.auto_master_slave.local.bits.master==0 && edrk.auto_master_slave.local.bits.slave==0 && edrk.auto_master_slave.local.bits.try_master==0)
{
// ñòàíîâèìñÿ slave
edrk.auto_master_slave.local.bits.slave = 1;
edrk.auto_master_slave.status = 12;
count_wait_slave_try_master = 0; // îáíóëèì ñ÷åò÷èê, ò.ê. íàñ íàäî ÷òîá òîò Ï× ïîíÿë ÷òî ìû ñòàëè slave
}
else
// ýòîò Ï× íå ìàñòåð è íå ñëåéâ è åñòü çàïðîñ îò íåãî íà ìàñòåð, ò.å. îáà Ï× õîòÿò áûòü ìàñòåðàìè
if (edrk.auto_master_slave.local.bits.master==0 && edrk.auto_master_slave.local.bits.slave==0 && edrk.auto_master_slave.local.bits.try_master==1)
{
// ñòàíîâèìñÿ master ÷åðåç íåêîòîðîå âðåìÿ (äëÿ êàæäîãî Ï× âðåìÿ ðàçíîå)
if (edrk.flag_second_PCH==0)
{
//îáà õîòÿò, íî ïðèîòðèòåò äàåì âñåãäà ïåðâîìó
edrk.auto_master_slave.local.bits.master = 1;
edrk.auto_master_slave.local.bits.try_master = 0;
// if (count_try_master<MAX_COUNT_TRY_MASTER_BS1)
// count_try_master++;
// else
// edrk.auto_master_slave.local.bits.master = 1;
}
if (edrk.flag_second_PCH==1)
{
//îáà õîòÿò, íî ïðèîòðèòåò äàåì âñåãäà ïåðâîìó
edrk.auto_master_slave.local.bits.slave = 1;
edrk.auto_master_slave.local.bits.try_master = 0;
// if (count_try_master<MAX_COUNT_TRY_MASTER_BS2)
// count_try_master++;
// else
// edrk.auto_master_slave.local.bits.master = 1;
}
edrk.auto_master_slave.status = 13;
}
else
{
edrk.errors.e7.bits.AUTO_SET_MASTER |= 1;
edrk.auto_master_slave.status = 100;
}
}
else
//////////////////////////////////////////////////
//////////////////////////////////////////////////
// 4
// ýòîò Ï× çàïðàøèâàåò ïåðåõîä íà ìàñòåð
if (edrk.auto_master_slave.local.bits.master==0
&& edrk.auto_master_slave.local.bits.slave==0
&& edrk.auto_master_slave.local.bits.try_master)
{
// ñòàíîâèìñÿ master ÷åðåç íåêîòîðîå âðåìÿ (äëÿ êàæäîãî Ï× âðåìÿ ðàçíîå)
if (edrk.flag_second_PCH==0)
{
if (count_try_master<MAX_COUNT_TRY_MASTER_BS1)
{
count_try_master++;
edrk.auto_master_slave.status = 14;
}
else
{
edrk.auto_master_slave.local.bits.master = 1;
edrk.auto_master_slave.local.bits.try_master = 0;
edrk.auto_master_slave.status = 15;
}
}
if (edrk.flag_second_PCH==1)
{
if (count_try_master<MAX_COUNT_TRY_MASTER_BS2)
{
count_try_master++;
edrk.auto_master_slave.status = 14;
}
else
{
edrk.auto_master_slave.local.bits.master = 1;
edrk.auto_master_slave.local.bits.try_master = 0;
edrk.auto_master_slave.status = 15;
}
}
}
else
//////////////////////////////////////////////////
//////////////////////////////////////////////////
// 5
// òîò Ï× íè÷åãî íå äåëàåò
if (edrk.auto_master_slave.remoute.bits.master==0 && edrk.auto_master_slave.remoute.bits.slave==0 && edrk.auto_master_slave.remoute.bits.try_master==0)
{
// à ýòîò Ï× slave
if (edrk.auto_master_slave.local.bits.slave)
{
// áûëè â ñëåéâå, à òîò Ï× ïî÷åìó-òî ïîòåðÿë ðåæèì - îøèáêà èëè ïîïûòêà çàõâàòà ìàñòåðà!
if (edrk.auto_master_slave.prev_remoute.bits.master)
{
if (edrk.Go) // ïðè ØÈÌå âûðóáàåìñÿ.
{
edrk.errors.e7.bits.AUTO_SET_MASTER |= 1;
edrk.auto_master_slave.status = 24;
}
else
{
// à òóò âñå îê.
edrk.auto_master_slave.local.bits.slave = 0;
edrk.auto_master_slave.local.bits.master = 1;
edrk.auto_master_slave.status = 23;
}
}
else
{
edrk.errors.e7.bits.AUTO_SET_MASTER |= 1;
edrk.auto_master_slave.status = 16;
}
}
else
// à ýòîò Ï× master
if (edrk.auto_master_slave.local.bits.master)
{
// òóò ìû îñòåìñÿ ìàñòåðîì âðîäå?
// íî òîò Ï× íå ïîäòâåðäèë ïåðåõîä, îí äîëæåí ñòàòü ìàñòåðîì èëè ñëåéâîì
err_confirm_mode = 0;
// filter_err_count(&count_wait_answer_confirm_mode,
// MAX_COUNT_WAIT_ANSWER_CONFIRM_MODE,
// 1,
// 0);
if (err_confirm_mode)
{
// ìû ìàñòåð, íî òîò Ï× òàê è íå ïîíÿë ýòî
edrk.errors.e7.bits.AUTO_SET_MASTER |= 1;
edrk.auto_master_slave.status = 20;
}
else
edrk.auto_master_slave.status = 17;
}
else
{
// òóò ïûòàåìñÿ çàõâàòèòü ìàñòåð
if (edrk.flag_second_PCH==0)
edrk.auto_master_slave.local.bits.try_master = 1;
if (edrk.flag_second_PCH==1)
edrk.auto_master_slave.local.bits.try_master = 1;
edrk.auto_master_slave.status = 18;
}
}
else
//////////////////////////////////////////////////
//////////////////////////////////////////////////
// 5
//
{
// ÷òî-òî ïîøëî íå òàê
edrk.errors.e7.bits.AUTO_SET_MASTER |= 1;
edrk.auto_master_slave.status = 19;
}
//////////////////////////////////////////////////
//////////////////////////////////////////////////
// 6
//
//////////////////////////////////////////////////
//////////////////////////////////////////////////
// 7
//
//////////////////////////////////////////////////
//////////////////////////////////////////////////
// 8
//
}
}
// optical_write_data.cmd.bit. = edrk.auto_master_slave.local.bits.slave;
edrk.to_second_pch.bits.MASTER = edrk.auto_master_slave.local.bits.master;
edrk.auto_master_slave.prev_remoute.all = edrk.auto_master_slave.remoute.all;
edrk.auto_master_slave.prev_local.all = edrk.auto_master_slave.local.all;
}
//////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////
void clear_errors_master_slave(void)
{
// if (edrk.errors.e7.bits.AUTO_SET_MASTER)
{
// if (edrk.errors.e7.bits.MASTER_SLAVE_SYNC
// || edrk.errors.e1.bits.NO_INPUT_SYNC_SIGNAL)
// edrk.ms.count_time_wait_ready1 = 0;
edrk.ms.count_time_wait_ready2 = 0;
edrk.ms.errors_count.alive_can_to_another_bs = 0;
edrk.ms.errors_count.alive_opt_bus_read = 0;
edrk.ms.errors_count.alive_opt_bus_write = 0;
edrk.ms.errors_count.alive_sync_line = 0;
edrk.ms.errors_count.alive_sync_line_local = 0;
edrk.ms.errors_count.another_rascepitel = 0;
edrk.ms.errors_count.fast_optical_alarm = 0;
edrk.ms.errors_count.input_alarm_another_bs = 0;
edrk.ms.errors_count.input_master_slave = 0;
edrk.ms.err_lock_signals.alive_can_to_another_bs = 0;
edrk.ms.err_lock_signals.alive_opt_bus_read = 0;
edrk.ms.err_lock_signals.alive_opt_bus_write = 0;
edrk.ms.err_lock_signals.alive_sync_line = 0;
edrk.ms.err_lock_signals.alive_sync_line_local = 0;
edrk.ms.err_lock_signals.another_rascepitel = 0;
edrk.ms.err_lock_signals.fast_optical_alarm = 0;
edrk.ms.err_lock_signals.input_alarm_another_bs = 0;
edrk.ms.err_lock_signals.input_master_slave = 0;
}
}
//////////////////////////////////////////////////////////

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/*
* master_slave.h
*
* Created on: 30 íîÿá. 2020 ã.
* Author: stud
*/
#ifndef SRC_MASTER_SLAVE_H_
#define SRC_MASTER_SLAVE_H_
enum
{
MODE_DONTKNOW = 1,
MODE_MASTER,
MODE_SLAVE
};
//////////////////////////////////////////////////////////
#define MAX_COUNT_TRY_MASTER_BS1 200//40 //15 //5
#define MAX_COUNT_TRY_MASTER_BS2 100//40 //15 //40 //20
#define MAX_COUNT_WAIT_ANSWER_CONFIRM_MODE 20
#define MAX_COUNT_WAIT_SLAVE_TRY_MASTER 100
#define SIZE_LOG_MASTER_SLAVE_STATUS 50
void auto_select_master_slave(void);
void clear_errors_master_slave(void);
#endif /* SRC_MASTER_SLAVE_H_ */

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#include "IQmathLib.h"
#include "DSP281x_Device.h"
#include <adc_tools.h>
#include <alg_simple_scalar.h>
#include <edrk_main.h>
#include <math.h>
#include <mathlib.h>
#include <message2.h>
#include <optical_bus.h>
#include <params.h>
#include <params_norma.h>
#include <sync_tools.h>
#include <v_rotor.h>
#include <vector.h>
#include "control_station.h"
#include "global_time.h"
#include "vector_control.h"
#include "x_basic_types.h"
#include "xp_cds_in.h"
#include "xp_hwp.h"
#include "xp_project.h"
#include "modbus_table_v2.h"
#include "filter_v1.h"
#include "v_rotor_22220.h"
#include "log_params.h"
#include "break_regul.h"
#include "logs_hmi.h"
#include "CAN_Setup.h"
#include "params_temper_p.h"
void func_unpack_answer_from_TMS_RS232(CMD_TO_TMS_STRUCT *pcommand)
{
// Êîíòðîëüíày ñóììà
unsigned int DataOut;
int Data, Data1, Data2, DataAnalog1, DataAnalog2, DataAnalog3, DataAnalog4, i;
unsigned int h;
volatile unsigned char *pByte;
// static int vs11,vs12,vs1;
// static int DataCnt=0;
// int GoT,Assemble_scheme;
// static int prev_temp_Rele1=0, temp_Rele1=0, prev_temp_Rele2=0, temp_Rele2=0;
static int flag_prev_turn_on = 0;
static int flag_prev_turn_off = 0;
static int prev_byte01_bit4 = 0;
static int prev_byte01_bit1 = 0;
static int flag_wait_revers_sbor = 1;
static int flag_wait_revers_go = 1;
static unsigned int count_transmited = 0;
// Ðàçáèðàåì ïîëy êîìàíäû
// Âñå ýòî íàäî ïèõíóòü ñåáå
if ((sizeof(CMD_TO_TMS_STRUCT)-5)>CONTROL_STATION_MAX_RAW_DATA)
xerror(main_er_ID(2),(void *)0);
// ïåðåïàêóåì èç áàéòîâ â ñëîâà, ò.ê. â RS232 äàííûå èäóò áàéòàìè
pByte = (unsigned char *)(pcommand);//->analog_data.analog1_lo;
pByte++;
pByte++;
for (h=0;h<sizeof(TMS_TO_TERMINAL_STRUCT)-5;h++)
{
if (h%2)
{
control_station.raw_array_data[CONTROL_STATION_TERMINAL_RS232][h>>1].all |= ( (*pByte) << 8) & 0xff00;
}
else
control_station.raw_array_data[CONTROL_STATION_TERMINAL_RS232][h>>1].all = ( (*pByte) ) & 0x00ff;
pByte++;
}
}
void func_pack_answer_to_TMS(TMS_TO_TERMINAL_STRUCT *reply_a)
{
// Êîíòðîëüíày ñóììà
unsigned int DataOut;
int Data1, Data2, DataAnalog1, DataAnalog2, DataAnalog3, DataAnalog4, i;
float Data;
unsigned char *pByte;
// static int vs11,vs12,vs1;
// static int DataCnt=0;
// int GoT,Assemble_scheme;
// static int prev_temp_Rele1=0, temp_Rele1=0, prev_temp_Rele2=0, temp_Rele2=0;
static int flag_prev_turn_on = 0;
static int flag_prev_turn_off = 0;
static int prev_byte01_bit4 = 0;
static int prev_byte01_bit1 = 0;
static int flag_wait_revers_sbor = 1;
static int flag_wait_revers_go = 1;
static unsigned int count_transmited = 0;
/* const óêàçàòåëü íà ñòðóêòóðó ñòàíäàðòíîé êîìàíäû
íàñòðîèëè íà áóôåð ïðèåìà */
// edrk.data_to_message2[1] = _IQtoF(filter.iqU_1_long)*NORMA_ACP;
// edrk.data_to_message2[2] = _IQtoF(filter.iqU_2_long)*NORMA_ACP;
//For instance
//reply->digit_data.byte01.byte_data = 0x43;
//1
Data = _IQtoF(filter.iqU_1_long)*NORMA_ACP;
reply_a->analog_data.analog1_lo = LOBYTE(Data);
reply_a->analog_data.analog1_hi = HIBYTE(Data);
//2
Data = _IQtoF(filter.iqU_2_long)*NORMA_ACP;//(project.adc[0].read.pbus.adc_value[1] - 2330)/4096*3.0/62.2*1000.0;
reply_a->analog_data.analog2_lo = LOBYTE(Data);
reply_a->analog_data.analog2_hi = HIBYTE(Data);
//3
Data = _IQtoF(filter.iqUin_m1)*NORMA_ACP;//(project.adc[0].read.pbus.adc_value[2] - 2330)/4096*3.0/62.2*1000.0;
reply_a->analog_data.analog3_lo = LOBYTE(Data);
reply_a->analog_data.analog3_hi = HIBYTE(Data);
//4
// Data = edrk.Status_Sbor;//_IQtoF(filter.iqUin_m2)*NORMA_ACP;//(project.adc[0].read.pbus.adc_value[3] - 2330)/4096*3.0/62.2*1000.0;
Data = _IQtoF(filter.iqUin_m2)*NORMA_ACP;//(project.adc[0].read.pbus.adc_value[3] - 2330)/4096*3.0/62.2*1000.0;
// Data = (_IQtoF((filter.Power) * 9000.0)); //Ìîùíîñòü äâèãàòåëÿ òåêóùàÿ êÂò
reply_a->analog_data.analog4_lo = LOBYTE(Data);
reply_a->analog_data.analog4_hi = HIBYTE(Data);
//5
Data = edrk.power_kw; //Ìîùíîñòü äâèãàòåëÿ òåêóùàÿ êÂò
// Data = (_IQtoF((analog.Power) * 9000.0)); //Ìîùíîñòü äâèãàòåëÿ òåêóùàÿ êÂò
//_IQtoF(analog.iqIin_1)*NORMA_ACP;//project.adc[0].read.pbus.adc_value[0];
reply_a->analog_data.analog5_lo = LOBYTE(Data);
reply_a->analog_data.analog5_hi = HIBYTE(Data);
Data = _IQtoF(analog.iqIin_sum)*NORMA_ACP;//project.adc[0].read.pbus.adc_value[1];
reply_a->analog_data.analog6_lo = LOBYTE(Data);
reply_a->analog_data.analog6_hi = HIBYTE(Data);
Data = _IQtoF(filter.iqIm_1)*NORMA_ACP;//project.adc[0].read.pbus.adc_value[2];
reply_a->analog_data.analog7_lo = LOBYTE(Data);
reply_a->analog_data.analog7_hi = HIBYTE(Data);
Data = _IQtoF(filter.iqIm_2)*NORMA_ACP;//project.adc[0].read.pbus.adc_value[3];
reply_a->analog_data.analog8_lo = LOBYTE(Data);
reply_a->analog_data.analog8_hi = HIBYTE(Data);
Data = (int)(edrk.temper_edrk.max_real_int_temper_u);
reply_a->analog_data.analog9_lo = LOBYTE(Data);
reply_a->analog_data.analog9_hi = HIBYTE(Data);
Data = (int) (edrk.temper_edrk.max_real_int_temper_water);
reply_a->analog_data.analog10_lo = LOBYTE(Data);
reply_a->analog_data.analog10_hi = HIBYTE(Data);
Data = (int) (edrk.p_water_edrk.filter_real_int_p_water[0]);
reply_a->analog_data.analog11_lo = LOBYTE(Data);
reply_a->analog_data.analog11_hi = HIBYTE(Data);
Data = (int) (edrk.temper_edrk.max_real_int_temper_air);//_IQtoF(edrk.f_stator)*F_STATOR_MAX;//
reply_a->analog_data.analog12_lo = LOBYTE(Data);
reply_a->analog_data.analog12_hi = HIBYTE(Data);
Data = fast_round(_IQtoF(edrk.zadanie.iq_ZadanieU_Charge_rmp)*NORMA_ACP);//edrk.I_zad_vozbud;//
reply_a->analog_data.analog13_lo = LOBYTE(Data);
reply_a->analog_data.analog13_hi = HIBYTE(Data);
Data = edrk.zadanie.oborots_zad;//edrk.I_zad_vozbud_exp;//
reply_a->analog_data.analog14_lo = LOBYTE(Data);
reply_a->analog_data.analog14_hi = HIBYTE(Data);
Data = edrk.zadanie.power_zad;//edrk.I_cur_vozbud;//
reply_a->analog_data.analog15_lo = LOBYTE(Data);
reply_a->analog_data.analog15_hi = HIBYTE(Data);
Data = edrk.zadanie.Izad;//edrk.I_cur_vozbud_exp;//
reply_a->analog_data.analog16_lo = LOBYTE(Data);
reply_a->analog_data.analog16_hi = HIBYTE(Data);
Data = fast_round(_IQtoF(edrk.Kplus)*1000.0);//edrk.W_zad_mA;//
reply_a->analog_data.analog17_lo = LOBYTE(Data);
reply_a->analog_data.analog17_hi = HIBYTE(Data);
Data = fast_round(edrk.freq_50hz_1/10.0);//edrk.Zadanie2VozbudING;//
reply_a->analog_data.analog18_lo = LOBYTE(Data);
reply_a->analog_data.analog18_hi = HIBYTE(Data);
Data =fast_round(_IQtoF(edrk.f_stator)*NORMA_FROTOR*100.0);// 0;//edrk.Zadanie2VozbudMY;//
reply_a->analog_data.analog19_lo = LOBYTE(Data);
reply_a->analog_data.analog19_hi = HIBYTE(Data);
Data = fast_round(_IQtoF(edrk.k_stator1)*10000.0);// edrk.W_from_all;
reply_a->analog_data.analog20_lo = LOBYTE(Data);
reply_a->analog_data.analog20_hi = HIBYTE(Data);
Data = _IQtoF(vect_control.iqId1)*NORMA_ACP;//0;//_IQtoF(edrk.test_rms_Iu)*NORMA_ACP; //fast_round(_IQtoF(WRotor.iqWRotorImpulses1)*NORMA_FROTOR*1000.0);// edrk.W_from_DISPLAY;
reply_a->analog_data.analog21_lo = LOBYTE(Data);
reply_a->analog_data.analog21_hi = HIBYTE(Data);
Data = _IQtoF(vect_control.iqIq1)*NORMA_ACP;// 0;//_IQtoF(edrk.test_rms_Ua)*NORMA_ACP;// fast_round(_IQtoF(WRotor.iqWRotorImpulses2)*NORMA_FROTOR*1000.0);//600.0*1000000000.0/WRotor.iqWRotorImpulses1;//edrk.W_from_SVU;
reply_a->analog_data.analog22_lo = LOBYTE(Data);
reply_a->analog_data.analog22_hi = HIBYTE(Data);
//Data = fast_round(_IQtoF(WRotor.iqWRotorSumFilter3)*NORMA_FROTOR*100.0*60.0);//edrk.oborots;//fast_round(_IQtoF(WRotorPBus.iqAngle1F)*360.0);//600.0*1000000000.0/WRotor.iqWRotorImpulses2;//edrk.W_from_ZADAT4IK;
Data = _IQtoF(WRotor.iqWRotorSumFilter) * NORMA_FROTOR*600.0;//edrk.oborots;
reply_a->analog_data.analog23_lo = LOBYTE(Data);
reply_a->analog_data.analog23_hi = HIBYTE(Data);
Data = fast_round(edrk.f_rotor_hz*100.0);//fast_round(_IQtoF(WRotorPBus.iqAngle2F)*360.0);//;
reply_a->analog_data.analog24_lo = LOBYTE(Data);
reply_a->analog_data.analog24_hi = HIBYTE(Data);
//Data = _IQtoF(edrk.k_stator1)*10000;//;
Data = edrk.period_calc_pwm_int2;//fast_round(_IQtoF(rotor_22220.iqFdirty)*NORMA_FROTOR*1000.0);
reply_a->analog_data.analog25_lo = LOBYTE(Data);
reply_a->analog_data.analog25_hi = HIBYTE(Data);
Data = edrk.power_kw_full; //Ìîùíîñòü äâèãàòåëÿ òåêóùàÿ êÂò
//fast_round(_IQtoF(WRotor.iqWRotorCalcBeforeRegul2)*NORMA_FROTOR*1000.0);
reply_a->analog_data.analog26_lo = LOBYTE(Data);
reply_a->analog_data.analog26_hi = HIBYTE(Data);
Data = edrk.Sbor_Mode;//fast_round(_IQtoF(WRotorPBus.iqWRotorCalcBeforeRegul1)*NORMA_FROTOR*1000.0);//edrk.count_lost_interrupt;
reply_a->analog_data.analog27_lo = LOBYTE(Data);
reply_a->analog_data.analog27_hi = HIBYTE(Data);
Data = edrk.Stage_Sbor;// fast_round(_IQtoF(WRotorPBus.iqWRotorCalcBeforeRegul2)*NORMA_FROTOR*1000.0);;
reply_a->analog_data.analog28_lo = LOBYTE(Data);
reply_a->analog_data.analog28_hi = HIBYTE(Data);
Data = fast_round(_IQtoF(edrk.Izad_out)*NORMA_ACP);//edrk.I_zad_vozbud;//;
reply_a->analog_data.analog29_lo = LOBYTE(Data);
reply_a->analog_data.analog29_hi = HIBYTE(Data);
Data = edrk.period_calc_pwm_int1;
reply_a->analog_data.analog30_lo = LOBYTE(Data);
reply_a->analog_data.analog30_hi = HIBYTE(Data);
Data = (int)edrk.temper_acdrive.winding.max_real_int_temper;
reply_a->analog_data.analog31_lo = LOBYTE(Data);
reply_a->analog_data.analog31_hi = HIBYTE(Data);
Data = (int)edrk.temper_acdrive.bear.max_real_int_temper;
reply_a->analog_data.analog32_lo = LOBYTE(Data);
reply_a->analog_data.analog32_hi = HIBYTE(Data);
Data = (int)(edrk.temper_edrk.real_int_temper_u[0]);
reply_a->analog_data.analog33_lo = LOBYTE(Data);
reply_a->analog_data.analog33_hi = HIBYTE(Data);
Data = (int)(edrk.temper_edrk.real_int_temper_u[1]);
reply_a->analog_data.analog34_lo = LOBYTE(Data);
reply_a->analog_data.analog34_hi = HIBYTE(Data);
Data = (int)(edrk.temper_edrk.real_int_temper_u[2]);
reply_a->analog_data.analog35_lo = LOBYTE(Data);
reply_a->analog_data.analog35_hi = HIBYTE(Data);
Data = (int)(edrk.temper_edrk.real_int_temper_u[3]);
reply_a->analog_data.analog36_lo = LOBYTE(Data);
reply_a->analog_data.analog36_hi = HIBYTE(Data);
Data = (int)(edrk.temper_edrk.real_int_temper_u[4]);
reply_a->analog_data.analog37_lo = LOBYTE(Data);
reply_a->analog_data.analog37_hi = HIBYTE(Data);
Data = (int)(edrk.temper_edrk.real_int_temper_u[5]);
reply_a->analog_data.analog38_lo = LOBYTE(Data);
reply_a->analog_data.analog38_hi = HIBYTE(Data);
Data = (int)(edrk.temper_edrk.real_int_temper_u[6]);
reply_a->analog_data.analog39_lo = LOBYTE(Data);
reply_a->analog_data.analog39_hi = HIBYTE(Data);
Data = (int)(edrk.temper_edrk.real_int_temper_air[0]);
reply_a->analog_data.analog40_lo = LOBYTE(Data);
reply_a->analog_data.analog40_hi = HIBYTE(Data);
Data = (int)(edrk.temper_edrk.real_int_temper_air[1]);
reply_a->analog_data.analog41_lo = LOBYTE(Data);
reply_a->analog_data.analog41_hi = HIBYTE(Data);
Data = (int)(edrk.temper_edrk.real_int_temper_air[2]);
reply_a->analog_data.analog42_lo = LOBYTE(Data);
reply_a->analog_data.analog42_hi = HIBYTE(Data);
Data = (int)(edrk.temper_edrk.real_int_temper_air[3]);
reply_a->analog_data.analog43_lo = LOBYTE(Data);
reply_a->analog_data.analog43_hi = HIBYTE(Data);
Data = (int)(edrk.temper_edrk.real_int_temper_water[0]); // external
reply_a->analog_data.analog44_lo = LOBYTE(Data);
reply_a->analog_data.analog44_hi = HIBYTE(Data);
Data = (int)(edrk.temper_edrk.real_int_temper_water[1]); // internal
reply_a->analog_data.analog45_lo = LOBYTE(Data);
reply_a->analog_data.analog45_hi = HIBYTE(Data);
Data = fast_round(_IQtoF(simple_scalar1.pidF.OutMax)*NORMA_ACP);//edrk.auto_master_slave.prev_status;//fast_round(_IQtoF(edrk.zadanie.iq_ZadanieU_Charge_rmp)*NORMA_ACP);
reply_a->analog_data.analog46_lo = LOBYTE(Data);
reply_a->analog_data.analog46_hi = HIBYTE(Data);
Data = fast_round(_IQtoF(edrk.zadanie.iq_Izad_rmp)*NORMA_ACP);
reply_a->analog_data.analog47_lo = LOBYTE(Data);
reply_a->analog_data.analog47_hi = HIBYTE(Data);
Data = fast_round(_IQtoF(edrk.zadanie.iq_fzad_rmp)*NORMA_FROTOR*100.0);
reply_a->analog_data.analog48_lo = LOBYTE(Data);
reply_a->analog_data.analog48_hi = HIBYTE(Data);
Data = fast_round(_IQtoF(edrk.zadanie.iq_kzad_rmp)*10000.0);
reply_a->analog_data.analog49_lo = LOBYTE(Data);
reply_a->analog_data.analog49_hi = HIBYTE(Data);
Data = fast_round(_IQtoF(edrk.zadanie.iq_oborots_zad_hz_rmp)*NORMA_FROTOR*60.0);
reply_a->analog_data.analog50_lo = LOBYTE(Data);
reply_a->analog_data.analog50_hi = HIBYTE(Data);
Data = fast_round(_IQtoF(edrk.zadanie.iq_power_zad_rmp)*NORMA_ACP*NORMA_ACP/1000.0);
reply_a->analog_data.analog51_lo = LOBYTE(Data);
reply_a->analog_data.analog51_hi = HIBYTE(Data);
Data = _IQtoF(vect_control.iqId2)*NORMA_ACP;//0;//fast_round( _IQtoF(edrk.zadanie.iq_k_u_disbalance_rmp)*100.0);
reply_a->analog_data.analog52_lo = LOBYTE(Data);
reply_a->analog_data.analog52_hi = HIBYTE(Data);
Data = fast_round(_IQtoF(edrk.zadanie.iq_limit_power_zad_rmp)*NORMA_ACP*NORMA_ACP/1000.0);
reply_a->analog_data.analog53_lo = LOBYTE(Data);
reply_a->analog_data.analog53_hi = HIBYTE(Data);
if (edrk.Mode_ScalarVectorUFConst == ALG_MODE_FOC_OBOROTS || edrk.Mode_ScalarVectorUFConst == ALG_MODE_FOC_POWER) {
Data = fast_round(_IQtoF(turns.pidFvect.Out)*NORMA_ACP);
reply_a->analog_data.analog54_lo = LOBYTE(Data);
reply_a->analog_data.analog54_hi = HIBYTE(Data);
Data = fast_round(_IQtoF(turns.pidFvect.OutMax)*NORMA_ACP);
reply_a->analog_data.analog55_lo = LOBYTE(Data);
reply_a->analog_data.analog55_hi = HIBYTE(Data);
Data =fast_round(_IQtoF(power.pidP.Out)*NORMA_ACP);
reply_a->analog_data.analog56_lo = LOBYTE(Data);
reply_a->analog_data.analog56_hi = HIBYTE(Data);
Data = fast_round(_IQtoF(power.pidP.OutMax)*NORMA_ACP);
} else {
Data = fast_round(_IQtoF(simple_scalar1.pidF.Out)*NORMA_ACP);
reply_a->analog_data.analog54_lo = LOBYTE(Data);
reply_a->analog_data.analog54_hi = HIBYTE(Data);
Data = fast_round(_IQtoF(simple_scalar1.pidF.OutMin)*NORMA_ACP);
reply_a->analog_data.analog55_lo = LOBYTE(Data);
reply_a->analog_data.analog55_hi = HIBYTE(Data);
Data =fast_round(_IQtoF(simple_scalar1.pidPower.Out)*NORMA_ACP);
reply_a->analog_data.analog56_lo = LOBYTE(Data);
reply_a->analog_data.analog56_hi = HIBYTE(Data);
Data = fast_round(_IQtoF(simple_scalar1.pidPower.OutMax)*NORMA_ACP);
}
reply_a->analog_data.analog57_lo = LOBYTE(Data);
reply_a->analog_data.analog57_hi = HIBYTE(Data);
Data = fast_round(_IQtoF(simple_scalar1.Izad)*NORMA_ACP);
reply_a->analog_data.analog58_lo = LOBYTE(Data);
reply_a->analog_data.analog58_hi = HIBYTE(Data);
Data = fast_round(_IQtoF(edrk.master_Iq)*NORMA_ACP);
reply_a->analog_data.analog59_lo = LOBYTE(Data);
reply_a->analog_data.analog59_hi = HIBYTE(Data);
Data = fast_round(_IQtoF(simple_scalar1.mzz_zad_in2)*NORMA_ACP);//count_transmited++;
reply_a->analog_data.analog60_lo = LOBYTE(Data);
reply_a->analog_data.analog60_hi = HIBYTE(Data);
//
Data = modbus_table_can_in[123].all;//Óïðàâëåíèå (Ïî ìîùíîñòè, Ïî îáîðîòàì)
reply_a->analog_data.analog61_lo = LOBYTE(Data);
reply_a->analog_data.analog61_hi = HIBYTE(Data);
Data = modbus_table_can_in[124].all;//Îáîðîòû (çàäàííûå)
reply_a->analog_data.analog62_lo = LOBYTE(Data);
reply_a->analog_data.analog62_hi = HIBYTE(Data);
Data = modbus_table_can_in[125].all;//Ìîùíîñòü (çàäàííàÿ)
reply_a->analog_data.analog63_lo = LOBYTE(Data);
reply_a->analog_data.analog63_hi = HIBYTE(Data);
Data = modbus_table_can_in[134].all;//çàïàñ ìîùíîñòè
reply_a->analog_data.analog64_lo = LOBYTE(Data);
reply_a->analog_data.analog64_hi = HIBYTE(Data);
Data = fast_round(_IQtoF(simple_scalar1.pidPower.SatErr)*NORMA_ACP);//project.cds_tk[3].optical_data_in.local_count_error;
reply_a->analog_data.analog65_lo = LOBYTE(Data);
reply_a->analog_data.analog65_hi = HIBYTE(Data);
Data = fast_round(_IQtoF(simple_scalar1.pidPower.Fdb)*NORMA_ACP*NORMA_ACP/1000.0);//project.cds_tk[3].optical_data_out.local_count_error;
reply_a->analog_data.analog66_lo = LOBYTE(Data);
reply_a->analog_data.analog66_hi = HIBYTE(Data);
Data = fast_round(_IQtoF(simple_scalar1.pidPower.Ref)*NORMA_ACP*NORMA_ACP/1000.0);//////optical_read_data.count_error_wdog;
reply_a->analog_data.analog67_lo = LOBYTE(Data);
reply_a->analog_data.analog67_hi = HIBYTE(Data);
Data = fast_round(_IQtoF(simple_scalar1.pidPower.Up)*NORMA_ACP);//edrk.auto_master_slave.status;//fast_round(_IQtoF(edrk.zadanie.iq_kplus_u_disbalance_rmp)*1000.0);
reply_a->analog_data.analog68_lo = LOBYTE(Data);
reply_a->analog_data.analog68_hi = HIBYTE(Data);
Data = fast_round(_IQtoF(pll1.vars.pll_Uq)*NORMA_ACP);
reply_a->analog_data.analog69_lo = LOBYTE(Data);
reply_a->analog_data.analog69_hi = HIBYTE(Data);
Data = fast_round(_IQtoF(pll1.vars.pll_Ud)*NORMA_ACP);
reply_a->analog_data.analog70_lo = LOBYTE(Data);
reply_a->analog_data.analog70_hi = HIBYTE(Data);
Data = fast_round(_IQtoF(simple_scalar1.bpsi_curent)*NORMA_FROTOR*1000.0);
reply_a->analog_data.analog71_lo = LOBYTE(Data);
reply_a->analog_data.analog71_hi = HIBYTE(Data);
Data = fast_round(_IQtoF(WRotor.iqWRotorSumFilter2)*NORMA_FROTOR*1000.0); //iqFlong
reply_a->analog_data.analog72_lo = LOBYTE(Data);
reply_a->analog_data.analog72_hi = HIBYTE(Data);
//Data = fast_round(_IQtoF(WRotor.iqWRotorCalc1)*NORMA_FROTOR*1000.0);
Data = fast_round(_IQtoF(edrk.from_uom.iq_level_value_kwt)*NORMA_ACP*NORMA_ACP/1000.0);// ;//edrk.from_uom.level_value;//fast_round(_IQtoF(rotor_22220.iqFdirty)*NORMA_FROTOR*1000.0);
reply_a->analog_data.analog73_lo = LOBYTE(Data);
reply_a->analog_data.analog73_hi = HIBYTE(Data);
//Data = fast_round(_IQtoF(WRotor.iqWRotorCalc2)*NORMA_FROTOR*1000.0);
Data = _IQtoF(vect_control.iqIq2)*NORMA_ACP;//0;//fast_round(_IQtoF(rotor_22220.iqF)*NORMA_FROTOR*1000.0);
reply_a->analog_data.analog74_lo = LOBYTE(Data);
reply_a->analog_data.analog74_hi = HIBYTE(Data);
//Data = fast_round(_IQtoF(WRotor.iqWRotorImpulsesBeforeRegul1)*NORMA_FROTOR*1000.0);// edrk.W_from_DISPLAY;
Data = fast_round(_IQtoF(WRotor.iqWRotorSumFilter)*NORMA_FROTOR*1000.0);
reply_a->analog_data.analog75_lo = LOBYTE(Data);
reply_a->analog_data.analog75_hi = HIBYTE(Data);
//Data = fast_round(_IQtoF(WRotor.iqWRotorImpulsesBeforeRegul2)*NORMA_FROTOR*1000.0);//600.0*1000000000.0/WRotor.iqWRotorImpulses1;//edrk.W_from_SVU;
Data = fast_round(_IQtoF(simple_scalar1.mzz_zad_int)*NORMA_ACP);//;//0;//fast_round(_IQtoF(rotor_22220.iqFlong)*NORMA_FROTOR*1000.0);
reply_a->analog_data.analog76_lo = LOBYTE(Data);
reply_a->analog_data.analog76_hi = HIBYTE(Data);
//Data = fast_round(_IQtoF(WRotor.iqWRotorImpulses1)*NORMA_FROTOR*1000.0);// edrk.W_from_DISPLAY;
Data = _IQtoF(simple_scalar1.Izad)*NORMA_ACP_RMS;// 0;//fast_round(_IQtoF(WRotor.iqWRotorSumRamp)*NORMA_FROTOR*1000.0);
reply_a->analog_data.analog77_lo = LOBYTE(Data);
reply_a->analog_data.analog77_hi = HIBYTE(Data);
//Data = fast_round(_IQtoF(WRotor.iqWRotorImpulses2)*NORMA_FROTOR*1000.0);//600.0*1000000000.0/WRotor.iqWRotorImpulses1;//edrk.W_from_SVU;
Data = WRotor.RotorDirectionSlow;
reply_a->analog_data.analog78_lo = LOBYTE(Data);
reply_a->analog_data.analog78_hi = HIBYTE(Data);
Data = fast_round(_IQtoF(simple_scalar1.iqKoefOgran)*1000.0);//0;//fast_round(_IQtoF(WRotor.iqWRotorSum)*NORMA_FROTOR*1000.0);// edrk.W_from_DISPLAY;
reply_a->analog_data.analog79_lo = LOBYTE(Data);
reply_a->analog_data.analog79_hi = HIBYTE(Data);
Data = fast_round(_IQtoF(simple_scalar1.iqKoefOgranIzad)*1000.0);//0;//fast_round(_IQtoF(WRotor.iqWRotorSumFilter)*NORMA_FROTOR*1000.0);//600.0*1000000000.0/WRotor.iqWRotorImpulses1;//edrk.W_from_SVU;
reply_a->analog_data.analog80_lo = LOBYTE(Data);
reply_a->analog_data.analog80_hi = HIBYTE(Data);
Data = log_params.cur_volume_of_slow_log;//edrk.power_kw_full; //Ìîùíîñòü äâèãàòåëÿ òåêóùàÿ êÂò
// Data = (_IQtoF((analog.Power) * 9000.0)); //Ìîùíîñòü äâèãàòåëÿ òåêóùàÿ êÂò
//_IQtoF(analog.iqIin_1)*NORMA_ACP;//project.adc[0].read.pbus.adc_value[0];
reply_a->analog_data.analog81_lo = LOBYTE(Data);
reply_a->analog_data.analog81_hi = HIBYTE(Data);
Data = fast_round(_IQtoF(edrk.zadanie.iq_limit_power_zad)*NORMA_ACP*NORMA_ACP/1000.0);
reply_a->analog_data.analog82_lo = LOBYTE(Data);
reply_a->analog_data.analog82_hi = HIBYTE(Data);
Data = break_result_1;//fast_round(_IQtoF(WRotor.iqWRotorSumFilter3)*NORMA_FROTOR*1000.0);
reply_a->analog_data.analog83_lo = LOBYTE(Data);
reply_a->analog_data.analog83_hi = HIBYTE(Data);
Data = break_result_2;//WRotorPBus.RotorDirectionInstant;
reply_a->analog_data.analog84_lo = LOBYTE(Data);
reply_a->analog_data.analog84_hi = HIBYTE(Data);
Data = fast_round(_IQtoF(edrk.all_limit_koeffs.sum_limit)*1000.0);//WRotorPBus.RotorDirectionCount;
reply_a->analog_data.analog85_lo = LOBYTE(Data);
reply_a->analog_data.analog85_hi = HIBYTE(Data);
Data = fast_round(_IQtoF(edrk.all_limit_koeffs.uom_limit)*1000.0);//WRotorPBus.RotorDirectionSlow2;
reply_a->analog_data.analog86_lo = LOBYTE(Data);
reply_a->analog_data.analog86_hi = HIBYTE(Data);
Data = fast_round(_IQtoF(edrk.all_limit_koeffs.uin_freq_limit)*1000.0);//fast_round(_IQtoF(WRotor.iqWRotorSumRamp)*NORMA_FROTOR*1000.0);
reply_a->analog_data.analog87_lo = LOBYTE(Data);
reply_a->analog_data.analog87_hi = HIBYTE(Data);
Data = _IQtoF(simple_scalar1.Im_regul)*NORMA_ACP_RMS;//(edrk.cantec_reg & 0xff);//edrk.pult_data.TimeToChangePump_from_pult;//0;//fast_round(_IQtoF(WRotor.iqWRotorCalc1Ramp)*NORMA_FROTOR*1000.0);;//WRotor.iqWRotorCalc1Ramp
reply_a->analog_data.analog88_lo = LOBYTE(Data);
reply_a->analog_data.analog88_hi = HIBYTE(Data);
Data = fast_round(_IQtoF(simple_scalar1.pidPower.Ui)*NORMA_ACP);//(edrk.canrec_reg & 0xff);;//edrk.pult_data.nPCH_from_pult;//0;//fast_round(_IQtoF(WRotor.iqWRotorCalc2Ramp)*NORMA_FROTOR*1000.0);;
reply_a->analog_data.analog89_lo = LOBYTE(Data);
reply_a->analog_data.analog89_hi = HIBYTE(Data);
Data = fast_round(_IQtoF(simple_scalar1.pidF.Fdb)*NORMA_FROTOR*1000.0);//(((unsigned long)edrk.canes_reg>>16) & 0x01ff);
reply_a->analog_data.analog90_lo = LOBYTE(Data);
reply_a->analog_data.analog90_hi = HIBYTE(Data);
Data = fast_round(_IQtoF(simple_scalar1.pidF.Ref)*NORMA_FROTOR*1000.0);//(((unsigned long)edrk.canes_reg) & 0x3f);
reply_a->analog_data.analog91_lo = LOBYTE(Data);
reply_a->analog_data.analog91_hi = HIBYTE(Data);
Data = fast_round(_IQtoF(simple_scalar1.pidF.SatErr)*NORMA_ACP);//CanBusOffError;//0;
reply_a->analog_data.analog92_lo = LOBYTE(Data);
reply_a->analog_data.analog92_hi = HIBYTE(Data);
Data = fast_round(_IQtoF(simple_scalar1.pidF.Ui)*NORMA_ACP);//CanTimeOutErrorTR;//0;
reply_a->analog_data.analog93_lo = LOBYTE(Data);
reply_a->analog_data.analog93_hi = HIBYTE(Data);
Data = fast_round(_IQtoF(simple_scalar1.pidF.Up)*NORMA_ACP);//0;
reply_a->analog_data.analog94_lo = LOBYTE(Data);
reply_a->analog_data.analog94_hi = HIBYTE(Data);
Data = fast_round(_IQtoF(simple_scalar1.iq_decr_mzz_power)*1000.0);//0;//simple_scalar1.k_ogr_n
reply_a->analog_data.analog95_lo = LOBYTE(Data);
reply_a->analog_data.analog95_hi = HIBYTE(Data);
Data = fast_round(_IQtoF(simple_scalar1.iq_decr_mzz_power_filter)*1000.0);//fast_round(_IQtoF(edrk.zadanie.rmp_oborots_zad_hz.PosRampPlus1)*NORMA_FROTOR*60.0*450.0*1000.0);
reply_a->analog_data.analog96_lo = LOBYTE(Data);
reply_a->analog_data.analog96_hi = HIBYTE(Data);
// Data = 0;
// reply_a->analog_data.analog97_lo = LOBYTE(Data);
// reply_a->analog_data.analog97_hi = HIBYTE(Data);
pByte = &reply_a->digit_data.byte01.byte_data;
for (i = 0; i < 59; i++) //zero all dig data
{
*(pByte + i) = 0;
}
// reply->digit_data.byte01.byte_data = project.cds_in[1].read.pbus.data_in.all & 0xff;
// reply->digit_data.byte02.byte_data = (project.cds_in[1].read.pbus.data_in.all >> 8) & 0xff;
reply_a->digit_data.byte01.byte_data = edrk.errors.e0.all & 0xff;
reply_a->digit_data.byte02.byte_data = (edrk.errors.e0.all >> 8) & 0xff;
reply_a->digit_data.byte03.byte_data = edrk.errors.e1.all & 0xff;
reply_a->digit_data.byte04.byte_data = (edrk.errors.e1.all >> 8) & 0xff;
reply_a->digit_data.byte05.byte_data = edrk.errors.e2.all & 0xff;
reply_a->digit_data.byte06.byte_data = (edrk.errors.e2.all >> 8) & 0xff;
reply_a->digit_data.byte07.byte_data = edrk.errors.e3.all & 0xff;
reply_a->digit_data.byte08.byte_data = (edrk.errors.e3.all >> 8) & 0xff;
reply_a->digit_data.byte09.byte_data = edrk.errors.e4.all & 0xff;
reply_a->digit_data.byte10.byte_data = (edrk.errors.e4.all >> 8) & 0xff;
reply_a->digit_data.byte11.byte_data = edrk.errors.e5.all & 0xff;
reply_a->digit_data.byte12.byte_data = (edrk.errors.e5.all >> 8) & 0xff;
//13
if (edrk.Status_Perehod_Rascepitel)
reply_a->digit_data.byte13.bit_data.bit1 = 1;
else
reply_a->digit_data.byte13.bit_data.bit1 = 0;
if (edrk.Status_Rascepitel_Ok)
reply_a->digit_data.byte13.bit_data.bit0 = 1;
else
reply_a->digit_data.byte13.bit_data.bit0 = 0;
reply_a->digit_data.byte13.bit_data.bit2 = edrk.from_second_pch.bits.MASTER;
reply_a->digit_data.byte13.bit_data.bit3 = edrk.from_second_pch.bits.RASCEPITEL;
reply_a->digit_data.byte13.bit_data.bit4 = edrk.warning;
reply_a->digit_data.byte13.bit_data.bit5 = edrk.overheat;
reply_a->digit_data.byte13.bit_data.bit6 = edrk.summ_errors;
reply_a->digit_data.byte13.bit_data.bit7 = edrk.Status_Ready.bits.ready_final;
// reply_a->digit_data.byte13.byte_data = edrk.errors.e6.all & 0xff;
// reply->digit_data.byte14.byte_data = (edrk.errors.e6.all >> 8) & 0xff;
/*
reply->digit_data.byte15.byte_data = edrk.errors.e7.all & 0xff;
reply->digit_data.byte16.byte_data = (edrk.errors.e7.all >> 8) & 0xff;
reply->digit_data.byte17.byte_data = edrk.errors.e8.all & 0xff;
reply->digit_data.byte18.byte_data = (edrk.errors.e8.all >> 8) & 0xff;
*/
//IN2
reply_a->digit_data.byte14.byte_data = edrk.from_ing1.all & 0xff;// project.cds_in[1].read.pbus.data_in.all & 0xFF;
reply_a->digit_data.byte15.byte_data = (edrk.from_ing1.all >> 8) & 0xFF;//(project.cds_in[1].read.pbus.data_in.all >> 8) & 0xFF;
// status plates
reply_a->digit_data.byte16.bit_data.bit0 = !(project.hwp[0].status == component_Ready);//XProject_balzam.IsReady_reg.bit.XPlaneHWP_Chanals_IsReady;
reply_a->digit_data.byte16.bit_data.bit1 = !(project.adc[0].status == component_Ready);//XProject_balzam.IsReady_reg.bit.XPlaneHWP_Chanals_IsReady;
reply_a->digit_data.byte16.bit_data.bit2 = !(project.adc[1].status == component_Ready);
reply_a->digit_data.byte16.bit_data.bit3 = !(project.cds_in[0].status == component_Ready);//XProject_balzam.IsReady_reg.bit.XPlaneIN0_IsReady;
reply_a->digit_data.byte16.bit_data.bit4 = !(project.cds_in[1].status == component_Ready);//XProject_balzam.IsReady_reg.bit.XPlaneIN1_IsReady;
// reply_ans->digit_data.byte21.bit_data.bit5 = !project.cds_in[2].status;//XProject_balzam.IsReady_reg.bit.XPlaneIN2_IsReady;
reply_a->digit_data.byte16.bit_data.bit5 = !(project.cds_out[0].status == component_Ready);//XProject_balzam.IsReady_reg.bit.XPlaneOUT0_IsReady;
// reply_ans->digit_data.byte21.bit_data.bit7 = !project.cds_out[1].status;//XProject_balzam.IsReady_reg.bit.XPlaneOUT1_IsReady;
// reply_ans->digit_data.byte22.bit_data.bit0 = !project.cds_out[2].status;//XProject_balzam.IsReady_reg.bit.XPlaneOUT2_IsReady;
reply_a->digit_data.byte16.bit_data.bit6 = !(project.cds_tk[0].status == component_Ready);//XProject_balzam.IsReady_reg.bit.XPlaneTK0_IsReady;
reply_a->digit_data.byte16.bit_data.bit7 = !(project.cds_tk[1].status == component_Ready);//XProject_balzam.IsReady_reg.bit.XPlaneTK1_IsReady;
reply_a->digit_data.byte17.bit_data.bit0 = !(project.cds_tk[2].status == component_Ready);//XProject_balzam.IsReady_reg.bit.XPlaneTK2_IsReady;
reply_a->digit_data.byte17.bit_data.bit1 = !(project.cds_tk[3].status == component_Ready);//!XProject_balzam.IsReady_reg.bit.XPlaneTK3_IsReady;
// reply_ans->digit_data.byte22.bit_data.bit5 = !project.adc[1].status;//XProject_balzam.IsReady_reg.bit.XPlaneHWP_Chanals_IsReady;
//IN1
reply_a->digit_data.byte17.bit_data.bit2 = project.cds_in[0].read.pbus.data_in.bit.in0;
reply_a->digit_data.byte17.bit_data.bit3 = project.cds_in[0].read.pbus.data_in.bit.in1;
reply_a->digit_data.byte17.bit_data.bit4 = project.cds_in[0].read.pbus.data_in.bit.in2;
reply_a->digit_data.byte17.bit_data.bit5 = project.cds_in[0].read.pbus.data_in.bit.in3;
reply_a->digit_data.byte17.bit_data.bit6 = project.cds_in[0].read.pbus.data_in.bit.in4;
reply_a->digit_data.byte17.bit_data.bit7 = project.cds_in[0].read.pbus.data_in.bit.in8;
reply_a->digit_data.byte18.bit_data.bit0 = project.cds_in[0].read.pbus.data_in.bit.in9;
reply_a->digit_data.byte18.bit_data.bit1 = project.cds_in[0].read.pbus.data_in.bit.in10;
reply_a->digit_data.byte18.bit_data.bit2 = project.cds_in[0].read.pbus.data_in.bit.in11;
//out
reply_a->digit_data.byte18.bit_data.bit3 = edrk.to_ing.bits.ZARYAD_ON;// project.cds_out[0].write.sbus.data_out.bit.dout0;
reply_a->digit_data.byte18.bit_data.bit4 = edrk.to_ing.bits.NAGREV_OFF;//project.cds_out[0].write.sbus.data_out.bit.dout1;
reply_a->digit_data.byte18.bit_data.bit5 = edrk.to_ing.bits.NASOS_1_ON;//project.cds_out[0].write.sbus.data_out.bit.dout2;
reply_a->digit_data.byte18.bit_data.bit6 = edrk.to_ing.bits.NASOS_2_ON;//project.cds_out[0].write.sbus.data_out.bit.dout3;
reply_a->digit_data.byte18.bit_data.bit7 = edrk.to_ing.bits.BLOCK_KEY_OFF;//project.cds _out[0].write.sbus.data_out.bit.dout4;
reply_a->digit_data.byte19.bit_data.bit0 = (edrk.to_shema.bits.UMP_ON_OFF || edrk.to_shema.bits.CROSS_UMP_ON_OFF);//project.cds_out[0].write.sbus.data_out.bit.dout5;
reply_a->digit_data.byte19.bit_data.bit1 = edrk.to_shema.bits.QTV_ON || edrk.to_shema.bits.QTV_ON_OFF || edrk.to_shema.bits.CROSS_QTV_ON_OFF;//project.cds_out[0].write.sbus.data_out.bit.dout6;
reply_a->digit_data.byte19.bit_data.bit2 = edrk.to_shema.bits.QTV_OFF;//project.cds_out[0].write.sbus.data_out.bit.dout7;
reply_a->digit_data.byte19.bit_data.bit3 = edrk.to_ing.bits.RASCEPITEL_OFF;
reply_a->digit_data.byte19.bit_data.bit4 = edrk.to_ing.bits.RASCEPITEL_ON;
reply_a->digit_data.byte19.bit_data.bit5 = sync_data.local_flag_sync_1_2;//
reply_a->digit_data.byte19.bit_data.bit6 = edrk.flag_second_PCH;//
reply_a->digit_data.byte19.bit_data.bit7 = edrk.to_ing.bits.SMALL_LAMPA_AVARIA; //project.cds_out[0].write.sbus.data_out.bit.dout15;
//20
reply_a->digit_data.byte20.bit_data.bit0 = edrk.SumSbor;
reply_a->digit_data.byte20.bit_data.bit1 = edrk.Status_Ready.bits.ready1;
reply_a->digit_data.byte20.bit_data.bit2 = edrk.Status_Ready.bits.ready2;
reply_a->digit_data.byte20.bit_data.bit3 = edrk.Status_Ready.bits.ready3;
reply_a->digit_data.byte20.bit_data.bit4 = edrk.Status_Ready.bits.ready4;
reply_a->digit_data.byte20.bit_data.bit5 = edrk.Status_Ready.bits.ready5;
reply_a->digit_data.byte20.bit_data.bit6 = edrk.Status_Charge;
reply_a->digit_data.byte20.bit_data.bit7 = edrk.Zaryad_OK;
reply_a->digit_data.byte21.byte_data = edrk.errors.e6.all & 0xff;
reply_a->digit_data.byte22.byte_data = (edrk.errors.e6.all >> 8) & 0xff;
// reply_a->digit_data.byte21.bit_data.bit0 = edrk.errors.e6.bits.UO6_KEYS;
// reply_a->digit_data.byte21.bit_data.bit1 = edrk.errors.e6.bits.UO7_KEYS;
// reply_a->digit_data.byte21.bit_data.bit2 = edrk.errors.e6.bits.UO1_KEYS;
// reply_a->digit_data.byte21.bit_data.bit3 = edrk.errors.e6.bits.ERR_PBUS;
// reply_a->digit_data.byte21.bit_data.bit4 = edrk.errors.e6.bits.ERR_SBUS;
// reply_a->digit_data.byte21.bit_data.bit5 = edrk.errors.e6.bits.ER_DISBAL_BATT;
// reply_a->digit_data.byte21.bit_data.bit6 = edrk.errors.e6.bits.ER_RAZBALANS_ALG;
// reply_a->digit_data.byte21.bit_data.bit7 = edrk.errors.e6.bits.RASCEPITEL_ERROR_NOT_ANSWER;
reply_a->digit_data.byte23.byte_data = edrk.errors.e7.all & 0xff;
reply_a->digit_data.byte24.byte_data = (edrk.errors.e7.all >> 8) & 0xff;
// hwp
reply_a->digit_data.byte25.byte_data = project.hwp[0].read.comp_s.plus.all & 0xff;
reply_a->digit_data.byte26.byte_data = (project.hwp[0].read.comp_s.plus.all >> 8) & 0xff;
reply_a->digit_data.byte27.byte_data = project.hwp[0].read.comp_s.minus.all & 0xff;
reply_a->digit_data.byte28.byte_data = (project.hwp[0].read.comp_s.minus.all >> 8) & 0xff;
reply_a->digit_data.byte29.bit_data.bit0 = control_station.active_control_station[CONTROL_STATION_TERMINAL_RS232];
reply_a->digit_data.byte29.bit_data.bit1 = control_station.active_control_station[CONTROL_STATION_TERMINAL_CAN];
reply_a->digit_data.byte29.bit_data.bit2 = control_station.active_control_station[CONTROL_STATION_INGETEAM_PULT_RS485];
reply_a->digit_data.byte29.bit_data.bit3 = control_station.active_control_station[CONTROL_STATION_MPU_SVU_CAN];
reply_a->digit_data.byte29.bit_data.bit4 = control_station.active_control_station[CONTROL_STATION_MPU_KEY_CAN];
reply_a->digit_data.byte29.bit_data.bit5 = control_station.active_control_station[CONTROL_STATION_MPU_SVU_RS485];
reply_a->digit_data.byte29.bit_data.bit6 = control_station.active_control_station[CONTROL_STATION_MPU_KEY_RS485];
reply_a->digit_data.byte29.bit_data.bit7 = control_station.active_control_station[CONTROL_STATION_ZADATCHIK_CAN];
reply_a->digit_data.byte30.bit_data.bit0 = control_station.alive_control_station[CONTROL_STATION_TERMINAL_RS232];
reply_a->digit_data.byte30.bit_data.bit1 = control_station.alive_control_station[CONTROL_STATION_TERMINAL_CAN];
reply_a->digit_data.byte30.bit_data.bit2 = control_station.alive_control_station[CONTROL_STATION_INGETEAM_PULT_RS485];
reply_a->digit_data.byte30.bit_data.bit3 = control_station.alive_control_station[CONTROL_STATION_MPU_SVU_CAN];
reply_a->digit_data.byte30.bit_data.bit4 = control_station.alive_control_station[CONTROL_STATION_MPU_KEY_CAN];
reply_a->digit_data.byte30.bit_data.bit5 = control_station.alive_control_station[CONTROL_STATION_MPU_SVU_RS485];
reply_a->digit_data.byte30.bit_data.bit6 = control_station.alive_control_station[CONTROL_STATION_MPU_KEY_RS485];
reply_a->digit_data.byte30.bit_data.bit7 = control_station.alive_control_station[CONTROL_STATION_ZADATCHIK_CAN];
reply_a->digit_data.byte31.byte_data = optical_read_data.data.cmd.all & 0xff;
reply_a->digit_data.byte32.byte_data = (optical_read_data.data.cmd.all >> 8) & 0xff;
reply_a->digit_data.byte33.byte_data = optical_write_data.data.cmd.all & 0xff;
reply_a->digit_data.byte34.byte_data = (optical_write_data.data.cmd.all >> 8) & 0xff;
reply_a->digit_data.byte35.bit_data.bit0 = control_station.alive_control_station[CONTROL_STATION_VPU_CAN];
reply_a->digit_data.byte35.bit_data.bit1 = control_station.active_control_station[CONTROL_STATION_VPU_CAN];
reply_a->digit_data.byte35.bit_data.bit2 = edrk.auto_master_slave.local.bits.master;
reply_a->digit_data.byte35.bit_data.bit3 = edrk.auto_master_slave.local.bits.slave;
reply_a->digit_data.byte35.bit_data.bit4 = edrk.auto_master_slave.local.bits.try_master;
reply_a->digit_data.byte35.bit_data.bit5 = edrk.auto_master_slave.remoute.bits.master;
reply_a->digit_data.byte35.bit_data.bit6 = edrk.auto_master_slave.remoute.bits.slave;
reply_a->digit_data.byte35.bit_data.bit7 = edrk.auto_master_slave.remoute.bits.try_master;
reply_a->digit_data.byte36.bit_data.bit0 = edrk.Status_Ready.bits.MasterSlaveActive;
reply_a->digit_data.byte36.bit_data.bit1 = edrk.ms.ready1;
reply_a->digit_data.byte36.bit_data.bit2 = edrk.ms.ready2;
reply_a->digit_data.byte36.bit_data.bit3 = edrk.flag_wait_both_ready2;
reply_a->digit_data.byte36.bit_data.bit4 = edrk.Ready1_another_bs;
reply_a->digit_data.byte36.bit_data.bit5 = edrk.Ready2_another_bs;
reply_a->digit_data.byte36.bit_data.bit6 = edrk.flag_another_bs_first_ready12;
reply_a->digit_data.byte36.bit_data.bit7 = edrk.flag_this_bs_first_ready12;
reply_a->digit_data.byte37.byte_data = edrk.errors.e8.all & 0xff;
reply_a->digit_data.byte38.byte_data = (edrk.errors.e8.all >> 8) & 0xff;
reply_a->digit_data.byte39.bit_data.bit0 = edrk.RazborNotFinish;
reply_a->digit_data.byte39.bit_data.bit1 = edrk.RunZahvatRascepitel;
reply_a->digit_data.byte39.bit_data.bit2 = edrk.RunUnZahvatRascepitel;
reply_a->digit_data.byte39.bit_data.bit3 = edrk.Run_Rascepitel;
reply_a->digit_data.byte39.bit_data.bit4 = edrk.ms.ready3;
reply_a->digit_data.byte39.bit_data.bit5 = edrk.StartGEDfromZadanie;
reply_a->digit_data.byte39.bit_data.bit6 = edrk.flag_wait_set_to_zero_zadanie;
reply_a->digit_data.byte39.bit_data.bit7 = edrk.flag_block_zadanie;
reply_a->digit_data.byte40.bit_data.bit0 = edrk.you_can_on_rascepitel;
reply_a->digit_data.byte40.bit_data.bit1 = edrk.StartGEDfromControl;
reply_a->digit_data.byte40.bit_data.bit2 = edrk.StartGED;
reply_a->digit_data.byte40.bit_data.bit3 = edrk.GoWait;
reply_a->digit_data.byte40.bit_data.bit4 = edrk.stop_logs_rs232;
reply_a->digit_data.byte40.bit_data.bit5 = edrk.stop_slow_log;
reply_a->digit_data.byte40.bit_data.bit6 = edrk.disable_limit_power_from_svu;
reply_a->digit_data.byte40.bit_data.bit7 = edrk.disable_uom;
reply_a->digit_data.byte41.byte_data = edrk.errors.e9.all & 0xff;
reply_a->digit_data.byte42.byte_data = (edrk.errors.e9.all >> 8) & 0xff;
reply_a->digit_data.byte43.byte_data = edrk.errors.e10.all & 0xff;
reply_a->digit_data.byte44.byte_data = (edrk.errors.e10.all >> 8) & 0xff;
reply_a->digit_data.byte45.byte_data = edrk.errors.e11.all & 0xff;
reply_a->digit_data.byte46.byte_data = (edrk.errors.e11.all >> 8) & 0xff;
reply_a->digit_data.byte47.byte_data = edrk.errors.e12.all & 0xff;
reply_a->digit_data.byte48.byte_data = (edrk.errors.e12.all >> 8) & 0xff;
// reply_a->digit_data.byte49.byte_data = 0;
// reply_a->digit_data.byte50.byte_data = 0;
// reply_a->digit_data.byte49.byte_data = 0;
// reply_a->digit_data.byte49.bit_data.bit0 = edrk.from_ing1.bits.ALL_KNOPKA_AVARIA;
// reply_a->digit_data.byte49.bit_data.bit0 = edrk.from_ing1.bits.BLOCK_IZOL_AVARIA;
// reply_a->digit_data.byte49.bit_data.bit0 = edrk.from_ing1.bits.BLOCK_IZOL_NORMA;
reply_a->digit_data.byte49.bit_data.bit0 = edrk.from_ing1.bits.LOCAL_REMOUTE;
// reply_a->digit_data.byte49.bit_data.bit0 = edrk.from_ing1.bits.NAGREV_ON = !FROM_ING_NAGREV_ON;
// reply_a->digit_data.byte49.bit_data.bit0 = edrk.from_ing1.bits.NASOS_NORMA = !FROM_ING_NASOS_NORMA;
// reply_a->digit_data.byte49.bit_data.bit0 = edrk.from_ing1.bits.NASOS_ON = !FROM_ING_NASOS_ON;
// reply_a->digit_data.byte49.bit_data.bit0 = edrk.from_ing1.bits.OHLAD_UTE4KA_WATER = !FROM_ING_OHLAD_UTE4KA_WATER;
// edrk.from_ing1.bits.UPC_24V_NORMA = !FROM_ING_UPC_24V_NORMA;
//edrk.from_ing1.bits.OP_PIT_NORMA = !FROM_ING_OP_PIT_NORMA;
//edrk.from_ing1.bits.VENTIL_ON = !FROM_ING_VENTIL_ON;
// edrk.from_ing1.bits.VIPR_PREDOHR_NORMA = !FROM_ING_VIPR_PREDOHR_NORMA;
// edrk.from_ing1.bits.ZARYAD_ON = !FROM_ING_ZARYAD_ON;
// edrk.from_ing1.bits.ZAZEML_OFF = !FROM_ING_ZAZEML_OFF;
// edrk.from_ing1.bits.ZAZEML_ON = !FROM_ING_ZAZEML_ON;
reply_a->digit_data.byte49.bit_data.bit1 = edrk.from_ing2.bits.KEY_MINUS;
reply_a->digit_data.byte49.bit_data.bit2 = edrk.from_ing2.bits.KEY_PLUS;
reply_a->digit_data.byte49.bit_data.bit3 = edrk.from_ing2.bits.KEY_KVITIR;
reply_a->digit_data.byte49.bit_data.bit4 = edrk.from_ing2.bits.KEY_SBOR;
reply_a->digit_data.byte49.bit_data.bit5 = edrk.from_ing2.bits.KEY_RAZBOR;
// edrk.from_ing1.bits.RASCEPITEL_ON = FROM_ING_RASCEPITEL_ON_OFF;
reply_a->digit_data.byte49.bit_data.bit6 = edrk.from_ing2.bits.SOST_ZAMKA;
reply_a->digit_data.byte49.bit_data.bit7 = edrk.from_shema_filter.bits.RAZBOR_SHEMA;
//
reply_a->digit_data.byte50.bit_data.bit0 = edrk.from_shema_filter.bits.SBOR_SHEMA;
reply_a->digit_data.byte50.bit_data.bit1 = edrk.from_shema_filter.bits.ZADA_DISPLAY;
reply_a->digit_data.byte50.bit_data.bit2 = edrk.from_shema_filter.bits.SVU;
// edrk.from_shema.bits.KNOPKA_AVARIA = FROM_ALL_KNOPKA_AVARIA;
reply_a->digit_data.byte50.bit_data.bit3 = edrk.from_shema.bits.QTV_ON_OFF;
reply_a->digit_data.byte50.bit_data.bit4 = edrk.from_shema_filter.bits.UMP_ON_OFF;
reply_a->digit_data.byte50.bit_data.bit5 = edrk.from_shema_filter.bits.READY_UMP;
reply_a->digit_data.byte50.bit_data.bit6 = edrk.from_shema.bits.SVU_BLOCK_QTV;
reply_a->digit_data.byte50.bit_data.bit7 = edrk.errors_another_bs_from_can;
// reply_a->digit_data.byte44.byte_data = 0;
reply_a->digit_data.byte51.bit_data.bit0 = inc_sensor.break_sensor1;
reply_a->digit_data.byte51.bit_data.bit1 = inc_sensor.break_sensor2;
reply_a->digit_data.byte51.bit_data.bit2 = pll1.output.flag_find_pll;
reply_a->digit_data.byte51.bit_data.bit3 = log_params.stop_log_slow;
reply_a->digit_data.byte51.bit_data.bit4 = log_params.stop_log_level_1;
reply_a->digit_data.byte51.bit_data.bit5 = log_params.stop_log_level_2;
reply_a->digit_data.byte51.bit_data.bit6 = log_params.stop_log_slow_level_1;
reply_a->digit_data.byte51.bit_data.bit7 = log_params.stop_log_slow_level_2;
reply_a->digit_data.byte52.bit_data.bit0 = edrk.from_zadat4ik.bits.KVITIR;
reply_a->digit_data.byte52.bit_data.bit1 = edrk.from_zadat4ik.bits.PLUS;
reply_a->digit_data.byte52.bit_data.bit2 = edrk.from_zadat4ik.bits.MINUS;
reply_a->digit_data.byte52.bit_data.bit3 = edrk.from_zadat4ik.bits.PROVOROT;
reply_a->digit_data.byte52.bit_data.bit4 = edrk.from_zadat4ik.bits.UOM_READY_ACTIVE;
reply_a->digit_data.byte52.bit_data.bit5 = edrk.from_zadat4ik.bits.UOM_LIMIT_3;
reply_a->digit_data.byte52.bit_data.bit6 = edrk.from_zadat4ik.bits.UOM_LIMIT_2;
reply_a->digit_data.byte52.bit_data.bit7 = edrk.from_zadat4ik.bits.UOM_LIMIT_1;
reply_a->digit_data.byte53.bit_data.bit0 = edrk.Run_UMP;
reply_a->digit_data.byte53.bit_data.bit1 = edrk.Status_UMP_Ok;
reply_a->digit_data.byte53.bit_data.bit2 = edrk.Zaryad_UMP_Ok;
reply_a->digit_data.byte53.bit_data.bit3 = edrk.cmd_to_ump;
reply_a->digit_data.byte53.bit_data.bit4 = edrk.sbor_wait_ump1;
reply_a->digit_data.byte53.bit_data.bit5 = edrk.sbor_wait_ump2;
reply_a->digit_data.byte53.bit_data.bit6 = edrk.flag_enable_on_ump;
reply_a->digit_data.byte53.bit_data.bit7 = edrk.local_ump_on_off;
reply_a->digit_data.byte54.bit_data.bit0 = edrk.local_ready_ump;
///
reply_a->digit_data.byte54.bit_data.bit1 = (modbus_table_can_in[128].all) ? 1 : 0; //cmd_local_charge PCH 0
reply_a->digit_data.byte54.bit_data.bit2 = (modbus_table_can_in[131].all) ? 1 : 0; //cmd_local_uncharge PCH 0
reply_a->digit_data.byte54.bit_data.bit3 = (modbus_table_can_in[129].all) ? 1 : 0; //cmd_local_charge PCH 1
reply_a->digit_data.byte54.bit_data.bit4 = (modbus_table_can_in[132].all) ? 1 : 0; //cmd_local_uncharge PCH 1
reply_a->digit_data.byte54.bit_data.bit5 = edrk.from_shema_filter.bits.UMP_ON_OFF;
reply_a->digit_data.byte54.bit_data.bit6 = edrk.SumSbor;
reply_a->digit_data.byte55.bit_data.bit0 = edrk.power_limit.bits.limit_Iout;
reply_a->digit_data.byte55.bit_data.bit1 = edrk.power_limit.bits.limit_UOM;
reply_a->digit_data.byte55.bit_data.bit2 = edrk.power_limit.bits.limit_by_temper;
reply_a->digit_data.byte55.bit_data.bit3 = edrk.power_limit.bits.limit_from_SVU;
reply_a->digit_data.byte55.bit_data.bit4 = edrk.power_limit.bits.limit_from_uom_fast;
reply_a->digit_data.byte55.bit_data.bit5 = edrk.power_limit.bits.limit_from_freq;
reply_a->digit_data.byte55.bit_data.bit6 = edrk.power_limit.bits.limit_moment;
reply_a->digit_data.byte55.bit_data.bit7 = simple_scalar1.flag_decr_mzz_power;
reply_a->digit_data.byte56.bit_data.bit0 = (edrk.pult_cmd.log_what_memory & 0x1) ? 1 : 0;
reply_a->digit_data.byte56.bit_data.bit1 = (edrk.pult_cmd.log_what_memory & 0x2) ? 1 : 0;
reply_a->digit_data.byte56.bit_data.bit2 = edrk.pult_data.flagSaveDataMoto ? 1 : 0;
reply_a->digit_data.byte56.bit_data.bit3 = (edrk.pult_data.flagSaveSlowLogs) ? 1 : 0;
reply_a->digit_data.byte56.bit_data.bit4 = edrk.pult_cmd.send_log ? 1 : 0;
reply_a->digit_data.byte56.bit_data.bit5 = (log_to_HMI.send_log==1) ? 1 : 0;
reply_a->digit_data.byte56.bit_data.bit6 = (log_to_HMI.send_log==2) ? 1 : 0;
reply_a->digit_data.byte56.bit_data.bit7 = (log_to_HMI.send_log==3) ? 1 : 0;
//
reply_a->digit_data.byte57.bit_data.bit0 = (edrk.break_tempers[0] > ABNORMAL_TEMPER_BREAK_INT) ? 1 : 0;
reply_a->digit_data.byte57.bit_data.bit1 = (edrk.break_tempers[1] > ABNORMAL_TEMPER_BREAK_INT) ? 1 : 0;
reply_a->digit_data.byte57.bit_data.bit2 = (edrk.break_tempers[2] > ABNORMAL_TEMPER_BREAK_INT) ? 1 : 0;
reply_a->digit_data.byte57.bit_data.bit3 = (edrk.break_tempers[3] > ABNORMAL_TEMPER_BREAK_INT) ? 1 : 0;
reply_a->digit_data.byte57.bit_data.bit4 = (edrk.break_tempers[0] > ALARM_TEMPER_BREAK_INT) ? 1 : 0;
reply_a->digit_data.byte57.bit_data.bit5 = (edrk.break_tempers[1] > ALARM_TEMPER_BREAK_INT) ? 1 : 0;
reply_a->digit_data.byte57.bit_data.bit6 = (edrk.break_tempers[2] > ALARM_TEMPER_BREAK_INT) ? 1 : 0;
reply_a->digit_data.byte57.bit_data.bit7 = (edrk.break_tempers[3] > ALARM_TEMPER_BREAK_INT) ? 1 : 0;
reply_a->digit_data.byte58.bit_data.bit0 = (edrk.breaker_on==1) ? 1 : 0;
reply_a->digit_data.byte58.bit_data.bit1 = edrk.warnings.e9.bits.BREAK_TEMPER_WARNING;
reply_a->digit_data.byte58.bit_data.bit2 = edrk.warnings.e9.bits.BREAK_TEMPER_ALARM;
reply_a->digit_data.byte58.bit_data.bit3 = edrk.warnings.e9.bits.BREAKER_GED_ON;
// reply_a->digit_data.byte57.byte_data = 0;//(((unsigned long)edrk.canes_reg>>16) & 0x0ff);
// reply_a->digit_data.byte58.byte_data = 0;//(((unsigned long)edrk.canes_reg) & 0x3f);
reply_a->digit_data.byte59.byte_data = 0;//(((unsigned long)edrk.canes_reg>>24) & 0x1);
reply_a->digit_data.byte60.byte_data = 0;
return;
}

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////////////////////////////////////////////
// message.h
//
// Струкруры сообщений между:
// 1. контроллером преобразователy
// 2. координирующим контроллером
// 3. контроллером верхнего уровнy
//
// Данный файл может быть использован при
// компилyции программы длy исполнениy на разных
// платформах. В частности на INTEL 386SX Octagon
// и на TMS320C32 Texas Instruments.
// Передача данных через последовательный интерфейс
// происходит побайтно.
// С учетом этого выбранный тип длy передаваемых данных
// unsigned char = 8 бит
// на TMS320C32 unsigned char = 32 бит, но используютсy
// только младшие 8 бит.
// !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
// Особое внимание уделить упаковке структур на разных
// платформах в зависимости от границ выравниваниy
// !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
////////////////////////////////////////////
#ifndef MESSAGE_H
#define MESSAGE_H
#include "RS_Function_terminal.h"
//void func_fill_answer_to_TMS(TMS_TO_TERMINAL_STRUCT* reply_ans, CMD_TO_TMS_STRUCT* pcommand);
void func_pack_answer_to_TMS(TMS_TO_TERMINAL_STRUCT* reply_a);
void func_unpack_answer_from_TMS_RS232(CMD_TO_TMS_STRUCT* pcommand);
#endif //MESSAGE_H

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/*
* message2can.c
*
* Created on: 3 èþí. 2020 ã.
* Author: Yura
*/
#include <adc_tools.h>
#include <edrk_main.h>
#include <message2can.h>
#include <params.h>
#include <params_norma.h>
#include <v_rotor.h>
#include <vector.h>
#include "control_station.h"
#include "CAN_Setup.h"
#include "global_time.h"
#include "IQmathLib.h"
#include "DSP281x_Device.h"
#include "x_basic_types.h"
#include "xp_cds_in.h"
#include "xp_hwp.h"
#include "xp_project.h"
void detecting_cmd_from_can(void)
{
if (control_station.alive_control_station[CONTROL_STATION_TERMINAL_CAN])
{
func_unpack_answer_from_TMS_CAN((TERMINAL_UNITES_STRUCT_handle)&TerminalUnites[edrk.number_can_box_terminal_cmd][0]);
}
}
void func_unpack_answer_from_TMS_CAN(TERMINAL_UNITES_STRUCT_handle unites_t)
{
// Êîíòðîëüíày ñóììà
unsigned int DataOut,h;
int Data, Data1, Data2, DataAnalog1, DataAnalog2, DataAnalog3, DataAnalog4,DataAnalog5,DataAnalog6, i;
unsigned char *pByte;
// static int vs11,vs12,vs1;
// static int DataCnt=0;
// int GoT,Assemble_scheme;
// static int prev_temp_Rele1=0, temp_Rele1=0, prev_temp_Rele2=0, temp_Rele2=0;
static int flag_prev_turn_on = 0;
static int flag_prev_turn_off = 0;
static int prev_byte01_bit4 = 0;
static int prev_byte01_bit1 = 0;
static int flag_wait_revers_sbor = 1;
static int flag_wait_revers_go = 1;
static unsigned int count_transmited = 0;
//
if (TERMINAL_UNIT_LEN>CONTROL_STATION_MAX_RAW_DATA)
xerror(main_er_ID(2),(void *)0);
// ïåðåïàêóåì èç áàéòîâ â ñëîâà, ò.ê. â RS232 äàííûå èäóò áàéòàìè
// pByte = (unsigned char *)(pcommand);//->analog_data.analog1_lo;
for (h=0;h<TERMINAL_UNIT_LEN;h++)
{
control_station.raw_array_data[CONTROL_STATION_TERMINAL_CAN][h].all = unites_t->buf[h].all;
}
/*
if (control_station.alive_control_station[CONTROL_STATION_TERMINAL_CAN]==0)
{
edrk.from_can.bits.ACTIVE = 0;
return;
}
if ((control_station.active_control_station[CONTROL_STATION_TERMINAL_RS232]==1))
{
edrk.from_can.bits.ACTIVE = 0;
return;
}
// unites_t->buf[0].bits.bit0
edrk.test_mode = 0;
edrk.from_can.bits.ACTIVE = unites_t->buf[6].bits.bit3;
if (edrk.from_can.bits.ACTIVE==0)
return;
// f.RScount = SECOND * 3;
// unites_t->
// StartGED
if (edrk.summ_errors)
{
flag_wait_revers_go = 1;
}
if (flag_wait_revers_go==1)
edrk.StartGEDRS = 0;
if (unites_t->buf[6].bits.bit0 && flag_wait_revers_go)
edrk.StartGEDRS = 0;
if (unites_t->buf[6].bits.bit0==0)
edrk.StartGEDRS = 0;
if (unites_t->buf[6].bits.bit0==0 && flag_wait_revers_go)
flag_wait_revers_go = 0;
if (unites_t->buf[6].bits.bit0==1 && flag_wait_revers_go==0)
edrk.StartGEDRS = 1;
// edrk.StartGEDRS = pcommand->digit_data.Byte01.bit_data.bit0;
// end StartGED
edrk.Mode_UFConst = unites_t->buf[6].bits.bit2;
////////////////
if (unites_t->buf[6].bits.bit1 && prev_byte01_bit1==0)
edrk.KvitirRS = 1;
prev_byte01_bit1 = unites_t->buf[6].bits.bit1;
// edrk.from_rs.bits.RAZBOR_SHEMA = pcommand->digit_data.Byte01.bit_data.bit5;
// SBOR SHEMA
if (edrk.summ_errors)
{
flag_wait_revers_sbor = 1;
}
if (flag_wait_revers_sbor==1)
edrk.from_can.bits.SBOR_SHEMA = 0;
if (unites_t->buf[6].bits.bit4 && flag_wait_revers_sbor)
edrk.from_can.bits.SBOR_SHEMA = 0;
if (unites_t->buf[6].bits.bit4==0)
edrk.from_can.bits.SBOR_SHEMA = 0;
if (unites_t->buf[6].bits.bit4==0 && flag_wait_revers_sbor)
flag_wait_revers_sbor = 0;
if (unites_t->buf[6].bits.bit4==1 && flag_wait_revers_sbor==0)
edrk.from_can.bits.SBOR_SHEMA = unites_t->buf[6].bits.bit4;
prev_byte01_bit4 = unites_t->buf[6].bits.bit4;
// end SBOR SHEMA
// if (edrk.from_rs.bits.RAZBOR_SHEMA)
// edrk.from_rs.bits.SBOR_SHEMA = 0;
//edrk.SborRS = pcommand->digit_data.Byte01.bit_data.bit4;
edrk.SelectPump0_1 = unites_t->buf[6].bits.bit6;
edrk.DirectOUT = unites_t->buf[6].bits.bit7;
edrk.DirectNagrevOff = unites_t->buf[6].bits.bit8;
edrk.DirectBlockKeyOff = unites_t->buf[6].bits.bit9;
edrk.DirectPumpON = unites_t->buf[6].bits.bit10;
edrk.DirectZaryadOn = unites_t->buf[6].bits.bit11;
#ifdef STENDD
// edrk.to_shema.bits.QTV_ON = pcommand->digit_data.Byte02.bit_data.bit3;
#endif
edrk.Status_Ready.bits.ImitationReady2 = unites_t->buf[6].bits.bit12;
edrk.SetSpeed = unites_t->buf[6].bits.bit13;
// edrk.RemouteFromRS = pcommand->digit_data.Byte01.bit_data.bit3;
// edrk.VozbudOnOffFromRS = pcommand->digit_data.Byte01.bit_data.bit1;
// edrk.enable_set_vozbud = pcommand->digit_data.Byte01.bit_data.bit1;
// edrk.SborRS = pcommand->digit_data.Byte01.bit_data.bit2;
// edrk.RazborRS = pcommand->digit_data.Byte01.bit_data.bit3;
// edrk.DirectOUT = pcommand->digit_data.Byte01.bit_data.bit4;
// edrk.StartGED = pcommand->digit_data.Byte01.bit_data.bit6;
// f.flag_distance = pcommand->digit_data.Byte01.bit_data.bit6;
// f.Set_power = pcommand->digit_data.Byte01.bit_data.bit7;
f.Obmotka1 = unites_t->buf[6].bits.bit15;
f.Obmotka2 = unites_t->buf[7].bits.bit0;
edrk.disable_alg_u_disbalance = unites_t->buf[7].bits.bit1;
// f.Down50 = pcommand->digit_data.Byte02.bit_data.bit2;
// f.Up50 = pcommand->digit_data.Byte02.bit_data.bit3;
// f.Ciclelog = pcommand->digit_data.Byte02.bit_data.bit4;
// if (SPEED_SELECT_ZADAT==1)
// f.Provorot = pcommand->digit_data.Byte02.bit_data.bit5;
// Data1 = pcommand->analog_data.analog1_hi;
// Data2 = pcommand->analog_data.analog1_lo;
// Data = (Data2 + Data1 * 256);
// if (Data > 32767)
// Data = Data - 65536;
DataAnalog1 = unites_t->buf[0].all;
// Data1 = pcommand->analog_data.analog2_hi;
// Data2 = pcommand->analog_data.analog2_lo;
// Data = (Data2 + Data1 * 256);
// if (Data > 32767)
// Data = Data - 65536;
DataAnalog2 = unites_t->buf[1].all;
// Data1 = pcommand->analog_data.analog3_hi;
// Data2 = pcommand->analog_data.analog3_lo;
// Data = (Data2 + Data1 * 256);
// if (Data > 32767)
// Data = Data - 65536;
DataAnalog3 = unites_t->buf[2].all;
// Data1 = pcommand->analog_data.analog4_hi;
// Data2 = pcommand->analog_data.analog4_lo;
// Data = (Data2 + Data1 * 256);
// if (Data > 32767)
// Data = Data - 65536;
DataAnalog4 = unites_t->buf[3].all;
DataAnalog5 = unites_t->buf[4].all;
DataAnalog6 = unites_t->buf[5].all;
edrk.W_from_RS = DataAnalog1;
edrk.I_zad_vozb_add_from_RS = 0;//DataAnalog4;
if (!edrk.SetSpeed)
{
if (DataAnalog3<0)
edrk.ZadanieU_Charge_RS = 0;
else
edrk.ZadanieU_Charge_RS = DataAnalog3;
}
if (edrk.SetSpeed)
{
edrk.fzad = DataAnalog1/100.0;
edrk.kzad = DataAnalog2/10000.0;
edrk.k_u_disbalance = _IQ(DataAnalog4/100.0);
edrk.kplus_u_disbalance = _IQ(DataAnalog3/1000.0);
}
*/
return;
}

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/*
* message2can.h
*
* Created on: 3 èþí. 2020 ã.
* Author: Yura
*/
#ifndef SRC_MAIN_MESSAGE2CAN_H_
#define SRC_MAIN_MESSAGE2CAN_H_
#include "CAN_Setup.h"
void func_unpack_answer_from_TMS_CAN(TERMINAL_UNITES_STRUCT_handle);
void detecting_cmd_from_can(void);
#endif /* SRC_MAIN_MESSAGE2CAN_H_ */

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#include <adc_tools.h>
#include <edrk_main.h>
#include <message2test.h>
#include <params.h>
#include <sync_tools.h>
#include <tk_Test.h>
#include <vector.h>
#include "CAN_Setup.h"
#include "IQmathLib.h"
#include "DSP281x_Device.h" // DSP281x Headerfile Include File
#include "RS_Functions.h"
#include "xp_project.h"
#include "x_wdog.h"
#include "params_hwp.h"
#include "detect_errors.h"
//XilinxV2
void func_fill_answer_to_TMS_test(TMS_TO_TERMINAL_TEST_ALL_STRUCT* reply_ans, CMD_TO_TMS_TEST_ALL_STRUCT* pcommand)
{
// îíòðîëüíày ñóììà
unsigned int crc, DataOut, sinusImpulse, doubleImpulse,adc_plate;
int Data,Data1,Data2/*,bitt, DataAnalog1, DataAnalog2*/, tk0,tk1,tk2,tk3,period1,period2, period3;
//static int vs11,vs12,vs1;
static int prev_Go = 0;
static int prev_Prepare = 0;
static int flag_prev_turn_on = 0;
static int flag_prev_turn_off = 0;
static int flag_prev_lamp_on_off = 0;
static int soft_off_enable = 0, soft_on_enable = 0;
static float tk_time_soft_off = 0;
static unsigned long tk_time_soft_off_d = 0;
static unsigned int i_af_protect_a = 0, i_af_protect_d = 0;
int enable_line_err = 0, disable_tk_soft_off, disable_protect_tk_soft_off;
stop_wdog();
edrk.test_mode = 1;
// const óêàçàòåëü íà ñòðóêòóðó ñòàíäàðòíîé êîìàíäû
// íàñòðîèëè íà áóôåð ïðèåìà
// TMS_TO_TERMINAL_TEST_ALL_STRUCT* const pcommand = ((TMS_TO_TERMINAL_TEST_ALL_STRUCT*)reply);
// -àçáèðàåì ïîëy êîìàíäû
// ?ñå ýòî íàäî ïèõíóòü ñåáå
// f.RScount = SECOND*3;
f.terminal_prepare = pcommand->digit_data.byte05.bit_data.bit1;
soft_off_enable = pcommand->digit_data.byte06.bit_data.bit0;
soft_on_enable = pcommand->digit_data.byte06.bit_data.bit1;
// edrk.direct_write_out = pcommand->digit_data.byte06.bit_data.bit2;
disable_tk_soft_off = pcommand->digit_data.byte06.bit_data.bit3;
disable_protect_tk_soft_off = pcommand->digit_data.byte06.bit_data.bit4;
enable_line_err = pcommand->digit_data.byte06.bit_data.bit5;
// Çàïèñàëè âñå âûõîäû
#if (CHECK_IN_OUT_TERMINAL==1)
#if(C_cds_out_number>=1)
project.cds_out[0].write.sbus.data_out.all = ~(pcommand->digit_data.byte07.byte_data | ((pcommand->digit_data.byte08.byte_data) << 8));
#endif
#if(C_cds_out_number>=2)
project.cds_out[1].write.sbus.data_out.all = ~(pcommand->digit_data.byte09.byte_data | ((pcommand->digit_data.byte10.byte_data) << 8));
#endif
#if(C_cds_out_number>=3)
project.cds_out[2].write.sbus.data_out.all = ~(pcommand->digit_data.byte11.byte_data | ((pcommand->digit_data.byte12.byte_data) << 8));
#endif
#endif //CHECK_IN_OUT
if (pcommand->digit_data.byte05.bit_data.bit1 == 1)
{
//xreset_error_all();
}
// write_dig_out();
//calc_norm_ADC(0);
calc_norm_ADC_0(1);
calc_norm_ADC_1(1);
// ïðîâåðêà êëþ÷åé
tk0 = (pcommand->digit_data.byte01.byte_data);
tk1 = (pcommand->digit_data.byte02.byte_data);
tk2 = (pcommand->digit_data.byte03.byte_data);
tk3 = (pcommand->digit_data.byte04.byte_data);
Data1 = pcommand->analog_data.analog1_hi;
Data2 = pcommand->analog_data.analog1_lo;
Data = (Data2 + Data1*256);
period1 = Data;
Data1 = pcommand->analog_data.analog2_hi;
Data2 = pcommand->analog_data.analog2_lo;
Data = (Data2 + Data1*256);
period2 = Data;
Data1 = pcommand->analog_data.analog3_hi;
Data2 = pcommand->analog_data.analog3_lo;
Data = (Data2 + Data1*256);
period3 = Data;
Data1 = pcommand->analog_data.analog4_hi;
Data2 = pcommand->analog_data.analog4_lo;
Data = (Data2 + Data1*256);
// Data = 200;
tk_time_soft_off = Data*100.0; // mks*10->ns
if (tk_time_soft_off>1300000.0)
tk_time_soft_off = 1300000.0;
tk_time_soft_off_d = (unsigned long)(tk_time_soft_off / DIV_TIME_TK_SOFT_OFF);
if (tk_time_soft_off_d>65535)
tk_time_soft_off_d = 65535;
Data1 = pcommand->analog_data.analog5_hi;
Data2 = pcommand->analog_data.analog5_lo;
Data = (Data2 + Data1*256);
i_af_protect_a = Data;
if (i_af_protect_a>LEVEL_HWP_I_AF) i_af_protect_a = LEVEL_HWP_I_AF;
if (i_af_protect_a<10) i_af_protect_a = 10;
i_af_protect_d = convert_real_to_mv_hwp(4,i_af_protect_a);
if (i_af_protect_d>1500) i_af_protect_d = 1500; // max 1500 mV
update_maz_level_i_af(0, i_af_protect_d);
project.read_all_hwp();
if(pcommand->digit_data.byte05.bit_data.bit3 == 1)
doubleImpulse = 1;
else
doubleImpulse = 0;
if(pcommand->digit_data.byte05.bit_data.bit5 == 1)
sinusImpulse = 1;
else
sinusImpulse = 0;
if ((pcommand->digit_data.byte05.bit_data.bit0 == 1) && (prev_Go == 0))
{
if (pcommand->digit_data.byte05.bit_data.bit2 == 1) // ïðè öèêë èìïóëüñå ïðåäâàðèòåëüíî äàåì êâèòèðîâàíèå
{
update_maz_level_i_af(0, 1500);
project.write_all_hwp();
clear_errors();
project.clear_errors_all_plates();
update_maz_level_i_af(0, i_af_protect_d);
project.write_all_hwp();
}
// test_tk_ak_one_impulse( tk0, tk1, tk2, tk3, period1, period2);
#if (USE_TK_0)
project.cds_tk[0].write.sbus.protect_error.bit.enable_soft_disconnect = !disable_tk_soft_off;
project.cds_tk[0].write.sbus.protect_error.bit.detect_soft_disconnect = !disable_protect_tk_soft_off;
project.cds_tk[0].write.sbus.protect_error.bit.enable_line_err = enable_line_err;
project.cds_tk[0].write.sbus.time_after_err = tk_time_soft_off_d;//(int)(tk_time_soft_off / DIV_TIME_TK_SOFT_OFF);
#endif
#if (USE_TK_1)
project.cds_tk[1].write.sbus.protect_error.bit.enable_soft_disconnect = !disable_tk_soft_off;
project.cds_tk[1].write.sbus.protect_error.bit.detect_soft_disconnect = !disable_protect_tk_soft_off;
project.cds_tk[1].write.sbus.protect_error.bit.enable_line_err = enable_line_err;
project.cds_tk[1].write.sbus.time_after_err = tk_time_soft_off_d;//(int)(tk_time_soft_off / DIV_TIME_TK_SOFT_OFF);
#endif
#if (USE_TK_3)
project.cds_tk[3].write.sbus.protect_error.bit.enable_soft_disconnect = !disable_tk_soft_off;
project.cds_tk[3].write.sbus.protect_error.bit.detect_soft_disconnect = !disable_protect_tk_soft_off;
project.cds_tk[3].write.sbus.protect_error.bit.enable_line_err = enable_line_err;
project.cds_tk[3].write.sbus.time_after_err = tk_time_soft_off_d;//(int)(tk_time_soft_off / DIV_TIME_TK_SOFT_OFF);
#endif
project.write_all_sbus();
project.write_all_hwp();
test_tk_ak_one_impulse( tk0, tk1, tk2, tk3, period1, period2, period3, doubleImpulse, sinusImpulse, soft_off_enable, soft_on_enable);
}
if ((pcommand->digit_data.byte05.bit_data.bit0 == 1) &&
(pcommand->digit_data.byte05.bit_data.bit3 == 1) && (prev_Go == 0))
{
// test_tk_ak_sinus_period( tk0, tk1, tk2, tk3, period1, period2);
}
prev_Go = pcommand->digit_data.byte05.bit_data.bit0;
f.Prepare = pcommand->digit_data.byte05.bit_data.bit1;
if (pcommand->digit_data.byte05.bit_data.bit1 != prev_Prepare)
{
if (pcommand->digit_data.byte05.bit_data.bit1==1)
{
stop_wdog();
update_maz_level_i_af(0, 1500);
project.write_all_hwp();
clear_errors();
project.clear_errors_all_plates();
update_maz_level_i_af(0, i_af_protect_d);
project.write_all_hwp();
}
}
prev_Prepare = pcommand->digit_data.byte05.bit_data.bit1;
if (pcommand->digit_data.byte05.bit_data.bit2 == 1)
{
prev_Go = 0; // çàöèêëèëè Go
}
// break_all_on_off(pcommand->digit_data.byte05.bit_data.bit5);
/*
if (pcommand->digit_data.byte05.bit_data.bit5 != flag_prev_turn_off) //turn off
{
if(pcommand->digit_data.byte05.bit_data.bit5 == 1)
{
project.cds_out[0].fpga.Write.Dout.bit.dout2 = 1;
project.cds_out[0].fpga.Write.Dout.bit.dout12 = 1;
cds_out_all(cds_out_WriteAll);
pause_1000(100000);
pause_1000(100000);
pause_1000(100000);
pause_1000(100000);
project.cds_out[0].fpga.Write.Dout.bit.dout2 = 0;
project.cds_out[0].fpga.Write.Dout.bit.dout12 = 0;
cds_out_all(cds_out_WriteAll);
//f.Ready2 = 0;
f.On_Power_QTV = 0;
edrk.Go = 0;
}
flag_prev_turn_off = pcommand->digit_data.byte05.bit_data.bit5;
cds_out_all(cds_out_WriteAll);
}
if ((pcommand->digit_data.byte05.bit_data.bit6 != flag_prev_turn_on) && !f.Stop &&
// ((filter.iqU_1_long > 11184810) || (filter.iqU_3_long > 11184810))) //turn_on
((filter.iqU_1_long > 5590240) || (filter.iqU_3_long > 5590240)))
{
if(pcommand->digit_data.byte05.bit_data.bit6 == 1)
{
project.cds_out[0].fpga.Write.Dout.bit.dout7 = 0;
cds_out_all(cds_out_WriteAll);
pause_1000(100000);
pause_1000(100000);
pause_1000(100000);
pause_1000(100000);
pause_1000(100000);
project.cds_out[0].fpga.Write.Dout.bit.dout7 = 1;
cds_out_all(cds_out_WriteAll);
//f.Ready2 = 1;
f.On_Power_QTV = 1;
}
flag_prev_turn_on = pcommand->digit_data.byte05.bit_data.bit6;
cds_out_all(cds_out_WriteAll);
}
if(project.cds_in[1].fpga.input_new.ChanalsPtr.ChanalPtr[7].rd_status != flag_prev_lamp_on_off) //turnig on lamp when power is on
{
if(project.cds_in[1].fpga.input_new.ChanalsPtr.ChanalPtr[7].rd_status == 1)
{
project.cds_out[1].fpga.Write.Dout.bit.dout1 = 0;
cds_out_all(cds_out_WriteAll);
}
else
{
project.cds_out[1].fpga.Write.Dout.bit.dout1 = 1;
cds_out_all(cds_out_WriteAll);
}
flag_prev_lamp_on_off = project.cds_in[1].fpga.input_new.ChanalsPtr.ChanalPtr[7].rd_status;
}
*/
// run_break = pcommand->digit_data.byte05.bit_data.bit4;
if (pcommand->digit_data.byte05.bit_data.bit4 == 1)
{
adc_plate = 1;
}
else
adc_plate = 0;
if (pcommand->digit_data.byte05.bit_data.bit6 == 1)
i_sync_pin_on();
else
i_sync_pin_off();
Data = project.adc[adc_plate].read.pbus.adc_value[0];//InternalADC[0];//0;//ADC_sf[0];//_IQtoF(analog.iqIa1_1_fir_n)*2000.0;//
reply_test_all.analog_data.analog1_lo=LOBYTE(Data);
reply_test_all.analog_data.analog1_hi=HIBYTE(Data);
Data = project.adc[adc_plate].read.pbus.adc_value[1];// InternalADC[1];//0;//ADC_sf[1];//_IQtoF(analog.iqIa1_1_fir_n)*2000.0;//
reply_test_all.analog_data.analog2_lo=LOBYTE(Data);
reply_test_all.analog_data.analog2_hi=HIBYTE(Data);
Data = project.adc[adc_plate].read.pbus.adc_value[2];// InternalADC[2];//0;//ADC_sf[2];//_IQtoF(analog.iqIa1_1_fir_n)*2000.0;//
reply_test_all.analog_data.analog3_lo=LOBYTE(Data);
reply_test_all.analog_data.analog3_hi=HIBYTE(Data);
Data = project.adc[adc_plate].read.pbus.adc_value[3];// InternalADC[3];//0;//ADC_sf[3];//_IQtoF(analog.iqIa1_1_fir_n)*2000.0;//
reply_test_all.analog_data.analog4_lo=LOBYTE(Data);
reply_test_all.analog_data.analog4_hi=HIBYTE(Data);
Data = project.adc[adc_plate].read.pbus.adc_value[4];// InternalADC[4];//0;//ADC_sf[4];//_IQtoF(analog.iqIa1_1_fir_n)*2000.0;//
reply_test_all.analog_data.analog5_lo=LOBYTE(Data);
reply_test_all.analog_data.analog5_hi=HIBYTE(Data);
Data = project.adc[adc_plate].read.pbus.adc_value[5];// InternalADC[5];//0;//ADC_sf[5];//_IQtoF(analog.iqIa1_1_fir_n)*2000.0;//
reply_test_all.analog_data.analog6_lo=LOBYTE(Data);
reply_test_all.analog_data.analog6_hi=HIBYTE(Data);
Data = project.adc[adc_plate].read.pbus.adc_value[6];// InternalADC[6];//0;//ADC_sf[6];//_IQtoF(analog.iqIa1_1_fir_n)*2000.0;//
reply_test_all.analog_data.analog7_lo=LOBYTE(Data);
reply_test_all.analog_data.analog7_hi=HIBYTE(Data);
Data = project.adc[adc_plate].read.pbus.adc_value[7];//InternalADC[7];//0;//ADC_sf[7];//_IQtoF(analog.iqIa1_1_fir_n)*2000.0;//
reply_test_all.analog_data.analog8_lo=LOBYTE(Data);
reply_test_all.analog_data.analog8_hi=HIBYTE(Data);
Data = project.adc[adc_plate].read.pbus.adc_value[8];//InternalADC[8];//0;//ADC_sf[8];//_IQtoF(analog.iqIa1_1_fir_n)*2000.0;//
reply_test_all.analog_data.analog9_lo=LOBYTE(Data);
reply_test_all.analog_data.analog9_hi=HIBYTE(Data);
Data = project.adc[adc_plate].read.pbus.adc_value[9];//InternalADC[9];//0;//ADC_sf[9];//_IQtoF(analog.iqIa1_1_fir_n)*2000.0;//
reply_test_all.analog_data.analog10_lo=LOBYTE(Data);
reply_test_all.analog_data.analog10_hi=HIBYTE(Data);
Data = project.adc[adc_plate].read.pbus.adc_value[10];//InternalADC[10];//0;//ADC_sf[10];//_IQtoF(analog.iqIa1_1_fir_n)*2000.0;//
reply_test_all.analog_data.analog11_lo=LOBYTE(Data);
reply_test_all.analog_data.analog11_hi=HIBYTE(Data);
Data = project.adc[adc_plate].read.pbus.adc_value[11];//InternalADC[11];//0;//ADC_sf[11];//_IQtoF(analog.iqIa1_1_fir_n)*2000.0;//
reply_test_all.analog_data.analog12_lo=LOBYTE(Data);
reply_test_all.analog_data.analog12_hi=HIBYTE(Data);
Data = project.adc[adc_plate].read.pbus.adc_value[12];//InternalADC[12];//0;//ADC_sf[12];//_IQtoF(analog.iqIa1_1_fir_n)*2000.0;//
reply_test_all.analog_data.analog13_lo=LOBYTE(Data);
reply_test_all.analog_data.analog13_hi=HIBYTE(Data);
Data = project.adc[adc_plate].read.pbus.adc_value[13];//InternalADC[13];//0;//ADC_sf[13];//_IQtoF(analog.iqIa1_1_fir_n)*2000.0;//
reply_test_all.analog_data.analog14_lo=LOBYTE(Data);
reply_test_all.analog_data.analog14_hi=HIBYTE(Data);
Data = project.adc[adc_plate].read.pbus.adc_value[14];//InternalADC[14];//0;//ADC_sf[14];//_IQtoF(analog.iqIa1_1_fir_n)*2000.0;//
reply_test_all.analog_data.analog15_lo=LOBYTE(Data);
reply_test_all.analog_data.analog15_hi=HIBYTE(Data);
Data = project.adc[adc_plate].read.pbus.adc_value[15];//InternalADC[15];//0;//ADC_sf[15];//_IQtoF(analog.iqIa1_1_fir_n)*2000.0;//
reply_test_all.analog_data.analog16_lo=LOBYTE(Data);
reply_test_all.analog_data.analog16_hi=HIBYTE(Data);
Data = _IQtoF(analog.iqU_1) * NORMA_ACP;
reply_ans->analog_data.analog17_lo=LOBYTE(Data);
reply_ans->analog_data.analog17_hi=HIBYTE(Data);
Data = _IQtoF(analog.iqU_2) * NORMA_ACP;
reply_ans->analog_data.analog18_lo=LOBYTE(Data);
reply_ans->analog_data.analog18_hi=HIBYTE(Data);
Data = project.cds_tk[0].read.sbus.time_err_tk_all.bit.tk_3210;
reply_ans->analog_data.analog19_lo=LOBYTE(Data);
reply_ans->analog_data.analog19_hi=HIBYTE(Data);
Data = project.cds_tk[0].read.sbus.time_err_tk_all.bit.tk_7654;
reply_ans->analog_data.analog20_lo=LOBYTE(Data);
reply_ans->analog_data.analog20_hi=HIBYTE(Data);
Data = project.cds_tk[1].read.sbus.time_err_tk_all.bit.tk_3210;
reply_ans->analog_data.analog21_lo=LOBYTE(Data);
reply_ans->analog_data.analog21_hi=HIBYTE(Data);
Data = project.cds_tk[1].read.sbus.time_err_tk_all.bit.tk_7654;
reply_ans->analog_data.analog22_lo=LOBYTE(Data);
reply_ans->analog_data.analog22_hi=HIBYTE(Data);
Data = project.cds_tk[2].read.sbus.time_err_tk_all.bit.tk_3210;
reply_ans->analog_data.analog23_lo=LOBYTE(Data);
reply_ans->analog_data.analog23_hi=HIBYTE(Data);
Data = project.cds_tk[2].read.sbus.time_err_tk_all.bit.tk_7654;
reply_ans->analog_data.analog24_lo=LOBYTE(Data);
reply_ans->analog_data.analog24_hi=HIBYTE(Data);
// Data = project.cds_tk[3].read.sbus.time_err_tk_all.bit.tk_3210;
// reply_ans->analog_data.analog25_lo=LOBYTE(Data);
// reply_ans->analog_data.analog25_hi=HIBYTE(Data);
//
// Data = project.cds_tk[3].read.sbus.time_err_tk_all.bit.tk_7654;
// reply_ans->analog_data.analog26_lo=LOBYTE(Data);
// reply_ans->analog_data.analog26_hi=HIBYTE(Data);
reply_ans->digit_data.byte01.byte_data = 0;
reply_ans->digit_data.byte02.byte_data = 0;
reply_ans->digit_data.byte03.byte_data = 0;
reply_ans->digit_data.byte04.byte_data = 0;
reply_ans->digit_data.byte05.byte_data = 0;
reply_ans->digit_data.byte06.byte_data = 0;
reply_ans->digit_data.byte07.byte_data = 0;
reply_ans->digit_data.byte08.byte_data = 0;
reply_ans->digit_data.byte09.byte_data = 0;
reply_ans->digit_data.byte10.byte_data = 0;
reply_ans->digit_data.byte11.byte_data = 0;
reply_ans->digit_data.byte12.byte_data = 0;
reply_ans->digit_data.byte13.byte_data = 0;
reply_ans->digit_data.byte14.byte_data = 0;
reply_ans->digit_data.byte15.byte_data = 0;
reply_ans->digit_data.byte16.byte_data = 0;
reply_ans->digit_data.byte17.byte_data = 0;
reply_ans->digit_data.byte18.byte_data = 0;
reply_ans->digit_data.byte19.byte_data = 0;
reply_ans->digit_data.byte20.byte_data = 0;
reply_ans->digit_data.byte21.byte_data = 0;
reply_ans->digit_data.byte22.byte_data = 0;
reply_ans->digit_data.byte23.byte_data = 0;
reply_ans->digit_data.byte24.byte_data = 0;
reply_ans->digit_data.byte01.bit_data.bit0 = project.cds_tk[0].read.sbus.current_status_error.bit.err0_local;
reply_ans->digit_data.byte01.bit_data.bit1 = project.cds_tk[1].read.sbus.current_status_error.bit.err0_local;
reply_ans->digit_data.byte01.bit_data.bit2 = project.cds_tk[2].read.sbus.current_status_error.bit.err0_local;
reply_ans->digit_data.byte01.bit_data.bit3 = project.cds_tk[3].read.sbus.current_status_error.bit.err0_local;
reply_ans->digit_data.byte01.bit_data.bit4 = project.cds_tk[0].read.sbus.current_status_error.bit.err_power;
reply_ans->digit_data.byte01.bit_data.bit5 = project.cds_tk[1].read.sbus.current_status_error.bit.err_power;
reply_ans->digit_data.byte01.bit_data.bit6 = project.cds_tk[2].read.sbus.current_status_error.bit.err_power;
reply_ans->digit_data.byte01.bit_data.bit7 = project.cds_tk[3].read.sbus.current_status_error.bit.err_power;
reply_ans->digit_data.byte02.bit_data.bit0 = project.cds_in[0].read.sbus.current_status_error.bit.err_power;
reply_ans->digit_data.byte02.bit_data.bit1 = project.cds_in[1].read.sbus.current_status_error.bit.err_power;
#if(C_cds_in_number>=3)
reply_ans->digit_data.byte02.bit_data.bit2 = project.cds_in[2].read.sbus.current_status_error.bit.err_power;
#endif
reply_ans->digit_data.byte02.bit_data.bit3 = project.cds_out[0].read.sbus.current_status_error.bit.err_power;
reply_ans->digit_data.byte02.bit_data.bit4 = project.cds_out[1].read.sbus.current_status_error.bit.err_power;
reply_ans->digit_data.byte02.bit_data.bit5 = 0;
reply_ans->digit_data.byte02.bit_data.bit6 = project.cds_tk[0].read.sbus.current_status_error.bit.err_switch;
reply_ans->digit_data.byte02.bit_data.bit7 = project.cds_tk[1].read.sbus.current_status_error.bit.err_switch;
reply_ans->digit_data.byte03.bit_data.bit0 = project.cds_tk[2].read.sbus.current_status_error.bit.err_switch;
reply_ans->digit_data.byte03.bit_data.bit1 = project.cds_tk[3].read.sbus.current_status_error.bit.err_switch;
reply_ans->digit_data.byte03.bit_data.bit2 = project.cds_in[0].read.sbus.current_status_error.bit.err_switch;
reply_ans->digit_data.byte03.bit_data.bit3 = project.cds_in[1].read.sbus.current_status_error.bit.err_switch;
#if(C_cds_in_number>=3)
reply_ans->digit_data.byte03.bit_data.bit4 = project.cds_in[2].read.sbus.current_status_error.bit.err_switch;
#endif
reply_ans->digit_data.byte03.bit_data.bit5 = project.cds_out[0].read.sbus.current_status_error.bit.err_switch;
reply_ans->digit_data.byte03.bit_data.bit6 = project.cds_out[1].read.sbus.current_status_error.bit.err_switch;
reply_ans->digit_data.byte03.bit_data.bit7 = 0;
//TK0 acknolege-current
reply_ans->digit_data.byte04.byte_data = project.cds_tk[0].read.sbus.status_protect_current_ack.all & 0xFF;
reply_ans->digit_data.byte05.byte_data = (project.cds_tk[0].read.sbus.status_protect_current_ack.all >> 8) & 0xFF;
//TK1 acknolege-current
reply_ans->digit_data.byte06.byte_data = project.cds_tk[1].read.sbus.status_protect_current_ack.all & 0xFF;
reply_ans->digit_data.byte07.byte_data = (project.cds_tk[1].read.sbus.status_protect_current_ack.all >> 8) & 0xFF;
//TK2 acknolege-current
reply_ans->digit_data.byte08.byte_data = project.cds_tk[2].read.sbus.status_protect_current_ack.all & 0xFF;
reply_ans->digit_data.byte09.byte_data = (project.cds_tk[2].read.sbus.status_protect_current_ack.all >> 8) & 0xFF;
//TK3 acknolege-current
reply_ans->digit_data.byte10.byte_data = project.cds_tk[3].read.sbus.status_protect_current_ack.all & 0xFF;
reply_ans->digit_data.byte11.byte_data = (project.cds_tk[3].read.sbus.status_protect_current_ack.all >> 8) & 0xFF;
//IN1
reply_ans->digit_data.byte13.byte_data = project.cds_in[0].read.pbus.data_in.all & 0xFF;
reply_ans->digit_data.byte14.byte_data = (project.cds_in[0].read.pbus.data_in.all >> 8) & 0xFF;
//IN2
reply_ans->digit_data.byte15.byte_data = project.cds_in[1].read.pbus.data_in.all & 0xFF;
reply_ans->digit_data.byte16.byte_data = (project.cds_in[1].read.pbus.data_in.all >> 8) & 0xFF;
//IN3
#if(C_cds_in_number>=3)
reply_ans->digit_data.byte17.byte_data = project.cds_in[2].read.pbus.data_in.all & 0xFF;
reply_ans->digit_data.byte18.byte_data = (project.cds_in[2].read.pbus.data_in.all >> 8) & 0xFF;
#endif
reply_ans->digit_data.byte19.bit_data.bit0 = get_status_sync_line();//CAN_timeout[UKSS1_CAN_DEVICE];
//reply.digit_data.byte21.bit_data.bit1 = CAN_timeout[UKSS4_CAN_DEVICE];
reply_ans->digit_data.byte19.bit_data.bit2 = 0;// CAN_timeout[UKSS2_CAN_DEVICE];
reply_ans->digit_data.byte19.bit_data.bit3 = 0;// CAN_timeout[UKSS3_CAN_DEVICE];
reply_ans->digit_data.byte19.bit_data.bit4 = CAN_timeout[get_real_in_mbox(UNITS_TYPE_BOX,ZADATCHIK_CAN)];
//reply_test_all.digit_data.byte19.bit_data.bit5 = CAN_timeout[VPU2_CAN_DEVICE];
reply_ans->digit_data.byte19.bit_data.bit6 = CAN_timeout[get_real_in_mbox(UNITS_TYPE_BOX,UMU_CAN_DEVICE)];
//reply.digit_data.byte21.bit_data.bit7 = CAN_timeout[VPU1_CAN_DEVICE];
reply_ans->digit_data.byte20.bit_data.bit0 = project.controller.read.errors.bit.er0_out;
reply_ans->digit_data.byte20.bit_data.bit1 = project.controller.read.errors.bit.er0_trig;
reply_ans->digit_data.byte20.bit_data.bit2 = project.controller.read.errors.bit.errHWP;
reply_ans->digit_data.byte20.bit_data.bit3 = project.controller.read.errors.bit.errHWP_trig;
reply_ans->digit_data.byte20.bit_data.bit4 = project.controller.read.errors.bit.error_pbus;
reply_ans->digit_data.byte20.bit_data.bit5 = project.controller.read.errors.bit.pwm_wdog;
reply_ans->digit_data.byte20.bit_data.bit6 = project.controller.read.errors.bit.status_er0;
// reply_ans->digit_data.byte20.bit_data.bit0 = project.controller.read.errors.bit.er0_out;
// reply_ans->digit_data.byte20.bit_data.bit0 = CAN_timeout[get_real_in_mbox(UNITS_TYPE_BOX,VPU_CAN)];
// reply_ans->digit_data.byte20.bit_data.bit1 = CAN_timeout[get_real_in_mbox(MPU_TYPE_BOX,0)];
reply_ans->digit_data.byte20.bit_data.bit2 = 0;//READY_UKSS_6;
reply_ans->digit_data.byte20.bit_data.bit3 = 0;//READY_UKSS_7;
reply_ans->digit_data.byte20.bit_data.bit4 = 0;//READY_UKSS_8;
//reply_test_all.digit_data.byte20.bit_data.bit5 = READY_UKSS_1;
//reply_test_all.digit_data.byte20.bit_data.bit6 = READY_UKSS_2;
//reply_test_all.digit_data.byte20.bit_data.bit7 = READY_UKSS_3;
reply_ans->digit_data.byte21.bit_data.bit0 = !project.hwp[0].status;//XProject_balzam.IsReady_reg.bit.XPlaneHWP_Chanals_IsReady;
reply_ans->digit_data.byte21.bit_data.bit2 = !project.adc[0].status;//XProject_balzam.IsReady_reg.bit.XPlaneHWP_Chanals_IsReady;
#if(C_cds_in_number>=1)
reply_ans->digit_data.byte21.bit_data.bit3 = !project.cds_in[0].status;//XProject_balzam.IsReady_reg.bit.XPlaneIN0_IsReady;
#endif
#if(C_cds_in_number>=2)
reply_ans->digit_data.byte21.bit_data.bit4 = !project.cds_in[1].status;//XProject_balzam.IsReady_reg.bit.XPlaneIN1_IsReady;
#endif
#if(C_cds_in_number>=3)
reply_ans->digit_data.byte21.bit_data.bit5 = !project.cds_in[2].status;//XProject_balzam.IsReady_reg.bit.XPlaneIN2_IsReady;
#endif
#if(C_cds_out_number>=1)
reply_ans->digit_data.byte21.bit_data.bit6 = !project.cds_out[0].status;//XProject_balzam.IsReady_reg.bit.XPlaneOUT0_IsReady;
#endif
#if(C_cds_out_number>=2)
reply_ans->digit_data.byte21.bit_data.bit7 = !project.cds_out[1].status;//XProject_balzam.IsReady_reg.bit.XPlaneOUT1_IsReady;
#endif
#if(C_cds_out_number>=3)
reply_ans->digit_data.byte22.bit_data.bit0 = !project.cds_out[2].status;//XProject_balzam.IsReady_reg.bit.XPlaneOUT2_IsReady;
#endif
reply_ans->digit_data.byte22.bit_data.bit1 = !project.cds_tk[0].status;//XProject_balzam.IsReady_reg.bit.XPlaneTK0_IsReady;
reply_ans->digit_data.byte22.bit_data.bit2 = !project.cds_tk[1].status;//XProject_balzam.IsReady_reg.bit.XPlaneTK1_IsReady;
reply_ans->digit_data.byte22.bit_data.bit3 = !project.cds_tk[2].status;//XProject_balzam.IsReady_reg.bit.XPlaneTK2_IsReady;
reply_ans->digit_data.byte22.bit_data.bit4 = !project.cds_tk[3].status;//!XProject_balzam.IsReady_reg.bit.XPlaneTK3_IsReady;
reply_ans->digit_data.byte22.bit_data.bit5 = !project.adc[1].status;//XProject_balzam.IsReady_reg.bit.XPlaneHWP_Chanals_IsReady;
reply_ans->digit_data.byte23.byte_data=project.hwp[0].read.comp_s.minus.all & 0x00ff;
reply_ans->digit_data.byte24.byte_data=((project.hwp[0].read.comp_s.minus.all >> 8) & 0x00ff);
reply_ans->digit_data.byte23.byte_data|=project.hwp[0].read.comp_s.plus.all & 0x00ff;
reply_ans->digit_data.byte24.byte_data|=((project.hwp[0].read.comp_s.plus.all >> 8) & 0x00ff);
#if (USE_TK_0)
if (project.cds_tk[0].useit)
{
// reply_ans->digit_data.byte22.bit_data.bit0 = project.cds_tk[0].read.sbus.lock_status_error.bit.err0_in;
reply_ans->digit_data.byte25.bit_data.bit0 = project.cds_tk[0].read.sbus.lock_status_error.bit.err_hwp;
reply_ans->digit_data.byte25.bit_data.bit1 = project.cds_tk[0].read.sbus.lock_status_error.bit.err0_local;
reply_ans->digit_data.byte25.bit_data.bit2 = project.cds_tk[0].read.sbus.lock_status_error.bit.mintime_err_keys_7654;
reply_ans->digit_data.byte25.bit_data.bit3 = project.cds_tk[0].read.sbus.lock_status_error.bit.mintime_err_keys_3210;
reply_ans->digit_data.byte25.bit_data.bit4 = project.cds_tk[0].read.sbus.lock_status_error.bit.line_err_keys_7654;
reply_ans->digit_data.byte25.bit_data.bit5 = project.cds_tk[0].read.sbus.lock_status_error.bit.line_err_keys_3210;
reply_ans->digit_data.byte25.bit_data.bit6 = project.cds_tk[0].read.sbus.lock_status_error.bit.ErrorSoftShutdownFromErr0;
reply_ans->digit_data.byte25.bit_data.bit7 = project.cds_tk[0].read.sbus.lock_status_error.bit.ErrorSoftShutdownForbidComb;
}
else
reply_ans->digit_data.byte25.byte_data = 0;
#else
reply_ans->digit_data.byte25.byte_data = 0;
#endif
#if (USE_TK_1)
if (project.cds_tk[1].useit)
{
reply_ans->digit_data.byte26.bit_data.bit0 = project.cds_tk[1].read.sbus.lock_status_error.bit.err_hwp;
reply_ans->digit_data.byte26.bit_data.bit1 = project.cds_tk[1].read.sbus.lock_status_error.bit.err0_local;
reply_ans->digit_data.byte26.bit_data.bit2 = project.cds_tk[1].read.sbus.lock_status_error.bit.mintime_err_keys_7654;
reply_ans->digit_data.byte26.bit_data.bit3 = project.cds_tk[1].read.sbus.lock_status_error.bit.mintime_err_keys_3210;
reply_ans->digit_data.byte26.bit_data.bit4 = project.cds_tk[1].read.sbus.lock_status_error.bit.line_err_keys_7654;
reply_ans->digit_data.byte26.bit_data.bit5 = project.cds_tk[1].read.sbus.lock_status_error.bit.line_err_keys_3210;
reply_ans->digit_data.byte26.bit_data.bit6 = project.cds_tk[1].read.sbus.lock_status_error.bit.ErrorSoftShutdownFromErr0;
reply_ans->digit_data.byte26.bit_data.bit7 = project.cds_tk[1].read.sbus.lock_status_error.bit.ErrorSoftShutdownForbidComb;
}
else
reply_ans->digit_data.byte26.byte_data = 0;
#else
reply_ans->digit_data.byte26.byte_data = 0;
#endif
#if (USE_TK_2)
if (project.cds_tk[2].useit)
{
reply_ans->digit_data.byte27.bit_data.bit0 = project.cds_tk[2].read.sbus.lock_status_error.bit.err_hwp;
reply_ans->digit_data.byte27.bit_data.bit1 = project.cds_tk[2].read.sbus.lock_status_error.bit.err0_local;
reply_ans->digit_data.byte27.bit_data.bit2 = project.cds_tk[2].read.sbus.lock_status_error.bit.mintime_err_keys_7654;
reply_ans->digit_data.byte27.bit_data.bit3 = project.cds_tk[2].read.sbus.lock_status_error.bit.mintime_err_keys_3210;
reply_ans->digit_data.byte27.bit_data.bit4 = project.cds_tk[2].read.sbus.lock_status_error.bit.line_err_keys_7654;
reply_ans->digit_data.byte27.bit_data.bit5 = project.cds_tk[2].read.sbus.lock_status_error.bit.line_err_keys_3210;
reply_ans->digit_data.byte27.bit_data.bit6 = project.cds_tk[2].read.sbus.lock_status_error.bit.ErrorSoftShutdownFromErr0;
reply_ans->digit_data.byte27.bit_data.bit7 = project.cds_tk[2].read.sbus.lock_status_error.bit.ErrorSoftShutdownForbidComb;
}
else
reply_ans->digit_data.byte27.byte_data = 0;
#else
reply_ans->digit_data.byte27.byte_data = 0;
#endif
#if (USE_TK_3)
if (project.cds_tk[3].useit)
{
reply_ans->digit_data.byte28.bit_data.bit0 = project.cds_tk[3].read.sbus.lock_status_error.bit.err_hwp;
reply_ans->digit_data.byte28.bit_data.bit1 = project.cds_tk[3].read.sbus.lock_status_error.bit.err0_local;
reply_ans->digit_data.byte28.bit_data.bit2 = project.cds_tk[3].read.sbus.lock_status_error.bit.mintime_err_keys_7654;
reply_ans->digit_data.byte28.bit_data.bit3 = project.cds_tk[3].read.sbus.lock_status_error.bit.mintime_err_keys_3210;
reply_ans->digit_data.byte28.bit_data.bit4 = project.cds_tk[3].read.sbus.lock_status_error.bit.line_err_keys_7654;
reply_ans->digit_data.byte28.bit_data.bit5 = project.cds_tk[3].read.sbus.lock_status_error.bit.line_err_keys_3210;
reply_ans->digit_data.byte28.bit_data.bit6 = project.cds_tk[3].read.sbus.lock_status_error.bit.ErrorSoftShutdownFromErr0;
reply_ans->digit_data.byte28.bit_data.bit7 = project.cds_tk[3].read.sbus.lock_status_error.bit.ErrorSoftShutdownForbidComb;
}
else
reply_ans->digit_data.byte28.byte_data = 0;
#else
reply_ans->digit_data.byte28.byte_data = 0;
#endif
/*
//IN1 ready
reply_ans->digit_data.byte21.byte_data = project.cds_in[0].read.pbus.ready_in.all & 0xFF;
reply_ans->digit_data.byte22.byte_data = (project.cds_in[0].read.pbus.ready_in.all >> 8) & 0xFF;
//TK0 acknolege-current
reply_ans->digit_data.byte23.byte_data = project.cds_tk[0].read.sbus.status_protect_current_ack.all & 0xFF;
reply_ans->digit_data.byte24.byte_data = (project.cds_tk[0].read.sbus.status_protect_current_ack.all >> 8) & 0xFF;
*/
return;
}

33
Inu/Src/main/message2test.h Normal file
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////////////////////////////////////////////
// message.h
//
// Струкруры сообщений между:
// 1. контроллером преобразователy
// 2. координирующим контроллером
// 3. контроллером верхнего уровнy
//
// Данный файл может быть использован при
// компилyции программы длy исполнениy на разных
// платформах. В частности на INTEL 386SX Octagon
// и на TMS320C32 Texas Instruments.
// Передача данных через последовательный интерфейс
// происходит побайтно.
// С учетом этого выбранный тип длy передаваемых данных
// unsigned char = 8 бит
// на TMS320C32 unsigned char = 32 бит, но используютсy
// только младшие 8 бит.
// !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
// Особое внимание уделить упаковке структур на разных
// платформах в зависимости от границ выравниваниy
// !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
////////////////////////////////////////////
#ifndef MESSAGE_TEST_H
#define MESSAGE_TEST_H
#include "RS_Function_terminal.h"
void func_fill_answer_to_TMS_test(TMS_TO_TERMINAL_TEST_ALL_STRUCT* reply_ans, CMD_TO_TMS_TEST_ALL_STRUCT* pcommand);
#endif //MESSAGE_H

897
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#include <message_modbus.h>
#include <message_terminals_can.h>
#include <message2.h>
#include <modbus_hmi.h>
#include <project.h>
#include <vector.h>
#include <modbus_hmi_update.h>
#include "CAN_Setup.h"
#include "global_time.h"
#include "modbus_table_v2.h"
#include "oscil_can.h"
#include "RS_modbus_pult.h"
#include "DSP281x_Examples.h" // DSP281x Examples Include File
#include "DSP281x_Device.h" // DSP281x Headerfile Include File
#include "CRC_Functions.h"
#include "RS_Function_terminal.h"
#include "RS_modbus_svu.h"
#include "TuneUpPlane.h"
#if (USE_CONTROL_STATION==1)
#include "control_station.h"
#endif
#include <message2can.h>
#include <edrk_main.h>
#include "pwm_test_lines.h"
#include "params.h"
#include "logs_hmi.h"
//#include "can_setup_21300.h"
//#include "modbus_can.h"
//static int err_modbus3=1;
//static int err_modbus16=1;
//static int cmd_3_or_16=0;
int enable_can = 0;
void write_all_data_to_mpu_485(int run_force)
{
static unsigned int time_tick_modbus = 0;
static unsigned int old_PWM_ticks = 0;
static int count_write_to_modbus = 0;
static int cur_position_buf_modbus16 = 0;
if (global_time.pwm_tics != old_PWM_ticks)
{
if (global_time.pwm_tics > old_PWM_ticks)
time_tick_modbus = time_tick_modbus + (global_time.pwm_tics - old_PWM_ticks);
else
time_tick_modbus++;
}
if (time_tick_modbus > TIME_PAUSE_MODBUS_MPU)
{
// pause_1000()
time_tick_modbus = 0;
pause_1000(10);
// SendCommandModbus3(&rs_b, 0x1, 0xc012,1);
// rs_b.flag_LEADING = 0;
if (!rs_b.flag_LEADING)
{
time_tick_modbus = 0;
//Fast answer to SVU when command changed
// if (flag_send_answer_rs) {
// flag_send_answer_rs = 0;
// err_modbus16++;
// SendCommandModbus16(&rs_b,1,210,SIZE_BUF_WRITE_TO_MODBUS16);
// return;
// }
if (err_modbus16 == 0)
cur_position_buf_modbus16 = cur_position_buf_modbus16 + SIZE_BUF_WRITE_TO_MODBUS16_VPU;
if (cur_position_buf_modbus16 >= SIZE_MODBUS_TABLE)
cur_position_buf_modbus16 = 0;
if ((cur_position_buf_modbus16 + SIZE_BUF_WRITE_TO_MODBUS16_VPU) > SIZE_MODBUS_TABLE)
count_write_to_modbus = SIZE_MODBUS_TABLE - cur_position_buf_modbus16;
else
count_write_to_modbus = SIZE_BUF_WRITE_TO_MODBUS16_VPU;
// count_write_to_modbus = SIZE_BUF_WRITE_TO_MODBUS16_VPU;
// cur_position_buf_modbus=0;
err_modbus16++;
if (err_modbus16 > MAX_COUNT_ERROR_FROM_RS_MPU)
f.RS_MPU_ERROR = 1;
ModbusRTUsend16(&rs_b, 1,
ADR_MODBUS_TABLE + cur_position_buf_modbus16,
count_write_to_modbus);
// SendCommandModbus16(&rs_b,1,ADR_MODBUS_TABLE+cur_position_buf_modbus16,count_write_to_modbus);
// SendCommandModbus16(&rs_b,1,1,30);
//
// SendCommandModbus16(&rs_b,1,0xc001,0x64);
// err_modbus
}
}
}
void read_all_data_from_mpu_485(int run_force)
{
static unsigned int time_tick_modbus = 0;
static unsigned int old_PWM_ticks = 0;
static unsigned int count_write_to_modbus = 0;
static int cur_position_buf_modbus3 = 0;
if (global_time.pwm_tics != old_PWM_ticks)
{
if (global_time.pwm_tics > old_PWM_ticks)
time_tick_modbus = time_tick_modbus + (global_time.pwm_tics - old_PWM_ticks);
else
time_tick_modbus++;
}
old_PWM_ticks = global_time.pwm_tics;
if (TIME_PAUSE_MODBUS_MPU < time_tick_modbus)
{
// pause_1000()
pause_1000(10);
// SendCommandModbus3(&rs_b, 0x1, 0xc012,1);
//rs_b.flag_LEADING = 0;
if (!rs_b.flag_LEADING)
{
time_tick_modbus = 0;
if (err_modbus3 == 0)
cur_position_buf_modbus3 = cur_position_buf_modbus3 + SIZE_BUF_WRITE_TO_MODBUS16_VPU;
if (cur_position_buf_modbus3 >= SIZE_MODBUS_TABLE)
cur_position_buf_modbus3 = 0;
if ((cur_position_buf_modbus3 + SIZE_BUF_WRITE_TO_MODBUS16_VPU) > SIZE_MODBUS_TABLE)
count_write_to_modbus = SIZE_MODBUS_TABLE - cur_position_buf_modbus3;
else
count_write_to_modbus = SIZE_BUF_WRITE_TO_MODBUS16_VPU;
// count_write_to_modbus = SIZE_BUF_WRITE_TO_MODBUS16_VPU;
// cur_position_buf_modbus=0;
err_modbus3++;
if (err_modbus3 > MAX_COUNT_ERROR_FROM_RS_MPU)
f.RS_MPU_ERROR = 1;
// SendCommandModbus3(&rs_b,1,ADR_MODBUS_TABLE+cur_position_buf_modbus3,count_write_to_modbus);
ModbusRTUsend3(&rs_b, 1,
ADR_MODBUS_TABLE + cur_position_buf_modbus3,
count_write_to_modbus);
}
}
// time_tick_modbus++;
}
void write_all_data_to_mpu_can(int run_force, unsigned int pause)
{
// static int time_tick_modbus_can = 0;
static unsigned int old_time = 0;
static int count_write_to_modbus_can = 0;
// static int time_send_to_can = 0;
// static unsigned int counter_max_I = 0, counter_max_M = 0;
static int cur_position_buf_modbus16_can = 0, prev_send_to_can = 0;
int real_mbox;
unsigned int i;
real_mbox = get_real_out_mbox(MPU_TYPE_BOX, edrk.flag_second_PCH);
if (prev_send_to_can && CAN_cycle_full_free(real_mbox,CAN_BOX_STAT_OFF)==0)
{
old_time = (unsigned int)global_time.miliseconds;
return;
}
prev_send_to_can = 0;
if (!detect_pause_milisec(pause,&old_time))
return;
//
//
// if (cmd_3_or_16 == 1 || run_force)
// {
//
// if (global_time.pwm_tics != old_PWM_ticks)
// {
// if (global_time.pwm_tics > old_PWM_ticks)
// time_tick_modbus_can = time_tick_modbus_can + (global_time.pwm_tics - old_PWM_ticks);
// else
// time_tick_modbus_can++;
// }
//
// old_PWM_ticks = global_time.pwm_tics;
// }
// else
// {
// old_PWM_ticks = global_time.pwm_tics;
// return;
// }
//
//
//
// if (CAN_cycle_free(real_mbox))
// {
// if (time_send_to_can == 0)
// time_send_to_can = time_tick_modbus_can;
//
// // time_tick_modbus_can=0;
//
// }
// if(f.Prepare && CAN_cycle_free(real_mbox))
// {
// CAN_cycle_send( MPU_TYPE_BOX, 0, 198, &modbus_table_can_out[197].all, 1);
// }
// if (time_tick_modbus_can > TIME_PAUSE_MODBUS_CAN)
// {
// time_tick_modbus_can = 0;
// time_send_to_can = 0;
// // pause_1000(300);
if (CAN_cycle_full_free(real_mbox,CAN_BOX_STAT_ON))
{
/////////////////////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////////////////
if (cur_position_buf_modbus16_can >= SIZE_MODBUS_TABLE)
{
cur_position_buf_modbus16_can = 0;
// modbus_table_can_out[ADR_CAN_TEST_PLUS_ONE].all++;
}
// ñîõðàíÿåì âî âðåìåííîé ïàìÿòè ïåðåä íà÷àëîì ïåðåäà÷è âñåãî ìàññèâà ÷òîáû äàííûå íå ìåíÿëèñü âî âðåìÿ ïåðåäà÷è
if (cur_position_buf_modbus16_can == 0)
{
for (i=0;i<SIZE_MODBUS_TABLE;i++)
modbus_table_can_out_temp[i] = modbus_table_can_out[i];
}
if ((cur_position_buf_modbus16_can + SIZE_BUF_WRITE_TO_MODBUS16_CAN) >= SIZE_MODBUS_TABLE)
count_write_to_modbus_can = SIZE_MODBUS_TABLE - cur_position_buf_modbus16_can;
else
count_write_to_modbus_can = SIZE_BUF_WRITE_TO_MODBUS16_CAN;
if (CAN_cycle_full_free(real_mbox,CAN_BOX_STAT_ON))
{
// modbus_table_can_out[0x124].all++;
// CAN_cycle_send(MPU_CAN_DEVICE, cur_position_buf_modbus16_can+1, &modbus_table_can_out[cur_position_buf_modbus16_can].all, count_write_to_modbus_can);
CAN_cycle_send(
MPU_TYPE_BOX,
edrk.flag_second_PCH,
cur_position_buf_modbus16_can + 1,
// &modbus_table_can_out[cur_position_buf_modbus16_can].all,
&modbus_table_can_out_temp[cur_position_buf_modbus16_can].all,
count_write_to_modbus_can, CAN_BOX_STANDART_ADR, CAN_BOX_PRIORITY_NORMAL);
cur_position_buf_modbus16_can = cur_position_buf_modbus16_can + SIZE_BUF_WRITE_TO_MODBUS16_CAN;
}
}
// }
}
//void test_rs_can_with_svu_mpu()
//{
// int test_a, test_b;
//
// test_a = test_rs_live(&rs_a);
// test_b = test_rs_live(&rs_b);
//
// if (test_a == 0 && test_b == 0 && f.status_MODE_WORK_SVU == 0)
// {
// /* åñëè äîëãî íå îáùàëèñü òî ïðîèçâîäèì îñòàíîâêó è ïîâòîðíóþ èíèöèëèçàöèþ RS232 */
// if (test_can_live_mpu() == 0)
// {
// // if (f.cmd_to_go == 0) f.cmd_to_go = ERROR_CMD_GO_1;
// edrk.Go = 0; /* Îñòàíîâêà */
// }
// }
//
// if (test_a == 0 && test_b == 0 && f.status_MODE_WORK_MPU == 0 /*&& f.status_SPEED_SELECT_KEY==0*/)
// {
// /* åñëè äîëãî íå îáùàëèñü òî ïðîèçâîäèì îñòàíîâêó è ïîâòîðíóþ èíèöèëèçàöèþ RS232 */
// if (test_can_live_mpu() == 0)
// {
// // if (f.cmd_to_go == 0) f.cmd_to_go = ERROR_CMD_GO_2;
// edrk.Go = 0; /* Îñòàíîâêà */
// }
// }
//
// if (test_a == 2)
// {
// /* åñëè äîëãî íå îáùàëèñü òî ïðîèçâîäèì îñòàíîâêó è ïîâòîðíóþ èíèöèëèçàöèþ RS232 */
// // edrk.Go=0; /* Îñòàíîâêà */
// resetup_rs(&rs_a);
// }
//
// if (test_b == 2)
// {
// /* åñëè äîëãî íå îáùàëèñü òî ïðîèçâîäèì îñòàíîâêó è ïîâòîðíóþ èíèöèëèçàöèþ RS232 */
// resetup_rs(&rs_b);
//// flag_waiting_answer = 0; //Ñíèìàåòñß, ÷òîáû îáìåí ïåðåø¸ë íà ñëåäóþùèé çàïðîñ,
// //åñëè îäèí slave óìåð, äðóãîé ìîæåò îòâå÷àòü.
// }
//
// if (test_b == 5)
// {
// /* åñëè äîëãî íå îáùàëèñü òî ïðîèçâîäèì îñòàíîâêó è ïîâòîðíóþ èíèöèëèçàöèþ RS232 */
// resetup_rs(&rs_b);
//// flag_waiting_answer = 0; //Ñíèìàåòñß, ÷òîáû îáìåí ïåðåø¸ë íà ñëåäóþùèé çàïðîñ,
// //åñëè îäèí slave óìåð, äðóãîé ìîæåò îòâå÷àòü.
// }
//
// if (test_a == 4 && test_b == 4) //TODO: && SPEED_SELECT_REMOTE==1)
// {
// // åñëè äîëãî íå îáùàëèñü òî ïðîèçâîäèì îñòàíîâêó è ïîâòîðíóþ èíèöèëèçàöèþ RS232
// if (test_can_live_mpu() == 0)
// {
// // if (f.cmd_to_go == 0) f.cmd_to_go = ERROR_CMD_GO_3;
// edrk.Go = 0; // Îñòàíîâêà
// }
// resetup_mpu_rs(&rs_a);
// resetup_mpu_rs(&rs_b);
//// flag_waiting_answer = 0;
// }
//
// if (test_a == 4 && test_b == 4) //TOD: && SPEED_SELECT_REMOTE==0)
// {
// // åñëè äîëãî íå îáùàëèñü òî ïðîèçâîäèì îñòàíîâêó è ïîâòîðíóþ èíèöèëèçàöèþ RS232
// // if (test_can_live_mpu()==0)
//
// // test_can_live_terminal //
//
// {
// // if (f.cmd_to_go == 0) f.cmd_to_go = ERROR_CMD_GO_20;
// edrk.Go = 0; // Îñòàíîâêà
// }
// resetup_mpu_rs(&rs_a);
// resetup_mpu_rs(&rs_b);
// }
//
// if (test_a == 0 && f.status_MODE_WORK_MPU == 0) // && SPEED_SELECT_REMOTE==0)
// {
// /* åñëè äîëãî íå îáùàëèñü òî ïðîèçâîäèì îñòàíîâêó è ïîâòîðíóþ èíèöèëèçàöèþ RS232 */
// // if (test_can_live_mpu()==0)
// // if (f.cmd_to_go == 0) f.cmd_to_go = ERROR_CMD_GO_4;
// edrk.Go = 0; /* Îñòàíîâêà */
// }
//
// // if (CAN_timeout[]==1)
// // f.CAN_MPU_ERROR=CAN_timeout[MPU_CAN_DEVICE];
//}
#define TIME_REINIT_PULT_INGETEAM 5
void test_alive_pult_485(void)
{
static unsigned int time_pause = 0, old_time = 0;
//
// if (control_station.time_detect_answer_485[CONTROL_STATION_INGETEAM_PULT_RS485]>control_station.setup_time_detect_active_resend_485[CONTROL_STATION_INGETEAM_PULT_RS485])
// {
// resetup_mpu_rs(&rs_b);
// control_station.flag_waiting_answer[CONTROL_STATION_INGETEAM_PULT_RS485] = 0;
// control_station.flag_message_sent[CONTROL_STATION_INGETEAM_PULT_RS485] = 0;
// control_station.time_detect_answer_485[CONTROL_STATION_INGETEAM_PULT_RS485] = 0;
// }
/*
if (control_station.time_detect_active[CONTROL_STATION_INGETEAM_PULT_RS485]>control_station.setup_time_detect_active_resend_485[CONTROL_STATION_INGETEAM_PULT_RS485])
{
resetup_mpu_rs(&rs_b);
control_station.flag_waiting_answer[CONTROL_STATION_INGETEAM_PULT_RS485] = 0;
// control_station.time_detect_active[CONTROL_STATION_INGETEAM_PULT_RS485] = 0;
}
*/
// if (control_station.time_detect_active[CONTROL_STATION_INGETEAM_PULT_RS485]>control_station.setup_time_detect_active[CONTROL_STATION_INGETEAM_PULT_RS485])
// {
// resetup_mpu_rs(&rs_b);
// control_station.flag_waiting_answer[CONTROL_STATION_INGETEAM_PULT_RS485] = 0;
// control_station.time_detect_active[CONTROL_STATION_INGETEAM_PULT_RS485] = 0;
// }
/*
if (!detect_pause_milisec(CONTROL_STATION_TIME_WAIT,&old_time))
return;
time_pause++;
if (time_pause>=TIME_REINIT_PULT_INGETEAM)
{
flag_waiting_answer = 0; //Ñíèìàåòñß, ÷òîáû îáìåí ïåðåø¸ë íà ñëåäóþùèé çàïðîñ
}
*/
}
#define MAX_COUNT_WORK_IN_LOG 150
int modbusNetworkSharing(int flag_update_only_hmi)
{
static unsigned int old_time = 0 , old_time_refresh = 0, time_pause = TIME_PAUSE_MODBUS_REMOUTE;
static unsigned int old_time_status_3 = 0, time_pause_status_3 = 500;
int final_code=0;
static unsigned int status=0;
static int numberInT=0, enable_send_cmd = 0;
static int run_pause = 1, flag_next = 0, prev_flag_next = 0;
static int last_ok_cmd=0;
static int flag_only_one_cmd=0;
static int status_ok = 1, status_err = 0, flag_work_rs_send_log = 0, count_free = 0, count_work_in_log = 0;
#if(_ENABLE_PWM_LINES_FOR_TESTS_RS)
PWM_LINES_TK_20_ON;
#endif
RS232_WorkingWith(0,1,0);
// âêë òèï çàïðîñ-îòâåò äëÿ ñèñòåìû òàéìèíãà
// control_station.flag_waiting_answer[CONTROL_STATION_INGETEAM_PULT_RS485] = 1;
control_station_test_alive_all_control();
// if (detect_pause_milisec(100,&old_time_refresh))
control_station.update_timers(&control_station);
detecting_cmd_from_can();
// test_rs_can_with_svu_mpu();
// test_alive_pult_485();
// if (rs_b.RS_DataSended==0 && rs_b.RS_DataReadyAnswerAnalyze==0)
// status = 0;
control_station.flag_message_sent[CONTROL_STATION_INGETEAM_PULT_RS485] = rs_b.RS_DataSended;
final_code = 0;
switch(status)
{
case 0:
old_time = global_time.miliseconds;
status = 1;
if (time_pause==0)
status = 2;
break;
case 1:
// if (numberInT==0)
// {
if (detect_pause_milisec(time_pause,&old_time))
status = 2;
// }
// else
// status = 2;
break;
case 2:
enable_send_cmd = 1;
control_station.time_detect_answer_485[CONTROL_STATION_INGETEAM_PULT_RS485] = 0;
status = 3;
old_time_status_3 = global_time.miliseconds;
break;
case 3:
// // åñëè ìû â ïåðåäà÷å ëîãîâ è òàì ïóñòàÿ êîìàíäà áåç îáìåíà ïî rs485
// if (flag_work_rs_send_log)
// {
// status = 0;
// status_ok++;
// if (status_ok<0) status_ok=1;
// }
// íå áûëî ïåðåäà÷ ïî rs485 çíà÷èò è ëîâèòü òóò íå÷åãî!
if (rs_b.RS_DataWillSend2 == 0 && enable_send_cmd == 0)
{
status = 0;
status_ok++;
count_free++;
}
else
if (rs_b.RS_DataReadyAnswerAnalyze)
{
// i_led2_on_off(0);
control_station.time_detect_answer_485[CONTROL_STATION_INGETEAM_PULT_RS485] = 0;
control_station.count_ok_modbus[CONTROL_STATION_INGETEAM_PULT_RS485]++;
rs_b.RS_DataReadyAnswerAnalyze = 0;
rs_b.RS_DataWillSend2 = 0;
status = 0;
if (last_ok_cmd==4) // ïðîøëà readAnalogDataFromRemote() ñì íèæå
{
edrk.get_new_data_from_hmi = 1;// ìîæíî çàáðàòü äàííûå?
edrk.get_new_data_from_hmi2 = 1;// ìîæíî çàáðàòü äàííûå?
}
final_code = last_ok_cmd;//numberInT+1;
//status_err = 0;
status_ok++;
}
else
{
if ( (control_station.time_detect_answer_485[CONTROL_STATION_INGETEAM_PULT_RS485]>control_station.setup_time_detect_active_resend_485[CONTROL_STATION_INGETEAM_PULT_RS485])
|| (detect_pause_milisec(time_pause_status_3,&old_time_status_3)) )
{
resetup_mpu_rs(&rs_b);
control_station.time_detect_answer_485[CONTROL_STATION_INGETEAM_PULT_RS485] = 0;
rs_b.RS_DataWillSend2 = 0;
status = 0;
control_station.count_error_modbus[CONTROL_STATION_INGETEAM_PULT_RS485]++;
status_err++;// = 1;
}
}
if (status_ok<0) status_ok=1;
break;
case 4:
break;
case 5:
break;
case 6:
break;
default:
break;
}
/*
if (status==0)
{
old_time = global_time.miliseconds;
status = 1;
if (time_pause==0)
status = 2;
}
if (status==1)
{
// if (numberInT==0)
// {
if (detect_pause_milisec(time_pause,&old_time))
status = 2;
// }
// else
// status = 2;
}
if (status==2)
{
enable_send_cmd = 1;
control_station.time_detect_answer_485[CONTROL_STATION_INGETEAM_PULT_RS485] = 0;
status = 3;
old_time_status_3 = global_time.miliseconds;
}
if (status==3)
{
if (rs_b.RS_DataWillSend2 == 0)
{
count_free++;
}
// åñëè ìû â ïåðåäà÷å ëîãîâ è òàì ïóñòàÿ êîìàíäà áåç îáìåíà ïî rs485
if (flag_work_rs_send_log)
{
status = 0;
status_ok++;
if (status_ok<0) status_ok=1;
}
if (rs_b.RS_DataReadyAnswerAnalyze)
{
// i_led2_on_off(0);
control_station.time_detect_answer_485[CONTROL_STATION_INGETEAM_PULT_RS485] = 0;
control_station.count_ok_modbus[CONTROL_STATION_INGETEAM_PULT_RS485]++;
rs_b.RS_DataReadyAnswerAnalyze = 0;
rs_b.RS_DataWillSend2 = 0;
status = 0;
if (last_ok_cmd==4) // ïðîøëà readAnalogDataFromRemote() ñì íèæå
edrk.get_new_data_from_hmi = 1;// ìîæíî çàáðàòü äàííûå?
final_code = last_ok_cmd;//numberInT+1;
//status_err = 0;
status_ok++;
if (status_ok<0) status_ok=1;
}
else
{
if ( (control_station.time_detect_answer_485[CONTROL_STATION_INGETEAM_PULT_RS485]>control_station.setup_time_detect_active_resend_485[CONTROL_STATION_INGETEAM_PULT_RS485])
|| (detect_pause_milisec(time_pause_status_3,&old_time_status_3)) )
{
resetup_mpu_rs(&rs_b);
control_station.time_detect_answer_485[CONTROL_STATION_INGETEAM_PULT_RS485] = 0;
rs_b.RS_DataWillSend2 = 0;
status = 0;
control_station.count_error_modbus[CONTROL_STATION_INGETEAM_PULT_RS485]++;
status_err++;// = 1;
}
}
}
*/
// switch (status)
// {
// case 0 : status = 1;
// break;
//
// case 1 : old_time = global_time.miliseconds;
// status = 2;
// break;
//
// case 2 :
// if (run_pause)
// {
// status = 3;
// run_pause = 0;
// }
// if (detect_pause_milisec(time_pause,&old_time))
// status = 3;
// break;
//
// case 3 :
// enable_send_cmd = 1;
//// control_station.count_error_modbus_15[CONTROL_STATION_INGETEAM_PULT_RS485]++;
// control_station.time_detect_answer_485[CONTROL_STATION_INGETEAM_PULT_RS485] = 0;
// status = 4;
// break;
//
//
// case 4 :
// if (rs_b.RS_DataReadyAnswerAnalyze)
// {
// control_station.time_detect_answer_485[CONTROL_STATION_INGETEAM_PULT_RS485] = 0;
// control_station.count_ok_modbus[CONTROL_STATION_INGETEAM_PULT_RS485]++;
// rs_b.RS_DataReadyAnswerAnalyze = 0;
// status = 1;
// final_code = numberInT+1;
// }
// else
// {
// if (control_station.time_detect_answer_485[CONTROL_STATION_INGETEAM_PULT_RS485]>control_station.setup_time_detect_active_resend_485[CONTROL_STATION_INGETEAM_PULT_RS485])
// {
// resetup_mpu_rs(&rs_b);
// control_station.time_detect_answer_485[CONTROL_STATION_INGETEAM_PULT_RS485] = 0;
// status = 1;
// control_station.count_error_modbus[CONTROL_STATION_INGETEAM_PULT_RS485]++;
// }
// }
// break;
//
//
// case 5 : break;
//
//
// case 6 : break;
//
// default : break;
// }
//
//
// if (control_station.flag_message_sent[CONTROL_STATION_INGETEAM_PULT_RS485] == 1)
// {
// if (control_station.flag_waiting_answer[CONTROL_STATION_INGETEAM_PULT_RS485] == 0 && prev_flag_waiting_answer == 1)
// {
// old_time = global_time.miliseconds;
// }
//
// if (control_station.flag_waiting_answer[CONTROL_STATION_INGETEAM_PULT_RS485] == 0)
// {
// if (detect_pause_milisec(time_pause,&old_time))
// {
// control_station.flag_message_sent[CONTROL_STATION_INGETEAM_PULT_RS485] = 0;
// }
//
// }
// }
// prev_flag_waiting_answer = control_station.flag_waiting_answer[CONTROL_STATION_INGETEAM_PULT_RS485];
//
//
// if (control_station.flag_message_sent[CONTROL_STATION_INGETEAM_PULT_RS485] == 0 &&
// control_station.flag_waiting_answer[CONTROL_STATION_INGETEAM_PULT_RS485] == 0 )
// {
// enable_send_cmd = 1;
//// numberInT++;
//// if (numberInT>3)
//// numberInT = 1;
// }
//
// äëÿ ïðîâåðêè áåç ñìåíû êîìàíä
if (flag_only_one_cmd)
numberInT=flag_only_one_cmd-1;
//
if (enable_send_cmd
// && (log_to_HMI.send_log == 0)
)
{
//i_led2_on_off(1);
last_ok_cmd = numberInT;
switch (numberInT)
{
case 0:
if ((flag_update_only_hmi==0) && (edrk.flag_enable_update_hmi))
update_tables_HMI_discrete();
writeDiscreteDataToRemote();
edrk.test++;
numberInT++;
enable_send_cmd = 0;
break;
case 1:
if ((flag_update_only_hmi==0) && (edrk.flag_enable_update_hmi))
// if (edrk.flag_enable_update_hmi)
update_tables_HMI_analog();
writeAnalogDataToRemote(); // 1 ÷àñòü àíàëîãà
// if (flag_update_only_hmi==1)
// // ïðîïóñêàåì ñëåä êîìàíäû
// numberInT = 0;
// else
numberInT++;
enable_send_cmd = 0;
break;
case 2:
// if (edrk.flag_enable_update_hmi)
// update_tables_HMI_analog();
writeAnalogDataToRemote(); // 2 ÷àñòü àíàëîãà
// if (flag_update_only_hmi==1)
// // ïðîïóñêàåì ñëåä êîìàíäû
// numberInT = 0;
// else
numberInT++;
enable_send_cmd = 0;
break;
case 3:
readAnalogDataFromRemote(); // 1 ÷àñòü
numberInT++;
enable_send_cmd = 0;
break;
case 4:
readAnalogDataFromRemote(); // 2 ÷àñòü
if (log_to_HMI.send_log)
{
numberInT++;
}
else
// ïðîïóñêàåì ñëåä êîìàíäó
numberInT = 0;
enable_send_cmd = 0;
count_work_in_log = 0; // ïîäãîòîâêà äëÿ ëîãîâ
break;
case 5:
if (log_to_HMI.send_log)
{
time_pause = 2;
// ccc[0] = 1;
flag_work_rs_send_log = !sendLogToHMI(status_ok);
edrk.flag_slow_in_main = 1;
enable_send_cmd = 0;
if (count_work_in_log>MAX_COUNT_WORK_IN_LOG)
{
count_work_in_log = 0;
numberInT = 0; // çàïóñêàåì ïîëíûé öèêë
}
else
{
count_work_in_log++;
// îñòàåìñÿ â ýòîì öèêëå ëîãîâ
}
}
else
{
time_pause = TIME_PAUSE_MODBUS_REMOUTE;
// ccc[0] = 0;
numberInT = 0;
enable_send_cmd = 0;
edrk.flag_slow_in_main = 0;
}
break;
default:
enable_send_cmd = 0;
break;
}
//i_led2_on_off(0);
}
//sendLogToHMI();
#if(_ENABLE_PWM_LINES_FOR_TESTS_RS)
PWM_LINES_TK_20_OFF;
#endif
if (flag_update_only_hmi)
return final_code;
return 0;
}
int modbusNetworkSharingCAN(void)
{
// static unsigned int old_time1 = 0 , time_pause1 = TIME_PAUSE_NETWORK_CAN1;
// static unsigned int old_time2 = 0 , time_pause2 = TIME_PAUSE_NETWORK_CAN2;
// static unsigned int old_time3 = 0 , time_pause3 = TIME_PAUSE_NETWORK_CAN3;
static unsigned int time_pause_modbus_can_terminals = TIME_PAUSE_MODBUS_CAN_TERMINALS;
#if (ENABLE_CAN_SEND_TO_MPU_FROM_MAIN)
// if (detect_pause_milisec(time_pause1,&old_time1))
static unsigned int time_pause_modbus_can_mpu = TIME_PAUSE_MODBUS_CAN_MPU;
write_all_data_to_mpu_can(1, time_pause_modbus_can_mpu);
#endif
#if (ENABLE_CAN_SEND_TO_TERMINAL_FROM_MAIN)
// if (detect_pause_milisec(time_pause2,&old_time2))
write_all_data_to_terminals_can(1, time_pause_modbus_can_terminals);
#endif
#if (ENABLE_CAN_SEND_TO_TERMINAL_OSCIL)
// if (detect_pause_milisec(time_pause3,&old_time3))
oscil_can.pause_can = TIME_PAUSE_MODBUS_CAN_OSCIL;
oscil_can.send(&oscil_can);
#endif
return 0;
}

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#ifndef _MESSAGE_MODBUS_H
#define _MESSAGE_MODBUS_H
// void ReceiveCommandModbus3(RS_DATA *rs_arr);
// void ReceiveCommandModbus16(RS_DATA *rs_arr);
// void ReceiveCommandModbus15(RS_DATA *rs_arr);
// void SendCommandModbus3(RS_DATA *rs_arr,int adr_contr, unsigned int adr_start,unsigned int count_word);
// void SendCommandModbus16(RS_DATA *rs_arr,int adr_contr, unsigned int adr_start,unsigned int count_word);
// void ReceiveAnswerCommandModbus16(RS_DATA *rs_arr);
// void ReceiveAnswerCommandModbus3(RS_DATA *rs_arr);
#define TIME_PAUSE_MODBUS_MPU 250 //100//500
#define TIME_PAUSE_MODBUS_REMOUTE 20 //100 //500
#define TIME_PAUSE_NETWORK_CAN1 444 //500
#define TIME_PAUSE_NETWORK_CAN2 990 //500
#define TIME_PAUSE_NETWORK_CAN3 1855 //500
//#define START_ADR_ARR 0xc000
//#define LENGTH_ADR_ARR 0x100
//#define SIZE_MODBUS_TABLE_DISCRETE_REMOUTE 36 // = 576/16
#define SIZE_BUF_WRITE_TO_MODBUS1_REMOUTE SIZE_MODBUS_TABLE_DISCRET_REMOUTE // SIZE_MODBUS_TABLE_DISCRET_BITS //576 //Ïðè ðàçìåðå ïîñûëêè áîëüøå 3 áàéò modbus ñèìóëßòîð ãîâîðèò ÷òî íå ïðàâèëüíûé ôîðìàò ïîñûëêè.
#define SIZE_BUF_WRITE_TO_MODBUS15_REMOUTE SIZE_MODBUS_TABLE_DISCRET_REMOUTE //SIZE_MODBUS_TABLE_DISCRET_BITS //576 //96
#define SIZE_BUF_WRITE_TO_MODBUS16_VPU 100 //
#define SIZE_BUF_WRITE_TO_MODBUS16_REMOUTE 120 //100 // ïåðåäà÷à, ðàçìåð â îäíîé ïîñûëêå àíàëîã.÷àñòè ïóëüòà ÁÑÓ, íå áîëüøå SIZE_ANALOG_DATA_REMOUTE
#define SIZE_ANALOG_DATA_REMOUTE 240 //165 // ïåðåäà÷à, ðàçìåð äàííûõ ïî àíàëîãîâîé ÷àñòè ïóëüòà ÁÑÓ
#define SIZE_BUF_READ_FROM_MODBUS16_REMOUTE 120 //20//36 // ïðèåì, ðàçìåð â îäíîé ïîñûëêå àíàëîã.÷àñòè ïóëüòà ÁÑÓ, íå áîëüøå SIZE_ANALOG_DATA_FROM_MODBUS16_REMOUTE
#define SIZE_ANALOG_DATA_FROM_MODBUS16_REMOUTE SIZE_ANALOG_DATA_REMOUTE //20//36 // ïðèåì, ðàçìåð äàííûõ ïî àíàëîãîâîé ÷àñòè ïóëüòà ÁÑÓ
#define SIZE_BUF_WRITE_TO_MODBUS16_CAN 100 //10 //1000//400//04.04.2012 //100// //800
#define START_LOG_MODBUS16_ADRES 100
#define SIZE_BUF_WRITE_LOG_TO_MODBUS16 120
//#define SIZE_ANALOG_DATA 61
#define MAX_COUNT_ERROR_FROM_RS_MPU 10
//void test_rs_can_with_svu_mpu();
void write_all_data_to_mpu_can(int run_force, unsigned int pause);
void read_all_data_from_mpu_485(int run_force);
void write_all_data_to_mpu_485(int run_force);
extern int enable_can;
int modbusNetworkSharing(int flag_update_only_hmi);
int modbusNetworkSharingCAN(void);
#endif //_MESSAGE_MODBUS_H

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/*
* message_terminals_can.c
*
* Created on: 15 ìàÿ 2020 ã.
* Author: yura
*/
#include <edrk_main.h>
#include <message_modbus.h>
#include <message2.h>
#include <vector.h>
#include "CAN_Setup.h"
#include "global_time.h"
#include "modbus_table_v2.h"
#include "oscil_can.h"
#include "DSP281x_Examples.h" // DSP281x Examples Include File
#include "DSP281x_Device.h" // DSP281x Headerfile Include File
#include "CRC_Functions.h"
#include "RS_Function_terminal.h"
#include "TuneUpPlane.h"
#include "control_station.h"
#define TERMINALS_CAN_TIME_WAIT 500 // ïåðèîä ïåðåäà÷è äàííûõ â òåðìèíàëêó
#pragma DATA_SECTION(buf_message_can_cmd,".slow_vars")
int buf_message_can_cmd[sizeof(CMD_TO_TMS_STRUCT)+10];
#pragma DATA_SECTION(buf_message_can_data,".slow_vars")
int buf_message_can_data[sizeof(TMS_TO_TERMINAL_STRUCT)+10];
#pragma DATA_SECTION(buf_message_can_data2,".slow_vars")
int buf_message_can_data2[sizeof(TMS_TO_TERMINAL_STRUCT)+10];
int *p_buf_message_can_data3;
void write_all_data_to_terminals_can(int run_force, unsigned int pause)
{
static unsigned int old_time = 0;
static unsigned int send_time = 0;
static int prev_send_to_can = 0;
static int count_sends = 0;
unsigned long old_t;
unsigned int i;
int real_mbox;
CMD_TO_TMS_STRUCT* pcommand = (CMD_TO_TMS_STRUCT *)(buf_message_can_cmd);
real_mbox = get_real_out_mbox(TERMINAL_TYPE_BOX, edrk.number_can_box_terminal_cmd);
// áûëà êîìàíäà íà îòïðàâêó ïîñûëêè è îíà åùå íå óøëà, òîãäà ñðáàñûâàåì ñ÷åò÷èê âðåìåíè ïàóçû ìåæäó ïîñûëêàìè,
// ò.å. TERMINALS_CAN_TIME_WAIT ìåæäó êîíöîì îòïðàâêè ïîñûëêè è íîâîé ïîñûëêè.
if (prev_send_to_can && CAN_cycle_full_free(real_mbox,CAN_BOX_STAT_OFF)==0)
{
old_time = (unsigned int)global_time.miliseconds;
return;
}
prev_send_to_can = 0;
if (!detect_pause_milisec(pause,&old_time))
return;
//func_fill_answer_to_TMS(&reply, pcommand);
func_pack_answer_to_TMS(&reply);
*(TMS_TO_TERMINAL_STRUCT*)buf_message_can_data2 = reply; // Íåîáõîäèìû ëåãêèå ïðèâåäåíèß
// reply.digit_data.byte01.byte_data = send_time;
/* reply.digit_data.byte02.byte_data = 0x66;
reply.analog_data.analog60_hi = 0x33;
reply.analog_data.analog60_lo = 0x44;
*/
reply.analog_data.analog58_hi = HIBYTE((unsigned int)control_station.raw_array_data[CONTROL_STATION_TERMINAL_CAN][0].all);
reply.analog_data.analog58_lo = LOBYTE((unsigned int)control_station.raw_array_data[CONTROL_STATION_TERMINAL_CAN][0].all);
// control_station.raw_array_data[CONTROL_STATION_TERMINAL_CAN][0].all
reply.analog_data.analog59_hi = HIBYTE((unsigned int)global_time.miliseconds);
reply.analog_data.analog59_lo = LOBYTE((unsigned int)global_time.miliseconds);
reply.analog_data.analog60_hi = HIBYTE(count_sends);
reply.analog_data.analog60_lo = LOBYTE(count_sends);
count_sends++;
if (count_sends>32768) count_sends=0;
// reply.analog_data.analog1_hi = HIBYTE(send_time);
// reply.analog_data.analog1_lo = LOBYTE(send_time);
// reply.analog_data.analog2_hi = HIBYTE(oscil_can.timer_send);
// reply.analog_data.analog2_lo = LOBYTE(oscil_can.timer_send);
p_buf_message_can_data3 = (int *)&reply.digit_data;
for (i=0;i<sizeof(TMS_TO_TERMINAL_STRUCT)-5;i++)
{
if (i%2)
{
buf_message_can_data[i>>1] |= ( (*p_buf_message_can_data3++) << 8) & 0xff00;
}
else
buf_message_can_data[i>>1] = ( (*p_buf_message_can_data3++) ) & 0x00ff;
}
if (CAN_cycle_full_free(real_mbox,CAN_BOX_STAT_ON))
{
old_t = global_time.microseconds;
CAN_cycle_send(
TERMINAL_TYPE_BOX,
edrk.number_can_box_terminal_cmd,
0,
&buf_message_can_data[0], ((sizeof(TMS_TO_TERMINAL_STRUCT)-5)>>1), CAN_BOX_STANDART_ADR, CAN_BOX_PRIORITY_NORMAL);
prev_send_to_can = 1;
send_time = (global_time.microseconds - old_t)/100;
}
}

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/*
* message_terminals_can.h
*
* Created on: 22 ìàÿ 2020 ã.
* Author: yura
*/
#ifndef SRC_MAIN_MESSAGE_TERMINALS_CAN_H_
#define SRC_MAIN_MESSAGE_TERMINALS_CAN_H_
void write_all_data_to_terminals_can(int run_force, unsigned int pause);
#endif /* SRC_MAIN_MESSAGE_TERMINALS_CAN_H_ */

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#include "log_to_memory.h"
#include <message_modbus.h>
#include <modbus_hmi.h>
#include <modbus_hmi_update.h>
#include <vector.h>
#include "control_station.h"
#include "global_time.h"
#include "modbus_table_v2.h"
#include "RS_modbus_pult.h"
#include "DSP281x_Device.h"
#include "MemoryFunctions.h"
#include "RS_modbus_svu.h"
#include "log_params.h"
#pragma DATA_SECTION(modbus_table_discret_in,".logs");
MODBUS_REG_STRUCT modbus_table_discret_in[SIZE_MODBUS_TABLE_DISCRET_REMOUTE]; //registers 10001-19999 modbus RTU
#pragma DATA_SECTION(modbus_table_discret_out,".logs");
MODBUS_REG_STRUCT modbus_table_discret_out[SIZE_MODBUS_TABLE_DISCRET_REMOUTE]; //registers 1-9999 modbus RTU
#pragma DATA_SECTION(modbus_table_analog_in, ".logs");
MODBUS_REG_STRUCT modbus_table_analog_in[SIZE_MODBUS_ANALOG_REMOUTE]; //registers 30001-39999 modbus RTU
#pragma DATA_SECTION(modbus_table_analog_out, ".logs");
//MODBUS_REG_STRUCT modbus_table_analog_out[700]; //registers 40001-49999 modbus RTU
MODBUS_REG_STRUCT modbus_table_analog_out[SIZE_MODBUS_ANALOG_REMOUTE]; //registers 40001-49999 modbus RTU
//#pragma DATA_SECTION(modbus_table_analog_out2, ".logs");
//MODBUS_REG_STRUCT modbus_table_analog_out[700]; //registers 40001-49999 modbus RTU
//MODBUS_REG_STRUCT modbus_table_analog_out2[SIZE_MODBUS_ANALOG_REMOUTE]; //registers 40001-49999 modbus RTU
//unsigned int flag_waiting_answer = 1;
//unsigned int flag_message_sent = 0;
///////////////////////////////////////////////////
///
///////////////////////////////////////////////////
void clear_table_remoute(void)
{
int i;
for (i=0;i<SIZE_MODBUS_TABLE_DISCRET_REMOUTE;i++)
{
modbus_table_discret_in[i].all = 0;
modbus_table_discret_out[i].all = 0;
}
for (i=0;i<SIZE_MODBUS_ANALOG_REMOUTE;i++)
{
modbus_table_analog_in[i].all = 0;
modbus_table_analog_out[i].all = 0;
//modbus_table_analog_out2[i].all = 0;
}
}
///////////////////////////////////////////////////
///
///////////////////////////////////////////////////
void setRegisterDiscreteOutput(int value, int adres)
{
int word_number = 0;
int bit_number = 0;
if (adres >= 0 && adres < SIZE_MODBUS_TABLE_DISCRET_BITS)
{
// word_number = (adres % 16 == 0) && (adres != 0) ? adres / 16 + 1 :
// adres / 16;
word_number = (adres % 16 == 0) && (adres != 0) ? adres / 16 :
adres / 16;
bit_number = adres % 16;
if (word_number<SIZE_MODBUS_TABLE_DISCRET_REMOUTE)
{
if (value)
modbus_table_discret_out[word_number].all |= 1 << bit_number;
else
modbus_table_discret_out[word_number].all &= ~(1 << bit_number);
}
}
}
///////////////////////////////////////////////////
///
///////////////////////////////////////////////////
int getRegisterDiscreteOutput(int adres) {
int word_number = 0;
int bit_number = 0;
if (adres >= 0 && adres < SIZE_MODBUS_TABLE_DISCRET_BITS) {
word_number = adres / 16;
bit_number = adres % 16;
return (modbus_table_discret_out[word_number].all >> bit_number) & 1;
}
return 0;
}
///////////////////////////////////////////////////
///
///////////////////////////////////////////////////
int readDiscreteOutputsFromRemote()
{
int succed = 0;
static unsigned int time_tick_modbus = 0;
static unsigned int old_PWM_ticks = 0;
static unsigned int count_write_to_modbus = 0;
static int cur_position_buf_modbus1 = 0;
ModbusRTUsetDiscretDataArray(modbus_table_discret_out, modbus_table_discret_out);
// if (global_time.pwm_tics != old_PWM_ticks)
// {
// if (global_time.pwm_tics > old_PWM_ticks)
// time_tick_modbus = time_tick_modbus + (global_time.pwm_tics - old_PWM_ticks);
// else
// time_tick_modbus++;
// }
// old_PWM_ticks = global_time.pwm_tics;
// if (TIME_PAUSE_MODBUS < time_tick_modbus)
// {
if (!rs_b.flag_LEADING)
{
// time_tick_modbus = 0;
if (control_station.flag_waiting_answer[CONTROL_STATION_INGETEAM_PULT_RS485] == 0)
cur_position_buf_modbus1 = cur_position_buf_modbus1 + SIZE_BUF_WRITE_TO_MODBUS1_REMOUTE;
if (cur_position_buf_modbus1 >= SIZE_MODBUS_TABLE_DISCRET_REMOUTE)
cur_position_buf_modbus1 = 0;
if ((cur_position_buf_modbus1 + SIZE_BUF_WRITE_TO_MODBUS1_REMOUTE) > SIZE_MODBUS_TABLE_DISCRET_REMOUTE)
count_write_to_modbus = SIZE_MODBUS_TABLE_DISCRET_REMOUTE - cur_position_buf_modbus1;
else
count_write_to_modbus = SIZE_BUF_WRITE_TO_MODBUS1_REMOUTE;
ModbusRTUsend1(&rs_b, 2,
ADR_MODBUS_TABLE_REMOUTE + cur_position_buf_modbus1,
count_write_to_modbus);
succed = 1;
// control_station.flag_message_sent[CONTROL_STATION_INGETEAM_PULT_RS485] = 1;
}
// }
return succed;
}
///////////////////////////////////////////////////
///
///////////////////////////////////////////////////
int writeSigleDiscreteDataToRemote(unsigned int adres)
{
ModbusRTUsetDiscretDataArray(modbus_table_discret_out, modbus_table_discret_out);
if (!rs_b.flag_LEADING && !control_station.flag_waiting_answer[CONTROL_STATION_INGETEAM_PULT_RS485] &&
(adres < SIZE_MODBUS_TABLE_DISCRET_BITS)) {
ModbusRTUsend5(&rs_b, 2, ADR_MODBUS_TABLE_REMOUTE + adres);
return 1;
}
return 0;
}
///////////////////////////////////////////////////
///
///////////////////////////////////////////////////
int writeSingleAnalogOutputToRemote(unsigned int adres)
{
ModbusRTUsetDataArrays(modbus_table_analog_in, modbus_table_analog_out);
if (!rs_b.flag_LEADING && !control_station.flag_waiting_answer[CONTROL_STATION_INGETEAM_PULT_RS485] &&
(adres < SIZE_MODBUS_ANALOG_REMOUTE)) {
ModbusRTUsend6(&rs_b, 2, ADR_MODBUS_TABLE_REMOUTE + adres);
return 1;
}
return 0;
}
///////////////////////////////////////////////////
///
///////////////////////////////////////////////////
int writeDiscreteDataToRemote()
{
int succed = 0;
static unsigned int old_time = 0;
static unsigned int count_write_to_modbus = 0;
static int cur_position_buf_modbus15 = 0;
//ModbusRTUsetDiscretDataArray(modbus_table_discret_out, modbus_table_discret_out);
ModbusRTUsetDiscretDataArray(modbus_table_discret_in, modbus_table_discret_out);
if (!rs_b.flag_LEADING)
{
// if (rs_b.RS_DataReadyAnswerAnalyze)
// {
// cur_position_buf_modbus15 += SIZE_BUF_WRITE_TO_MODBUS15_REMOUTE;
// }
if (cur_position_buf_modbus15 >= (SIZE_MODBUS_TABLE_DISCRET_REMOUTE))
cur_position_buf_modbus15 = 0;
if ((cur_position_buf_modbus15 + SIZE_BUF_WRITE_TO_MODBUS15_REMOUTE) > (SIZE_MODBUS_TABLE_DISCRET_REMOUTE))
count_write_to_modbus = SIZE_MODBUS_TABLE_DISCRET_REMOUTE - cur_position_buf_modbus15;
else
count_write_to_modbus = SIZE_BUF_WRITE_TO_MODBUS15_REMOUTE;
// count_write_to_modbus = SIZE_BUF_WRITE_TO_MODBUS16;
// cur_position_buf_modbus=0;
ModbusRTUsend15(&rs_b, 2, ADR_MODBUS_TABLE_REMOUTE + cur_position_buf_modbus15*16,
count_write_to_modbus*16);
// ModbusRTUsend15(&rs_a, 2, ADR_MODBUS_TABLE_REMOUTE + cur_position_buf_modbus15*16,
// count_write_to_modbus*16);
cur_position_buf_modbus15 += SIZE_BUF_WRITE_TO_MODBUS15_REMOUTE;
// control_station.flag_message_sent[CONTROL_STATION_INGETEAM_PULT_RS485] = 1;
// control_station.count_error_modbus_15[CONTROL_STATION_INGETEAM_PULT_RS485]++;
// hmi_watch_dog = !hmi_watch_dog; //was transmitted, need to change
succed = 1;
}
return succed;
}
///////////////////////////////////////////////////
///
///////////////////////////////////////////////////
#define ADRESS_END_FIRST_BLOCK 20
#define ADRESS_START_PROTECTION_LEVELS 91
int readAnalogDataFromRemote()
{
int succed = 0;
static unsigned int old_time = 0;
static unsigned int count_write_to_modbus = 0;
static int cur_position_buf_modbus3 = 0, size_buf = SIZE_BUF_READ_FROM_MODBUS16_REMOUTE;
ModbusRTUsetDataArrays(modbus_table_analog_in, modbus_table_analog_out);
if (!rs_b.flag_LEADING)
{
if (control_station.flag_waiting_answer[CONTROL_STATION_INGETEAM_PULT_RS485] == 0)
cur_position_buf_modbus3 = cur_position_buf_modbus3 + size_buf;
if (cur_position_buf_modbus3 >= SIZE_ANALOG_DATA_FROM_MODBUS16_REMOUTE)
cur_position_buf_modbus3 = 0;
//Äûðêà â îáìåíå. Ïðîïóñêàåì.
if ((cur_position_buf_modbus3 > ADRESS_END_FIRST_BLOCK) &&
(cur_position_buf_modbus3 < ADRESS_START_PROTECTION_LEVELS)) {
cur_position_buf_modbus3 = ADRESS_START_PROTECTION_LEVELS;
}
if((cur_position_buf_modbus3 < ADRESS_END_FIRST_BLOCK) &&
(cur_position_buf_modbus3 + size_buf) > ADRESS_END_FIRST_BLOCK) {
count_write_to_modbus = ADRESS_END_FIRST_BLOCK - cur_position_buf_modbus3;
}
if ((cur_position_buf_modbus3 + size_buf) > SIZE_ANALOG_DATA_FROM_MODBUS16_REMOUTE)
count_write_to_modbus = SIZE_ANALOG_DATA_FROM_MODBUS16_REMOUTE - cur_position_buf_modbus3;
else
count_write_to_modbus = size_buf;
// count_write_to_modbus = SIZE_BUF_WRITE_TO_MODBUS16;
// cur_position_buf_modbus=0;
// SendCommandModbus3(&rs_b,1,ADR_MODBUS_TABLE+cur_position_buf_modbus3,count_write_to_modbus);
ModbusRTUsend4(&rs_b, 2,
ADR_MODBUS_TABLE_REMOUTE + cur_position_buf_modbus3,
count_write_to_modbus);
// control_station.count_error_modbus_4[CONTROL_STATION_INGETEAM_PULT_RS485]++;
// control_station.flag_message_sent[CONTROL_STATION_INGETEAM_PULT_RS485] = 1;
succed = 1;
}
return succed;
}
int writeSingleAnalogDataToRemote(int from_adr, int count_wr)
{
int succed = 0;
static unsigned int old_time = 0;
static int count_write_to_modbus = 0;
static int cur_position_buf_modbus16 = 0;
ModbusRTUsetDataArrays(modbus_table_analog_in, modbus_table_analog_out);
if (!rs_b.flag_LEADING)
{
cur_position_buf_modbus16 = from_adr;
// if (control_station.flag_waiting_answer[CONTROL_STATION_INGETEAM_PULT_RS485] == 0)
// cur_position_buf_modbus16 = cur_position_buf_modbus16 + SIZE_BUF_WRITE_TO_MODBUS16_REMOUTE;
//
// if (cur_position_buf_modbus16 >= SIZE_ANALOG_DATA_REMOUTE)
// cur_position_buf_modbus16 = 0;
// //Äûðêà â îáìåíå. Ïðîïóñêàåì.
// if ((cur_position_buf_modbus16 > ADRESS_END_FIRST_BLOCK) &&
// (cur_position_buf_modbus16 < ADRESS_START_PROTECTION_LEVELS)) {
// cur_position_buf_modbus16 = ADRESS_START_PROTECTION_LEVELS;
// }
if ((cur_position_buf_modbus16 + count_wr) > SIZE_ANALOG_DATA_REMOUTE)
count_write_to_modbus = SIZE_ANALOG_DATA_REMOUTE - cur_position_buf_modbus16;
else
count_write_to_modbus = count_wr;
ModbusRTUsend16(&rs_b, 2,
ADR_MODBUS_TABLE_REMOUTE + cur_position_buf_modbus16,
count_write_to_modbus);
succed = 1;
}
return succed;
}
///////////////////////////////////////////////////
///
///////////////////////////////////////////////////
int writeAnalogDataToRemote()
{
int succed = 0;
static unsigned int old_time = 0;
static int count_write_to_modbus = 0;
static int cur_position_buf_modbus16 = 0;
ModbusRTUsetDataArrays(modbus_table_analog_in, modbus_table_analog_out);
if (!rs_b.flag_LEADING)
{
if (control_station.flag_waiting_answer[CONTROL_STATION_INGETEAM_PULT_RS485] == 0)
cur_position_buf_modbus16 = cur_position_buf_modbus16 + SIZE_BUF_WRITE_TO_MODBUS16_REMOUTE;
if (cur_position_buf_modbus16 >= SIZE_ANALOG_DATA_REMOUTE)
cur_position_buf_modbus16 = 0;
// //Äûðêà â îáìåíå. Ïðîïóñêàåì.
// if ((cur_position_buf_modbus16 > ADRESS_END_FIRST_BLOCK) &&
// (cur_position_buf_modbus16 < ADRESS_START_PROTECTION_LEVELS)) {
// cur_position_buf_modbus16 = ADRESS_START_PROTECTION_LEVELS;
// }
if ((cur_position_buf_modbus16 + SIZE_BUF_WRITE_TO_MODBUS16_REMOUTE) > SIZE_ANALOG_DATA_REMOUTE)
count_write_to_modbus = SIZE_ANALOG_DATA_REMOUTE - cur_position_buf_modbus16;
else
count_write_to_modbus = SIZE_BUF_WRITE_TO_MODBUS16_REMOUTE;
ModbusRTUsend16(&rs_b, 2,
ADR_MODBUS_TABLE_REMOUTE + cur_position_buf_modbus16,
count_write_to_modbus);
// control_station.count_error_modbus_16[CONTROL_STATION_INGETEAM_PULT_RS485]++;
// control_station.flag_message_sent[CONTROL_STATION_INGETEAM_PULT_RS485] = 1;
succed = 1;
}
return succed;
}
///////////////////////////////////////////////////
///
///////////////////////////////////////////////////

39
Inu/Src/main/modbus_hmi.h Normal file
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#ifndef _MODBUS_HMI
#define _MODBUS_HMI
#include "modbus_struct.h"
int readDiscreteOutputsFromRemote();
int writeSigleDiscreteDataToRemote(unsigned int adres);
int writeSingleAnalogOutputToRemote(unsigned int adres);
int writeDiscreteDataToRemote();
int readAnalogDataFromRemote();
int writeAnalogDataToRemote();
int writeSingleAnalogDataToRemote(int from_adr, int count_wr);
void setRegisterDiscreteOutput(int value, int adres);
int getRegisterDiscreteOutput(int adres);
void clear_table_remoute(void); // clear table
#define ADRES_LOG_REGISTERS 100
#define SIZE_MODBUS_TABLE_DISCRET_REMOUTE 36
#define SIZE_MODBUS_TABLE_DISCRET_BITS (SIZE_MODBUS_TABLE_DISCRET_REMOUTE * 16)
#define SIZE_MODBUS_ANALOG_REMOUTE 900
extern MODBUS_REG_STRUCT modbus_table_analog_in[SIZE_MODBUS_ANALOG_REMOUTE];
extern MODBUS_REG_STRUCT modbus_table_analog_out[SIZE_MODBUS_ANALOG_REMOUTE];
extern MODBUS_REG_STRUCT modbus_table_discret_in[SIZE_MODBUS_TABLE_DISCRET_REMOUTE];
extern MODBUS_REG_STRUCT modbus_table_discret_out[SIZE_MODBUS_TABLE_DISCRET_REMOUTE];
//extern unsigned int flag_waiting_answer;
//extern unsigned int flag_message_sent;
#endif //_MODBUS_HMI

222
Inu/Src/main/modbus_hmi_read.c Normal file
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/*
* modbus_hmi_read.c
*
* Created on: 21 äåê. 2020 ã.
* Author: star
*/
#include <adc_tools.h>
#include <edrk_main.h>
#include <modbus_hmi.h>
#include <modbus_hmi_read.h>
#include <protect_levels.h>
#define DELTA_ABNORMAL_P_WATER_MIN 50
#define DELTA_ABNORMAL_P_WATER_MAX 100
void parse_protect_levels_HMI() {
if (modbus_table_analog_in[91].all > 0) {
protect_levels.abnormal_temper_acdrive_winding_U1 = modbus_table_analog_in[91].all * 10;
}
if(modbus_table_analog_in[92].all > 0) {
protect_levels.abnormal_temper_acdrive_winding_V1 = modbus_table_analog_in[92].all * 10;
}
if(modbus_table_analog_in[93].all > 0) {
protect_levels.abnormal_temper_acdrive_winding_W1 = modbus_table_analog_in[93].all * 10;
}
if (modbus_table_analog_in[94].all > 0) {
protect_levels.abnormal_temper_acdrive_winding_U2 = modbus_table_analog_in[94].all * 10;
}
if (modbus_table_analog_in[95].all > 0) {
protect_levels.abnormal_temper_acdrive_winding_V2 = modbus_table_analog_in[95].all * 10;
}
if (modbus_table_analog_in[96].all > 0) {
protect_levels.abnormal_temper_acdrive_winding_W2 = modbus_table_analog_in[96].all * 10;
}
if (modbus_table_analog_in[97].all > 0) {
protect_levels.abnormal_temper_acdrive_bear_DNE = modbus_table_analog_in[97].all * 10;
}
if(modbus_table_analog_in[98].all > 0) {
protect_levels.abnormal_temper_acdrive_bear_NE = modbus_table_analog_in[98].all * 10;
}
if (modbus_table_analog_in[99].all > 0) {
protect_levels.alarm_temper_acdrive_winding_U1 = modbus_table_analog_in[99].all * 10;
}
if (modbus_table_analog_in[100].all > 0) {
protect_levels.alarm_temper_acdrive_winding_V1 = modbus_table_analog_in[100].all * 10;
}
if (modbus_table_analog_in[101].all > 0) {
protect_levels.alarm_temper_acdrive_winding_W1 = modbus_table_analog_in[101].all * 10;
}
if (modbus_table_analog_in[102].all > 0) {
protect_levels.alarm_temper_acdrive_winding_U2 = modbus_table_analog_in[102].all * 10;
}
if (modbus_table_analog_in[103].all > 0) {
protect_levels.alarm_temper_acdrive_winding_V2 = modbus_table_analog_in[103].all * 10;
}
if (modbus_table_analog_in[104].all > 0) {
protect_levels.alarm_temper_acdrive_winding_W2 = modbus_table_analog_in[104].all * 10;
}
if (modbus_table_analog_in[105].all > 0) {
protect_levels.alarm_temper_acdrive_bear_DNE = modbus_table_analog_in[105].all * 10;
}
if (modbus_table_analog_in[106].all > 0) {
protect_levels.alarm_temper_acdrive_bear_NE = modbus_table_analog_in[106].all * 10;
}
if (modbus_table_analog_in[107].all > 0) {
protect_levels.abnormal_temper_u_01 = modbus_table_analog_in[107].all * 10;
}
if (modbus_table_analog_in[108].all > 0) {
protect_levels.abnormal_temper_u_02 = modbus_table_analog_in[108].all * 10;
}
if (modbus_table_analog_in[109].all > 0) {
protect_levels.abnormal_temper_u_03 = modbus_table_analog_in[109].all * 10;
}
if (modbus_table_analog_in[110].all > 0) {
protect_levels.abnormal_temper_u_04 = modbus_table_analog_in[110].all * 10;
}
if (modbus_table_analog_in[111].all > 0) {
protect_levels.abnormal_temper_u_05 = modbus_table_analog_in[111].all * 10;
}
if (modbus_table_analog_in[112].all > 0) {
protect_levels.abnormal_temper_u_06 = modbus_table_analog_in[112].all * 10;
}
if (modbus_table_analog_in[113].all > 0) {
protect_levels.abnormal_temper_u_07 = modbus_table_analog_in[113].all * 10;
}
if (modbus_table_analog_in[114].all > 0) {
protect_levels.alarm_temper_u_01 = modbus_table_analog_in[114].all * 10;
}
if (modbus_table_analog_in[115].all > 0) {
protect_levels.alarm_temper_u_02 = modbus_table_analog_in[115].all * 10;
}
if (modbus_table_analog_in[116].all > 0) {
protect_levels.alarm_temper_u_03 = modbus_table_analog_in[116].all * 10;
}
if (modbus_table_analog_in[117].all > 0) {
protect_levels.alarm_temper_u_04 = modbus_table_analog_in[117].all * 10;
}
if (modbus_table_analog_in[118].all > 0) {
protect_levels.alarm_temper_u_05 = modbus_table_analog_in[118].all * 10;
}
if (modbus_table_analog_in[119].all > 0) {
protect_levels.alarm_temper_u_06 = modbus_table_analog_in[119].all * 10;
}
if (modbus_table_analog_in[120].all > 0) {
protect_levels.alarm_temper_u_07 = modbus_table_analog_in[120].all * 10;
}
if (modbus_table_analog_in[123].all > 0) {
protect_levels.abnormal_temper_water_int = modbus_table_analog_in[123].all * 10;
}
if (modbus_table_analog_in[124].all > 0) {
protect_levels.abnormal_temper_water_ext = modbus_table_analog_in[124].all * 10;
}
if (modbus_table_analog_in[125].all > 0) {
protect_levels.alarm_p_water_min_int = modbus_table_analog_in[125].all * 10;
protect_levels.abnormal_p_water_min_int = protect_levels.alarm_p_water_min_int + DELTA_ABNORMAL_P_WATER_MIN;
}
if (modbus_table_analog_in[126].all > 0) {
protect_levels.alarm_temper_water_int = modbus_table_analog_in[126].all * 10;
}
if (modbus_table_analog_in[127].all > 0) {
protect_levels.alarm_temper_water_ext = modbus_table_analog_in[127].all * 10;
}
if (modbus_table_analog_in[128].all > 0) {
protect_levels.alarm_p_water_max_int = modbus_table_analog_in[128].all * 10;
protect_levels.abnormal_p_water_max_int = protect_levels.alarm_p_water_max_int - DELTA_ABNORMAL_P_WATER_MAX;
}
if (modbus_table_analog_in[129].all > 0) {
protect_levels.abnormal_temper_air_int_01 = modbus_table_analog_in[129].all * 10;
}
if (modbus_table_analog_in[130].all > 0) {
protect_levels.abnormal_temper_air_int_02 = modbus_table_analog_in[130].all * 10;
}
if (modbus_table_analog_in[131].all > 0) {
protect_levels.abnormal_temper_air_int_03 = modbus_table_analog_in[131].all * 10;
}
if (modbus_table_analog_in[132].all > 0) {
protect_levels.abnormal_temper_air_int_04 = modbus_table_analog_in[132].all * 10;
}
if (modbus_table_analog_in[133].all > 0) {
protect_levels.alarm_temper_air_int_01 = modbus_table_analog_in[133].all * 10;
}
if (modbus_table_analog_in[134].all > 0) {
protect_levels.alarm_temper_air_int_02 = modbus_table_analog_in[134].all * 10;
}
if (modbus_table_analog_in[135].all > 0) {
protect_levels.alarm_temper_air_int_03 = modbus_table_analog_in[135].all * 10;
}
if (modbus_table_analog_in[136].all > 0) {
protect_levels.alarm_temper_air_int_04 = modbus_table_analog_in[136].all * 10;
}
if (modbus_table_analog_in[137].all > 0) {
edrk.iqMIN_U_IN = _IQ(((float)modbus_table_analog_in[137].all) / NORMA_ACP);
}
if (modbus_table_analog_in[138].all > 0) {
edrk.iqMIN_U_IN = _IQ(((float)modbus_table_analog_in[138].all) / NORMA_ACP);
}
if (modbus_table_analog_in[139].all > 0) {
edrk.iqMIN_U_ZPT = _IQ(((float)modbus_table_analog_in[139].all) / NORMA_ACP);
}
if (modbus_table_analog_in[140].all > 0) {
edrk.iqMIN_U_ZPT = _IQ(((float)modbus_table_analog_in[140].all) / NORMA_ACP);
}
if (modbus_table_analog_in[142].all > 0) {
edrk.iqMAX_U_IN = _IQ(((float)modbus_table_analog_in[142].all) / NORMA_ACP);
}
if (modbus_table_analog_in[143].all > 0) {
edrk.iqMAX_U_IN = _IQ(((float)modbus_table_analog_in[143].all) / NORMA_ACP);
}
if (modbus_table_analog_in[144].all > 0) {
edrk.iqMAX_U_ZPT = _IQ(((float)modbus_table_analog_in[144].all) / NORMA_ACP);
}
if (modbus_table_analog_in[145].all > 0) {
edrk.iqMAX_U_ZPT = _IQ(((float)modbus_table_analog_in[145].all) / NORMA_ACP);
}
if (modbus_table_analog_in[146].all > 0) {
protect_levels.alarm_Izpt_max = modbus_table_analog_in[146].all;
}
if (modbus_table_analog_in[155].all > 0) {
protect_levels.alarm_Imax_U01 = modbus_table_analog_in[155].all;
}
if (modbus_table_analog_in[156].all > 0) {
protect_levels.alarm_Imax_U02 = modbus_table_analog_in[156].all;
}
if (modbus_table_analog_in[157].all > 0) {
protect_levels.alarm_Imax_U03 = modbus_table_analog_in[157].all;
}
if (modbus_table_analog_in[158].all > 0) {
protect_levels.alarm_Imax_U04 = modbus_table_analog_in[158].all;
}
if (modbus_table_analog_in[159].all > 0) {
protect_levels.alarm_Imax_U05 = modbus_table_analog_in[159].all;
}
if (modbus_table_analog_in[160].all > 0) {
protect_levels.alarm_Imax_U06 = modbus_table_analog_in[160].all;
}
if (modbus_table_analog_in[161].all > 0) {
protect_levels.alarm_Imax_U07 = modbus_table_analog_in[161].all;
}
if (modbus_table_analog_in[162].all > 0) {
protect_levels.alarm_Iged_max = modbus_table_analog_in[162].all;
}
}

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Inu/Src/main/modbus_hmi_read.h Normal file
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/*
* modbus_hmi_read.h
*
* Created on: 21 äåê. 2020 ã.
* Author: star
*/
#ifndef SRC_MAIN_MODBUS_HMI_READ_H_
#define SRC_MAIN_MODBUS_HMI_READ_H_
void parse_protect_levels_HMI(void);
#endif /* SRC_MAIN_MODBUS_HMI_READ_H_ */

2022
Inu/Src/main/modbus_hmi_update.c Normal file
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39
Inu/Src/main/modbus_hmi_update.h Normal file
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#ifndef _HMI_UPDATE
#define _HMI_UPDATE
#define LIMITER_U_I_PULT 5.0 //10.0
typedef enum {
state_not_init = 0, state_ready1 = 1, state_ready2, state_go, state_assemble, state_fault, state_accident
} Inverter_state;
void update_tables_HMI(void);
void update_logs_cmd_HMI(void);
void update_tables_HMI_on_inited(int perc_load);
void update_tables_HMI_analog(void);
void update_tables_HMI_discrete(void);
int update_progress_load_hmi(int proc_load);
void setStateHMI(Inverter_state state);
void setElementsColorsHMI(Inverter_state state);
void get_command_HMI(void);
void func_unpack_answer_from_Ingeteam(unsigned int cc);
extern int hmi_watch_dog;
void update_nPCH(void);
void inc_count_build(void);
void inc_count_revers(void);
void set_write_slow_logs(int cmd);
void update_LoggerParams(void);
#endif //_HMI_UPDATE

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#include "DSP281x_Examples.h" // DSP281x Examples Include File
#include "DSP281x_Device.h" // DSP281x Headerfile Include File
#include <adc_tools.h>
#include <control_station_project.h>
#include <detect_errors_adc.h>
#include <edrk_main.h>
#include <master_slave.h>
#include <optical_bus.h>
#include <params.h>
#include <params_norma.h>
#include <protect_levels.h>
#include <v_rotor.h>
#include <v_rotor.h>
#include "math.h"
#include "control_station.h"
#include "CAN_Setup.h"
#include "modbus_table_v2.h"
#include "mathlib.h"
void update_errors_to_svu(void);
void update_protect_levels_to_MPU(void);
void update_svu_modbus_table(void)
{
int current_active_control;
modbus_table_can_out[0].all = edrk.Stop ? 7 :
// edrk.Provorot ? 6 :
edrk.Go ? 5 :
edrk.Status_Ready.bits.ready_final ? 4 :
edrk.to_ing.bits.RASCEPITEL_ON ? 3 :
edrk.SumSbor ? 2 :
edrk.Status_Ready.bits.ready1 ? 1 : 0;
modbus_table_can_out[1].all = edrk.warning;
modbus_table_can_out[2].all = edrk.overheat;
// modbus_table_can_out[3].all = Îãðàíè÷åíèå ìîùíîñòè ÃÝÄ;
// modbus_table_can_out[4].all = Ïåðåãðóçêà ÃÝÄ;
modbus_table_can_out[5].all = edrk.Status_Ready.bits.Batt;
modbus_table_can_out[6].all = edrk.from_ing1.bits.UPC_24V_NORMA | edrk.from_ing1.bits.OP_PIT_NORMA ? 0 : 1;
modbus_table_can_out[7].all = WRotor.RotorDirectionSlow >= 0 ? 0 : 1;
modbus_table_can_out[8].all = edrk.Mode_ScalarVectorUFConst == ALG_MODE_FOC_POWER ||
edrk.Mode_ScalarVectorUFConst == ALG_MODE_SCALAR_POWER ? 1 : 0;
current_active_control = get_current_station_control();
modbus_table_can_out[9].all = current_active_control == CONTROL_STATION_INGETEAM_PULT_RS485 ? 1 :
current_active_control == CONTROL_STATION_MPU_KEY_CAN || current_active_control == CONTROL_STATION_MPU_KEY_RS485 ? 2 :
current_active_control == CONTROL_STATION_ZADATCHIK_CAN ? 3 :
current_active_control == CONTROL_STATION_VPU_CAN ? 4 :
current_active_control == CONTROL_STATION_MPU_SVU_CAN || current_active_control == CONTROL_STATION_MPU_SVU_RS485 ? 5 :
0;
modbus_table_can_out[10].all = edrk.errors.e2.bits.T_UO1_MAX || edrk.errors.e6.bits.UO1_KEYS ? 3 :
edrk.warnings.e2.bits.T_UO1_MAX ? 2 : 1;
modbus_table_can_out[11].all = edrk.errors.e2.bits.T_UO2_MAX || edrk.errors.e6.bits.UO2_KEYS ? 3 :
edrk.warnings.e2.bits.T_UO2_MAX ? 2 : 1;
modbus_table_can_out[12].all = edrk.errors.e2.bits.T_UO3_MAX || edrk.errors.e6.bits.UO3_KEYS ? 3 :
edrk.warnings.e2.bits.T_UO3_MAX ? 2 : 1;
modbus_table_can_out[13].all = edrk.errors.e2.bits.T_UO4_MAX || edrk.errors.e6.bits.UO4_KEYS ? 3 :
edrk.warnings.e2.bits.T_UO4_MAX ? 2 : 1;
modbus_table_can_out[14].all = edrk.errors.e2.bits.T_UO5_MAX || edrk.errors.e6.bits.UO5_KEYS ? 3 :
edrk.warnings.e2.bits.T_UO5_MAX ? 2 : 1;
modbus_table_can_out[15].all = edrk.errors.e2.bits.T_UO6_MAX || edrk.errors.e6.bits.UO6_KEYS ? 3 :
edrk.warnings.e2.bits.T_UO6_MAX ? 2 : 1;
modbus_table_can_out[16].all = edrk.errors.e2.bits.T_UO7_MAX || edrk.errors.e6.bits.UO7_KEYS ? 3 :
edrk.warnings.e2.bits.T_UO7_MAX ? 2 : 1;
modbus_table_can_out[17].all = edrk.Status_QTV_Ok;// edrk.from_shema.bits.QTV_ON_OFF;
modbus_table_can_out[18].all = edrk.from_svu.bits.BLOCKED;
modbus_table_can_out[19].all = edrk.from_shema_filter.bits.UMP_ON_OFF;
modbus_table_can_out[20].all = edrk.from_shema_filter.bits.READY_UMP;
modbus_table_can_out[21].all = edrk.from_ing1.bits.RASCEPITEL_ON;
modbus_table_can_out[22].all = edrk.from_ing1.bits.UPC_24V_NORMA;
modbus_table_can_out[23].all = edrk.from_ing1.bits.OHLAD_UTE4KA_WATER;
modbus_table_can_out[24].all = edrk.from_ing2.bits.SOST_ZAMKA;
modbus_table_can_out[25].all = edrk.from_ing1.bits.ZARYAD_ON | edrk.from_shema_filter.bits.UMP_ON_OFF; //Âèäèìî, çàðÿäà îò âíóòðåííåãî ÓÌÏ íå áóäåò, äîáàâèë ÓÌÏ íàìàãíè÷èâàíèÿ
modbus_table_can_out[26].all = edrk.from_ing1.bits.VENTIL_ON;
modbus_table_can_out[27].all = edrk.to_ing.bits.NASOS_1_ON == 1 && edrk.from_ing1.bits.NASOS_ON == 1 ? 1 : 0;
modbus_table_can_out[28].all = edrk.to_ing.bits.NASOS_2_ON == 1 && edrk.from_ing1.bits.NASOS_ON == 1 ? 1 : 0;
modbus_table_can_out[29].all = edrk.from_ing1.bits.NASOS_NORMA;
modbus_table_can_out[30].all = edrk.from_ing1.bits.ZAZEML_ON;
modbus_table_can_out[31].all = edrk.from_ing1.bits.NAGREV_ON;
modbus_table_can_out[32].all = edrk.from_ing1.bits.BLOCK_IZOL_NORMA == 1 ? 1 : 0;
modbus_table_can_out[33].all = edrk.errors.e5.bits.ERROR_ISOLATE == 0 && edrk.from_ing1.bits.BLOCK_IZOL_NORMA == 1 ? 0 : 1;
modbus_table_can_out[34].all = edrk.from_ing1.bits.ALL_KNOPKA_AVARIA;
if (edrk.MasterSlave == MODE_MASTER)
modbus_table_can_out[35].all = 1;
else
if (edrk.MasterSlave == MODE_SLAVE)
modbus_table_can_out[35].all = 0;
else
modbus_table_can_out[35].all = 2; // MODE_DONTKNOW
// modbus_table_can_out[35].all = edrk.MasterSlave == MODE_MASTER ? 1 : 0;
modbus_table_can_out[36].all = edrk.from_ing1.bits.OP_PIT_NORMA & edrk.from_ing1.bits.UPC_24V_NORMA;
modbus_table_can_out[37].all = optical_read_data.status == 1 && optical_write_data.status == 1 ? 1 : 0;
modbus_table_can_out[38].all = edrk.warnings.e7.bits.MASTER_SLAVE_SYNC == 0 ? 1 : 0;
modbus_table_can_out[39].all = fast_round(_IQtoF(filter.iqIm) * NORMA_ACP);
modbus_table_can_out[40].all = fast_round(_IQtoF(filter.iqIin_sum) * NORMA_ACP);
modbus_table_can_out[41].all = fast_round(_IQtoF(filter.iqU_1_long + filter.iqU_2_long) * NORMA_ACP);
if (filter.iqUin_m1>=filter.iqUin_m2)
modbus_table_can_out[42].all = fast_round(_IQtoF(filter.iqUin_m1) * NORMA_ACP / 1.41);
else
modbus_table_can_out[42].all = fast_round(_IQtoF(filter.iqUin_m2) * NORMA_ACP / 1.41);
modbus_table_can_out[43].all = fast_round(_IQtoF(filter.iqU_1_long) * NORMA_ACP);
modbus_table_can_out[44].all = fast_round(_IQtoF(filter.iqU_2_long) * NORMA_ACP);
modbus_table_can_out[45].all = fast_round(_IQtoF(filter.iqIm_1) * NORMA_ACP / 1.41);
modbus_table_can_out[46].all = fast_round(_IQtoF(filter.iqIm_1) * NORMA_ACP / 1.41);
modbus_table_can_out[47].all = fast_round(_IQtoF(filter.iqIm_1) * NORMA_ACP / 1.41);
modbus_table_can_out[48].all = fast_round(_IQtoF(filter.iqIm_2) * NORMA_ACP / 1.41);
modbus_table_can_out[49].all = fast_round(_IQtoF(filter.iqIm_2) * NORMA_ACP / 1.41);
modbus_table_can_out[50].all = fast_round(_IQtoF(filter.iqIm_2) * NORMA_ACP / 1.41);
modbus_table_can_out[51].all = fast_round(_IQtoF(filter.iqIin_sum) * NORMA_ACP);
// modbus_table_can_out[52].all = Uvh rms
// modbus_table_can_out[53].all =
// modbus_table_can_out[54].all =
// modbus_table_can_out[55].all =
modbus_table_can_out[56].all = _IQtoF(analog.iqIbreak_1) * NORMA_ACP;
modbus_table_can_out[57].all = _IQtoF(analog.iqIbreak_2) * NORMA_ACP;
//Temperatures
modbus_table_can_out[58].all = fast_round(edrk.temper_edrk.real_temper_u[0]);
modbus_table_can_out[59].all = fast_round(edrk.temper_edrk.real_temper_u[1]);
modbus_table_can_out[60].all = fast_round(edrk.temper_edrk.real_temper_u[2]);
modbus_table_can_out[61].all = fast_round(edrk.temper_edrk.real_temper_u[3]);
modbus_table_can_out[62].all = fast_round(edrk.temper_edrk.real_temper_u[4]);
modbus_table_can_out[63].all = fast_round(edrk.temper_edrk.real_temper_u[5]);
modbus_table_can_out[64].all = fast_round(edrk.temper_edrk.real_temper_u[6]);
modbus_table_can_out[65].all = fast_round(edrk.temper_edrk.real_temper_water[1]);
modbus_table_can_out[66].all = fast_round(edrk.temper_edrk.real_temper_water[0]);
modbus_table_can_out[67].all = fast_round(edrk.temper_edrk.real_temper_air[0]);
modbus_table_can_out[68].all = fast_round(edrk.temper_edrk.real_temper_air[1]);
modbus_table_can_out[69].all = fast_round(edrk.temper_edrk.real_temper_air[2]);
modbus_table_can_out[70].all = fast_round(edrk.temper_edrk.real_temper_air[3]);
modbus_table_can_out[71].all = fast_round(edrk.p_water_edrk.real_p_water[0]);
modbus_table_can_out[72].all = fast_round(_IQtoF(edrk.zadanie.iq_oborots_zad_hz_rmp) * NORMA_FROTOR * 60);
modbus_table_can_out[73].all = edrk.oborots;// fast_round(_IQtoF(WRotor.iqWRotorSumFilter3) * NORMA_FROTOR * 60);
modbus_table_can_out[74].all = edrk.oborots;//fast_round(_IQtoF(WRotor.iqWRotorSumFilter3) * NORMA_FROTOR * 60); //Sensor 1
modbus_table_can_out[75].all = edrk.oborots;//fast_round(_IQtoF(WRotor.iqWRotorSumFilter3) * NORMA_FROTOR * 60); //Sensor 1
modbus_table_can_out[76].all = fast_round(_IQtoF(edrk.zadanie.iq_power_zad_rmp) * NORMA_ACP * NORMA_ACP / 1000.0);
modbus_table_can_out[77].all = fabs(edrk.power_kw);// fast_round(_IQtoF(filter.PowerScalar) * NORMA_ACP* NORMA_ACP / 1000.0);
modbus_table_can_out[78].all = fast_round(edrk.temper_acdrive.winding.filter_real_temper[0]);
modbus_table_can_out[79].all = fast_round(edrk.temper_acdrive.winding.filter_real_temper[1]);
modbus_table_can_out[80].all = fast_round(edrk.temper_acdrive.winding.filter_real_temper[2]);
modbus_table_can_out[81].all = fast_round(edrk.temper_acdrive.winding.filter_real_temper[3]);
modbus_table_can_out[82].all = fast_round(edrk.temper_acdrive.winding.filter_real_temper[4]);
modbus_table_can_out[83].all = fast_round(edrk.temper_acdrive.winding.filter_real_temper[5]);
modbus_table_can_out[84].all = fast_round(edrk.temper_acdrive.bear.filter_real_temper[0]); //Ïðèâîäíàÿ ñòîðîíà TODO: ïðîâåðèòü ñîîòâåòñòâèå
modbus_table_can_out[85].all = fast_round(edrk.temper_acdrive.bear.filter_real_temper[1]); //Íåïðèâîäíàÿ ñòîðîíà
modbus_table_can_out[86].all = Unites[UMU_CAN_DEVICE][24];
modbus_table_can_out[87].all = Unites[UMU_CAN_DEVICE][25];
modbus_table_can_out[88].all = Unites[UMU_CAN_DEVICE][28];
modbus_table_can_out[89].all = Unites[UMU_CAN_DEVICE][29];
modbus_table_can_out[90].all = Unites[UMU_CAN_DEVICE][34];
modbus_table_can_out[91].all = Unites[UMU_CAN_DEVICE][35];
modbus_table_can_out[92].all = Unites[UMU_CAN_DEVICE][34]; //Äóáëèðîâàë, íåò ó Äèìû
modbus_table_can_out[93].all = Unites[UMU_CAN_DEVICE][35]; //Äóáëèðîâàë, íåò ó Äèìû
modbus_table_can_out[94].all = edrk.warnings.e2.bits.T_UO1_MAX | edrk.warnings.e2.bits.T_UO2_MAX |
edrk.warnings.e2.bits.T_UO3_MAX | edrk.warnings.e2.bits.T_UO4_MAX |
edrk.warnings.e2.bits.T_UO5_MAX | edrk.warnings.e2.bits.T_UO6_MAX |
edrk.warnings.e2.bits.T_UO7_MAX;
modbus_table_can_out[95].all = edrk.errors.e2.bits.T_UO1_MAX | edrk.errors.e2.bits.T_UO2_MAX |
edrk.errors.e2.bits.T_UO3_MAX | edrk.errors.e2.bits.T_UO4_MAX |
edrk.errors.e2.bits.T_UO5_MAX | edrk.errors.e2.bits.T_UO6_MAX |
edrk.errors.e2.bits.T_UO7_MAX;
modbus_table_can_out[96].all = edrk.warnings.e2.bits.T_AIR0_MAX | edrk.warnings.e2.bits.T_AIR1_MAX |
edrk.warnings.e2.bits.T_AIR2_MAX | edrk.warnings.e2.bits.T_AIR3_MAX;
modbus_table_can_out[97].all = edrk.errors.e2.bits.T_AIR0_MAX | edrk.errors.e2.bits.T_AIR1_MAX |
edrk.errors.e2.bits.T_AIR2_MAX | edrk.errors.e2.bits.T_AIR3_MAX;
modbus_table_can_out[98].all = edrk.warnings.e2.bits.T_WATER_EXT_MAX;
modbus_table_can_out[99].all = edrk.errors.e2.bits.T_WATER_EXT_MAX;
modbus_table_can_out[100].all = edrk.warnings.e2.bits.T_WATER_INT_MAX;
modbus_table_can_out[101].all = edrk.errors.e2.bits.T_WATER_INT_MAX;
modbus_table_can_out[102].all = edrk.warnings.e2.bits.P_WATER_INT_MAX;
modbus_table_can_out[103].all = edrk.errors.e2.bits.P_WATER_INT_MAX;
modbus_table_can_out[104].all = edrk.warnings.e2.bits.P_WATER_INT_MIN;
modbus_table_can_out[105].all = edrk.errors.e2.bits.P_WATER_INT_MIN;
modbus_table_can_out[106].all = edrk.warnings.e7.bits.T_ACDRIVE_WINDING_MAX;
modbus_table_can_out[107].all = edrk.errors.e7.bits.T_ACDRIVE_WINDING_MAX;
modbus_table_can_out[108].all = edrk.warnings.e7.bits.T_ACDRIVE_BEAR_MAX_DNE; //Òåìïåðàòóðà ïîäøèïíèêà
modbus_table_can_out[109].all = edrk.errors.e7.bits.T_ACDRIVE_BEAR_MAX_DNE;
modbus_table_can_out[110].all = edrk.warnings.e9.bits.T_ACDRIVE_BEAR_MAX_NE; //Ïðîâåðèòü ïðèâîäíîé è íå ïðèâîäíîé
modbus_table_can_out[111].all = edrk.errors.e9.bits.T_ACDRIVE_BEAR_MAX_NE;
modbus_table_can_out[112].all = edrk.warnings.e9.bits.I_GED_MAX;
modbus_table_can_out[113].all = edrk.errors.e1.bits.I_UO2_MAX | edrk.errors.e1.bits.I_UO3_MAX |
edrk.errors.e1.bits.I_UO4_MAX | edrk.errors.e1.bits.I_UO5_MAX |
edrk.errors.e1.bits.I_UO6_MAX | edrk.errors.e1.bits.I_UO7_MAX; //TODO add adc errors
modbus_table_can_out[114].all = edrk.errors.e0.bits.I_1_MAX | edrk.errors.e0.bits.I_2_MAX;
modbus_table_can_out[115].all = edrk.errors.e0.bits.U_1_MAX | edrk.errors.e0.bits.U_2_MAX;
modbus_table_can_out[116].all = edrk.warnings.e0.bits.U_IN_MIN;
modbus_table_can_out[117].all = edrk.errors.e0.bits.U_IN_MIN;
modbus_table_can_out[118].all = edrk.warnings.e0.bits.U_IN_MAX;
modbus_table_can_out[119].all = edrk.errors.e0.bits.U_IN_MAX;
modbus_table_can_out[120].all = edrk.warnings.e9.bits.SENSOR_ROTOR_1_BREAK; //TODO íåèñïðàâíîñòü äàò÷èêà îáîðîòîâ
modbus_table_can_out[121].all = edrk.warnings.e9.bits.SENSOR_ROTOR_2_BREAK; //TODO ïðåâûøåíèå äîïóñòèìûõ îáîðîòîâ
modbus_table_can_out[122].all = edrk.Kvitir;
modbus_table_can_out[137].all = edrk.pult_data.data_from_pult.moto[15];
modbus_table_can_out[138].all = edrk.pult_data.data_from_pult.moto[6];
update_errors_to_svu();
update_protect_levels_to_MPU();
copy_from_can_out_to_rs_out();
}
#define MPU_ADRESS_CMD_START 122 // ó íàñ -1 îòíîñèòåëüíî íèî14, 122 ñîîòâåòñòâóåò 123 ó íèî14
#define MPU_ADRESS_CMD_END 144 //138 //
#if (MPU_ADRESS_CMD_END>=SIZE_MODBUS_TABLE)
#define MPU_ADRESS_CMD_END (SIZE_MODBUS_TABLE-1)
#endif
#if (MPU_ADRESS_CMD_END - MPU_ADRESS_CMD_START +1 )>CONTROL_STATION_MAX_RAW_DATA
#define MPU_LENGTH_CMD CONTROL_STATION_MAX_RAW_DATA
#else
#define MPU_LENGTH_CMD (MPU_ADRESS_CMD_END - MPU_ADRESS_CMD_START + 1)
#endif
/////////////////////////////////////////////////////////////////
/////////////////////////////////////////////////////////////////
void unpack_answer_from_MPU_SVU_CAN_filter(unsigned int cc)
{
unsigned int i = 0, j = 0, k, max_data;
for (i = 0; i < MPU_LENGTH_CMD; i++)
{
max_data = 0;//control_station.raw_array_data_temp[cc][i][0].all;
//min_data = 0;//control_station.raw_array_data_temp[cc][i][0].all;
for (j=0; j<CONTROL_STATION_MAX_RAW_DATA_TEMP; j++)
{
if (control_station.raw_array_data_temp[cc][i][j].all > max_data)
max_data = control_station.raw_array_data_temp[cc][i][j].all;
}
control_station.raw_array_data[cc][i].all = max_data;
}
}
//////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////
void unpack_answer_from_MPU_SVU_CAN(unsigned int cc) {
int i = 0, j = 0, k;
// static unsigned int prev_CAN_count_cycle_input_units = 0;
if (control_station.prev_CAN_count_cycle_input_units[cc] != mpu_can_setup.CAN_count_cycle_input_units[0])
{
k = control_station.count_raw_array_data_temp[cc];
for (i = 0, j = 0; i < MPU_LENGTH_CMD && j < CONTROL_STATION_MAX_RAW_DATA; i++, j++)
{
control_station.raw_array_data_temp[cc][j][k].all = modbus_table_can_in[MPU_ADRESS_CMD_START+i].all;
}
control_station.count_raw_array_data_temp[cc]++;
if (control_station.count_raw_array_data_temp[cc]>=CONTROL_STATION_MAX_RAW_DATA_TEMP)
control_station.count_raw_array_data_temp[cc] = 0;
control_station.prev_CAN_count_cycle_input_units[cc] = mpu_can_setup.CAN_count_cycle_input_units[0];
}
// for (i = ADRESS_CMD_START, j = 0; i < SIZE_MODBUS_TABLE && j < CONTROL_STATION_MAX_RAW_DATA; i++, j++)
// {
// control_station.raw_array_data[cc][j].all = modbus_table_can_in[i].all;
// }
unpack_answer_from_MPU_SVU_CAN_filter(cc);
}
void unpack_answer_from_MPU_SVU_RS(unsigned int cc) {
int i = 0, j = 0;
for (i = MPU_ADRESS_CMD_START, j = 0; i < SIZE_MODBUS_TABLE && j < CONTROL_STATION_MAX_RAW_DATA; i++, j++)
control_station.raw_array_data[cc][j].all = modbus_table_rs_in[i].all;
}
void update_errors_to_svu() {
modbus_table_can_out[208].bit.bit0 = project.cds_tk[0].read.sbus.status_protect_current_ack.bit.tk0_ack;
modbus_table_can_out[208].bit.bit1 = project.cds_tk[0].read.sbus.status_protect_current_ack.bit.tk1_ack;
modbus_table_can_out[208].bit.bit2 = project.cds_tk[0].read.sbus.status_protect_current_ack.bit.tk2_ack;
modbus_table_can_out[208].bit.bit3 = project.cds_tk[0].read.sbus.status_protect_current_ack.bit.tk3_ack;
modbus_table_can_out[208].bit.bit4 = project.cds_tk[0].read.sbus.status_protect_current_ack.bit.tk4_ack;
modbus_table_can_out[208].bit.bit5 = project.cds_tk[0].read.sbus.status_protect_current_ack.bit.tk5_ack;
modbus_table_can_out[208].bit.bit6 = project.cds_tk[0].read.sbus.status_protect_current_ack.bit.tk6_ack;
modbus_table_can_out[208].bit.bit7 = project.cds_tk[0].read.sbus.status_protect_current_ack.bit.tk7_ack;
modbus_table_can_out[208].bit.bit8 = project.cds_tk[1].read.sbus.status_protect_current_ack.bit.tk0_ack;
modbus_table_can_out[208].bit.bit9 = project.cds_tk[1].read.sbus.status_protect_current_ack.bit.tk1_ack;
modbus_table_can_out[208].bit.bit10 = project.cds_tk[1].read.sbus.status_protect_current_ack.bit.tk2_ack;
modbus_table_can_out[208].bit.bit11 = project.cds_tk[1].read.sbus.status_protect_current_ack.bit.tk3_ack;
modbus_table_can_out[208].bit.bit12 = project.cds_tk[1].read.sbus.status_protect_current_ack.bit.tk4_ack;
modbus_table_can_out[208].bit.bit13 = project.cds_tk[1].read.sbus.status_protect_current_ack.bit.tk5_ack;
modbus_table_can_out[208].bit.bit14 = project.cds_tk[1].read.sbus.status_protect_current_ack.bit.tk6_ack;
modbus_table_can_out[208].bit.bit15 = project.cds_tk[1].read.sbus.status_protect_current_ack.bit.tk7_ack;
modbus_table_can_out[200].bit.bit0 = project.cds_tk[2].read.sbus.status_protect_current_ack.bit.tk0_ack;
modbus_table_can_out[200].bit.bit1 = project.cds_tk[2].read.sbus.status_protect_current_ack.bit.tk1_ack;
modbus_table_can_out[200].bit.bit2 = project.cds_tk[2].read.sbus.status_protect_current_ack.bit.tk2_ack;
modbus_table_can_out[200].bit.bit3 = project.cds_tk[2].read.sbus.status_protect_current_ack.bit.tk3_ack;
modbus_table_can_out[200].bit.bit4 = project.cds_tk[2].read.sbus.status_protect_current_ack.bit.tk4_ack;
modbus_table_can_out[200].bit.bit5 = project.cds_tk[2].read.sbus.status_protect_current_ack.bit.tk5_ack;
modbus_table_can_out[200].bit.bit6 = project.cds_tk[2].read.sbus.status_protect_current_ack.bit.tk6_ack;
modbus_table_can_out[200].bit.bit7 = project.cds_tk[2].read.sbus.status_protect_current_ack.bit.tk7_ack;
modbus_table_can_out[200].bit.bit8 = project.cds_tk[3].read.sbus.status_protect_current_ack.bit.tk0_ack;
modbus_table_can_out[200].bit.bit9 = project.cds_tk[3].read.sbus.status_protect_current_ack.bit.tk1_ack;
if (edrk.flag_second_PCH == 1) {
modbus_table_can_out[200].bit.bit10 = edrk.errors.e4.bits.ANOTHER_BS_POWER_OFF;
} else {
modbus_table_can_out[200].bit.bit11 = edrk.errors.e4.bits.ANOTHER_BS_POWER_OFF;
}
modbus_table_can_out[201].bit.bit0 = project.cds_tk[0].read.sbus.status_protect_current_ack.bit.tk0_current;
modbus_table_can_out[201].bit.bit1 = project.cds_tk[0].read.sbus.status_protect_current_ack.bit.tk1_current;
modbus_table_can_out[201].bit.bit2 = project.cds_tk[0].read.sbus.status_protect_current_ack.bit.tk2_current;
modbus_table_can_out[201].bit.bit3 = project.cds_tk[0].read.sbus.status_protect_current_ack.bit.tk3_current;
modbus_table_can_out[201].bit.bit4 = project.cds_tk[0].read.sbus.status_protect_current_ack.bit.tk4_current;
modbus_table_can_out[201].bit.bit5 = project.cds_tk[0].read.sbus.status_protect_current_ack.bit.tk5_current;
modbus_table_can_out[201].bit.bit6 = project.cds_tk[0].read.sbus.status_protect_current_ack.bit.tk6_current;
modbus_table_can_out[201].bit.bit7 = project.cds_tk[0].read.sbus.status_protect_current_ack.bit.tk7_current;
modbus_table_can_out[201].bit.bit8 = project.cds_tk[1].read.sbus.status_protect_current_ack.bit.tk0_current;
modbus_table_can_out[201].bit.bit9 = project.cds_tk[1].read.sbus.status_protect_current_ack.bit.tk1_current;
modbus_table_can_out[201].bit.bit10 = project.cds_tk[1].read.sbus.status_protect_current_ack.bit.tk2_current;
modbus_table_can_out[201].bit.bit11 = project.cds_tk[1].read.sbus.status_protect_current_ack.bit.tk3_current;
modbus_table_can_out[201].bit.bit12 = project.cds_tk[1].read.sbus.status_protect_current_ack.bit.tk4_current;
modbus_table_can_out[201].bit.bit13 = project.cds_tk[1].read.sbus.status_protect_current_ack.bit.tk5_current;
modbus_table_can_out[201].bit.bit14 = project.cds_tk[1].read.sbus.status_protect_current_ack.bit.tk6_current;
modbus_table_can_out[201].bit.bit15 = project.cds_tk[1].read.sbus.status_protect_current_ack.bit.tk7_current;
modbus_table_can_out[202].bit.bit0 = project.cds_tk[2].read.sbus.status_protect_current_ack.bit.tk0_current;
modbus_table_can_out[202].bit.bit1 = project.cds_tk[2].read.sbus.status_protect_current_ack.bit.tk1_current;
modbus_table_can_out[202].bit.bit2 = project.cds_tk[2].read.sbus.status_protect_current_ack.bit.tk2_current;
modbus_table_can_out[202].bit.bit3 = project.cds_tk[2].read.sbus.status_protect_current_ack.bit.tk3_current;
modbus_table_can_out[202].bit.bit4 = project.cds_tk[2].read.sbus.status_protect_current_ack.bit.tk4_current;
modbus_table_can_out[202].bit.bit5 = project.cds_tk[2].read.sbus.status_protect_current_ack.bit.tk5_current;
modbus_table_can_out[202].bit.bit6 = project.cds_tk[2].read.sbus.status_protect_current_ack.bit.tk6_current;
modbus_table_can_out[202].bit.bit7 = project.cds_tk[2].read.sbus.status_protect_current_ack.bit.tk7_current;
modbus_table_can_out[202].bit.bit8 = project.cds_tk[3].read.sbus.status_protect_current_ack.bit.tk0_current;
modbus_table_can_out[202].bit.bit9 = project.cds_tk[3].read.sbus.status_protect_current_ack.bit.tk1_current;
modbus_table_can_out[203].bit.bit0 = project.cds_tk[0].read.sbus.lock_status_error.bit.mintime_err_keys_3210;
modbus_table_can_out[203].bit.bit1 = project.cds_tk[0].read.sbus.lock_status_error.bit.mintime_err_keys_3210;
modbus_table_can_out[203].bit.bit2 = project.cds_tk[0].read.sbus.lock_status_error.bit.mintime_err_keys_3210;
modbus_table_can_out[203].bit.bit3 = project.cds_tk[0].read.sbus.lock_status_error.bit.mintime_err_keys_3210;
modbus_table_can_out[203].bit.bit4 = project.cds_tk[0].read.sbus.lock_status_error.bit.mintime_err_keys_7654;
modbus_table_can_out[203].bit.bit5 = project.cds_tk[0].read.sbus.lock_status_error.bit.mintime_err_keys_7654;
modbus_table_can_out[203].bit.bit6 = project.cds_tk[0].read.sbus.lock_status_error.bit.mintime_err_keys_7654;
modbus_table_can_out[203].bit.bit7 = project.cds_tk[0].read.sbus.lock_status_error.bit.mintime_err_keys_7654;
modbus_table_can_out[203].bit.bit8 = project.cds_tk[1].read.sbus.lock_status_error.bit.mintime_err_keys_3210;
modbus_table_can_out[203].bit.bit9 = project.cds_tk[1].read.sbus.lock_status_error.bit.mintime_err_keys_3210;
modbus_table_can_out[203].bit.bit10 = project.cds_tk[1].read.sbus.lock_status_error.bit.mintime_err_keys_3210;
modbus_table_can_out[203].bit.bit11 = project.cds_tk[1].read.sbus.lock_status_error.bit.mintime_err_keys_3210;
modbus_table_can_out[203].bit.bit12 = project.cds_tk[1].read.sbus.lock_status_error.bit.mintime_err_keys_7654;
modbus_table_can_out[203].bit.bit13 = project.cds_tk[1].read.sbus.lock_status_error.bit.mintime_err_keys_7654;
modbus_table_can_out[203].bit.bit14 = project.cds_tk[1].read.sbus.lock_status_error.bit.mintime_err_keys_7654;
modbus_table_can_out[203].bit.bit15 = project.cds_tk[1].read.sbus.lock_status_error.bit.mintime_err_keys_7654;
modbus_table_can_out[204].bit.bit0 = project.cds_tk[2].read.sbus.lock_status_error.bit.mintime_err_keys_3210;
modbus_table_can_out[204].bit.bit1 = project.cds_tk[2].read.sbus.lock_status_error.bit.mintime_err_keys_3210;
modbus_table_can_out[204].bit.bit2 = project.cds_tk[2].read.sbus.lock_status_error.bit.mintime_err_keys_3210;
modbus_table_can_out[204].bit.bit3 = project.cds_tk[2].read.sbus.lock_status_error.bit.mintime_err_keys_3210;
modbus_table_can_out[204].bit.bit4 = project.cds_tk[2].read.sbus.lock_status_error.bit.mintime_err_keys_7654;
modbus_table_can_out[204].bit.bit5 = project.cds_tk[2].read.sbus.lock_status_error.bit.mintime_err_keys_7654;
modbus_table_can_out[204].bit.bit6 = project.cds_tk[2].read.sbus.lock_status_error.bit.mintime_err_keys_7654;
modbus_table_can_out[204].bit.bit7 = project.cds_tk[2].read.sbus.lock_status_error.bit.mintime_err_keys_7654;
modbus_table_can_out[204].bit.bit8 = project.cds_tk[3].read.sbus.lock_status_error.bit.mintime_err_keys_3210;
modbus_table_can_out[204].bit.bit9 = project.cds_tk[3].read.sbus.lock_status_error.bit.mintime_err_keys_3210;
modbus_table_can_out[205].bit.bit0 = edrk.errors.e3.bits.NOT_READY_TK_0;
modbus_table_can_out[205].bit.bit1 = edrk.errors.e3.bits.NOT_READY_TK_1;
modbus_table_can_out[205].bit.bit2 = edrk.errors.e3.bits.NOT_READY_TK_2;
modbus_table_can_out[205].bit.bit3 = edrk.errors.e3.bits.NOT_READY_TK_3;
modbus_table_can_out[205].bit.bit4 = edrk.errors.e3.bits.NOT_READY_IN_0;
modbus_table_can_out[205].bit.bit5 = edrk.errors.e3.bits.NOT_READY_IN_1;
modbus_table_can_out[205].bit.bit6 = edrk.errors.e3.bits.NOT_READY_OUT_0;
modbus_table_can_out[205].bit.bit7 = edrk.errors.e3.bits.NOT_READY_ADC_0;
modbus_table_can_out[205].bit.bit8 = edrk.errors.e3.bits.NOT_READY_HWP_0;
modbus_table_can_out[205].bit.bit9 = edrk.errors.e3.bits.NOT_READY_ADC_1;
modbus_table_can_out[205].bit.bit10 = edrk.errors.e3.bits.NOT_READY_CONTR;
modbus_table_can_out[206].bit.bit0 = edrk.errors.e5.bits.KEY_AVARIA;
modbus_table_can_out[206].bit.bit1 = edrk.errors.e6.bits.QTV_ERROR_NOT_ANSWER;
modbus_table_can_out[206].bit.bit2 = edrk.errors.e7.bits.SVU_BLOCK_ON_QTV;
modbus_table_can_out[206].bit.bit3 = edrk.errors.e7.bits.UMP_NOT_ANSWER;
modbus_table_can_out[206].bit.bit4 = edrk.errors.e7.bits.UMP_NOT_READY;
modbus_table_can_out[206].bit.bit5 = edrk.errors.e6.bits.RASCEPITEL_ERROR_NOT_ANSWER;
modbus_table_can_out[206].bit.bit6 = edrk.errors.e7.bits.ANOTHER_RASCEPITEL_ON;
modbus_table_can_out[206].bit.bit7 = edrk.warnings.e7.bits.AUTO_SET_MASTER;
modbus_table_can_out[206].bit.bit8 = edrk.errors.e7.bits.ANOTHER_PCH_NOT_ANSWER;
modbus_table_can_out[206].bit.bit9 = edrk.errors.e8.bits.WDOG_OPTICAL_BUS;
modbus_table_can_out[206].bit.bit10 = edrk.errors.e6.bits.QTV_ERROR_NOT_ANSWER; //Íåò ïîäòâåðæäåíèå íà îòêëþ÷åíèå àâòîìàòà ãëàâíîãî òîêà
modbus_table_can_out[206].bit.bit11 = edrk.errors.e1.bits.NO_CONFIRM_ON_RASCEPITEL; //Íåò ðàçðåøåíèå îò äðóãîãî ÁÑ íà ïîäêëþ÷åíèå ðàñöåïèòåëÿ
modbus_table_can_out[206].bit.bit12 = edrk.errors.e6.bits.RASCEPITEL_ERROR_NOT_ANSWER;
modbus_table_can_out[206].bit.bit13 = edrk.errors.e1.bits.ANOTHER_BS_VERY_LONG_WAIT;
modbus_table_can_out[206].bit.bit14 = edrk.errors.e1.bits.VERY_LONG_BOTH_READY2;
modbus_table_can_out[206].bit.bit15 = edrk.errors.e1.bits.BOTH_KEYS_CHARGE_DISCHARGE;
modbus_table_can_out[207].bit.bit0 = !control_station.alive_control_station[CONTROL_STATION_ZADATCHIK_CAN];
modbus_table_can_out[207].bit.bit1 = !control_station.alive_control_station[CONTROL_STATION_MPU_SVU_CAN];
modbus_table_can_out[207].bit.bit2 = 0;// CAN_timeout[get_real_in_mbox(UNITS_TYPE_BOX,UMU_CAN_DEVICE)]; Èñêëþ÷¸í èç ñõåìû
modbus_table_can_out[207].bit.bit3 = CAN_timeout[get_real_in_mbox(UNITS_TYPE_BOX,BKSSD_CAN_DEVICE)];
modbus_table_can_out[207].bit.bit4 = CAN_timeout[get_real_in_mbox(UNITS_TYPE_BOX,VPU_CAN)];
modbus_table_can_out[207].bit.bit5 = edrk.warnings.e7.bits.CAN2CAN_BS;
modbus_table_can_out[207].bit.bit6 = edrk.errors.e7.bits.CAN2CAN_BS;
if (edrk.flag_second_PCH == 1) {
modbus_table_can_out[207].bit.bit7 = edrk.warnings.e4.bits.ANOTHER_BS_POWER_OFF;
} else {
modbus_table_can_out[207].bit.bit8 = edrk.warnings.e4.bits.ANOTHER_BS_POWER_OFF;
}
modbus_table_can_out[207].bit.bit9 = edrk.errors.e7.bits.ANOTHER_BS_ALARM; //àâàðèéíîå îòêëþ÷åíèå äðóãîãî ÁÑ (îïòè÷åñêèé êàíàë)
modbus_table_can_out[207].bit.bit10 = edrk.warnings.e7.bits.READ_OPTBUS; //íåò ïîäòâåðæäåíèÿ ðàáîòîñïîñîáíîñòè îïòè÷åñêîãî êàíàëà îò äðóãîãî ÁÑ äëÿ àâàðèéíîãî îòêëþ÷åíèÿ
modbus_table_can_out[209].bit.bit0 = edrk.errors.e5.bits.OP_PIT;
modbus_table_can_out[209].bit.bit1 = edrk.errors.e5.bits.UTE4KA_WATER;
modbus_table_can_out[209].bit.bit2 = edrk.errors.e1.bits.BLOCK_DOOR;
modbus_table_can_out[209].bit.bit3 = edrk.errors.e7.bits.UMP_NOT_READY;
modbus_table_can_out[209].bit.bit4 = edrk.errors.e5.bits.FAN;
modbus_table_can_out[209].bit.bit5 = edrk.errors.e5.bits.PUMP_1;
modbus_table_can_out[209].bit.bit6 = edrk.errors.e5.bits.PRE_READY_PUMP;
modbus_table_can_out[209].bit.bit7 = edrk.errors.e5.bits.ERROR_HEAT;
modbus_table_can_out[209].bit.bit8 = edrk.warnings.e5.bits.ERROR_ISOLATE;
modbus_table_can_out[209].bit.bit9 = edrk.errors.e5.bits.ERROR_PRED_VIPR;
modbus_table_can_out[209].bit.bit10 = edrk.errors.e5.bits.ERROR_ISOLATE;
modbus_table_can_out[209].bit.bit11 = edrk.errors.e5.bits.POWER_UPC;
modbus_table_can_out[209].bit.bit12 = edrk.errors.e5.bits.ERROR_GROUND_NET;
modbus_table_can_out[209].bit.bit13 = edrk.errors.e5.bits.PUMP_2;
modbus_table_can_out[209].bit.bit14 = edrk.from_ing1.bits.BLOCK_IZOL_NORMA ? 0 : 1;
modbus_table_can_out[210].bit.bit0 = edrk.errors.e0.bits.U_1_MAX;
modbus_table_can_out[210].bit.bit1 = edrk.errors.e0.bits.U_2_MAX;
modbus_table_can_out[210].bit.bit2 = edrk.errors.e0.bits.U_1_MIN;
modbus_table_can_out[210].bit.bit3 = edrk.errors.e0.bits.U_2_MIN;
modbus_table_can_out[210].bit.bit4 = edrk.errors.e0.bits.U_A1B1_MAX;
modbus_table_can_out[210].bit.bit5 = edrk.errors.e0.bits.U_A2B2_MAX;
modbus_table_can_out[210].bit.bit6 = edrk.errors.e0.bits.U_B1C1_MAX;
modbus_table_can_out[210].bit.bit7 = edrk.errors.e0.bits.U_B2C2_MAX;
modbus_table_can_out[210].bit.bit8 = edrk.errors.e0.bits.U_A1B1_MIN;
modbus_table_can_out[210].bit.bit9 = edrk.errors.e0.bits.U_A2B2_MIN;
modbus_table_can_out[210].bit.bit10 = edrk.errors.e0.bits.U_B1C1_MIN;
modbus_table_can_out[210].bit.bit11 = edrk.errors.e0.bits.U_B2C2_MIN;
modbus_table_can_out[210].bit.bit12 = edrk.errors.e0.bits.U_IN_MAX;
modbus_table_can_out[210].bit.bit13 = edrk.errors.e0.bits.U_IN_MIN;
modbus_table_can_out[211].bit.bit0 = edrk.errors.e1.bits.I_UO2_MAX;
modbus_table_can_out[211].bit.bit1 = edrk.errors.e1.bits.I_UO3_MAX;
modbus_table_can_out[211].bit.bit2 = edrk.errors.e1.bits.I_UO4_MAX;
modbus_table_can_out[211].bit.bit3 = edrk.errors.e1.bits.I_UO5_MAX;
modbus_table_can_out[211].bit.bit4 = edrk.errors.e1.bits.I_UO6_MAX;
modbus_table_can_out[211].bit.bit5 = edrk.errors.e1.bits.I_UO7_MAX;
modbus_table_can_out[211].bit.bit6 = edrk.errors.e1.bits.I_BREAK_1_MAX;
modbus_table_can_out[211].bit.bit7 = edrk.errors.e1.bits.I_BREAK_2_MAX;
modbus_table_can_out[211].bit.bit8 = edrk.errors.e0.bits.I_1_MAX;
modbus_table_can_out[211].bit.bit9 = edrk.errors.e0.bits.I_1_MAX;
modbus_table_can_out[211].bit.bit10 = edrk.warnings.e2.bits.T_AIR0_MAX;
modbus_table_can_out[211].bit.bit11 = edrk.warnings.e2.bits.T_AIR1_MAX;
modbus_table_can_out[211].bit.bit12 = edrk.warnings.e2.bits.T_AIR2_MAX;
modbus_table_can_out[211].bit.bit13 = edrk.warnings.e2.bits.T_AIR3_MAX;
if (edrk.power_limit.all)
modbus_table_can_out[211].bit.bit14 = 1;
else
modbus_table_can_out[211].bit.bit14 = 0;
modbus_table_can_out[211].bit.bit15 = edrk.warnings.e10.bits.WARNING_I_OUT_OVER_1_6_NOMINAL;
modbus_table_can_out[212].bit.bit0 = edrk.errors.e5.bits.ERROR_PRE_CHARGE_ON;
modbus_table_can_out[212].bit.bit1 = edrk.errors.e7.bits.ERROR_SBOR_SHEMA;
modbus_table_can_out[213].bit.bit0 = project.hwp[0].read.comp_s.plus.bit.ch0;
modbus_table_can_out[213].bit.bit1 = project.hwp[0].read.comp_s.plus.bit.ch1;
modbus_table_can_out[213].bit.bit2 = project.hwp[0].read.comp_s.plus.bit.ch2;
modbus_table_can_out[213].bit.bit3 = project.hwp[0].read.comp_s.plus.bit.ch3;
modbus_table_can_out[213].bit.bit4 = project.hwp[0].read.comp_s.plus.bit.ch4;
modbus_table_can_out[213].bit.bit5 = project.hwp[0].read.comp_s.plus.bit.ch5;
modbus_table_can_out[213].bit.bit6 = project.hwp[0].read.comp_s.plus.bit.ch6;
modbus_table_can_out[213].bit.bit7 = project.hwp[0].read.comp_s.plus.bit.ch7;
modbus_table_can_out[213].bit.bit8 = 0;
modbus_table_can_out[213].bit.bit9 = project.hwp[0].read.comp_s.plus.bit.ch9;
modbus_table_can_out[213].bit.bit10 = project.hwp[0].read.comp_s.plus.bit.ch10;
modbus_table_can_out[213].bit.bit11 = project.hwp[0].read.comp_s.plus.bit.ch11;
modbus_table_can_out[213].bit.bit12 = project.hwp[0].read.comp_s.plus.bit.ch12;
modbus_table_can_out[213].bit.bit13 = project.hwp[0].read.comp_s.plus.bit.ch13;
modbus_table_can_out[213].bit.bit14 = project.hwp[0].read.comp_s.plus.bit.ch14;
modbus_table_can_out[213].bit.bit15 = project.hwp[0].read.comp_s.plus.bit.ch15;
modbus_table_can_out[214].bit.bit0 = edrk.errors.e5.bits.LINE_ERR0;
modbus_table_can_out[214].bit.bit1 = edrk.errors.e5.bits.LINE_HWP;
modbus_table_can_out[214].bit.bit2 = project.hwp[0].read.comp_s.minus.bit.ch2;
modbus_table_can_out[214].bit.bit3 = project.hwp[0].read.comp_s.minus.bit.ch3;
modbus_table_can_out[214].bit.bit4 = project.hwp[0].read.comp_s.minus.bit.ch4;
modbus_table_can_out[214].bit.bit5 = project.hwp[0].read.comp_s.minus.bit.ch5;
modbus_table_can_out[214].bit.bit6 = project.hwp[0].read.comp_s.minus.bit.ch6;
modbus_table_can_out[214].bit.bit7 = project.hwp[0].read.comp_s.minus.bit.ch7;
modbus_table_can_out[214].bit.bit8 = 0;
modbus_table_can_out[214].bit.bit9 = project.hwp[0].read.comp_s.minus.bit.ch9;
modbus_table_can_out[214].bit.bit10 = project.hwp[0].read.comp_s.minus.bit.ch10;
modbus_table_can_out[214].bit.bit11 = project.hwp[0].read.comp_s.minus.bit.ch11;
modbus_table_can_out[214].bit.bit12 = project.hwp[0].read.comp_s.minus.bit.ch12;
modbus_table_can_out[214].bit.bit13 = project.hwp[0].read.comp_s.minus.bit.ch13;
modbus_table_can_out[214].bit.bit14 = project.hwp[0].read.comp_s.minus.bit.ch14;
modbus_table_can_out[214].bit.bit15 = project.hwp[0].read.comp_s.minus.bit.ch15;
modbus_table_can_out[215].bit.bit0 = edrk.errors.e8.bits.LOSS_INPUT_A1B1 | edrk.errors.e9.bits.DISBALANCE_Uin_1; //TODO: âòîðàÿ ÷àñòü âðåìåííàÿ
modbus_table_can_out[215].bit.bit1 = edrk.errors.e8.bits.LOSS_INPUT_B1C1 | edrk.errors.e9.bits.DISBALANCE_Uin_1;
modbus_table_can_out[215].bit.bit2 = edrk.errors.e8.bits.LOSS_INPUT_A2B2 | edrk.errors.e9.bits.DISBALANCE_Uin_2;
modbus_table_can_out[215].bit.bit3 = edrk.errors.e8.bits.LOSS_INPUT_B2C2 | edrk.errors.e9.bits.DISBALANCE_Uin_2;
modbus_table_can_out[215].bit.bit4 = edrk.errors.e9.bits.U_IN_FREQ_NOT_NORMA;
modbus_table_can_out[215].bit.bit5 = edrk.errors.e9.bits.U_IN_FREQ_NOT_STABLE;
modbus_table_can_out[215].bit.bit6 = edrk.errors.e7.bits.READ_OPTBUS | edrk.errors.e7.bits.WRITE_OPTBUS;
modbus_table_can_out[215].bit.bit7 = edrk.errors.e7.bits.MASTER_SLAVE_SYNC;
modbus_table_can_out[215].bit.bit8 = project.controller.read.errors_buses.bit.err_sbus;
modbus_table_can_out[215].bit.bit9 = project.controller.read.errors.bit.error_pbus || project.controller.read.errors_buses.bit.slave_addr_error
|| project.controller.read.errors_buses.bit.count_error_pbus;
modbus_table_can_out[215].bit.bit10 = edrk.errors.e6.bits.ER_DISBAL_BATT;
modbus_table_can_out[215].bit.bit11 = edrk.errors.e6.bits.QTV_ERROR_NOT_U;
modbus_table_can_out[215].bit.bit12 = edrk.errors.e6.bits.ERROR_PRE_CHARGE_U;
modbus_table_can_out[215].bit.bit13 = edrk.errors.e8.bits.U_IN_20_PROCENTS_HIGH;
modbus_table_can_out[215].bit.bit14 = edrk.errors.e8.bits.U_IN_10_PROCENTS_LOW;
modbus_table_can_out[215].bit.bit15 = edrk.errors.e8.bits.U_IN_20_PROCENTS_LOW;
modbus_table_can_out[216].bit.bit0 = project.cds_tk[0].read.sbus.lock_status_error.bit.err_power;
modbus_table_can_out[216].bit.bit1 = project.cds_tk[1].read.sbus.lock_status_error.bit.err_power;
modbus_table_can_out[216].bit.bit2 = project.cds_tk[2].read.sbus.lock_status_error.bit.err_power;
modbus_table_can_out[216].bit.bit3 = project.cds_tk[3].read.sbus.lock_status_error.bit.err_power;
modbus_table_can_out[216].bit.bit4 = project.cds_in[0].read.sbus.lock_status_error.bit.err_power;
modbus_table_can_out[216].bit.bit5 = project.cds_in[1].read.sbus.lock_status_error.bit.err_power;
modbus_table_can_out[216].bit.bit6 = project.cds_out[0].read.sbus.lock_status_error.bit.err_power;
modbus_table_can_out[216].bit.bit7 = edrk.errors.e7.bits.NOT_VALID_CONTROL_STATION;
modbus_table_can_out[216].bit.bit8 = edrk.errors.e8.bits.LOSS_OUTPUT_U1;
modbus_table_can_out[216].bit.bit9 = edrk.errors.e8.bits.LOSS_OUTPUT_V1;
modbus_table_can_out[216].bit.bit10 = edrk.errors.e8.bits.LOSS_OUTPUT_W1;
modbus_table_can_out[216].bit.bit11 = edrk.errors.e8.bits.LOSS_OUTPUT_U2;
modbus_table_can_out[216].bit.bit12 = edrk.errors.e8.bits.LOSS_OUTPUT_V2;
modbus_table_can_out[216].bit.bit13 = edrk.errors.e8.bits.LOSS_OUTPUT_W2;
modbus_table_can_out[216].bit.bit14 = edrk.errors.e8.bits.DISBALANCE_IM1_IM2;
modbus_table_can_out[216].bit.bit15 = edrk.errors.e7.bits.VERY_FAST_GO_0to1;
modbus_table_can_out[217].bit.bit0 = project.cds_tk[0].read.sbus.lock_status_error.bit.err_switch;
modbus_table_can_out[217].bit.bit1 = project.cds_tk[1].read.sbus.lock_status_error.bit.err_switch;
modbus_table_can_out[217].bit.bit2 = project.cds_tk[2].read.sbus.lock_status_error.bit.err_switch;
modbus_table_can_out[217].bit.bit3 = project.cds_tk[3].read.sbus.lock_status_error.bit.err_switch;
modbus_table_can_out[217].bit.bit4 = project.cds_in[0].read.sbus.lock_status_error.bit.err_switch;
modbus_table_can_out[217].bit.bit5 = project.cds_in[1].read.sbus.lock_status_error.bit.err_switch;
modbus_table_can_out[217].bit.bit6 = project.cds_out[0].read.sbus.lock_status_error.bit.err_switch;
modbus_table_can_out[217].bit.bit7 = project.adc[0].read.sbus.lock_status_error.bit.err_switch;
modbus_table_can_out[217].bit.bit8 = 0;
modbus_table_can_out[217].bit.bit9 = project.adc[1].read.sbus.lock_status_error.bit.err_switch;
modbus_table_can_out[218].bit.bit0 = edrk.warnings.e2.bits.T_UO1_MAX;
modbus_table_can_out[218].bit.bit1 = edrk.warnings.e2.bits.T_UO2_MAX;
modbus_table_can_out[218].bit.bit2 = edrk.warnings.e2.bits.T_UO3_MAX;
modbus_table_can_out[218].bit.bit3 = edrk.warnings.e2.bits.T_UO4_MAX;
modbus_table_can_out[218].bit.bit4 = edrk.warnings.e2.bits.T_UO5_MAX;
modbus_table_can_out[218].bit.bit5 = edrk.warnings.e2.bits.T_UO6_MAX;
modbus_table_can_out[218].bit.bit6 = edrk.warnings.e2.bits.T_UO7_MAX;
modbus_table_can_out[218].bit.bit7 = edrk.errors.e2.bits.T_UO1_MAX;
modbus_table_can_out[218].bit.bit8 = edrk.errors.e2.bits.T_UO2_MAX;
modbus_table_can_out[218].bit.bit9 = edrk.errors.e2.bits.T_UO3_MAX;
modbus_table_can_out[218].bit.bit10 = edrk.errors.e2.bits.T_UO4_MAX;
modbus_table_can_out[218].bit.bit11 = edrk.errors.e2.bits.T_UO5_MAX;
modbus_table_can_out[218].bit.bit12 = edrk.errors.e2.bits.T_UO6_MAX;
modbus_table_can_out[218].bit.bit13 = edrk.errors.e2.bits.T_UO7_MAX;
modbus_table_can_out[219].bit.bit0 = edrk.warnings.e7.bits.READ_OPTBUS | edrk.warnings.e7.bits.WRITE_OPTBUS;
modbus_table_can_out[219].bit.bit1 = edrk.warnings.e7.bits.MASTER_SLAVE_SYNC;
modbus_table_can_out[219].bit.bit2 = edrk.errors.e6.bits.ERROR_PRE_CHARGE_ANSWER;
modbus_table_can_out[219].bit.bit3 = edrk.warnings.e1.bits.NO_INPUT_SYNC_SIGNAL;
modbus_table_can_out[219].bit.bit4 = edrk.errors.e1.bits.NO_INPUT_SYNC_SIGNAL;
modbus_table_can_out[219].bit.bit5 = edrk.errors.e3.bits.ERR_INT_PWM_LONG
|| edrk.errors.e9.bits.ERR_PWM_WDOG
|| edrk.errors.e9.bits.ERR_INT_PWM_VERY_LONG;
modbus_table_can_out[219].bit.bit15 = edrk.errors.e5.bits.T_VIPR_MAX;
modbus_table_can_out[220].bit.bit0 = edrk.errors.e2.bits.T_AIR0_MAX;
modbus_table_can_out[220].bit.bit1 = edrk.errors.e2.bits.T_AIR1_MAX;
modbus_table_can_out[220].bit.bit2 = edrk.errors.e2.bits.T_AIR2_MAX;
modbus_table_can_out[220].bit.bit3 = edrk.errors.e2.bits.T_AIR3_MAX;
modbus_table_can_out[220].bit.bit4 = edrk.warnings.e10.bits.T_BSU_Sensor_BK1;
modbus_table_can_out[220].bit.bit5 = edrk.errors.e10.bits.T_BSU_Sensor_BK1;
modbus_table_can_out[220].bit.bit6 = edrk.warnings.e10.bits.T_BSU_Sensor_BK2;
modbus_table_can_out[220].bit.bit7 = edrk.errors.e10.bits.T_BSU_Sensor_BK2;
modbus_table_can_out[220].bit.bit8 = edrk.errors.e2.bits.T_WATER_EXT_MAX;
modbus_table_can_out[220].bit.bit9 = edrk.errors.e2.bits.T_WATER_INT_MAX;
modbus_table_can_out[220].bit.bit10 = edrk.warnings.e2.bits.T_WATER_EXT_MAX;
modbus_table_can_out[220].bit.bit11 = edrk.warnings.e2.bits.T_WATER_INT_MAX;
modbus_table_can_out[220].bit.bit12 = edrk.errors.e7.bits.T_ACDRIVE_BEAR_MAX_DNE;
modbus_table_can_out[220].bit.bit13 = edrk.errors.e9.bits.T_ACDRIVE_BEAR_MAX_NE;
modbus_table_can_out[220].bit.bit14 = edrk.warnings.e7.bits.T_ACDRIVE_BEAR_MAX_DNE;
modbus_table_can_out[220].bit.bit15 = edrk.warnings.e9.bits.T_ACDRIVE_BEAR_MAX_NE;
modbus_table_can_out[221].bit.bit0 = edrk.errors.e10.bits.T_ACDRIVE_WINDING_U1;
modbus_table_can_out[221].bit.bit1 = edrk.errors.e10.bits.T_ACDRIVE_WINDING_V1;
modbus_table_can_out[221].bit.bit2 = edrk.errors.e10.bits.T_ACDRIVE_WINDING_W1;
modbus_table_can_out[221].bit.bit3 = edrk.errors.e10.bits.T_ACDRIVE_WINDING_U2;
modbus_table_can_out[221].bit.bit4 = edrk.errors.e10.bits.T_ACDRIVE_WINDING_V2;
modbus_table_can_out[221].bit.bit5 = edrk.errors.e10.bits.T_ACDRIVE_WINDING_W2;
modbus_table_can_out[221].bit.bit6 = edrk.warnings.e10.bits.T_ACDRIVE_WINDING_U1;
modbus_table_can_out[221].bit.bit7 = edrk.warnings.e10.bits.T_ACDRIVE_WINDING_V1;
modbus_table_can_out[221].bit.bit8 = edrk.warnings.e10.bits.T_ACDRIVE_WINDING_W1;
modbus_table_can_out[221].bit.bit9 = edrk.warnings.e10.bits.T_ACDRIVE_WINDING_U2;
modbus_table_can_out[221].bit.bit10 = edrk.warnings.e10.bits.T_ACDRIVE_WINDING_V2;
modbus_table_can_out[221].bit.bit11 = edrk.warnings.e10.bits.T_ACDRIVE_WINDING_W2;
modbus_table_can_out[222].bit.bit0 = edrk.errors.e2.bits.P_WATER_INT_MAX;
modbus_table_can_out[222].bit.bit1 = edrk.errors.e2.bits.P_WATER_INT_MIN;
modbus_table_can_out[222].bit.bit2 = edrk.warnings.e2.bits.P_WATER_INT_MAX;
modbus_table_can_out[222].bit.bit3 = edrk.warnings.e2.bits.P_WATER_INT_MIN;
modbus_table_can_out[223].all = edrk.errors.e11.all;
}
void update_protect_levels_to_MPU() {
modbus_table_can_out[139].all = protect_levels.abnormal_temper_acdrive_winding_U1 / 10;
modbus_table_can_out[140].all = protect_levels.abnormal_temper_acdrive_winding_V1 / 10;
modbus_table_can_out[141].all = protect_levels.abnormal_temper_acdrive_winding_W1 / 10;
modbus_table_can_out[142].all = protect_levels.abnormal_temper_acdrive_winding_U2 / 10;
modbus_table_can_out[143].all = protect_levels.abnormal_temper_acdrive_winding_V2 / 10;
modbus_table_can_out[144].all = protect_levels.abnormal_temper_acdrive_winding_W2 / 10;
modbus_table_can_out[145].all = protect_levels.abnormal_temper_acdrive_bear_DNE / 10;
modbus_table_can_out[146].all = protect_levels.abnormal_temper_acdrive_bear_NE / 10;
modbus_table_can_out[147].all = protect_levels.alarm_temper_acdrive_winding_U1 / 10;
modbus_table_can_out[148].all = protect_levels.alarm_temper_acdrive_winding_V1 / 10;
modbus_table_can_out[149].all = protect_levels.alarm_temper_acdrive_winding_W1 / 10;
modbus_table_can_out[150].all = protect_levels.alarm_temper_acdrive_winding_U2 / 10;
modbus_table_can_out[151].all = protect_levels.alarm_temper_acdrive_winding_V2 / 10;
modbus_table_can_out[152].all = protect_levels.alarm_temper_acdrive_winding_W2 / 10;
modbus_table_can_out[153].all = protect_levels.alarm_temper_acdrive_bear_DNE / 10;
modbus_table_can_out[154].all = protect_levels.alarm_temper_acdrive_bear_NE / 10;
modbus_table_can_out[155].all = protect_levels.abnormal_temper_u_01 / 10;
modbus_table_can_out[156].all = protect_levels.abnormal_temper_u_02 / 10;
modbus_table_can_out[157].all = protect_levels.abnormal_temper_u_03 / 10;
modbus_table_can_out[158].all = protect_levels.abnormal_temper_u_04 / 10;
modbus_table_can_out[159].all = protect_levels.abnormal_temper_u_05 / 10;
modbus_table_can_out[160].all = protect_levels.abnormal_temper_u_06 / 10;
modbus_table_can_out[161].all = protect_levels.abnormal_temper_u_07 / 10;
modbus_table_can_out[162].all = protect_levels.alarm_temper_u_01 / 10;
modbus_table_can_out[163].all = protect_levels.alarm_temper_u_02 / 10;
modbus_table_can_out[164].all = protect_levels.alarm_temper_u_03 / 10;
modbus_table_can_out[165].all = protect_levels.alarm_temper_u_04 / 10;
modbus_table_can_out[166].all = protect_levels.alarm_temper_u_05 / 10;
modbus_table_can_out[167].all = protect_levels.alarm_temper_u_06 / 10;
modbus_table_can_out[168].all = protect_levels.alarm_temper_u_07 / 10;
modbus_table_can_out[169].all = protect_levels.abnormal_temper_water_ext / 10;
modbus_table_can_out[170].all = protect_levels.abnormal_temper_water_int / 10;
modbus_table_can_out[171].all = protect_levels.alarm_p_water_min_int / 100;
modbus_table_can_out[172].all = protect_levels.alarm_temper_water_int / 10;
modbus_table_can_out[173].all = protect_levels.alarm_temper_water_ext / 10;
modbus_table_can_out[174].all = protect_levels.alarm_p_water_max_int / 100;
modbus_table_can_out[175].all = protect_levels.abnormal_temper_air_int_01 / 10;
modbus_table_can_out[176].all = protect_levels.abnormal_temper_air_int_02 / 10;
modbus_table_can_out[177].all = protect_levels.abnormal_temper_air_int_03 / 10;
modbus_table_can_out[178].all = protect_levels.abnormal_temper_air_int_04 / 10;
modbus_table_can_out[179].all = protect_levels.alarm_temper_air_int_01 / 10;
modbus_table_can_out[180].all = protect_levels.alarm_temper_air_int_02 / 10;
modbus_table_can_out[181].all = protect_levels.alarm_temper_air_int_03 / 10;
modbus_table_can_out[182].all = protect_levels.alarm_temper_air_int_04 / 10;
modbus_table_can_out[183].all = _IQtoF(analog_protect.in_voltage[0].setup.levels.iqNominal_minus20) * NORMA_ACP;//_IQtoF(edrk.iqMIN_U_IN) * NORMA_ACP;
modbus_table_can_out[184].all = _IQtoF(analog_protect.in_voltage[1].setup.levels.iqNominal_minus20) * NORMA_ACP;
modbus_table_can_out[185].all = _IQtoF(analog_protect.in_voltage[0].setup.levels.iqNominal_plus20) * NORMA_ACP;//_IQtoF(edrk.iqMIN_U_ZPT) * NORMA_ACP;
modbus_table_can_out[186].all = _IQtoF(analog_protect.in_voltage[1].setup.levels.iqNominal_plus20) * NORMA_ACP;
modbus_table_can_out[187].all = //_IQtoF(edrk.iqMAX_U_IN) * NORMA_ACP;
modbus_table_can_out[188].all = _IQtoF(edrk.iqMAX_U_IN) * NORMA_ACP;
modbus_table_can_out[189].all = //_IQtoF(edrk.iqMAX_U_ZPT) * NORMA_ACP;
modbus_table_can_out[190].all = _IQtoF(edrk.iqMAX_U_ZPT) * NORMA_ACP;
modbus_table_can_out[191].all = protect_levels.alarm_Izpt_max;
modbus_table_can_out[192].all = protect_levels.alarm_Imax_U01;
modbus_table_can_out[193].all = protect_levels.alarm_Imax_U02;
modbus_table_can_out[194].all = protect_levels.alarm_Imax_U03;
modbus_table_can_out[195].all = protect_levels.alarm_Imax_U04;
modbus_table_can_out[196].all = protect_levels.alarm_Imax_U05;
modbus_table_can_out[197].all = protect_levels.alarm_Imax_U06;
modbus_table_can_out[198].all = protect_levels.alarm_Imax_U07;
modbus_table_can_out[199].all = protect_levels.alarm_Iged_max;
}

17
Inu/Src/main/modbus_svu_update.h Normal file
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/*
* modbus_update_table.h
*
* Created on: 4 äåê. 2020 ã.
* Author: star
*/
#ifndef SRC_MAIN_MODBUS_SVU_UPDATE_H_
#define SRC_MAIN_MODBUS_SVU_UPDATE_H_
void update_svu_modbus_table(void);
void unpack_answer_from_MPU_SVU_CAN(unsigned int cc);
void unpack_answer_from_MPU_SVU_RS(unsigned int cc);
#endif /* SRC_MAIN_MODBUS_SVU_UPDATE_H_ */

249
Inu/Src/main/not_use/log_to_mem.c Normal file
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/****************************************************************/
/* TMS320C32 */
/* ====== BIOS, ÊËÀÈÍ, ÊËÂÑÏ ====== */
/* ÖÍÈÈ ÑÝÒ (ñ) 1998-2001ã. */
/****************************************************************/
/* log_to_mem.c
****************************************************************
* Çàïèñü ëîãîâ â ïàìyòü *
****************************************************************/
#include <log_to_mem.h>
#include "MemoryFunctions.h"
// ïåðåìåííûå èñïîëüçóåìûå òîëüêî â ýòîì ìîäóëå
// Ïåðåìåííûå èç ï/ï logs_data(), write_to_mem è clear_mem
// Íà÷àëüíûé àäðåñ ïàìyòè äëy çàïèñè ëîãîâ (ñì. ï/ï write_to_mem)
//#pragma DATA_SECTION(count_mem,".fast_vars");
//static long count_mem = START_ADDRESS_LOG;
#pragma DATA_SECTION(count_mem_slow,".fast_vars");
static long count_mem_slow = START_ADDRESS_LOG_SLOW;
// Îáyçàòåëüíîå íà÷àëüíîå çíà÷åíèå èíà÷å ïîðyäîê çàïèñè
// íàðóøàåòñy ïðè ïåðâîì çààïîëíåíèè áóôåðà
int hb_logs_data = 0;
#pragma DATA_SECTION(stop_log,".fast_vars");
int stop_log = 0;
int stop_log_slow = 0;
#pragma DATA_SECTION(logpar,".fast_vars");
LOGSPARAMS logpar = LOGSPARAMS_DEFAULTS;
#pragma DATA_SECTION(no_write,".fast_vars");
int no_write = 0; // Ôëàã, ÷òîáû íå ïèñàòü (åñëè ÷òî)
#pragma DATA_SECTION(no_write_slow,".fast_vars");
int no_write_slow = 0; // Ôëàã, ÷òîáû íå ïèñàòü (åñëè ÷òî)
#pragma CODE_SECTION(clear_logpar,".fast_run");
void clear_logpar()
{
int i;
for(i=0;i<SIZE_LOGS_ARRAY;i++)
logpar.logs[i] = 0;
}
// Çàïèñü äâóõ ìëàäøèõ áàéòîâ àðãóìåíòà â ïàìyòü, ãäå ëîãè ëåæàò
#pragma CODE_SECTION(write_to_mem,".fast_run");
void write_to_mem(int tlog,int DataM)
{
// int DataT;
if (tlog==FAST_LOG)
{
if (no_write) return;
if (logpar.stop_log_level_1) return;
if (logpar.addres_mem >= END_ADDRESS_LOG) logpar.addres_mem = END_ADDRESS_LOG;
i_WriteMemory(logpar.addres_mem,DataM);
// *(int *)logpar.count_mem = ((DataM & 0xFFFF) );
logpar.addres_mem++;
}
if (tlog==SLOW_LOG)
{
if (no_write_slow) return;
if (logpar.stop_log_slow_level_1) return;
if (count_mem_slow >= END_ADDRESS_LOG_SLOW) count_mem_slow = END_ADDRESS_LOG_SLOW;
i_WriteMemory(count_mem_slow,DataM);
// *(int *)logpar.count_mem = ((DataM & 0xFFFF) );
count_mem_slow++;
}
}
#pragma CODE_SECTION(test_mem_limit,".fast_run");
void test_mem_limit(int tlog,int ciclelog)
{
if (tlog==FAST_LOG)
{
if( logpar.addres_mem >= (END_ADDRESS_LOG - LENGTH_HAZARD))
{
logpar.real_finish_addres_mem = logpar.addres_mem;
if (ciclelog==1)
{
stop_log = 0;
logpar.stop_log_level_1=0;
logpar.addres_mem = START_ADDRESS_LOG;
}
else
{
stop_log = 1;
logpar.stop_log_level_1=1;
}
}
if( logpar.addres_mem >= (END_ADDRESS_LOG_LEVEL_2))
{
logpar.stop_log_level_2=1;
}
else
{
logpar.stop_log_level_2=0;
}
if( logpar.addres_mem >= (END_ADDRESS_LOG_LEVEL_3))
{
logpar.stop_log_level_3=1;
}
else
{
logpar.stop_log_level_3=0;
}
}
else
{
if (tlog==SLOW_LOG)
{
if (ciclelog==1)
{
logpar.stop_log_slow_level_1=0;
}
if( count_mem_slow >= (END_ADDRESS_LOG_SLOW - LENGTH_HAZARD))
{
if (ciclelog==1)
{
stop_log_slow = 0;
logpar.stop_log_slow_level_1=0;
count_mem_slow = START_ADDRESS_LOG_SLOW;
}
else
{
stop_log_slow = 1;
logpar.stop_log_slow_level_1=1;
}
}
if( count_mem_slow >= (END_ADDRESS_LOG_SLOW_LEVEL_2))
{
logpar.stop_log_slow_level_2=1;
}
else
{
logpar.stop_log_slow_level_2=0;
}
if( count_mem_slow >= (END_ADDRESS_LOG_SLOW_LEVEL_3))
{
logpar.stop_log_slow_level_3=1;
}
else
{
logpar.stop_log_slow_level_3=0;
}
}
}
}
// Î÷èùåíèå ïàìyòè, ãäå ëîãè ëåæàò
void clear_mem(int tlog)
{
if (tlog==FAST_LOG)
{
logpar.real_finish_addres_mem = 0;
for (logpar.addres_mem=START_ADDRESS_LOG; logpar.addres_mem<END_ADDRESS_LOG; logpar.addres_mem++)//END_ADDRESS_LOG; logpar.count_mem++)
i_WriteMemory(logpar.addres_mem,0x0);
logpar.addres_mem = START_ADDRESS_LOG;
hb_logs_data = 0;
stop_log = 0;
logpar.stop_log_level_1=0;
logpar.stop_log_level_2=0;
logpar.stop_log_level_3=0;
logpar.start_write_fast_log = 1;
}
if (tlog==SLOW_LOG)
{
for (count_mem_slow=START_ADDRESS_LOG_SLOW; count_mem_slow<END_ADDRESS_LOG_SLOW; count_mem_slow++)
i_WriteMemory(count_mem_slow,0x0);
count_mem_slow = START_ADDRESS_LOG_SLOW;
hb_logs_data = 0;
stop_log_slow = 0;
logpar.stop_log_slow_level_1=0;
logpar.stop_log_slow_level_2=0;
logpar.stop_log_slow_level_3=0;
}
}
// Âûñòàâëåíèå ïîçèöèè ëîãîâ â íà÷àëî
void set_start_mem(int tlog)
{
if (tlog==FAST_LOG)
{
logpar.real_finish_addres_mem = 0;
logpar.addres_mem = START_ADDRESS_LOG;
hb_logs_data = 0;
stop_log = 0;
logpar.stop_log_level_1=0;
logpar.stop_log_level_2=0;
logpar.stop_log_level_3=0;
}
if (tlog==SLOW_LOG)
{
count_mem_slow = START_ADDRESS_LOG_SLOW;
hb_logs_data = 0;
stop_log_slow = 0;
logpar.stop_log_slow_level_1=0;
logpar.stop_log_slow_level_2=0;
logpar.stop_log_slow_level_3=0;
}
}
void get_log_params_count(void) {
logpar.count_log_params_fast_log = logpar.addres_mem - START_ADDRESS_LOG;
}

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