проект запущен шим идет, нужно запустить с пид регулятором вывести все измерения в структуру

B-G474E-DPOW1_Keil/CODE_COMMENTS.md

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+# B-G474E-DPOW1 DCDC Code Map
+
+## Runtime knobs
+
+The live configuration object is:
+
+```c
+g_dcdc_config
+```
+
+Edit it in Keil **Watch** while the target is running.
+
+Useful fields:
+
+```c
+g_dcdc_config.mode
+g_dcdc_config.pwm.frequency_hz
+g_dcdc_config.pwm.test_duty_permille
+g_dcdc_config.pwm.deadtime_enable
+g_dcdc_config.pwm.deadtime_rising_ticks
+g_dcdc_config.pwm.deadtime_falling_ticks
+g_dcdc_config.limits.target_vout_mv
+g_dcdc_config.limits.current_limit_ma
+```
+
+Modes:
+
+```c
+0 = DCDC_MODE_MONITOR
+1 = DCDC_MODE_PWM_TEST
+2 = DCDC_MODE_CLOSED_LOOP
+```
+
+## Startup path
+
+`main.c`:
+
+1. `Board_Init()` starts clocks, SysTick, GPIO basics.
+2. `Retarget_Init()` enables `printf()` through `USART3`.
+3. `DCDC_Init()` prepares ADC and HRTIM Timer C.
+4. `DCDC_Service1ms()` runs every 1 ms and applies live runtime edits.
+
+## HRTIM PWM path
+
+`dcdc.c`:
+
+- `hrtim1_timer_c_init()` configures HRTIM1 Timer C.
+- `DCDC_StartPwmTest()` starts open-loop analyzer PWM.
+- `hrtim1_apply_pwm_config()` applies live frequency and dead-time edits.
+- `hrtim1_set_duty()` updates `CMP1`, which sets the PB12/PB13 split point.
+
+Current complementary test routing:
+
+```c
+PB12 / CHC1: set at period, reset at CMP1
+PB13 / CHC2: set at CMP1, reset at period
+```
+
+Dead-time is enabled by:
+
+```c
+timer->OUTxR |= HRTIM_OUTR_DTEN;
+```
+
+## ADC path
+
+`DCDC_ReadMeasurements()` reads:
+
+```c
+PA1 / ADC1_IN2 = VIN
+PA2 / ADC1_IN3 = input current average
+PA3 / ADC1_IN4 = VOUT
+```
+
+Raw ADC values are converted through:
+
+```c
+adc_raw_to_mv()
+sense_mv_to_voltage_mv()
+sense_mv_to_current_ma()
+```
+
+## Safety path
+
+The closed-loop mode checks:
+
+```c
+g_dcdc_config.limits.min_vin_mv
+g_dcdc_config.limits.max_vout_mv
+g_dcdc_config.limits.hard_current_ma
+```
+
+If a limit trips, `latch_fault()` disables HRTIM outputs, clears duty, opens
+the USB-PD/VIN switch, and moves the state to `DCDC_STATE_FAULT`.
+
+## Current safe workflow
+
+1. Keep `g_dcdc_config.mode = 1`.
+2. Tune `g_dcdc_config.pwm.deadtime_*_ticks`.
+3. Verify PB12/PB13 on the logic analyzer.
+4. Only after clean waveforms, move toward closed-loop testing.