335 lines
10 KiB
ArmAsm
335 lines
10 KiB
ArmAsm
/*****************************************************************************
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* @file: startup_K1921VK035.S
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* @author NIIET
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* @version: V1.7
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* @date: 02.05.2018
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* @brief: K1921VK035 startup file for GCC
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*****************************************************************************
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* <br><br>
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*
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* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
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* TIME. AS A RESULT, NIIET NOT BE HELD LIABLE FOR ANY DIRECT,
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* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
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* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
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* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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*
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* <h2><center>© COPYRIGHT 2018 NIIET </center></h2>
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*****************************************************************************
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* FILE startup_K1921VK035.S
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*/
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.syntax unified
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.arch armv7e-m
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.section .stack
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.align 3
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#ifdef __STACK_SIZE
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.equ Stack_Size, __STACK_SIZE
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#else
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.equ Stack_Size, 0xc00
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#endif
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.globl __StackTop
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.globl __StackLimit
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__StackLimit:
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.space Stack_Size
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.size __StackLimit, . - __StackLimit
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__StackTop:
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.size __StackTop, . - __StackTop
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.section .heap
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.align 3
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#ifdef __HEAP_SIZE
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.equ Heap_Size, __HEAP_SIZE
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#else
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.equ Heap_Size, 0
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#endif
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.globl __HeapBase
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.globl __HeapLimit
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__HeapBase:
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.if Heap_Size
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.space Heap_Size
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.endif
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.size __HeapBase, . - __HeapBase
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__HeapLimit:
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.size __HeapLimit, . - __HeapLimit
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.section .isr_vector
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.align 2
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.globl __isr_vector
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__isr_vector:
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.long __StackTop /* Top of Stack */
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.long Reset_Handler /* Reset Handler */
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.long NMI_Handler /* NMI Handler */
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.long HardFault_Handler /* Hard Fault Handler */
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.long MemManage_Handler /* MPU Fault Handler */
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.long BusFault_Handler /* Bus Fault Handler */
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.long UsageFault_Handler /* Usage Fault Handler */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.long 0 /* Reserved */
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.long SVC_Handler /* SVCall Handler */
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.long DebugMon_Handler /* Debug Monitor Handler */
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.long 0 /* Reserved */
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.long PendSV_Handler /* PendSV Handler */
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.long SysTick_Handler /* SysTick Handler */
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/* External interrupts */
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.long WDT_IRQHandler
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.long RCU_IRQHandler
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.long MFLASH_IRQHandler
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.long GPIOA_IRQHandler
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.long GPIOB_IRQHandler
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.long DMA_CH0_IRQHandler
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.long DMA_CH1_IRQHandler
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.long DMA_CH2_IRQHandler
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.long DMA_CH3_IRQHandler
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.long DMA_CH4_IRQHandler
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.long DMA_CH5_IRQHandler
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.long DMA_CH6_IRQHandler
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.long DMA_CH7_IRQHandler
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.long DMA_CH8_IRQHandler
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.long DMA_CH9_IRQHandler
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.long DMA_CH10_IRQHandler
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.long DMA_CH11_IRQHandler
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.long DMA_CH12_IRQHandler
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.long DMA_CH13_IRQHandler
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.long DMA_CH14_IRQHandler
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.long DMA_CH15_IRQHandler
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.long TMR0_IRQHandler
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.long TMR1_IRQHandler
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.long TMR2_IRQHandler
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.long TMR3_IRQHandler
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.long UART0_TD_IRQHandler
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.long UART0_RX_IRQHandler
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.long UART0_TX_IRQHandler
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.long UART0_E_RT_IRQHandler
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.long UART1_TD_IRQHandler
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.long UART1_RX_IRQHandler
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.long UART1_TX_IRQHandler
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.long UART1_E_RT_IRQHandler
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.long SPI_RO_RT_IRQHandler
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.long SPI_RX_IRQHandler
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.long SPI_TX_IRQHandler
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.long I2C_IRQHandler
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.long ECAP0_IRQHandler
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.long ECAP1_IRQHandler
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.long ECAP2_IRQHandler
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.long PWM0_IRQHandler
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.long PWM0_HD_IRQHandler
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.long PWM0_TZ_IRQHandler
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.long PWM1_IRQHandler
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.long PWM1_HD_IRQHandler
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.long PWM1_TZ_IRQHandler
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.long PWM2_IRQHandler
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.long PWM2_HD_IRQHandler
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.long PWM2_TZ_IRQHandler
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.long QEP_IRQHandler
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.long ADC_SEQ0_IRQHandler
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.long ADC_SEQ1_IRQHandler
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.long ADC_DC_IRQHandler
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.long CAN0_IRQHandler
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.long CAN1_IRQHandler
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.long CAN2_IRQHandler
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.long CAN3_IRQHandler
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.long CAN4_IRQHandler
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.long CAN5_IRQHandler
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.long CAN6_IRQHandler
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.long CAN7_IRQHandler
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.long CAN8_IRQHandler
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.long CAN9_IRQHandler
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.long CAN10_IRQHandler
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.long CAN11_IRQHandler
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.long CAN12_IRQHandler
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.long CAN13_IRQHandler
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.long CAN14_IRQHandler
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.long CAN15_IRQHandler
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.long FPU_IRQHandler
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.size __isr_vector, . - __isr_vector
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.text
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.thumb
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.thumb_func
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.align 2
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.globl Reset_Handler
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.type Reset_Handler, %function
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Reset_Handler:
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/* Firstly it copies data from read only memory to RAM.
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* Multiple sections scheme:
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*
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* Between symbol address __copy_table_start__ and __copy_table_end__,
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* there are array of triplets, each of which specify:
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* offset 0: LMA of start of a section to copy from
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* offset 4: VMA of start of a section to copy to
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* offset 8: size of the section to copy. Must be multiply of 4
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*
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* All addresses must be aligned to 4 bytes boundary.
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*/
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ldr r4, =__copy_table_start__
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ldr r5, =__copy_table_end__
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.L_loop0:
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cmp r4, r5
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bge .L_loop0_done
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ldr r1, [r4]
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ldr r2, [r4, #4]
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ldr r3, [r4, #8]
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.L_loop0_0:
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subs r3, #4
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ittt ge
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ldrge r0, [r1, r3]
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strge r0, [r2, r3]
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bge .L_loop0_0
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adds r4, #12
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b .L_loop0
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.L_loop0_done:
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/* This part of work usually is done in C library startup code. Otherwise,
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* define this macro to enable it in this startup.
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*
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* Multiple sections scheme.
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*
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* Between symbol address __copy_table_start__ and __copy_table_end__,
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* there are array of tuples specifying:
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* offset 0: Start of a BSS section
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* offset 4: Size of this BSS section. Must be multiply of 4
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*/
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ldr r3, =__zero_table_start__
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ldr r4, =__zero_table_end__
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.L_loop2:
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cmp r3, r4
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bge .L_loop2_done
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ldr r1, [r3]
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ldr r2, [r3, #4]
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movs r0, 0
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.L_loop2_0:
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subs r2, #4
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itt ge
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strge r0, [r1, r2]
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bge .L_loop2_0
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adds r3, #8
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b .L_loop2
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.L_loop2_done:
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#define __NO_SYSTEM_INIT
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#ifndef __NO_SYSTEM_INIT
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bl SystemInit
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#endif
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#ifndef __START
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#define __START main
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#endif
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bl __START
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.pool
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.size Reset_Handler, . - Reset_Handler
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.align 1
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.thumb_func
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.weak Default_Handler
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.type Default_Handler, %function
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Default_Handler:
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b .
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.size Default_Handler, . - Default_Handler
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/* Macro to define default handlers. Default handler
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* will be weak symbol and just dead loops. They can be
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* overwritten by other handlers */
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.macro def_irq_handler handler_name
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.weak \handler_name
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.set \handler_name, Default_Handler
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.endm
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def_irq_handler NMI_Handler
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def_irq_handler HardFault_Handler
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def_irq_handler MemManage_Handler
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def_irq_handler BusFault_Handler
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def_irq_handler UsageFault_Handler
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def_irq_handler SVC_Handler
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def_irq_handler DebugMon_Handler
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def_irq_handler PendSV_Handler
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def_irq_handler SysTick_Handler
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/* External Interrupt Handlers */
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def_irq_handler WDT_IRQHandler
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def_irq_handler RCU_IRQHandler
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def_irq_handler MFLASH_IRQHandler
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def_irq_handler GPIOA_IRQHandler
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def_irq_handler GPIOB_IRQHandler
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def_irq_handler DMA_CH0_IRQHandler
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def_irq_handler DMA_CH1_IRQHandler
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def_irq_handler DMA_CH2_IRQHandler
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def_irq_handler DMA_CH3_IRQHandler
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def_irq_handler DMA_CH4_IRQHandler
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def_irq_handler DMA_CH5_IRQHandler
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def_irq_handler DMA_CH6_IRQHandler
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def_irq_handler DMA_CH7_IRQHandler
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def_irq_handler DMA_CH8_IRQHandler
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def_irq_handler DMA_CH9_IRQHandler
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def_irq_handler DMA_CH10_IRQHandler
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def_irq_handler DMA_CH11_IRQHandler
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def_irq_handler DMA_CH12_IRQHandler
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def_irq_handler DMA_CH13_IRQHandler
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def_irq_handler DMA_CH14_IRQHandler
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def_irq_handler DMA_CH15_IRQHandler
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def_irq_handler TMR0_IRQHandler
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def_irq_handler TMR1_IRQHandler
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def_irq_handler TMR2_IRQHandler
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def_irq_handler TMR3_IRQHandler
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def_irq_handler UART0_TD_IRQHandler
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def_irq_handler UART0_RX_IRQHandler
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def_irq_handler UART0_TX_IRQHandler
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def_irq_handler UART0_E_RT_IRQHandler
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def_irq_handler UART1_TD_IRQHandler
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def_irq_handler UART1_RX_IRQHandler
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def_irq_handler UART1_TX_IRQHandler
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def_irq_handler UART1_E_RT_IRQHandler
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def_irq_handler SPI_RO_RT_IRQHandler
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def_irq_handler SPI_RX_IRQHandler
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def_irq_handler SPI_TX_IRQHandler
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def_irq_handler I2C_IRQHandler
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def_irq_handler ECAP0_IRQHandler
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def_irq_handler ECAP1_IRQHandler
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def_irq_handler ECAP2_IRQHandler
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def_irq_handler PWM0_IRQHandler
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def_irq_handler PWM0_HD_IRQHandler
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def_irq_handler PWM0_TZ_IRQHandler
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def_irq_handler PWM1_IRQHandler
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def_irq_handler PWM1_HD_IRQHandler
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def_irq_handler PWM1_TZ_IRQHandler
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def_irq_handler PWM2_IRQHandler
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def_irq_handler PWM2_HD_IRQHandler
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def_irq_handler PWM2_TZ_IRQHandler
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def_irq_handler QEP_IRQHandler
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def_irq_handler ADC_SEQ0_IRQHandler
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def_irq_handler ADC_SEQ1_IRQHandler
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def_irq_handler ADC_DC_IRQHandler
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def_irq_handler CAN0_IRQHandler
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def_irq_handler CAN1_IRQHandler
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def_irq_handler CAN2_IRQHandler
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def_irq_handler CAN3_IRQHandler
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def_irq_handler CAN4_IRQHandler
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def_irq_handler CAN5_IRQHandler
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def_irq_handler CAN6_IRQHandler
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def_irq_handler CAN7_IRQHandler
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def_irq_handler CAN8_IRQHandler
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def_irq_handler CAN9_IRQHandler
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def_irq_handler CAN10_IRQHandler
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def_irq_handler CAN11_IRQHandler
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def_irq_handler CAN12_IRQHandler
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def_irq_handler CAN13_IRQHandler
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def_irq_handler CAN14_IRQHandler
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def_irq_handler CAN15_IRQHandler
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def_irq_handler FPU_IRQHandler
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.end
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