Прога ужата до 20 кб флеш: удален HAL_TIM и HAL_GPIO

удалена ненужна по сути MyLibs библиотека
This commit is contained in:
2025-03-06 12:44:55 +03:00
parent fad121a9fd
commit dbc9388f67
20 changed files with 484 additions and 1166 deletions

View File

@@ -73,35 +73,72 @@ int main(void)
*/
static void APP_SystemClockConfig(void)
{
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
// RCC_OscInitTypeDef RCC_OscInitStruct = {0};
// RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
/* Oscillator configuration */
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_LSE; /* Select oscillator HSE, HSI, LSI, LSE */
RCC_OscInitStruct.HSIState = RCC_HSI_ON; /* Enable HSI */
RCC_OscInitStruct.HSIDiv = RCC_HSI_DIV1; /* HSI 1 frequency division */
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_24MHz; /* Configure HSI clock 24MHz */
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS_DISABLE; /* Close HSE bypass */
RCC_OscInitStruct.LSIState = RCC_LSI_OFF; /* Close LSI */
/*RCC_OscInitStruct.LSICalibrationValue = RCC_LSICALIBRATION_32768Hz;*/
RCC_OscInitStruct.LSEState = RCC_LSE_OFF; /* Close LSE */
/*RCC_OscInitStruct.LSEDriver = RCC_LSEDRIVE_MEDIUM;*/
/* Configure oscillator */
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
{
Error_Handler();
}
// /* Oscillator configuration */
// RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_LSE; /* Select oscillator HSE, HSI, LSI, LSE */
// RCC_OscInitStruct.HSIState = RCC_HSI_ON; /* Enable HSI */
// RCC_OscInitStruct.HSIDiv = RCC_HSI_DIV1; /* HSI 1 frequency division */
// RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_24MHz; /* Configure HSI clock 24MHz */
// RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS_DISABLE; /* Close HSE bypass */
// RCC_OscInitStruct.LSIState = RCC_LSI_OFF; /* Close LSI */
// /*RCC_OscInitStruct.LSICalibrationValue = RCC_LSICALIBRATION_32768Hz;*/
// RCC_OscInitStruct.LSEState = RCC_LSE_OFF; /* Close LSE */
// /*RCC_OscInitStruct.LSEDriver = RCC_LSEDRIVE_MEDIUM;*/
// /* Configure oscillator */
// if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
// {
// Error_Handler();
// }
/* Clock source configuration */
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1; /* Choose to configure clock HCLK, SYSCLK, PCLK1 */
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSISYS; /* Select HSISYS as the system clock */
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; /* AHB clock 1 division */
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; /* APB clock 1 division */
/* Configure clock source */
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
{
Error_Handler();
}
// /* Clock source configuration */
// RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1; /* Choose to configure clock HCLK, SYSCLK, PCLK1 */
// RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSISYS; /* Select HSISYS as the system clock */
// RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; /* AHB clock 1 division */
// RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; /* APB clock 1 division */
// /* Configure clock source */
// if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
// {
// Error_Handler();
// }
/* Âêëþ÷åíèå HSI */
RCC->CR |= RCC_CR_HSION;
while (!(RCC->CR & RCC_CR_HSIRDY));
/* Íàñòðîéêà äåëèòåëÿ HSI */
RCC->CR &= ~RCC_CR_HSIDIV;
RCC->CR |= RCC_HSI_DIV1;
/* Êàëèáðîâêà HSI */
RCC->ICSCR &= ~RCC_ICSCR_HSI_TRIM;
RCC->ICSCR |= (RCC_HSICALIBRATION_24MHz << RCC_ICSCR_HSI_TRIM_Pos);
/* Îòêëþ÷åíèå LSI è LSE */
RCC->CSR &= ~RCC_CSR_LSION;
RCC->BDCR &= ~RCC_BDCR_LSEON;
/* Îòêëþ÷åíèå áàéïàñà HSE */
RCC->CR &= ~RCC_HSE_BYPASS_DISABLE;
/* Óñòàíîâêà èñòî÷íèêà ñèñòåìíîé òàêòîâîé ÷àñòîòû */
RCC->CFGR &= ~RCC_CFGR_SW;
RCC->CFGR |= RCC_SYSCLKSOURCE_HSISYS;
while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_SYSCLKSOURCE_HSISYS);
/* Óñòàíîâêà äåëèòåëåé */
RCC->CFGR &= ~(RCC_CFGR_HPRE | RCC_CFGR_PPRE_1);
RCC->CFGR |= RCC_SYSCLK_DIV1 | RCC_HCLK_DIV1;
/* Íàñòðîéêà çàäåðæêè ôëåø-ïàìÿòè */
FLASH->ACR &= ~FLASH_ACR_LATENCY;
FLASH->ACR |= FLASH_LATENCY_0;
}
uint32_t HAL_RCC_GetPCLK1Freq(void)
{
/* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
return (uint32_t)((SystemCoreClock) >> (APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE) >> RCC_CFGR_PPRE_Pos] & 0x1FU));
}
/**