Добавлен таргет проект для PY32F002A

py_project/Core/Src/main.c

@@ -43,7 +43,7 @@ int main(void)
 {
   __HAL_DBGMCU_FREEZE_IWDG();
   __HAL_DBGMCU_FREEZE_TIM1();
-  __HAL_DBGMCU_FREEZE_TIM14();
+  __HAL_DBGMCU_FREEZE_TIM_MB();
   /* Reset of all peripherals, Initializes the Systick. */
   HAL_Init();
   
@@ -53,7 +53,7 @@ int main(void)
 //  MX_IWDG_Init();
   MX_GPIO_Init();
   MX_TIM1_Init();
-  MX_TIM14_Init();
+  MX_TIMMB_Init();
   MX_USART1_UART_Init();
   
   
@@ -115,16 +115,23 @@ static void APP_SystemClockConfig(void)
     RCC->ICSCR |= (RCC_HSICALIBRATION_24MHz << RCC_ICSCR_HSI_TRIM_Pos);
     
     /* Îòêëþ÷åíèå LSI è LSE */
+    #ifdef RCC_LSE_SUPPORT
     RCC->CSR &= ~RCC_CSR_LSION;
     RCC->BDCR &= ~RCC_BDCR_LSEON;
-    
+    #endif
     /* Îòêëþ÷åíèå áàéïàñà HSE */
-    RCC->CR &= ~RCC_HSE_BYPASS_DISABLE;
+    RCC->CR &= ~0x00000000U;
     
     /* Óñòàíîâêà èñòî÷íèêà ñèñòåìíîé òàêòîâîé ÷àñòîòû */
     RCC->CFGR &= ~RCC_CFGR_SW;
+#ifdef PY32F002Bx5
     RCC->CFGR |= RCC_SYSCLKSOURCE_HSISYS;
     while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_SYSCLKSOURCE_HSISYS);
+#endif
+#ifdef PY32F002Ax5
+    RCC->CFGR |= RCC_SYSCLKSOURCE_HSI;
+    while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_SYSCLKSOURCE_HSI);
+#endif
     
     /* Óñòàíîâêà äåëèòåëåé */
     RCC->CFGR &= ~(RCC_CFGR_HPRE | RCC_CFGR_PPRE_1);