Начало
This commit is contained in:
55
Core/Inc/can.h
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55
Core/Inc/can.h
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@@ -0,0 +1,55 @@
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/**
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******************************************************************************
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* @file can.h
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* @brief This file contains all the function prototypes for
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* the can.c file
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) 2025 STMicroelectronics.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __CAN_H__
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#define __CAN_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "main.h"
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/* USER CODE BEGIN Includes */
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/* USER CODE END Includes */
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extern CAN_HandleTypeDef hcan;
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/* USER CODE BEGIN Private defines */
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/* USER CODE END Private defines */
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void MX_CAN_Init(void);
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/* USER CODE BEGIN Prototypes */
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void Setup_CAN_addr(uint8_t mode);
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int CAN_send(uint16_t data[], int Addr, int Qua);
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/* USER CODE END Prototypes */
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#ifdef __cplusplus
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}
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#endif
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#endif /* __CAN_H__ */
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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10
Core/Inc/crc16.h
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10
Core/Inc/crc16.h
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@@ -0,0 +1,10 @@
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#include "stdint.h"
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typedef unsigned short WORD;
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typedef unsigned char byte;
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unsigned int get_crc_ccitt(unsigned int crc, unsigned int *buf, unsigned long size );
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unsigned int get_crc_16(unsigned int crc,unsigned int *buf,unsigned long size );
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unsigned int get_crc_16b(unsigned int crc,unsigned int *buf,unsigned long size );
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int get_crc16(uint16_t *buf, int size );
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20
Core/Inc/eeprom.h
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20
Core/Inc/eeprom.h
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@@ -0,0 +1,20 @@
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#ifndef __EEPROM_H
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#define __EEPROM_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include "stm32f1xx_hal.h"
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#define FLASH_EEPROM_BASE 0x0801F800
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#define FLASH_STARTO 0xBABEFACE
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void putIntoEeprom(uint16_t, uint16_t*);
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uint16_t watInTheFlash(uint32_t);
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#ifdef __cplusplus
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}
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#endif
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#endif /* __EEPROM_H */
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165
Core/Inc/gpio.h
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165
Core/Inc/gpio.h
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@@ -0,0 +1,165 @@
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/**
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******************************************************************************
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* @file gpio.h
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* @brief This file contains all the function prototypes for
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* the gpio.c file
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******************************************************************************
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* @attention
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*
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* <h2><center>© Copyright (c) 2025 STMicroelectronics.
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* All rights reserved.</center></h2>
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __GPIO_H__
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#define __GPIO_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "main.h"
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/* USER CODE BEGIN Includes */
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/* USER CODE END Includes */
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/* USER CODE BEGIN Private defines */
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#define IN_01_Pin GPIO_PIN_3
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#define IN_01_GPIO_Port GPIOA
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#define IN_02_Pin GPIO_PIN_2
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#define IN_02_GPIO_Port GPIOA
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#define IN_03_Pin GPIO_PIN_1
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#define IN_03_GPIO_Port GPIOA
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#define IN_04_Pin GPIO_PIN_0
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#define IN_04_GPIO_Port GPIOA
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#define IN_05_Pin GPIO_PIN_15
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#define IN_05_GPIO_Port GPIOC
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#define IN_06_Pin GPIO_PIN_13
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#define IN_06_GPIO_Port GPIOC
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#define IN_07_Pin GPIO_PIN_15
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#define IN_07_GPIO_Port GPIOB
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#define IN_08_Pin GPIO_PIN_14
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#define IN_08_GPIO_Port GPIOB
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#define IN_09_Pin GPIO_PIN_13
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#define IN_09_GPIO_Port GPIOB
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#define IN_10_Pin GPIO_PIN_12
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#define IN_10_GPIO_Port GPIOB
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#define IN_11_Pin GPIO_PIN_1
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#define IN_11_GPIO_Port GPIOB
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#define IN_12_Pin GPIO_PIN_0
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#define IN_12_GPIO_Port GPIOB
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#define IN_13_Pin GPIO_PIN_5
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#define IN_13_GPIO_Port GPIOA
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#define IN_14_Pin GPIO_PIN_4
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#define IN_14_GPIO_Port GPIOA
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#define J0_Pin GPIO_PIN_6
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#define J0_GPIO_Port GPIOA
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#define J1_Pin GPIO_PIN_7
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#define J1_GPIO_Port GPIOA
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#define J2_Pin GPIO_PIN_4
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#define J2_GPIO_Port GPIOC
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#define J3_Pin GPIO_PIN_5
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#define J3_GPIO_Port GPIOC
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#define Jselect_Pin GPIO_PIN_14
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#define Jselect_GPIO_Port GPIOC
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#define LED0_Pin GPIO_PIN_5
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#define LED0_GPIO_Port GPIOB
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#define LED1_Pin GPIO_PIN_6
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#define LED1_GPIO_Port GPIOB
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#define LED2_Pin GPIO_PIN_2
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#define LED2_GPIO_Port GPIOC
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#define LED3_Pin GPIO_PIN_3
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#define LED3_GPIO_Port GPIOC
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#define PVT4_Pin GPIO_PIN_6
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#define PVT4_GPIO_Port GPIOC
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#define PVT3_Pin GPIO_PIN_7
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#define PVT3_GPIO_Port GPIOC
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#define PVT2_Pin GPIO_PIN_8
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#define PVT2_GPIO_Port GPIOC
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#define PVT1_Pin GPIO_PIN_9
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#define PVT1_GPIO_Port GPIOC
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#define BOOT1_Pin GPIO_PIN_2
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#define BOOT1_GPIO_Port GPIOB
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#define LED_0_OFF HAL_GPIO_WritePin(LED0_GPIO_Port, LED0_Pin, GPIO_PIN_SET) //Set or clear the selected data port bit
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#define LED_0_ON HAL_GPIO_WritePin(LED0_GPIO_Port, LED0_Pin, GPIO_PIN_RESET) //??? ?????? ?? ??????????
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#define LED_0_TGL HAL_GPIO_TogglePin(LED0_GPIO_Port, LED0_Pin)
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#define LED_1_OFF HAL_GPIO_WritePin(LED1_GPIO_Port, LED1_Pin, GPIO_PIN_SET) //Set or clear the selected data port bit
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#define LED_1_ON HAL_GPIO_WritePin(LED1_GPIO_Port, LED1_Pin, GPIO_PIN_RESET) //??? ?????? ?? ??????????
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#define LED_1_TGL HAL_GPIO_TogglePin(LED1_GPIO_Port, LED1_Pin)
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#define LED_2_ON HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin, GPIO_PIN_SET) //Set or clear the selected data port bit
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#define LED_2_OFF HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin, GPIO_PIN_RESET) //??? ?????? ?? ??????????
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#define LED_2_TGL HAL_GPIO_TogglePin(LED2_GPIO_Port, LED2_Pin)
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#define LED_3_ON HAL_GPIO_WritePin(LED3_GPIO_Port, LED3_Pin, GPIO_PIN_SET) //Set or clear the selected data port bit
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#define LED_3_OFF HAL_GPIO_WritePin(LED3_GPIO_Port, LED3_Pin, GPIO_PIN_RESET) //??? ?????? ?? ??????????
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#define LED_3_TGL HAL_GPIO_TogglePin(LED3_GPIO_Port, LED3_Pin)
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#define Pvt1_ON HAL_GPIO_WritePin(PVT1_GPIO_Port, PVT1_Pin, GPIO_PIN_SET) //Set or clear the selected data port bit
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#define Pvt1_OFF HAL_GPIO_WritePin(PVT1_GPIO_Port, PVT1_Pin, GPIO_PIN_RESET) //??? ?????? ?? ??????????
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#define Pvt1_TGL HAL_GPIO_TogglePin(PVT1_GPIO_Port, PVT1_Pin)
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#define Pvt2_ON HAL_GPIO_WritePin(PVT2_GPIO_Port, PVT2_Pin, GPIO_PIN_SET) //set - ????????????? ???, reset - ??????? ???
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#define Pvt2_OFF HAL_GPIO_WritePin(PVT2_GPIO_Port, PVT2_Pin, GPIO_PIN_RESET) //????? ??????? ? main.h ??????? ?????? ?????????????
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#define Pvt2_TGL HAL_GPIO_TogglePin(PVT2_GPIO_Port, PVT2_Pin)
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#define Pvt3_ON HAL_GPIO_WritePin(PVT3_GPIO_Port, PVT3_Pin, GPIO_PIN_SET)
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#define Pvt3_OFF HAL_GPIO_WritePin(PVT3_GPIO_Port, PVT3_Pin, GPIO_PIN_RESET)
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#define Pvt3_TGL HAL_GPIO_TogglePin(PVT3_GPIO_Port, PVT3_Pin)
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#define Pvt4_ON HAL_GPIO_WritePin(PVT4_GPIO_Port, PVT4_Pin, GPIO_PIN_SET)
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#define Pvt4_OFF HAL_GPIO_WritePin(PVT4_GPIO_Port, PVT4_Pin, GPIO_PIN_RESET)
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#define Pvt4_TGL HAL_GPIO_TogglePin(PVT4_GPIO_Port, PVT4_Pin)
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#define IN_01 HAL_GPIO_ReadPin(IN_01_GPIO_Port, IN_01_Pin) // ???????? ??1 (??????? ???????????? ???????????)
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#define IN_02 HAL_GPIO_ReadPin(IN_02_GPIO_Port, IN_02_Pin) // ???????? ??2 (??????? ???????????? ?????????)
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#define IN_03 HAL_GPIO_ReadPin(IN_03_GPIO_Port, IN_03_Pin) // ???????? ??3 (??????? ??. ??????, ???? ?????????, ????)
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#define IN_04 HAL_GPIO_ReadPin(IN_04_GPIO_Port, IN_04_Pin) // ???????? ??4 (??????? ???????? ???? ? ?????????? +)
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#define IN_05 HAL_GPIO_ReadPin(IN_05_GPIO_Port, IN_05_Pin) // ???????? ??5 (??????? ???????? ???? ? ?????????? –)
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#define IN_06 HAL_GPIO_ReadPin(IN_06_GPIO_Port, IN_06_Pin) // ???????? ??6 (??????? ?????????)
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#define IN_07 HAL_GPIO_ReadPin(IN_07_GPIO_Port, IN_07_Pin) // ???????? 3? ??????? 380 ?
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#define IN_08 HAL_GPIO_ReadPin(IN_08_GPIO_Port, IN_08_Pin) // ????? ??????????
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#define IN_09 HAL_GPIO_ReadPin(IN_09_GPIO_Port, IN_09_Pin) // ?????? ??????????
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#define IN_10 HAL_GPIO_ReadPin(IN_10_GPIO_Port, IN_10_Pin) // ?????? ? ???? 24 ?
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#define IN_11 HAL_GPIO_ReadPin(IN_11_GPIO_Port, IN_11_Pin) // ???????? ??????? ???
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#define IN_12 HAL_GPIO_ReadPin(IN_12_GPIO_Port, IN_12_Pin) // ??????
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#define IN_13 HAL_GPIO_ReadPin(IN_13_GPIO_Port, IN_13_Pin) // ??????
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#define IN_14 HAL_GPIO_ReadPin(IN_14_GPIO_Port, IN_14_Pin) // ???????? ??????? ???
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#define J0 HAL_GPIO_ReadPin(J0_GPIO_Port, J0_Pin) //Read the specified input port pin
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#define J1 HAL_GPIO_ReadPin(J1_GPIO_Port, J1_Pin)
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#define J2 HAL_GPIO_ReadPin(J2_GPIO_Port, J2_Pin)
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#define J3 HAL_GPIO_ReadPin(J3_GPIO_Port, J3_Pin)
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#define Jselect HAL_GPIO_ReadPin(Jselect_GPIO_Port, Jselect_Pin)
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/* USER CODE END Private defines */
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void MX_GPIO_Init(void);
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/* USER CODE BEGIN Prototypes */
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||||
/* USER CODE END Prototypes */
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||||
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#ifdef __cplusplus
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}
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#endif
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#endif /*__ GPIO_H__ */
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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30
Core/Inc/lampa.h
Normal file
30
Core/Inc/lampa.h
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@@ -0,0 +1,30 @@
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#ifndef __LAMPA_H
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#define __LAMPA_H
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/*
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* Применяется метод Слой аппаратных абстракции(HAL) так он последний(модный),
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* тут описано библиотечные вызовы
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*/
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include "main.h"
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#include "stdbool.h"
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#define Delay 1000
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#define numUno 1
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#define numNul 0
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void ReadEnteres(void);
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uint16_t ReadJumpers(void);
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uint16_t TestJumper(void);
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void ReadSeanus(void);
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#ifdef __cplusplus
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}
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#endif
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#endif
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73
Core/Inc/main.h
Normal file
73
Core/Inc/main.h
Normal file
@@ -0,0 +1,73 @@
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/* USER CODE BEGIN Header */
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||||
/**
|
||||
******************************************************************************
|
||||
* @file : main.h
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||||
* @brief : Header for main.c file.
|
||||
* This file contains the common defines of the application.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2022 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __MAIN_H
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||||
#define __MAIN_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f1xx_hal.h"
|
||||
|
||||
/* Private includes ----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Includes */
|
||||
|
||||
/* USER CODE END Includes */
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN ET */
|
||||
|
||||
/* USER CODE END ET */
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/* USER CODE BEGIN EC */
|
||||
|
||||
/* USER CODE END EC */
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN EM */
|
||||
|
||||
/* USER CODE END EM */
|
||||
|
||||
/* Exported functions prototypes ---------------------------------------------*/
|
||||
void Error_Handler(void);
|
||||
|
||||
/* USER CODE BEGIN EFP */
|
||||
|
||||
void Millisecond(void);
|
||||
|
||||
/* USER CODE END EFP */
|
||||
|
||||
/* Private defines -----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Private defines */
|
||||
|
||||
/* USER CODE END Private defines */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __MAIN_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
25
Core/Inc/message.h
Normal file
25
Core/Inc/message.h
Normal file
@@ -0,0 +1,25 @@
|
||||
#ifndef MESSAGE_H
|
||||
#define MESSAGE_H
|
||||
|
||||
#include "stdint.h"
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||||
#include "struc.h"
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||||
|
||||
typedef unsigned char CHAR;
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||||
|
||||
#define Modbus_LEN 0x000080
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||||
#define Modbus ((WORDE *)modbus)
|
||||
|
||||
extern uint16_t Mode;
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||||
|
||||
extern uint16_t modbus[],archiv[],county[],espero[];
|
||||
|
||||
extern LONGE* outputs;
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||||
|
||||
extern uint16_t Maska[][8];
|
||||
|
||||
|
||||
void Save_params(void);
|
||||
void Load_params(void);
|
||||
void Default_params(void);
|
||||
|
||||
#endif //MESSAGE_H
|
||||
57
Core/Inc/package.h
Normal file
57
Core/Inc/package.h
Normal file
@@ -0,0 +1,57 @@
|
||||
#ifndef PACKAGE
|
||||
#define PACKAGE
|
||||
|
||||
#define PROTOKOL 3
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||||
|
||||
#define m_FAST 0
|
||||
#define m_SLOW 1
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||||
|
||||
#define keys 0x0
|
||||
|
||||
#define Inputs Modbus[0x0]
|
||||
#define Alarms Modbus[0x1]
|
||||
#define Errors Modbus[0x2]
|
||||
|
||||
#define Alarm_mask Modbus[0x8]
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||||
#define Error_mask Modbus[0x9]
|
||||
|
||||
#define Error_mask Modbus[0x9]
|
||||
|
||||
#define Jumpers Modbus[0x10]
|
||||
#define Buttons Modbus[0x11]
|
||||
#define jumpers modbus[0x10]
|
||||
#define buttons modbus[0x11]
|
||||
|
||||
#define Squazh_U (modbus+0x20)
|
||||
|
||||
#define Sleep_time modbus[0x48]
|
||||
|
||||
#define Squazh_L (modbus+0x30)
|
||||
|
||||
#define Cancount (modbus+0x60) // пауза между I посылками CAN
|
||||
#define CanWait (modbus+0x62) // максимальнаа пауза
|
||||
#define CanRestart (modbus+0x64) // перезапуск посылки
|
||||
#define CanRepeat modbus[0x66] // сколько раз повторать надо
|
||||
|
||||
#define Brightness modbus[0x68] // аркость сигнальной лампочки
|
||||
|
||||
#define cancyclo 0x78 // его адрес
|
||||
#define CanCycle (modbus+0x78) // счетчик циклов CAN
|
||||
#define CanRound (modbus+0x7A) // счетчик еще более полных циклов CAN
|
||||
|
||||
#define Protokol modbus[125]
|
||||
#define LastMode Modbus[126].all
|
||||
|
||||
#define Commands Modbus[127].all
|
||||
#define cTestLamp Modbus[127].bit.bit0
|
||||
#define cDefParam Modbus[127].bit.bit1
|
||||
#define cSaveParam Modbus[127].bit.bit2
|
||||
#define cLoadParam Modbus[127].bit.bit3
|
||||
|
||||
#define cExtLamp Modbus[127].bit.bit6
|
||||
#define cExtLite Modbus[127].bit.bit7
|
||||
|
||||
#define cReset Modbus[127].bit.bitF
|
||||
|
||||
#endif //PACKAGE
|
||||
|
||||
391
Core/Inc/stm32f1xx_hal_conf.h
Normal file
391
Core/Inc/stm32f1xx_hal_conf.h
Normal file
@@ -0,0 +1,391 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f1xx_hal_conf.h
|
||||
* @brief HAL configuration file.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F1xx_HAL_CONF_H
|
||||
#define __STM32F1xx_HAL_CONF_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
|
||||
/* ########################## Module Selection ############################## */
|
||||
/**
|
||||
* @brief This is the list of modules to be used in the HAL driver
|
||||
*/
|
||||
|
||||
#define HAL_MODULE_ENABLED
|
||||
/*#define HAL_ADC_MODULE_ENABLED */
|
||||
/*#define HAL_CRYP_MODULE_ENABLED */
|
||||
#define HAL_CAN_MODULE_ENABLED
|
||||
/*#define HAL_CAN_LEGACY_MODULE_ENABLED */
|
||||
/*#define HAL_CEC_MODULE_ENABLED */
|
||||
/*#define HAL_CORTEX_MODULE_ENABLED */
|
||||
/*#define HAL_CRC_MODULE_ENABLED */
|
||||
/*#define HAL_DAC_MODULE_ENABLED */
|
||||
/*#define HAL_DMA_MODULE_ENABLED */
|
||||
/*#define HAL_ETH_MODULE_ENABLED */
|
||||
/*#define HAL_FLASH_MODULE_ENABLED */
|
||||
#define HAL_GPIO_MODULE_ENABLED
|
||||
/*#define HAL_I2C_MODULE_ENABLED */
|
||||
/*#define HAL_I2S_MODULE_ENABLED */
|
||||
/*#define HAL_IRDA_MODULE_ENABLED */
|
||||
/*#define HAL_IWDG_MODULE_ENABLED */
|
||||
/*#define HAL_NOR_MODULE_ENABLED */
|
||||
/*#define HAL_NAND_MODULE_ENABLED */
|
||||
/*#define HAL_PCCARD_MODULE_ENABLED */
|
||||
/*#define HAL_PCD_MODULE_ENABLED */
|
||||
/*#define HAL_HCD_MODULE_ENABLED */
|
||||
/*#define HAL_PWR_MODULE_ENABLED */
|
||||
/*#define HAL_RCC_MODULE_ENABLED */
|
||||
/*#define HAL_RTC_MODULE_ENABLED */
|
||||
/*#define HAL_SD_MODULE_ENABLED */
|
||||
/*#define HAL_MMC_MODULE_ENABLED */
|
||||
/*#define HAL_SDRAM_MODULE_ENABLED */
|
||||
/*#define HAL_SMARTCARD_MODULE_ENABLED */
|
||||
/*#define HAL_SPI_MODULE_ENABLED */
|
||||
/*#define HAL_SRAM_MODULE_ENABLED */
|
||||
#define HAL_TIM_MODULE_ENABLED
|
||||
/*#define HAL_UART_MODULE_ENABLED */
|
||||
/*#define HAL_USART_MODULE_ENABLED */
|
||||
/*#define HAL_WWDG_MODULE_ENABLED */
|
||||
|
||||
#define HAL_CORTEX_MODULE_ENABLED
|
||||
#define HAL_DMA_MODULE_ENABLED
|
||||
#define HAL_FLASH_MODULE_ENABLED
|
||||
#define HAL_EXTI_MODULE_ENABLED
|
||||
#define HAL_GPIO_MODULE_ENABLED
|
||||
#define HAL_PWR_MODULE_ENABLED
|
||||
#define HAL_RCC_MODULE_ENABLED
|
||||
|
||||
/* ########################## Oscillator Values adaptation ####################*/
|
||||
/**
|
||||
* @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
|
||||
* This value is used by the RCC HAL module to compute the system frequency
|
||||
* (when HSE is used as system clock source, directly or through the PLL).
|
||||
*/
|
||||
#if !defined (HSE_VALUE)
|
||||
#define HSE_VALUE 8000000U /*!< Value of the External oscillator in Hz */
|
||||
#endif /* HSE_VALUE */
|
||||
|
||||
#if !defined (HSE_STARTUP_TIMEOUT)
|
||||
#define HSE_STARTUP_TIMEOUT 100U /*!< Time out for HSE start up, in ms */
|
||||
#endif /* HSE_STARTUP_TIMEOUT */
|
||||
|
||||
/**
|
||||
* @brief Internal High Speed oscillator (HSI) value.
|
||||
* This value is used by the RCC HAL module to compute the system frequency
|
||||
* (when HSI is used as system clock source, directly or through the PLL).
|
||||
*/
|
||||
#if !defined (HSI_VALUE)
|
||||
#define HSI_VALUE 8000000U /*!< Value of the Internal oscillator in Hz*/
|
||||
#endif /* HSI_VALUE */
|
||||
|
||||
/**
|
||||
* @brief Internal Low Speed oscillator (LSI) value.
|
||||
*/
|
||||
#if !defined (LSI_VALUE)
|
||||
#define LSI_VALUE 40000U /*!< LSI Typical Value in Hz */
|
||||
#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
|
||||
The real value may vary depending on the variations
|
||||
in voltage and temperature. */
|
||||
|
||||
/**
|
||||
* @brief External Low Speed oscillator (LSE) value.
|
||||
* This value is used by the UART, RTC HAL module to compute the system frequency
|
||||
*/
|
||||
#if !defined (LSE_VALUE)
|
||||
#define LSE_VALUE 32768U /*!< Value of the External oscillator in Hz*/
|
||||
#endif /* LSE_VALUE */
|
||||
|
||||
#if !defined (LSE_STARTUP_TIMEOUT)
|
||||
#define LSE_STARTUP_TIMEOUT 5000U /*!< Time out for LSE start up, in ms */
|
||||
#endif /* LSE_STARTUP_TIMEOUT */
|
||||
|
||||
/* Tip: To avoid modifying this file each time you need to use different HSE,
|
||||
=== you can define the HSE value in your toolchain compiler preprocessor. */
|
||||
|
||||
/* ########################### System Configuration ######################### */
|
||||
/**
|
||||
* @brief This is the HAL system configuration section
|
||||
*/
|
||||
#define VDD_VALUE 3300U /*!< Value of VDD in mv */
|
||||
#define TICK_INT_PRIORITY 0U /*!< tick interrupt priority (lowest by default) */
|
||||
#define USE_RTOS 0U
|
||||
#define PREFETCH_ENABLE 1U
|
||||
|
||||
#define USE_HAL_ADC_REGISTER_CALLBACKS 0U /* ADC register callback disabled */
|
||||
#define USE_HAL_CAN_REGISTER_CALLBACKS 0U /* CAN register callback disabled */
|
||||
#define USE_HAL_CEC_REGISTER_CALLBACKS 0U /* CEC register callback disabled */
|
||||
#define USE_HAL_DAC_REGISTER_CALLBACKS 0U /* DAC register callback disabled */
|
||||
#define USE_HAL_ETH_REGISTER_CALLBACKS 0U /* ETH register callback disabled */
|
||||
#define USE_HAL_HCD_REGISTER_CALLBACKS 0U /* HCD register callback disabled */
|
||||
#define USE_HAL_I2C_REGISTER_CALLBACKS 0U /* I2C register callback disabled */
|
||||
#define USE_HAL_I2S_REGISTER_CALLBACKS 0U /* I2S register callback disabled */
|
||||
#define USE_HAL_MMC_REGISTER_CALLBACKS 0U /* MMC register callback disabled */
|
||||
#define USE_HAL_NAND_REGISTER_CALLBACKS 0U /* NAND register callback disabled */
|
||||
#define USE_HAL_NOR_REGISTER_CALLBACKS 0U /* NOR register callback disabled */
|
||||
#define USE_HAL_PCCARD_REGISTER_CALLBACKS 0U /* PCCARD register callback disabled */
|
||||
#define USE_HAL_PCD_REGISTER_CALLBACKS 0U /* PCD register callback disabled */
|
||||
#define USE_HAL_RTC_REGISTER_CALLBACKS 0U /* RTC register callback disabled */
|
||||
#define USE_HAL_SD_REGISTER_CALLBACKS 0U /* SD register callback disabled */
|
||||
#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U /* SMARTCARD register callback disabled */
|
||||
#define USE_HAL_IRDA_REGISTER_CALLBACKS 0U /* IRDA register callback disabled */
|
||||
#define USE_HAL_SRAM_REGISTER_CALLBACKS 0U /* SRAM register callback disabled */
|
||||
#define USE_HAL_SPI_REGISTER_CALLBACKS 0U /* SPI register callback disabled */
|
||||
#define USE_HAL_TIM_REGISTER_CALLBACKS 0U /* TIM register callback disabled */
|
||||
#define USE_HAL_UART_REGISTER_CALLBACKS 0U /* UART register callback disabled */
|
||||
#define USE_HAL_USART_REGISTER_CALLBACKS 0U /* USART register callback disabled */
|
||||
#define USE_HAL_WWDG_REGISTER_CALLBACKS 0U /* WWDG register callback disabled */
|
||||
|
||||
/* ########################## Assert Selection ############################## */
|
||||
/**
|
||||
* @brief Uncomment the line below to expanse the "assert_param" macro in the
|
||||
* HAL drivers code
|
||||
*/
|
||||
/* #define USE_FULL_ASSERT 1U */
|
||||
|
||||
/* ################## Ethernet peripheral configuration ##################### */
|
||||
|
||||
/* Section 1 : Ethernet peripheral configuration */
|
||||
|
||||
/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
|
||||
#define MAC_ADDR0 2U
|
||||
#define MAC_ADDR1 0U
|
||||
#define MAC_ADDR2 0U
|
||||
#define MAC_ADDR3 0U
|
||||
#define MAC_ADDR4 0U
|
||||
#define MAC_ADDR5 0U
|
||||
|
||||
/* Definition of the Ethernet driver buffers size and count */
|
||||
#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */
|
||||
#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */
|
||||
#define ETH_RXBUFNB 8U /* 4 Rx buffers of size ETH_RX_BUF_SIZE */
|
||||
#define ETH_TXBUFNB 4U /* 4 Tx buffers of size ETH_TX_BUF_SIZE */
|
||||
|
||||
/* Section 2: PHY configuration section */
|
||||
|
||||
/* DP83848_PHY_ADDRESS Address*/
|
||||
#define DP83848_PHY_ADDRESS 0x01U
|
||||
/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
|
||||
#define PHY_RESET_DELAY 0x000000FFU
|
||||
/* PHY Configuration delay */
|
||||
#define PHY_CONFIG_DELAY 0x00000FFFU
|
||||
|
||||
#define PHY_READ_TO 0x0000FFFFU
|
||||
#define PHY_WRITE_TO 0x0000FFFFU
|
||||
|
||||
/* Section 3: Common PHY Registers */
|
||||
|
||||
#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */
|
||||
#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */
|
||||
|
||||
#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */
|
||||
#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */
|
||||
#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */
|
||||
#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */
|
||||
#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */
|
||||
#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */
|
||||
#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */
|
||||
#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */
|
||||
#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */
|
||||
#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */
|
||||
|
||||
#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */
|
||||
#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */
|
||||
#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */
|
||||
|
||||
/* Section 4: Extended PHY Registers */
|
||||
#define PHY_SR ((uint16_t)0x10U) /*!< PHY status register Offset */
|
||||
|
||||
#define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */
|
||||
#define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */
|
||||
|
||||
/* ################## SPI peripheral configuration ########################## */
|
||||
|
||||
/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
|
||||
* Activated: CRC code is present inside driver
|
||||
* Deactivated: CRC code cleaned from driver
|
||||
*/
|
||||
|
||||
#define USE_SPI_CRC 0U
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief Include module's header file
|
||||
*/
|
||||
|
||||
#ifdef HAL_RCC_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_rcc.h"
|
||||
#endif /* HAL_RCC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_GPIO_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_gpio.h"
|
||||
#endif /* HAL_GPIO_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_EXTI_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_exti.h"
|
||||
#endif /* HAL_EXTI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DMA_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_dma.h"
|
||||
#endif /* HAL_DMA_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_ETH_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_eth.h"
|
||||
#endif /* HAL_ETH_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CAN_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_can.h"
|
||||
#endif /* HAL_CAN_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
|
||||
#include "Legacy/stm32f1xx_hal_can_legacy.h"
|
||||
#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CEC_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_cec.h"
|
||||
#endif /* HAL_CEC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CORTEX_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_cortex.h"
|
||||
#endif /* HAL_CORTEX_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_ADC_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_adc.h"
|
||||
#endif /* HAL_ADC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CRC_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_crc.h"
|
||||
#endif /* HAL_CRC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DAC_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_dac.h"
|
||||
#endif /* HAL_DAC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_FLASH_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_flash.h"
|
||||
#endif /* HAL_FLASH_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SRAM_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_sram.h"
|
||||
#endif /* HAL_SRAM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_NOR_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_nor.h"
|
||||
#endif /* HAL_NOR_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_I2C_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_i2c.h"
|
||||
#endif /* HAL_I2C_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_I2S_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_i2s.h"
|
||||
#endif /* HAL_I2S_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_IWDG_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_iwdg.h"
|
||||
#endif /* HAL_IWDG_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PWR_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_pwr.h"
|
||||
#endif /* HAL_PWR_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_RTC_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_rtc.h"
|
||||
#endif /* HAL_RTC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PCCARD_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_pccard.h"
|
||||
#endif /* HAL_PCCARD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SD_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_sd.h"
|
||||
#endif /* HAL_SD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_NAND_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_nand.h"
|
||||
#endif /* HAL_NAND_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SPI_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_spi.h"
|
||||
#endif /* HAL_SPI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_TIM_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_tim.h"
|
||||
#endif /* HAL_TIM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_UART_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_uart.h"
|
||||
#endif /* HAL_UART_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_USART_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_usart.h"
|
||||
#endif /* HAL_USART_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_IRDA_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_irda.h"
|
||||
#endif /* HAL_IRDA_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SMARTCARD_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_smartcard.h"
|
||||
#endif /* HAL_SMARTCARD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_WWDG_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_wwdg.h"
|
||||
#endif /* HAL_WWDG_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PCD_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_pcd.h"
|
||||
#endif /* HAL_PCD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_HCD_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_hcd.h"
|
||||
#endif /* HAL_HCD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_MMC_MODULE_ENABLED
|
||||
#include "stm32f1xx_hal_mmc.h"
|
||||
#endif /* HAL_MMC_MODULE_ENABLED */
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
#ifdef USE_FULL_ASSERT
|
||||
/**
|
||||
* @brief The assert_param macro is used for function's parameters check.
|
||||
* @param expr If expr is false, it calls assert_failed function
|
||||
* which reports the name of the source file and the source
|
||||
* line number of the call that failed.
|
||||
* If expr is true, it returns no value.
|
||||
* @retval None
|
||||
*/
|
||||
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
void assert_failed(uint8_t* file, uint32_t line);
|
||||
#else
|
||||
#define assert_param(expr) ((void)0U)
|
||||
#endif /* USE_FULL_ASSERT */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F1xx_HAL_CONF_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
72
Core/Inc/stm32f1xx_it.h
Normal file
72
Core/Inc/stm32f1xx_it.h
Normal file
@@ -0,0 +1,72 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f1xx_it.h
|
||||
* @brief This file contains the headers of the interrupt handlers.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2022 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F1xx_IT_H
|
||||
#define __STM32F1xx_IT_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Private includes ----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Includes */
|
||||
|
||||
/* USER CODE END Includes */
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN ET */
|
||||
|
||||
/* USER CODE END ET */
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/* USER CODE BEGIN EC */
|
||||
|
||||
/* USER CODE END EC */
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN EM */
|
||||
|
||||
/* USER CODE END EM */
|
||||
|
||||
/* Exported functions prototypes ---------------------------------------------*/
|
||||
void NMI_Handler(void);
|
||||
void HardFault_Handler(void);
|
||||
void MemManage_Handler(void);
|
||||
void BusFault_Handler(void);
|
||||
void UsageFault_Handler(void);
|
||||
void SVC_Handler(void);
|
||||
void DebugMon_Handler(void);
|
||||
void PendSV_Handler(void);
|
||||
void SysTick_Handler(void);
|
||||
void USB_HP_CAN1_TX_IRQHandler(void);
|
||||
void USB_LP_CAN1_RX0_IRQHandler(void);
|
||||
void TIM4_IRQHandler(void);
|
||||
/* USER CODE BEGIN EFP */
|
||||
|
||||
/* USER CODE END EFP */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F1xx_IT_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
153
Core/Inc/struc.h
Normal file
153
Core/Inc/struc.h
Normal file
@@ -0,0 +1,153 @@
|
||||
#ifndef __STRUC_H
|
||||
#define __STRUC_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
typedef union
|
||||
{
|
||||
struct
|
||||
{
|
||||
unsigned char bit0: 1;
|
||||
unsigned char bit1: 1;
|
||||
unsigned char bit2: 1;
|
||||
unsigned char bit3: 1;
|
||||
unsigned char bit4: 1;
|
||||
unsigned char bit5: 1;
|
||||
unsigned char bit6: 1;
|
||||
unsigned char bit7: 1;
|
||||
|
||||
} bit;
|
||||
|
||||
struct
|
||||
{
|
||||
unsigned char quad_0 :4;
|
||||
unsigned char quad_1 :4;
|
||||
|
||||
} qua;
|
||||
|
||||
unsigned char all;
|
||||
|
||||
} BAITE;
|
||||
|
||||
typedef union
|
||||
{
|
||||
struct
|
||||
{
|
||||
unsigned short int bit0: 1;
|
||||
unsigned short int bit1: 1;
|
||||
unsigned short int bit2: 1;
|
||||
unsigned short int bit3: 1;
|
||||
unsigned short int bit4: 1;
|
||||
unsigned short int bit5: 1;
|
||||
unsigned short int bit6: 1;
|
||||
unsigned short int bit7: 1;
|
||||
unsigned short int bit8: 1;
|
||||
unsigned short int bit9: 1;
|
||||
unsigned short int bitA: 1;
|
||||
unsigned short int bitB: 1;
|
||||
unsigned short int bitC: 1;
|
||||
unsigned short int bitD: 1;
|
||||
unsigned short int bitE: 1;
|
||||
unsigned short int bitF: 1;
|
||||
|
||||
} bit;
|
||||
|
||||
struct
|
||||
{
|
||||
unsigned short int quad_0 :4;
|
||||
unsigned short int quad_1 :4;
|
||||
unsigned short int quad_2 :4;
|
||||
unsigned short int quad_3 :4;
|
||||
|
||||
} qua;
|
||||
|
||||
struct
|
||||
{
|
||||
unsigned short int byte_0 :8;
|
||||
unsigned short int byte_1 :8;
|
||||
|
||||
} byt;
|
||||
|
||||
unsigned short int all;
|
||||
|
||||
} WORDE;
|
||||
|
||||
typedef union
|
||||
{
|
||||
struct
|
||||
{
|
||||
unsigned int bit00: 1;
|
||||
unsigned int bit01: 1;
|
||||
unsigned int bit02: 1;
|
||||
unsigned int bit03: 1;
|
||||
unsigned int bit04: 1;
|
||||
unsigned int bit05: 1;
|
||||
unsigned int bit06: 1;
|
||||
unsigned int bit07: 1;
|
||||
unsigned int bit08: 1;
|
||||
unsigned int bit09: 1;
|
||||
unsigned int bit0A: 1;
|
||||
unsigned int bit0B: 1;
|
||||
unsigned int bit0C: 1;
|
||||
unsigned int bit0D: 1;
|
||||
unsigned int bit0E: 1;
|
||||
unsigned int bit0F: 1;
|
||||
unsigned int bit10: 1;
|
||||
unsigned int bit11: 1;
|
||||
unsigned int bit12: 1;
|
||||
unsigned int bit13: 1;
|
||||
unsigned int bit14: 1;
|
||||
unsigned int bit15: 1;
|
||||
unsigned int bit16: 1;
|
||||
unsigned int bit17: 1;
|
||||
unsigned int bit18: 1;
|
||||
unsigned int bit19: 1;
|
||||
unsigned int bit1A: 1;
|
||||
unsigned int bit1B: 1;
|
||||
unsigned int bit1C: 1;
|
||||
unsigned int bit1D: 1;
|
||||
unsigned int bit1E: 1;
|
||||
unsigned int bit1F: 1;
|
||||
|
||||
} bit;
|
||||
|
||||
struct
|
||||
{
|
||||
unsigned int quad_0 :4;
|
||||
unsigned int quad_1 :4;
|
||||
unsigned int quad_2 :4;
|
||||
unsigned int quad_3 :4;
|
||||
unsigned int quad_4 :4;
|
||||
unsigned int quad_5 :4;
|
||||
unsigned int quad_6 :4;
|
||||
unsigned int quad_7 :4;
|
||||
|
||||
} qua;
|
||||
|
||||
struct
|
||||
{
|
||||
unsigned int byte_0 :8;
|
||||
unsigned int byte_1 :8;
|
||||
unsigned int byte_2 :8;
|
||||
unsigned int byte_3 :8;
|
||||
|
||||
} byt;
|
||||
|
||||
struct
|
||||
{
|
||||
unsigned int word_0 :16;
|
||||
unsigned int word_1 :16;
|
||||
|
||||
} wrd;
|
||||
|
||||
unsigned int all;
|
||||
|
||||
} LONGE;
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
52
Core/Inc/tim.h
Normal file
52
Core/Inc/tim.h
Normal file
@@ -0,0 +1,52 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file tim.h
|
||||
* @brief This file contains all the function prototypes for
|
||||
* the tim.c file
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2025 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __TIM_H__
|
||||
#define __TIM_H__
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "main.h"
|
||||
|
||||
/* USER CODE BEGIN Includes */
|
||||
|
||||
/* USER CODE END Includes */
|
||||
|
||||
extern TIM_HandleTypeDef htim4;
|
||||
|
||||
/* USER CODE BEGIN Private defines */
|
||||
|
||||
/* USER CODE END Private defines */
|
||||
|
||||
void MX_TIM4_Init(void);
|
||||
|
||||
/* USER CODE BEGIN Prototypes */
|
||||
|
||||
/* USER CODE END Prototypes */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __TIM_H__ */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
275
Core/Src/can.c
Normal file
275
Core/Src/can.c
Normal file
@@ -0,0 +1,275 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file can.c
|
||||
* @brief This file provides code for the configuration
|
||||
* of the CAN instances.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2025 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "can.h"
|
||||
|
||||
/* USER CODE BEGIN 0 */
|
||||
|
||||
#include "gpio.h"
|
||||
#include "message.h"
|
||||
|
||||
void CAN_filterConfig(void);
|
||||
|
||||
CAN_TxHeaderTypeDef TxHeader;
|
||||
CAN_RxHeaderTypeDef RxHeader;
|
||||
|
||||
CAN_FilterTypeDef sFilterConfig;
|
||||
|
||||
CAN_TxHeaderTypeDef msgHeaderSend;
|
||||
uint8_t msgDataSend[8];
|
||||
uint32_t mailBoxNum = 0;
|
||||
|
||||
uint8_t TxData[8];
|
||||
uint8_t RxData[8];
|
||||
uint32_t TxMailbox;
|
||||
|
||||
uint32_t TX_box_ID = 0;
|
||||
uint32_t RX_box_ID = 0;
|
||||
uint32_t BC_box_ID = 0;
|
||||
|
||||
|
||||
/* USER CODE END 0 */
|
||||
|
||||
CAN_HandleTypeDef hcan;
|
||||
|
||||
/* CAN init function */
|
||||
void MX_CAN_Init(void)
|
||||
{
|
||||
|
||||
/* USER CODE BEGIN CAN_Init 0 */
|
||||
|
||||
/* USER CODE END CAN_Init 0 */
|
||||
|
||||
/* USER CODE BEGIN CAN_Init 1 */
|
||||
|
||||
/* USER CODE END CAN_Init 1 */
|
||||
hcan.Instance = CAN1;
|
||||
hcan.Init.Prescaler = 10;
|
||||
hcan.Init.Mode = CAN_MODE_NORMAL;
|
||||
hcan.Init.SyncJumpWidth = CAN_SJW_1TQ;
|
||||
hcan.Init.TimeSeg1 = CAN_BS1_13TQ;
|
||||
hcan.Init.TimeSeg2 = CAN_BS2_2TQ;
|
||||
hcan.Init.TimeTriggeredMode = DISABLE;
|
||||
hcan.Init.AutoBusOff = DISABLE;
|
||||
hcan.Init.AutoWakeUp = DISABLE;
|
||||
hcan.Init.AutoRetransmission = DISABLE;
|
||||
hcan.Init.ReceiveFifoLocked = DISABLE;
|
||||
hcan.Init.TransmitFifoPriority = DISABLE;
|
||||
if (HAL_CAN_Init(&hcan) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
/* USER CODE BEGIN CAN_Init 2 */
|
||||
|
||||
CAN_filterConfig();
|
||||
|
||||
msgHeaderSend.StdId = 0x200;
|
||||
msgHeaderSend.ExtId = TX_box_ID;
|
||||
msgHeaderSend.DLC = 8;
|
||||
msgHeaderSend.TransmitGlobalTime = DISABLE;
|
||||
msgHeaderSend.RTR = CAN_RTR_DATA;
|
||||
msgHeaderSend.IDE = CAN_ID_EXT;
|
||||
|
||||
// CAN start
|
||||
if (HAL_CAN_Start(&hcan) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
// CAN notifications (interrupts)
|
||||
if (HAL_CAN_ActivateNotification(&hcan, CAN_IT_RX_FIFO0_MSG_PENDING | CAN_IT_TX_MAILBOX_EMPTY) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
/* USER CODE END CAN_Init 2 */
|
||||
|
||||
}
|
||||
|
||||
void HAL_CAN_MspInit(CAN_HandleTypeDef* canHandle)
|
||||
{
|
||||
|
||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||
if(canHandle->Instance==CAN1)
|
||||
{
|
||||
/* USER CODE BEGIN CAN1_MspInit 0 */
|
||||
|
||||
/* USER CODE END CAN1_MspInit 0 */
|
||||
/* CAN1 clock enable */
|
||||
__HAL_RCC_CAN1_CLK_ENABLE();
|
||||
|
||||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||
/**CAN GPIO Configuration
|
||||
PA11 ------> CAN_RX
|
||||
PA12 ------> CAN_TX
|
||||
*/
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_11;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_12;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
|
||||
/* CAN1 interrupt Init */
|
||||
HAL_NVIC_SetPriority(USB_HP_CAN1_TX_IRQn, 0, 0);
|
||||
HAL_NVIC_EnableIRQ(USB_HP_CAN1_TX_IRQn);
|
||||
HAL_NVIC_SetPriority(USB_LP_CAN1_RX0_IRQn, 0, 0);
|
||||
HAL_NVIC_EnableIRQ(USB_LP_CAN1_RX0_IRQn);
|
||||
/* USER CODE BEGIN CAN1_MspInit 1 */
|
||||
|
||||
/* USER CODE END CAN1_MspInit 1 */
|
||||
}
|
||||
}
|
||||
|
||||
void HAL_CAN_MspDeInit(CAN_HandleTypeDef* canHandle)
|
||||
{
|
||||
|
||||
if(canHandle->Instance==CAN1)
|
||||
{
|
||||
/* USER CODE BEGIN CAN1_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END CAN1_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_CAN1_CLK_DISABLE();
|
||||
|
||||
/**CAN GPIO Configuration
|
||||
PA11 ------> CAN_RX
|
||||
PA12 ------> CAN_TX
|
||||
*/
|
||||
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_11|GPIO_PIN_12);
|
||||
|
||||
/* CAN1 interrupt Deinit */
|
||||
HAL_NVIC_DisableIRQ(USB_HP_CAN1_TX_IRQn);
|
||||
HAL_NVIC_DisableIRQ(USB_LP_CAN1_RX0_IRQn);
|
||||
/* USER CODE BEGIN CAN1_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END CAN1_MspDeInit 1 */
|
||||
}
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN 1 */
|
||||
|
||||
void Setup_CAN_addr(uint8_t mode)
|
||||
{
|
||||
BC_box_ID = 0x1F<<20;
|
||||
RX_box_ID = mode<<20;
|
||||
TX_box_ID = RX_box_ID | (1L<<28);
|
||||
}
|
||||
|
||||
void CAN_filterConfig(void)
|
||||
{
|
||||
|
||||
sFilterConfig.FilterBank = 0;
|
||||
sFilterConfig.FilterMode = CAN_FILTERMODE_IDMASK;
|
||||
sFilterConfig.FilterScale = CAN_FILTERSCALE_32BIT;
|
||||
sFilterConfig.FilterIdHigh = 0x0000;
|
||||
sFilterConfig.FilterIdLow = 0x0000;
|
||||
sFilterConfig.FilterMaskIdHigh = 0x0000;
|
||||
sFilterConfig.FilterMaskIdLow = 0x0000;
|
||||
sFilterConfig.FilterFIFOAssignment = CAN_RX_FIFO0;
|
||||
sFilterConfig.FilterActivation = ENABLE;
|
||||
sFilterConfig.SlaveStartFilterBank = 14;
|
||||
|
||||
if (HAL_CAN_ConfigFilter(&hcan, &sFilterConfig) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
} }
|
||||
|
||||
void HAL_CAN_TxMailbox0CompleteCallback(CAN_HandleTypeDef *hcan)
|
||||
{
|
||||
// HAL_GPIO_TogglePin(LED_2_GPIO_Port, LED_2_Pin);
|
||||
}
|
||||
|
||||
|
||||
void HAL_CAN_RxFifo0MsgPendingCallback(CAN_HandleTypeDef *hcan_i)
|
||||
{
|
||||
CAN_RxHeaderTypeDef msgHeader;
|
||||
uint8_t msgData[8];
|
||||
|
||||
unsigned int adr,qua;
|
||||
unsigned short Data[4];
|
||||
|
||||
if (HAL_CAN_GetRxMessage(hcan_i, CAN_RX_FIFO0, &msgHeader, msgData) != HAL_OK)
|
||||
{
|
||||
/* Reception Error */
|
||||
Error_Handler();
|
||||
}
|
||||
|
||||
if((msgHeader.ExtId & 0xFF00000) != RX_box_ID)
|
||||
if((msgHeader.ExtId & 0xFF00000) != BC_box_ID) return;
|
||||
|
||||
adr = msgHeader.ExtId & 0xFFFF;
|
||||
qua = msgHeader.DLC/2;
|
||||
|
||||
Data[0] = msgData[0]; Data[0] = (Data[0]<<8) | msgData[1];
|
||||
Data[1] = msgData[2]; Data[1] = (Data[1]<<8) | msgData[3];
|
||||
Data[2] = msgData[4]; Data[2] = (Data[2]<<8) | msgData[5];
|
||||
Data[3] = msgData[6]; Data[3] = (Data[3]<<8) | msgData[7];
|
||||
|
||||
if(qua ) if(adr < Modbus_LEN) modbus[adr] = Data[0]; adr++;
|
||||
if(qua>1) if(adr < Modbus_LEN) modbus[adr] = Data[1]; adr++;
|
||||
if(qua>2) if(adr < Modbus_LEN) modbus[adr] = Data[2]; adr++;
|
||||
if(qua>3) if(adr < Modbus_LEN) modbus[adr] = Data[3];
|
||||
|
||||
LED_1_TGL;
|
||||
}
|
||||
|
||||
int CAN_send(uint16_t data[], int Addr, int Qua)
|
||||
{
|
||||
int wait = 1000;
|
||||
|
||||
while(wait-- && (HAL_CAN_GetTxMailboxesFreeLevel(&hcan) == 0));
|
||||
|
||||
if (HAL_CAN_GetTxMailboxesFreeLevel(&hcan) != 0)
|
||||
{
|
||||
msgHeaderSend.ExtId = TX_box_ID | (Addr & 0xFFFF);
|
||||
msgHeaderSend.DLC = Qua*2;
|
||||
|
||||
msgDataSend[0] = (data[Addr ]>>8) & 0x00ff;
|
||||
msgDataSend[1] = (data[Addr ] ) & 0x00ff;
|
||||
msgDataSend[2] = (data[Addr+1]>>8) & 0x00ff;
|
||||
msgDataSend[3] = (data[Addr+1] ) & 0x00ff;
|
||||
msgDataSend[4] = (data[Addr+2]>>8) & 0x00ff;
|
||||
msgDataSend[5] = (data[Addr+2] ) & 0x00ff;
|
||||
msgDataSend[6] = (data[Addr+3]>>8) & 0x00ff;
|
||||
msgDataSend[7] = (data[Addr+3] ) & 0x00ff;
|
||||
|
||||
HAL_CAN_AddTxMessage(&hcan, &msgHeaderSend, msgDataSend, &mailBoxNum);
|
||||
|
||||
LED_0_TGL;
|
||||
return 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
HAL_CAN_Stop(&hcan);
|
||||
HAL_CAN_Start(&hcan);
|
||||
return 0;
|
||||
} }
|
||||
|
||||
/* USER CODE END 1 */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
196
Core/Src/crc16.c
Normal file
196
Core/Src/crc16.c
Normal file
@@ -0,0 +1,196 @@
|
||||
#include "crc16.h"
|
||||
#define MAKE_TABS 0 /* Builds tables below */
|
||||
#define FAST_CRC 1 /* If fast CRC should be used */
|
||||
#define ONLY_CRC16 1
|
||||
|
||||
#define Poln 0xA001
|
||||
|
||||
|
||||
#if FAST_CRC & !MAKE_TABS
|
||||
|
||||
#if !ONLY_CRC16
|
||||
|
||||
static WORD crc_ccitt_tab[] = {
|
||||
0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50a5, 0x60c6, 0x70e7,
|
||||
0x8108, 0x9129, 0xa14a, 0xb16b, 0xc18c, 0xd1ad, 0xe1ce, 0xf1ef,
|
||||
0x1231, 0x0210, 0x3273, 0x2252, 0x52b5, 0x4294, 0x72f7, 0x62d6,
|
||||
0x9339, 0x8318, 0xb37b, 0xa35a, 0xd3bd, 0xc39c, 0xf3ff, 0xe3de,
|
||||
0x2462, 0x3443, 0x0420, 0x1401, 0x64e6, 0x74c7, 0x44a4, 0x5485,
|
||||
0xa56a, 0xb54b, 0x8528, 0x9509, 0xe5ee, 0xf5cf, 0xc5ac, 0xd58d,
|
||||
0x3653, 0x2672, 0x1611, 0x0630, 0x76d7, 0x66f6, 0x5695, 0x46b4,
|
||||
0xb75b, 0xa77a, 0x9719, 0x8738, 0xf7df, 0xe7fe, 0xd79d, 0xc7bc,
|
||||
0x48c4, 0x58e5, 0x6886, 0x78a7, 0x0840, 0x1861, 0x2802, 0x3823,
|
||||
0xc9cc, 0xd9ed, 0xe98e, 0xf9af, 0x8948, 0x9969, 0xa90a, 0xb92b,
|
||||
0x5af5, 0x4ad4, 0x7ab7, 0x6a96, 0x1a71, 0x0a50, 0x3a33, 0x2a12,
|
||||
0xdbfd, 0xcbdc, 0xfbbf, 0xeb9e, 0x9b79, 0x8b58, 0xbb3b, 0xab1a,
|
||||
0x6ca6, 0x7c87, 0x4ce4, 0x5cc5, 0x2c22, 0x3c03, 0x0c60, 0x1c41,
|
||||
0xedae, 0xfd8f, 0xcdec, 0xddcd, 0xad2a, 0xbd0b, 0x8d68, 0x9d49,
|
||||
0x7e97, 0x6eb6, 0x5ed5, 0x4ef4, 0x3e13, 0x2e32, 0x1e51, 0x0e70,
|
||||
0xff9f, 0xefbe, 0xdfdd, 0xcffc, 0xbf1b, 0xaf3a, 0x9f59, 0x8f78,
|
||||
0x9188, 0x81a9, 0xb1ca, 0xa1eb, 0xd10c, 0xc12d, 0xf14e, 0xe16f,
|
||||
0x1080, 0x00a1, 0x30c2, 0x20e3, 0x5004, 0x4025, 0x7046, 0x6067,
|
||||
0x83b9, 0x9398, 0xa3fb, 0xb3da, 0xc33d, 0xd31c, 0xe37f, 0xf35e,
|
||||
0x02b1, 0x1290, 0x22f3, 0x32d2, 0x4235, 0x5214, 0x6277, 0x7256,
|
||||
0xb5ea, 0xa5cb, 0x95a8, 0x8589, 0xf56e, 0xe54f, 0xd52c, 0xc50d,
|
||||
0x34e2, 0x24c3, 0x14a0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405,
|
||||
0xa7db, 0xb7fa, 0x8799, 0x97b8, 0xe75f, 0xf77e, 0xc71d, 0xd73c,
|
||||
0x26d3, 0x36f2, 0x0691, 0x16b0, 0x6657, 0x7676, 0x4615, 0x5634,
|
||||
0xd94c, 0xc96d, 0xf90e, 0xe92f, 0x99c8, 0x89e9, 0xb98a, 0xa9ab,
|
||||
0x5844, 0x4865, 0x7806, 0x6827, 0x18c0, 0x08e1, 0x3882, 0x28a3,
|
||||
0xcb7d, 0xdb5c, 0xeb3f, 0xfb1e, 0x8bf9, 0x9bd8, 0xabbb, 0xbb9a,
|
||||
0x4a75, 0x5a54, 0x6a37, 0x7a16, 0x0af1, 0x1ad0, 0x2ab3, 0x3a92,
|
||||
0xfd2e, 0xed0f, 0xdd6c, 0xcd4d, 0xbdaa, 0xad8b, 0x9de8, 0x8dc9,
|
||||
0x7c26, 0x6c07, 0x5c64, 0x4c45, 0x3ca2, 0x2c83, 0x1ce0, 0x0cc1,
|
||||
0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8,
|
||||
0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0
|
||||
};
|
||||
#endif
|
||||
|
||||
WORD crc_16_tab[] = {
|
||||
0x0000, 0xc0c1, 0xc181, 0x0140, 0xc301, 0x03c0, 0x0280, 0xc241,
|
||||
0xc601, 0x06c0, 0x0780, 0xc741, 0x0500, 0xc5c1, 0xc481, 0x0440,
|
||||
0xcc01, 0x0cc0, 0x0d80, 0xcd41, 0x0f00, 0xcfc1, 0xce81, 0x0e40,
|
||||
0x0a00, 0xcac1, 0xcb81, 0x0b40, 0xc901, 0x09c0, 0x0880, 0xc841,
|
||||
0xd801, 0x18c0, 0x1980, 0xd941, 0x1b00, 0xdbc1, 0xda81, 0x1a40,
|
||||
0x1e00, 0xdec1, 0xdf81, 0x1f40, 0xdd01, 0x1dc0, 0x1c80, 0xdc41,
|
||||
0x1400, 0xd4c1, 0xd581, 0x1540, 0xd701, 0x17c0, 0x1680, 0xd641,
|
||||
0xd201, 0x12c0, 0x1380, 0xd341, 0x1100, 0xd1c1, 0xd081, 0x1040,
|
||||
0xf001, 0x30c0, 0x3180, 0xf141, 0x3300, 0xf3c1, 0xf281, 0x3240,
|
||||
0x3600, 0xf6c1, 0xf781, 0x3740, 0xf501, 0x35c0, 0x3480, 0xf441,
|
||||
0x3c00, 0xfcc1, 0xfd81, 0x3d40, 0xff01, 0x3fc0, 0x3e80, 0xfe41,
|
||||
0xfa01, 0x3ac0, 0x3b80, 0xfb41, 0x3900, 0xf9c1, 0xf881, 0x3840,
|
||||
0x2800, 0xe8c1, 0xe981, 0x2940, 0xeb01, 0x2bc0, 0x2a80, 0xea41,
|
||||
0xee01, 0x2ec0, 0x2f80, 0xef41, 0x2d00, 0xedc1, 0xec81, 0x2c40,
|
||||
0xe401, 0x24c0, 0x2580, 0xe541, 0x2700, 0xe7c1, 0xe681, 0x2640,
|
||||
0x2200, 0xe2c1, 0xe381, 0x2340, 0xe101, 0x21c0, 0x2080, 0xe041,
|
||||
0xa001, 0x60c0, 0x6180, 0xa141, 0x6300, 0xa3c1, 0xa281, 0x6240,
|
||||
0x6600, 0xa6c1, 0xa781, 0x6740, 0xa501, 0x65c0, 0x6480, 0xa441,
|
||||
0x6c00, 0xacc1, 0xad81, 0x6d40, 0xaf01, 0x6fc0, 0x6e80, 0xae41,
|
||||
0xaa01, 0x6ac0, 0x6b80, 0xab41, 0x6900, 0xa9c1, 0xa881, 0x6840,
|
||||
0x7800, 0xb8c1, 0xb981, 0x7940, 0xbb01, 0x7bc0, 0x7a80, 0xba41,
|
||||
0xbe01, 0x7ec0, 0x7f80, 0xbf41, 0x7d00, 0xbdc1, 0xbc81, 0x7c40,
|
||||
0xb401, 0x74c0, 0x7580, 0xb541, 0x7700, 0xb7c1, 0xb681, 0x7640,
|
||||
0x7200, 0xb2c1, 0xb381, 0x7340, 0xb101, 0x71c0, 0x7080, 0xb041,
|
||||
0x5000, 0x90c1, 0x9181, 0x5140, 0x9301, 0x53c0, 0x5280, 0x9241,
|
||||
0x9601, 0x56c0, 0x5780, 0x9741, 0x5500, 0x95c1, 0x9481, 0x5440,
|
||||
0x9c01, 0x5cc0, 0x5d80, 0x9d41, 0x5f00, 0x9fc1, 0x9e81, 0x5e40,
|
||||
0x5a00, 0x9ac1, 0x9b81, 0x5b40, 0x9901, 0x59c0, 0x5880, 0x9841,
|
||||
0x8801, 0x48c0, 0x4980, 0x8941, 0x4b00, 0x8bc1, 0x8a81, 0x4a40,
|
||||
0x4e00, 0x8ec1, 0x8f81, 0x4f40, 0x8d01, 0x4dc0, 0x4c80, 0x8c41,
|
||||
0x4400, 0x84c1, 0x8581, 0x4540, 0x8701, 0x47c0, 0x4680, 0x8641,
|
||||
0x8201, 0x42c0, 0x4380, 0x8341, 0x4100, 0x81c1, 0x8081, 0x4040
|
||||
};
|
||||
#endif
|
||||
|
||||
|
||||
#if !ONLY_CRC16
|
||||
|
||||
/* CRC-CCITT is based on the polynomial x^16 + x^12 + x^5 + 1. Bits */
|
||||
/* are sent MSB to LSB. */
|
||||
unsigned int get_crc_ccitt(unsigned int crc,unsigned int *buf,unsigned long size )
|
||||
{
|
||||
#if !(FAST_CRC & !MAKE_TABS)
|
||||
register int i;
|
||||
#endif
|
||||
|
||||
while (size--) {
|
||||
#if FAST_CRC & !MAKE_TABS
|
||||
crc = (crc << 8) ^ crc_ccitt_tab[ (crc >> 8) ^ *buf++ ];
|
||||
#else
|
||||
crc ^= (WORD)(*buf++) << 8;
|
||||
for (i = 0; i < 8; i++) {
|
||||
if (crc & 0x8000)
|
||||
crc = (crc << 1) ^ 0x1021;
|
||||
else
|
||||
crc <<= 1;
|
||||
}
|
||||
#endif
|
||||
} return crc;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
/* CRC-16 is based on the polynomial x^16 + x^15 + x^2 + 1. Bits are */
|
||||
/* sent LSB to MSB. */
|
||||
unsigned int get_crc_16(unsigned int crc,unsigned int *buf,unsigned long size )
|
||||
{
|
||||
#if !(FAST_CRC & !MAKE_TABS)
|
||||
register unsigned int i;
|
||||
register unsigned int ch;
|
||||
#endif
|
||||
|
||||
while (size--) {
|
||||
#if FAST_CRC & !MAKE_TABS
|
||||
|
||||
crc = (crc >> 8) ^ crc_16_tab[ (crc ^ *buf++) & 0xff ];
|
||||
crc = crc & 0xffff;
|
||||
#else
|
||||
ch = *buf++;
|
||||
for (i = 0; i < 8; i++) {
|
||||
if ((crc ^ ch) & 1)
|
||||
crc = (crc >> 1) ^ 0xa001;
|
||||
else
|
||||
crc >>= 1;
|
||||
ch >>= 1;
|
||||
}
|
||||
#endif
|
||||
} return (crc & 0xffff);
|
||||
}
|
||||
|
||||
|
||||
|
||||
unsigned int get_crc_16b(unsigned int crc,unsigned int *buf,unsigned long size )
|
||||
{
|
||||
|
||||
unsigned int x, dword, byte;
|
||||
unsigned long i;
|
||||
|
||||
|
||||
|
||||
for (i = 0; i < size; i++)
|
||||
{
|
||||
x = i % 2;
|
||||
|
||||
dword = buf[i/2];
|
||||
// dword = *buf;
|
||||
|
||||
|
||||
if (x == 0)
|
||||
{
|
||||
byte = ((dword >> 8)&0xFF);
|
||||
}
|
||||
|
||||
if (x == 1)
|
||||
{
|
||||
byte = (dword & 0xFF);
|
||||
}
|
||||
|
||||
crc = (crc >> 8) ^ crc_16_tab[ (crc ^ (byte) ) & 0xff ];
|
||||
crc = crc & 0xffff;
|
||||
|
||||
// crc = crc + ((byte) & 0xff);
|
||||
|
||||
}
|
||||
|
||||
return (crc & 0xffff);
|
||||
}
|
||||
|
||||
int get_crc16(uint16_t *buf, int size )
|
||||
{
|
||||
int crc16,i,j;
|
||||
|
||||
crc16=0xFFFF;
|
||||
for(i=0;i<size;i++)
|
||||
{
|
||||
crc16=crc16^(buf[i]&0xFF);
|
||||
for (j=0;j<8;j++)
|
||||
if(crc16&1) crc16=(crc16>>1)^Poln;
|
||||
else crc16=crc16>>1;
|
||||
|
||||
crc16=crc16^((buf[i]>>8)&0xFF);
|
||||
for (j=0;j<8;j++)
|
||||
if(crc16&1) crc16=(crc16>>1)^Poln;
|
||||
else crc16=crc16>>1;
|
||||
}
|
||||
return crc16;
|
||||
}
|
||||
49
Core/Src/eeprom.c
Normal file
49
Core/Src/eeprom.c
Normal file
@@ -0,0 +1,49 @@
|
||||
#include "eeprom.h"
|
||||
|
||||
|
||||
void putIntoEeprom(uint16_t lenght, uint16_t* param)
|
||||
{
|
||||
uint32_t adr = FLASH_EEPROM_BASE;
|
||||
//uint32_t p = FLASH_STARTO;
|
||||
HAL_StatusTypeDef flash_ok = HAL_ERROR;
|
||||
|
||||
while(flash_ok != HAL_OK)
|
||||
{flash_ok = HAL_FLASH_Unlock();}
|
||||
|
||||
FLASH_EraseInitTypeDef erase;
|
||||
uint32_t pageError = 0x0;
|
||||
erase.TypeErase = FLASH_TYPEERASE_PAGES;
|
||||
erase.PageAddress = FLASH_EEPROM_BASE;
|
||||
erase.NbPages = 0x01;
|
||||
flash_ok = HAL_FLASHEx_Erase(&erase, &pageError);
|
||||
|
||||
flash_ok = HAL_ERROR;
|
||||
while(flash_ok != HAL_OK)
|
||||
{flash_ok = HAL_FLASH_Lock();}
|
||||
|
||||
|
||||
flash_ok = HAL_ERROR;
|
||||
while(flash_ok != HAL_OK)
|
||||
{flash_ok = HAL_FLASH_Unlock();}
|
||||
|
||||
flash_ok = HAL_ERROR;
|
||||
while(flash_ok != HAL_OK)
|
||||
{
|
||||
for(int i=0; i<(lenght); i++)
|
||||
{
|
||||
flash_ok = HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD, adr, *param);
|
||||
param++;
|
||||
adr += 0x2;
|
||||
}
|
||||
}
|
||||
|
||||
flash_ok = HAL_ERROR;
|
||||
while(flash_ok != HAL_OK)
|
||||
{flash_ok = HAL_FLASH_Lock();}
|
||||
}
|
||||
|
||||
uint16_t watInTheFlash(uint32_t adress)
|
||||
{
|
||||
return (*(uint32_t*) adress);
|
||||
}
|
||||
|
||||
95
Core/Src/gpio.c
Normal file
95
Core/Src/gpio.c
Normal file
@@ -0,0 +1,95 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file gpio.c
|
||||
* @brief This file provides code for the configuration
|
||||
* of all used GPIO pins.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2025 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "gpio.h"
|
||||
|
||||
/* USER CODE BEGIN 0 */
|
||||
|
||||
/* USER CODE END 0 */
|
||||
|
||||
/*----------------------------------------------------------------------------*/
|
||||
/* Configure GPIO */
|
||||
/*----------------------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN 1 */
|
||||
|
||||
/* USER CODE END 1 */
|
||||
|
||||
/** Configure pins
|
||||
PA8 ------> RCC_MCO
|
||||
*/
|
||||
void MX_GPIO_Init(void)
|
||||
{
|
||||
|
||||
GPIO_InitTypeDef GPIO_InitStruct = {0};
|
||||
|
||||
/* GPIO Ports Clock Enable */
|
||||
__HAL_RCC_GPIOC_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOD_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOA_CLK_ENABLE();
|
||||
__HAL_RCC_GPIOB_CLK_ENABLE();
|
||||
|
||||
// INPUT C
|
||||
GPIO_InitStruct.Pin = IN_06_Pin|Jselect_Pin|IN_05_Pin|J2_Pin|J3_Pin;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
||||
|
||||
// OUTPUT C
|
||||
GPIO_InitStruct.Pin = LED2_Pin|LED3_Pin|PVT4_Pin|PVT3_Pin|PVT2_Pin|PVT1_Pin;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
|
||||
|
||||
// INPUT A
|
||||
GPIO_InitStruct.Pin = IN_04_Pin|IN_03_Pin|IN_02_Pin|IN_01_Pin|IN_14_Pin|IN_13_Pin|J0_Pin|J1_Pin;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
|
||||
// INPUT B
|
||||
GPIO_InitStruct.Pin = IN_12_Pin|IN_11_Pin|IN_10_Pin|IN_09_Pin|IN_08_Pin|IN_07_Pin;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||
|
||||
// OUTPUT B
|
||||
GPIO_InitStruct.Pin = LED0_Pin|LED1_Pin;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
|
||||
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
|
||||
|
||||
/*Configure GPIO pin : PA8 */
|
||||
GPIO_InitStruct.Pin = GPIO_PIN_8;
|
||||
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
|
||||
|
||||
/*Configure peripheral I/O remapping */
|
||||
__HAL_AFIO_REMAP_PD01_ENABLE();
|
||||
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN 2 */
|
||||
|
||||
/* USER CODE END 2 */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
85
Core/Src/lampa.c
Normal file
85
Core/Src/lampa.c
Normal file
@@ -0,0 +1,85 @@
|
||||
|
||||
#include "gpio.h"
|
||||
#include "lampa.h"
|
||||
#include "struc.h"
|
||||
#include "message.h"
|
||||
#include "package.h"
|
||||
|
||||
void ReadEnteres(void)
|
||||
{
|
||||
WORDE input;
|
||||
|
||||
input.bit.bit0 = !IN_06; // Контроль ИП1 (питание управляющего контроллера)
|
||||
input.bit.bit1 = !IN_05; // Контроль ИП2 (питание периферийных устройств)
|
||||
input.bit.bit2 = !IN_04; // Контроль ИП3 (питание эл. замков, ламп освещения, УКСИ)
|
||||
input.bit.bit3 = !IN_03; // Контроль ИП4 (питание датчиков тока и напряжения +)
|
||||
input.bit.bit4 = !IN_02; // Контроль ИП5 (питание датчиков тока и напряжения –)
|
||||
input.bit.bit5 = !IN_01; // Контроль ИП6 (питание драйверов)
|
||||
|
||||
input.bit.bit6 = !IN_07; // Контроль 3х фазного 380 В
|
||||
input.bit.bit7 = !IN_08; // Заряд накопителя
|
||||
input.bit.bit8 = !IN_09; // Разряд накопителя
|
||||
input.bit.bit9 = IN_10; // Авария в сети 24 В
|
||||
|
||||
input.bit.bitD = (Squazh_U[3] > Squazh_L[3]);
|
||||
input.bit.bitC = (Squazh_U[2] > Squazh_L[2]);
|
||||
input.bit.bitB = (Squazh_U[1] > Squazh_L[1]);
|
||||
input.bit.bitA = (Squazh_U[0] > Squazh_L[0]);
|
||||
/*
|
||||
input.bit.bitA = !IN_11; // Контроль питания ЛСУ
|
||||
input.bit.bitB = !IN_12; // Контроль питания СВО
|
||||
input.bit.bitC = !IN_13; // резерв
|
||||
input.bit.bitD = !IN_14; // Контроль питания СКК
|
||||
*/
|
||||
Inputs.all = input.all;
|
||||
Alarms.all = ~Inputs.all & Alarm_mask.all;
|
||||
Alarms.bit.bit7 = 0; // Заряд накопителя
|
||||
Alarms.bit.bit8 = Inputs.bit.bit8; // Разряд накопителя
|
||||
Alarms.bit.bit9 = Inputs.bit.bit9; // Авария в сети 24 В
|
||||
Errors.all = ~Inputs.all & Error_mask.all;
|
||||
Errors.bit.bit9 = Inputs.bit.bit9; // Авария в сети 24 В
|
||||
}
|
||||
|
||||
uint16_t ReadJumpers(void)
|
||||
{
|
||||
WORDE input;
|
||||
|
||||
input.all = 0;
|
||||
|
||||
input.bit.bit0 = !J0;
|
||||
input.bit.bit1 = !J1;
|
||||
input.bit.bit2 = !J2;
|
||||
input.bit.bit3 = !J3;
|
||||
|
||||
return input.all;
|
||||
}
|
||||
|
||||
uint16_t TestJumper(void)
|
||||
{
|
||||
return !Jselect;
|
||||
}
|
||||
|
||||
void ReadSeanus(void)
|
||||
{
|
||||
static uint32_t cownt=0;
|
||||
static uint32_t sum_u[4]={0,0,0,0};
|
||||
// static float flt_u[4]={0,0,0,0};
|
||||
uint8_t i;
|
||||
|
||||
sum_u[0] += !IN_11;
|
||||
sum_u[1] += !IN_12;
|
||||
sum_u[2] += !IN_13;
|
||||
sum_u[3] += !IN_14;
|
||||
|
||||
if(++cownt>=10000)
|
||||
{
|
||||
cownt=0;
|
||||
|
||||
for(i=0;i<4;i++)
|
||||
{
|
||||
// flt_u[i] +=((float)sum_u[i]-flt_u[i])/10+1;
|
||||
Squazh_U[i]=sum_u[i]/100;
|
||||
sum_u[i] = 0;
|
||||
} } }
|
||||
|
||||
|
||||
416
Core/Src/main.c
Normal file
416
Core/Src/main.c
Normal file
@@ -0,0 +1,416 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file : main.c
|
||||
* @brief : Main program body
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2022 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "main.h"
|
||||
#include "can.h"
|
||||
#include "tim.h"
|
||||
#include "gpio.h"
|
||||
|
||||
/* Private includes ----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Includes */
|
||||
|
||||
#include "package.h"
|
||||
#include "message.h"
|
||||
#include "lampa.h"
|
||||
|
||||
/* USER CODE END Includes */
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PTD */
|
||||
|
||||
/* USER CODE END PTD */
|
||||
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PD */
|
||||
/* USER CODE END PD */
|
||||
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PM */
|
||||
|
||||
/* USER CODE END PM */
|
||||
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
|
||||
/* USER CODE BEGIN PV */
|
||||
|
||||
static long Falling_asleep;
|
||||
int CanGO=0;
|
||||
|
||||
/* USER CODE END PV */
|
||||
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
void SystemClock_Config(void);
|
||||
/* USER CODE BEGIN PFP */
|
||||
|
||||
/* USER CODE END PFP */
|
||||
|
||||
/* Private user code ---------------------------------------------------------*/
|
||||
/* USER CODE BEGIN 0 */
|
||||
|
||||
int Isit(int num, int i)
|
||||
{
|
||||
int res, pls;
|
||||
|
||||
if((num<0)||(num>=0x80)) return 0;
|
||||
res = Maska[0][num/0x10]; if(i)
|
||||
res|= Maska[1][num/0x10];
|
||||
res &= (1<<(num&0x0F));
|
||||
pls = (espero[num]>CanRestart[i]/3);
|
||||
pls = pls || county[num];
|
||||
res = res && pls;
|
||||
|
||||
return res;
|
||||
}
|
||||
|
||||
/* USER CODE END 0 */
|
||||
|
||||
/**
|
||||
* @brief The application entry point.
|
||||
* @retval int
|
||||
*/
|
||||
int main(void)
|
||||
{
|
||||
/* USER CODE BEGIN 1 */
|
||||
|
||||
int i,j,n,mask,qua;
|
||||
static int cancount[2]={1,2},cancell[2]={0,0},candid[2]={0,0};
|
||||
static unsigned int masca[8];
|
||||
|
||||
/* USER CODE END 1 */
|
||||
|
||||
/* MCU Configuration--------------------------------------------------------*/
|
||||
|
||||
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
|
||||
HAL_Init();
|
||||
|
||||
/* USER CODE BEGIN Init */
|
||||
|
||||
/* USER CODE END Init */
|
||||
|
||||
/* Configure the system clock */
|
||||
SystemClock_Config();
|
||||
|
||||
/* USER CODE BEGIN SysInit */
|
||||
|
||||
/* USER CODE END SysInit */
|
||||
|
||||
/* Initialize all configured peripherals */
|
||||
MX_GPIO_Init();
|
||||
MX_CAN_Init();
|
||||
MX_TIM4_Init();
|
||||
/* USER CODE BEGIN 2 */
|
||||
|
||||
Mode = ReadJumpers();
|
||||
Setup_CAN_addr(Mode);
|
||||
LastMode = Mode;
|
||||
Load_params();
|
||||
|
||||
/* USER CODE END 2 */
|
||||
|
||||
/* Infinite loop */
|
||||
/* USER CODE BEGIN WHILE */
|
||||
while (1)
|
||||
{
|
||||
if( CanGO)
|
||||
{ CanGO=0;
|
||||
|
||||
for(i=0;i<0x80;i++)
|
||||
if(espero[i]<30000) espero[i]++;
|
||||
|
||||
for(i=0;i<2;i++)
|
||||
if(cancount[i]) cancount[i]--;
|
||||
}
|
||||
|
||||
for(i=0;i<2;i++)
|
||||
if( Cancount[i])
|
||||
if(!cancount[i])
|
||||
{
|
||||
while(1)
|
||||
{
|
||||
if( cancell[i]>= 0x80)
|
||||
{ cancell[i]=0;
|
||||
|
||||
if( candid[i])
|
||||
{ candid[i]=0;
|
||||
CanCycle[i]++;
|
||||
cancount[i] = CanWait[i];
|
||||
continue;
|
||||
} }
|
||||
|
||||
mask = Maska[i][cancell[i]/0x10] >> (cancell[i]&0x0F);
|
||||
if(!mask) cancell[i] = (cancell[i] + 0x10) & 0xFFF0 ;
|
||||
else
|
||||
{
|
||||
while(!(mask & 1))
|
||||
{
|
||||
cancell[i]++; mask >>= 1;
|
||||
}
|
||||
break;
|
||||
} }
|
||||
|
||||
|
||||
if(espero[cancell[i]]>CanRestart[i])
|
||||
county[cancell[i]]=1;
|
||||
|
||||
if(modbus[cancell[i]] != archiv[cancell[i]])
|
||||
|
||||
county[cancell[i]] = (cancell[i]==keys) ? CanRepeat:1;
|
||||
|
||||
if (county[cancell[i]])
|
||||
{
|
||||
for(j= 3; j>0 && !Isit(cancell[i]+j,i); j--);
|
||||
for(n=j-3; n<0 && !Isit(cancell[i]+n,i); n++);
|
||||
|
||||
qua = 1 + j - n;
|
||||
cancell[i]+= n;
|
||||
|
||||
for(j=0;j<qua;j++)
|
||||
{
|
||||
n=cancell[i]+j;
|
||||
|
||||
archiv[n]= modbus[n]; espero[n]= 0;
|
||||
if( county[n])
|
||||
{ county[n]--;
|
||||
if(!county[n] && n != cancyclo+i) candid[i]=1;
|
||||
}
|
||||
if(!county[n]) masca[n/0x10] |= (1<<(n&0x0F));
|
||||
}
|
||||
|
||||
CAN_send(archiv,cancell[i],qua);
|
||||
|
||||
cancount[i] = Cancount[i];
|
||||
cancell[i]+=qua;
|
||||
|
||||
for(j=0;j<8;j++)
|
||||
if((masca[j] & Maska[i][j]) != Maska[i][j]) break;
|
||||
if(j==8)
|
||||
{
|
||||
for(j=0;j<8;j++) masca[j]&=~Maska[i][j];
|
||||
CanRound[i]++;
|
||||
}
|
||||
|
||||
if(!cancount[!i])
|
||||
cancount[!i]=1; // ????? ?? ?????
|
||||
}
|
||||
else cancell[i]++;
|
||||
}
|
||||
|
||||
ReadEnteres();
|
||||
|
||||
// ReadSeanus();
|
||||
|
||||
if(Alarms.all) Pvt4_OFF; // ñèãíàë "Ñèñòåìà ÂÝÏ â íîðìå"
|
||||
else Pvt4_ON;
|
||||
|
||||
if(Errors.all) Pvt3_ON; // ñèãíàë "Àâàðèÿ ñèñòåìû ÂÝÏ"
|
||||
else Pvt3_OFF;
|
||||
|
||||
if(Inputs.bit.bit9) Pvt2_OFF; // ?????? ? ???? 24 ?
|
||||
else Pvt2_ON; // ?????? "?????????? ????? 24?"
|
||||
|
||||
if (Falling_asleep) Pvt2_ON; // Ïîêà íå ñïèì, ýòî çàìêíóòî
|
||||
else Pvt2_OFF; // ñèãíàë "Óïðàâëåíèå ñåòüþ 24Â"
|
||||
|
||||
|
||||
if(cDefParam)
|
||||
{
|
||||
cDefParam=0;
|
||||
Default_params();
|
||||
}
|
||||
|
||||
if(cSaveParam)
|
||||
{
|
||||
cSaveParam=0;
|
||||
Save_params();
|
||||
}
|
||||
|
||||
if(cLoadParam)
|
||||
{
|
||||
cLoadParam=0;
|
||||
Load_params();
|
||||
} } }
|
||||
|
||||
/* USER CODE END WHILE */
|
||||
|
||||
/* USER CODE BEGIN 3 */
|
||||
|
||||
void Millisecond()
|
||||
{
|
||||
static int CanPowse;
|
||||
|
||||
static unsigned int
|
||||
count_blink=0, count_bright=0, count_mode,
|
||||
blink_over, blink_alarm, power_lamp, work_diod, norm_diod;
|
||||
static int preTest;
|
||||
int TST;
|
||||
|
||||
#define CANPOWSE 10 // 10 msec
|
||||
#define BLINK_TIME 250 // .25 sec
|
||||
|
||||
// ReadSeanus();
|
||||
|
||||
Jumpers.byt.byte_1 = ReadJumpers();
|
||||
Jumpers.bit.bit0 = TestJumper();
|
||||
Buttons.bit.bit0 = TestJumper();
|
||||
|
||||
if(++CanPowse >= CANPOWSE)
|
||||
{
|
||||
CanPowse = 0; CanGO = 1;
|
||||
}
|
||||
|
||||
if(Alarms.bit.bit8) // Ðàçðÿä áàòàðåè
|
||||
{
|
||||
if (Falling_asleep) Falling_asleep--;
|
||||
}
|
||||
else Falling_asleep = 1000L * Sleep_time;
|
||||
|
||||
if(work_diod) LED_2_ON;
|
||||
else LED_2_OFF;
|
||||
|
||||
if(norm_diod) LED_3_ON;
|
||||
else LED_3_OFF;
|
||||
|
||||
TST = TestJumper() | cTestLamp;
|
||||
|
||||
if(++count_bright == 10) //maximum_bright
|
||||
{ count_bright = 0 ;
|
||||
|
||||
if(power_lamp) Pvt1_ON;
|
||||
else Pvt1_OFF;
|
||||
}
|
||||
|
||||
if(count_bright >= Brightness)
|
||||
if(!TST) Pvt1_OFF; //îòêëþ÷åíèå ëàìïî÷êè
|
||||
|
||||
if(TST & !preTest)
|
||||
{
|
||||
count_blink = BLINK_TIME;
|
||||
count_mode = 0;
|
||||
}
|
||||
preTest = TST;
|
||||
|
||||
if(++count_blink >= BLINK_TIME)
|
||||
{
|
||||
count_blink=0;
|
||||
count_mode++;
|
||||
blink_over = (count_mode & 1)?1:0;
|
||||
blink_alarm = (count_mode & 7)?1:0;
|
||||
}
|
||||
|
||||
power_lamp= 1;
|
||||
norm_diod= 1;
|
||||
work_diod = 1;
|
||||
|
||||
if(TST)
|
||||
{
|
||||
power_lamp= blink_over;
|
||||
norm_diod= blink_over;
|
||||
work_diod= !blink_over;
|
||||
}
|
||||
else
|
||||
{
|
||||
if(Alarms.all)
|
||||
{
|
||||
norm_diod= blink_alarm;
|
||||
power_lamp=blink_alarm;
|
||||
}
|
||||
if(Errors.all)
|
||||
{
|
||||
power_lamp= blink_over;
|
||||
norm_diod= blink_over;
|
||||
} }
|
||||
/* USER CODE END 3 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief System Clock Configuration
|
||||
* @retval None
|
||||
*/
|
||||
void SystemClock_Config(void)
|
||||
{
|
||||
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
|
||||
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
|
||||
|
||||
/** Initializes the RCC Oscillators according to the specified parameters
|
||||
* in the RCC_OscInitTypeDef structure.
|
||||
*/
|
||||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
|
||||
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
|
||||
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
|
||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI_DIV2;
|
||||
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL10;
|
||||
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
/** Initializes the CPU, AHB and APB buses clocks
|
||||
*/
|
||||
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|
||||
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
|
||||
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
||||
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
|
||||
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
|
||||
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
|
||||
|
||||
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
HAL_RCC_MCOConfig(RCC_MCO, RCC_MCO1SOURCE_SYSCLK, RCC_MCODIV_1);
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN 4 */
|
||||
|
||||
/* USER CODE END 4 */
|
||||
|
||||
/**
|
||||
* @brief This function is executed in case of error occurrence.
|
||||
* @retval None
|
||||
*/
|
||||
void Error_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN Error_Handler_Debug */
|
||||
/* User can add his own implementation to report the HAL error return state */
|
||||
__disable_irq();
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
/* USER CODE END Error_Handler_Debug */
|
||||
}
|
||||
|
||||
#ifdef USE_FULL_ASSERT
|
||||
/**
|
||||
* @brief Reports the name of the source file and the source line number
|
||||
* where the assert_param error has occurred.
|
||||
* @param file: pointer to the source file name
|
||||
* @param line: assert_param error line source number
|
||||
* @retval None
|
||||
*/
|
||||
void assert_failed(uint8_t *file, uint32_t line)
|
||||
{
|
||||
/* USER CODE BEGIN 6 */
|
||||
/* User can add his own implementation to report the file name and line number,
|
||||
ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
|
||||
/* USER CODE END 6 */
|
||||
}
|
||||
#endif /* USE_FULL_ASSERT */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
132
Core/Src/message.c
Normal file
132
Core/Src/message.c
Normal file
@@ -0,0 +1,132 @@
|
||||
#include "stm32f1xx_hal.h"
|
||||
|
||||
#include "struc.h"
|
||||
#include "crc16.h"
|
||||
#include "package.h"
|
||||
#include "message.h"
|
||||
#include "eeprom.h"
|
||||
|
||||
uint16_t params[Modbus_LEN+1],
|
||||
modbus[Modbus_LEN],
|
||||
archiv[Modbus_LEN],
|
||||
county[Modbus_LEN],
|
||||
espero[Modbus_LEN];
|
||||
|
||||
uint16_t Mode;
|
||||
|
||||
LONGE* outputs;
|
||||
|
||||
void Init_packMask(void);
|
||||
|
||||
uint16_t Maska[2][8];
|
||||
|
||||
void Default_params()
|
||||
{
|
||||
unsigned int i;
|
||||
|
||||
for(i=0;i<Modbus_LEN;i++)
|
||||
{
|
||||
modbus[i] = 0;
|
||||
}
|
||||
|
||||
Alarm_mask.all = 0x3FFF;
|
||||
Alarm_mask.bit.bit7 = 0; // Заряд накопителя
|
||||
Alarm_mask.bit.bitC = 0; // резерв
|
||||
|
||||
Error_mask.all = 0;
|
||||
Error_mask.bit.bit9 = 1; // Авария в сети 24 В
|
||||
|
||||
for(i=0;i<4;i++)
|
||||
Squazh_L[i] = 90;
|
||||
|
||||
LastMode = Mode;
|
||||
|
||||
Sleep_time = 60; // минута чтобы отклюиться
|
||||
|
||||
Cancount[m_FAST] = 5; // * 10msec, пауза между посылками CAN
|
||||
Cancount[m_SLOW] = 100; // * 10msec, пауза между посылками CAN
|
||||
|
||||
CanWait[m_FAST] = 1; // * 10msec, пауза после цикла
|
||||
CanWait[m_SLOW] = 1; // * 10msec, пауза после цикла
|
||||
|
||||
CanRestart[m_FAST] = 500; // * 10msec, перезапуск посылки
|
||||
CanRestart[m_SLOW] = 1000; // * 10msec, перезапуск посылки
|
||||
|
||||
CanRepeat = 3; // сколько раз повторять надо
|
||||
|
||||
Brightness = 9;
|
||||
|
||||
Protokol = PROTOKOL;
|
||||
}
|
||||
|
||||
void Load_params()
|
||||
{
|
||||
unsigned int i,crc;
|
||||
unsigned int adr = FLASH_EEPROM_BASE;
|
||||
|
||||
for(int j=0; j<Modbus_LEN+1; j+=1)
|
||||
{
|
||||
params[j] = watInTheFlash(adr) & 0xFFFF;
|
||||
adr += 0x2;
|
||||
}
|
||||
crc = get_crc16(params,Modbus_LEN);
|
||||
if( (crc==params[Modbus_LEN]) &&
|
||||
(crc !=0xFFFF) &&
|
||||
(Mode == params[126]))
|
||||
{
|
||||
for(i=0;i<Modbus_LEN;i++) modbus[i] = params[i];
|
||||
Commands=0;
|
||||
}
|
||||
else
|
||||
{
|
||||
Default_params();
|
||||
Save_params();
|
||||
}
|
||||
|
||||
Init_packMask();
|
||||
}
|
||||
|
||||
void Save_params()
|
||||
{
|
||||
unsigned int i,dif=0;
|
||||
|
||||
for(i=0;i<Modbus_LEN;i++)
|
||||
if(params[i] != modbus[i])
|
||||
{
|
||||
params[i] = modbus[i];
|
||||
dif=1;
|
||||
}
|
||||
if(dif)
|
||||
{
|
||||
params[Modbus_LEN] = get_crc16(params,Modbus_LEN);
|
||||
putIntoEeprom(Modbus_LEN+1, params);
|
||||
} }
|
||||
|
||||
void Init_packMask()
|
||||
{
|
||||
int i;
|
||||
|
||||
for(i=0;i<8;i++)
|
||||
{
|
||||
Maska[m_FAST][i] = 0;
|
||||
Maska[m_SLOW][i] = 0;
|
||||
}
|
||||
|
||||
Maska[m_FAST][0]|= 0x0007; // Дискретные входы, неисправности и аварии
|
||||
|
||||
Maska[m_SLOW][0]|= 0x0300; // Маски на неисправности и аварии
|
||||
Maska[m_SLOW][1]|= 0x0003; // Состояние джамперов
|
||||
Maska[m_SLOW][2]|= 0x000F; // Скважность датчика напряжения
|
||||
Maska[m_SLOW][3]|= 0x000F; // Аварийная уставка скважности
|
||||
Maska[m_SLOW][4]|= 0x0100; // Время автоматического отключения
|
||||
|
||||
Maska[m_SLOW][6]|= 0x0007; // Яркость ламп и периоды посылок
|
||||
Maska[m_SLOW][7]|= 0xE000; // Адрес, команды, и чтоб не вылазило
|
||||
|
||||
Maska[m_SLOW][6]|= 0x017F; // Яркость лампы и периоды посылок
|
||||
Maska[m_FAST][7]|= 0x0100; // Счетчик посылок
|
||||
Maska[m_SLOW][7]|= 0x0E00; // Счетчик посылок
|
||||
Maska[m_SLOW][7]|= 0xE000; // Протокол, адрес, команды
|
||||
}
|
||||
|
||||
|
||||
88
Core/Src/stm32f1xx_hal_msp.c
Normal file
88
Core/Src/stm32f1xx_hal_msp.c
Normal file
@@ -0,0 +1,88 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f1xx_hal_msp.c
|
||||
* @brief This file provides code for the MSP Initialization
|
||||
* and de-Initialization codes.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2022 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "main.h"
|
||||
/* USER CODE BEGIN Includes */
|
||||
|
||||
/* USER CODE END Includes */
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN TD */
|
||||
|
||||
/* USER CODE END TD */
|
||||
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Define */
|
||||
|
||||
/* USER CODE END Define */
|
||||
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Macro */
|
||||
|
||||
/* USER CODE END Macro */
|
||||
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PV */
|
||||
|
||||
/* USER CODE END PV */
|
||||
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* USER CODE BEGIN PFP */
|
||||
|
||||
/* USER CODE END PFP */
|
||||
|
||||
/* External functions --------------------------------------------------------*/
|
||||
/* USER CODE BEGIN ExternalFunctions */
|
||||
|
||||
/* USER CODE END ExternalFunctions */
|
||||
|
||||
/* USER CODE BEGIN 0 */
|
||||
|
||||
/* USER CODE END 0 */
|
||||
/**
|
||||
* Initializes the Global MSP.
|
||||
*/
|
||||
void HAL_MspInit(void)
|
||||
{
|
||||
/* USER CODE BEGIN MspInit 0 */
|
||||
|
||||
/* USER CODE END MspInit 0 */
|
||||
|
||||
__HAL_RCC_AFIO_CLK_ENABLE();
|
||||
__HAL_RCC_PWR_CLK_ENABLE();
|
||||
|
||||
/* System interrupt init*/
|
||||
|
||||
/** ENABLE: Full SWJ (JTAG-DP + SW-DP): Reset State
|
||||
*/
|
||||
__HAL_AFIO_REMAP_SWJ_ENABLE();
|
||||
|
||||
/* USER CODE BEGIN MspInit 1 */
|
||||
|
||||
/* USER CODE END MspInit 1 */
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN 1 */
|
||||
|
||||
/* USER CODE END 1 */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
248
Core/Src/stm32f1xx_it.c
Normal file
248
Core/Src/stm32f1xx_it.c
Normal file
@@ -0,0 +1,248 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f1xx_it.c
|
||||
* @brief Interrupt Service Routines.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2022 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "main.h"
|
||||
#include "stm32f1xx_it.h"
|
||||
/* Private includes ----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Includes */
|
||||
/* USER CODE END Includes */
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN TD */
|
||||
|
||||
/* USER CODE END TD */
|
||||
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PD */
|
||||
|
||||
/* USER CODE END PD */
|
||||
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PM */
|
||||
|
||||
/* USER CODE END PM */
|
||||
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PV */
|
||||
|
||||
/* USER CODE END PV */
|
||||
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* USER CODE BEGIN PFP */
|
||||
|
||||
/* USER CODE END PFP */
|
||||
|
||||
/* Private user code ---------------------------------------------------------*/
|
||||
/* USER CODE BEGIN 0 */
|
||||
|
||||
/* USER CODE END 0 */
|
||||
|
||||
/* External variables --------------------------------------------------------*/
|
||||
extern CAN_HandleTypeDef hcan;
|
||||
extern TIM_HandleTypeDef htim4;
|
||||
/* USER CODE BEGIN EV */
|
||||
|
||||
/* USER CODE END EV */
|
||||
|
||||
/******************************************************************************/
|
||||
/* Cortex-M3 Processor Interruption and Exception Handlers */
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* @brief This function handles Non maskable interrupt.
|
||||
*/
|
||||
void NMI_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
|
||||
|
||||
/* USER CODE END NonMaskableInt_IRQn 0 */
|
||||
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
/* USER CODE END NonMaskableInt_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Hard fault interrupt.
|
||||
*/
|
||||
void HardFault_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN HardFault_IRQn 0 */
|
||||
|
||||
/* USER CODE END HardFault_IRQn 0 */
|
||||
while (1)
|
||||
{
|
||||
/* USER CODE BEGIN W1_HardFault_IRQn 0 */
|
||||
/* USER CODE END W1_HardFault_IRQn 0 */
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Memory management fault.
|
||||
*/
|
||||
void MemManage_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
|
||||
|
||||
/* USER CODE END MemoryManagement_IRQn 0 */
|
||||
while (1)
|
||||
{
|
||||
/* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
|
||||
/* USER CODE END W1_MemoryManagement_IRQn 0 */
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Prefetch fault, memory access fault.
|
||||
*/
|
||||
void BusFault_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN BusFault_IRQn 0 */
|
||||
|
||||
/* USER CODE END BusFault_IRQn 0 */
|
||||
while (1)
|
||||
{
|
||||
/* USER CODE BEGIN W1_BusFault_IRQn 0 */
|
||||
/* USER CODE END W1_BusFault_IRQn 0 */
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Undefined instruction or illegal state.
|
||||
*/
|
||||
void UsageFault_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN UsageFault_IRQn 0 */
|
||||
|
||||
/* USER CODE END UsageFault_IRQn 0 */
|
||||
while (1)
|
||||
{
|
||||
/* USER CODE BEGIN W1_UsageFault_IRQn 0 */
|
||||
/* USER CODE END W1_UsageFault_IRQn 0 */
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles System service call via SWI instruction.
|
||||
*/
|
||||
void SVC_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN SVCall_IRQn 0 */
|
||||
|
||||
/* USER CODE END SVCall_IRQn 0 */
|
||||
/* USER CODE BEGIN SVCall_IRQn 1 */
|
||||
|
||||
/* USER CODE END SVCall_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Debug monitor.
|
||||
*/
|
||||
void DebugMon_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN DebugMonitor_IRQn 0 */
|
||||
|
||||
/* USER CODE END DebugMonitor_IRQn 0 */
|
||||
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
|
||||
|
||||
/* USER CODE END DebugMonitor_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Pendable request for system service.
|
||||
*/
|
||||
void PendSV_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN PendSV_IRQn 0 */
|
||||
|
||||
/* USER CODE END PendSV_IRQn 0 */
|
||||
/* USER CODE BEGIN PendSV_IRQn 1 */
|
||||
|
||||
/* USER CODE END PendSV_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles System tick timer.
|
||||
*/
|
||||
void SysTick_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN SysTick_IRQn 0 */
|
||||
|
||||
/* USER CODE END SysTick_IRQn 0 */
|
||||
HAL_IncTick();
|
||||
/* USER CODE BEGIN SysTick_IRQn 1 */
|
||||
Millisecond();
|
||||
/* USER CODE END SysTick_IRQn 1 */
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/* STM32F1xx Peripheral Interrupt Handlers */
|
||||
/* Add here the Interrupt Handlers for the used peripherals. */
|
||||
/* For the available peripheral interrupt handler names, */
|
||||
/* please refer to the startup file (startup_stm32f1xx.s). */
|
||||
/******************************************************************************/
|
||||
|
||||
/**
|
||||
* @brief This function handles USB high priority or CAN TX interrupts.
|
||||
*/
|
||||
void USB_HP_CAN1_TX_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN USB_HP_CAN1_TX_IRQn 0 */
|
||||
|
||||
/* USER CODE END USB_HP_CAN1_TX_IRQn 0 */
|
||||
HAL_CAN_IRQHandler(&hcan);
|
||||
/* USER CODE BEGIN USB_HP_CAN1_TX_IRQn 1 */
|
||||
|
||||
/* USER CODE END USB_HP_CAN1_TX_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles USB low priority or CAN RX0 interrupts.
|
||||
*/
|
||||
void USB_LP_CAN1_RX0_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN USB_LP_CAN1_RX0_IRQn 0 */
|
||||
|
||||
/* USER CODE END USB_LP_CAN1_RX0_IRQn 0 */
|
||||
HAL_CAN_IRQHandler(&hcan);
|
||||
/* USER CODE BEGIN USB_LP_CAN1_RX0_IRQn 1 */
|
||||
|
||||
/* USER CODE END USB_LP_CAN1_RX0_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles TIM4 global interrupt.
|
||||
*/
|
||||
void TIM4_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN TIM4_IRQn 0 */
|
||||
|
||||
/* USER CODE END TIM4_IRQn 0 */
|
||||
HAL_TIM_IRQHandler(&htim4);
|
||||
/* USER CODE BEGIN TIM4_IRQn 1 */
|
||||
|
||||
/* USER CODE END TIM4_IRQn 1 */
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN 1 */
|
||||
|
||||
/* USER CODE END 1 */
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
156
Core/Src/syscalls.c
Normal file
156
Core/Src/syscalls.c
Normal file
@@ -0,0 +1,156 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file syscalls.c
|
||||
* @author Auto-generated by STM32CubeIDE
|
||||
* @brief STM32CubeIDE Minimal System calls file
|
||||
*
|
||||
* For more information about which c-functions
|
||||
* need which of these lowlevel functions
|
||||
* please consult the Newlib libc-manual
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2020 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes */
|
||||
#include <sys/stat.h>
|
||||
#include <stdlib.h>
|
||||
#include <errno.h>
|
||||
#include <stdio.h>
|
||||
#include <signal.h>
|
||||
#include <time.h>
|
||||
#include <sys/time.h>
|
||||
#include <sys/times.h>
|
||||
|
||||
|
||||
/* Variables */
|
||||
extern int __io_putchar(int ch) __attribute__((weak));
|
||||
extern int __io_getchar(void) __attribute__((weak));
|
||||
|
||||
|
||||
char *__env[1] = { 0 };
|
||||
char **environ = __env;
|
||||
|
||||
|
||||
/* Functions */
|
||||
void initialise_monitor_handles()
|
||||
{
|
||||
}
|
||||
|
||||
int _getpid(void)
|
||||
{
|
||||
return 1;
|
||||
}
|
||||
|
||||
int _kill(int pid, int sig)
|
||||
{
|
||||
errno = EINVAL;
|
||||
return -1;
|
||||
}
|
||||
|
||||
void _exit (int status)
|
||||
{
|
||||
_kill(status, -1);
|
||||
while (1) {} /* Make sure we hang here */
|
||||
}
|
||||
|
||||
__attribute__((weak)) int _read(int file, char *ptr, int len)
|
||||
{
|
||||
int DataIdx;
|
||||
|
||||
for (DataIdx = 0; DataIdx < len; DataIdx++)
|
||||
{
|
||||
*ptr++ = __io_getchar();
|
||||
}
|
||||
|
||||
return len;
|
||||
}
|
||||
|
||||
__attribute__((weak)) int _write(int file, char *ptr, int len)
|
||||
{
|
||||
int DataIdx;
|
||||
|
||||
for (DataIdx = 0; DataIdx < len; DataIdx++)
|
||||
{
|
||||
__io_putchar(*ptr++);
|
||||
}
|
||||
return len;
|
||||
}
|
||||
|
||||
int _close(int file)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
||||
|
||||
int _fstat(int file, struct stat *st)
|
||||
{
|
||||
st->st_mode = S_IFCHR;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int _isatty(int file)
|
||||
{
|
||||
return 1;
|
||||
}
|
||||
|
||||
int _lseek(int file, int ptr, int dir)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
int _open(char *path, int flags, ...)
|
||||
{
|
||||
/* Pretend like we always fail */
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _wait(int *status)
|
||||
{
|
||||
errno = ECHILD;
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _unlink(char *name)
|
||||
{
|
||||
errno = ENOENT;
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _times(struct tms *buf)
|
||||
{
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _stat(char *file, struct stat *st)
|
||||
{
|
||||
st->st_mode = S_IFCHR;
|
||||
return 0;
|
||||
}
|
||||
|
||||
int _link(char *old, char *new)
|
||||
{
|
||||
errno = EMLINK;
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _fork(void)
|
||||
{
|
||||
errno = EAGAIN;
|
||||
return -1;
|
||||
}
|
||||
|
||||
int _execve(char *name, char **argv, char **env)
|
||||
{
|
||||
errno = ENOMEM;
|
||||
return -1;
|
||||
}
|
||||
80
Core/Src/sysmem.c
Normal file
80
Core/Src/sysmem.c
Normal file
@@ -0,0 +1,80 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file sysmem.c
|
||||
* @author Generated by STM32CubeIDE
|
||||
* @brief STM32CubeIDE System Memory calls file
|
||||
*
|
||||
* For more information about which C functions
|
||||
* need which of these lowlevel functions
|
||||
* please consult the newlib libc manual
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2020 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes */
|
||||
#include <errno.h>
|
||||
#include <stdint.h>
|
||||
|
||||
/**
|
||||
* Pointer to the current high watermark of the heap usage
|
||||
*/
|
||||
static uint8_t *__sbrk_heap_end = NULL;
|
||||
|
||||
/**
|
||||
* @brief _sbrk() allocates memory to the newlib heap and is used by malloc
|
||||
* and others from the C library
|
||||
*
|
||||
* @verbatim
|
||||
* ############################################################################
|
||||
* # .data # .bss # newlib heap # MSP stack #
|
||||
* # # # # Reserved by _Min_Stack_Size #
|
||||
* ############################################################################
|
||||
* ^-- RAM start ^-- _end _estack, RAM end --^
|
||||
* @endverbatim
|
||||
*
|
||||
* This implementation starts allocating at the '_end' linker symbol
|
||||
* The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
|
||||
* The implementation considers '_estack' linker symbol to be RAM end
|
||||
* NOTE: If the MSP stack, at any point during execution, grows larger than the
|
||||
* reserved size, please increase the '_Min_Stack_Size'.
|
||||
*
|
||||
* @param incr Memory size
|
||||
* @return Pointer to allocated memory
|
||||
*/
|
||||
void *_sbrk(ptrdiff_t incr)
|
||||
{
|
||||
extern uint8_t _end; /* Symbol defined in the linker script */
|
||||
extern uint8_t _estack; /* Symbol defined in the linker script */
|
||||
extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
|
||||
const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
|
||||
const uint8_t *max_heap = (uint8_t *)stack_limit;
|
||||
uint8_t *prev_heap_end;
|
||||
|
||||
/* Initialize heap end at first call */
|
||||
if (NULL == __sbrk_heap_end)
|
||||
{
|
||||
__sbrk_heap_end = &_end;
|
||||
}
|
||||
|
||||
/* Protect heap from growing into the reserved MSP stack */
|
||||
if (__sbrk_heap_end + incr > max_heap)
|
||||
{
|
||||
errno = ENOMEM;
|
||||
return (void *)-1;
|
||||
}
|
||||
|
||||
prev_heap_end = __sbrk_heap_end;
|
||||
__sbrk_heap_end += incr;
|
||||
|
||||
return (void *)prev_heap_end;
|
||||
}
|
||||
408
Core/Src/system_stm32f1xx.c
Normal file
408
Core/Src/system_stm32f1xx.c
Normal file
@@ -0,0 +1,408 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file system_stm32f1xx.c
|
||||
* @author MCD Application Team
|
||||
* @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File.
|
||||
*
|
||||
* 1. This file provides two functions and one global variable to be called from
|
||||
* user application:
|
||||
* - SystemInit(): Setups the system clock (System clock source, PLL Multiplier
|
||||
* factors, AHB/APBx prescalers and Flash settings).
|
||||
* This function is called at startup just after reset and
|
||||
* before branch to main program. This call is made inside
|
||||
* the "startup_stm32f1xx_xx.s" file.
|
||||
*
|
||||
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
|
||||
* by the user application to setup the SysTick
|
||||
* timer or configure other parameters.
|
||||
*
|
||||
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
|
||||
* be called whenever the core clock is changed
|
||||
* during program execution.
|
||||
*
|
||||
* 2. After each device reset the HSI (8 MHz) is used as system clock source.
|
||||
* Then SystemInit() function is called, in "startup_stm32f1xx_xx.s" file, to
|
||||
* configure the system clock before to branch to main program.
|
||||
*
|
||||
* 4. The default value of HSE crystal is set to 8 MHz (or 25 MHz, depending on
|
||||
* the product used), refer to "HSE_VALUE".
|
||||
* When HSE is used as system clock source, directly or through PLL, and you
|
||||
* are using different crystal you have to adapt the HSE value to your own
|
||||
* configuration.
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/** @addtogroup CMSIS
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup stm32f1xx_system
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F1xx_System_Private_Includes
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "stm32f1xx.h"
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F1xx_System_Private_TypesDefinitions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F1xx_System_Private_Defines
|
||||
* @{
|
||||
*/
|
||||
|
||||
#if !defined (HSE_VALUE)
|
||||
#define HSE_VALUE 8000000U /*!< Default value of the External oscillator in Hz.
|
||||
This value can be provided and adapted by the user application. */
|
||||
#endif /* HSE_VALUE */
|
||||
|
||||
#if !defined (HSI_VALUE)
|
||||
#define HSI_VALUE 8000000U /*!< Default value of the Internal oscillator in Hz.
|
||||
This value can be provided and adapted by the user application. */
|
||||
#endif /* HSI_VALUE */
|
||||
|
||||
/*!< Uncomment the following line if you need to use external SRAM */
|
||||
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
|
||||
/* #define DATA_IN_ExtSRAM */
|
||||
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
|
||||
|
||||
/* Note: Following vector table addresses must be defined in line with linker
|
||||
configuration. */
|
||||
/*!< Uncomment the following line if you need to relocate the vector table
|
||||
anywhere in Flash or Sram, else the vector table is kept at the automatic
|
||||
remap of boot address selected */
|
||||
/* #define USER_VECT_TAB_ADDRESS */
|
||||
|
||||
#if defined(USER_VECT_TAB_ADDRESS)
|
||||
/*!< Uncomment the following line if you need to relocate your vector Table
|
||||
in Sram else user remap will be done in Flash. */
|
||||
/* #define VECT_TAB_SRAM */
|
||||
#if defined(VECT_TAB_SRAM)
|
||||
#define VECT_TAB_BASE_ADDRESS SRAM_BASE /*!< Vector Table base address field.
|
||||
This value must be a multiple of 0x200. */
|
||||
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
|
||||
This value must be a multiple of 0x200. */
|
||||
#else
|
||||
#define VECT_TAB_BASE_ADDRESS FLASH_BASE /*!< Vector Table base address field.
|
||||
This value must be a multiple of 0x200. */
|
||||
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
|
||||
This value must be a multiple of 0x200. */
|
||||
#endif /* VECT_TAB_SRAM */
|
||||
#endif /* USER_VECT_TAB_ADDRESS */
|
||||
|
||||
/******************************************************************************/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F1xx_System_Private_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F1xx_System_Private_Variables
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* This variable is updated in three ways:
|
||||
1) by calling CMSIS function SystemCoreClockUpdate()
|
||||
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
|
||||
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
|
||||
Note: If you use this function to configure the system clock; then there
|
||||
is no need to call the 2 first functions listed above, since SystemCoreClock
|
||||
variable is updated automatically.
|
||||
*/
|
||||
uint32_t SystemCoreClock = 16000000;
|
||||
const uint8_t AHBPrescTable[16U] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
|
||||
const uint8_t APBPrescTable[8U] = {0, 0, 0, 0, 1, 2, 3, 4};
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F1xx_System_Private_FunctionPrototypes
|
||||
* @{
|
||||
*/
|
||||
|
||||
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
|
||||
#ifdef DATA_IN_ExtSRAM
|
||||
static void SystemInit_ExtMemCtl(void);
|
||||
#endif /* DATA_IN_ExtSRAM */
|
||||
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F1xx_System_Private_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Setup the microcontroller system
|
||||
* Initialize the Embedded Flash Interface, the PLL and update the
|
||||
* SystemCoreClock variable.
|
||||
* @note This function should be used only after reset.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SystemInit (void)
|
||||
{
|
||||
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
|
||||
#ifdef DATA_IN_ExtSRAM
|
||||
SystemInit_ExtMemCtl();
|
||||
#endif /* DATA_IN_ExtSRAM */
|
||||
#endif
|
||||
|
||||
/* Configure the Vector Table location -------------------------------------*/
|
||||
#if defined(USER_VECT_TAB_ADDRESS)
|
||||
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
|
||||
#endif /* USER_VECT_TAB_ADDRESS */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Update SystemCoreClock variable according to Clock Register Values.
|
||||
* The SystemCoreClock variable contains the core clock (HCLK), it can
|
||||
* be used by the user application to setup the SysTick timer or configure
|
||||
* other parameters.
|
||||
*
|
||||
* @note Each time the core clock (HCLK) changes, this function must be called
|
||||
* to update SystemCoreClock variable value. Otherwise, any configuration
|
||||
* based on this variable will be incorrect.
|
||||
*
|
||||
* @note - The system frequency computed by this function is not the real
|
||||
* frequency in the chip. It is calculated based on the predefined
|
||||
* constant and the selected clock source:
|
||||
*
|
||||
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
|
||||
*
|
||||
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
|
||||
*
|
||||
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
|
||||
* or HSI_VALUE(*) multiplied by the PLL factors.
|
||||
*
|
||||
* (*) HSI_VALUE is a constant defined in stm32f1xx.h file (default value
|
||||
* 8 MHz) but the real value may vary depending on the variations
|
||||
* in voltage and temperature.
|
||||
*
|
||||
* (**) HSE_VALUE is a constant defined in stm32f1xx.h file (default value
|
||||
* 8 MHz or 25 MHz, depending on the product used), user has to ensure
|
||||
* that HSE_VALUE is same as the real frequency of the crystal used.
|
||||
* Otherwise, this function may have wrong result.
|
||||
*
|
||||
* - The result of this function could be not correct when using fractional
|
||||
* value for HSE crystal.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SystemCoreClockUpdate (void)
|
||||
{
|
||||
uint32_t tmp = 0U, pllmull = 0U, pllsource = 0U;
|
||||
|
||||
#if defined(STM32F105xC) || defined(STM32F107xC)
|
||||
uint32_t prediv1source = 0U, prediv1factor = 0U, prediv2factor = 0U, pll2mull = 0U;
|
||||
#endif /* STM32F105xC */
|
||||
|
||||
#if defined(STM32F100xB) || defined(STM32F100xE)
|
||||
uint32_t prediv1factor = 0U;
|
||||
#endif /* STM32F100xB or STM32F100xE */
|
||||
|
||||
/* Get SYSCLK source -------------------------------------------------------*/
|
||||
tmp = RCC->CFGR & RCC_CFGR_SWS;
|
||||
|
||||
switch (tmp)
|
||||
{
|
||||
case 0x00U: /* HSI used as system clock */
|
||||
SystemCoreClock = HSI_VALUE;
|
||||
break;
|
||||
case 0x04U: /* HSE used as system clock */
|
||||
SystemCoreClock = HSE_VALUE;
|
||||
break;
|
||||
case 0x08U: /* PLL used as system clock */
|
||||
|
||||
/* Get PLL clock source and multiplication factor ----------------------*/
|
||||
pllmull = RCC->CFGR & RCC_CFGR_PLLMULL;
|
||||
pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
|
||||
|
||||
#if !defined(STM32F105xC) && !defined(STM32F107xC)
|
||||
pllmull = ( pllmull >> 18U) + 2U;
|
||||
|
||||
if (pllsource == 0x00U)
|
||||
{
|
||||
/* HSI oscillator clock divided by 2 selected as PLL clock entry */
|
||||
SystemCoreClock = (HSI_VALUE >> 1U) * pllmull;
|
||||
}
|
||||
else
|
||||
{
|
||||
#if defined(STM32F100xB) || defined(STM32F100xE)
|
||||
prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U;
|
||||
/* HSE oscillator clock selected as PREDIV1 clock entry */
|
||||
SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
|
||||
#else
|
||||
/* HSE selected as PLL clock entry */
|
||||
if ((RCC->CFGR & RCC_CFGR_PLLXTPRE) != (uint32_t)RESET)
|
||||
{/* HSE oscillator clock divided by 2 */
|
||||
SystemCoreClock = (HSE_VALUE >> 1U) * pllmull;
|
||||
}
|
||||
else
|
||||
{
|
||||
SystemCoreClock = HSE_VALUE * pllmull;
|
||||
}
|
||||
#endif
|
||||
}
|
||||
#else
|
||||
pllmull = pllmull >> 18U;
|
||||
|
||||
if (pllmull != 0x0DU)
|
||||
{
|
||||
pllmull += 2U;
|
||||
}
|
||||
else
|
||||
{ /* PLL multiplication factor = PLL input clock * 6.5 */
|
||||
pllmull = 13U / 2U;
|
||||
}
|
||||
|
||||
if (pllsource == 0x00U)
|
||||
{
|
||||
/* HSI oscillator clock divided by 2 selected as PLL clock entry */
|
||||
SystemCoreClock = (HSI_VALUE >> 1U) * pllmull;
|
||||
}
|
||||
else
|
||||
{/* PREDIV1 selected as PLL clock entry */
|
||||
|
||||
/* Get PREDIV1 clock source and division factor */
|
||||
prediv1source = RCC->CFGR2 & RCC_CFGR2_PREDIV1SRC;
|
||||
prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U;
|
||||
|
||||
if (prediv1source == 0U)
|
||||
{
|
||||
/* HSE oscillator clock selected as PREDIV1 clock entry */
|
||||
SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
|
||||
}
|
||||
else
|
||||
{/* PLL2 clock selected as PREDIV1 clock entry */
|
||||
|
||||
/* Get PREDIV2 division factor and PLL2 multiplication factor */
|
||||
prediv2factor = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> 4U) + 1U;
|
||||
pll2mull = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> 8U) + 2U;
|
||||
SystemCoreClock = (((HSE_VALUE / prediv2factor) * pll2mull) / prediv1factor) * pllmull;
|
||||
}
|
||||
}
|
||||
#endif /* STM32F105xC */
|
||||
break;
|
||||
|
||||
default:
|
||||
SystemCoreClock = HSI_VALUE;
|
||||
break;
|
||||
}
|
||||
|
||||
/* Compute HCLK clock frequency ----------------*/
|
||||
/* Get HCLK prescaler */
|
||||
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)];
|
||||
/* HCLK clock frequency */
|
||||
SystemCoreClock >>= tmp;
|
||||
}
|
||||
|
||||
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
|
||||
/**
|
||||
* @brief Setup the external memory controller. Called in startup_stm32f1xx.s
|
||||
* before jump to __main
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
#ifdef DATA_IN_ExtSRAM
|
||||
/**
|
||||
* @brief Setup the external memory controller.
|
||||
* Called in startup_stm32f1xx_xx.s/.c before jump to main.
|
||||
* This function configures the external SRAM mounted on STM3210E-EVAL
|
||||
* board (STM32 High density devices). This SRAM will be used as program
|
||||
* data memory (including heap and stack).
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SystemInit_ExtMemCtl(void)
|
||||
{
|
||||
__IO uint32_t tmpreg;
|
||||
/*!< FSMC Bank1 NOR/SRAM3 is used for the STM3210E-EVAL, if another Bank is
|
||||
required, then adjust the Register Addresses */
|
||||
|
||||
/* Enable FSMC clock */
|
||||
RCC->AHBENR = 0x00000114U;
|
||||
|
||||
/* Delay after an RCC peripheral clock enabling */
|
||||
tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_FSMCEN);
|
||||
|
||||
/* Enable GPIOD, GPIOE, GPIOF and GPIOG clocks */
|
||||
RCC->APB2ENR = 0x000001E0U;
|
||||
|
||||
/* Delay after an RCC peripheral clock enabling */
|
||||
tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPDEN);
|
||||
|
||||
(void)(tmpreg);
|
||||
|
||||
/* --------------- SRAM Data lines, NOE and NWE configuration ---------------*/
|
||||
/*---------------- SRAM Address lines configuration -------------------------*/
|
||||
/*---------------- NOE and NWE configuration --------------------------------*/
|
||||
/*---------------- NE3 configuration ----------------------------------------*/
|
||||
/*---------------- NBL0, NBL1 configuration ---------------------------------*/
|
||||
|
||||
GPIOD->CRL = 0x44BB44BBU;
|
||||
GPIOD->CRH = 0xBBBBBBBBU;
|
||||
|
||||
GPIOE->CRL = 0xB44444BBU;
|
||||
GPIOE->CRH = 0xBBBBBBBBU;
|
||||
|
||||
GPIOF->CRL = 0x44BBBBBBU;
|
||||
GPIOF->CRH = 0xBBBB4444U;
|
||||
|
||||
GPIOG->CRL = 0x44BBBBBBU;
|
||||
GPIOG->CRH = 0x444B4B44U;
|
||||
|
||||
/*---------------- FSMC Configuration ---------------------------------------*/
|
||||
/*---------------- Enable FSMC Bank1_SRAM Bank ------------------------------*/
|
||||
|
||||
FSMC_Bank1->BTCR[4U] = 0x00001091U;
|
||||
FSMC_Bank1->BTCR[5U] = 0x00110212U;
|
||||
}
|
||||
#endif /* DATA_IN_ExtSRAM */
|
||||
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
129
Core/Src/tim.c
Normal file
129
Core/Src/tim.c
Normal file
@@ -0,0 +1,129 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file tim.c
|
||||
* @brief This file provides code for the configuration
|
||||
* of the TIM instances.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2025 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "tim.h"
|
||||
|
||||
/* USER CODE BEGIN 0 */
|
||||
|
||||
#include "lampa.h"
|
||||
|
||||
/* USER CODE END 0 */
|
||||
|
||||
TIM_HandleTypeDef htim4;
|
||||
|
||||
/* TIM4 init function */
|
||||
void MX_TIM4_Init(void)
|
||||
{
|
||||
|
||||
/* USER CODE BEGIN TIM4_Init 0 */
|
||||
|
||||
/* USER CODE END TIM4_Init 0 */
|
||||
|
||||
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
|
||||
TIM_MasterConfigTypeDef sMasterConfig = {0};
|
||||
|
||||
/* USER CODE BEGIN TIM4_Init 1 */
|
||||
|
||||
/* USER CODE END TIM4_Init 1 */
|
||||
htim4.Instance = TIM4;
|
||||
htim4.Init.Prescaler = 0;
|
||||
htim4.Init.CounterMode = TIM_COUNTERMODE_UP;
|
||||
htim4.Init.Period = 799;
|
||||
htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
|
||||
htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_ENABLE;
|
||||
if (HAL_TIM_Base_Init(&htim4) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
|
||||
if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
|
||||
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
|
||||
if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
/* USER CODE BEGIN TIM4_Init 2 */
|
||||
|
||||
HAL_TIM_Base_MspInit(&htim4);
|
||||
|
||||
HAL_TIM_Base_Start_IT(&htim4);
|
||||
|
||||
/* USER CODE END TIM4_Init 2 */
|
||||
|
||||
}
|
||||
|
||||
void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* tim_baseHandle)
|
||||
{
|
||||
|
||||
if(tim_baseHandle->Instance==TIM4)
|
||||
{
|
||||
/* USER CODE BEGIN TIM4_MspInit 0 */
|
||||
|
||||
/* USER CODE END TIM4_MspInit 0 */
|
||||
/* TIM4 clock enable */
|
||||
__HAL_RCC_TIM4_CLK_ENABLE();
|
||||
|
||||
/* TIM4 interrupt Init */
|
||||
HAL_NVIC_SetPriority(TIM4_IRQn, 0, 0);
|
||||
HAL_NVIC_EnableIRQ(TIM4_IRQn);
|
||||
/* USER CODE BEGIN TIM4_MspInit 1 */
|
||||
|
||||
/* USER CODE END TIM4_MspInit 1 */
|
||||
}
|
||||
}
|
||||
|
||||
void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* tim_baseHandle)
|
||||
{
|
||||
|
||||
if(tim_baseHandle->Instance==TIM4)
|
||||
{
|
||||
/* USER CODE BEGIN TIM4_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END TIM4_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_TIM4_CLK_DISABLE();
|
||||
|
||||
/* TIM4 interrupt Deinit */
|
||||
HAL_NVIC_DisableIRQ(TIM4_IRQn);
|
||||
/* USER CODE BEGIN TIM4_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END TIM4_MspDeInit 1 */
|
||||
}
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN 1 */
|
||||
|
||||
void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
|
||||
{
|
||||
|
||||
if(htim->Instance == TIM4) //check if the interrupt comes from TIM1
|
||||
|
||||
ReadSeanus();
|
||||
|
||||
}
|
||||
|
||||
|
||||
/* USER CODE END 1 */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
468
Core/Startup/startup_stm32f103rctx.s
Normal file
468
Core/Startup/startup_stm32f103rctx.s
Normal file
@@ -0,0 +1,468 @@
|
||||
/**
|
||||
*************** (C) COPYRIGHT 2017 STMicroelectronics ************************
|
||||
* @file startup_stm32f103xe.s
|
||||
* @author MCD Application Team
|
||||
* @brief STM32F103xE Devices vector table for Atollic toolchain.
|
||||
* This module performs:
|
||||
* - Set the initial SP
|
||||
* - Set the initial PC == Reset_Handler,
|
||||
* - Set the vector table entries with the exceptions ISR address
|
||||
* - Configure the clock system
|
||||
* - Configure external SRAM mounted on STM3210E-EVAL board
|
||||
* to be used as data memory (optional, to be enabled by user)
|
||||
* - Branches to main in the C library (which eventually
|
||||
* calls main()).
|
||||
* After Reset the Cortex-M3 processor is in Thread mode,
|
||||
* priority is Privileged, and the Stack is set to Main.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
.syntax unified
|
||||
.cpu cortex-m3
|
||||
.fpu softvfp
|
||||
.thumb
|
||||
|
||||
.global g_pfnVectors
|
||||
.global Default_Handler
|
||||
|
||||
/* start address for the initialization values of the .data section.
|
||||
defined in linker script */
|
||||
.word _sidata
|
||||
/* start address for the .data section. defined in linker script */
|
||||
.word _sdata
|
||||
/* end address for the .data section. defined in linker script */
|
||||
.word _edata
|
||||
/* start address for the .bss section. defined in linker script */
|
||||
.word _sbss
|
||||
/* end address for the .bss section. defined in linker script */
|
||||
.word _ebss
|
||||
|
||||
.equ BootRAM, 0xF1E0F85F
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor first
|
||||
* starts execution following a reset event. Only the absolutely
|
||||
* necessary set is performed, after which the application
|
||||
* supplied main() routine is called.
|
||||
* @param None
|
||||
* @retval : None
|
||||
*/
|
||||
|
||||
.section .text.Reset_Handler
|
||||
.weak Reset_Handler
|
||||
.type Reset_Handler, %function
|
||||
Reset_Handler:
|
||||
|
||||
/* Copy the data segment initializers from flash to SRAM */
|
||||
movs r1, #0
|
||||
b LoopCopyDataInit
|
||||
|
||||
CopyDataInit:
|
||||
ldr r3, =_sidata
|
||||
ldr r3, [r3, r1]
|
||||
str r3, [r0, r1]
|
||||
adds r1, r1, #4
|
||||
|
||||
LoopCopyDataInit:
|
||||
ldr r0, =_sdata
|
||||
ldr r3, =_edata
|
||||
adds r2, r0, r1
|
||||
cmp r2, r3
|
||||
bcc CopyDataInit
|
||||
ldr r2, =_sbss
|
||||
b LoopFillZerobss
|
||||
/* Zero fill the bss segment. */
|
||||
FillZerobss:
|
||||
movs r3, #0
|
||||
str r3, [r2], #4
|
||||
|
||||
LoopFillZerobss:
|
||||
ldr r3, = _ebss
|
||||
cmp r2, r3
|
||||
bcc FillZerobss
|
||||
|
||||
/* Call the clock system intitialization function.*/
|
||||
bl SystemInit
|
||||
/* Call static constructors */
|
||||
bl __libc_init_array
|
||||
/* Call the application's entry point.*/
|
||||
bl main
|
||||
bx lr
|
||||
.size Reset_Handler, .-Reset_Handler
|
||||
|
||||
/**
|
||||
* @brief This is the code that gets called when the processor receives an
|
||||
* unexpected interrupt. This simply enters an infinite loop, preserving
|
||||
* the system state for examination by a debugger.
|
||||
*
|
||||
* @param None
|
||||
* @retval : None
|
||||
*/
|
||||
.section .text.Default_Handler,"ax",%progbits
|
||||
Default_Handler:
|
||||
Infinite_Loop:
|
||||
b Infinite_Loop
|
||||
.size Default_Handler, .-Default_Handler
|
||||
/******************************************************************************
|
||||
*
|
||||
* The minimal vector table for a Cortex M3. Note that the proper constructs
|
||||
* must be placed on this to ensure that it ends up at physical address
|
||||
* 0x0000.0000.
|
||||
*
|
||||
******************************************************************************/
|
||||
.section .isr_vector,"a",%progbits
|
||||
.type g_pfnVectors, %object
|
||||
.size g_pfnVectors, .-g_pfnVectors
|
||||
|
||||
|
||||
g_pfnVectors:
|
||||
|
||||
.word _estack
|
||||
.word Reset_Handler
|
||||
.word NMI_Handler
|
||||
.word HardFault_Handler
|
||||
.word MemManage_Handler
|
||||
.word BusFault_Handler
|
||||
.word UsageFault_Handler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word SVC_Handler
|
||||
.word DebugMon_Handler
|
||||
.word 0
|
||||
.word PendSV_Handler
|
||||
.word SysTick_Handler
|
||||
.word WWDG_IRQHandler
|
||||
.word PVD_IRQHandler
|
||||
.word TAMPER_IRQHandler
|
||||
.word RTC_IRQHandler
|
||||
.word FLASH_IRQHandler
|
||||
.word RCC_IRQHandler
|
||||
.word EXTI0_IRQHandler
|
||||
.word EXTI1_IRQHandler
|
||||
.word EXTI2_IRQHandler
|
||||
.word EXTI3_IRQHandler
|
||||
.word EXTI4_IRQHandler
|
||||
.word DMA1_Channel1_IRQHandler
|
||||
.word DMA1_Channel2_IRQHandler
|
||||
.word DMA1_Channel3_IRQHandler
|
||||
.word DMA1_Channel4_IRQHandler
|
||||
.word DMA1_Channel5_IRQHandler
|
||||
.word DMA1_Channel6_IRQHandler
|
||||
.word DMA1_Channel7_IRQHandler
|
||||
.word ADC1_2_IRQHandler
|
||||
.word USB_HP_CAN1_TX_IRQHandler
|
||||
.word USB_LP_CAN1_RX0_IRQHandler
|
||||
.word CAN1_RX1_IRQHandler
|
||||
.word CAN1_SCE_IRQHandler
|
||||
.word EXTI9_5_IRQHandler
|
||||
.word TIM1_BRK_IRQHandler
|
||||
.word TIM1_UP_IRQHandler
|
||||
.word TIM1_TRG_COM_IRQHandler
|
||||
.word TIM1_CC_IRQHandler
|
||||
.word TIM2_IRQHandler
|
||||
.word TIM3_IRQHandler
|
||||
.word TIM4_IRQHandler
|
||||
.word I2C1_EV_IRQHandler
|
||||
.word I2C1_ER_IRQHandler
|
||||
.word I2C2_EV_IRQHandler
|
||||
.word I2C2_ER_IRQHandler
|
||||
.word SPI1_IRQHandler
|
||||
.word SPI2_IRQHandler
|
||||
.word USART1_IRQHandler
|
||||
.word USART2_IRQHandler
|
||||
.word USART3_IRQHandler
|
||||
.word EXTI15_10_IRQHandler
|
||||
.word RTC_Alarm_IRQHandler
|
||||
.word USBWakeUp_IRQHandler
|
||||
.word TIM8_BRK_IRQHandler
|
||||
.word TIM8_UP_IRQHandler
|
||||
.word TIM8_TRG_COM_IRQHandler
|
||||
.word TIM8_CC_IRQHandler
|
||||
.word ADC3_IRQHandler
|
||||
.word FSMC_IRQHandler
|
||||
.word SDIO_IRQHandler
|
||||
.word TIM5_IRQHandler
|
||||
.word SPI3_IRQHandler
|
||||
.word UART4_IRQHandler
|
||||
.word UART5_IRQHandler
|
||||
.word TIM6_IRQHandler
|
||||
.word TIM7_IRQHandler
|
||||
.word DMA2_Channel1_IRQHandler
|
||||
.word DMA2_Channel2_IRQHandler
|
||||
.word DMA2_Channel3_IRQHandler
|
||||
.word DMA2_Channel4_5_IRQHandler
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word 0
|
||||
.word BootRAM /* @0x1E0. This is for boot in RAM mode for
|
||||
STM32F10x High Density devices. */
|
||||
|
||||
/*******************************************************************************
|
||||
*
|
||||
* Provide weak aliases for each Exception handler to the Default_Handler.
|
||||
* As they are weak aliases, any function with the same name will override
|
||||
* this definition.
|
||||
*
|
||||
*******************************************************************************/
|
||||
|
||||
.weak NMI_Handler
|
||||
.thumb_set NMI_Handler,Default_Handler
|
||||
|
||||
.weak HardFault_Handler
|
||||
.thumb_set HardFault_Handler,Default_Handler
|
||||
|
||||
.weak MemManage_Handler
|
||||
.thumb_set MemManage_Handler,Default_Handler
|
||||
|
||||
.weak BusFault_Handler
|
||||
.thumb_set BusFault_Handler,Default_Handler
|
||||
|
||||
.weak UsageFault_Handler
|
||||
.thumb_set UsageFault_Handler,Default_Handler
|
||||
|
||||
.weak SVC_Handler
|
||||
.thumb_set SVC_Handler,Default_Handler
|
||||
|
||||
.weak DebugMon_Handler
|
||||
.thumb_set DebugMon_Handler,Default_Handler
|
||||
|
||||
.weak PendSV_Handler
|
||||
.thumb_set PendSV_Handler,Default_Handler
|
||||
|
||||
.weak SysTick_Handler
|
||||
.thumb_set SysTick_Handler,Default_Handler
|
||||
|
||||
.weak WWDG_IRQHandler
|
||||
.thumb_set WWDG_IRQHandler,Default_Handler
|
||||
|
||||
.weak PVD_IRQHandler
|
||||
.thumb_set PVD_IRQHandler,Default_Handler
|
||||
|
||||
.weak TAMPER_IRQHandler
|
||||
.thumb_set TAMPER_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_IRQHandler
|
||||
.thumb_set RTC_IRQHandler,Default_Handler
|
||||
|
||||
.weak FLASH_IRQHandler
|
||||
.thumb_set FLASH_IRQHandler,Default_Handler
|
||||
|
||||
.weak RCC_IRQHandler
|
||||
.thumb_set RCC_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI0_IRQHandler
|
||||
.thumb_set EXTI0_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI1_IRQHandler
|
||||
.thumb_set EXTI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI2_IRQHandler
|
||||
.thumb_set EXTI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI3_IRQHandler
|
||||
.thumb_set EXTI3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI4_IRQHandler
|
||||
.thumb_set EXTI4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel1_IRQHandler
|
||||
.thumb_set DMA1_Channel1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel2_IRQHandler
|
||||
.thumb_set DMA1_Channel2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel3_IRQHandler
|
||||
.thumb_set DMA1_Channel3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel4_IRQHandler
|
||||
.thumb_set DMA1_Channel4_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel5_IRQHandler
|
||||
.thumb_set DMA1_Channel5_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel6_IRQHandler
|
||||
.thumb_set DMA1_Channel6_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA1_Channel7_IRQHandler
|
||||
.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
|
||||
|
||||
.weak ADC1_2_IRQHandler
|
||||
.thumb_set ADC1_2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USB_HP_CAN1_TX_IRQHandler
|
||||
.thumb_set USB_HP_CAN1_TX_IRQHandler,Default_Handler
|
||||
|
||||
.weak USB_LP_CAN1_RX0_IRQHandler
|
||||
.thumb_set USB_LP_CAN1_RX0_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN1_RX1_IRQHandler
|
||||
.thumb_set CAN1_RX1_IRQHandler,Default_Handler
|
||||
|
||||
.weak CAN1_SCE_IRQHandler
|
||||
.thumb_set CAN1_SCE_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI9_5_IRQHandler
|
||||
.thumb_set EXTI9_5_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_BRK_IRQHandler
|
||||
.thumb_set TIM1_BRK_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_UP_IRQHandler
|
||||
.thumb_set TIM1_UP_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_TRG_COM_IRQHandler
|
||||
.thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM1_CC_IRQHandler
|
||||
.thumb_set TIM1_CC_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM2_IRQHandler
|
||||
.thumb_set TIM2_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM3_IRQHandler
|
||||
.thumb_set TIM3_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM4_IRQHandler
|
||||
.thumb_set TIM4_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_EV_IRQHandler
|
||||
.thumb_set I2C1_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C1_ER_IRQHandler
|
||||
.thumb_set I2C1_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C2_EV_IRQHandler
|
||||
.thumb_set I2C2_EV_IRQHandler,Default_Handler
|
||||
|
||||
.weak I2C2_ER_IRQHandler
|
||||
.thumb_set I2C2_ER_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI1_IRQHandler
|
||||
.thumb_set SPI1_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI2_IRQHandler
|
||||
.thumb_set SPI2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART1_IRQHandler
|
||||
.thumb_set USART1_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART2_IRQHandler
|
||||
.thumb_set USART2_IRQHandler,Default_Handler
|
||||
|
||||
.weak USART3_IRQHandler
|
||||
.thumb_set USART3_IRQHandler,Default_Handler
|
||||
|
||||
.weak EXTI15_10_IRQHandler
|
||||
.thumb_set EXTI15_10_IRQHandler,Default_Handler
|
||||
|
||||
.weak RTC_Alarm_IRQHandler
|
||||
.thumb_set RTC_Alarm_IRQHandler,Default_Handler
|
||||
|
||||
.weak USBWakeUp_IRQHandler
|
||||
.thumb_set USBWakeUp_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM8_BRK_IRQHandler
|
||||
.thumb_set TIM8_BRK_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM8_UP_IRQHandler
|
||||
.thumb_set TIM8_UP_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM8_TRG_COM_IRQHandler
|
||||
.thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM8_CC_IRQHandler
|
||||
.thumb_set TIM8_CC_IRQHandler,Default_Handler
|
||||
|
||||
.weak ADC3_IRQHandler
|
||||
.thumb_set ADC3_IRQHandler,Default_Handler
|
||||
|
||||
.weak FSMC_IRQHandler
|
||||
.thumb_set FSMC_IRQHandler,Default_Handler
|
||||
|
||||
.weak SDIO_IRQHandler
|
||||
.thumb_set SDIO_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM5_IRQHandler
|
||||
.thumb_set TIM5_IRQHandler,Default_Handler
|
||||
|
||||
.weak SPI3_IRQHandler
|
||||
.thumb_set SPI3_IRQHandler,Default_Handler
|
||||
|
||||
.weak UART4_IRQHandler
|
||||
.thumb_set UART4_IRQHandler,Default_Handler
|
||||
|
||||
.weak UART5_IRQHandler
|
||||
.thumb_set UART5_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM6_IRQHandler
|
||||
.thumb_set TIM6_IRQHandler,Default_Handler
|
||||
|
||||
.weak TIM7_IRQHandler
|
||||
.thumb_set TIM7_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel1_IRQHandler
|
||||
.thumb_set DMA2_Channel1_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel2_IRQHandler
|
||||
.thumb_set DMA2_Channel2_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel3_IRQHandler
|
||||
.thumb_set DMA2_Channel3_IRQHandler,Default_Handler
|
||||
|
||||
.weak DMA2_Channel4_5_IRQHandler
|
||||
.thumb_set DMA2_Channel4_5_IRQHandler,Default_Handler
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
Reference in New Issue
Block a user