From 99210998f4e946a5bd415b6dff091a0adaa8714c Mon Sep 17 00:00:00 2001 From: andrey Date: Fri, 29 May 2026 16:09:32 +0300 Subject: [PATCH] up --- Bin/UKSSTMS320F28335.out | Bin 284267 -> 284267 bytes UKSSTMS320F28335/.ccsproject | 2 + UKSSTMS320F28335/.cproject | 281 +++++++++--------- UKSSTMS320F28335/28335_RAM_lnk.cmd | 184 ++++++++++++ .../targetConfigs/TMS320F28335.ccxml | 9 +- 5 files changed, 336 insertions(+), 140 deletions(-) create mode 100644 UKSSTMS320F28335/28335_RAM_lnk.cmd diff --git a/Bin/UKSSTMS320F28335.out b/Bin/UKSSTMS320F28335.out index 9f2231074fb88125ad97b388cefef93a642c1446..afdca21c838d8d043f3088dcc145b6415d9fe06d 100644 GIT binary patch delta 1031 zcmXAo&5D#)5Qba*=%wHdxXHLmYB)c2s_GcBs5(DF5D@~|HZ#yjz!=E1Fhes8E@thr zw_bo-aVg|ZvUZc;4Op#wo5T5e>#e8W@ALZypWi=N|Fe3w`tdu_B7mF-YDp1V=QgD@n?~2G{@e2;IbUvGU-a$Ev#Zmyi$7QUK&d6s0I`$~DAvJ7 zQIJ;Dwp67C`^GKT8PNOeN`9}Pg2nDua!Z<2ViB)#x;?+Rc)ZcxHoLR)ms{r(RBfO@ zaOZ%rDb&htwMI8BX{2$0wu~FLPBqm4Gff|iIqE8$y`3#DvHZ(P8W(_FhKp5L@yH&B$O! zaVpWUR!cE@>AhJj{xxV%v3tWIm`4pe49P7@91iVh@jKh6f4y+!aTJaOIc7JYd4dHm zWTS_yJfnL!{M(mbP8>r`Su#)@?x7QdkQZQUY&txm7C+ipe!lYqw>&&SP-Z&z-ds*R z&ZNzvL(NR_@NOTsVLK|*gZQE_sx7%eO;KkXK#*mR2nGw0-Au=O!K~@n2ufq&9i?AvF&?Xx0`R?{SI7}wjgE8wbj-YE#{eW;$;k7B!*&A(9##Qo>?ZhtW@qd=ZF2x;rXxo z!{v`ZhX!%R7K_k&j4qu($1rG#=P(|^ZpY8Z_R|LxaY_q{83B3W7>)*<9m|+zwMl63 zlTnTVlAM7w38*fCs_xWfu4UmCZQ%;~1IHo%0zKD@?_}pJzUq8Q4n-_=6tJnL@T~Q_P zA*RpRgfJkFD%{DEy`_0A0tNr2X_7Ib0 z&Qwp>Rv94+o4{y;fxFe*;}=>hgjX8W;~QA_84PQIUZ%oC)-s|TXp!Uj@t?VU_Mk$v zibW@MhKQac8D@mi$4U{5H>oEWRae456^~Ocq*0>C)7ZyAl%KzRj(s2MCWVXeIwM$G@Sefi6)Fy&^!O2K9c0kwwC zM)Op{km@#K!SOHKesyLw3RG}G&Y_p8*Knj51rfnIR~OIkhi|`p@>yHrDFCL*r&f}K z + + diff --git a/UKSSTMS320F28335/.cproject b/UKSSTMS320F28335/.cproject index 2d8cdf1..e484b07 100644 --- a/UKSSTMS320F28335/.cproject +++ b/UKSSTMS320F28335/.cproject @@ -15,162 +15,167 @@ - - - - - - - + + + + + - - - - - - + + + + + + - - - - - - + + + + + + - - - - - - + + + + + + - - - - - - + + + + + + - - - - - - + + + + + + - - - - - - + + + + + + - - - - - - + + + + + + - - - - - - + + + + + + - - - - - - + + + + + + - - - - - - + + + + + + + + + @@ -200,52 +205,52 @@ - @@ -352,4 +360,5 @@ + diff --git a/UKSSTMS320F28335/28335_RAM_lnk.cmd b/UKSSTMS320F28335/28335_RAM_lnk.cmd new file mode 100644 index 0000000..0db663f --- /dev/null +++ b/UKSSTMS320F28335/28335_RAM_lnk.cmd @@ -0,0 +1,184 @@ +/* +// TI File $Revision: /main/11 $ +// Checkin $Date: April 15, 2009 09:57:28 $ +//########################################################################### +// +// FILE: 28335_RAM_lnk.cmd +// +// TITLE: Linker Command File For 28335 examples that run out of RAM +// +// This ONLY includes all SARAM blocks on the 28335 device. +// This does not include flash or OTP. +// +// Keep in mind that L0 and L1 are protected by the code +// security module. +// +// What this means is in most cases you will want to move to +// another memory map file which has more memory defined. +// +//########################################################################### +// $TI Release: $ +// $Release Date: $ +//########################################################################### +*/ + +/* ====================================================== +// For Code Composer Studio V2.2 and later +// --------------------------------------- +// In addition to this memory linker command file, +// add the header linker command file directly to the project. +// The header linker command file is required to link the +// peripheral structures to the proper locations within +// the memory map. +// +// The header linker files are found in \DSP2833x_Headers\cmd +// +// For BIOS applications add: DSP2833x_Headers_BIOS.cmd +// For nonBIOS applications add: DSP2833x_Headers_nonBIOS.cmd +========================================================= */ + +/* ====================================================== +// For Code Composer Studio prior to V2.2 +// -------------------------------------- +// 1) Use one of the following -l statements to include the +// header linker command file in the project. The header linker +// file is required to link the peripheral structures to the proper +// locations within the memory map */ + +/* Uncomment this line to include file only for non-BIOS applications */ +/* -l DSP2833x_Headers_nonBIOS.cmd */ + +/* Uncomment this line to include file only for BIOS applications */ +/* -l DSP2833x_Headers_BIOS.cmd */ + +/* 2) In your project add the path to \DSP2833x_headers\cmd to the + library search path under project->build options, linker tab, + library search path (-i). +/*========================================================= */ + +/* Define the memory block start/length for the F28335 + PAGE 0 will be used to organize program sections + PAGE 1 will be used to organize data sections + + Notes: + Memory blocks on F28335 are uniform (ie same + physical memory) in both PAGE 0 and PAGE 1. + That is the same memory region should not be + defined for both PAGE 0 and PAGE 1. + Doing so will result in corruption of program + and/or data. + + L0/L1/L2 and L3 memory blocks are mirrored - that is + they can be accessed in high memory or low memory. + For simplicity only one instance is used in this + linker file. + + Contiguous SARAM memory blocks can be combined + if required to create a larger memory block. +*/ + + +MEMORY +{ +PAGE 0 : + /* BEGIN is used for the "boot to SARAM" bootloader mode */ + + BEGIN : origin = 0x000000, length = 0x000002 /* Boot to M0 will go here */ + RAMM0 : origin = 0x000050, length = 0x0003B0 + RAML0 : origin = 0x008000, length = 0x001000 + RAML1 : origin = 0x009000, length = 0x001000 + RAML2 : origin = 0x00A000, length = 0x001000 + RAML3 : origin = 0x00B000, length = 0x001000 + ZONE7A : origin = 0x200000, length = 0x00FC00 /* XINTF zone 7 - program space */ + CSM_RSVD : origin = 0x33FF80, length = 0x000076 /* Part of FLASHA. Program with all 0x0000 when CSM is in use. */ + CSM_PWL : origin = 0x33FFF8, length = 0x000008 /* Part of FLASHA. CSM password locations in FLASHA */ + ADC_CAL : origin = 0x380080, length = 0x000009 + RESET : origin = 0x3FFFC0, length = 0x000002 + IQTABLES : origin = 0x3FE000, length = 0x000b50 + IQTABLES2 : origin = 0x3FEB50, length = 0x00008c + FPUTABLES : origin = 0x3FEBDC, length = 0x0006A0 + BOOTROM : origin = 0x3FF27C, length = 0x000D44 + + +PAGE 1 : + /* BOOT_RSVD is used by the boot ROM for stack. */ + /* This section is only reserved to keep the BOOT ROM from */ + /* corrupting this area during the debug process */ + + BOOT_RSVD : origin = 0x000002, length = 0x00004E /* Part of M0, BOOT rom will use this for stack */ + RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */ + RAML4 : origin = 0x00C000, length = 0x001000 + RAML5 : origin = 0x00D000, length = 0x001000 + RAML6 : origin = 0x00E000, length = 0x001000 + RAML7 : origin = 0x00F000, length = 0x001000 + ZONE7B : origin = 0x20FC00, length = 0x000400 /* XINTF zone 7 - data space */ +} + + +SECTIONS +{ + /* Setup for "boot to SARAM" mode: + The codestart section (found in DSP28_CodeStartBranch.asm) + re-directs execution to the start of user code. */ + codestart : > BEGIN, PAGE = 0 + +#ifdef __TI_COMPILER_VERSION__ + #if __TI_COMPILER_VERSION__ >= 15009000 + .TI.ramfunc : {} > RAML0, PAGE = 0 + #else + ramfuncs : > RAML0, PAGE = 0 + #endif +#endif + + .text : > RAML1, PAGE = 0 + .cinit : > RAML0, PAGE = 0 + .pinit : > RAML0, PAGE = 0 + .switch : > RAML0, PAGE = 0 + + .stack : > RAMM1, PAGE = 1 + .ebss : > RAML4, PAGE = 1 + .econst : > RAML5, PAGE = 1 + .esysmem : > RAMM1, PAGE = 1 + + IQmath : > RAML1, PAGE = 0 + IQmathTables : > IQTABLES, PAGE = 0, TYPE = NOLOAD + + /* Uncomment the section below if calling the IQNexp() or IQexp() + functions from the IQMath.lib library in order to utilize the + relevant IQ Math table in Boot ROM (This saves space and Boot ROM + is 1 wait-state). If this section is not uncommented, IQmathTables2 + will be loaded into other memory (SARAM, Flash, etc.) and will take + up space, but 0 wait-state is possible. + */ + /* + IQmathTables2 : > IQTABLES2, PAGE = 0, TYPE = NOLOAD + { + + IQmath.lib (IQmathTablesRam) + + } + */ + + FPUmathTables : > FPUTABLES, PAGE = 0, TYPE = NOLOAD + + DMARAML4 : > RAML4, PAGE = 1 + DMARAML5 : > RAML5, PAGE = 1 + DMARAML6 : > RAML6, PAGE = 1 + DMARAML7 : > RAML7, PAGE = 1 + + ZONE7DATA : > ZONE7B, PAGE = 1 + + .reset : > RESET, PAGE = 0, TYPE = DSECT /* not used */ + csm_rsvd : > CSM_RSVD PAGE = 0, TYPE = DSECT /* not used for SARAM examples */ + csmpasswds : > CSM_PWL PAGE = 0, TYPE = DSECT /* not used for SARAM examples */ + + /* Allocate ADC_cal function (pre-programmed by factory into TI reserved memory) */ + .adc_cal : load = ADC_CAL, PAGE = 0, TYPE = NOLOAD + +} + +/* +//=========================================================================== +// End of file. +//=========================================================================== +*/ \ No newline at end of file diff --git a/UKSSTMS320F28335/targetConfigs/TMS320F28335.ccxml b/UKSSTMS320F28335/targetConfigs/TMS320F28335.ccxml index 5081425..ffb57e5 100644 --- a/UKSSTMS320F28335/targetConfigs/TMS320F28335.ccxml +++ b/UKSSTMS320F28335/targetConfigs/TMS320F28335.ccxml @@ -1,9 +1,10 @@ - - - - + + + + +