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index 6dd1859..96017c4 100644
--- a/.gitignore
+++ b/.gitignore
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 /Debug/
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+/.ccs12_*workspace*/
+/.ti_appdata/
 /UKSSTMS320F28335.CS_/
 /Debug.lkf
 /cc_build_Debug.log
diff --git a/.project b/.project
new file mode 100644
index 0000000..95db45b
--- /dev/null
+++ b/.project
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+<?xml version="1.0" encoding="UTF-8"?>
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+	<name>ice_22220_6</name>
+	<comment></comment>
+	<projects>
+	</projects>
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+:20607200000085880000F2850000158600008588000085880000368600005786000085882F
+:20609200000085880000788600009B860000BC860000DD860000FE86000021870000448726
+:2060B200000065870000858800008588000085880000858800008588000085880000858887
+:2060D200000085880000858800008588000085880000858800008588000085880000858846
+:2060F20000008588000086870000A7870000C8870000E98700000A880000858800002D8833
+:0C61120000004E88000033000B000A0063
+:20611E00280000005AC1259B0000449B0000569B00006D9B0000839B0000969B0000AA9BF2
+:20613E000000BD9B0000D89B0000FC9B0000129C0000259C0000329C0000549C0000669CB0
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 :00000001FF
diff --git a/Bin/UKSSTMS320F28335.map b/Bin/UKSSTMS320F28335.map
index a5c93ac..262942b 100644
--- a/Bin/UKSSTMS320F28335.map
+++ b/Bin/UKSSTMS320F28335.map
@@ -12,7 +12,7 @@ PHYSICAL MEMORY PARAMETERS
 
 BOOT LOADER PARAMETERS
    Table Type:		  SERIAL PORT (SCI 8 bit Mode)
-   Entry Point:		  0x0000ac1a
+   Entry Point:		  0x0000ac0e
 
 
 OUTPUT TRANSLATION MAP
@@ -21,9 +21,9 @@ OUTPUT TRANSLATION MAP
 --------------------------------------------------------------------------------
    OUTPUT FILES: D:\project2833\GIT\ICE_22220_6\bin\UKSSTMS320F28335.bin [b0..b7]
 
-   CONTENTS: 00000000..0000617b   BOOT TABLE
-                           .cinit : dest=0000ad8f  size=000001be  width=00000002
-                            .text : dest=00008000  size=00002d8f  width=00000002
+   CONTENTS: 00000000..00006175   BOOT TABLE
+                           .cinit : dest=0000ad8c  size=000001be  width=00000002
+                            .text : dest=00008000  size=00002d8c  width=00000002
                          ramfuncs : dest=0000c12e  size=0000002b  width=00000002
                           .econst : dest=0000c000  size=00000103  width=00000002
                           .switch : dest=0000c15a  size=00000028  width=00000002
diff --git a/Bin/UKSSTMS320F28335.out b/Bin/UKSSTMS320F28335.out
index dba96f8..97931ff 100644
Binary files a/Bin/UKSSTMS320F28335.out and b/Bin/UKSSTMS320F28335.out differ
diff --git a/Source/External/v120/DSP2833x_common/cmd/28332_RAM_lnk.cmd b/Source/External/v120/DSP2833x_common/cmd/28332_RAM_lnk.cmd
deleted file mode 100644
index b3707a7..0000000
--- a/Source/External/v120/DSP2833x_common/cmd/28332_RAM_lnk.cmd
+++ /dev/null
@@ -1,176 +0,0 @@
-/*
-// TI File $Revision: /main/9 $
-// Checkin $Date: July 9, 2008   13:43:25 $
-//###########################################################################
-//
-// FILE:    28332_RAM_lnk.cmd
-//
-// TITLE:   Linker Command File For 28332 examples that run out of RAM
-//
-//          This ONLY includes all SARAM blocks on the 28332 device.
-//          This does not include flash or OTP. 
-//
-//          Keep in mind that L0 and L1 are protected by the code
-//          security module.
-//
-//          What this means is in most cases you will want to move to 
-//          another memory map file which has more memory defined.  
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-*/
-
-/* ======================================================
-// For Code Composer Studio V2.2 and later
-// ---------------------------------------
-// In addition to this memory linker command file, 
-// add the header linker command file directly to the project. 
-// The header linker command file is required to link the
-// peripheral structures to the proper locations within 
-// the memory map.
-//
-// The header linker files are found in <base>\DSP2833x_Headers\cmd
-//   
-// For BIOS applications add:      DSP2833x_Headers_BIOS.cmd
-// For nonBIOS applications add:   DSP2833x_Headers_nonBIOS.cmd    
-========================================================= */
-
-/* ======================================================
-// For Code Composer Studio prior to V2.2
-// --------------------------------------
-// 1) Use one of the following -l statements to include the 
-// header linker command file in the project. The header linker
-// file is required to link the peripheral structures to the proper 
-// locations within the memory map                                    */
-
-/* Uncomment this line to include file only for non-BIOS applications */
-/* -l DSP2833x_Headers_nonBIOS.cmd */
-
-/* Uncomment this line to include file only for BIOS applications */
-/* -l DSP2833x_Headers_BIOS.cmd */
-
-/* 2) In your project add the path to <base>\DSP2833x_headers\cmd to the
-   library search path under project->build options, linker tab, 
-   library search path (-i).
-/*========================================================= */
-
-/* Define the memory block start/length for the F28332  
-   PAGE 0 will be used to organize program sections
-   PAGE 1 will be used to organize data sections
-
-   Notes: 
-         Memory blocks on F28332 are uniform (ie same
-         physical memory) in both PAGE 0 and PAGE 1.  
-         That is the same memory region should not be
-         defined for both PAGE 0 and PAGE 1.
-         Doing so will result in corruption of program 
-         and/or data. 
-         
-         L0/L1/L2 and L3 memory blocks are mirrored - that is
-         they can be accessed in high memory or low memory.
-         For simplicity only one instance is used in this
-         linker file. 
-         
-         Contiguous SARAM memory blocks can be combined 
-         if required to create a larger memory block. 
-*/
-
-
-MEMORY
-{
-PAGE 0 :
-   /* BEGIN is used for the "boot to SARAM" bootloader mode      */
-   /* BOOT_RSVD is used by the boot ROM for stack.               */
-   /* This section is only reserved to keep the BOOT ROM from    */
-   /* corrupting this area during the debug process              */
-   
-   BEGIN      : origin = 0x000000, length = 0x000002     /* Boot to M0 will go here                      */
-   BOOT_RSVD  : origin = 0x000002, length = 0x00004E     /* Part of M0, BOOT rom will use this for stack */               
-   RAMM0      : origin = 0x000050, length = 0x0003B0
-
-   RAML0      : origin = 0x008000, length = 0x001000    
-   RAML1      : origin = 0x009000, length = 0x001000    
-   RAML2      : origin = 0x00A000, length = 0x001000    
-   RAML3      : origin = 0x00B000, length = 0x001000   
-   ZONE7A     : origin = 0x200000, length = 0x00FC00     /* XINTF zone 7 - program space */ 
-   CSM_RSVD   : origin = 0x33FF80, length = 0x000076     /* Part of FLASHA.  Program with all 0x0000 when CSM is in use. */
-   CSM_PWL    : origin = 0x33FFF8, length = 0x000008     /* Part of FLASHA.  CSM password locations in FLASHA            */
-   ADC_CAL    : origin = 0x380080, length = 0x000009
-   RESET      : origin = 0x3FFFC0, length = 0x000002   
-   IQTABLES   : origin = 0x3FE000, length = 0x000b50
-   IQTABLES2  : origin = 0x3FEB50, length = 0x00008c
-   FPUTABLES  : origin = 0x3FEBDC, length = 0x0006A0
-   BOOTROM    : origin = 0x3FF27C, length = 0x000D44  
-
-   
-
-         
-PAGE 1 : 
-   RAMM1      : origin = 0x000400, length = 0x000400     /* on-chip RAM block M1 */
-   RAML4      : origin = 0x00C000, length = 0x001000    
-   RAML5      : origin = 0x00D000, length = 0x001000    
-   ZONE7B     : origin = 0x20FC00, length = 0x000400     /* XINTF zone 7 - data space */
-}
- 
- 
-SECTIONS
-{
-   /* Setup for "boot to SARAM" mode: 
-      The codestart section (found in DSP28_CodeStartBranch.asm)
-      re-directs execution to the start of user code.  */
-   codestart        : > BEGIN,     PAGE = 0
-   ramfuncs         : > RAML0,     PAGE = 0  
-   .text            : > RAML1,     PAGE = 0
-   .cinit           : > RAML0,     PAGE = 0
-   .pinit           : > RAML0,     PAGE = 0
-   .switch          : > RAML0,     PAGE = 0
-   
-   .stack           : > RAMM1,     PAGE = 1
-   .ebss            : > RAML4,     PAGE = 1
-   .econst          : > RAML5,     PAGE = 1      
-   .esysmem         : > RAMM1,     PAGE = 1
-
-   IQmath           : > RAML1,     PAGE = 0
-   IQmathTables     : > IQTABLES,  PAGE = 0, TYPE = NOLOAD 
-   
-   /* Uncomment the section below if calling the IQNexp() or IQexp()
-      functions from the IQMath.lib library in order to utilize the 
-      relevant IQ Math table in Boot ROM (This saves space and Boot ROM 
-      is 1 wait-state). If this section is not uncommented, IQmathTables2
-      will be loaded into other memory (SARAM, Flash, etc.) and will take
-      up space, but 0 wait-state is possible.
-   */
-   /*
-   IQmathTables2    : > IQTABLES2, PAGE = 0, TYPE = NOLOAD 
-   {
-   
-              IQmath.lib<IQNexpTable.obj> (IQmathTablesRam)
-   
-   }
-   */
-   
-   FPUmathTables    : > FPUTABLES, PAGE = 0, TYPE = NOLOAD 
-   
-   DMARAML4         : > RAML4,     PAGE = 1
-   DMARAML5         : > RAML5,     PAGE = 1
-   
-   ZONE7DATA        : > ZONE7B,    PAGE = 1   
-
-
-   .reset           : > RESET,     PAGE = 0, TYPE = DSECT /* not used                    */
-   csm_rsvd         : > CSM_RSVD   PAGE = 0, TYPE = DSECT /* not used for SARAM examples */
-   csmpasswds       : > CSM_PWL    PAGE = 0, TYPE = DSECT /* not used for SARAM examples */
-   
-   /* Allocate ADC_cal function (pre-programmed by factory into TI reserved memory) */
-   .adc_cal     : load = ADC_CAL,   PAGE = 0, TYPE = NOLOAD
-
-     
-}
-
-/*
-//===========================================================================
-// End of file.
-//===========================================================================
-*/
diff --git a/Source/External/v120/DSP2833x_common/cmd/28334_RAM_lnk.cmd b/Source/External/v120/DSP2833x_common/cmd/28334_RAM_lnk.cmd
deleted file mode 100644
index 25f0fc9..0000000
--- a/Source/External/v120/DSP2833x_common/cmd/28334_RAM_lnk.cmd
+++ /dev/null
@@ -1,178 +0,0 @@
-/*
-// TI File $Revision: /main/8 $
-// Checkin $Date: July 9, 2008   13:43:30 $
-//###########################################################################
-//
-// FILE:    28334_RAM_lnk.cmd
-//
-// TITLE:   Linker Command File For 28334 examples that run out of RAM
-//
-//          This ONLY includes all SARAM blocks on the 28334 device.
-//          This does not include flash or OTP. 
-//
-//          Keep in mind that L0 and L1 are protected by the code
-//          security module.
-//
-//          What this means is in most cases you will want to move to 
-//          another memory map file which has more memory defined.  
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-*/
-
-/* ======================================================
-// For Code Composer Studio V2.2 and later
-// ---------------------------------------
-// In addition to this memory linker command file, 
-// add the header linker command file directly to the project. 
-// The header linker command file is required to link the
-// peripheral structures to the proper locations within 
-// the memory map.
-//
-// The header linker files are found in <base>\DSP2833x_Headers\cmd
-//   
-// For BIOS applications add:      DSP2833x_Headers_BIOS.cmd
-// For nonBIOS applications add:   DSP2833x_Headers_nonBIOS.cmd    
-========================================================= */
-
-/* ======================================================
-// For Code Composer Studio prior to V2.2
-// --------------------------------------
-// 1) Use one of the following -l statements to include the 
-// header linker command file in the project. The header linker
-// file is required to link the peripheral structures to the proper 
-// locations within the memory map                                    */
-
-/* Uncomment this line to include file only for non-BIOS applications */
-/* -l DSP2833x_Headers_nonBIOS.cmd */
-
-/* Uncomment this line to include file only for BIOS applications */
-/* -l DSP2833x_Headers_BIOS.cmd */
-
-/* 2) In your project add the path to <base>\DSP2833x_headers\cmd to the
-   library search path under project->build options, linker tab, 
-   library search path (-i).
-/*========================================================= */
-
-/* Define the memory block start/length for the F28334  
-   PAGE 0 will be used to organize program sections
-   PAGE 1 will be used to organize data sections
-
-   Notes: 
-         Memory blocks on F28334 are uniform (ie same
-         physical memory) in both PAGE 0 and PAGE 1.  
-         That is the same memory region should not be
-         defined for both PAGE 0 and PAGE 1.
-         Doing so will result in corruption of program 
-         and/or data. 
-         
-         L0/L1/L2 and L3 memory blocks are mirrored - that is
-         they can be accessed in high memory or low memory.
-         For simplicity only one instance is used in this
-         linker file. 
-         
-         Contiguous SARAM memory blocks can be combined 
-         if required to create a larger memory block. 
-*/
-
-
-MEMORY
-{
-PAGE 0 :
-   /* BEGIN is used for the "boot to SARAM" bootloader mode      */
-   /* BOOT_RSVD is used by the boot ROM for stack.               */
-   /* This section is only reserved to keep the BOOT ROM from    */
-   /* corrupting this area during the debug process              */
-   
-   BEGIN      : origin = 0x000000, length = 0x000002     /* Boot to M0 will go here                      */
-   BOOT_RSVD  : origin = 0x000002, length = 0x00004E     /* Part of M0, BOOT rom will use this for stack */               
-   RAMM0      : origin = 0x000050, length = 0x0003B0
-
-   RAML0      : origin = 0x008000, length = 0x001000    
-   RAML1      : origin = 0x009000, length = 0x001000    
-   RAML2      : origin = 0x00A000, length = 0x001000    
-   RAML3      : origin = 0x00B000, length = 0x001000
-   ZONE7A     : origin = 0x200000, length = 0x00FC00     /* XINTF zone 7 - program space */ 
-   CSM_RSVD   : origin = 0x33FF80, length = 0x000076     /* Part of FLASHA.  Program with all 0x0000 when CSM is in use. */
-   CSM_PWL    : origin = 0x33FFF8, length = 0x000008     /* Part of FLASHA.  CSM password locations in FLASHA            */
-   ADC_CAL    : origin = 0x380080, length = 0x000009
-   RESET      : origin = 0x3FFFC0, length = 0x000002
-   IQTABLES   : origin = 0x3FE000, length = 0x000b50
-   IQTABLES2  : origin = 0x3FEB50, length = 0x00008c
-   FPUTABLES  : origin = 0x3FEBDC, length = 0x0006A0
-   BOOTROM    : origin = 0x3FF27C, length = 0x000D44  
-         
-
-         
-PAGE 1 : 
-   RAMM1      : origin = 0x000400, length = 0x000400     /* on-chip RAM block M1 */
-   RAML4      : origin = 0x00C000, length = 0x001000    
-   RAML5      : origin = 0x00D000, length = 0x001000    
-   RAML6      : origin = 0x00E000, length = 0x001000    
-   RAML7      : origin = 0x00F000, length = 0x001000   
-   ZONE7B     : origin = 0x20FC00, length = 0x000400     /* XINTF zone 7 - data space */
-}
- 
- 
-SECTIONS
-{
-   /* Setup for "boot to SARAM" mode: 
-      The codestart section (found in DSP28_CodeStartBranch.asm)
-      re-directs execution to the start of user code.  */
-   codestart        : > BEGIN,     PAGE = 0
-   ramfuncs         : > RAML0,     PAGE = 0  
-   .text            : > RAML1,     PAGE = 0
-   .cinit           : > RAML0,     PAGE = 0
-   .pinit           : > RAML0,     PAGE = 0
-   .switch          : > RAML0,     PAGE = 0
-   
-   .stack           : > RAMM1,     PAGE = 1
-   .ebss            : > RAML4,     PAGE = 1
-   .econst          : > RAML5,     PAGE = 1      
-   .esysmem         : > RAMM1,     PAGE = 1
-
-   IQmath           : > RAML1,     PAGE = 0
-   IQmathTables     : > IQTABLES,  PAGE = 0, TYPE = NOLOAD 
-   
-   /* Uncomment the section below if calling the IQNexp() or IQexp()
-      functions from the IQMath.lib library in order to utilize the 
-      relevant IQ Math table in Boot ROM (This saves space and Boot ROM 
-      is 1 wait-state). If this section is not uncommented, IQmathTables2
-      will be loaded into other memory (SARAM, Flash, etc.) and will take
-      up space, but 0 wait-state is possible.
-   */
-   /*
-   IQmathTables2    : > IQTABLES2, PAGE = 0, TYPE = NOLOAD 
-   {
-   
-              IQmath.lib<IQNexpTable.obj> (IQmathTablesRam)
-   
-   }
-   */
-   
-   FPUmathTables    : > FPUTABLES, PAGE = 0, TYPE = NOLOAD 
-   
-   DMARAML4         : > RAML4,     PAGE = 1
-   DMARAML5         : > RAML5,     PAGE = 1
-   DMARAML6         : > RAML6,     PAGE = 1
-   DMARAML7         : > RAML7,     PAGE = 1
-   
-   ZONE7DATA        : > ZONE7B,    PAGE = 1  
-   
-   .reset           : > RESET,     PAGE = 0, TYPE = DSECT /* not used                    */
-   csm_rsvd         : > CSM_RSVD   PAGE = 0, TYPE = DSECT /* not used for SARAM examples */
-   csmpasswds       : > CSM_PWL    PAGE = 0, TYPE = DSECT /* not used for SARAM examples */
-   
-   /* Allocate ADC_cal function (pre-programmed by factory into TI reserved memory) */
-   .adc_cal     : load = ADC_CAL,   PAGE = 0, TYPE = NOLOAD
-
-     
-}
-
-/*
-//===========================================================================
-// End of file.
-//===========================================================================
-*/
diff --git a/Source/External/v120/DSP2833x_common/cmd/F28332.cmd b/Source/External/v120/DSP2833x_common/cmd/F28332.cmd
deleted file mode 100644
index ecdc06e..0000000
--- a/Source/External/v120/DSP2833x_common/cmd/F28332.cmd
+++ /dev/null
@@ -1,197 +0,0 @@
-/*
-// TI File $Revision: /main/9 $
-// Checkin $Date: July 9, 2008   13:43:41 $
-//###########################################################################
-//
-// FILE:	F28332.cmd
-//
-// TITLE:	Linker Command File For F28332 Device
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-*/
-
-/* ======================================================
-// For Code Composer Studio V2.2 and later
-// ---------------------------------------
-// In addition to this memory linker command file, 
-// add the header linker command file directly to the project. 
-// The header linker command file is required to link the
-// peripheral structures to the proper locations within 
-// the memory map.
-//
-// The header linker files are found in <base>\DSP2833x_Headers\cmd
-//   
-// For BIOS applications add:      DSP2833x_Headers_BIOS.cmd
-// For nonBIOS applications add:   DSP2833x_Headers_nonBIOS.cmd    
-========================================================= */
-
-/* ======================================================
-// For Code Composer Studio prior to V2.2
-// --------------------------------------
-// 1) Use one of the following -l statements to include the 
-// header linker command file in the project. The header linker
-// file is required to link the peripheral structures to the proper 
-// locations within the memory map                                    */
-
-/* Uncomment this line to include file only for non-BIOS applications */
-/* -l DSP2833x_Headers_nonBIOS.cmd */
-
-/* Uncomment this line to include file only for BIOS applications */
-/* -l DSP2833x_Headers_BIOS.cmd */
-
-/* 2) In your project add the path to <base>\DSP2833x_headers\cmd to the
-   library search path under project->build options, linker tab, 
-   library search path (-i).
-/*========================================================= */
-
-/* Define the memory block start/length for the F28332  
-   PAGE 0 will be used to organize program sections
-   PAGE 1 will be used to organize data sections
-
-    Notes: 
-          Memory blocks on F28332 are uniform (ie same
-          physical memory) in both PAGE 0 and PAGE 1.  
-          That is the same memory region should not be
-          defined for both PAGE 0 and PAGE 1.
-          Doing so will result in corruption of program 
-          and/or data. 
-          
-          L0/L1/L2 and L3 memory blocks are mirrored - that is
-          they can be accessed in high memory or low memory.
-          For simplicity only one instance is used in this
-          linker file. 
-          
-          Contiguous SARAM memory blocks can be combined 
-          if required to create a larger memory block. 
- */
-
-
-MEMORY
-{
-PAGE 0:    /* Program Memory */
-           /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */
-
-   ZONE0       : origin = 0x004000, length = 0x001000     /* XINTF zone 0 */
-   RAML0       : origin = 0x008000, length = 0x001000     /* on-chip RAM block L0 */
-   RAML1       : origin = 0x009000, length = 0x001000     /* on-chip RAM block L1 */
-   RAML2       : origin = 0x00A000, length = 0x001000     /* on-chip RAM block L2 */
-   RAML3       : origin = 0x00B000, length = 0x001000     /* on-chip RAM block L3 */
-   ZONE6       : origin = 0x100000, length = 0x100000     /* XINTF zone 6 */ 
-   ZONE7A      : origin = 0x200000, length = 0x00FC00     /* XINTF zone 7 - program space */ 
-   FLASHD      : origin = 0x330000, length = 0x004000     /* on-chip FLASH */
-   FLASHC      : origin = 0x334000, length = 0x004000     /* on-chip FLASH */
-   FLASHA      : origin = 0x33C000, length = 0x003F80     /* on-chip FLASH */
-   CSM_RSVD    : origin = 0x33FF80, length = 0x000076     /* Part of FLASHA.  Program with all 0x0000 when CSM is in use. */
-   BEGIN       : origin = 0x33FFF6, length = 0x000002     /* Part of FLASHA.  Used for "boot to Flash" bootloader mode. */
-   CSM_PWL     : origin = 0x33FFF8, length = 0x000008     /* Part of FLASHA.  CSM password locations in FLASHA */
-   OTP         : origin = 0x380400, length = 0x000400     /* on-chip OTP */
-   ADC_CAL     : origin = 0x380080, length = 0x000009     /* ADC_cal function in Reserved memory */
-   
-   IQTABLES    : origin = 0x3FE000, length = 0x000b50     /* IQ Math Tables in Boot ROM */
-   IQTABLES2   : origin = 0x3FEB50, length = 0x00008c     /* IQ Math Tables in Boot ROM */  
-   FPUTABLES   : origin = 0x3FEBDC, length = 0x0006A0     /* FPU Tables in Boot ROM */
-   ROM         : origin = 0x3FF27C, length = 0x000D44     /* Boot ROM */        
-   RESET       : origin = 0x3FFFC0, length = 0x000002     /* part of boot ROM  */
-   VECTORS     : origin = 0x3FFFC2, length = 0x00003E     /* part of boot ROM  */
-
-PAGE 1 :   /* Data Memory */
-           /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE0 for program allocation */
-           /* Registers remain on PAGE1                                                  */
-   
-   BOOT_RSVD   : origin = 0x000000, length = 0x000050     /* Part of M0, BOOT rom will use this for stack */
-   RAMM0       : origin = 0x000050, length = 0x0003B0     /* on-chip RAM block M0 */
-   RAMM1       : origin = 0x000400, length = 0x000400     /* on-chip RAM block M1 */
-   RAML4       : origin = 0x00C000, length = 0x001000     /* on-chip RAM block L1 */
-   RAML5       : origin = 0x00D000, length = 0x001000     /* on-chip RAM block L1 */
-   ZONE7B      : origin = 0x20FC00, length = 0x0000400    /* XINTF zone 7 - data space */
-   FLASHB      : origin = 0x338000, length = 0x004000     /* on-chip FLASH */
-   
-}
-
-/* Allocate sections to memory blocks.
-   Note:
-         codestart user defined section in DSP28_CodeStartBranch.asm used to redirect code 
-                   execution when booting to flash
-         ramfuncs  user defined section to store functions that will be copied from Flash into RAM
-*/ 
- 
-SECTIONS
-{
- 
-   /* Allocate program areas: */
-   .cinit              : > FLASHA      PAGE = 0
-   .pinit              : > FLASHA,     PAGE = 0
-   .text               : > FLASHA      PAGE = 0
-   codestart           : > BEGIN       PAGE = 0
-   ramfuncs            : LOAD = FLASHD, 
-                         RUN = RAML0, 
-                         LOAD_START(_RamfuncsLoadStart),
-                         LOAD_END(_RamfuncsLoadEnd),
-                         RUN_START(_RamfuncsRunStart),
-                         PAGE = 0
-
-   csmpasswds          : > CSM_PWL     PAGE = 0
-   csm_rsvd            : > CSM_RSVD    PAGE = 0
-   
-   /* Allocate uninitalized data sections: */
-   .stack              : > RAMM1       PAGE = 1
-   .ebss               : > RAML4       PAGE = 1
-   .esysmem            : > RAMM1       PAGE = 1
-
-   /* Initalized sections go in Flash */
-   /* For SDFlash to program these, they must be allocated to page 0 */
-   .econst             : > FLASHA      PAGE = 0
-   .switch             : > FLASHA      PAGE = 0      
-
-   /* Allocate IQ math areas: */
-   IQmath              : > FLASHC      PAGE = 0                  /* Math Code */
-   IQmathTables     : > IQTABLES,  PAGE = 0, TYPE = NOLOAD 
-   
-   /* Uncomment the section below if calling the IQNexp() or IQexp()
-      functions from the IQMath.lib library in order to utilize the 
-      relevant IQ Math table in Boot ROM (This saves space and Boot ROM 
-      is 1 wait-state). If this section is not uncommented, IQmathTables2
-      will be loaded into other memory (SARAM, Flash, etc.) and will take
-      up space, but 0 wait-state is possible.
-   */
-   /*
-   IQmathTables2    : > IQTABLES2, PAGE = 0, TYPE = NOLOAD 
-   {
-   
-              IQmath.lib<IQNexpTable.obj> (IQmathTablesRam)
-   
-   }
-   */
-   
-   FPUmathTables    : > FPUTABLES, PAGE = 0, TYPE = NOLOAD 
-   
-   /* Allocate DMA-accessible RAM sections: */
-   DMARAML4         : > RAML4,     PAGE = 1
-   DMARAML5         : > RAML5,     PAGE = 1
-   
-   /* Allocate 0x400 of XINTF Zone 7 to storing data */
-   ZONE7DATA        : > ZONE7B,    PAGE = 1
-
-   /* .reset is a standard section used by the compiler.  It contains the */ 
-   /* the address of the start of _c_int00 for C Code.   /*
-   /* When using the boot ROM this section and the CPU vector */
-   /* table is not needed.  Thus the default type is set here to  */
-   /* DSECT  */ 
-   .reset              : > RESET,      PAGE = 0, TYPE = DSECT
-   vectors             : > VECTORS     PAGE = 0, TYPE = DSECT
-   
-   /* Allocate ADC_cal function (pre-programmed by factory into TI reserved memory) */
-   .adc_cal     : load = ADC_CAL,   PAGE = 0, TYPE = NOLOAD
-
-
-}
-
-/*
-//===========================================================================
-// End of file.
-//===========================================================================
-*/
-
diff --git a/Source/External/v120/DSP2833x_common/cmd/F28334.cmd b/Source/External/v120/DSP2833x_common/cmd/F28334.cmd
deleted file mode 100644
index ec4d6c3..0000000
--- a/Source/External/v120/DSP2833x_common/cmd/F28334.cmd
+++ /dev/null
@@ -1,203 +0,0 @@
-/*
-// TI File $Revision: /main/9 $
-// Checkin $Date: July 9, 2008   13:43:49 $
-//###########################################################################
-//
-// FILE:	F28334.cmd
-//
-// TITLE:	Linker Command File For F28334 Device
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-*/
-
-/* ======================================================
-// For Code Composer Studio V2.2 and later
-// ---------------------------------------
-// In addition to this memory linker command file, 
-// add the header linker command file directly to the project. 
-// The header linker command file is required to link the
-// peripheral structures to the proper locations within 
-// the memory map.
-//
-// The header linker files are found in <base>\DSP2833x_Headers\cmd
-//   
-// For BIOS applications add:      DSP2833x_Headers_BIOS.cmd
-// For nonBIOS applications add:   DSP2833x_Headers_nonBIOS.cmd    
-========================================================= */
-
-/* ======================================================
-// For Code Composer Studio prior to V2.2
-// --------------------------------------
-// 1) Use one of the following -l statements to include the 
-// header linker command file in the project. The header linker
-// file is required to link the peripheral structures to the proper 
-// locations within the memory map                                    */
-
-/* Uncomment this line to include file only for non-BIOS applications */
-/* -l DSP2833x_Headers_nonBIOS.cmd */
-
-/* Uncomment this line to include file only for BIOS applications */
-/* -l DSP2833x_Headers_BIOS.cmd */
-
-/* 2) In your project add the path to <base>\DSP2833x_headers\cmd to the
-   library search path under project->build options, linker tab, 
-   library search path (-i).
-/*========================================================= */
-
-/* Define the memory block start/length for the F28334  
-   PAGE 0 will be used to organize program sections
-   PAGE 1 will be used to organize data sections
-
-    Notes: 
-          Memory blocks on F28334 are uniform (ie same
-          physical memory) in both PAGE 0 and PAGE 1.  
-          That is the same memory region should not be
-          defined for both PAGE 0 and PAGE 1.
-          Doing so will result in corruption of program 
-          and/or data. 
-          
-          L0/L1/L2 and L3 memory blocks are mirrored - that is
-          they can be accessed in high memory or low memory.
-          For simplicity only one instance is used in this
-          linker file. 
-          
-          Contiguous SARAM memory blocks can be combined 
-          if required to create a larger memory block. 
- */
-
-
-MEMORY
-{
-PAGE 0:    /* Program Memory */
-           /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */
-
-   ZONE0       : origin = 0x004000, length = 0x001000     /* XINTF zone 0 */
-   RAML0       : origin = 0x008000, length = 0x001000     /* on-chip RAM block L0 */
-   RAML1       : origin = 0x009000, length = 0x001000     /* on-chip RAM block L1 */
-   RAML2       : origin = 0x00A000, length = 0x001000     /* on-chip RAM block L2 */
-   RAML3       : origin = 0x00B000, length = 0x001000     /* on-chip RAM block L3 */
-   ZONE6       : origin = 0x100000, length = 0x0100000    /* XINTF zone 6 */ 
-   ZONE7A      : origin = 0x200000, length = 0x000FC00    /* XINTF zone 7 - program space */ 
-   FLASHH      : origin = 0x320000, length = 0x004000     /* on-chip FLASH */
-   FLASHG      : origin = 0x324000, length = 0x004000     /* on-chip FLASH */
-   FLASHF      : origin = 0x328000, length = 0x004000     /* on-chip FLASH */
-   FLASHE      : origin = 0x32C000, length = 0x004000     /* on-chip FLASH */
-   FLASHD      : origin = 0x330000, length = 0x004000     /* on-chip FLASH */
-   FLASHC      : origin = 0x334000, length = 0x004000     /* on-chip FLASH */
-   FLASHA      : origin = 0x33C000, length = 0x003F80     /* on-chip FLASH */
-   CSM_RSVD    : origin = 0x33FF80, length = 0x000076     /* Part of FLASHA.  Program with all 0x0000 when CSM is in use. */
-   BEGIN       : origin = 0x33FFF6, length = 0x000002     /* Part of FLASHA.  Used for "boot to Flash" bootloader mode. */
-   CSM_PWL     : origin = 0x33FFF8, length = 0x000008     /* Part of FLASHA.  CSM password locations in FLASHA */
-   OTP         : origin = 0x380400, length = 0x000400     /* on-chip OTP */
-   ADC_CAL     : origin = 0x380080, length = 0x000009     /* ADC_cal function in Reserved memory */
-   
-   IQTABLES    : origin = 0x3FE000, length = 0x000b50     /* IQ Math Tables in Boot ROM */
-   IQTABLES2   : origin = 0x3FEB50, length = 0x00008c     /* IQ Math Tables in Boot ROM */  
-   FPUTABLES   : origin = 0x3FEBDC, length = 0x0006A0     /* FPU Tables in Boot ROM */
-   ROM         : origin = 0x3FF27C, length = 0x000D44     /* Boot ROM */          
-   RESET       : origin = 0x3FFFC0, length = 0x000002     /* part of boot ROM  */
-   VECTORS     : origin = 0x3FFFC2, length = 0x00003E     /* part of boot ROM  */
-
-PAGE 1 :   /* Data Memory */
-           /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE0 for program allocation */
-           /* Registers remain on PAGE1                                                  */
-   
-   BOOT_RSVD   : origin = 0x000000, length = 0x000050     /* Part of M0, BOOT rom will use this for stack */
-   RAMM0       : origin = 0x000050, length = 0x0003B0     /* on-chip RAM block M0 */
-   RAMM1       : origin = 0x000400, length = 0x000400     /* on-chip RAM block M1 */
-   RAML4       : origin = 0x00C000, length = 0x001000     /* on-chip RAM block L1 */
-   RAML5       : origin = 0x00D000, length = 0x001000     /* on-chip RAM block L1 */
-   RAML6       : origin = 0x00E000, length = 0x001000     /* on-chip RAM block L1 */
-   RAML7       : origin = 0x00F000, length = 0x001000     /* on-chip RAM block L1 */
-   ZONE7B      : origin = 0x20FC00, length = 0x000400     /* XINTF zone 7 - data space */
-   FLASHB      : origin = 0x338000, length = 0x004000     /* on-chip FLASH */
-}
-
-/* Allocate sections to memory blocks.
-   Note:
-         codestart user defined section in DSP28_CodeStartBranch.asm used to redirect code 
-                   execution when booting to flash
-         ramfuncs  user defined section to store functions that will be copied from Flash into RAM
-*/ 
- 
-SECTIONS
-{
- 
-   /* Allocate program areas: */
-   .cinit              : > FLASHA      PAGE = 0
-   .pinit              : > FLASHA,     PAGE = 0
-   .text               : > FLASHA      PAGE = 0
-   codestart           : > BEGIN       PAGE = 0
-   ramfuncs            : LOAD = FLASHD, 
-                         RUN = RAML0, 
-                         LOAD_START(_RamfuncsLoadStart),
-                         LOAD_END(_RamfuncsLoadEnd),
-                         RUN_START(_RamfuncsRunStart),
-                         PAGE = 0
-
-   csmpasswds          : > CSM_PWL     PAGE = 0
-   csm_rsvd            : > CSM_RSVD    PAGE = 0
-   
-   /* Allocate uninitalized data sections: */
-   .stack              : > RAMM1       PAGE = 1
-   .ebss               : > RAML4       PAGE = 1
-   .esysmem            : > RAMM1       PAGE = 1
-
-   /* Initalized sections go in Flash */
-   /* For SDFlash to program these, they must be allocated to page 0 */
-   .econst             : > FLASHA      PAGE = 0
-   .switch             : > FLASHA      PAGE = 0      
-
-   /* Allocate IQ math areas: */
-   IQmath              : > FLASHC      PAGE = 0                  /* Math Code */
-   IQmathTables     : > IQTABLES,  PAGE = 0, TYPE = NOLOAD 
-   
-   /* Uncomment the section below if calling the IQNexp() or IQexp()
-      functions from the IQMath.lib library in order to utilize the 
-      relevant IQ Math table in Boot ROM (This saves space and Boot ROM 
-      is 1 wait-state). If this section is not uncommented, IQmathTables2
-      will be loaded into other memory (SARAM, Flash, etc.) and will take
-      up space, but 0 wait-state is possible.
-   */
-   /*
-   IQmathTables2    : > IQTABLES2, PAGE = 0, TYPE = NOLOAD 
-   {
-   
-              IQmath.lib<IQNexpTable.obj> (IQmathTablesRam)
-   
-   }
-   */
-   
-   FPUmathTables    : > FPUTABLES, PAGE = 0, TYPE = NOLOAD 
-      
-   /* Allocate DMA-accessible RAM sections: */
-   DMARAML4         : > RAML4,     PAGE = 1
-   DMARAML5         : > RAML5,     PAGE = 1
-   DMARAML6         : > RAML6,     PAGE = 1
-   DMARAML7         : > RAML7,     PAGE = 1
-   
-   /* Allocate 0x400 of XINTF Zone 7 to storing data */
-   ZONE7DATA        : > ZONE7B,    PAGE = 1
-
-   /* .reset is a standard section used by the compiler.  It contains the */ 
-   /* the address of the start of _c_int00 for C Code.   /*
-   /* When using the boot ROM this section and the CPU vector */
-   /* table is not needed.  Thus the default type is set here to  */
-   /* DSECT  */ 
-   .reset              : > RESET,      PAGE = 0, TYPE = DSECT
-   vectors             : > VECTORS     PAGE = 0, TYPE = DSECT
-   
-   /* Allocate ADC_cal function (pre-programmed by factory into TI reserved memory) */
-   .adc_cal     : load = ADC_CAL,   PAGE = 0, TYPE = NOLOAD
-
-}
-
-/*
-//===========================================================================
-// End of file.
-//===========================================================================
-*/
-
diff --git a/Source/External/v120/DSP2833x_common/cmd/F28335.cmd b/Source/External/v120/DSP2833x_common/cmd/F28335.cmd
deleted file mode 100644
index b00d2a5..0000000
--- a/Source/External/v120/DSP2833x_common/cmd/F28335.cmd
+++ /dev/null
@@ -1,203 +0,0 @@
-/*
-// TI File $Revision: /main/10 $
-// Checkin $Date: July 9, 2008   13:43:56 $
-//###########################################################################
-//
-// FILE:	F28335.cmd
-//
-// TITLE:	Linker Command File For F28335 Device
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-*/
-
-/* ======================================================
-// For Code Composer Studio V2.2 and later
-// ---------------------------------------
-// In addition to this memory linker command file, 
-// add the header linker command file directly to the project. 
-// The header linker command file is required to link the
-// peripheral structures to the proper locations within 
-// the memory map.
-//
-// The header linker files are found in <base>\DSP2833x_Headers\cmd
-//   
-// For BIOS applications add:      DSP2833x_Headers_BIOS.cmd
-// For nonBIOS applications add:   DSP2833x_Headers_nonBIOS.cmd    
-========================================================= */
-
-/* ======================================================
-// For Code Composer Studio prior to V2.2
-// --------------------------------------
-// 1) Use one of the following -l statements to include the 
-// header linker command file in the project. The header linker
-// file is required to link the peripheral structures to the proper 
-// locations within the memory map                                    */
-
-/* Uncomment this line to include file only for non-BIOS applications */
-/* -l DSP2833x_Headers_nonBIOS.cmd */
-
-/* Uncomment this line to include file only for BIOS applications */
-/* -l DSP2833x_Headers_BIOS.cmd */
-
-/* 2) In your project add the path to <base>\DSP2833x_headers\cmd to the
-   library search path under project->build options, linker tab, 
-   library search path (-i).
-/*========================================================= */
-
-/* Define the memory block start/length for the F28335  
-   PAGE 0 will be used to organize program sections
-   PAGE 1 will be used to organize data sections
-
-    Notes: 
-          Memory blocks on F28335 are uniform (ie same
-          physical memory) in both PAGE 0 and PAGE 1.  
-          That is the same memory region should not be
-          defined for both PAGE 0 and PAGE 1.
-          Doing so will result in corruption of program 
-          and/or data. 
-          
-          L0/L1/L2 and L3 memory blocks are mirrored - that is
-          they can be accessed in high memory or low memory.
-          For simplicity only one instance is used in this
-          linker file. 
-          
-          Contiguous SARAM memory blocks can be combined 
-          if required to create a larger memory block. 
- */
-
-
-MEMORY
-{
-PAGE 0:    /* Program Memory */
-           /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */
-
-   ZONE0       : origin = 0x004000, length = 0x001000     /* XINTF zone 0 */
-   RAML0       : origin = 0x008000, length = 0x001000     /* on-chip RAM block L0 */
-   RAML1       : origin = 0x009000, length = 0x001000     /* on-chip RAM block L1 */
-   RAML2       : origin = 0x00A000, length = 0x001000     /* on-chip RAM block L2 */
-   RAML3       : origin = 0x00B000, length = 0x001000     /* on-chip RAM block L3 */
-   ZONE6       : origin = 0x0100000, length = 0x100000    /* XINTF zone 6 */ 
-   ZONE7A      : origin = 0x0200000, length = 0x00FC00    /* XINTF zone 7 - program space */ 
-   FLASHH      : origin = 0x300000, length = 0x008000     /* on-chip FLASH */
-   FLASHG      : origin = 0x308000, length = 0x008000     /* on-chip FLASH */
-   FLASHF      : origin = 0x310000, length = 0x008000     /* on-chip FLASH */
-   FLASHE      : origin = 0x318000, length = 0x008000     /* on-chip FLASH */
-   FLASHD      : origin = 0x320000, length = 0x008000     /* on-chip FLASH */
-   FLASHC      : origin = 0x328000, length = 0x008000     /* on-chip FLASH */
-   FLASHA      : origin = 0x338000, length = 0x007F80     /* on-chip FLASH */
-   CSM_RSVD    : origin = 0x33FF80, length = 0x000076     /* Part of FLASHA.  Program with all 0x0000 when CSM is in use. */
-   BEGIN       : origin = 0x33FFF6, length = 0x000002     /* Part of FLASHA.  Used for "boot to Flash" bootloader mode. */
-   CSM_PWL     : origin = 0x33FFF8, length = 0x000008     /* Part of FLASHA.  CSM password locations in FLASHA */
-   OTP         : origin = 0x380400, length = 0x000400     /* on-chip OTP */
-   ADC_CAL     : origin = 0x380080, length = 0x000009     /* ADC_cal function in Reserved memory */
-   
-   IQTABLES    : origin = 0x3FE000, length = 0x000b50     /* IQ Math Tables in Boot ROM */
-   IQTABLES2   : origin = 0x3FEB50, length = 0x00008c     /* IQ Math Tables in Boot ROM */  
-   FPUTABLES   : origin = 0x3FEBDC, length = 0x0006A0     /* FPU Tables in Boot ROM */
-   ROM         : origin = 0x3FF27C, length = 0x000D44     /* Boot ROM */        
-   RESET       : origin = 0x3FFFC0, length = 0x000002     /* part of boot ROM  */
-   VECTORS     : origin = 0x3FFFC2, length = 0x00003E     /* part of boot ROM  */
-
-PAGE 1 :   /* Data Memory */
-           /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE0 for program allocation */
-           /* Registers remain on PAGE1                                                  */
-   
-   BOOT_RSVD   : origin = 0x000000, length = 0x000050     /* Part of M0, BOOT rom will use this for stack */
-   RAMM0       : origin = 0x000050, length = 0x0003B0     /* on-chip RAM block M0 */
-   RAMM1       : origin = 0x000400, length = 0x000400     /* on-chip RAM block M1 */
-   RAML4       : origin = 0x00C000, length = 0x001000     /* on-chip RAM block L1 */
-   RAML5       : origin = 0x00D000, length = 0x001000     /* on-chip RAM block L1 */
-   RAML6       : origin = 0x00E000, length = 0x001000     /* on-chip RAM block L1 */
-   RAML7       : origin = 0x00F000, length = 0x001000     /* on-chip RAM block L1 */
-   ZONE7B      : origin = 0x20FC00, length = 0x000400     /* XINTF zone 7 - data space */
-   FLASHB      : origin = 0x330000, length = 0x008000     /* on-chip FLASH */
-}
-
-/* Allocate sections to memory blocks.
-   Note:
-         codestart user defined section in DSP28_CodeStartBranch.asm used to redirect code 
-                   execution when booting to flash
-         ramfuncs  user defined section to store functions that will be copied from Flash into RAM
-*/ 
- 
-SECTIONS
-{
- 
-   /* Allocate program areas: */
-   .cinit              : > FLASHA      PAGE = 0
-   .pinit              : > FLASHA,     PAGE = 0
-   .text               : > FLASHA      PAGE = 0
-   codestart           : > BEGIN       PAGE = 0
-   ramfuncs            : LOAD = FLASHD, 
-                         RUN = RAML0, 
-                         LOAD_START(_RamfuncsLoadStart),
-                         LOAD_END(_RamfuncsLoadEnd),
-                         RUN_START(_RamfuncsRunStart),
-                         PAGE = 0
-
-   csmpasswds          : > CSM_PWL     PAGE = 0
-   csm_rsvd            : > CSM_RSVD    PAGE = 0
-   
-   /* Allocate uninitalized data sections: */
-   .stack              : > RAMM1       PAGE = 1
-   .ebss               : > RAML4       PAGE = 1
-   .esysmem            : > RAMM1       PAGE = 1
-
-   /* Initalized sections go in Flash */
-   /* For SDFlash to program these, they must be allocated to page 0 */
-   .econst             : > FLASHA      PAGE = 0
-   .switch             : > FLASHA      PAGE = 0      
-
-   /* Allocate IQ math areas: */
-   IQmath              : > FLASHC      PAGE = 0                  /* Math Code */
-   IQmathTables     : > IQTABLES,  PAGE = 0, TYPE = NOLOAD 
-   
-   /* Uncomment the section below if calling the IQNexp() or IQexp()
-      functions from the IQMath.lib library in order to utilize the 
-      relevant IQ Math table in Boot ROM (This saves space and Boot ROM 
-      is 1 wait-state). If this section is not uncommented, IQmathTables2
-      will be loaded into other memory (SARAM, Flash, etc.) and will take
-      up space, but 0 wait-state is possible.
-   */
-   /*
-   IQmathTables2    : > IQTABLES2, PAGE = 0, TYPE = NOLOAD 
-   {
-   
-              IQmath.lib<IQNexpTable.obj> (IQmathTablesRam)
-   
-   }
-   */
-   
-   FPUmathTables    : > FPUTABLES, PAGE = 0, TYPE = NOLOAD 
-         
-   /* Allocate DMA-accessible RAM sections: */
-   DMARAML4         : > RAML4,     PAGE = 1
-   DMARAML5         : > RAML5,     PAGE = 1
-   DMARAML6         : > RAML6,     PAGE = 1
-   DMARAML7         : > RAML7,     PAGE = 1
-   
-   /* Allocate 0x400 of XINTF Zone 7 to storing data */
-   ZONE7DATA        : > ZONE7B,    PAGE = 1
-
-   /* .reset is a standard section used by the compiler.  It contains the */ 
-   /* the address of the start of _c_int00 for C Code.   /*
-   /* When using the boot ROM this section and the CPU vector */
-   /* table is not needed.  Thus the default type is set here to  */
-   /* DSECT  */ 
-   .reset              : > RESET,      PAGE = 0, TYPE = DSECT
-   vectors             : > VECTORS     PAGE = 0, TYPE = DSECT
-   
-   /* Allocate ADC_cal function (pre-programmed by factory into TI reserved memory) */
-   .adc_cal     : load = ADC_CAL,   PAGE = 0, TYPE = NOLOAD
-
-}
-
-/*
-//===========================================================================
-// End of file.
-//===========================================================================
-*/
-
diff --git a/Source/External/v120/DSP2833x_common/gel/f28232.gel b/Source/External/v120/DSP2833x_common/gel/f28232.gel
deleted file mode 100644
index 9ad95bf..0000000
--- a/Source/External/v120/DSP2833x_common/gel/f28232.gel
+++ /dev/null
@@ -1,2822 +0,0 @@
-/********************************************************************/
-/* f28232.gel                                                       */
-/* Version 3.30.2                                                   */
-/*                                                                  */
-/* This GEL file is to be used with the TMS320F28232 DSP.           */
-/* Changes may be required to support specific hardware designs.    */
-/*                                                                  */
-/* Code Composer Studio supports six reserved GEL functions that    */
-/* automatically get executed if they are defined. They are:        */
-/*                                                                  */
-/* StartUp()              - Executed whenever CCS is invoked        */
-/* OnReset()              - Executed after Debug->Reset CPU         */
-/* OnRestart()            - Executed after Debug->Restart           */
-/* OnPreFileLoaded()      - Executed before File->Load Program      */
-/* OnFileLoaded()         - Executed after File->Load Program       */
-/* OnTargetConnect()      - Executed after Debug->Connect           */
-/*                                                                  */
-/********************************************************************/
-
-StartUp()
-{
-
-/* The next line automatically loads the .gel file that comes   */
-/* with the DSP2833x Peripheral Header Files download.  To use, */
-/* uncomment, and adjust the directory path as needed.          */
-//  GEL_LoadGel("c:\\CCStudio_v3.3\\cc\\gel\\DSP2833x_Peripheral.gel");
-
-}
-
-OnReset(int nErrorCode)
-{
-    C28x_Mode();
-    Unlock_CSM();
-    ADC_Cal();
-}
-
-OnRestart(int nErrorCode)
-{
-/* CCS will call OnRestart() when you do a Debug->Restart and   */
-/* after you load a new file.  Between running interrupt based  */
-/* programs, this function will clear interrupts and help keep  */
-/* the processor from going off into invalid memory.            */
-     C28x_Mode();
-     IER = 0;
-     IFR = 0;
-     ADC_Cal();
-}
-
-int TxtOutCtl=0;
-OnPreFileLoaded()
-{
-    XINTF_Enable();
-    if (TxtOutCtl==0)
-    {
-     GEL_TextOut("\nNOTES:\nGel will enable XINTFx16 during Debug only.\nEnable XINTF in code prior to use.");
-	 TxtOutCtl=1;
-    }
-}
-
-OnFileLoaded(int nErrorCode, int bSymbolsOnly)
-{
-    ADC_Cal();
-}
-
-OnTargetConnect()
-{
-    C28x_Mode();
-    F28232_Memory_Map();            /* Initialize the CCS memory map */
-
-/* Check to see if CCS has been started-up with the DSP already */
-/* running in real-time mode.  The user can add whatever        */
-/* custom initialization stuff they want to each case.          */
-
-    if (GEL_IsInRealtimeMode())     /* Do real-time mode target initialization */
-    {
-
-    }
-    else                            /* Do stop-mode target initialization */
-    {
-        GEL_Reset();                /* Reset DSP */
-    }
-
-}
-
-
-/********************************************************************/
-/* These functions are launched by the GEL_Toolbar button plugin    */
-/********************************************************************/
-GEL_Toolbar1()
-{
-    Run_Realtime_with_Reset();
-}
-GEL_Toolbar2()
-{
-    Run_Realtime_with_Restart();
-}
-GEL_Toolbar3()
-{
-    Full_Halt();
-}
-GEL_Toolbar4()
-{
-    Full_Halt_with_Reset();
-}
-
-int GEL_Toolbar5_Toggle = 0;
-GEL_Toolbar5()
-{
-    if(GEL_Toolbar5_Toggle == 0)
-    {
-        GEL_Toolbar5_Toggle = 1;
-        GEL_OpenWindow("GEL_Buttons",1,4);
-        GEL_TextOut("Button 1: Run_Realtime_with_Reset()","GEL_Buttons",0,0);
-        GEL_TextOut("Button 2: Run_Realtime_with_Restart()","GEL_Buttons",0,1);
-        GEL_TextOut("Button 3: Full_Halt()", "GEL_Buttons",0,2);
-        GEL_TextOut("Button 4: Full_Halt_with_Reset()","GEL_Buttons",0,3);
-    }
-    else
-    {
-        GEL_Toolbar5_Toggle = 0;
-        GEL_CloseWindow("GEL_Buttons");
-    }
-}
-
-
-/********************************************************************/
-/* These functions are useful to engage/dis-enagage realtime        */
-/* emulation mode during debug.  They save the user from having to  */
-/* manually perform these steps in CCS.                             */
-/********************************************************************/
-menuitem "Realtime Emulation Control";
-
-hotmenu Run_Realtime_with_Reset()
-{
-    GEL_Reset();                /* Reset the DSP */
-    ST1 = ST1 & 0xFFFD;         /* clear DBGM bit in ST1 */
-    GEL_EnableRealtime();       /* Enable Realtime mode */
-    GEL_Run();                  /* Run the DSP */
-}
-hotmenu Run_Realtime_with_Restart()
-{
-    GEL_Restart();              /* Reset the DSP */
-    ST1 = ST1 & 0xFFFD;         /* clear DBGM bit in ST1 */
-    GEL_EnableRealtime();       /* Enable Realtime mode */
-    GEL_Run();                  /* Run the DSP */
-}
-hotmenu Full_Halt()
-{
-    GEL_DisableRealtime();      /* Disable Realtime mode */
-    GEL_Halt();                 /* Halt the DSP */
-}
-hotmenu Full_Halt_with_Reset()
-{
-    GEL_DisableRealtime();      /* Disable Realtime mode */
-    GEL_Halt();                 /* Halt the DSP */
-    GEL_Reset();                /* Reset the DSP */
-}
-
-
-/********************************************************************/
-/*                         F28232 Memory Map                        */
-/*                                                                  */
-/*   Note: M0M1MAP and VMAP signals tied high on F28232 core        */
-/*                                                                  */
-/*   0x000000 - 0x0003ff   M0 SARAM                (Prog and Data)  */
-/*   0x000400 - 0x0007ff   M1 SARAM                (Prog and Data)  */
-/*   0x000800 - 0x001fff   Peripheral Frame0 (PF0) (Data only)      */
-/*   0x004000 - 0x004fff   XINTF Zone 0            (Prog and Data)  */
-/*   0x005000 - 0x005fff   Peripheral Frame3 (PF3) (Data only)      */
-/*   0x006000 - 0x006fff   Peripheral Frame1 (PF1) (Data only)      */
-/*   0x007000 - 0x007fff   Peripheral Frame2 (PF2) (Data only)      */
-/*   0x008000 - 0x008fff   L0 SARAM                (Prog and Data)  */
-/*   0x009000 - 0x009fff   L1 SARAM                (Prog and Data)  */
-/*   0x00A000 - 0x00Afff   L2 SARAM                (Prog and Data)  */
-/*   0x00B000 - 0x00Bfff   L3 SARAM                (Prog and Data)  */
-/*   0x00C000 - 0x00Cfff   L4 SARAM                (Prog and Data)  */
-/*   0x00D000 - 0x00Dfff   L5 SARAM                (Prog and Data)  */
-/*   0x100000 - 0x1fffff   XINTF Zone 6            (Prog and Data)  */
-/*   0x200000 - 0x2fffff   XINTF Zone 7            (Prog and Data)  */
-/*   0x330000 - 0x33ffff   Flash                   (Prog and Data)  */
-/*   0x380080 - 0x380088   ADC_cal function        (Prog and Data)  */
-/*   0x380090 - 0x380090   PARTID value            (Prog and Data)  */
-/*   0x380400 - 0x3807ff   OTP                     (Prog and Data)  */
-/*   0x3f8000 - 0x3f8fff   L0 SARAM                (Prog and Data)  */
-/*   0x3f9000 - 0x3f9fff   L1 SARAM                (Prog and Data)  */
-/*   0x3fA000 - 0x3fAfff   L2 SARAM                (Prog and Data)  */
-/*   0x3fB000 - 0x3fBfff   L3 SARAM                (Prog and Data)  */
-/*   0x3fe000 - 0x3fffff   BOOT ROM                (Prog and Data)  */
-/********************************************************************/
-menuitem "Initialize Memory Map";
-
-hotmenu F28232_Memory_Map()
-{
-    GEL_MapReset();
-    GEL_MapOn();
-
-    /* Program memory map */
-    GEL_MapAdd(0x0,0,0x400,1,1);                 /* M0 SARAM        */
-    GEL_MapAdd(0x400,0,0x400,1,1);               /* M1 SARAM        */
-    GEL_MapAdd(0x4000,0,0x1000,1,1);             /* Zone 0          */
-    GEL_MapAdd(0x8000,0,0x1000,1,1);             /* L0 SARAM        */
-    GEL_MapAdd(0x9000,0,0x1000,1,1);             /* L1 SARAM        */
-    GEL_MapAdd(0xA000,0,0x1000,1,1);             /* L2 SARAM        */
-    GEL_MapAdd(0xB000,0,0x1000,1,1);             /* L3 SARAM        */
-    GEL_MapAdd(0xC000,0,0x1000,1,1);             /* L4 SARAM        */
-    GEL_MapAdd(0xD000,0,0x1000,1,1);             /* L5 SARAM        */
-    GEL_MapAdd(0x100000,0,0x100000,1,1);         /* Zone 6          */
-    GEL_MapAdd(0x200000,0,0x100000,1,1);         /* Zone 7          */
-    GEL_MapAdd(0x330000,0,0x10000,1,0);          /* FLASH           */
-    GEL_MapAdd(0x380080,0,0x00009,1,0);          /* ADC_cal function*/
-    GEL_MapAdd(0x380090,0,0x00001,1,0);          /* PARTID value    */
-    GEL_MapAdd(0x380400,0,0x00400,1,0);          /* OTP             */
-    GEL_MapAdd(0x3f8000,0,0x1000,1,1);           /* L0 SARAM Mirror */
-    GEL_MapAdd(0x3f9000,0,0x1000,1,1);           /* L1 SARAM Mirror */
-    GEL_MapAdd(0x3fA000,0,0x1000,1,1);           /* L2 SARAM Mirror */
-    GEL_MapAdd(0x3fb000,0,0x1000,1,1);           /* L3 SARAM Mirror */
-    GEL_MapAdd(0x3fe000,0,0x2000,1,0);           /* BOOT ROM        */
-
-    /* Data memory map */
-    GEL_MapAdd(0x000,1,0x400,1,1);               /* M0 SARAM        */
-    GEL_MapAdd(0x400,1,0x400,1,1);               /* M1 SARAM        */
-    GEL_MapAdd(0x800,1,0x1800,1,1);              /* PF0             */
-    GEL_MapAdd(0x4000,1,0x1000,1,1);             /* Zone 0          */
-    GEL_MapAdd(0x5000,1,0x1000,1,1);             /* PF3             */
-    GEL_MapAdd(0x6000,1,0x1000,1,1);             /* PF1             */
-    GEL_MapAddStr(0x7000,1,0x1000,"R|W|AS2",0);  /* PF2             */
-    GEL_MapAdd(0x8000,1,0x1000,1,1);             /* L0 SARAM        */
-    GEL_MapAdd(0x9000,1,0x1000,1,1);             /* L1 SARAM        */
-    GEL_MapAdd(0xA000,1,0x1000,1,1);             /* L2 SARAM        */
-    GEL_MapAdd(0xB000,1,0x1000,1,1);             /* L3 SARAM        */
-    GEL_MapAdd(0xC000,1,0x1000,1,1);             /* L4 SARAM        */
-    GEL_MapAdd(0xD000,1,0x1000,1,1);             /* L5 SARAM        */
-    GEL_MapAdd(0x100000,1,0x100000,1,1);         /* Zone 6          */
-    GEL_MapAdd(0x200000,1,0x100000,1,1);         /* Zone 7          */
-    GEL_MapAdd(0x330000,1,0x10000,1,0);          /* FLASH           */
-    GEL_MapAdd(0x380080,1,0x00009,1,0);          /* ADC_cal function*/
-    GEL_MapAdd(0x380090,1,0x00001,1,0);          /* PARTID value    */
-    GEL_MapAdd(0x380400,1,0x00400,1,0);          /* OTP             */
-    GEL_MapAdd(0x3f8000,1,0x1000,1,1);           /* L0 SARAM Mirror */
-    GEL_MapAdd(0x3f9000,1,0x1000,1,1);           /* L1 SARAM Mirror */
-    GEL_MapAdd(0x3fA000,1,0x1000,1,1);           /* L2 SARAM Mirror */
-    GEL_MapAdd(0x3fb000,1,0x1000,1,1);           /* L3 SARAM Mirror */
-    GEL_MapAdd(0x3fe000,1,0x2000,1,0);           /* BOOT ROM        */
-}
-
-
-/********************************************************************/
-/* The ESTOP0 fill functions are useful for debug.  They fill the   */
-/* RAM with software breakpoints that will trap runaway code.       */
-/********************************************************************/
-hotmenu Fill_F28232_RAM_with_ESTOP0()
-{
-    GEL_MemoryFill(0x000000,1,0x000800,0x7625);      /* Fill M0/M1  */
-    GEL_MemoryFill(0x008000,1,0x002000,0x7625);      /* Fill L0/L1  */
-    GEL_MemoryFill(0x00A000,1,0x002000,0x7625);      /* Fill L2/L3  */
-    GEL_MemoryFill(0x00C000,1,0x002000,0x7625);      /* Fill L4/L5  */
-}
-
-
-/********************************************************************/
-menuitem "Watchdog";
-hotmenu Disable_WD()
-{
-    *0x7029 = *0x7029 | 0x0068;                /* Set the WDDIS bit */
-    *0x7025 = 0x0055;                          /* Service the WD    */
-    *0x7025 = 0x00AA;                          /*  once to be safe. */
-    GEL_TextOut("\nWatchdog Timer Disabled");
-}
-
-
-/********************************************************************/
-menuitem "Code Security Module"
-hotmenu Unlock_CSM()
-{
-    /* Perform dummy reads of the password locations */
-    XAR0 = *0x33FFF8;
-    XAR0 = *0x33FFF9;
-    XAR0 = *0x33FFFA;
-    XAR0 = *0x33FFFB;
-    XAR0 = *0x33FFFC;
-    XAR0 = *0x33FFFD;
-    XAR0 = *0x33FFFE;
-    XAR0 = *0x33FFFF;
-
-    /* Write passwords to the KEY registers.  0xFFFF's are dummy passwords.
-       User should replace them with the correct password for their DSP */
-    *0xAE0 = 0xFFFF;
-    *0xAE1 = 0xFFFF;
-    *0xAE2 = 0xFFFF;
-    *0xAE3 = 0xFFFF;
-    *0xAE4 = 0xFFFF;
-    *0xAE5 = 0xFFFF;
-    *0xAE6 = 0xFFFF;
-    *0xAE7 = 0xFFFF;
-}
-
-
-/********************************************************************/
-menuitem "Addressing Modes";
-hotmenu C28x_Mode()
-{
-    ST1 = ST1 & (~0x0100);      /*   AMODE = 0  */
-    ST1 = ST1 | 0x0200;         /* OBJMODE = 1  */
-}
-hotmenu C24x_Mode()
-{
-    ST1 = ST1 | 0x0100;         /*   AMODE = 1  */
-    ST1 = ST1 | 0x0200;         /* OBJMODE = 1  */
-}
-hotmenu C27x_Mode()
-{
-    ST1 = ST1 & (~0x0100);      /*   AMODE = 0  */
-    ST1 = ST1 & (~0x0200);      /* OBJMODE = 0  */
-}
-
-
-/********************************************************************/
-/*                            PLL Ratios                            */
-/*                                                                  */
-/* The following table describes the PLL clocking ratios (0..10)    */
-/*                                                                  */
-/*   Ratio        CLKIN         Description                         */
-/*   -----    --------------    ------------                        */
-/*     0      OSCCLK/2          PLL bypassed                        */
-/*     1      (OSCCLK * 1)/2    10 Mhz for 20 Mhz CLKIN             */
-/*     2      (OSCCLK * 2)/2    20 Mhz for 20 Mhz CLKIN             */
-/*     3      (OSCCLK * 3)/2    30 Mhz for 20 Mhz CLKIN             */
-/*     4      (OSCCLK * 4)/2    40 Mhz for 20 Mhz CLKIN             */
-/*     5      (OSCCLK * 5)/2    50 Mhz for 20 Mhz CLKIN             */
-/*     6      (OSCCLK * 6)/2    60 Mhz for 20 Mhz CLKIN             */
-/*     7      (OSCCLK * 7)/2    70 Mhz for 20 Mhz CLKIN             */
-/*     8      (OSCCLK * 8)/2    80 Mhz for 20 Mhz CLKIN             */
-/*     9      (OSCCLK * 9)/2    90 Mhz for 20 Mhz CLKIN             */
-/*    10      (OSCCLK * 10)/2  100 Mhz for 20 Mhz CLKIN             */
-/********************************************************************/
-menuitem "Set PLL Ratio";
-
-hotmenu Bypass()
-{
-    DIVSEL_div2();     /* DIVSEL = 1/2                      */
-    *0x7021 = 0;       /* CLKIN = OSCCLK/2, PLL is bypassed */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x1_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 1;      /* CLKIN = (OSCCLK * 1)/2 */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x2_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 2;      /* CLKIN = (OSCCLK * 2)/2 */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x3_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 3;      /* CLKIN = (OSCCLK * 3)/2 */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x4_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 4;      /* CLKIN = (OSCCLK * 4)/2 */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x5_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 5;      /* CLKIN = (OSCCLK * 5)/2 */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x6_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 6;      /* CLKIN = (OSCCLK * 6)/2 */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x7_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 7;      /* CLKIN = (OSCCLK * 7)/2 */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x8_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 8;      /* CLKIN = (OSCCLK * 8)/2 */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x9_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 9;      /* CLKIN = (OSCCLK * 9)/2 */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x10_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 10;     /* CLKIN = (OSCCLK * 10)/2 */
-    PLL_Wait();
-}
-// hotmenu OSCCLK_x1_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 1;      /* CLKIN = (OSCCLK * 1)/1 */
-//     PLL_Wait();
-// }
-// hotmenu OSCCLK_x2_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 2;      /* CLKIN = (OSCCLK * 2)/1 */
-//     PLL_Wait();
-// }
-// hotmenu OSCCLK_x3_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 3;      /* CLKIN = (OSCCLK * 3)/1 */
-//     PLL_Wait();
-// }
-// hotmenu OSCCLK_x4_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 4;      /* CLKIN = (OSCCLK * 4)/1 */
-//     PLL_Wait();
-// }
-// hotmenu OSCCLK_x5_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 5;      /* CLKIN = (OSCCLK * 5)/1 */
-//     PLL_Wait();
-// }
-// hotmenu OSCCLK_x6_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 6;      /* CLKIN = (OSCCLK * 6)/1 */
-//     PLL_Wait();
-// }
-// hotmenu OSCCLK_x7_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 7;      /* CLKIN = (OSCCLK * 7)/1 */
-//     PLL_Wait();
-// }
-// hotmenu OSCCLK_x8_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 8;      /* CLKIN = (OSCCLK * 8)/1 */
-//     PLL_Wait();
-// }
-// hotmenu OSCCLK_x9_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 9;      /* CLKIN = (OSCCLK * 9)/1 */
-//     PLL_Wait();
-// }
-// hotmenu OSCCLK_x10_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 10;     /* CLKIN = (OSCCLK * 10)/1 */
-//     PLL_Wait();
-// }
-
-
-
-/********************************************************************/
-/* For F2823x devices, DIVSEL is 1/4 by default.  Switch it to 1/2  */
-/********************************************************************/
-
-DIVSEL_div2()
-{
-    int temp;
-    int PLLSTS;
-
-    PLLSTS = 0x7011;
-
-    temp  = *PLLSTS; 
-    temp &=  0xFE7F;   /* Clear bits 7 & 8 */
-    temp |= 2 << 7;    /* Set bit 8        */
-    *PLLSTS = temp;    /* Switch to 1/2    */
-}
-
-
-
-/********************************************************************/
-/* For F2823x devices, DIVSEL is 1/4 by default.  Switch it to /1   */
-/********************************************************************/
-
-DIVSEL_div1()
-{
-    int temp;
-    int PLLSTS;
-
-    PLLSTS = 0x7011;
-    
-    DIVSEL_div2();     /* First switch DIVSEL to 1/2 and wait */
-    wait();  
-    temp  = *PLLSTS; 
-    temp |= 3 << 7;    /* Set bits 7 & 8   */
-    *PLLSTS = temp;    /* Switch to 1/2    */
-}
-
-wait()
-{
-    int delay = 0;
-    for (delay = 0; delay <= 5; delay ++)
-    {}
-}
-
-/********************************************************************/
-/* For F2823x devices, check the PLLOCKS bit for PLL lock.          */
-/********************************************************************/
-PLL_Wait()
-{
-    int PLLSTS;
-    int delay = 0;
-
-    PLLSTS = 0x7011;
-    
-    
-    while ( ( (unsigned int)*PLLSTS & 0x0001) != 0x0001)
-    {
-        delay++;
-        GEL_TextOut("Waiting for PLL Lock, PLLSTS = %x\n",,,,,(unsigned int)*PLLSTS);
-    }
-    GEL_TextOut("\nPLL lock complete, PLLSTS = %x\n",,,,,(unsigned int)*PLLSTS);
-}
-
-
-/********************************************************************/
-/* Load the ADC Calibration values from TI OTP                      */
-/********************************************************************/
-menuitem "ADC Calibration"
-hotmenu ADC_Cal()
-{
-    /* Perform dummy reads of the password locations */
-    XAR0 = *0x33FFF8;
-    XAR0 = *0x33FFF9;
-    XAR0 = *0x33FFFA;
-    XAR0 = *0x33FFFB;
-    XAR0 = *0x33FFFC;
-    XAR0 = *0x33FFFD;
-    XAR0 = *0x33FFFE;
-    XAR0 = *0x33FFFF;
-
-    if(((*0x0AEF) & 0x0001) == 0)
-    {
-        XAR0 = *0x701C;
-        *0x701C |= 0x0008;  
-	*0x711C = *0x380083;
-        *0x711D = *0x380085;
-        *0x701C = XAR0;
-	XAR0 = 0;
-       
-     } 
-     else
-     {
-        GEL_TextOut("\nADC Calibration not complete, device is secure"); 
-     }
-}
-
-/********************************************************************/
-/* Enable the XINTF and configure GPIOs for XINTF function          */
-/********************************************************************/
-menuitem "XINTF Enable"
-hotmenu XINTF_Enable()
-{
-
-   /* enable XINTF clock (XTIMCLK) */
-
-   *0x7020 = 0x3700;                          
-   /* GPBMUX1: XA0-XA7, XA16, XZCS0,        */
-   /*          XZCS7, XREADY, XRNW, XWE0    */
-   /* GPAMUX2: XA17-XA19, XZCS6             */
-   /* GPCMUX2: XA8-XA15                     */         
-   /* GPCMUX1: XD0-XD15                     */
-   *(unsigned long *)0x6F96 = 0xFFFFFFC0;   /* GPBMUX1 */
-   *(unsigned long *)0x6f88 = 0xFF000000;   /* GPAMUX2 */  
-   *(unsigned long *)0x6FA8 = 0x0000AAAA;   /* GPCMUX2 */  
-   *(unsigned long *)0x6FA6 = 0xAAAAAAAA;   /* GPCMUX1 */
-
-   /* Uncomment for x32 data bus            */
-   /* GPBMUX2: XD16-XD31                    */
-// *(unsigned long *)0x6F98 = 0xFFFFFFFF;   /* GPBMUX2 */ 
-   
-   /* Zone timing.  
-   /* Each zone can be configured seperately */
-   /* Uncomment the x16 or the x32 timing    */
-   /* depending on the data bus width for    */
-   /* the zone                               */
-
-   /* x16 Timing */
-   *(unsigned long *)0x0B20 = 0x0043FFFF;    /* Zone0 */
-   *(unsigned long *)0x0B2C = 0x0043FFFF;    /* Zone6 */
-   *(unsigned long *)0x0B2E = 0x0043FFFF;    /* Zone7 */
-
-   /* x32 Timing:
-// *(unsigned long *)0x0B20 = 0x0041FFFF;    /* x32 */
-// *(unsigned long *)0x0B2C = 0x0041FFFF;    /* x32 */
-// *(unsigned long *)0x0B2E = 0x0041FFFF;    /* x32 */
-
-}
-
-/********************************************************************/
-/* The below are used to display the symbolic names of the F28232   */
-/* memory mapped registers in the watch window. To view these       */
-/* registers, click on the GEL menu button in Code Composer Studio, */
-/* then select which registers or groups of registers you want to   */
-/* view. They will appear in the watch window under the Watch1 tab. */
-/********************************************************************/
-
-/* Add a space line to the GEL menu */
-menuitem "______________________________________";
-hotmenu __() {}
-
-/********************************************************************/
-/* A/D Converter Registers                                          */
-/********************************************************************/
-menuitem "Watch ADC Registers";
-
-hotmenu All_ADC_Regs()
-{
-    GEL_WatchAdd("*0x7100,x","ADCTRL1");
-    GEL_WatchAdd("*0x7101,x","ADCTRL2");
-    GEL_WatchAdd("*0x7102,x","ADCMAXCONV");
-    GEL_WatchAdd("*0x7103,x","ADCCHSELSEQ1");
-    GEL_WatchAdd("*0x7104,x","ADCCHSELSEQ2");
-    GEL_WatchAdd("*0x7105,x","ADCCHSELSEQ3");
-    GEL_WatchAdd("*0x7106,x","ADCCHSELSEQ4");
-    GEL_WatchAdd("*0x7107,x","ADCASEQSR");
-    GEL_WatchAdd("*0x7108,x","ADCRESULT0");
-    GEL_WatchAdd("*0x7109,x","ADCRESULT1");
-    GEL_WatchAdd("*0x710A,x","ADCRESULT2");
-    GEL_WatchAdd("*0x710B,x","ADCRESULT3");
-    GEL_WatchAdd("*0x710C,x","ADCRESULT4");
-    GEL_WatchAdd("*0x710D,x","ADCRESULT5");
-    GEL_WatchAdd("*0x710E,x","ADCRESULT6");
-    GEL_WatchAdd("*0x710F,x","ADCRESULT7");
-    GEL_WatchAdd("*0x7110,x","ADCRESULT8");
-    GEL_WatchAdd("*0x7111,x","ADCRESULT9");
-    GEL_WatchAdd("*0x7112,x","ADCRESULT10");
-    GEL_WatchAdd("*0x7113,x","ADCRESULT11");
-    GEL_WatchAdd("*0x7114,x","ADCRESULT12");
-    GEL_WatchAdd("*0x7115,x","ADCRESULT13");
-    GEL_WatchAdd("*0x7116,x","ADCRESULT14");
-    GEL_WatchAdd("*0x7117,x","ADCRESULT15");
-    GEL_WatchAdd("*0x7118,x","ADCTRL3");
-    GEL_WatchAdd("*0x7119,x","ADCST");
-    GEL_WatchAdd("*0x711C,x","ADCREFSEL");
-    GEL_WatchAdd("*0x711D,x","ADCOFFTRIM");
-
-    GEL_WatchAdd("*0x0B00,x","ADCRESULT0 Mirror");
-    GEL_WatchAdd("*0x0B01,x","ADCRESULT1 Mirror");
-    GEL_WatchAdd("*0x0B02,x","ADCRESULT2 Mirror");
-    GEL_WatchAdd("*0x0B03,x","ADCRESULT3 Mirror");
-    GEL_WatchAdd("*0x0B04,x","ADCRESULT4 Mirror");
-    GEL_WatchAdd("*0x0B05,x","ADCRESULT5 Mirror");
-    GEL_WatchAdd("*0x0B06,x","ADCRESULT6 Mirror");
-    GEL_WatchAdd("*0x0B07,x","ADCRESULT7 Mirror");
-    GEL_WatchAdd("*0x0B08,x","ADCRESULT8 Mirror");
-    GEL_WatchAdd("*0x0B09,x","ADCRESULT9 Mirror");
-    GEL_WatchAdd("*0x0B0A,x","ADCRESULT10 Mirror");
-    GEL_WatchAdd("*0x0B0B,x","ADCRESULT11 Mirror");
-    GEL_WatchAdd("*0x0B0C,x","ADCRESULT12 Mirror");
-    GEL_WatchAdd("*0x0B0D,x","ADCRESULT13 Mirror");
-    GEL_WatchAdd("*0x0B0E,x","ADCRESULT14 Mirror");
-    GEL_WatchAdd("*0x0B0F,x","ADCRESULT15 Mirror");
-}
-hotmenu ADC_Control_Regs()
-{
-    GEL_WatchAdd("*0x7100,x","ADCTRL1");
-    GEL_WatchAdd("*0x7101,x","ADCTRL2");
-    GEL_WatchAdd("*0x7102,x","ADCMAXCONV");
-    GEL_WatchAdd("*0x7107,x","ADCASEQSR");
-    GEL_WatchAdd("*0x7118,x","ADCTRL3");
-    GEL_WatchAdd("*0x7119,x","ADCST");
-    GEL_WatchAdd("*0x711C,x","ADCREFSEL");
-    GEL_WatchAdd("*0x711D,x","ADCOFFTRIM");
-}
-hotmenu ADCCHSELSEQx_Regs()
-{
-    GEL_WatchAdd("*0x7103,x","ADCCHSELSEQ1");
-    GEL_WatchAdd("*0x7104,x","ADCCHSELSEQ2");
-    GEL_WatchAdd("*0x7105,x","ADCCHSELSEQ3");
-    GEL_WatchAdd("*0x7106,x","ADCCHSELSEQ4");
-}
-hotmenu ADCRESULT_0_to_7()
-{
-    GEL_WatchAdd("*0x7108,x","ADCRESULT0");
-    GEL_WatchAdd("*0x7109,x","ADCRESULT1");
-    GEL_WatchAdd("*0x710A,x","ADCRESULT2");
-    GEL_WatchAdd("*0x710B,x","ADCRESULT3");
-    GEL_WatchAdd("*0x710C,x","ADCRESULT4");
-    GEL_WatchAdd("*0x710D,x","ADCRESULT5");
-    GEL_WatchAdd("*0x710E,x","ADCRESULT6");
-    GEL_WatchAdd("*0x710F,x","ADCRESULT7");
-}
-hotmenu ADCRESULT_8_to_15()
-{
-    GEL_WatchAdd("*0x7110,x","ADCRESULT8");
-    GEL_WatchAdd("*0x7111,x","ADCRESULT9");
-    GEL_WatchAdd("*0x7112,x","ADCRESULT10");
-    GEL_WatchAdd("*0x7113,x","ADCRESULT11");
-    GEL_WatchAdd("*0x7114,x","ADCRESULT12");
-    GEL_WatchAdd("*0x7115,x","ADCRESULT13");
-    GEL_WatchAdd("*0x7116,x","ADCRESULT14");
-    GEL_WatchAdd("*0x7117,x","ADCRESULT15");
-}
-hotmenu ADCRESULT_Mirror_0_to_7()
-{
-    GEL_WatchAdd("*0x0B00,x","ADCRESULT0 Mirror");
-    GEL_WatchAdd("*0x0B01,x","ADCRESULT1 Mirror");
-    GEL_WatchAdd("*0x0B02,x","ADCRESULT2 Mirror");
-    GEL_WatchAdd("*0x0B03,x","ADCRESULT3 Mirror");
-    GEL_WatchAdd("*0x0B04,x","ADCRESULT4 Mirror");
-    GEL_WatchAdd("*0x0B05,x","ADCRESULT5 Mirror");
-    GEL_WatchAdd("*0x0B06,x","ADCRESULT6 Mirror");
-    GEL_WatchAdd("*0x0B07,x","ADCRESULT7 Mirror");
-}
-hotmenu ADCRESULT_Mirror_8_to_15()
-{
-    GEL_WatchAdd("*0x0B08,x","ADCRESULT8 Mirror");
-    GEL_WatchAdd("*0x0B09,x","ADCRESULT9 Mirror");
-    GEL_WatchAdd("*0x0B0A,x","ADCRESULT10 Mirror");
-    GEL_WatchAdd("*0x0B0B,x","ADCRESULT11 Mirror");
-    GEL_WatchAdd("*0x0B0C,x","ADCRESULT12 Mirror");
-    GEL_WatchAdd("*0x0B0D,x","ADCRESULT13 Mirror");
-    GEL_WatchAdd("*0x0B0E,x","ADCRESULT14 Mirror");
-    GEL_WatchAdd("*0x0B0F,x","ADCRESULT15 Mirror");
-}
-
-
-/********************************************************************/
-/* Clocking and Low-Power Registers                                 */
-/********************************************************************/
-menuitem "Watch Clocking and Low-Power Registers";
-
-hotmenu All_Clocking_and_Low_Power_Regs()
-{
-    GEL_WatchAdd("*0x7010,x","XCLK");
-    GEL_WatchAdd("*0x7011,x","PLLSTS");
-    GEL_WatchAdd("*0x701A,x","HISPCP");
-    GEL_WatchAdd("*0x701B,x","LOSPCP");
-    GEL_WatchAdd("*0x701C,x","PCLKCR0");
-    GEL_WatchAdd("*0x701D,x","PCLKCR1");
-    GEL_WatchAdd("*0x701E,x","LPMCR0");
-    GEL_WatchAdd("*0x7020,x","PCLKCR3");
-    GEL_WatchAdd("*0x7021,x","PLLCR");
-}
-
-/********************************************************************/
-/* Code Security Module Registers                                   */
-/********************************************************************/
-menuitem "Watch Code Security Module Registers";
-
-hotmenu CSMSCR()
-{
-    GEL_WatchAdd("*0x0AEF,x","CSMSCR");
-    GEL_WatchAdd("(*0x0AEF>>15)&1,d"," FORCESEC bit");
-    GEL_WatchAdd("(*0x0AEF)&1,d","     SECURE bit");
-}
-hotmenu PWL_Locations()
-{
-    GEL_WatchAdd("*0x33FFF8,x","PWL0");
-    GEL_WatchAdd("*0x33FFF9,x","PWL1");
-    GEL_WatchAdd("*0x33FFFA,x","PWL2");
-    GEL_WatchAdd("*0x33FFFB,x","PWL3");
-    GEL_WatchAdd("*0x33FFFC,x","PWL4");
-    GEL_WatchAdd("*0x33FFFD,x","PWL5");
-    GEL_WatchAdd("*0x33FFFE,x","PWL6");
-    GEL_WatchAdd("*0x33FFFF,x","PWL7");
-}
-
-
-/********************************************************************/
-/* CPU Timer Registers                                              */
-/********************************************************************/
-menuitem "Watch CPU Timer Registers";
-
-hotmenu All_CPU_Timer0_Regs()
-{
-    GEL_WatchAdd("*0x0C00,x","TIMER0TIM");
-    GEL_WatchAdd("*0x0C01,x","TIMER0TIMH");
-    GEL_WatchAdd("*0x0C02,x","TIMER0PRD");
-    GEL_WatchAdd("*0x0C03,x","TIMER0PRDH");
-    GEL_WatchAdd("*0x0C04,x","TIMER0TCR");
-    GEL_WatchAdd("*0x0C06,x","TIMER0TPR");
-    GEL_WatchAdd("*0x0C07,x","TIMER0TPRH");
-}
-hotmenu All_CPU_Timer1_Regs()
-{
-    GEL_WatchAdd("*0x0C08,x","TIMER1TIM");
-    GEL_WatchAdd("*0x0C09,x","TIMER1TIMH");
-    GEL_WatchAdd("*0x0C0A,x","TIMER1PRD");
-    GEL_WatchAdd("*0x0C0B,x","TIMER1PRDH");
-    GEL_WatchAdd("*0x0C0C,x","TIMER1TCR");
-    GEL_WatchAdd("*0x0C0E,x","TIMER1TPR");
-    GEL_WatchAdd("*0x0C0F,x","TIMER1TPRH");
-}
-hotmenu All_CPU_Timer2_Regs()
-{
-    GEL_WatchAdd("*0x0C10,x","TIMER2TIM");
-    GEL_WatchAdd("*0x0C11,x","TIMER2TIMH");
-    GEL_WatchAdd("*0x0C12,x","TIMER2PRD");
-    GEL_WatchAdd("*0x0C13,x","TIMER2PRDH");
-    GEL_WatchAdd("*0x0C14,x","TIMER2TCR");
-    GEL_WatchAdd("*0x0C16,x","TIMER2TPR");
-    GEL_WatchAdd("*0x0C17,x","TIMER2TPRH");
-}
-
-
-/********************************************************************/
-/* Device Emulation Registers                                       */
-/********************************************************************/
-menuitem "Watch Device Emulation Registers";
-
-hotmenu All_Emulation_Regs()
-{
-    GEL_WatchAdd("*(long *)0x0880,x","DEVICECNF");
-    GEL_WatchAdd("*0x0882,x","CLASSID");
-    GEL_WatchAdd("*0x0883,x","REVID");
-    GEL_WatchAdd("*0x0884,x","PROTSTART");
-    GEL_WatchAdd("*0x0885,x","PROTRANGE");
-    GEL_WatchAdd("*0x380090,x","PARTID");    
-}
-/********************************************************************/
-/* DMA Registers                                                    */
-/********************************************************************/
-menuitem "Watch DMA Registers";
-
-hotmenu All_DMA_Regs()
-{
-    GEL_WatchAdd("*0x1000,x","DMACTRL");
-    GEL_WatchAdd("*0x1001,x","DEBUGCTRL");
-    GEL_WatchAdd("*0x1002,x","REVISION");
-    GEL_WatchAdd("*0x1004,x","PRIORITYCTRL1");
-    GEL_WatchAdd("*0x1006,x","PRIORITYSTAT");
-
-    GEL_WatchAdd("*0x1020,x","DMA Ch1 MODE");
-    GEL_WatchAdd("*0x1021,x","DMA Ch1 CONTROL");
-    GEL_WatchAdd("*0x1022,x","DMA Ch1 BURST_SIZE");
-    GEL_WatchAdd("*0x1023,x","DMA Ch1 BURST_COUNT");
-    GEL_WatchAdd("*0x1024,x","DMA Ch1 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x1025,x","DMA Ch1 DST_BURST_STEP");
-    GEL_WatchAdd("*0x1026,x","DMA Ch1 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x1027,x","DMA Ch1 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x1028,x","DMA Ch1 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x1029,x","DMA Ch1 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x102A,x","DMA Ch1 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x102B,x","DMA Ch1 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x102C,x","DMA Ch1 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x102D,x","DMA Ch1 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x102E,x","DMA Ch1 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x102F,x","DMA Ch1 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x1030,x","DMA Ch1 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1032,x","DMA Ch1 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1034,x","DMA Ch1 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1036,x","DMA Ch1 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1038,x","DMA Ch1 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x103A,x","DMA Ch1 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x103C,x","DMA Ch1 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x103E,x","DMA Ch1 DST_ADDR_ACTIVE");
-
-    GEL_WatchAdd("*0x1040,x","DMA Ch2 MODE");
-    GEL_WatchAdd("*0x1041,x","DMA Ch2 CONTROL");
-    GEL_WatchAdd("*0x1042,x","DMA Ch2 BURST_SIZE");
-    GEL_WatchAdd("*0x1043,x","DMA Ch2 BURST_COUNT");
-    GEL_WatchAdd("*0x1044,x","DMA Ch2 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x1045,x","DMA Ch2 DST_BURST_STEP");
-    GEL_WatchAdd("*0x1046,x","DMA Ch2 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x1047,x","DMA Ch2 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x1048,x","DMA Ch2 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x1049,x","DMA Ch2 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x104A,x","DMA Ch2 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x104B,x","DMA Ch2 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x104C,x","DMA Ch2 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x104D,x","DMA Ch2 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x104E,x","DMA Ch2 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x104F,x","DMA Ch2 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x1050,x","DMA Ch2 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1052,x","DMA Ch2 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1054,x","DMA Ch2 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1056,x","DMA Ch2 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1058,x","DMA Ch2 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x105A,x","DMA Ch2 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x105C,x","DMA Ch2 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x105E,x","DMA Ch2 DST_ADDR_ACTIVE");
-
-    GEL_WatchAdd("*0x1060,x","DMA Ch3 MODE");
-    GEL_WatchAdd("*0x1061,x","DMA Ch3 CONTROL");
-    GEL_WatchAdd("*0x1062,x","DMA Ch3 BURST_SIZE");
-    GEL_WatchAdd("*0x1063,x","DMA Ch3 BURST_COUNT");
-    GEL_WatchAdd("*0x1064,x","DMA Ch3 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x1065,x","DMA Ch3 DST_BURST_STEP");
-    GEL_WatchAdd("*0x1066,x","DMA Ch3 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x1067,x","DMA Ch3 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x1068,x","DMA Ch3 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x1069,x","DMA Ch3 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x106A,x","DMA Ch3 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x106B,x","DMA Ch3 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x106C,x","DMA Ch3 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x106D,x","DMA Ch3 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x106E,x","DMA Ch3 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x106F,x","DMA Ch3 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x1070,x","DMA Ch3 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1072,x","DMA Ch3 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1074,x","DMA Ch3 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1076,x","DMA Ch3 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1078,x","DMA Ch3 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x107A,x","DMA Ch3 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x107C,x","DMA Ch3 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x107E,x","DMA Ch3 DST_ADDR_ACTIVE");
-
-    GEL_WatchAdd("*0x1080,x","DMA Ch4 MODE");
-    GEL_WatchAdd("*0x1081,x","DMA Ch4 CONTROL");
-    GEL_WatchAdd("*0x1082,x","DMA Ch4 BURST_SIZE");
-    GEL_WatchAdd("*0x1083,x","DMA Ch4 BURST_COUNT");
-    GEL_WatchAdd("*0x1084,x","DMA Ch4 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x1085,x","DMA Ch4 DST_BURST_STEP");
-    GEL_WatchAdd("*0x1086,x","DMA Ch4 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x1087,x","DMA Ch4 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x1088,x","DMA Ch4 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x1089,x","DMA Ch4 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x108A,x","DMA Ch4 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x108B,x","DMA Ch4 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x108C,x","DMA Ch4 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x108D,x","DMA Ch4 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x108E,x","DMA Ch4 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x108F,x","DMA Ch4 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x1090,x","DMA Ch4 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1092,x","DMA Ch4 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1094,x","DMA Ch4 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1096,x","DMA Ch4 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1098,x","DMA Ch4 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x109A,x","DMA Ch4 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x109C,x","DMA Ch4 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x109E,x","DMA Ch4 DST_ADDR_ACTIVE");
-
-    GEL_WatchAdd("*0x10A0,x","DMA Ch5 MODE");
-    GEL_WatchAdd("*0x10A1,x","DMA Ch5 CONTROL");
-    GEL_WatchAdd("*0x10A2,x","DMA Ch5 BURST_SIZE");
-    GEL_WatchAdd("*0x10A3,x","DMA Ch5 BURST_COUNT");
-    GEL_WatchAdd("*0x10A4,x","DMA Ch5 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x10A5,x","DMA Ch5 DST_BURST_STEP");
-    GEL_WatchAdd("*0x10A6,x","DMA Ch5 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x10A7,x","DMA Ch5 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x10A8,x","DMA Ch5 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x10A9,x","DMA Ch5 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x10AA,x","DMA Ch5 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x10AB,x","DMA Ch5 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x10AC,x","DMA Ch5 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x10AD,x","DMA Ch5 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x10AE,x","DMA Ch5 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x10AF,x","DMA Ch5 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x10B0,x","DMA Ch5 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10B2,x","DMA Ch5 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10B4,x","DMA Ch5 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10B6,x","DMA Ch5 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10B8,x","DMA Ch5 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10BA,x","DMA Ch5 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10BC,x","DMA Ch5 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10BE,x","DMA Ch5 DST_ADDR_ACTIVE");
-
-    GEL_WatchAdd("*0x10C0,x","DMA Ch6 MODE");
-    GEL_WatchAdd("*0x10C1,x","DMA Ch6 CONTROL");
-    GEL_WatchAdd("*0x10C2,x","DMA Ch6 BURST_SIZE");
-    GEL_WatchAdd("*0x10C3,x","DMA Ch6 BURST_COUNT");
-    GEL_WatchAdd("*0x10C4,x","DMA Ch6 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x10C5,x","DMA Ch6 DST_BURST_STEP");
-    GEL_WatchAdd("*0x10C6,x","DMA Ch6 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x10C7,x","DMA Ch6 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x10C8,x","DMA Ch6 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x10C9,x","DMA Ch6 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x10CA,x","DMA Ch6 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x10CB,x","DMA Ch6 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x10CC,x","DMA Ch6 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x10CD,x","DMA Ch6 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x10CE,x","DMA Ch6 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x10CF,x","DMA Ch6 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x10D0,x","DMA Ch6 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10D2,x","DMA Ch6 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10D4,x","DMA Ch6 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10D6,x","DMA Ch6 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10D8,x","DMA Ch6 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10DA,x","DMA Ch6 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10DC,x","DMA Ch6 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10DE,x","DMA Ch6 DST_ADDR_ACTIVE");
-
-
-}
-hotmenu DMA_Channel_1_regs()
-{
-    GEL_WatchAdd("*0x1020,x","DMA Ch1 MODE");
-    GEL_WatchAdd("*0x1021,x","DMA Ch1 CONTROL");
-    GEL_WatchAdd("*0x1022,x","DMA Ch1 BURST_SIZE");
-    GEL_WatchAdd("*0x1023,x","DMA Ch1 BURST_COUNT");
-    GEL_WatchAdd("*0x1024,x","DMA Ch1 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x1025,x","DMA Ch1 DST_BURST_STEP");
-    GEL_WatchAdd("*0x1026,x","DMA Ch1 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x1027,x","DMA Ch1 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x1028,x","DMA Ch1 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x1029,x","DMA Ch1 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x102A,x","DMA Ch1 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x102B,x","DMA Ch1 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x102C,x","DMA Ch1 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x102D,x","DMA Ch1 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x102E,x","DMA Ch1 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x102F,x","DMA Ch1 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x1030,x","DMA Ch1 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1032,x","DMA Ch1 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1034,x","DMA Ch1 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1036,x","DMA Ch1 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1038,x","DMA Ch1 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x103A,x","DMA Ch1 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x103C,x","DMA Ch1 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x103E,x","DMA Ch1 DST_ADDR_ACTIVE");
-}
-
-hotmenu DMA_Channel_2_regs()
-{
-    GEL_WatchAdd("*0x1040,x","DMA Ch2 MODE");
-    GEL_WatchAdd("*0x1041,x","DMA Ch2 CONTROL");
-    GEL_WatchAdd("*0x1042,x","DMA Ch2 BURST_SIZE");
-    GEL_WatchAdd("*0x1043,x","DMA Ch2 BURST_COUNT");
-    GEL_WatchAdd("*0x1044,x","DMA Ch2 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x1045,x","DMA Ch2 DST_BURST_STEP");
-    GEL_WatchAdd("*0x1046,x","DMA Ch2 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x1047,x","DMA Ch2 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x1048,x","DMA Ch2 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x1049,x","DMA Ch2 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x104A,x","DMA Ch2 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x104B,x","DMA Ch2 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x104C,x","DMA Ch2 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x104D,x","DMA Ch2 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x104E,x","DMA Ch2 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x104F,x","DMA Ch2 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x1050,x","DMA Ch2 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1052,x","DMA Ch2 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1054,x","DMA Ch2 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1056,x","DMA Ch2 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1058,x","DMA Ch2 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x105A,x","DMA Ch2 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x105C,x","DMA Ch2 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x105E,x","DMA Ch2 DST_ADDR_ACTIVE");
-}
-hotmenu DMA_Channel_3_regs()
-{
-    GEL_WatchAdd("*0x1060,x","DMA Ch3 MODE");
-    GEL_WatchAdd("*0x1061,x","DMA Ch3 CONTROL");
-    GEL_WatchAdd("*0x1062,x","DMA Ch3 BURST_SIZE");
-    GEL_WatchAdd("*0x1063,x","DMA Ch3 BURST_COUNT");
-    GEL_WatchAdd("*0x1064,x","DMA Ch3 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x1065,x","DMA Ch3 DST_BURST_STEP");
-    GEL_WatchAdd("*0x1066,x","DMA Ch3 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x1067,x","DMA Ch3 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x1068,x","DMA Ch3 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x1069,x","DMA Ch3 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x106A,x","DMA Ch3 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x106B,x","DMA Ch3 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x106C,x","DMA Ch3 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x106D,x","DMA Ch3 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x106E,x","DMA Ch3 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x106F,x","DMA Ch3 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x1070,x","DMA Ch3 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1072,x","DMA Ch3 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1074,x","DMA Ch3 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1076,x","DMA Ch3 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1078,x","DMA Ch3 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x107A,x","DMA Ch3 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x107C,x","DMA Ch3 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x107E,x","DMA Ch3 DST_ADDR_ACTIVE");
-}
-hotmenu DMA_Channel_4_regs()
-{
-    GEL_WatchAdd("*0x1080,x","DMA Ch4 MODE");
-    GEL_WatchAdd("*0x1081,x","DMA Ch4 CONTROL");
-    GEL_WatchAdd("*0x1082,x","DMA Ch4 BURST_SIZE");
-    GEL_WatchAdd("*0x1083,x","DMA Ch4 BURST_COUNT");
-    GEL_WatchAdd("*0x1084,x","DMA Ch4 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x1085,x","DMA Ch4 DST_BURST_STEP");
-    GEL_WatchAdd("*0x1086,x","DMA Ch4 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x1087,x","DMA Ch4 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x1088,x","DMA Ch4 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x1089,x","DMA Ch4 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x108A,x","DMA Ch4 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x108B,x","DMA Ch4 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x108C,x","DMA Ch4 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x108D,x","DMA Ch4 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x108E,x","DMA Ch4 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x108F,x","DMA Ch4 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x1090,x","DMA Ch4 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1092,x","DMA Ch4 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1094,x","DMA Ch4 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1096,x","DMA Ch4 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1098,x","DMA Ch4 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x109A,x","DMA Ch4 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x109C,x","DMA Ch4 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x109E,x","DMA Ch4 DST_ADDR_ACTIVE");
-}
-hotmenu DMA_Channel_5_regs()
-{
-    GEL_WatchAdd("*0x10A0,x","DMA Ch5 MODE");
-    GEL_WatchAdd("*0x10A1,x","DMA Ch5 CONTROL");
-    GEL_WatchAdd("*0x10A2,x","DMA Ch5 BURST_SIZE");
-    GEL_WatchAdd("*0x10A3,x","DMA Ch5 BURST_COUNT");
-    GEL_WatchAdd("*0x10A4,x","DMA Ch5 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x10A5,x","DMA Ch5 DST_BURST_STEP");
-    GEL_WatchAdd("*0x10A6,x","DMA Ch5 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x10A7,x","DMA Ch5 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x10A8,x","DMA Ch5 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x10A9,x","DMA Ch5 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x10AA,x","DMA Ch5 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x10AB,x","DMA Ch5 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x10AC,x","DMA Ch5 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x10AD,x","DMA Ch5 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x10AE,x","DMA Ch5 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x10AF,x","DMA Ch5 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x10B0,x","DMA Ch5 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10B2,x","DMA Ch5 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10B4,x","DMA Ch5 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10B6,x","DMA Ch5 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10B8,x","DMA Ch5 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10BA,x","DMA Ch5 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10BC,x","DMA Ch5 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10BE,x","DMA Ch5 DST_ADDR_ACTIVE");
-}
-hotmenu DMA_Channel_6_regs()
-{
-    GEL_WatchAdd("*0x10C0,x","DMA Ch6 MODE");
-    GEL_WatchAdd("*0x10C1,x","DMA Ch6 CONTROL");
-    GEL_WatchAdd("*0x10C2,x","DMA Ch6 BURST_SIZE");
-    GEL_WatchAdd("*0x10C3,x","DMA Ch6 BURST_COUNT");
-    GEL_WatchAdd("*0x10C4,x","DMA Ch6 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x10C5,x","DMA Ch6 DST_BURST_STEP");
-    GEL_WatchAdd("*0x10C6,x","DMA Ch6 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x10C7,x","DMA Ch6 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x10C8,x","DMA Ch6 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x10C9,x","DMA Ch6 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x10CA,x","DMA Ch6 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x10CB,x","DMA Ch6 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x10CC,x","DMA Ch6 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x10CD,x","DMA Ch6 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x10CE,x","DMA Ch6 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x10CF,x","DMA Ch6 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x10D0,x","DMA Ch6 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10D2,x","DMA Ch6 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10D4,x","DMA Ch6 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10D6,x","DMA Ch6 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10D8,x","DMA Ch6 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10DA,x","DMA Ch6 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10DC,x","DMA Ch6 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10DE,x","DMA Ch6 DST_ADDR_ACTIVE");
-}
-
-/********************************************************************/
-/* eCAN Registers                                                   */
-/********************************************************************/
-menuitem "Watch eCAN Registers";
-
-hotmenu eCAN_A_Global_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6000,x","eCANA CANME");
-    GEL_WatchAdd("*(long *)0x6002,x","eCANA CANMD");
-    GEL_WatchAdd("*(long *)0x6004,x","eCANA CANTRS");
-    GEL_WatchAdd("*(long *)0x6006,x","eCANA CANTRR");
-    GEL_WatchAdd("*(long *)0x6008,x","eCANA CANTA");
-    GEL_WatchAdd("*(long *)0x600A,x","eCANA CANAA");
-    GEL_WatchAdd("*(long *)0x600C,x","eCANA CANRMP");
-    GEL_WatchAdd("*(long *)0x600E,x","eCANA CANRML");
-    GEL_WatchAdd("*(long *)0x6010,x","eCANA CANRFP");
-    GEL_WatchAdd("*(long *)0x6014,x","eCANA CANMC");
-    GEL_WatchAdd("*(long *)0x6016,x","eCANA CANBTC");
-    GEL_WatchAdd("*(long *)0x6018,x","eCANA CANES");
-    GEL_WatchAdd("*(long *)0x601A,x","eCANA CANTEC");
-    GEL_WatchAdd("*(long *)0x601C,x","eCANA CANREC");
-    GEL_WatchAdd("*(long *)0x601E,x","eCANA CANGIF0");
-    GEL_WatchAdd("*(long *)0x6020,x","eCANA CANGIM");
-    GEL_WatchAdd("*(long *)0x6022,x","eCANA CANGIF1");
-    GEL_WatchAdd("*(long *)0x6024,x","eCANA CANMIM");
-    GEL_WatchAdd("*(long *)0x6026,x","eCANA CANMIL");
-    GEL_WatchAdd("*(long *)0x6028,x","eCANA CANOPC");
-    GEL_WatchAdd("*(long *)0x602A,x","eCANA CANTIOC");
-    GEL_WatchAdd("*(long *)0x602C,x","eCANA CANRIOC");
-    GEL_WatchAdd("*(long *)0x602E,x","eCANA CANLNT");
-    GEL_WatchAdd("*(long *)0x6030,x","eCANA CANTOC");
-    GEL_WatchAdd("*(long *)0x6032,x","eCANA CANTOS");
-}
-hotmenu eCAN_A_Mailbox_0_to_1_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6040,x","eCANA LAM0");
-    GEL_WatchAdd("*(long *)0x6080,x","eCANA MOTS0");
-    GEL_WatchAdd("*(long *)0x60C0,x","eCANA MOTO0");
-    GEL_WatchAdd("*(long *)0x6100,x","eCANA MID0");
-    GEL_WatchAdd("*(long *)0x6102,x","eCANA MCF0");
-    GEL_WatchAdd("*(long *)0x6104,x","eCANA MDL0");
-    GEL_WatchAdd("*(long *)0x6106,x","eCANA MDH0");
-    
-    GEL_WatchAdd("*(long *)0x6042,x","eCANA LAM1");
-    GEL_WatchAdd("*(long *)0x6082,x","eCANA MOTS1");
-    GEL_WatchAdd("*(long *)0x60C2,x","eCANA MOTO1");
-    GEL_WatchAdd("*(long *)0x6108,x","eCANA MID1");
-    GEL_WatchAdd("*(long *)0x610A,x","eCANA MCF1");
-    GEL_WatchAdd("*(long *)0x610C,x","eCANA MDL1");
-    GEL_WatchAdd("*(long *)0x610E,x","eCANA MDH1");
-}
-hotmenu eCAN_A_Mailbox_2_to_3_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6044,x","eCANA LAM2");
-    GEL_WatchAdd("*(long *)0x6084,x","eCANA MOTS2");
-    GEL_WatchAdd("*(long *)0x60C4,x","eCANA MOTO2");
-    GEL_WatchAdd("*(long *)0x6110,x","eCANA MID2");
-    GEL_WatchAdd("*(long *)0x6112,x","eCANA MCF2");
-    GEL_WatchAdd("*(long *)0x6114,x","eCANA MDL2");
-    GEL_WatchAdd("*(long *)0x6116,x","eCANA MDH2");
-
-    GEL_WatchAdd("*(long *)0x6046,x","eCANA LAM3");
-    GEL_WatchAdd("*(long *)0x6086,x","eCANA MOTS3");
-    GEL_WatchAdd("*(long *)0x60C6,x","eCANA MOTO3");
-    GEL_WatchAdd("*(long *)0x6118,x","eCANA MID3");
-    GEL_WatchAdd("*(long *)0x611A,x","eCANA MCF3");
-    GEL_WatchAdd("*(long *)0x611C,x","eCANA MDL3");
-    GEL_WatchAdd("*(long *)0x611E,x","eCANA MDH3");
-}
-hotmenu eCAN_A_Mailbox_4_to_5_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6048,x","eCANA LAM4");
-    GEL_WatchAdd("*(long *)0x6088,x","eCANA MOTS4");
-    GEL_WatchAdd("*(long *)0x60C8,x","eCANA MOTO4");
-    GEL_WatchAdd("*(long *)0x6120,x","eCANA MID4");
-    GEL_WatchAdd("*(long *)0x6122,x","eCANA MCF4");
-    GEL_WatchAdd("*(long *)0x6124,x","eCANA MDL4");
-    GEL_WatchAdd("*(long *)0x6126,x","eCANA MDH4");
-    
-    GEL_WatchAdd("*(long *)0x604A,x","eCANA LAM5");
-    GEL_WatchAdd("*(long *)0x608A,x","eCANA MOTS5");
-    GEL_WatchAdd("*(long *)0x60CA,x","eCANA MOTO5");
-    GEL_WatchAdd("*(long *)0x6128,x","eCANA MID5");
-    GEL_WatchAdd("*(long *)0x612A,x","eCANA MCF5");
-    GEL_WatchAdd("*(long *)0x612C,x","eCANA MDL5");
-    GEL_WatchAdd("*(long *)0x612E,x","eCANA MDH5");
-}
-hotmenu eCAN_A_Mailbox_6_to_7_Regs()
-{
-    GEL_WatchAdd("*(long *)0x604C,x","eCANA LAM6");
-    GEL_WatchAdd("*(long *)0x608C,x","eCANA MOTS6");
-    GEL_WatchAdd("*(long *)0x60CC,x","eCANA MOTO6");
-    GEL_WatchAdd("*(long *)0x6130,x","eCANA MID6");
-    GEL_WatchAdd("*(long *)0x6132,x","eCANA MCF6");
-    GEL_WatchAdd("*(long *)0x6134,x","eCANA MDL6");
-    GEL_WatchAdd("*(long *)0x6136,x","eCANA MDH6");
-    
-    GEL_WatchAdd("*(long *)0x604E,x","eCANA LAM7");
-    GEL_WatchAdd("*(long *)0x608E,x","eCANA MOTS7");
-    GEL_WatchAdd("*(long *)0x60CE,x","eCANA MOTO7");
-    GEL_WatchAdd("*(long *)0x6138,x","eCANA MID7");
-    GEL_WatchAdd("*(long *)0x613A,x","eCANA MCF7");
-    GEL_WatchAdd("*(long *)0x613C,x","eCANA MDL7");
-    GEL_WatchAdd("*(long *)0x613E,x","eCANA MDH7");
-}
-hotmenu eCAN_A_Mailbox_8_to_9_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6050,x","eCANA LAM8");
-    GEL_WatchAdd("*(long *)0x6090,x","eCANA MOTS8");
-    GEL_WatchAdd("*(long *)0x60D0,x","eCANA MOTO8");
-    GEL_WatchAdd("*(long *)0x6140,x","eCANA MID8");
-    GEL_WatchAdd("*(long *)0x6142,x","eCANA MCF8");
-    GEL_WatchAdd("*(long *)0x6144,x","eCANA MDL8");
-    GEL_WatchAdd("*(long *)0x6146,x","eCANA MDH8");
-
-    GEL_WatchAdd("*(long *)0x6052,x","eCANA LAM9");
-    GEL_WatchAdd("*(long *)0x6092,x","eCANA MOTS9");
-    GEL_WatchAdd("*(long *)0x60D2,x","eCANA MOTO9");
-    GEL_WatchAdd("*(long *)0x6148,x","eCANA MID9");
-    GEL_WatchAdd("*(long *)0x614A,x","eCANA MCF9");
-    GEL_WatchAdd("*(long *)0x614C,x","eCANA MDL9");
-    GEL_WatchAdd("*(long *)0x614E,x","eCANA MDH9");
-}
-hotmenu eCAN_A_Mailbox_10_to_11_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6054,x","eCANA LAM10");
-    GEL_WatchAdd("*(long *)0x6094,x","eCANA MOTS10");
-    GEL_WatchAdd("*(long *)0x60D4,x","eCANA MOTO10");
-    GEL_WatchAdd("*(long *)0x6150,x","eCANA MID10");
-    GEL_WatchAdd("*(long *)0x6152,x","eCANA MCF10");
-    GEL_WatchAdd("*(long *)0x6154,x","eCANA MDL10");
-    GEL_WatchAdd("*(long *)0x6156,x","eCANA MDH10");
-
-    GEL_WatchAdd("*(long *)0x6056,x","eCANA LAM11");
-    GEL_WatchAdd("*(long *)0x6096,x","eCANA MOTS11");
-    GEL_WatchAdd("*(long *)0x60D6,x","eCANA MOTO11");
-    GEL_WatchAdd("*(long *)0x6158,x","eCANA MID11");
-    GEL_WatchAdd("*(long *)0x615A,x","eCANA MCF11");
-    GEL_WatchAdd("*(long *)0x615C,x","eCANA MDL11");
-    GEL_WatchAdd("*(long *)0x615E,x","eCANA MDH11");
-}
-hotmenu eCAN_A_Mailbox_12_to_13_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6058,x","eCANA LAM12");
-    GEL_WatchAdd("*(long *)0x6098,x","eCANA MOTS12");
-    GEL_WatchAdd("*(long *)0x60D8,x","eCANA MOTO12");
-    GEL_WatchAdd("*(long *)0x6160,x","eCANA MID12");
-    GEL_WatchAdd("*(long *)0x6162,x","eCANA MCF12");
-    GEL_WatchAdd("*(long *)0x6164,x","eCANA MDL12");
-    GEL_WatchAdd("*(long *)0x6166,x","eCANA MDH12");
-    
-    GEL_WatchAdd("*(long *)0x605A,x","eCANA LAM13");
-    GEL_WatchAdd("*(long *)0x609A,x","eCANA MOTS13");
-    GEL_WatchAdd("*(long *)0x60DA,x","eCANA MOTO13");
-    GEL_WatchAdd("*(long *)0x6168,x","eCANA MID13");
-    GEL_WatchAdd("*(long *)0x616A,x","eCANA MCF13");
-    GEL_WatchAdd("*(long *)0x616C,x","eCANA MDL13");
-    GEL_WatchAdd("*(long *)0x616E,x","eCANA MDH13");
-}
-hotmenu eCAN_A_Mailbox_14_to_15_Regs()
-{
-    GEL_WatchAdd("*(long *)0x605C,x","eCANA LAM14");
-    GEL_WatchAdd("*(long *)0x609C,x","eCANA MOTS14");
-    GEL_WatchAdd("*(long *)0x60DC,x","eCANA MOTO14");
-    GEL_WatchAdd("*(long *)0x6170,x","eCANA MID14");
-    GEL_WatchAdd("*(long *)0x6172,x","eCANA MCF14");
-    GEL_WatchAdd("*(long *)0x6174,x","eCANA MDL14");
-    GEL_WatchAdd("*(long *)0x6176,x","eCANA MDH14");
-    
-    GEL_WatchAdd("*(long *)0x605E,x","eCANA LAM15");
-    GEL_WatchAdd("*(long *)0x609E,x","eCANA MOTS15");
-    GEL_WatchAdd("*(long *)0x60DE,x","eCANA MOTO15");
-    GEL_WatchAdd("*(long *)0x6178,x","eCANA MID15");
-    GEL_WatchAdd("*(long *)0x617A,x","eCANA MCF15");
-    GEL_WatchAdd("*(long *)0x617C,x","eCANA MDL15");
-    GEL_WatchAdd("*(long *)0x617E,x","eCANA MDH15");
-}
-hotmenu eCAN_A_Mailbox_16_to_17_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6060,x","eCANA LAM16");
-    GEL_WatchAdd("*(long *)0x60A0,x","eCANA MOTS16");
-    GEL_WatchAdd("*(long *)0x60E0,x","eCANA MOTO16");
-    GEL_WatchAdd("*(long *)0x6180,x","eCANA MID16");
-    GEL_WatchAdd("*(long *)0x6182,x","eCANA MCF16");
-    GEL_WatchAdd("*(long *)0x6184,x","eCANA MDL16");
-    GEL_WatchAdd("*(long *)0x6186,x","eCANA MDH16");
-
-    GEL_WatchAdd("*(long *)0x6062,x","eCANA LAM17");
-    GEL_WatchAdd("*(long *)0x60A2,x","eCANA MOTS17");
-    GEL_WatchAdd("*(long *)0x60E2,x","eCANA MOTO17");
-    GEL_WatchAdd("*(long *)0x6188,x","eCANA MID17");
-    GEL_WatchAdd("*(long *)0x618A,x","eCANA MCF17");
-    GEL_WatchAdd("*(long *)0x618C,x","eCANA MDL17");
-    GEL_WatchAdd("*(long *)0x618E,x","eCANA MDH17");
-}
-hotmenu eCAN_A_Mailbox_18_to_19_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6064,x","eCANA LAM18");
-    GEL_WatchAdd("*(long *)0x60A4,x","eCANA MOTS18");
-    GEL_WatchAdd("*(long *)0x60E4,x","eCANA MOTO18");
-    GEL_WatchAdd("*(long *)0x6190,x","eCANA MID18");
-    GEL_WatchAdd("*(long *)0x6192,x","eCANA MCF18");
-    GEL_WatchAdd("*(long *)0x6194,x","eCANA MDL18");
-    GEL_WatchAdd("*(long *)0x6196,x","eCANA MDH18");
-
-    GEL_WatchAdd("*(long *)0x6066,x","eCANA LAM19");
-    GEL_WatchAdd("*(long *)0x60A6,x","eCANA MOTS19");
-    GEL_WatchAdd("*(long *)0x60E6,x","eCANA MOTO19");
-    GEL_WatchAdd("*(long *)0x6198,x","eCANA MID19");
-    GEL_WatchAdd("*(long *)0x619A,x","eCANA MCF19");
-    GEL_WatchAdd("*(long *)0x619C,x","eCANA MDL19");
-    GEL_WatchAdd("*(long *)0x619E,x","eCANA MDH19");
-}
-hotmenu eCAN_A_Mailbox_20_to_21_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6068,x","eCANA LAM20");
-    GEL_WatchAdd("*(long *)0x60A8,x","eCANA MOTS20");
-    GEL_WatchAdd("*(long *)0x60E8,x","eCANA MOTO20");
-    GEL_WatchAdd("*(long *)0x61A0,x","eCANA MID20");
-    GEL_WatchAdd("*(long *)0x61A2,x","eCANA MCF20");
-    GEL_WatchAdd("*(long *)0x61A4,x","eCANA MDL20");
-    GEL_WatchAdd("*(long *)0x61A6,x","eCANA MDH20");
-    
-    GEL_WatchAdd("*(long *)0x606A,x","eCANA LAM21");
-    GEL_WatchAdd("*(long *)0x60AA,x","eCANA MOTS21");
-    GEL_WatchAdd("*(long *)0x60EA,x","eCANA MOTO21");
-    GEL_WatchAdd("*(long *)0x61A8,x","eCANA MID21");
-    GEL_WatchAdd("*(long *)0x61AA,x","eCANA MCF21");
-    GEL_WatchAdd("*(long *)0x61AC,x","eCANA MDL21");
-    GEL_WatchAdd("*(long *)0x61AE,x","eCANA MDH21");
-}
-hotmenu eCAN_A_Mailbox_22_to_23_Regs()
-{
-    GEL_WatchAdd("*(long *)0x606C,x","eCANA LAM22");
-    GEL_WatchAdd("*(long *)0x60AC,x","eCANA MOTS22");
-    GEL_WatchAdd("*(long *)0x60EC,x","eCANA MOTO22");
-    GEL_WatchAdd("*(long *)0x61B0,x","eCANA MID22");
-    GEL_WatchAdd("*(long *)0x61B2,x","eCANA MCF22");
-    GEL_WatchAdd("*(long *)0x61B4,x","eCANA MDL22");
-    GEL_WatchAdd("*(long *)0x61B6,x","eCANA MDH22");
-
-    GEL_WatchAdd("*(long *)0x606E,x","eCANA LAM23");
-    GEL_WatchAdd("*(long *)0x60AE,x","eCANA MOTS23");
-    GEL_WatchAdd("*(long *)0x60EE,x","eCANA MOTO23");
-    GEL_WatchAdd("*(long *)0x61B8,x","eCANA MID23");
-    GEL_WatchAdd("*(long *)0x61BA,x","eCANA MCF23");
-    GEL_WatchAdd("*(long *)0x61BC,x","eCANA MDL23");
-    GEL_WatchAdd("*(long *)0x61BE,x","eCANA MDH23");
-}
-hotmenu eCAN_A_Mailbox_24_to_25_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6070,x","eCANA LAM24");
-    GEL_WatchAdd("*(long *)0x60B0,x","eCANA MOTS24");
-    GEL_WatchAdd("*(long *)0x60F0,x","eCANA MOTO24");
-    GEL_WatchAdd("*(long *)0x61C0,x","eCANA MID24");
-    GEL_WatchAdd("*(long *)0x61C2,x","eCANA MCF24");
-    GEL_WatchAdd("*(long *)0x61C4,x","eCANA MDL24");
-    GEL_WatchAdd("*(long *)0x61C6,x","eCANA MDH24");
-
-    GEL_WatchAdd("*(long *)0x6072,x","eCANA LAM25");
-    GEL_WatchAdd("*(long *)0x60B2,x","eCANA MOTS25");
-    GEL_WatchAdd("*(long *)0x60F2,x","eCANA MOTO25");
-    GEL_WatchAdd("*(long *)0x61C8,x","eCANA MID25");
-    GEL_WatchAdd("*(long *)0x61CA,x","eCANA MCF25");
-    GEL_WatchAdd("*(long *)0x61CC,x","eCANA MDL25");
-    GEL_WatchAdd("*(long *)0x61CE,x","eCANA MDH25");
-}
-hotmenu eCAN_A_Mailbox_26_to_27_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6074,x","eCANA LAM26");
-    GEL_WatchAdd("*(long *)0x60B4,x","eCANA MOTS26");
-    GEL_WatchAdd("*(long *)0x60F4,x","eCANA MOTO26");
-    GEL_WatchAdd("*(long *)0x61D0,x","eCANA MID26");
-    GEL_WatchAdd("*(long *)0x61D2,x","eCANA MCF26");
-    GEL_WatchAdd("*(long *)0x61D4,x","eCANA MDL26");
-    GEL_WatchAdd("*(long *)0x61D6,x","eCANA MDH26");
-
-    GEL_WatchAdd("*(long *)0x6076,x","eCANA LAM27");
-    GEL_WatchAdd("*(long *)0x60B6,x","eCANA MOTS27");
-    GEL_WatchAdd("*(long *)0x60F6,x","eCANA MOTO27");
-    GEL_WatchAdd("*(long *)0x61D8,x","eCANA MID27");
-    GEL_WatchAdd("*(long *)0x61DA,x","eCANA MCF27");
-    GEL_WatchAdd("*(long *)0x61DC,x","eCANA MDL27");
-    GEL_WatchAdd("*(long *)0x61DE,x","eCANA MDH27");
-}
-hotmenu eCAN_A_Mailbox_28_to_29_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6078,x","eCANA LAM28");
-    GEL_WatchAdd("*(long *)0x60B8,x","eCANA MOTS28");
-    GEL_WatchAdd("*(long *)0x60F8,x","eCANA MOTO28");
-    GEL_WatchAdd("*(long *)0x61E0,x","eCANA MID28");
-    GEL_WatchAdd("*(long *)0x61E2,x","eCANA MCF28");
-    GEL_WatchAdd("*(long *)0x61E4,x","eCANA MDL28");
-    GEL_WatchAdd("*(long *)0x61E6,x","eCANA MDH28");
-
-    GEL_WatchAdd("*(long *)0x607A,x","eCANA LAM29");
-    GEL_WatchAdd("*(long *)0x60BA,x","eCANA MOTS29");
-    GEL_WatchAdd("*(long *)0x60FA,x","eCANA MOTO29");
-    GEL_WatchAdd("*(long *)0x61E8,x","eCANA MID29");
-    GEL_WatchAdd("*(long *)0x61EA,x","eCANA MCF29");
-    GEL_WatchAdd("*(long *)0x61EC,x","eCANA MDL29");
-    GEL_WatchAdd("*(long *)0x61EE,x","eCANA MDH29");
-}
-hotmenu eCAN_A_Mailbox_30_to_31_Regs()
-{
-    GEL_WatchAdd("*(long *)0x607C,x","eCANA LAM30");
-    GEL_WatchAdd("*(long *)0x60BC,x","eCANA MOTS30");
-    GEL_WatchAdd("*(long *)0x60FC,x","eCANA MOTO30");
-    GEL_WatchAdd("*(long *)0x61F0,x","eCANA MID30");
-    GEL_WatchAdd("*(long *)0x61F2,x","eCANA MCF30");
-    GEL_WatchAdd("*(long *)0x61F4,x","eCANA MDL30");
-    GEL_WatchAdd("*(long *)0x61F6,x","eCANA MDH30");
-
-    GEL_WatchAdd("*(long *)0x607E,x","eCANA LAM31");
-    GEL_WatchAdd("*(long *)0x60BE,x","eCANA MOTS31");
-    GEL_WatchAdd("*(long *)0x60FE,x","eCANA MOTO31");
-    GEL_WatchAdd("*(long *)0x61F8,x","eCANA MID31");
-    GEL_WatchAdd("*(long *)0x61FA,x","eCANA MCF31");
-    GEL_WatchAdd("*(long *)0x61FC,x","eCANA MDL31");
-    GEL_WatchAdd("*(long *)0x61FE,x","eCANA MDH31");
-}
-hotmenu eCAN_B_Global_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6200,x","eCANB CANME");
-    GEL_WatchAdd("*(long *)0x6202,x","eCANB CANMD");
-    GEL_WatchAdd("*(long *)0x6204,x","eCANB CANTRS");
-    GEL_WatchAdd("*(long *)0x6206,x","eCANB CANTRR");
-    GEL_WatchAdd("*(long *)0x6208,x","eCANB CANTA");
-    GEL_WatchAdd("*(long *)0x620A,x","eCANB CANAA");
-    GEL_WatchAdd("*(long *)0x620C,x","eCANB CANRMP");
-    GEL_WatchAdd("*(long *)0x620E,x","eCANB CANRML");
-    GEL_WatchAdd("*(long *)0x6210,x","eCANB CANRFP");
-    GEL_WatchAdd("*(long *)0x6214,x","eCANB CANMC");
-    GEL_WatchAdd("*(long *)0x6216,x","eCANB CANBTC");
-    GEL_WatchAdd("*(long *)0x6218,x","eCANB CANES");
-    GEL_WatchAdd("*(long *)0x621A,x","eCANB CANTEC");
-    GEL_WatchAdd("*(long *)0x621C,x","eCANB CANREC");
-    GEL_WatchAdd("*(long *)0x621E,x","eCANB CANGIF0");
-    GEL_WatchAdd("*(long *)0x6220,x","eCANB CANGIM");
-    GEL_WatchAdd("*(long *)0x6222,x","eCANB CANGIF1");
-    GEL_WatchAdd("*(long *)0x6224,x","eCANB CANMIM");
-    GEL_WatchAdd("*(long *)0x6226,x","eCANB CANMIL");
-    GEL_WatchAdd("*(long *)0x6228,x","eCANB CANOPC");
-    GEL_WatchAdd("*(long *)0x622A,x","eCANB CANTIOC");
-    GEL_WatchAdd("*(long *)0x622C,x","eCANB CANRIOC");
-    GEL_WatchAdd("*(long *)0x622E,x","eCANB CANLNT");
-    GEL_WatchAdd("*(long *)0x6230,x","eCANB CANTOC");
-    GEL_WatchAdd("*(long *)0x6232,x","eCANB CANTOS");
-}
-hotmenu eCAN_B_Mailbox_0_to_1_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6240,x","eCANB LAM0");
-    GEL_WatchAdd("*(long *)0x6280,x","eCANB MOTS0");
-    GEL_WatchAdd("*(long *)0x62C0,x","eCANB MOTO0");
-    GEL_WatchAdd("*(long *)0x6300,x","eCANB MID0");
-    GEL_WatchAdd("*(long *)0x6302,x","eCANB MCF0");
-    GEL_WatchAdd("*(long *)0x6304,x","eCANB MDL0");
-    GEL_WatchAdd("*(long *)0x6306,x","eCANB MDH0");
-
-    GEL_WatchAdd("*(long *)0x6242,x","eCANB LAM1");
-    GEL_WatchAdd("*(long *)0x6282,x","eCANB MOTS1");
-    GEL_WatchAdd("*(long *)0x62C2,x","eCANB MOTO1");
-    GEL_WatchAdd("*(long *)0x6308,x","eCANB MID1");
-    GEL_WatchAdd("*(long *)0x630A,x","eCANB MCF1");
-    GEL_WatchAdd("*(long *)0x630C,x","eCANB MDL1");
-    GEL_WatchAdd("*(long *)0x630E,x","eCANB MDH1");
-}
-hotmenu eCAN_B_Mailbox_2_to_3_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6244,x","eCANB LAM2");
-    GEL_WatchAdd("*(long *)0x6284,x","eCANB MOTS2");
-    GEL_WatchAdd("*(long *)0x62C4,x","eCANB MOTO2");
-    GEL_WatchAdd("*(long *)0x6310,x","eCANB MID2");
-    GEL_WatchAdd("*(long *)0x6312,x","eCANB MCF2");
-    GEL_WatchAdd("*(long *)0x6314,x","eCANB MDL2");
-    GEL_WatchAdd("*(long *)0x6316,x","eCANB MDH2");
-
-    GEL_WatchAdd("*(long *)0x6246,x","eCANB LAM3");
-    GEL_WatchAdd("*(long *)0x6286,x","eCANB MOTS3");
-    GEL_WatchAdd("*(long *)0x62C6,x","eCANB MOTO3");
-    GEL_WatchAdd("*(long *)0x6318,x","eCANB MID3");
-    GEL_WatchAdd("*(long *)0x631A,x","eCANB MCF3");
-    GEL_WatchAdd("*(long *)0x631C,x","eCANB MDL3");
-    GEL_WatchAdd("*(long *)0x631E,x","eCANB MDH3");
-}
-hotmenu eCAN_B_Mailbox_4_to_5_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6248,x","eCANB LAM4");
-    GEL_WatchAdd("*(long *)0x6288,x","eCANB MOTS4");
-    GEL_WatchAdd("*(long *)0x62C8,x","eCANB MOTO4");
-    GEL_WatchAdd("*(long *)0x6320,x","eCANB MID4");
-    GEL_WatchAdd("*(long *)0x6322,x","eCANB MCF4");
-    GEL_WatchAdd("*(long *)0x6324,x","eCANB MDL4");
-    GEL_WatchAdd("*(long *)0x6326,x","eCANB MDH4");
-
-    GEL_WatchAdd("*(long *)0x624A,x","eCANB LAM5");
-    GEL_WatchAdd("*(long *)0x628A,x","eCANB MOTS5");
-    GEL_WatchAdd("*(long *)0x62CA,x","eCANB MOTO5");
-    GEL_WatchAdd("*(long *)0x6328,x","eCANB MID5");
-    GEL_WatchAdd("*(long *)0x632A,x","eCANB MCF5");
-    GEL_WatchAdd("*(long *)0x632C,x","eCANB MDL5");
-    GEL_WatchAdd("*(long *)0x632E,x","eCANB MDH5");
-}
-hotmenu eCAN_B_Mailbox_6_to_7_Regs()
-{
-    GEL_WatchAdd("*(long *)0x624C,x","eCANB LAM6");
-    GEL_WatchAdd("*(long *)0x628C,x","eCANB MOTS6");
-    GEL_WatchAdd("*(long *)0x62CC,x","eCANB MOTO6");
-    GEL_WatchAdd("*(long *)0x6330,x","eCANB MID6");
-    GEL_WatchAdd("*(long *)0x6332,x","eCANB MCF6");
-    GEL_WatchAdd("*(long *)0x6334,x","eCANB MDL6");
-    GEL_WatchAdd("*(long *)0x6336,x","eCANB MDH6");
-
-    GEL_WatchAdd("*(long *)0x624E,x","eCANB LAM7");
-    GEL_WatchAdd("*(long *)0x628E,x","eCANB MOTS7");
-    GEL_WatchAdd("*(long *)0x62CE,x","eCANB MOTO7");
-    GEL_WatchAdd("*(long *)0x6338,x","eCANB MID7");
-    GEL_WatchAdd("*(long *)0x633A,x","eCANB MCF7");
-    GEL_WatchAdd("*(long *)0x633C,x","eCANB MDL7");
-    GEL_WatchAdd("*(long *)0x633E,x","eCANB MDH7");
-}
-hotmenu eCAN_B_Mailbox_8_to_9_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6250,x","eCANB LAM8");
-    GEL_WatchAdd("*(long *)0x6290,x","eCANB MOTS8");
-    GEL_WatchAdd("*(long *)0x62D0,x","eCANB MOTO8");
-    GEL_WatchAdd("*(long *)0x6340,x","eCANB MID8");
-    GEL_WatchAdd("*(long *)0x6342,x","eCANB MCF8");
-    GEL_WatchAdd("*(long *)0x6344,x","eCANB MDL8");
-    GEL_WatchAdd("*(long *)0x6346,x","eCANB MDH8");
-
-    GEL_WatchAdd("*(long *)0x6252,x","eCANB LAM9");
-    GEL_WatchAdd("*(long *)0x6292,x","eCANB MOTS9");
-    GEL_WatchAdd("*(long *)0x62D2,x","eCANB MOTO9");
-    GEL_WatchAdd("*(long *)0x6348,x","eCANB MID9");
-    GEL_WatchAdd("*(long *)0x634A,x","eCANB MCF9");
-    GEL_WatchAdd("*(long *)0x634C,x","eCANB MDL9");
-    GEL_WatchAdd("*(long *)0x634E,x","eCANB MDH9");
-}
-hotmenu eCAN_B_Mailbox_10_to_11_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6254,x","eCANB LAM10");
-    GEL_WatchAdd("*(long *)0x6294,x","eCANB MOTS10");
-    GEL_WatchAdd("*(long *)0x62D4,x","eCANB MOTO10");
-    GEL_WatchAdd("*(long *)0x6350,x","eCANB MID10");
-    GEL_WatchAdd("*(long *)0x6352,x","eCANB MCF10");
-    GEL_WatchAdd("*(long *)0x6354,x","eCANB MDL10");
-    GEL_WatchAdd("*(long *)0x6356,x","eCANB MDH10");
-
-    GEL_WatchAdd("*(long *)0x6256,x","eCANB LAM11");
-    GEL_WatchAdd("*(long *)0x6296,x","eCANB MOTS11");
-    GEL_WatchAdd("*(long *)0x62D6,x","eCANB MOTO11");
-    GEL_WatchAdd("*(long *)0x6358,x","eCANB MID11");
-    GEL_WatchAdd("*(long *)0x635A,x","eCANB MCF11");
-    GEL_WatchAdd("*(long *)0x635C,x","eCANB MDL11");
-    GEL_WatchAdd("*(long *)0x635E,x","eCANB MDH11");
-}
-hotmenu eCAN_B_Mailbox_12_to_13_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6258,x","eCANB LAM12");
-    GEL_WatchAdd("*(long *)0x6298,x","eCANB MOTS12");
-    GEL_WatchAdd("*(long *)0x62D8,x","eCANB MOTO12");
-    GEL_WatchAdd("*(long *)0x6360,x","eCANB MID12");
-    GEL_WatchAdd("*(long *)0x6362,x","eCANB MCF12");
-    GEL_WatchAdd("*(long *)0x6364,x","eCANB MDL12");
-    GEL_WatchAdd("*(long *)0x6366,x","eCANB MDH12");
-
-    GEL_WatchAdd("*(long *)0x625A,x","eCANB LAM13");
-    GEL_WatchAdd("*(long *)0x629A,x","eCANB MOTS13");
-    GEL_WatchAdd("*(long *)0x62DA,x","eCANB MOTO13");
-    GEL_WatchAdd("*(long *)0x6368,x","eCANB MID13");
-    GEL_WatchAdd("*(long *)0x636A,x","eCANB MCF13");
-    GEL_WatchAdd("*(long *)0x636C,x","eCANB MDL13");
-    GEL_WatchAdd("*(long *)0x636E,x","eCANB MDH13");
-}
-hotmenu eCAN_B_Mailbox_14_to_15_Regs()
-{
-    GEL_WatchAdd("*(long *)0x625C,x","eCANB LAM14");
-    GEL_WatchAdd("*(long *)0x629C,x","eCANB MOTS14");
-    GEL_WatchAdd("*(long *)0x62DC,x","eCANB MOTO14");
-    GEL_WatchAdd("*(long *)0x6370,x","eCANB MID14");
-    GEL_WatchAdd("*(long *)0x6372,x","eCANB MCF14");
-    GEL_WatchAdd("*(long *)0x6374,x","eCANB MDL14");
-    GEL_WatchAdd("*(long *)0x6376,x","eCANB MDH14");
-
-    GEL_WatchAdd("*(long *)0x625E,x","eCANB LAM15");
-    GEL_WatchAdd("*(long *)0x629E,x","eCANB MOTS15");
-    GEL_WatchAdd("*(long *)0x62DE,x","eCANB MOTO15");
-    GEL_WatchAdd("*(long *)0x6378,x","eCANB MID15");
-    GEL_WatchAdd("*(long *)0x637A,x","eCANB MCF15");
-    GEL_WatchAdd("*(long *)0x637C,x","eCANB MDL15");
-    GEL_WatchAdd("*(long *)0x637E,x","eCANB MDH15");
-}
-hotmenu eCAN_B_Mailbox_16_to_17_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6260,x","eCANB LAM16");
-    GEL_WatchAdd("*(long *)0x62A0,x","eCANB MOTS16");
-    GEL_WatchAdd("*(long *)0x62E0,x","eCANB MOTO16");
-    GEL_WatchAdd("*(long *)0x6380,x","eCANB MID16");
-    GEL_WatchAdd("*(long *)0x6382,x","eCANB MCF16");
-    GEL_WatchAdd("*(long *)0x6384,x","eCANB MDL16");
-    GEL_WatchAdd("*(long *)0x6386,x","eCANB MDH16");
-
-    GEL_WatchAdd("*(long *)0x6262,x","eCANB LAM17");
-    GEL_WatchAdd("*(long *)0x62A2,x","eCANB MOTS17");
-    GEL_WatchAdd("*(long *)0x62E2,x","eCANB MOTO17");
-    GEL_WatchAdd("*(long *)0x6388,x","eCANB MID17");
-    GEL_WatchAdd("*(long *)0x638A,x","eCANB MCF17");
-    GEL_WatchAdd("*(long *)0x638C,x","eCANB MDL17");
-    GEL_WatchAdd("*(long *)0x638E,x","eCANB MDH17");
-}
-hotmenu eCAN_B_Mailbox_18_to_19_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6264,x","eCANB LAM18");
-    GEL_WatchAdd("*(long *)0x62A4,x","eCANB MOTS18");
-    GEL_WatchAdd("*(long *)0x62E4,x","eCANB MOTO18");
-    GEL_WatchAdd("*(long *)0x6390,x","eCANB MID18");
-    GEL_WatchAdd("*(long *)0x6392,x","eCANB MCF18");
-    GEL_WatchAdd("*(long *)0x6394,x","eCANB MDL18");
-    GEL_WatchAdd("*(long *)0x6396,x","eCANB MDH18");
-
-    GEL_WatchAdd("*(long *)0x6266,x","eCANB LAM19");
-    GEL_WatchAdd("*(long *)0x62A6,x","eCANB MOTS19");
-    GEL_WatchAdd("*(long *)0x62E6,x","eCANB MOTO19");
-    GEL_WatchAdd("*(long *)0x6398,x","eCANB MID19");
-    GEL_WatchAdd("*(long *)0x639A,x","eCANB MCF19");
-    GEL_WatchAdd("*(long *)0x639C,x","eCANB MDL19");
-    GEL_WatchAdd("*(long *)0x639E,x","eCANB MDH19");
-}
-hotmenu eCAN_B_Mailbox_20_to_21_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6268,x","eCANB LAM20");
-    GEL_WatchAdd("*(long *)0x62A8,x","eCANB MOTS20");
-    GEL_WatchAdd("*(long *)0x62E8,x","eCANB MOTO20");
-    GEL_WatchAdd("*(long *)0x63A0,x","eCANB MID20");
-    GEL_WatchAdd("*(long *)0x63A2,x","eCANB MCF20");
-    GEL_WatchAdd("*(long *)0x63A4,x","eCANB MDL20");
-    GEL_WatchAdd("*(long *)0x63A6,x","eCANB MDH20");
-
-    GEL_WatchAdd("*(long *)0x626A,x","eCANB LAM21");
-    GEL_WatchAdd("*(long *)0x62AA,x","eCANB MOTS21");
-    GEL_WatchAdd("*(long *)0x62EA,x","eCANB MOTO21");
-    GEL_WatchAdd("*(long *)0x63A8,x","eCANB MID21");
-    GEL_WatchAdd("*(long *)0x63AA,x","eCANB MCF21");
-    GEL_WatchAdd("*(long *)0x63AC,x","eCANB MDL21");
-    GEL_WatchAdd("*(long *)0x63AE,x","eCANB MDH21");
-}
-hotmenu eCAN_B_Mailbox_22_to_23_Regs()
-{
-    GEL_WatchAdd("*(long *)0x626C,x","eCANB LAM22");
-    GEL_WatchAdd("*(long *)0x62AC,x","eCANB MOTS22");
-    GEL_WatchAdd("*(long *)0x62EC,x","eCANB MOTO22");
-    GEL_WatchAdd("*(long *)0x63B0,x","eCANB MID22");
-    GEL_WatchAdd("*(long *)0x63B2,x","eCANB MCF22");
-    GEL_WatchAdd("*(long *)0x63B4,x","eCANB MDL22");
-    GEL_WatchAdd("*(long *)0x63B6,x","eCANB MDH22");
-
-    GEL_WatchAdd("*(long *)0x626E,x","eCANB LAM23");
-    GEL_WatchAdd("*(long *)0x62AE,x","eCANB MOTS23");
-    GEL_WatchAdd("*(long *)0x62EE,x","eCANB MOTO23");
-    GEL_WatchAdd("*(long *)0x63B8,x","eCANB MID23");
-    GEL_WatchAdd("*(long *)0x63BA,x","eCANB MCF23");
-    GEL_WatchAdd("*(long *)0x63BC,x","eCANB MDL23");
-    GEL_WatchAdd("*(long *)0x63BE,x","eCANB MDH23");
-}
-hotmenu eCAN_B_Mailbox_24_to_25_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6270,x","eCANB LAM24");
-    GEL_WatchAdd("*(long *)0x62B0,x","eCANB MOTS24");
-    GEL_WatchAdd("*(long *)0x62F0,x","eCANB MOTO24");
-    GEL_WatchAdd("*(long *)0x63C0,x","eCANB MID24");
-    GEL_WatchAdd("*(long *)0x63C2,x","eCANB MCF24");
-    GEL_WatchAdd("*(long *)0x63C4,x","eCANB MDL24");
-    GEL_WatchAdd("*(long *)0x63C6,x","eCANB MDH24");
-
-    GEL_WatchAdd("*(long *)0x6272,x","eCANB LAM25");
-    GEL_WatchAdd("*(long *)0x62B2,x","eCANB MOTS25");
-    GEL_WatchAdd("*(long *)0x62F2,x","eCANB MOTO25");
-    GEL_WatchAdd("*(long *)0x63C8,x","eCANB MID25");
-    GEL_WatchAdd("*(long *)0x63CA,x","eCANB MCF25");
-    GEL_WatchAdd("*(long *)0x63CC,x","eCANB MDL25");
-    GEL_WatchAdd("*(long *)0x63CE,x","eCANB MDH25");
-}
-hotmenu eCAN_B_Mailbox_26_to_27_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6274,x","eCANB LAM26");
-    GEL_WatchAdd("*(long *)0x62B4,x","eCANB MOTS26");
-    GEL_WatchAdd("*(long *)0x62F4,x","eCANB MOTO26");
-    GEL_WatchAdd("*(long *)0x63D0,x","eCANB MID26");
-    GEL_WatchAdd("*(long *)0x63D2,x","eCANB MCF26");
-    GEL_WatchAdd("*(long *)0x63D4,x","eCANB MDL26");
-    GEL_WatchAdd("*(long *)0x63D6,x","eCANB MDH26");
-
-    GEL_WatchAdd("*(long *)0x6276,x","eCANB LAM27");
-    GEL_WatchAdd("*(long *)0x62B6,x","eCANB MOTS27");
-    GEL_WatchAdd("*(long *)0x62F6,x","eCANB MOTO27");
-    GEL_WatchAdd("*(long *)0x63D8,x","eCANB MID27");
-    GEL_WatchAdd("*(long *)0x63DA,x","eCANB MCF27");
-    GEL_WatchAdd("*(long *)0x63DC,x","eCANB MDL27");
-    GEL_WatchAdd("*(long *)0x63DE,x","eCANB MDH27");
-}
-hotmenu eCAN_B_Mailbox_28_to_29_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6278,x","eCANB LAM28");
-    GEL_WatchAdd("*(long *)0x62B8,x","eCANB MOTS28");
-    GEL_WatchAdd("*(long *)0x62F8,x","eCANB MOTO28");
-    GEL_WatchAdd("*(long *)0x63E0,x","eCANB MID28");
-    GEL_WatchAdd("*(long *)0x63E2,x","eCANB MCF28");
-    GEL_WatchAdd("*(long *)0x63E4,x","eCANB MDL28");
-    GEL_WatchAdd("*(long *)0x63E6,x","eCANB MDH28");
-
-    GEL_WatchAdd("*(long *)0x627A,x","eCANB LAM29");
-    GEL_WatchAdd("*(long *)0x62BA,x","eCANB MOTS29");
-    GEL_WatchAdd("*(long *)0x62FA,x","eCANB MOTO29");
-    GEL_WatchAdd("*(long *)0x63E8,x","eCANB MID29");
-    GEL_WatchAdd("*(long *)0x63EA,x","eCANB MCF29");
-    GEL_WatchAdd("*(long *)0x63EC,x","eCANB MDL29");
-    GEL_WatchAdd("*(long *)0x63EE,x","eCANB MDH29");
-}
-hotmenu eCAN_B_Mailbox_30_to_31_Regs()
-{
-    GEL_WatchAdd("*(long *)0x627C,x","eCANB LAM30");
-    GEL_WatchAdd("*(long *)0x62BC,x","eCANB MOTS30");
-    GEL_WatchAdd("*(long *)0x62FC,x","eCANB MOTO30");
-    GEL_WatchAdd("*(long *)0x63F0,x","eCANB MID30");
-    GEL_WatchAdd("*(long *)0x63F2,x","eCANB MCF30");
-    GEL_WatchAdd("*(long *)0x63F4,x","eCANB MDL30");
-    GEL_WatchAdd("*(long *)0x63F6,x","eCANB MDH30");
-
-    GEL_WatchAdd("*(long *)0x627E,x","eCANB LAM31");
-    GEL_WatchAdd("*(long *)0x62BE,x","eCANB MOTS31");
-    GEL_WatchAdd("*(long *)0x62FE,x","eCANB MOTO31");
-    GEL_WatchAdd("*(long *)0x63F8,x","eCANB MID31");
-    GEL_WatchAdd("*(long *)0x63FA,x","eCANB MCF31");
-    GEL_WatchAdd("*(long *)0x63FC,x","eCANB MDL31");
-    GEL_WatchAdd("*(long *)0x63FE,x","eCANB MDH31");
-}
-
-
-/********************************************************************/
-/* Enhanced Capture Registers                                       */
-/********************************************************************/
-menuitem "Watch eCAP Registers";
-
-hotmenu eCAP1_All_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6A00,x","eCAP1 TSCNT");
-    GEL_WatchAdd("*(long *)0x6A02,x","eCAP1 CNTPHS");
-    GEL_WatchAdd("*(long *)0x6A04,x","eCAP1 CAP1");
-    GEL_WatchAdd("*(long *)0x6A06,x","eCAP1 CAP2");
-    GEL_WatchAdd("*(long *)0x6A08,x","eCAP1 CAP3");
-    GEL_WatchAdd("*(long *)0x6A0A,x","eCAP1 CAP4");
-    GEL_WatchAdd("*0x6A14,x","eCAP1 ECCTL1");
-    GEL_WatchAdd("*0x6A15,x","eCAP1 ECCTL2");
-    GEL_WatchAdd("*0x6A16,x","eCAP1 ECEINT");
-    GEL_WatchAdd("*0x6A17,x","eCAP1 ECFLG");
-    GEL_WatchAdd("*0x6A18,x","eCAP1 ECCLR");
-    GEL_WatchAdd("*0x6A19,x","eCAP1 ECFRC");
-}
-hotmenu eCAP2_All_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6A20,x","eCAP2 TSCNT");
-    GEL_WatchAdd("*(long *)0x6A22,x","eCAP2 CNTPHS");
-    GEL_WatchAdd("*(long *)0x6A24,x","eCAP2 CAP1");
-    GEL_WatchAdd("*(long *)0x6A26,x","eCAP2 CAP2");
-    GEL_WatchAdd("*(long *)0x6A28,x","eCAP2 CAP3");
-    GEL_WatchAdd("*(long *)0x6A2A,x","eCAP2 CAP4");
-    GEL_WatchAdd("*0x6A34,x","eCAP2 ECCTL1");
-    GEL_WatchAdd("*0x6A35,x","eCAP2 ECCTL2");
-    GEL_WatchAdd("*0x6A36,x","eCAP2 ECEINT");
-    GEL_WatchAdd("*0x6A37,x","eCAP2 ECFLG");
-    GEL_WatchAdd("*0x6A38,x","eCAP2 ECCLR");
-    GEL_WatchAdd("*0x6A39,x","eCAP2 ECFRC");
-}
-hotmenu eCAP3_All_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6A40,x","eCAP3 TSCNT");
-    GEL_WatchAdd("*(long *)0x6A42,x","eCAP3 CNTPHS");
-    GEL_WatchAdd("*(long *)0x6A44,x","eCAP3 CAP1");
-    GEL_WatchAdd("*(long *)0x6A46,x","eCAP3 CAP2");
-    GEL_WatchAdd("*(long *)0x6A48,x","eCAP3 CAP3");
-    GEL_WatchAdd("*(long *)0x6A4A,x","eCAP3 CAP4");
-    GEL_WatchAdd("*0x6A54,x","eCAP3 ECCTL1");
-    GEL_WatchAdd("*0x6A55,x","eCAP3 ECCTL2");
-    GEL_WatchAdd("*0x6A56,x","eCAP3 ECEINT");
-    GEL_WatchAdd("*0x6A57,x","eCAP3 ECFLG");
-    GEL_WatchAdd("*0x6A58,x","eCAP3 ECCLR");
-    GEL_WatchAdd("*0x6A59,x","eCAP3 ECFRC");
-}
-hotmenu eCAP4_All_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6A60,x","eCAP4 TSCNT");
-    GEL_WatchAdd("*(long *)0x6A62,x","eCAP4 CNTPHS");
-    GEL_WatchAdd("*(long *)0x6A64,x","eCAP4 CAP1");
-    GEL_WatchAdd("*(long *)0x6A66,x","eCAP4 CAP2");
-    GEL_WatchAdd("*(long *)0x6A68,x","eCAP4 CAP3");
-    GEL_WatchAdd("*(long *)0x6A6A,x","eCAP4 CAP4");
-    GEL_WatchAdd("*0x6A74,x","eCAP4 ECCTL1");
-    GEL_WatchAdd("*0x6A75,x","eCAP4 ECCTL2");
-    GEL_WatchAdd("*0x6A76,x","eCAP4 ECEINT");
-    GEL_WatchAdd("*0x6A77,x","eCAP4 ECFLG");
-    GEL_WatchAdd("*0x6A78,x","eCAP4 ECCLR");
-    GEL_WatchAdd("*0x6A79,x","eCAP4 ECFRC");
-}
-
-/********************************************************************/
-/* Enhanced PWM Registers                                           */
-/********************************************************************/
-menuitem "Watch ePWM Registers";
-
-hotmenu ePWM1_All_Regs()
-{
-    GEL_WatchAdd("*0x6800,x","ePWM1 TBCTL");
-    GEL_WatchAdd("*0x6801,x","ePWM1 TBSTS");
-    GEL_WatchAdd("*0x6802,x","ePWM1 TBPHSHR");
-    GEL_WatchAdd("*0x6803,x","ePWM1 TBPHS");
-    GEL_WatchAdd("*0x6804,x","ePWM1 TBCTR");
-    GEL_WatchAdd("*0x6805,x","ePWM1 TBPRD");
-    GEL_WatchAdd("*0x6807,x","ePWM1 CMPCTL");
-    GEL_WatchAdd("*0x6808,x","ePWM1 CMPAHR");
-    GEL_WatchAdd("*0x6809,x","ePWM1 CMPA");
-    GEL_WatchAdd("*0x680A,x","ePWM1 CMPB");
-    GEL_WatchAdd("*0x680B,x","ePWM1 AQCTLA");
-    GEL_WatchAdd("*0x680C,x","ePWM1 AQCTLB");
-    GEL_WatchAdd("*0x680D,x","ePWM1 AQSFRC");
-    GEL_WatchAdd("*0x680E,x","ePWM1 AQCSFRC");
-    GEL_WatchAdd("*0x680F,x","ePWM1 DBCTL");
-    GEL_WatchAdd("*0x6810,x","ePWM1 DBRED");
-    GEL_WatchAdd("*0x6811,x","ePWM1 DBFED");
-    GEL_WatchAdd("*0x6812,x","ePWM1 TZSEL");
-    GEL_WatchAdd("*0x6813,x","ePWM1 TZDCSEL");
-    GEL_WatchAdd("*0x6814,x","ePWM1 TZCTL");
-    GEL_WatchAdd("*0x6815,x","ePWM1 TZEINT");
-    GEL_WatchAdd("*0x6816,x","ePWM1 TZFLG");
-    GEL_WatchAdd("*0x6817,x","ePWM1 TZCLR");
-    GEL_WatchAdd("*0x6818,x","ePWM1 TZFRC");
-    GEL_WatchAdd("*0x6819,x","ePWM1 ETSEL");
-    GEL_WatchAdd("*0x681A,x","ePWM1 ETPS");
-    GEL_WatchAdd("*0x681B,x","ePWM1 ETFLG");
-    GEL_WatchAdd("*0x681C,x","ePWM1 ETCLR");
-    GEL_WatchAdd("*0x681D,x","ePWM1 ETFRC");
-    GEL_WatchAdd("*0x681E,x","ePWM1 PCCTL");
-    GEL_WatchAdd("*0x6820,x","ePWM1 HRCNFG");
-}
-hotmenu ePWM1_TB_Regs()
-{
-    GEL_WatchAdd("*0x6800,x","ePWM1 TBCTL");
-    GEL_WatchAdd("*0x6801,x","ePWM1 TBSTS");
-    GEL_WatchAdd("*0x6802,x","ePWM1 TBPHSHR");
-    GEL_WatchAdd("*0x6803,x","ePWM1 TBPHS");
-    GEL_WatchAdd("*0x6804,x","ePWM1 TBCTR");
-    GEL_WatchAdd("*0x6805,x","ePWM1 TBPRD");
-}
-hotmenu ePWM1_CMP_Regs()
-{
-    GEL_WatchAdd("*0x6807,x","ePWM1 CMPCTL");
-    GEL_WatchAdd("*0x6808,x","ePWM1 CMPAHR");
-    GEL_WatchAdd("*0x6809,x","ePWM1 CMPA");
-    GEL_WatchAdd("*0x680A,x","ePWM1 CMPB");
-}
-hotmenu ePWM1_AQ_Regs()
-{
-    GEL_WatchAdd("*0x680B,x","ePWM1 AQCTLA");
-    GEL_WatchAdd("*0x680C,x","ePWM1 AQCTLB");
-    GEL_WatchAdd("*0x680D,x","ePWM1 AQSFRC");
-    GEL_WatchAdd("*0x680E,x","ePWM1 AQCSFRC");
-}
-hotmenu ePWM1_DB_Regs()
-{
-    GEL_WatchAdd("*0x680F,x","ePWM1 DBCTL");
-    GEL_WatchAdd("*0x6810,x","ePWM1 DBRED");
-    GEL_WatchAdd("*0x6811,x","ePWM1 DBFED");
-}
-hotmenu ePWM1_TZ_Regs()
-{
-    GEL_WatchAdd("*0x6812,x","ePWM1 TZSEL");
-    GEL_WatchAdd("*0x6814,x","ePWM1 TZCTL");
-    GEL_WatchAdd("*0x6815,x","ePWM1 TZEINT");
-    GEL_WatchAdd("*0x6816,x","ePWM1 TZFLG");
-    GEL_WatchAdd("*0x6817,x","ePWM1 TZCLR");
-    GEL_WatchAdd("*0x6818,x","ePWM1 TZFRC");
-}
-hotmenu ePWM1_ET_Regs()
-{
-    GEL_WatchAdd("*0x6819,x","ePWM1 ETSEL");
-    GEL_WatchAdd("*0x681A,x","ePWM1 ETPS");
-    GEL_WatchAdd("*0x681B,x","ePWM1 ETFLG");
-    GEL_WatchAdd("*0x681C,x","ePWM1 ETCLR");
-    GEL_WatchAdd("*0x681D,x","ePWM1 ETFRC");
-}
-hotmenu ePWM2_All_Regs()
-{
-    GEL_WatchAdd("*0x6840,x","ePWM2 TBCTL");
-    GEL_WatchAdd("*0x6841,x","ePWM2 TBSTS");
-    GEL_WatchAdd("*0x6842,x","ePWM2 TBPHSHR");
-    GEL_WatchAdd("*0x6843,x","ePWM2 TBPHS");
-    GEL_WatchAdd("*0x6844,x","ePWM2 TBCTR");
-    GEL_WatchAdd("*0x6845,x","ePWM2 TBPRD");
-    GEL_WatchAdd("*0x6847,x","ePWM2 CMPCTL");
-    GEL_WatchAdd("*0x6848,x","ePWM2 CMPAHR");
-    GEL_WatchAdd("*0x6849,x","ePWM2 CMPA");
-    GEL_WatchAdd("*0x684A,x","ePWM2 CMPB");
-    GEL_WatchAdd("*0x684B,x","ePWM2 AQCTLA");
-    GEL_WatchAdd("*0x684C,x","ePWM2 AQCTLB");
-    GEL_WatchAdd("*0x684D,x","ePWM2 AQSFRC");
-    GEL_WatchAdd("*0x684E,x","ePWM2 AQCSFRC");
-    GEL_WatchAdd("*0x684F,x","ePWM2 DBCTL");
-    GEL_WatchAdd("*0x6850,x","ePWM2 DBRED");
-    GEL_WatchAdd("*0x6851,x","ePWM2 DBFED");
-    GEL_WatchAdd("*0x6852,x","ePWM2 TZSEL");
-    GEL_WatchAdd("*0x6853,x","ePWM2 TZDCSEL");
-    GEL_WatchAdd("*0x6854,x","ePWM2 TZCTL");
-    GEL_WatchAdd("*0x6855,x","ePWM2 TZEINT");
-    GEL_WatchAdd("*0x6856,x","ePWM2 TZFLG");
-    GEL_WatchAdd("*0x6857,x","ePWM2 TZCLR");
-    GEL_WatchAdd("*0x6858,x","ePWM2 TZFRC");
-    GEL_WatchAdd("*0x6859,x","ePWM2 ETSEL");
-    GEL_WatchAdd("*0x685A,x","ePWM2 ETPS");
-    GEL_WatchAdd("*0x685B,x","ePWM2 ETFLG");
-    GEL_WatchAdd("*0x685C,x","ePWM2 ETCLR");
-    GEL_WatchAdd("*0x685D,x","ePWM2 ETFRC");
-    GEL_WatchAdd("*0x685E,x","ePWM2 PCCTL");
-    GEL_WatchAdd("*0x6860,x","ePWM2 HRCNFG");
-}
-hotmenu ePWM2_TB_Regs()
-{
-    GEL_WatchAdd("*0x6840,x","ePWM2 TBCTL");
-    GEL_WatchAdd("*0x6841,x","ePWM2 TBSTS");
-    GEL_WatchAdd("*0x6842,x","ePWM2 TBPHSHR");
-    GEL_WatchAdd("*0x6843,x","ePWM2 TBPHS");
-    GEL_WatchAdd("*0x6844,x","ePWM2 TBCTR");
-    GEL_WatchAdd("*0x6845,x","ePWM2 TBPRD");
-}
-hotmenu ePWM2_CMP_Regs()
-{
-    GEL_WatchAdd("*0x6847,x","ePWM2 CMPCTL");
-    GEL_WatchAdd("*0x6848,x","ePWM2 CMPAHR");
-    GEL_WatchAdd("*0x6849,x","ePWM2 CMPA");
-    GEL_WatchAdd("*0x684A,x","ePWM2 CMPB");
-}
-hotmenu ePWM2_AQ_Regs()
-{
-    GEL_WatchAdd("*0x684B,x","ePWM2 AQCTLA");
-    GEL_WatchAdd("*0x684C,x","ePWM2 AQCTLB");
-    GEL_WatchAdd("*0x684D,x","ePWM2 AQSFRC");
-    GEL_WatchAdd("*0x684E,x","ePWM2 AQCSFRC");
-}
-hotmenu ePWM2_DB_Regs()
-{
-    GEL_WatchAdd("*0x684F,x","ePWM2 DBCTL");
-    GEL_WatchAdd("*0x6850,x","ePWM2 DBRED");
-    GEL_WatchAdd("*0x6851,x","ePWM2 DBFED");
-}
-hotmenu ePWM2_TZ_Regs()
-{
-    GEL_WatchAdd("*0x6852,x","ePWM2 TZSEL");
-    GEL_WatchAdd("*0x6854,x","ePWM2 TZCTL");
-    GEL_WatchAdd("*0x6855,x","ePWM2 TZEINT");
-    GEL_WatchAdd("*0x6856,x","ePWM2 TZFLG");
-    GEL_WatchAdd("*0x6857,x","ePWM2 TZCLR");
-    GEL_WatchAdd("*0x6858,x","ePWM2 TZFRC");
-}
-hotmenu ePWM2_ET_Regs()
-{
-    GEL_WatchAdd("*0x6859,x","ePWM2 ETSEL");
-    GEL_WatchAdd("*0x685A,x","ePWM2 ETPS");
-    GEL_WatchAdd("*0x685B,x","ePWM2 ETFLG");
-    GEL_WatchAdd("*0x685C,x","ePWM2 ETCLR");
-    GEL_WatchAdd("*0x685D,x","ePWM2 ETFRC");
-}
-hotmenu ePWM3_All_Regs()
-{
-    GEL_WatchAdd("*0x6880,x","ePWM3 TBCTL");
-    GEL_WatchAdd("*0x6881,x","ePWM3 TBSTS");
-    GEL_WatchAdd("*0x6882,x","ePWM3 TBPHSHR");
-    GEL_WatchAdd("*0x6883,x","ePWM3 TBPHS");
-    GEL_WatchAdd("*0x6884,x","ePWM3 TBCTR");
-    GEL_WatchAdd("*0x6885,x","ePWM3 TBPRD");
-    GEL_WatchAdd("*0x6887,x","ePWM3 CMPCTL");
-    GEL_WatchAdd("*0x6888,x","ePWM3 CMPAHR");
-    GEL_WatchAdd("*0x6889,x","ePWM3 CMPA");
-    GEL_WatchAdd("*0x688A,x","ePWM3 CMPB");
-    GEL_WatchAdd("*0x688B,x","ePWM3 AQCTLA");
-    GEL_WatchAdd("*0x688C,x","ePWM3 AQCTLB");
-    GEL_WatchAdd("*0x688D,x","ePWM3 AQSFRC");
-    GEL_WatchAdd("*0x688E,x","ePWM3 AQCSFRC");
-    GEL_WatchAdd("*0x688F,x","ePWM3 DBCTL");
-    GEL_WatchAdd("*0x6890,x","ePWM3 DBRED");
-    GEL_WatchAdd("*0x6891,x","ePWM3 DBFED");
-    GEL_WatchAdd("*0x6892,x","ePWM3 TZSEL");
-    GEL_WatchAdd("*0x6893,x","ePWM3 TZDCSEL");
-    GEL_WatchAdd("*0x6894,x","ePWM3 TZCTL");
-    GEL_WatchAdd("*0x6895,x","ePWM3 TZEINT");
-    GEL_WatchAdd("*0x6896,x","ePWM3 TZFLG");
-    GEL_WatchAdd("*0x6897,x","ePWM3 TZCLR");
-    GEL_WatchAdd("*0x6898,x","ePWM3 TZFRC");
-    GEL_WatchAdd("*0x6899,x","ePWM3 ETSEL");
-    GEL_WatchAdd("*0x689A,x","ePWM3 ETPS");
-    GEL_WatchAdd("*0x689B,x","ePWM3 ETFLG");
-    GEL_WatchAdd("*0x689C,x","ePWM3 ETCLR");
-    GEL_WatchAdd("*0x689D,x","ePWM3 ETFRC");
-    GEL_WatchAdd("*0x689E,x","ePWM3 PCCTL");
-    GEL_WatchAdd("*0x68A0,x","ePWM3 HRCNFG");
-}
-hotmenu ePWM3_TB_Regs()
-{
-    GEL_WatchAdd("*0x6880,x","ePWM3 TBCTL");
-    GEL_WatchAdd("*0x6881,x","ePWM3 TBSTS");
-    GEL_WatchAdd("*0x6882,x","ePWM3 TBPHSHR");
-    GEL_WatchAdd("*0x6883,x","ePWM3 TBPHS");
-    GEL_WatchAdd("*0x6884,x","ePWM3 TBCTR");
-    GEL_WatchAdd("*0x6885,x","ePWM3 TBPRD");
-}
-hotmenu ePWM3_CMP_Regs()
-{
-    GEL_WatchAdd("*0x6887,x","ePWM3 CMPCTL");
-    GEL_WatchAdd("*0x6888,x","ePWM3 CMPAHR");
-    GEL_WatchAdd("*0x6889,x","ePWM3 CMPA");
-    GEL_WatchAdd("*0x688A,x","ePWM3 CMPB");
-}
-hotmenu ePWM3_AQ_Regs()
-{
-    GEL_WatchAdd("*0x688B,x","ePWM3 AQCTLA");
-    GEL_WatchAdd("*0x688C,x","ePWM3 AQCTLB");
-    GEL_WatchAdd("*0x688D,x","ePWM3 AQSFRC");
-    GEL_WatchAdd("*0x688E,x","ePWM3 AQCSFRC");
-}
-hotmenu ePWM3_DB_Regs()
-{
-    GEL_WatchAdd("*0x688F,x","ePWM3 DBCTL");
-    GEL_WatchAdd("*0x6890,x","ePWM3 DBRED");
-    GEL_WatchAdd("*0x6891,x","ePWM3 DBFED");
-}
-hotmenu ePWM3_TZ_Regs()
-{
-    GEL_WatchAdd("*0x6892,x","ePWM3 TZSEL");
-    GEL_WatchAdd("*0x6894,x","ePWM3 TZCTL");
-    GEL_WatchAdd("*0x6895,x","ePWM3 TZEINT");
-    GEL_WatchAdd("*0x6896,x","ePWM3 TZFLG");
-    GEL_WatchAdd("*0x6897,x","ePWM3 TZCLR");
-    GEL_WatchAdd("*0x6898,x","ePWM3 TZFRC");
-}
-hotmenu ePWM3_ET_Regs()
-{
-    GEL_WatchAdd("*0x6899,x","ePWM3 ETSEL");
-    GEL_WatchAdd("*0x689A,x","ePWM3 ETPS");
-    GEL_WatchAdd("*0x689B,x","ePWM3 ETFLG");
-    GEL_WatchAdd("*0x689C,x","ePWM3 ETCLR");
-    GEL_WatchAdd("*0x689D,x","ePWM3 ETFRC");
-}
-hotmenu ePWM4_All_Regs()
-{
-    GEL_WatchAdd("*0x68C0,x","ePWM4 TBCTL");
-    GEL_WatchAdd("*0x68C1,x","ePWM4 TBSTS");
-    GEL_WatchAdd("*0x68C2,x","ePWM4 TBPHSHR");
-    GEL_WatchAdd("*0x68C3,x","ePWM4 TBPHS");
-    GEL_WatchAdd("*0x68C4,x","ePWM4 TBCTR");
-    GEL_WatchAdd("*0x68C5,x","ePWM4 TBPRD");
-    GEL_WatchAdd("*0x68C7,x","ePWM4 CMPCTL");
-    GEL_WatchAdd("*0x68C8,x","ePWM4 CMPAHR");
-    GEL_WatchAdd("*0x68C9,x","ePWM4 CMPA");
-    GEL_WatchAdd("*0x68CA,x","ePWM4 CMPB");
-    GEL_WatchAdd("*0x68CB,x","ePWM4 AQCTLA");
-    GEL_WatchAdd("*0x68CC,x","ePWM4 AQCTLB");
-    GEL_WatchAdd("*0x68CD,x","ePWM4 AQSFRC");
-    GEL_WatchAdd("*0x68CE,x","ePWM4 AQCSFRC");
-    GEL_WatchAdd("*0x68CF,x","ePWM4 DBCTL");
-    GEL_WatchAdd("*0x68D0,x","ePWM4 DBRED");
-    GEL_WatchAdd("*0x68D1,x","ePWM4 DBFED");
-    GEL_WatchAdd("*0x68D2,x","ePWM4 TZSEL");
-    GEL_WatchAdd("*0x68D3,x","ePWM4 TZDCSEL");
-    GEL_WatchAdd("*0x68D4,x","ePWM4 TZCTL");
-    GEL_WatchAdd("*0x68D5,x","ePWM4 TZEINT");
-    GEL_WatchAdd("*0x68D6,x","ePWM4 TZFLG");
-    GEL_WatchAdd("*0x68D7,x","ePWM4 TZCLR");
-    GEL_WatchAdd("*0x68D8,x","ePWM4 TZFRC");
-    GEL_WatchAdd("*0x68D9,x","ePWM4 ETSEL");
-    GEL_WatchAdd("*0x68DA,x","ePWM4 ETPS");
-    GEL_WatchAdd("*0x68DB,x","ePWM4 ETFLG");
-    GEL_WatchAdd("*0x68DC,x","ePWM4 ETCLR");
-    GEL_WatchAdd("*0x68DD,x","ePWM4 ETFRC");
-    GEL_WatchAdd("*0x68DE,x","ePWM4 PCCTL");
-    GEL_WatchAdd("*0x68E0,x","ePWM4 HRCNFG");
-}
-hotmenu ePWM4_TB_Regs()
-{
-    GEL_WatchAdd("*0x68C0,x","ePWM4 TBCTL");
-    GEL_WatchAdd("*0x68C1,x","ePWM4 TBSTS");
-    GEL_WatchAdd("*0x68C2,x","ePWM4 TBPHSHR");
-    GEL_WatchAdd("*0x68C3,x","ePWM4 TBPHS");
-    GEL_WatchAdd("*0x68C4,x","ePWM4 TBCTR");
-    GEL_WatchAdd("*0x68C5,x","ePWM4 TBPRD");
-}
-hotmenu ePWM4_CMP_Regs()
-{
-    GEL_WatchAdd("*0x68C7,x","ePWM4 CMPCTL");
-    GEL_WatchAdd("*0x68C8,x","ePWM4 CMPAHR");
-    GEL_WatchAdd("*0x68C9,x","ePWM4 CMPA");
-    GEL_WatchAdd("*0x68CA,x","ePWM4 CMPB");
-}
-hotmenu ePWM4_AQ_Regs()
-{
-    GEL_WatchAdd("*0x68CB,x","ePWM4 AQCTLA");
-    GEL_WatchAdd("*0x68CC,x","ePWM4 AQCTLB");
-    GEL_WatchAdd("*0x68CD,x","ePWM4 AQSFRC");
-    GEL_WatchAdd("*0x68CE,x","ePWM4 AQCSFRC");
-}
-hotmenu ePWM4_DB_Regs()
-{
-    GEL_WatchAdd("*0x68CF,x","ePWM4 DBCTL");
-    GEL_WatchAdd("*0x68D0,x","ePWM4 DBRED");
-    GEL_WatchAdd("*0x68D1,x","ePWM4 DBFED"); 
-}
-hotmenu ePWM4_TZ_Regs()
-{
-    GEL_WatchAdd("*0x68D2,x","ePWM4 TZSEL");
-    GEL_WatchAdd("*0x68D4,x","ePWM4 TZCTL");
-    GEL_WatchAdd("*0x68D5,x","ePWM4 TZEINT");
-    GEL_WatchAdd("*0x68D6,x","ePWM4 TZFLG");
-    GEL_WatchAdd("*0x68D7,x","ePWM4 TZCLR");
-    GEL_WatchAdd("*0x68D8,x","ePWM4 TZFRC");
-}
-hotmenu ePWM4_ET_Regs()
-{
-    GEL_WatchAdd("*0x68D9,x","ePWM4 ETSEL");
-    GEL_WatchAdd("*0x68DA,x","ePWM4 ETPS");
-    GEL_WatchAdd("*0x68DB,x","ePWM4 ETFLG");
-    GEL_WatchAdd("*0x68DC,x","ePWM4 ETCLR");
-    GEL_WatchAdd("*0x68DD,x","ePWM4 ETFRC");
-}
-hotmenu ePWM5_All_Regs()
-{
-    GEL_WatchAdd("*0x6900,x","ePWM5 TBCTL");
-    GEL_WatchAdd("*0x6901,x","ePWM5 TBSTS");
-    GEL_WatchAdd("*0x6903,x","ePWM5 TBPHS");
-    GEL_WatchAdd("*0x6904,x","ePWM5 TBCTR");
-    GEL_WatchAdd("*0x6905,x","ePWM5 TBPRD");
-    GEL_WatchAdd("*0x6907,x","ePWM5 CMPCTL");
-    GEL_WatchAdd("*0x6909,x","ePWM5 CMPA");
-    GEL_WatchAdd("*0x690A,x","ePWM5 CMPB");
-    GEL_WatchAdd("*0x690B,x","ePWM5 AQCTLA");
-    GEL_WatchAdd("*0x690C,x","ePWM5 AQCTLB");
-    GEL_WatchAdd("*0x690D,x","ePWM5 AQSFRC");
-    GEL_WatchAdd("*0x690E,x","ePWM5 AQCSFRC");
-    GEL_WatchAdd("*0x690F,x","ePWM5 DBCTL");
-    GEL_WatchAdd("*0x6910,x","ePWM5 DBRED");
-    GEL_WatchAdd("*0x6911,x","ePWM5 DBFED");
-    GEL_WatchAdd("*0x6912,x","ePWM5 TZSEL");
-    GEL_WatchAdd("*0x6913,x","ePWM5 TZDCSEL");
-    GEL_WatchAdd("*0x6914,x","ePWM5 TZCTL");
-    GEL_WatchAdd("*0x6915,x","ePWM5 TZEINT");
-    GEL_WatchAdd("*0x6916,x","ePWM5 TZFLG");
-    GEL_WatchAdd("*0x6917,x","ePWM5 TZCLR");
-    GEL_WatchAdd("*0x6918,x","ePWM5 TZFRC");
-    GEL_WatchAdd("*0x6919,x","ePWM5 ETSEL");
-    GEL_WatchAdd("*0x691A,x","ePWM5 ETPS");
-    GEL_WatchAdd("*0x691B,x","ePWM5 ETFLG");
-    GEL_WatchAdd("*0x691C,x","ePWM5 ETCLR");
-    GEL_WatchAdd("*0x691D,x","ePWM5 ETFRC");
-    GEL_WatchAdd("*0x691E,x","ePWM5 PCCTL");
-}
-hotmenu ePWM5_TB_Regs()
-{
-    GEL_WatchAdd("*0x6900,x","ePWM5 TBCTL");
-    GEL_WatchAdd("*0x6901,x","ePWM5 TBSTS");
-    GEL_WatchAdd("*0x6903,x","ePWM5 TBPHS");
-    GEL_WatchAdd("*0x6904,x","ePWM5 TBCTR");
-    GEL_WatchAdd("*0x6905,x","ePWM5 TBPRD");
-}
-hotmenu ePWM5_CMP_Regs()
-{
-    GEL_WatchAdd("*0x6907,x","ePWM5 CMPCTL");
-    GEL_WatchAdd("*0x6909,x","ePWM5 CMPA");
-    GEL_WatchAdd("*0x690A,x","ePWM5 CMPB");
-}
-hotmenu ePWM5_AQ_Regs()
-{
-    GEL_WatchAdd("*0x690B,x","ePWM5 AQCTLA");
-    GEL_WatchAdd("*0x690C,x","ePWM5 AQCTLB");
-    GEL_WatchAdd("*0x690D,x","ePWM5 AQSFRC");
-    GEL_WatchAdd("*0x690E,x","ePWM5 AQCSFRC");
-}
-hotmenu ePWM5_DB_Regs()
-{
-    GEL_WatchAdd("*0x690F,x","ePWM5 DBCTL");
-    GEL_WatchAdd("*0x6910,x","ePWM5 DBRED");
-    GEL_WatchAdd("*0x6911,x","ePWM5 DBFED"); 
-}
-hotmenu ePWM5_TZ_Regs()
-{
-    GEL_WatchAdd("*0x6912,x","ePWM5 TZSEL");
-    GEL_WatchAdd("*0x6914,x","ePWM5 TZCTL");
-    GEL_WatchAdd("*0x6915,x","ePWM5 TZEINT");
-    GEL_WatchAdd("*0x6916,x","ePWM5 TZFLG");
-    GEL_WatchAdd("*0x6917,x","ePWM5 TZCLR");
-    GEL_WatchAdd("*0x6918,x","ePWM5 TZFRC");
-}
-hotmenu ePWM5_ET_Regs()
-{
-    GEL_WatchAdd("*0x6919,x","ePWM5 ETSEL");
-    GEL_WatchAdd("*0x691A,x","ePWM5 ETPS");
-    GEL_WatchAdd("*0x691B,x","ePWM5 ETFLG");
-    GEL_WatchAdd("*0x691C,x","ePWM5 ETCLR");
-    GEL_WatchAdd("*0x691D,x","ePWM5 ETFRC");
-}
-hotmenu ePWM6_All_Regs()
-{
-    GEL_WatchAdd("*0x6940,x","ePWM6 TBCTL");
-    GEL_WatchAdd("*0x6941,x","ePWM6 TBSTS");
-    GEL_WatchAdd("*0x6943,x","ePWM6 TBPHS");
-    GEL_WatchAdd("*0x6944,x","ePWM6 TBCTR");
-    GEL_WatchAdd("*0x6945,x","ePWM6 TBPRD");
-    GEL_WatchAdd("*0x6947,x","ePWM6 CMPCTL");
-    GEL_WatchAdd("*0x6949,x","ePWM6 CMPA");
-    GEL_WatchAdd("*0x694A,x","ePWM6 CMPB");
-    GEL_WatchAdd("*0x694B,x","ePWM6 AQCTLA");
-    GEL_WatchAdd("*0x694C,x","ePWM6 AQCTLB");
-    GEL_WatchAdd("*0x694D,x","ePWM6 AQSFRC");
-    GEL_WatchAdd("*0x694E,x","ePWM6 AQCSFRC");
-    GEL_WatchAdd("*0x694F,x","ePWM6 DBCTL");
-    GEL_WatchAdd("*0x6950,x","ePWM6 DBRED");
-    GEL_WatchAdd("*0x6951,x","ePWM6 DBFED");
-    GEL_WatchAdd("*0x6952,x","ePWM6 TZSEL");
-    GEL_WatchAdd("*0x6953,x","ePWM6 TZDCSEL");
-    GEL_WatchAdd("*0x6954,x","ePWM6 TZCTL");
-    GEL_WatchAdd("*0x6955,x","ePWM6 TZEINT");
-    GEL_WatchAdd("*0x6956,x","ePWM6 TZFLG");
-    GEL_WatchAdd("*0x6957,x","ePWM6 TZCLR");
-    GEL_WatchAdd("*0x6958,x","ePWM6 TZFRC");
-    GEL_WatchAdd("*0x6959,x","ePWM6 ETSEL");
-    GEL_WatchAdd("*0x695A,x","ePWM6 ETPS");
-    GEL_WatchAdd("*0x695B,x","ePWM6 ETFLG");
-    GEL_WatchAdd("*0x695C,x","ePWM6 ETCLR");
-    GEL_WatchAdd("*0x695D,x","ePWM6 ETFRC");
-    GEL_WatchAdd("*0x695E,x","ePWM6 PCCTL");
-
-}
-hotmenu ePWM6_TB_Regs()
-{
-    GEL_WatchAdd("*0x6940,x","ePWM6 TBCTL");
-    GEL_WatchAdd("*0x6941,x","ePWM6 TBSTS");
-    GEL_WatchAdd("*0x6943,x","ePWM6 TBPHS");
-    GEL_WatchAdd("*0x6944,x","ePWM6 TBCTR");
-    GEL_WatchAdd("*0x6945,x","ePWM6 TBPRD");
-}
-hotmenu ePWM6_CMP_Regs()
-{
-    GEL_WatchAdd("*0x6947,x","ePWM6 CMPCTL");
-    GEL_WatchAdd("*0x6949,x","ePWM6 CMPA");
-    GEL_WatchAdd("*0x694A,x","ePWM6 CMPB");
-}
-hotmenu ePWM6_AQ_Regs()
-{
-    GEL_WatchAdd("*0x694B,x","ePWM6 AQCTLA");
-    GEL_WatchAdd("*0x694C,x","ePWM6 AQCTLB");
-    GEL_WatchAdd("*0x694D,x","ePWM6 AQSFRC");
-    GEL_WatchAdd("*0x694E,x","ePWM6 AQCSFRC");
-}
-hotmenu ePWM6_DB_Regs()
-{
-    GEL_WatchAdd("*0x694F,x","ePWM6 DBCTL");
-    GEL_WatchAdd("*0x6950,x","ePWM6 DBRED");
-    GEL_WatchAdd("*0x6951,x","ePWM6 DBFED");
-}
-hotmenu ePWM6_TZ_Regs()
-{
-    GEL_WatchAdd("*0x6952,x","ePWM6 TZSEL");
-    GEL_WatchAdd("*0x6954,x","ePWM6 TZCTL");
-    GEL_WatchAdd("*0x6955,x","ePWM6 TZEINT");
-    GEL_WatchAdd("*0x6956,x","ePWM6 TZFLG");
-    GEL_WatchAdd("*0x6957,x","ePWM6 TZCLR");
-    GEL_WatchAdd("*0x6958,x","ePWM6 TZFRC");
-}
-hotmenu ePWM6_ET_Regs()
-{
-    GEL_WatchAdd("*0x6959,x","ePWM6 ETSEL");
-    GEL_WatchAdd("*0x695A,x","ePWM6 ETPS");
-    GEL_WatchAdd("*0x695B,x","ePWM6 ETFLG");
-    GEL_WatchAdd("*0x695C,x","ePWM6 ETCLR");
-    GEL_WatchAdd("*0x695D,x","ePWM6 ETFRC");
-}
-
-
-/********************************************************************/
-/* Enhanced EQEP Registers                                          */
-/********************************************************************/
-menuitem "Watch eQEP"
-
-hotmenu eQEP1_All_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6B00,x","eQEP1 QPOSCNT");
-    GEL_WatchAdd("*(long *)0x6B02,x","eQEP1 QPOSINIT");
-    GEL_WatchAdd("*(long *)0x6B04,x","eQEP1 QPOSMAX");
-    GEL_WatchAdd("*(long *)0x6B06,x","eQEP1 QPOSCMP");
-    GEL_WatchAdd("*(long *)0x6B08,x","eQEP1 QPOSILAT");
-    GEL_WatchAdd("*(long *)0x6B0A,x","eQEP1 QPOSSLAT");
-    GEL_WatchAdd("*(long *)0x6B0C,x","eQEP1 QPOSLAT");
-    GEL_WatchAdd("*(long *)0x6B0E,x","eQEP1 QUTMR");
-    GEL_WatchAdd("*(long *)0x6B10,x","eQEP1 QUPRD");
-    GEL_WatchAdd("*0x6B12,x","eQEP1 QWDTMR");
-    GEL_WatchAdd("*0x6B13,x","eQEP1 QWDPRD");
-    GEL_WatchAdd("*0x6B14,x","eQEP1 QDECCTL");
-    GEL_WatchAdd("*0x6B15,x","eQEP1 QEPCTL");
-    GEL_WatchAdd("*0x6B16,x","eQEP1 QCAPCTL");
-    GEL_WatchAdd("*0x6B17,x","eQEP1 QPOSCTL");
-    GEL_WatchAdd("*0x6B18,x","eQEP1 QEINT");
-    GEL_WatchAdd("*0x6B19,x","eQEP1 QFLG");
-    GEL_WatchAdd("*0x6B1A,x","eQEP1 QCLR");
-    GEL_WatchAdd("*0x6B1B,x","eQEP1 QFRC");
-    GEL_WatchAdd("*0x6B1C,x","eQEP1 QEPSTS");
-    GEL_WatchAdd("*0x6B1D,x","eQEP1 QCTMR");
-    GEL_WatchAdd("*0x6B1E,x","eQEP1 QCPRD");
-    GEL_WatchAdd("*0x6B1F,x","eQEP1 QCTMRLAT");
-    GEL_WatchAdd("*0x6B20,x","eQEP1 QCPRDLAT");
-}
-hotmenu eQEP2_All_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6B40,x","eQEP2 QPOSCNT");
-    GEL_WatchAdd("*(long *)0x6B42,x","eQEP2 QPOSINIT");
-    GEL_WatchAdd("*(long *)0x6B44,x","eQEP2 QPOSMAX");
-    GEL_WatchAdd("*(long *)0x6B46,x","eQEP2 QPOSCMP");
-    GEL_WatchAdd("*(long *)0x6B48,x","eQEP2 QPOSILAT");
-    GEL_WatchAdd("*(long *)0x6B4A,x","eQEP2 QPOSSLAT");
-    GEL_WatchAdd("*(long *)0x6B4C,x","eQEP2 QPOSLAT");
-    GEL_WatchAdd("(long *)*0x6B4E,x","eQEP2 QUTMR");
-    GEL_WatchAdd("*(long *)0x6B50,x","eQEP2 QUPRD");
-    GEL_WatchAdd("*0x6B52,x","eQEP2 QWDTMR");
-    GEL_WatchAdd("*0x6B53,x","eQEP2 QWDPRD");
-    GEL_WatchAdd("*0x6B54,x","eQEP2 QDECCTL");
-    GEL_WatchAdd("*0x6B55,x","eQEP2 QEPCTL");
-    GEL_WatchAdd("*0x6B56,x","eQEP2 QCAPCTL");
-    GEL_WatchAdd("*0x6B57,x","eQEP2 QPOSCTL");
-    GEL_WatchAdd("*0x6B58,x","eQEP2 QEINT");
-    GEL_WatchAdd("*0x6B59,x","eQEP2 QFLG");
-    GEL_WatchAdd("*0x6B5A,x","eQEP2 QCLR");
-    GEL_WatchAdd("*0x6B5B,x","eQEP2 QFRC");
-    GEL_WatchAdd("*0x6B5C,x","eQEP2 QEPSTS");
-    GEL_WatchAdd("*0x6B5D,x","eQEP2 QCTMR");
-    GEL_WatchAdd("*0x6B5E,x","eQEP2 QCPRD");
-    GEL_WatchAdd("*0x6B5F,x","eQEP2 QCTMRLAT");
-    GEL_WatchAdd("*0x6B60,x","eQEP2 QCPRDLAT");
-}
-
-
-/********************************************************************/
-/* External Interface Registers                                     */
-/********************************************************************/
-menuitem "Watch External Interface Registers";
-
-hotmenu All_External_Interface_Regs()
-{
-    GEL_WatchAdd("*(long *)0x0B20,x","XTIMING0");
-    GEL_WatchAdd("*(long *)0x0B2C,x","XTIMING6");
-    GEL_WatchAdd("*(long *)0x0B2E,x","XTIMING7");
-    GEL_WatchAdd("*(long *)0x0B34,x","XINTCNF2");
-    GEL_WatchAdd("*0x0B38,x","XBANK");
-    GEL_WatchAdd("*0x0B3A,x","XREVISION");
-    GEL_WatchAdd("*0x0B3D,x","XRESET");
-}
-
-/********************************************************************/
-/* External Interrupt Registers                                     */
-/********************************************************************/
-menuitem "Watch External Interrupt Registers";
-
-hotmenu All_XINT_Regs()
-{
-    GEL_WatchAdd("*0x7070,x","XINT1CR");
-    GEL_WatchAdd("*0x7071,x","XINT2CR");
-    GEL_WatchAdd("*0x7072,x","XINT3CR");
-    GEL_WatchAdd("*0x7073,x","XINT4CR");
-    GEL_WatchAdd("*0x7074,x","XINT5CR");
-    GEL_WatchAdd("*0x7075,x","XINT6CR");
-    GEL_WatchAdd("*0x7076,x","XINT7CR");
-    GEL_WatchAdd("*0x7077,x","XNMICR");
-    GEL_WatchAdd("*0x7078,x","XINT1CTR");
-    GEL_WatchAdd("*0x7079,x","XINT2CTR");
-    GEL_WatchAdd("*0x707F,x","XNMICTR");
-}
-hotmenu XINT_Control_Regs()
-{
-    GEL_WatchAdd("*0x7070,x","XINT1CR");
-    GEL_WatchAdd("*0x7071,x","XINT2CR");
-    GEL_WatchAdd("*0x7072,x","XINT3CR");
-    GEL_WatchAdd("*0x7073,x","XINT4CR");
-    GEL_WatchAdd("*0x7074,x","XINT5CR");
-    GEL_WatchAdd("*0x7075,x","XINT6CR");
-    GEL_WatchAdd("*0x7076,x","XINT7CR");
-    GEL_WatchAdd("*0x7077,x","XNMICR");
-}
-hotmenu XINT_Counter_Regs()
-{
-    GEL_WatchAdd("*0x7078,x","XINT1CTR");
-    GEL_WatchAdd("*0x7079,x","XINT2CTR");
-    GEL_WatchAdd("*0x707F,x","XNMICTR");
-}
-
-/********************************************************************/
-/* GPIO Registers                                                   */
-/********************************************************************/
-menuitem "Watch GPIO Registers";
-
-hotmenu All_GPIO_CONTROL_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6F80,x","GPACTRL");
-    GEL_WatchAdd("*(long *)0x6F82,x","GPAQSEL1");
-    GEL_WatchAdd("*(long *)0x6F84,x","GPAQSEL2");
-    GEL_WatchAdd("*(long *)0x6F86,x","GPAMUX1");
-    GEL_WatchAdd("*(long *)0x6F88,x","GPAMUX2");
-    GEL_WatchAdd("*(long *)0x6F8A,x","GPADIR");
-    GEL_WatchAdd("*(long *)0x6F8C,x","GPAPUD");
-
-    GEL_WatchAdd("*(long *)0x6F90,x","GPBCTRL");
-    GEL_WatchAdd("*(long *)0x6F92,x","GPBQSEL1");
-    GEL_WatchAdd("*(long *)0x6F94,x","GPBQSEL2");
-    GEL_WatchAdd("*(long *)0x6F96,x","GPBMUX1");
-    GEL_WatchAdd("*(long *)0x6F98,x","GPBMUX2");
-    GEL_WatchAdd("*(long *)0x6F9A,x","GPBDIR");
-    GEL_WatchAdd("*(long *)0x6F9C,x","GPBPUD");
-
-    GEL_WatchAdd("*(long *)0x6FA6,x","GPCMUX1");
-    GEL_WatchAdd("*(long *)0x6FA8,x","GPCMUX2");
-    GEL_WatchAdd("*(long *)0x6FAA,x","GPCDIR");
-    GEL_WatchAdd("*(long *)0x6FAC,x","GPCPUD");
-}
-hotmenu All_GPIO_DATA_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6FC0,x","GPADAT");
-    GEL_WatchAdd("*(long *)0x6FC2,x","GPASET");
-    GEL_WatchAdd("*(long *)0x6FC4,x","GPACLEAR");
-    GEL_WatchAdd("*(long *)0x6FC6,x","GPATOGGLE");
-    
-    GEL_WatchAdd("*(long *)0x6FC8,x","GPBDAT");
-    GEL_WatchAdd("*(long *)0x6FCA,x","GPBSET");
-    GEL_WatchAdd("*(long *)0x6FCC,x","GPBCLEAR");
-    GEL_WatchAdd("*(long *)0x6FCE,x","GPBTOGGLE");
-
-    GEL_WatchAdd("*(long *)0x6FD0,x","GPCDAT");
-    GEL_WatchAdd("*(long *)0x6FD2,x","GPCSET");
-    GEL_WatchAdd("*(long *)0x6FD4,x","GPCCLEAR");
-    GEL_WatchAdd("*(long *)0x6FD6,x","GPCTOGGLE");
-}
-hotmenu All_GPIO_INTERRUPT_Regs()
-{
-    GEL_WatchAdd("*0x6FE0,x","GPIOXINT1SEL");
-    GEL_WatchAdd("*0x6FE1,x","GPIOXINT2SEL");
-    GEL_WatchAdd("*0x6FE2,x","GPIOXNMISEL");
-    GEL_WatchAdd("*0x6FE3,x","GPIOXINT3SEL");
-    GEL_WatchAdd("*0x6FE4,x","GPIOXINT4SEL");
-    GEL_WatchAdd("*0x6FE5,x","GPIOXINT5SEL");
-    GEL_WatchAdd("*0x6FE6,x","GPIOXINT6SEL");
-    GEL_WatchAdd("*0x6FE7,x","GPIOXINT7SEL");
-    GEL_WatchAdd("*(long *)0x6FE8,x","GPIOLPMSEL");
-}
-hotmenu All_GPA_Registers()
-{
-    GEL_WatchAdd("*(long *)0x6F80,x","GPACTRL");
-    GEL_WatchAdd("*(long *)0x6F82,x","GPAQSEL1");
-    GEL_WatchAdd("*(long *)0x6F84,x","GPAQSEL2");
-    GEL_WatchAdd("*(long *)0x6F86,x","GPAMUX1");
-    GEL_WatchAdd("*(long *)0x6F88,x","GPAMUX2");
-    GEL_WatchAdd("*(long *)0x6F8A,x","GPADIR");
-    GEL_WatchAdd("*(long *)0x6F8C,x","GPAPUD");
-    
-    GEL_WatchAdd("*(long *)0x6FC0,x","GPADAT");
-    GEL_WatchAdd("*(long *)0x6FC2,x","GPASET");
-    GEL_WatchAdd("*(long *)0x6FC4,x","GPACLEAR");
-    GEL_WatchAdd("*(long *)0x6FC6,x","GPATOGGLE");
-}
-hotmenu All_GPB_Registers()
-{
-    GEL_WatchAdd("*(long *)0x6F90,x","GPBCTRL");
-    GEL_WatchAdd("*(long *)0x6F92,x","GPBQSEL1");
-    GEL_WatchAdd("*(long *)0x6F94,x","GPBQSEL2");
-    GEL_WatchAdd("*(long *)0x6F96,x","GPBMUX1");
-    GEL_WatchAdd("*(long *)0x6F98,x","GPBMUX2");
-    GEL_WatchAdd("*(long *)0x6F9A,x","GPBDIR");
-    GEL_WatchAdd("*(long *)0x6F9C,x","GPBPUD");
-
-    GEL_WatchAdd("*(long *)0x6FC8,x","GPBDAT");
-    GEL_WatchAdd("*(long *)0x6FCA,x","GPBSET");
-    GEL_WatchAdd("*(long *)0x6FCC,x","GPBCLEAR");
-    GEL_WatchAdd("*(long *)0x6FCE,x","GPBTOGGLE");
-}
-hotmenu All_GPC_Registers()
-{
-    GEL_WatchAdd("*(long *)0x6FA6,x","GPCMUX1");
-    GEL_WatchAdd("*(long *)0x6FA8,x","GPCMUX2");
-    GEL_WatchAdd("*(long *)0x6FAA,x","GPCDIR");
-    GEL_WatchAdd("*(long *)0x6FAC,x","GPCPUD");
-
-    GEL_WatchAdd("*(long *)0x6FC8,x","GPBDAT");
-    GEL_WatchAdd("*(long *)0x6FCA,x","GPBSET");
-    GEL_WatchAdd("*(long *)0x6FCC,x","GPBCLEAR");
-    GEL_WatchAdd("*(long *)0x6FCE,x","GPBTOGGLE");
-
-    GEL_WatchAdd("*(long *)0x6FD0,x","GPCDAT");
-    GEL_WatchAdd("*(long *)0x6FD2,x","GPCSET");
-    GEL_WatchAdd("*(long *)0x6FD4,x","GPCCLEAR");
-    GEL_WatchAdd("*(long *)0x6FD6,x","GPCTOGGLE");
-}
-
-
-/********************************************************************/
-/* Multichannel Serial Port Registers                               */
-/********************************************************************/
-menuitem "Watch McBSP Registers";
-
-hotmenu All_McBSP_A_Regs()
-{
-    GEL_WatchAdd("*0x5000,x","McBSPA DRR2");
-    GEL_WatchAdd("*0x5001,x","McBSPA DRR1");
-    GEL_WatchAdd("*0x5002,x","McBSPA DXR2");
-    GEL_WatchAdd("*0x5003,x","McBSPA DXR1");
-    GEL_WatchAdd("*0x5004,x","McBSPA SPCR2");
-    GEL_WatchAdd("*0x5005,x","McBSPA SPCR1");
-    GEL_WatchAdd("*0x5006,x","McBSPA RCR2");
-    GEL_WatchAdd("*0x5007,x","McBSPA RCR1");
-    GEL_WatchAdd("*0x5008,x","McBSPA XCR2");
-    GEL_WatchAdd("*0x5009,x","McBSPA XCR1");
-    GEL_WatchAdd("*0x500A,x","McBSPA SRGR2");
-    GEL_WatchAdd("*0x500B,x","McBSPA SRGR1");
-    GEL_WatchAdd("*0x500C,x","McBSPA MCR2");
-    GEL_WatchAdd("*0x500D,x","McBSPA MCR1");
-    GEL_WatchAdd("*0x500E,x","McBSPA RCERA");
-    GEL_WatchAdd("*0x500F,x","McBSPA RCERB");
-    GEL_WatchAdd("*0x5010,x","McBSPA XCERA");
-    GEL_WatchAdd("*0x5011,x","McBSPA XCERB");
-    GEL_WatchAdd("*0x5012,x","McBSPA PCR1");
-    GEL_WatchAdd("*0x5013,x","McBSPA RCERC");
-    GEL_WatchAdd("*0x5014,x","McBSPA RCERD");
-    GEL_WatchAdd("*0x5015,x","McBSPA XCERC");
-    GEL_WatchAdd("*0x5016,x","McBSPA XCERD");
-    GEL_WatchAdd("*0x5017,x","McBSPA RCERE");
-    GEL_WatchAdd("*0x5018,x","McBSPA RCERF");
-    GEL_WatchAdd("*0x5019,x","McBSPA XCERE");
-    GEL_WatchAdd("*0x501A,x","McBSPA XCERF");
-    GEL_WatchAdd("*0x501B,x","McBSPA RCERG");
-    GEL_WatchAdd("*0x501C,x","McBSPA RCERH");
-    GEL_WatchAdd("*0x501D,x","McBSPA XCERG");
-    GEL_WatchAdd("*0x501E,x","McBSPA XCERH");
-    GEL_WatchAdd("*0x5023,x","McBSPA MFFINT");
-    GEL_WatchAdd("*0x503F,x","McBSPA Revision");
-}
-
-/********************************************************************/
-/* I2C Registers                                                    */
-/********************************************************************/
-menuitem "Watch I2C Registers";
-
-hotmenu All_I2C_Regs()
-{
-    GEL_WatchAdd("*0x7900,x","I2COAR");
-    GEL_WatchAdd("*0x7901,x","I2CIER");
-    GEL_WatchAdd("*0x7902,x","I2CSTR");
-    GEL_WatchAdd("*0x7903,x","I2CCLKL");
-    GEL_WatchAdd("*0x7904,x","I2CCLKH");
-    GEL_WatchAdd("*0x7905,x","I2CCNT");
-    GEL_WatchAdd("*0x7906,x","I2CDRR");
-    GEL_WatchAdd("*0x7907,x","I2CSAR");
-    GEL_WatchAdd("*0x7908,x","I2CDXR");
-    GEL_WatchAdd("*0x7909,x","I2CMDR");
-    GEL_WatchAdd("*0x790A,x","I2CISRC");
-    GEL_WatchAdd("*0x790C,x","I2CPSC");
-    GEL_WatchAdd("*0x7920,x","I2CFFTX");
-    GEL_WatchAdd("*0x7921,x","I2CFFRX");
-}
-
-
-/********************************************************************/
-/* Peripheral Interrupt Expansion Registers                         */
-/********************************************************************/
-menuitem "Watch Peripheral Interrupt Expansion Registers";
-
-hotmenu All_PIE_Regs()
-{
-    GEL_WatchAdd("*0x0CE0,x","PIECTRL");
-    GEL_WatchAdd("*0x0CE1,x","PIEACK");
-    GEL_WatchAdd("*0x0CE2,x","PIEIER1");
-    GEL_WatchAdd("*0x0CE3,x","PIEIFR1");
-    GEL_WatchAdd("*0x0CE4,x","PIEIER2");
-    GEL_WatchAdd("*0x0CE5,x","PIEIFR2");
-    GEL_WatchAdd("*0x0CE6,x","PIEIER3");
-    GEL_WatchAdd("*0x0CE7,x","PIEIFR3");
-    GEL_WatchAdd("*0x0CE8,x","PIEIER4");
-    GEL_WatchAdd("*0x0CE9,x","PIEIFR4");
-    GEL_WatchAdd("*0x0CEA,x","PIEIER5");
-    GEL_WatchAdd("*0x0CEB,x","PIEIFR5");
-    GEL_WatchAdd("*0x0CEC,x","PIEIER6");
-    GEL_WatchAdd("*0x0CED,x","PIEIFR6");
-    GEL_WatchAdd("*0x0CEE,x","PIEIER7");
-    GEL_WatchAdd("*0x0CEF,x","PIEIFR7");
-    GEL_WatchAdd("*0x0CF0,x","PIEIER8");
-    GEL_WatchAdd("*0x0CF1,x","PIEIFR8");
-    GEL_WatchAdd("*0x0CF2,x","PIEIER9");
-    GEL_WatchAdd("*0x0CF3,x","PIEIFR9");
-    GEL_WatchAdd("*0x0CF4,x","PIEIER10");
-    GEL_WatchAdd("*0x0CF5,x","PIEIFR10");
-    GEL_WatchAdd("*0x0CF6,x","PIEIER11");
-    GEL_WatchAdd("*0x0CF7,x","PIEIFR11");
-    GEL_WatchAdd("*0x0CF8,x","PIEIER12");
-    GEL_WatchAdd("*0x0CF9,x","PIEIFR12");
-}
-hotmenu PIECTRL()
-{
-    GEL_WatchAdd("*0x0CE0,x","PIECTRL");
-}
-hotmenu PIEACK()
-{
-    GEL_WatchAdd("*0x0CE1,x","PIEACK");
-}
-hotmenu PIEIER1_and_PIEIFR1()
-{
-    GEL_WatchAdd("*0x0CE2,x","PIEIER1");
-    GEL_WatchAdd("*0x0CE3,x","PIEIFR1");
-}
-hotmenu PIEIER2_and_PIEIFR2()
-{
-    GEL_WatchAdd("*0x0CE4,x","PIEIER2");
-    GEL_WatchAdd("*0x0CE5,x","PIEIFR2");
-}
-hotmenu PIEIER3_and_PIEIFR3()
-{
-    GEL_WatchAdd("*0x0CE6,x","PIEIER3");
-    GEL_WatchAdd("*0x0CE7,x","PIEIFR3");
-}
-hotmenu PIEIER4_and_PIEIFR4()
-{
-    GEL_WatchAdd("*0x0CE8,x","PIEIER4");
-    GEL_WatchAdd("*0x0CE9,x","PIEIFR4");
-}
-hotmenu PIEIER5_and_PIEIFR5()
-{
-    GEL_WatchAdd("*0x0CEA,x","PIEIER5");
-    GEL_WatchAdd("*0x0CEB,x","PIEIFR5");
-}
-hotmenu PIEIER6_and_PIEIFR6()
-{
-    GEL_WatchAdd("*0x0CEC,x","PIEIER6");
-    GEL_WatchAdd("*0x0CED,x","PIEIFR6");
-}
-hotmenu PIEIER7_and_PIEIFR7()
-{
-    GEL_WatchAdd("*0x0CEE,x","PIEIER7");
-    GEL_WatchAdd("*0x0CEF,x","PIEIFR7");
-}
-hotmenu PIEIER8_and_PIEIFR8()
-{
-    GEL_WatchAdd("*0x0CF0,x","PIEIER8");
-    GEL_WatchAdd("*0x0CF1,x","PIEIFR8");
-}
-hotmenu PIEIER9_and_PIEIFR9()
-{
-    GEL_WatchAdd("*0x0CF2,x","PIEIER9");
-    GEL_WatchAdd("*0x0CF3,x","PIEIFR9");
-}
-hotmenu PIEIFR10_and_PIEIFR10()
-{
-    GEL_WatchAdd("*0x0CF4,x","PIEIER10");
-    GEL_WatchAdd("*0x0CF5,x","PIEIFR10");
-}
-hotmenu PIEIER11_and_PIEIFR11()
-{
-    GEL_WatchAdd("*0x0CF6,x","PIEIER11");
-    GEL_WatchAdd("*0x0CF7,x","PIEIFR11");
-}
-hotmenu PIEIER12_and_PIEIFR12()
-{
-    GEL_WatchAdd("*0x0CF8,x","PIEIER12");
-    GEL_WatchAdd("*0x0CF9,x","PIEIFR12");
-}
-
-
-/********************************************************************/
-/* Serial Communication Interface Registers                         */
-/********************************************************************/
-menuitem "Watch SCI Registers";
-
-hotmenu SCI_A_All_Regs()
-{
-    GEL_WatchAdd("*0x7050,x","SCICCRA");
-    GEL_WatchAdd("*0x7051,x","SCICTL1A");
-    GEL_WatchAdd("*0x7052,x","SCIHBAUDA");
-    GEL_WatchAdd("*0x7053,x","SCILBAUDA");
-    GEL_WatchAdd("*0x7054,x","SCICTL2A");
-    GEL_WatchAdd("*0x7055,x","SCIRXSTA");
-    GEL_WatchAdd("*0x7056,x","SCIRXEMUA");
-    GEL_WatchAdd("*0x7057,x","SCIRXBUFA");
-    GEL_WatchAdd("*0x7059,x","SCITXBUFA");
-    GEL_WatchAdd("*0x705A,x","SCIFFTXA");
-    GEL_WatchAdd("*0x705B,x","SCIFFRXA");
-    GEL_WatchAdd("*0x705C,x","SCIFFCTA");
-    GEL_WatchAdd("*0x705F,x","SCIPRIA");
-}
-hotmenu SCI_A_FIFO_Registers()
-{
-    GEL_WatchAdd("*0x705A,x","SCIFFTXA");
-    GEL_WatchAdd("*0x705B,x","SCIFFRXA");
-    GEL_WatchAdd("*0x705C,x","SCIFFCTA");
-}
-hotmenu SCI_B_All_Regs()
-{
-    GEL_WatchAdd("*0x7750,x","SCICCRB");
-    GEL_WatchAdd("*0x7751,x","SCICTL1B");
-    GEL_WatchAdd("*0x7752,x","SCIHBAUDB");
-    GEL_WatchAdd("*0x7753,x","SCILBAUDB");
-    GEL_WatchAdd("*0x7754,x","SCICTL2B");
-    GEL_WatchAdd("*0x7755,x","SCIRXSTB");
-    GEL_WatchAdd("*0x7756,x","SCIRXEMUB");
-    GEL_WatchAdd("*0x7757,x","SCIRXBUFB");
-    GEL_WatchAdd("*0x7759,x","SCITXBUFB");
-    GEL_WatchAdd("*0x775A,x","SCIFFTXB");
-    GEL_WatchAdd("*0x775B,x","SCIFFRXB");
-    GEL_WatchAdd("*0x775C,x","SCIFFCTB");
-    GEL_WatchAdd("*0x775F,x","SCIPRIB");
-}
-hotmenu SCI_B_FIFO_Registers()
-{
-    GEL_WatchAdd("*0x775A,x","SCIFFTXB");
-    GEL_WatchAdd("*0x775B,x","SCIFFRXB");
-    GEL_WatchAdd("*0x775C,x","SCIFFCTB");
-}
-
-
-/********************************************************************/
-/* Serial Peripheral Interface Registers                            */
-/********************************************************************/
-menuitem "Watch SPI Registers";
-
-hotmenu SPI_A_All_Regs()
-{
-    GEL_WatchAdd("*0x7040,x","SPIA SPICCR");
-    GEL_WatchAdd("*0x7041,x","SPIA SPICTL");
-    GEL_WatchAdd("*0x7042,x","SPIA SPIST");
-    GEL_WatchAdd("*0x7044,x","SPIA SPIBRR");
-    GEL_WatchAdd("*0x7046,x","SPIA SPIEMU");
-    GEL_WatchAdd("*0x7047,x","SPIA SPIRXBUF");
-    GEL_WatchAdd("*0x7048,x","SPIA SPITXBUF");
-    GEL_WatchAdd("*0x7049,x","SPIA SPIDAT");
-    GEL_WatchAdd("*0x704A,x","SPIA SPIFFTX");
-    GEL_WatchAdd("*0x704B,x","SPIA SPIFFRX");
-    GEL_WatchAdd("*0x704C,x","SPIA SPIFFCT");
-    GEL_WatchAdd("*0x704F,x","SPIA SPIPRI");
-}
-hotmenu SPI_A_FIFO_Registers()
-{
-    GEL_WatchAdd("*0x704A,x","SPIA SPIFFTX");
-    GEL_WatchAdd("*0x704B,x","SPIA SPIFFRX");
-    GEL_WatchAdd("*0x704C,x","SPIA SPIFFCT");
-}
-
-
-/********************************************************************/
-/* Watchdog Timer Registers                                         */
-/********************************************************************/
-menuitem "Watch Watchdog Timer Registers";
-
-hotmenu All_Watchdog_Regs()
-{
-    GEL_WatchAdd("*0x7023,x","WDCNTR");
-    GEL_WatchAdd("*0x7025,x","WDKEY");
-    GEL_WatchAdd("*0x7029,x","WDCR");
-    GEL_WatchAdd("*0x7022,x","SCSR");
-}
-
-/********************************************************************/
-/*** End of file ***/
diff --git a/Source/External/v120/DSP2833x_common/gel/f28234.gel b/Source/External/v120/DSP2833x_common/gel/f28234.gel
deleted file mode 100644
index cd5726a..0000000
--- a/Source/External/v120/DSP2833x_common/gel/f28234.gel
+++ /dev/null
@@ -1,2930 +0,0 @@
-/********************************************************************/
-/* f28234.gel                                                       */
-/* Version 3.30.2                                                   */
-/*                                                                  */
-/* This GEL file is to be used with the TMS320F28234 DSP.           */
-/* Changes may be required to support specific hardware designs.    */
-/*                                                                  */
-/* Code Composer Studio supports six reserved GEL functions that    */
-/* automatically get executed if they are defined. They are:        */
-/*                                                                  */
-/* StartUp()              - Executed whenever CCS is invoked        */
-/* OnReset()              - Executed after Debug->Reset CPU         */
-/* OnRestart()            - Executed after Debug->Restart           */
-/* OnPreFileLoaded()      - Executed before File->Load Program      */
-/* OnFileLoaded()         - Executed after File->Load Program       */
-/* OnTargetConnect()      - Executed after Debug->Connect           */
-/*                                                                  */
-/********************************************************************/
-
-StartUp()
-{
-
-/* The next line automatically loads the .gel file that comes   */
-/* with the DSP2833x Peripheral Header Files download.  To use, */
-/* uncomment, and adjust the directory path as needed.          */
-//  GEL_LoadGel("c:\\CCStudio_v3.3\\cc\\gel\\DSP2833x_Peripheral.gel");
-}
-
-OnReset(int nErrorCode)
-{
-    C28x_Mode();
-    Unlock_CSM();
-    ADC_Cal();
-}
-
-OnRestart(int nErrorCode)
-{
-/* CCS will call OnRestart() when you do a Debug->Restart and   */
-/* after you load a new file.  Between running interrupt based  */
-/* programs, this function will clear interrupts and help keep  */
-/* the processor from going off into invalid memory.            */
-     C28x_Mode();
-     IER = 0;
-     IFR = 0;
-     ADC_Cal();
-}
-
-int TxtOutCtl=0;
-OnPreFileLoaded()
-{
-    XINTF_Enable();
-    if (TxtOutCtl==0)
-    {
-     GEL_TextOut("\nNOTES:\nGel will enable XINTFx16 during Debug only.\nEnable XINTF in code prior to use.");
-	 TxtOutCtl=1;
-    }
-}
-
-OnFileLoaded(int nErrorCode, int bSymbolsOnly)
-{
-    ADC_Cal();
-}
-
-OnTargetConnect()
-{
-    C28x_Mode();
-    F28234_Memory_Map();            /* Initialize the CCS memory map */
-
-/* Check to see if CCS has been started-up with the DSP already */
-/* running in real-time mode.  The user can add whatever        */
-/* custom initialization stuff they want to each case.          */
-
-    if (GEL_IsInRealtimeMode())     /* Do real-time mode target initialization */
-    {
-
-    }
-    else                            /* Do stop-mode target initialization */
-    {
-        GEL_Reset();                /* Reset DSP */
-    }
-
-}
-
-
-/********************************************************************/
-/* These functions are launched by the GEL_Toolbar button plugin    */
-/********************************************************************/
-GEL_Toolbar1()
-{
-    Run_Realtime_with_Reset();
-}
-GEL_Toolbar2()
-{
-    Run_Realtime_with_Restart();
-}
-GEL_Toolbar3()
-{
-    Full_Halt();
-}
-GEL_Toolbar4()
-{
-    Full_Halt_with_Reset();
-}
-
-int GEL_Toolbar5_Toggle = 0;
-GEL_Toolbar5()
-{
-    if(GEL_Toolbar5_Toggle == 0)
-    {
-        GEL_Toolbar5_Toggle = 1;
-        GEL_OpenWindow("GEL_Buttons",1,4);
-        GEL_TextOut("Button 1: Run_Realtime_with_Reset()","GEL_Buttons",0,0);
-        GEL_TextOut("Button 2: Run_Realtime_with_Restart()","GEL_Buttons",0,1);
-        GEL_TextOut("Button 3: Full_Halt()", "GEL_Buttons",0,2);
-        GEL_TextOut("Button 4: Full_Halt_with_Reset()","GEL_Buttons",0,3);
-    }
-    else
-    {
-        GEL_Toolbar5_Toggle = 0;
-        GEL_CloseWindow("GEL_Buttons");
-    }
-}
-
-
-/********************************************************************/
-/* These functions are useful to engage/dis-enagage realtime        */
-/* emulation mode during debug.  They save the user from having to  */
-/* manually perform these steps in CCS.                             */
-/********************************************************************/
-menuitem "Realtime Emulation Control";
-
-hotmenu Run_Realtime_with_Reset()
-{
-    GEL_Reset();                /* Reset the DSP */
-    ST1 = ST1 & 0xFFFD;         /* clear DBGM bit in ST1 */
-    GEL_EnableRealtime();       /* Enable Realtime mode */
-    GEL_Run();                  /* Run the DSP */
-}
-hotmenu Run_Realtime_with_Restart()
-{
-    GEL_Restart();              /* Reset the DSP */
-    ST1 = ST1 & 0xFFFD;         /* clear DBGM bit in ST1 */
-    GEL_EnableRealtime();       /* Enable Realtime mode */
-    GEL_Run();                  /* Run the DSP */
-}
-hotmenu Full_Halt()
-{
-    GEL_DisableRealtime();      /* Disable Realtime mode */
-    GEL_Halt();                 /* Halt the DSP */
-}
-hotmenu Full_Halt_with_Reset()
-{
-    GEL_DisableRealtime();      /* Disable Realtime mode */
-    GEL_Halt();                 /* Halt the DSP */
-    GEL_Reset();                /* Reset the DSP */
-}
-
-
-/********************************************************************/
-/*                         F28234 Memory Map                        */
-/*                                                                  */
-/*   Note: M0M1MAP and VMAP signals tied high on F28234 core        */
-/*                                                                  */
-/*   0x000000 - 0x0003ff   M0 SARAM                (Prog and Data)  */
-/*   0x000400 - 0x0007ff   M1 SARAM                (Prog and Data)  */
-/*   0x000800 - 0x001fff   Peripheral Frame0 (PF0) (Data only)      */
-/*   0x004000 - 0x004fff   XINTF Zone 0            (Prog and Data)  */
-/*   0x005000 - 0x005fff   Peripheral Frame3 (PF3) (Data only)      */
-/*   0x006000 - 0x006fff   Peripheral Frame1 (PF1) (Data only)      */
-/*   0x007000 - 0x007fff   Peripheral Frame2 (PF2) (Data only)      */
-/*   0x008000 - 0x008fff   L0 SARAM                (Prog and Data)  */
-/*   0x009000 - 0x009fff   L1 SARAM                (Prog and Data)  */
-/*   0x00A000 - 0x00Afff   L2 SARAM                (Prog and Data)  */
-/*   0x00B000 - 0x00Bfff   L3 SARAM                (Prog and Data)  */
-/*   0x00C000 - 0x00Cfff   L4 SARAM                (Prog and Data)  */
-/*   0x00D000 - 0x00Dfff   L5 SARAM                (Prog and Data)  */
-/*   0x00E000 - 0x00Efff   L6 SARAM                (Prog and Data)  */
-/*   0x00F000 - 0x00Ffff   L7 SARAM                (Prog and Data)  */
-/*   0x100000 - 0x1fffff   XINTF Zone 6            (Prog and Data)  */
-/*   0x200000 - 0x2fffff   XINTF Zone 7            (Prog and Data)  */
-/*   0x320000 - 0x33ffff   Flash                   (Prog and Data)  */
-/*   0x380080 - 0x380088   ADC_cal function        (Prog and Data)  */
-/*   0x380090 - 0x380090   PARTID value            (Prog and Data)  */
-/*   0x380400 - 0x3807ff   OTP                     (Prog and Data)  */
-/*   0x3f8000 - 0x3f8fff   L0 SARAM                (Prog and Data)  */
-/*   0x3f9000 - 0x3f9fff   L1 SARAM                (Prog and Data)  */
-/*   0x3fA000 - 0x3fAfff   L2 SARAM                (Prog and Data)  */
-/*   0x3fB000 - 0x3fBfff   L3 SARAM                (Prog and Data)  */
-/*   0x3fe000 - 0x3fffff   BOOT ROM                (Prog and Data)  */
-/********************************************************************/
-menuitem "Initialize Memory Map";
-
-hotmenu F28234_Memory_Map()
-{
-    GEL_MapReset();
-    GEL_MapOn();
-
-    /* Program memory map */
-    GEL_MapAdd(0x0,0,0x400,1,1);                 /* M0 SARAM        */
-    GEL_MapAdd(0x400,0,0x400,1,1);               /* M1 SARAM        */
-    GEL_MapAdd(0x4000,0,0x1000,1,1);             /* Zone 0          */
-    GEL_MapAdd(0x8000,0,0x1000,1,1);             /* L0 SARAM        */
-    GEL_MapAdd(0x9000,0,0x1000,1,1);             /* L1 SARAM        */
-    GEL_MapAdd(0xA000,0,0x1000,1,1);             /* L2 SARAM        */
-    GEL_MapAdd(0xB000,0,0x1000,1,1);             /* L3 SARAM        */
-    GEL_MapAdd(0xC000,0,0x1000,1,1);             /* L4 SARAM        */
-    GEL_MapAdd(0xD000,0,0x1000,1,1);             /* L5 SARAM        */
-    GEL_MapAdd(0xE000,0,0x1000,1,1);             /* L6 SARAM        */
-    GEL_MapAdd(0xF000,0,0x1000,1,1);             /* L7 SARAM        */
-    GEL_MapAdd(0x100000,0,0x100000,1,1);         /* Zone 6          */
-    GEL_MapAdd(0x200000,0,0x100000,1,1);         /* Zone 7          */
-    GEL_MapAdd(0x320000,0,0x20000,1,0);          /* FLASH           */
-    GEL_MapAdd(0x380080,0,0x00009,1,0);          /* ADC_cal function*/
-    GEL_MapAdd(0x380090,0,0x00001,1,0);          /* PARTID value    */
-    GEL_MapAdd(0x380400,0,0x00400,1,0);          /* OTP             */
-    GEL_MapAdd(0x3f8000,0,0x1000,1,1);           /* L0 SARAM Mirror */
-    GEL_MapAdd(0x3f9000,0,0x1000,1,1);           /* L1 SARAM Mirror */
-    GEL_MapAdd(0x3fA000,0,0x1000,1,1);           /* L2 SARAM Mirror */
-    GEL_MapAdd(0x3fb000,0,0x1000,1,1);           /* L3 SARAM Mirror */
-    GEL_MapAdd(0x3fe000,0,0x2000,1,0);           /* BOOT ROM        */
-
-    /* Data memory map */
-    GEL_MapAdd(0x000,1,0x400,1,1);               /* M0 SARAM        */
-    GEL_MapAdd(0x400,1,0x400,1,1);               /* M1 SARAM        */
-    GEL_MapAdd(0x800,1,0x1800,1,1);              /* PF0             */
-    GEL_MapAdd(0x4000,1,0x1000,1,1);             /* Zone 0          */
-    GEL_MapAdd(0x5000,1,0x1000,1,1);             /* PF3             */
-    GEL_MapAdd(0x6000,1,0x1000,1,1);             /* PF1             */
-    GEL_MapAddStr(0x7000,1,0x1000,"R|W|AS2",0);  /* PF2             */
-    GEL_MapAdd(0x8000,1,0x1000,1,1);             /* L0 SARAM        */
-    GEL_MapAdd(0x9000,1,0x1000,1,1);             /* L1 SARAM        */
-    GEL_MapAdd(0xA000,1,0x1000,1,1);             /* L2 SARAM        */
-    GEL_MapAdd(0xB000,1,0x1000,1,1);             /* L3 SARAM        */
-    GEL_MapAdd(0xC000,1,0x1000,1,1);             /* L4 SARAM        */
-    GEL_MapAdd(0xD000,1,0x1000,1,1);             /* L5 SARAM        */
-    GEL_MapAdd(0xE000,1,0x1000,1,1);             /* L6 SARAM        */
-    GEL_MapAdd(0xF000,1,0x1000,1,1);             /* L7 SARAM        */
-    GEL_MapAdd(0x100000,1,0x100000,1,1);         /* Zone 6          */
-    GEL_MapAdd(0x200000,1,0x100000,1,1);         /* Zone 7          */
-    GEL_MapAdd(0x320000,1,0x20000,1,0);          /* FLASH           */
-    GEL_MapAdd(0x380080,1,0x00009,1,0);          /* ADC_cal function*/
-    GEL_MapAdd(0x380090,1,0x00001,1,0);          /* PARTID value    */
-    GEL_MapAdd(0x380400,1,0x00400,1,0);          /* OTP             */
-    GEL_MapAdd(0x3f8000,1,0x1000,1,1);           /* L0 SARAM Mirror */
-    GEL_MapAdd(0x3f9000,1,0x1000,1,1);           /* L1 SARAM Mirror */
-    GEL_MapAdd(0x3fA000,1,0x1000,1,1);           /* L2 SARAM Mirror */
-    GEL_MapAdd(0x3fb000,1,0x1000,1,1);           /* L3 SARAM Mirror */
-    GEL_MapAdd(0x3fe000,1,0x2000,1,0);           /* BOOT ROM        */
-}
-
-
-/********************************************************************/
-/* The ESTOP0 fill functions are useful for debug.  They fill the   */
-/* RAM with software breakpoints that will trap runaway code.       */
-/********************************************************************/
-hotmenu Fill_F28234_RAM_with_ESTOP0()
-{
-    GEL_MemoryFill(0x000000,1,0x000800,0x7625);      /* Fill M0/M1  */
-    GEL_MemoryFill(0x008000,1,0x002000,0x7625);      /* Fill L0/L1  */
-    GEL_MemoryFill(0x00A000,1,0x002000,0x7625);      /* Fill L2/L3  */
-    GEL_MemoryFill(0x00C000,1,0x002000,0x7625);      /* Fill L4/L5  */
-    GEL_MemoryFill(0x00E000,1,0x002000,0x7625);      /* Fill L6/L7  */
-}
-
-
-/********************************************************************/
-menuitem "Watchdog";
-hotmenu Disable_WD()
-{
-    *0x7029 = *0x7029 | 0x0068;                /* Set the WDDIS bit */
-    *0x7025 = 0x0055;                          /* Service the WD    */
-    *0x7025 = 0x00AA;                          /*  once to be safe. */
-    GEL_TextOut("\nWatchdog Timer Disabled");
-}
-
-
-/********************************************************************/
-menuitem "Code Security Module"
-hotmenu Unlock_CSM()
-{
-    /* Perform dummy reads of the password locations */
-    XAR0 = *0x33FFF8;
-    XAR0 = *0x33FFF9;
-    XAR0 = *0x33FFFA;
-    XAR0 = *0x33FFFB;
-    XAR0 = *0x33FFFC;
-    XAR0 = *0x33FFFD;
-    XAR0 = *0x33FFFE;
-    XAR0 = *0x33FFFF;
-
-    /* Write passwords to the KEY registers.  0xFFFF's are dummy passwords.
-       User should replace them with the correct password for their DSP */
-    *0xAE0 = 0xFFFF;
-    *0xAE1 = 0xFFFF;
-    *0xAE2 = 0xFFFF;
-    *0xAE3 = 0xFFFF;
-    *0xAE4 = 0xFFFF;
-    *0xAE5 = 0xFFFF;
-    *0xAE6 = 0xFFFF;
-    *0xAE7 = 0xFFFF;
-}
-
-
-/********************************************************************/
-menuitem "Addressing Modes";
-hotmenu C28x_Mode()
-{
-    ST1 = ST1 & (~0x0100);      /*   AMODE = 0  */
-    ST1 = ST1 | 0x0200;         /* OBJMODE = 1  */
-}
-hotmenu C24x_Mode()
-{
-    ST1 = ST1 | 0x0100;         /*   AMODE = 1  */
-    ST1 = ST1 | 0x0200;         /* OBJMODE = 1  */
-}
-hotmenu C27x_Mode()
-{
-    ST1 = ST1 & (~0x0100);      /*   AMODE = 0  */
-    ST1 = ST1 & (~0x0200);      /* OBJMODE = 0  */
-}
-
-
-/********************************************************************/
-/*                            PLL Ratios                            */
-/*                                                                  */
-/* The following table describes the PLL clocking ratios (0..10)    */
-/*                                                                  */
-/*   Ratio        CLKIN         Description                         */
-/*   -----    --------------    ------------                        */
-/*     0      OSCCLK/2          PLL bypassed                        */
-/*     1      (OSCCLK * 1)/2    15 Mhz for 30 Mhz CLKIN             */
-/*     2      (OSCCLK * 2)/2    30 Mhz for 30 Mhz CLKIN             */
-/*     3      (OSCCLK * 3)/2    45 Mhz for 30 Mhz CLKIN             */
-/*     4      (OSCCLK * 4)/2    60 Mhz for 30 Mhz CLKIN             */
-/*     5      (OSCCLK * 5)/2    75 Mhz for 30 Mhz CLKIN             */
-/*     6      (OSCCLK * 6)/2    90 Mhz for 30 Mhz CLKIN             */
-/*     7      (OSCCLK * 7)/2    105 Mhz for 30 Mhz CLKIN            */
-/*     8      (OSCCLK * 8)/2    120 Mhz for 30 Mhz CLKIN            */
-/*     9      (OSCCLK * 9)/2    135 Mhz for 30 Mhz CLKIN            */
-/*    10      (OSCCLK * 10)/2   150 Mhz for 30 Mhz CLKIN            */
-/********************************************************************/
-menuitem "Set PLL Ratio";
-
-hotmenu Bypass()
-{
-    DIVSEL_div2();     /* DIVSEL = 1/2                      */
-    *0x7021 = 0;       /* CLKIN = OSCCLK/2, PLL is bypassed */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x1_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 1;      /* CLKIN = (OSCCLK * 1)/2 */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x2_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 2;      /* CLKIN = (OSCCLK * 2)/2 */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x3_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 3;      /* CLKIN = (OSCCLK * 3)/2 */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x4_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 4;      /* CLKIN = (OSCCLK * 4)/2 */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x5_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 5;      /* CLKIN = (OSCCLK * 5)/2 */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x6_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 6;      /* CLKIN = (OSCCLK * 6)/2 */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x7_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 7;      /* CLKIN = (OSCCLK * 7)/2 */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x8_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 8;      /* CLKIN = (OSCCLK * 8)/2 */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x9_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 9;      /* CLKIN = (OSCCLK * 9)/2 */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x10_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 10;     /* CLKIN = (OSCCLK * 10)/2 */
-    PLL_Wait();
-}
-// hotmenu OSCCLK_x1_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 1;      /* CLKIN = (OSCCLK * 1)/1 */
-//     PLL_Wait();
-// }
-// hotmenu OSCCLK_x2_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 2;      /* CLKIN = (OSCCLK * 2)/1 */
-//     PLL_Wait();
-// }
-// hotmenu OSCCLK_x3_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 3;      /* CLKIN = (OSCCLK * 3)/1 */
-//     PLL_Wait();
-// }
-// hotmenu OSCCLK_x4_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 4;      /* CLKIN = (OSCCLK * 4)/1 */
-//     PLL_Wait();
-// }
-// hotmenu OSCCLK_x5_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 5;      /* CLKIN = (OSCCLK * 5)/1 */
-//     PLL_Wait();
-// }
-// hotmenu OSCCLK_x6_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 6;      /* CLKIN = (OSCCLK * 6)/1 */
-//     PLL_Wait();
-// }
-// hotmenu OSCCLK_x7_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 7;      /* CLKIN = (OSCCLK * 7)/1 */
-//     PLL_Wait();
-// }
-// hotmenu OSCCLK_x8_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 8;      /* CLKIN = (OSCCLK * 8)/1 */
-//     PLL_Wait();
-// }
-// hotmenu OSCCLK_x9_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 9;      /* CLKIN = (OSCCLK * 9)/1 */
-//     PLL_Wait();
-// }
-// hotmenu OSCCLK_x10_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 10;     /* CLKIN = (OSCCLK * 10)/1 */
-//     PLL_Wait();
-// }
-
-
-
-/********************************************************************/
-/* For F2823x devices, DIVSEL is 1/4 by default.  Switch it to 1/2  */
-/********************************************************************/
-
-DIVSEL_div2()
-{
-    int temp;
-    int PLLSTS;
-
-    PLLSTS = 0x7011;
-
-    temp  = *PLLSTS; 
-    temp &=  0xFE7F;   /* Clear bits 7 & 8 */
-    temp |= 2 << 7;    /* Set bit 8        */
-    *PLLSTS = temp;    /* Switch to 1/2    */
-}
-
-
-
-/********************************************************************/
-/* For F2823x devices, DIVSEL is 1/4 by default.  Switch it to /1   */
-/********************************************************************/
-
-DIVSEL_div1()
-{
-    int temp;
-    int PLLSTS;
-
-    PLLSTS = 0x7011;
-    
-    DIVSEL_div2();     /* First switch DIVSEL to 1/2 and wait */
-    wait();  
-    temp  = *PLLSTS; 
-    temp |= 3 << 7;    /* Set bits 7 & 8   */
-    *PLLSTS = temp;    /* Switch to 1/2    */
-}
-
-wait()
-{
-    int delay = 0;
-    for (delay = 0; delay <= 5; delay ++)
-    {}
-}
-
-/********************************************************************/
-/* For F2823x devices, check the PLLOCKS bit for PLL lock.          */
-/********************************************************************/
-PLL_Wait()
-{
-    int PLLSTS;
-    int delay = 0;
-
-    PLLSTS = 0x7011;
-    
-    
-    while ( ( (unsigned int)*PLLSTS & 0x0001) != 0x0001)
-    {
-        delay++;
-        GEL_TextOut("Waiting for PLL Lock, PLLSTS = %x\n",,,,,(unsigned int)*PLLSTS);
-    }
-    GEL_TextOut("\nPLL lock complete, PLLSTS = %x\n",,,,,(unsigned int)*PLLSTS);
-}
-
-/********************************************************************/
-/* Load the ADC Calibration values from TI OTP                      */
-/********************************************************************/
-menuitem "ADC Calibration"
-hotmenu ADC_Cal()
-{
-    /* Perform dummy reads of the password locations */
-    XAR0 = *0x33FFF8;
-    XAR0 = *0x33FFF9;
-    XAR0 = *0x33FFFA;
-    XAR0 = *0x33FFFB;
-    XAR0 = *0x33FFFC;
-    XAR0 = *0x33FFFD;
-    XAR0 = *0x33FFFE;
-    XAR0 = *0x33FFFF;
-
-    if(((*0x0AEF) & 0x0001) == 0)
-    {
-        XAR0 = *0x701C;
-        *0x701C |= 0x0008;  
-	*0x711C = *0x380083;
-        *0x711D = *0x380085;
-        *0x701C = XAR0;
-	XAR0 = 0;
-    } 
-    else
-    {
-        GEL_TextOut("\nADC Calibration not complete, device is secure"); 
-    }
-}
-
-/********************************************************************/
-/* Enable the XINTF and configure GPIOs for XINTF function          */
-/********************************************************************/
-menuitem "XINTF Enable"
-hotmenu XINTF_Enable()
-{
-
-   /* enable XINTF clock (XTIMCLK) */
-
-   *0x7020 = 0x3700;                          
-   /* GPBMUX1: XA0-XA7, XA16, XZCS0,        */
-   /*          XZCS7, XREADY, XRNW, XWE0    */
-   /* GPAMUX2: XA17-XA19, XZCS6             */
-   /* GPCMUX2: XA8-XA15                     */         
-   /* GPCMUX1: XD0-XD15                     */
-   *(unsigned long *)0x6F96 = 0xFFFFFFC0;   /* GPBMUX1 */
-   *(unsigned long *)0x6f88 = 0xFF000000;   /* GPAMUX2 */  
-   *(unsigned long *)0x6FA8 = 0x0000AAAA;   /* GPCMUX2 */  
-   *(unsigned long *)0x6FA6 = 0xAAAAAAAA;   /* GPCMUX1 */
-
-   /* Uncomment for x32 data bus            */
-   /* GPBMUX2: XD16-XD31                    */
-// *(unsigned long *)0x6F98 = 0xFFFFFFFF;   /* GPBMUX2 */ 
-   
-   /* Zone timing.  
-   /* Each zone can be configured seperately */
-   /* Uncomment the x16 or the x32 timing    */
-   /* depending on the data bus width for    */
-   /* the zone                               */
-
-   /* x16 Timing */
-   *(unsigned long *)0x0B20 = 0x0043FFFF;    /* Zone0 */
-   *(unsigned long *)0x0B2C = 0x0043FFFF;    /* Zone6 */
-   *(unsigned long *)0x0B2E = 0x0043FFFF;    /* Zone7 */
-
-   /* x32 Timing:
-// *(unsigned long *)0x0B20 = 0x0041FFFF;    /* x32 */
-// *(unsigned long *)0x0B2C = 0x0041FFFF;    /* x32 */
-// *(unsigned long *)0x0B2E = 0x0041FFFF;    /* x32 */
- 
-}
-
-/********************************************************************/
-/* The below are used to display the symbolic names of the F28234   */
-/* memory mapped registers in the watch window. To view these       */
-/* registers, click on the GEL menu button in Code Composer Studio, */
-/* then select which registers or groups of registers you want to   */
-/* view. They will appear in the watch window under the Watch1 tab. */
-/********************************************************************/
-
-/* Add a space line to the GEL menu */
-menuitem "______________________________________";
-hotmenu __() {}
-
-/********************************************************************/
-/* A/D Converter Registers                                          */
-/********************************************************************/
-menuitem "Watch ADC Registers";
-
-hotmenu All_ADC_Regs()
-{
-    GEL_WatchAdd("*0x7100,x","ADCTRL1");
-    GEL_WatchAdd("*0x7101,x","ADCTRL2");
-    GEL_WatchAdd("*0x7102,x","ADCMAXCONV");
-    GEL_WatchAdd("*0x7103,x","ADCCHSELSEQ1");
-    GEL_WatchAdd("*0x7104,x","ADCCHSELSEQ2");
-    GEL_WatchAdd("*0x7105,x","ADCCHSELSEQ3");
-    GEL_WatchAdd("*0x7106,x","ADCCHSELSEQ4");
-    GEL_WatchAdd("*0x7107,x","ADCASEQSR");
-    GEL_WatchAdd("*0x7108,x","ADCRESULT0");
-    GEL_WatchAdd("*0x7109,x","ADCRESULT1");
-    GEL_WatchAdd("*0x710A,x","ADCRESULT2");
-    GEL_WatchAdd("*0x710B,x","ADCRESULT3");
-    GEL_WatchAdd("*0x710C,x","ADCRESULT4");
-    GEL_WatchAdd("*0x710D,x","ADCRESULT5");
-    GEL_WatchAdd("*0x710E,x","ADCRESULT6");
-    GEL_WatchAdd("*0x710F,x","ADCRESULT7");
-    GEL_WatchAdd("*0x7110,x","ADCRESULT8");
-    GEL_WatchAdd("*0x7111,x","ADCRESULT9");
-    GEL_WatchAdd("*0x7112,x","ADCRESULT10");
-    GEL_WatchAdd("*0x7113,x","ADCRESULT11");
-    GEL_WatchAdd("*0x7114,x","ADCRESULT12");
-    GEL_WatchAdd("*0x7115,x","ADCRESULT13");
-    GEL_WatchAdd("*0x7116,x","ADCRESULT14");
-    GEL_WatchAdd("*0x7117,x","ADCRESULT15");
-    GEL_WatchAdd("*0x7118,x","ADCTRL3");
-    GEL_WatchAdd("*0x7119,x","ADCST");
-    GEL_WatchAdd("*0x711C,x","ADCREFSEL");
-    GEL_WatchAdd("*0x711D,x","ADCOFFTRIM");
-
-    GEL_WatchAdd("*0x0B00,x","ADCRESULT0 Mirror");
-    GEL_WatchAdd("*0x0B01,x","ADCRESULT1 Mirror");
-    GEL_WatchAdd("*0x0B02,x","ADCRESULT2 Mirror");
-    GEL_WatchAdd("*0x0B03,x","ADCRESULT3 Mirror");
-    GEL_WatchAdd("*0x0B04,x","ADCRESULT4 Mirror");
-    GEL_WatchAdd("*0x0B05,x","ADCRESULT5 Mirror");
-    GEL_WatchAdd("*0x0B06,x","ADCRESULT6 Mirror");
-    GEL_WatchAdd("*0x0B07,x","ADCRESULT7 Mirror");
-    GEL_WatchAdd("*0x0B08,x","ADCRESULT8 Mirror");
-    GEL_WatchAdd("*0x0B09,x","ADCRESULT9 Mirror");
-    GEL_WatchAdd("*0x0B0A,x","ADCRESULT10 Mirror");
-    GEL_WatchAdd("*0x0B0B,x","ADCRESULT11 Mirror");
-    GEL_WatchAdd("*0x0B0C,x","ADCRESULT12 Mirror");
-    GEL_WatchAdd("*0x0B0D,x","ADCRESULT13 Mirror");
-    GEL_WatchAdd("*0x0B0E,x","ADCRESULT14 Mirror");
-    GEL_WatchAdd("*0x0B0F,x","ADCRESULT15 Mirror");
-}
-hotmenu ADC_Control_Regs()
-{
-    GEL_WatchAdd("*0x7100,x","ADCTRL1");
-    GEL_WatchAdd("*0x7101,x","ADCTRL2");
-    GEL_WatchAdd("*0x7102,x","ADCMAXCONV");
-    GEL_WatchAdd("*0x7107,x","ADCASEQSR");
-    GEL_WatchAdd("*0x7118,x","ADCTRL3");
-    GEL_WatchAdd("*0x7119,x","ADCST");
-    GEL_WatchAdd("*0x711C,x","ADCREFSEL");
-    GEL_WatchAdd("*0x711D,x","ADCOFFTRIM");
-}
-hotmenu ADCCHSELSEQx_Regs()
-{
-    GEL_WatchAdd("*0x7103,x","ADCCHSELSEQ1");
-    GEL_WatchAdd("*0x7104,x","ADCCHSELSEQ2");
-    GEL_WatchAdd("*0x7105,x","ADCCHSELSEQ3");
-    GEL_WatchAdd("*0x7106,x","ADCCHSELSEQ4");
-}
-hotmenu ADCRESULT_0_to_7()
-{
-    GEL_WatchAdd("*0x7108,x","ADCRESULT0");
-    GEL_WatchAdd("*0x7109,x","ADCRESULT1");
-    GEL_WatchAdd("*0x710A,x","ADCRESULT2");
-    GEL_WatchAdd("*0x710B,x","ADCRESULT3");
-    GEL_WatchAdd("*0x710C,x","ADCRESULT4");
-    GEL_WatchAdd("*0x710D,x","ADCRESULT5");
-    GEL_WatchAdd("*0x710E,x","ADCRESULT6");
-    GEL_WatchAdd("*0x710F,x","ADCRESULT7");
-}
-hotmenu ADCRESULT_8_to_15()
-{
-    GEL_WatchAdd("*0x7110,x","ADCRESULT8");
-    GEL_WatchAdd("*0x7111,x","ADCRESULT9");
-    GEL_WatchAdd("*0x7112,x","ADCRESULT10");
-    GEL_WatchAdd("*0x7113,x","ADCRESULT11");
-    GEL_WatchAdd("*0x7114,x","ADCRESULT12");
-    GEL_WatchAdd("*0x7115,x","ADCRESULT13");
-    GEL_WatchAdd("*0x7116,x","ADCRESULT14");
-    GEL_WatchAdd("*0x7117,x","ADCRESULT15");
-}
-hotmenu ADCRESULT_Mirror_0_to_7()
-{
-    GEL_WatchAdd("*0x0B00,x","ADCRESULT0 Mirror");
-    GEL_WatchAdd("*0x0B01,x","ADCRESULT1 Mirror");
-    GEL_WatchAdd("*0x0B02,x","ADCRESULT2 Mirror");
-    GEL_WatchAdd("*0x0B03,x","ADCRESULT3 Mirror");
-    GEL_WatchAdd("*0x0B04,x","ADCRESULT4 Mirror");
-    GEL_WatchAdd("*0x0B05,x","ADCRESULT5 Mirror");
-    GEL_WatchAdd("*0x0B06,x","ADCRESULT6 Mirror");
-    GEL_WatchAdd("*0x0B07,x","ADCRESULT7 Mirror");
-}
-hotmenu ADCRESULT_Mirror_8_to_15()
-{
-    GEL_WatchAdd("*0x0B08,x","ADCRESULT8 Mirror");
-    GEL_WatchAdd("*0x0B09,x","ADCRESULT9 Mirror");
-    GEL_WatchAdd("*0x0B0A,x","ADCRESULT10 Mirror");
-    GEL_WatchAdd("*0x0B0B,x","ADCRESULT11 Mirror");
-    GEL_WatchAdd("*0x0B0C,x","ADCRESULT12 Mirror");
-    GEL_WatchAdd("*0x0B0D,x","ADCRESULT13 Mirror");
-    GEL_WatchAdd("*0x0B0E,x","ADCRESULT14 Mirror");
-    GEL_WatchAdd("*0x0B0F,x","ADCRESULT15 Mirror");
-}
-
-
-/********************************************************************/
-/* Clocking and Low-Power Registers                                 */
-/********************************************************************/
-menuitem "Watch Clocking and Low-Power Registers";
-
-hotmenu All_Clocking_and_Low_Power_Regs()
-{
-    GEL_WatchAdd("*0x7010,x","XCLK");
-    GEL_WatchAdd("*0x7011,x","PLLSTS");
-    GEL_WatchAdd("*0x701A,x","HISPCP");
-    GEL_WatchAdd("*0x701B,x","LOSPCP");
-    GEL_WatchAdd("*0x701C,x","PCLKCR0");
-    GEL_WatchAdd("*0x701D,x","PCLKCR1");
-    GEL_WatchAdd("*0x701E,x","LPMCR0");
-    GEL_WatchAdd("*0x7020,x","PCLKCR3");
-    GEL_WatchAdd("*0x7021,x","PLLCR");
-}
-
-/********************************************************************/
-/* Code Security Module Registers                                   */
-/********************************************************************/
-menuitem "Watch Code Security Module Registers";
-
-hotmenu CSMSCR()
-{
-    GEL_WatchAdd("*0x0AEF,x","CSMSCR");
-    GEL_WatchAdd("(*0x0AEF>>15)&1,d"," FORCESEC bit");
-    GEL_WatchAdd("(*0x0AEF)&1,d","     SECURE bit");
-}
-hotmenu PWL_Locations()
-{
-    GEL_WatchAdd("*0x33FFF8,x","PWL0");
-    GEL_WatchAdd("*0x33FFF9,x","PWL1");
-    GEL_WatchAdd("*0x33FFFA,x","PWL2");
-    GEL_WatchAdd("*0x33FFFB,x","PWL3");
-    GEL_WatchAdd("*0x33FFFC,x","PWL4");
-    GEL_WatchAdd("*0x33FFFD,x","PWL5");
-    GEL_WatchAdd("*0x33FFFE,x","PWL6");
-    GEL_WatchAdd("*0x33FFFF,x","PWL7");
-}
-
-
-/********************************************************************/
-/* CPU Timer Registers                                              */
-/********************************************************************/
-menuitem "Watch CPU Timer Registers";
-
-hotmenu All_CPU_Timer0_Regs()
-{
-    GEL_WatchAdd("*0x0C00,x","TIMER0TIM");
-    GEL_WatchAdd("*0x0C01,x","TIMER0TIMH");
-    GEL_WatchAdd("*0x0C02,x","TIMER0PRD");
-    GEL_WatchAdd("*0x0C03,x","TIMER0PRDH");
-    GEL_WatchAdd("*0x0C04,x","TIMER0TCR");
-    GEL_WatchAdd("*0x0C06,x","TIMER0TPR");
-    GEL_WatchAdd("*0x0C07,x","TIMER0TPRH");
-}
-hotmenu All_CPU_Timer1_Regs()
-{
-    GEL_WatchAdd("*0x0C08,x","TIMER1TIM");
-    GEL_WatchAdd("*0x0C09,x","TIMER1TIMH");
-    GEL_WatchAdd("*0x0C0A,x","TIMER1PRD");
-    GEL_WatchAdd("*0x0C0B,x","TIMER1PRDH");
-    GEL_WatchAdd("*0x0C0C,x","TIMER1TCR");
-    GEL_WatchAdd("*0x0C0E,x","TIMER1TPR");
-    GEL_WatchAdd("*0x0C0F,x","TIMER1TPRH");
-}
-hotmenu All_CPU_Timer2_Regs()
-{
-    GEL_WatchAdd("*0x0C10,x","TIMER2TIM");
-    GEL_WatchAdd("*0x0C11,x","TIMER2TIMH");
-    GEL_WatchAdd("*0x0C12,x","TIMER2PRD");
-    GEL_WatchAdd("*0x0C13,x","TIMER2PRDH");
-    GEL_WatchAdd("*0x0C14,x","TIMER2TCR");
-    GEL_WatchAdd("*0x0C16,x","TIMER2TPR");
-    GEL_WatchAdd("*0x0C17,x","TIMER2TPRH");
-}
-
-
-/********************************************************************/
-/* Device Emulation Registers                                       */
-/********************************************************************/
-menuitem "Watch Device Emulation Registers";
-
-hotmenu All_Emulation_Regs()
-{
-    GEL_WatchAdd("*(long *)0x0880,x","DEVICECNF");
-    GEL_WatchAdd("*0x0882,x","CLASSID");
-    GEL_WatchAdd("*0x0883,x","REVID");
-    GEL_WatchAdd("*0x0884,x","PROTSTART");
-    GEL_WatchAdd("*0x0885,x","PROTRANGE");
-    GEL_WatchAdd("*0x380090,x","PARTID");    
-}
-
-/********************************************************************/
-/* DMA Registers                                                    */
-/********************************************************************/
-menuitem "Watch DMA Registers";
-
-hotmenu All_DMA_Regs()
-{
-    GEL_WatchAdd("*0x1000,x","DMACTRL");
-    GEL_WatchAdd("*0x1001,x","DEBUGCTRL");
-    GEL_WatchAdd("*0x1002,x","REVISION");
-    GEL_WatchAdd("*0x1004,x","PRIORITYCTRL1");
-    GEL_WatchAdd("*0x1006,x","PRIORITYSTAT");
-
-    GEL_WatchAdd("*0x1020,x","DMA Ch1 MODE");
-    GEL_WatchAdd("*0x1021,x","DMA Ch1 CONTROL");
-    GEL_WatchAdd("*0x1022,x","DMA Ch1 BURST_SIZE");
-    GEL_WatchAdd("*0x1023,x","DMA Ch1 BURST_COUNT");
-    GEL_WatchAdd("*0x1024,x","DMA Ch1 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x1025,x","DMA Ch1 DST_BURST_STEP");
-    GEL_WatchAdd("*0x1026,x","DMA Ch1 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x1027,x","DMA Ch1 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x1028,x","DMA Ch1 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x1029,x","DMA Ch1 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x102A,x","DMA Ch1 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x102B,x","DMA Ch1 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x102C,x","DMA Ch1 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x102D,x","DMA Ch1 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x102E,x","DMA Ch1 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x102F,x","DMA Ch1 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x1030,x","DMA Ch1 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1032,x","DMA Ch1 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1034,x","DMA Ch1 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1036,x","DMA Ch1 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1038,x","DMA Ch1 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x103A,x","DMA Ch1 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x103C,x","DMA Ch1 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x103E,x","DMA Ch1 DST_ADDR_ACTIVE");
-
-    GEL_WatchAdd("*0x1040,x","DMA Ch2 MODE");
-    GEL_WatchAdd("*0x1041,x","DMA Ch2 CONTROL");
-    GEL_WatchAdd("*0x1042,x","DMA Ch2 BURST_SIZE");
-    GEL_WatchAdd("*0x1043,x","DMA Ch2 BURST_COUNT");
-    GEL_WatchAdd("*0x1044,x","DMA Ch2 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x1045,x","DMA Ch2 DST_BURST_STEP");
-    GEL_WatchAdd("*0x1046,x","DMA Ch2 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x1047,x","DMA Ch2 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x1048,x","DMA Ch2 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x1049,x","DMA Ch2 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x104A,x","DMA Ch2 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x104B,x","DMA Ch2 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x104C,x","DMA Ch2 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x104D,x","DMA Ch2 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x104E,x","DMA Ch2 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x104F,x","DMA Ch2 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x1050,x","DMA Ch2 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1052,x","DMA Ch2 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1054,x","DMA Ch2 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1056,x","DMA Ch2 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1058,x","DMA Ch2 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x105A,x","DMA Ch2 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x105C,x","DMA Ch2 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x105E,x","DMA Ch2 DST_ADDR_ACTIVE");
-
-    GEL_WatchAdd("*0x1060,x","DMA Ch3 MODE");
-    GEL_WatchAdd("*0x1061,x","DMA Ch3 CONTROL");
-    GEL_WatchAdd("*0x1062,x","DMA Ch3 BURST_SIZE");
-    GEL_WatchAdd("*0x1063,x","DMA Ch3 BURST_COUNT");
-    GEL_WatchAdd("*0x1064,x","DMA Ch3 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x1065,x","DMA Ch3 DST_BURST_STEP");
-    GEL_WatchAdd("*0x1066,x","DMA Ch3 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x1067,x","DMA Ch3 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x1068,x","DMA Ch3 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x1069,x","DMA Ch3 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x106A,x","DMA Ch3 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x106B,x","DMA Ch3 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x106C,x","DMA Ch3 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x106D,x","DMA Ch3 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x106E,x","DMA Ch3 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x106F,x","DMA Ch3 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x1070,x","DMA Ch3 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1072,x","DMA Ch3 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1074,x","DMA Ch3 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1076,x","DMA Ch3 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1078,x","DMA Ch3 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x107A,x","DMA Ch3 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x107C,x","DMA Ch3 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x107E,x","DMA Ch3 DST_ADDR_ACTIVE");
-
-    GEL_WatchAdd("*0x1080,x","DMA Ch4 MODE");
-    GEL_WatchAdd("*0x1081,x","DMA Ch4 CONTROL");
-    GEL_WatchAdd("*0x1082,x","DMA Ch4 BURST_SIZE");
-    GEL_WatchAdd("*0x1083,x","DMA Ch4 BURST_COUNT");
-    GEL_WatchAdd("*0x1084,x","DMA Ch4 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x1085,x","DMA Ch4 DST_BURST_STEP");
-    GEL_WatchAdd("*0x1086,x","DMA Ch4 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x1087,x","DMA Ch4 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x1088,x","DMA Ch4 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x1089,x","DMA Ch4 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x108A,x","DMA Ch4 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x108B,x","DMA Ch4 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x108C,x","DMA Ch4 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x108D,x","DMA Ch4 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x108E,x","DMA Ch4 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x108F,x","DMA Ch4 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x1090,x","DMA Ch4 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1092,x","DMA Ch4 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1094,x","DMA Ch4 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1096,x","DMA Ch4 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1098,x","DMA Ch4 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x109A,x","DMA Ch4 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x109C,x","DMA Ch4 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x109E,x","DMA Ch4 DST_ADDR_ACTIVE");
-
-    GEL_WatchAdd("*0x10A0,x","DMA Ch5 MODE");
-    GEL_WatchAdd("*0x10A1,x","DMA Ch5 CONTROL");
-    GEL_WatchAdd("*0x10A2,x","DMA Ch5 BURST_SIZE");
-    GEL_WatchAdd("*0x10A3,x","DMA Ch5 BURST_COUNT");
-    GEL_WatchAdd("*0x10A4,x","DMA Ch5 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x10A5,x","DMA Ch5 DST_BURST_STEP");
-    GEL_WatchAdd("*0x10A6,x","DMA Ch5 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x10A7,x","DMA Ch5 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x10A8,x","DMA Ch5 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x10A9,x","DMA Ch5 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x10AA,x","DMA Ch5 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x10AB,x","DMA Ch5 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x10AC,x","DMA Ch5 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x10AD,x","DMA Ch5 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x10AE,x","DMA Ch5 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x10AF,x","DMA Ch5 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x10B0,x","DMA Ch5 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10B2,x","DMA Ch5 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10B4,x","DMA Ch5 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10B6,x","DMA Ch5 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10B8,x","DMA Ch5 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10BA,x","DMA Ch5 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10BC,x","DMA Ch5 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10BE,x","DMA Ch5 DST_ADDR_ACTIVE");
-
-    GEL_WatchAdd("*0x10C0,x","DMA Ch6 MODE");
-    GEL_WatchAdd("*0x10C1,x","DMA Ch6 CONTROL");
-    GEL_WatchAdd("*0x10C2,x","DMA Ch6 BURST_SIZE");
-    GEL_WatchAdd("*0x10C3,x","DMA Ch6 BURST_COUNT");
-    GEL_WatchAdd("*0x10C4,x","DMA Ch6 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x10C5,x","DMA Ch6 DST_BURST_STEP");
-    GEL_WatchAdd("*0x10C6,x","DMA Ch6 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x10C7,x","DMA Ch6 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x10C8,x","DMA Ch6 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x10C9,x","DMA Ch6 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x10CA,x","DMA Ch6 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x10CB,x","DMA Ch6 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x10CC,x","DMA Ch6 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x10CD,x","DMA Ch6 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x10CE,x","DMA Ch6 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x10CF,x","DMA Ch6 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x10D0,x","DMA Ch6 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10D2,x","DMA Ch6 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10D4,x","DMA Ch6 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10D6,x","DMA Ch6 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10D8,x","DMA Ch6 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10DA,x","DMA Ch6 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10DC,x","DMA Ch6 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10DE,x","DMA Ch6 DST_ADDR_ACTIVE");
-
-
-}
-hotmenu DMA_Channel_1_regs()
-{
-    GEL_WatchAdd("*0x1020,x","DMA Ch1 MODE");
-    GEL_WatchAdd("*0x1021,x","DMA Ch1 CONTROL");
-    GEL_WatchAdd("*0x1022,x","DMA Ch1 BURST_SIZE");
-    GEL_WatchAdd("*0x1023,x","DMA Ch1 BURST_COUNT");
-    GEL_WatchAdd("*0x1024,x","DMA Ch1 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x1025,x","DMA Ch1 DST_BURST_STEP");
-    GEL_WatchAdd("*0x1026,x","DMA Ch1 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x1027,x","DMA Ch1 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x1028,x","DMA Ch1 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x1029,x","DMA Ch1 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x102A,x","DMA Ch1 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x102B,x","DMA Ch1 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x102C,x","DMA Ch1 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x102D,x","DMA Ch1 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x102E,x","DMA Ch1 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x102F,x","DMA Ch1 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x1030,x","DMA Ch1 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1032,x","DMA Ch1 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1034,x","DMA Ch1 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1036,x","DMA Ch1 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1038,x","DMA Ch1 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x103A,x","DMA Ch1 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x103C,x","DMA Ch1 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x103E,x","DMA Ch1 DST_ADDR_ACTIVE");
-}
-
-hotmenu DMA_Channel_2_regs()
-{
-    GEL_WatchAdd("*0x1040,x","DMA Ch2 MODE");
-    GEL_WatchAdd("*0x1041,x","DMA Ch2 CONTROL");
-    GEL_WatchAdd("*0x1042,x","DMA Ch2 BURST_SIZE");
-    GEL_WatchAdd("*0x1043,x","DMA Ch2 BURST_COUNT");
-    GEL_WatchAdd("*0x1044,x","DMA Ch2 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x1045,x","DMA Ch2 DST_BURST_STEP");
-    GEL_WatchAdd("*0x1046,x","DMA Ch2 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x1047,x","DMA Ch2 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x1048,x","DMA Ch2 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x1049,x","DMA Ch2 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x104A,x","DMA Ch2 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x104B,x","DMA Ch2 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x104C,x","DMA Ch2 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x104D,x","DMA Ch2 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x104E,x","DMA Ch2 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x104F,x","DMA Ch2 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x1050,x","DMA Ch2 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1052,x","DMA Ch2 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1054,x","DMA Ch2 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1056,x","DMA Ch2 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1058,x","DMA Ch2 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x105A,x","DMA Ch2 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x105C,x","DMA Ch2 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x105E,x","DMA Ch2 DST_ADDR_ACTIVE");
-}
-hotmenu DMA_Channel_3_regs()
-{
-    GEL_WatchAdd("*0x1060,x","DMA Ch3 MODE");
-    GEL_WatchAdd("*0x1061,x","DMA Ch3 CONTROL");
-    GEL_WatchAdd("*0x1062,x","DMA Ch3 BURST_SIZE");
-    GEL_WatchAdd("*0x1063,x","DMA Ch3 BURST_COUNT");
-    GEL_WatchAdd("*0x1064,x","DMA Ch3 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x1065,x","DMA Ch3 DST_BURST_STEP");
-    GEL_WatchAdd("*0x1066,x","DMA Ch3 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x1067,x","DMA Ch3 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x1068,x","DMA Ch3 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x1069,x","DMA Ch3 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x106A,x","DMA Ch3 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x106B,x","DMA Ch3 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x106C,x","DMA Ch3 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x106D,x","DMA Ch3 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x106E,x","DMA Ch3 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x106F,x","DMA Ch3 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x1070,x","DMA Ch3 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1072,x","DMA Ch3 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1074,x","DMA Ch3 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1076,x","DMA Ch3 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1078,x","DMA Ch3 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x107A,x","DMA Ch3 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x107C,x","DMA Ch3 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x107E,x","DMA Ch3 DST_ADDR_ACTIVE");
-}
-hotmenu DMA_Channel_4_regs()
-{
-    GEL_WatchAdd("*0x1080,x","DMA Ch4 MODE");
-    GEL_WatchAdd("*0x1081,x","DMA Ch4 CONTROL");
-    GEL_WatchAdd("*0x1082,x","DMA Ch4 BURST_SIZE");
-    GEL_WatchAdd("*0x1083,x","DMA Ch4 BURST_COUNT");
-    GEL_WatchAdd("*0x1084,x","DMA Ch4 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x1085,x","DMA Ch4 DST_BURST_STEP");
-    GEL_WatchAdd("*0x1086,x","DMA Ch4 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x1087,x","DMA Ch4 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x1088,x","DMA Ch4 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x1089,x","DMA Ch4 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x108A,x","DMA Ch4 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x108B,x","DMA Ch4 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x108C,x","DMA Ch4 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x108D,x","DMA Ch4 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x108E,x","DMA Ch4 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x108F,x","DMA Ch4 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x1090,x","DMA Ch4 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1092,x","DMA Ch4 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1094,x","DMA Ch4 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1096,x","DMA Ch4 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1098,x","DMA Ch4 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x109A,x","DMA Ch4 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x109C,x","DMA Ch4 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x109E,x","DMA Ch4 DST_ADDR_ACTIVE");
-}
-hotmenu DMA_Channel_5_regs()
-{
-    GEL_WatchAdd("*0x10A0,x","DMA Ch5 MODE");
-    GEL_WatchAdd("*0x10A1,x","DMA Ch5 CONTROL");
-    GEL_WatchAdd("*0x10A2,x","DMA Ch5 BURST_SIZE");
-    GEL_WatchAdd("*0x10A3,x","DMA Ch5 BURST_COUNT");
-    GEL_WatchAdd("*0x10A4,x","DMA Ch5 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x10A5,x","DMA Ch5 DST_BURST_STEP");
-    GEL_WatchAdd("*0x10A6,x","DMA Ch5 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x10A7,x","DMA Ch5 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x10A8,x","DMA Ch5 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x10A9,x","DMA Ch5 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x10AA,x","DMA Ch5 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x10AB,x","DMA Ch5 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x10AC,x","DMA Ch5 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x10AD,x","DMA Ch5 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x10AE,x","DMA Ch5 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x10AF,x","DMA Ch5 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x10B0,x","DMA Ch5 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10B2,x","DMA Ch5 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10B4,x","DMA Ch5 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10B6,x","DMA Ch5 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10B8,x","DMA Ch5 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10BA,x","DMA Ch5 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10BC,x","DMA Ch5 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10BE,x","DMA Ch5 DST_ADDR_ACTIVE");
-}
-hotmenu DMA_Channel_6_regs()
-{
-    GEL_WatchAdd("*0x10C0,x","DMA Ch6 MODE");
-    GEL_WatchAdd("*0x10C1,x","DMA Ch6 CONTROL");
-    GEL_WatchAdd("*0x10C2,x","DMA Ch6 BURST_SIZE");
-    GEL_WatchAdd("*0x10C3,x","DMA Ch6 BURST_COUNT");
-    GEL_WatchAdd("*0x10C4,x","DMA Ch6 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x10C5,x","DMA Ch6 DST_BURST_STEP");
-    GEL_WatchAdd("*0x10C6,x","DMA Ch6 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x10C7,x","DMA Ch6 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x10C8,x","DMA Ch6 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x10C9,x","DMA Ch6 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x10CA,x","DMA Ch6 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x10CB,x","DMA Ch6 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x10CC,x","DMA Ch6 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x10CD,x","DMA Ch6 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x10CE,x","DMA Ch6 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x10CF,x","DMA Ch6 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x10D0,x","DMA Ch6 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10D2,x","DMA Ch6 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10D4,x","DMA Ch6 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10D6,x","DMA Ch6 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10D8,x","DMA Ch6 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10DA,x","DMA Ch6 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10DC,x","DMA Ch6 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10DE,x","DMA Ch6 DST_ADDR_ACTIVE");
-}
-
-/********************************************************************/
-/* eCAN Registers                                                   */
-/********************************************************************/
-menuitem "Watch eCAN Registers";
-
-hotmenu eCAN_A_Global_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6000,x","eCANA CANME");
-    GEL_WatchAdd("*(long *)0x6002,x","eCANA CANMD");
-    GEL_WatchAdd("*(long *)0x6004,x","eCANA CANTRS");
-    GEL_WatchAdd("*(long *)0x6006,x","eCANA CANTRR");
-    GEL_WatchAdd("*(long *)0x6008,x","eCANA CANTA");
-    GEL_WatchAdd("*(long *)0x600A,x","eCANA CANAA");
-    GEL_WatchAdd("*(long *)0x600C,x","eCANA CANRMP");
-    GEL_WatchAdd("*(long *)0x600E,x","eCANA CANRML");
-    GEL_WatchAdd("*(long *)0x6010,x","eCANA CANRFP");
-    GEL_WatchAdd("*(long *)0x6014,x","eCANA CANMC");
-    GEL_WatchAdd("*(long *)0x6016,x","eCANA CANBTC");
-    GEL_WatchAdd("*(long *)0x6018,x","eCANA CANES");
-    GEL_WatchAdd("*(long *)0x601A,x","eCANA CANTEC");
-    GEL_WatchAdd("*(long *)0x601C,x","eCANA CANREC");
-    GEL_WatchAdd("*(long *)0x601E,x","eCANA CANGIF0");
-    GEL_WatchAdd("*(long *)0x6020,x","eCANA CANGIM");
-    GEL_WatchAdd("*(long *)0x6022,x","eCANA CANGIF1");
-    GEL_WatchAdd("*(long *)0x6024,x","eCANA CANMIM");
-    GEL_WatchAdd("*(long *)0x6026,x","eCANA CANMIL");
-    GEL_WatchAdd("*(long *)0x6028,x","eCANA CANOPC");
-    GEL_WatchAdd("*(long *)0x602A,x","eCANA CANTIOC");
-    GEL_WatchAdd("*(long *)0x602C,x","eCANA CANRIOC");
-    GEL_WatchAdd("*(long *)0x602E,x","eCANA CANLNT");
-    GEL_WatchAdd("*(long *)0x6030,x","eCANA CANTOC");
-    GEL_WatchAdd("*(long *)0x6032,x","eCANA CANTOS");
-}
-hotmenu eCAN_A_Mailbox_0_to_1_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6040,x","eCANA LAM0");
-    GEL_WatchAdd("*(long *)0x6080,x","eCANA MOTS0");
-    GEL_WatchAdd("*(long *)0x60C0,x","eCANA MOTO0");
-    GEL_WatchAdd("*(long *)0x6100,x","eCANA MID0");
-    GEL_WatchAdd("*(long *)0x6102,x","eCANA MCF0");
-    GEL_WatchAdd("*(long *)0x6104,x","eCANA MDL0");
-    GEL_WatchAdd("*(long *)0x6106,x","eCANA MDH0");
-    
-    GEL_WatchAdd("*(long *)0x6042,x","eCANA LAM1");
-    GEL_WatchAdd("*(long *)0x6082,x","eCANA MOTS1");
-    GEL_WatchAdd("*(long *)0x60C2,x","eCANA MOTO1");
-    GEL_WatchAdd("*(long *)0x6108,x","eCANA MID1");
-    GEL_WatchAdd("*(long *)0x610A,x","eCANA MCF1");
-    GEL_WatchAdd("*(long *)0x610C,x","eCANA MDL1");
-    GEL_WatchAdd("*(long *)0x610E,x","eCANA MDH1");
-}
-hotmenu eCAN_A_Mailbox_2_to_3_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6044,x","eCANA LAM2");
-    GEL_WatchAdd("*(long *)0x6084,x","eCANA MOTS2");
-    GEL_WatchAdd("*(long *)0x60C4,x","eCANA MOTO2");
-    GEL_WatchAdd("*(long *)0x6110,x","eCANA MID2");
-    GEL_WatchAdd("*(long *)0x6112,x","eCANA MCF2");
-    GEL_WatchAdd("*(long *)0x6114,x","eCANA MDL2");
-    GEL_WatchAdd("*(long *)0x6116,x","eCANA MDH2");
-
-    GEL_WatchAdd("*(long *)0x6046,x","eCANA LAM3");
-    GEL_WatchAdd("*(long *)0x6086,x","eCANA MOTS3");
-    GEL_WatchAdd("*(long *)0x60C6,x","eCANA MOTO3");
-    GEL_WatchAdd("*(long *)0x6118,x","eCANA MID3");
-    GEL_WatchAdd("*(long *)0x611A,x","eCANA MCF3");
-    GEL_WatchAdd("*(long *)0x611C,x","eCANA MDL3");
-    GEL_WatchAdd("*(long *)0x611E,x","eCANA MDH3");
-}
-hotmenu eCAN_A_Mailbox_4_to_5_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6048,x","eCANA LAM4");
-    GEL_WatchAdd("*(long *)0x6088,x","eCANA MOTS4");
-    GEL_WatchAdd("*(long *)0x60C8,x","eCANA MOTO4");
-    GEL_WatchAdd("*(long *)0x6120,x","eCANA MID4");
-    GEL_WatchAdd("*(long *)0x6122,x","eCANA MCF4");
-    GEL_WatchAdd("*(long *)0x6124,x","eCANA MDL4");
-    GEL_WatchAdd("*(long *)0x6126,x","eCANA MDH4");
-    
-    GEL_WatchAdd("*(long *)0x604A,x","eCANA LAM5");
-    GEL_WatchAdd("*(long *)0x608A,x","eCANA MOTS5");
-    GEL_WatchAdd("*(long *)0x60CA,x","eCANA MOTO5");
-    GEL_WatchAdd("*(long *)0x6128,x","eCANA MID5");
-    GEL_WatchAdd("*(long *)0x612A,x","eCANA MCF5");
-    GEL_WatchAdd("*(long *)0x612C,x","eCANA MDL5");
-    GEL_WatchAdd("*(long *)0x612E,x","eCANA MDH5");
-}
-hotmenu eCAN_A_Mailbox_6_to_7_Regs()
-{
-    GEL_WatchAdd("*(long *)0x604C,x","eCANA LAM6");
-    GEL_WatchAdd("*(long *)0x608C,x","eCANA MOTS6");
-    GEL_WatchAdd("*(long *)0x60CC,x","eCANA MOTO6");
-    GEL_WatchAdd("*(long *)0x6130,x","eCANA MID6");
-    GEL_WatchAdd("*(long *)0x6132,x","eCANA MCF6");
-    GEL_WatchAdd("*(long *)0x6134,x","eCANA MDL6");
-    GEL_WatchAdd("*(long *)0x6136,x","eCANA MDH6");
-    
-    GEL_WatchAdd("*(long *)0x604E,x","eCANA LAM7");
-    GEL_WatchAdd("*(long *)0x608E,x","eCANA MOTS7");
-    GEL_WatchAdd("*(long *)0x60CE,x","eCANA MOTO7");
-    GEL_WatchAdd("*(long *)0x6138,x","eCANA MID7");
-    GEL_WatchAdd("*(long *)0x613A,x","eCANA MCF7");
-    GEL_WatchAdd("*(long *)0x613C,x","eCANA MDL7");
-    GEL_WatchAdd("*(long *)0x613E,x","eCANA MDH7");
-}
-hotmenu eCAN_A_Mailbox_8_to_9_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6050,x","eCANA LAM8");
-    GEL_WatchAdd("*(long *)0x6090,x","eCANA MOTS8");
-    GEL_WatchAdd("*(long *)0x60D0,x","eCANA MOTO8");
-    GEL_WatchAdd("*(long *)0x6140,x","eCANA MID8");
-    GEL_WatchAdd("*(long *)0x6142,x","eCANA MCF8");
-    GEL_WatchAdd("*(long *)0x6144,x","eCANA MDL8");
-    GEL_WatchAdd("*(long *)0x6146,x","eCANA MDH8");
-
-    GEL_WatchAdd("*(long *)0x6052,x","eCANA LAM9");
-    GEL_WatchAdd("*(long *)0x6092,x","eCANA MOTS9");
-    GEL_WatchAdd("*(long *)0x60D2,x","eCANA MOTO9");
-    GEL_WatchAdd("*(long *)0x6148,x","eCANA MID9");
-    GEL_WatchAdd("*(long *)0x614A,x","eCANA MCF9");
-    GEL_WatchAdd("*(long *)0x614C,x","eCANA MDL9");
-    GEL_WatchAdd("*(long *)0x614E,x","eCANA MDH9");
-}
-hotmenu eCAN_A_Mailbox_10_to_11_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6054,x","eCANA LAM10");
-    GEL_WatchAdd("*(long *)0x6094,x","eCANA MOTS10");
-    GEL_WatchAdd("*(long *)0x60D4,x","eCANA MOTO10");
-    GEL_WatchAdd("*(long *)0x6150,x","eCANA MID10");
-    GEL_WatchAdd("*(long *)0x6152,x","eCANA MCF10");
-    GEL_WatchAdd("*(long *)0x6154,x","eCANA MDL10");
-    GEL_WatchAdd("*(long *)0x6156,x","eCANA MDH10");
-
-    GEL_WatchAdd("*(long *)0x6056,x","eCANA LAM11");
-    GEL_WatchAdd("*(long *)0x6096,x","eCANA MOTS11");
-    GEL_WatchAdd("*(long *)0x60D6,x","eCANA MOTO11");
-    GEL_WatchAdd("*(long *)0x6158,x","eCANA MID11");
-    GEL_WatchAdd("*(long *)0x615A,x","eCANA MCF11");
-    GEL_WatchAdd("*(long *)0x615C,x","eCANA MDL11");
-    GEL_WatchAdd("*(long *)0x615E,x","eCANA MDH11");
-}
-hotmenu eCAN_A_Mailbox_12_to_13_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6058,x","eCANA LAM12");
-    GEL_WatchAdd("*(long *)0x6098,x","eCANA MOTS12");
-    GEL_WatchAdd("*(long *)0x60D8,x","eCANA MOTO12");
-    GEL_WatchAdd("*(long *)0x6160,x","eCANA MID12");
-    GEL_WatchAdd("*(long *)0x6162,x","eCANA MCF12");
-    GEL_WatchAdd("*(long *)0x6164,x","eCANA MDL12");
-    GEL_WatchAdd("*(long *)0x6166,x","eCANA MDH12");
-    
-    GEL_WatchAdd("*(long *)0x605A,x","eCANA LAM13");
-    GEL_WatchAdd("*(long *)0x609A,x","eCANA MOTS13");
-    GEL_WatchAdd("*(long *)0x60DA,x","eCANA MOTO13");
-    GEL_WatchAdd("*(long *)0x6168,x","eCANA MID13");
-    GEL_WatchAdd("*(long *)0x616A,x","eCANA MCF13");
-    GEL_WatchAdd("*(long *)0x616C,x","eCANA MDL13");
-    GEL_WatchAdd("*(long *)0x616E,x","eCANA MDH13");
-}
-hotmenu eCAN_A_Mailbox_14_to_15_Regs()
-{
-    GEL_WatchAdd("*(long *)0x605C,x","eCANA LAM14");
-    GEL_WatchAdd("*(long *)0x609C,x","eCANA MOTS14");
-    GEL_WatchAdd("*(long *)0x60DC,x","eCANA MOTO14");
-    GEL_WatchAdd("*(long *)0x6170,x","eCANA MID14");
-    GEL_WatchAdd("*(long *)0x6172,x","eCANA MCF14");
-    GEL_WatchAdd("*(long *)0x6174,x","eCANA MDL14");
-    GEL_WatchAdd("*(long *)0x6176,x","eCANA MDH14");
-    
-    GEL_WatchAdd("*(long *)0x605E,x","eCANA LAM15");
-    GEL_WatchAdd("*(long *)0x609E,x","eCANA MOTS15");
-    GEL_WatchAdd("*(long *)0x60DE,x","eCANA MOTO15");
-    GEL_WatchAdd("*(long *)0x6178,x","eCANA MID15");
-    GEL_WatchAdd("*(long *)0x617A,x","eCANA MCF15");
-    GEL_WatchAdd("*(long *)0x617C,x","eCANA MDL15");
-    GEL_WatchAdd("*(long *)0x617E,x","eCANA MDH15");
-}
-hotmenu eCAN_A_Mailbox_16_to_17_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6060,x","eCANA LAM16");
-    GEL_WatchAdd("*(long *)0x60A0,x","eCANA MOTS16");
-    GEL_WatchAdd("*(long *)0x60E0,x","eCANA MOTO16");
-    GEL_WatchAdd("*(long *)0x6180,x","eCANA MID16");
-    GEL_WatchAdd("*(long *)0x6182,x","eCANA MCF16");
-    GEL_WatchAdd("*(long *)0x6184,x","eCANA MDL16");
-    GEL_WatchAdd("*(long *)0x6186,x","eCANA MDH16");
-
-    GEL_WatchAdd("*(long *)0x6062,x","eCANA LAM17");
-    GEL_WatchAdd("*(long *)0x60A2,x","eCANA MOTS17");
-    GEL_WatchAdd("*(long *)0x60E2,x","eCANA MOTO17");
-    GEL_WatchAdd("*(long *)0x6188,x","eCANA MID17");
-    GEL_WatchAdd("*(long *)0x618A,x","eCANA MCF17");
-    GEL_WatchAdd("*(long *)0x618C,x","eCANA MDL17");
-    GEL_WatchAdd("*(long *)0x618E,x","eCANA MDH17");
-}
-hotmenu eCAN_A_Mailbox_18_to_19_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6064,x","eCANA LAM18");
-    GEL_WatchAdd("*(long *)0x60A4,x","eCANA MOTS18");
-    GEL_WatchAdd("*(long *)0x60E4,x","eCANA MOTO18");
-    GEL_WatchAdd("*(long *)0x6190,x","eCANA MID18");
-    GEL_WatchAdd("*(long *)0x6192,x","eCANA MCF18");
-    GEL_WatchAdd("*(long *)0x6194,x","eCANA MDL18");
-    GEL_WatchAdd("*(long *)0x6196,x","eCANA MDH18");
-
-    GEL_WatchAdd("*(long *)0x6066,x","eCANA LAM19");
-    GEL_WatchAdd("*(long *)0x60A6,x","eCANA MOTS19");
-    GEL_WatchAdd("*(long *)0x60E6,x","eCANA MOTO19");
-    GEL_WatchAdd("*(long *)0x6198,x","eCANA MID19");
-    GEL_WatchAdd("*(long *)0x619A,x","eCANA MCF19");
-    GEL_WatchAdd("*(long *)0x619C,x","eCANA MDL19");
-    GEL_WatchAdd("*(long *)0x619E,x","eCANA MDH19");
-}
-hotmenu eCAN_A_Mailbox_20_to_21_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6068,x","eCANA LAM20");
-    GEL_WatchAdd("*(long *)0x60A8,x","eCANA MOTS20");
-    GEL_WatchAdd("*(long *)0x60E8,x","eCANA MOTO20");
-    GEL_WatchAdd("*(long *)0x61A0,x","eCANA MID20");
-    GEL_WatchAdd("*(long *)0x61A2,x","eCANA MCF20");
-    GEL_WatchAdd("*(long *)0x61A4,x","eCANA MDL20");
-    GEL_WatchAdd("*(long *)0x61A6,x","eCANA MDH20");
-    
-    GEL_WatchAdd("*(long *)0x606A,x","eCANA LAM21");
-    GEL_WatchAdd("*(long *)0x60AA,x","eCANA MOTS21");
-    GEL_WatchAdd("*(long *)0x60EA,x","eCANA MOTO21");
-    GEL_WatchAdd("*(long *)0x61A8,x","eCANA MID21");
-    GEL_WatchAdd("*(long *)0x61AA,x","eCANA MCF21");
-    GEL_WatchAdd("*(long *)0x61AC,x","eCANA MDL21");
-    GEL_WatchAdd("*(long *)0x61AE,x","eCANA MDH21");
-}
-hotmenu eCAN_A_Mailbox_22_to_23_Regs()
-{
-    GEL_WatchAdd("*(long *)0x606C,x","eCANA LAM22");
-    GEL_WatchAdd("*(long *)0x60AC,x","eCANA MOTS22");
-    GEL_WatchAdd("*(long *)0x60EC,x","eCANA MOTO22");
-    GEL_WatchAdd("*(long *)0x61B0,x","eCANA MID22");
-    GEL_WatchAdd("*(long *)0x61B2,x","eCANA MCF22");
-    GEL_WatchAdd("*(long *)0x61B4,x","eCANA MDL22");
-    GEL_WatchAdd("*(long *)0x61B6,x","eCANA MDH22");
-
-    GEL_WatchAdd("*(long *)0x606E,x","eCANA LAM23");
-    GEL_WatchAdd("*(long *)0x60AE,x","eCANA MOTS23");
-    GEL_WatchAdd("*(long *)0x60EE,x","eCANA MOTO23");
-    GEL_WatchAdd("*(long *)0x61B8,x","eCANA MID23");
-    GEL_WatchAdd("*(long *)0x61BA,x","eCANA MCF23");
-    GEL_WatchAdd("*(long *)0x61BC,x","eCANA MDL23");
-    GEL_WatchAdd("*(long *)0x61BE,x","eCANA MDH23");
-}
-hotmenu eCAN_A_Mailbox_24_to_25_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6070,x","eCANA LAM24");
-    GEL_WatchAdd("*(long *)0x60B0,x","eCANA MOTS24");
-    GEL_WatchAdd("*(long *)0x60F0,x","eCANA MOTO24");
-    GEL_WatchAdd("*(long *)0x61C0,x","eCANA MID24");
-    GEL_WatchAdd("*(long *)0x61C2,x","eCANA MCF24");
-    GEL_WatchAdd("*(long *)0x61C4,x","eCANA MDL24");
-    GEL_WatchAdd("*(long *)0x61C6,x","eCANA MDH24");
-
-    GEL_WatchAdd("*(long *)0x6072,x","eCANA LAM25");
-    GEL_WatchAdd("*(long *)0x60B2,x","eCANA MOTS25");
-    GEL_WatchAdd("*(long *)0x60F2,x","eCANA MOTO25");
-    GEL_WatchAdd("*(long *)0x61C8,x","eCANA MID25");
-    GEL_WatchAdd("*(long *)0x61CA,x","eCANA MCF25");
-    GEL_WatchAdd("*(long *)0x61CC,x","eCANA MDL25");
-    GEL_WatchAdd("*(long *)0x61CE,x","eCANA MDH25");
-}
-hotmenu eCAN_A_Mailbox_26_to_27_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6074,x","eCANA LAM26");
-    GEL_WatchAdd("*(long *)0x60B4,x","eCANA MOTS26");
-    GEL_WatchAdd("*(long *)0x60F4,x","eCANA MOTO26");
-    GEL_WatchAdd("*(long *)0x61D0,x","eCANA MID26");
-    GEL_WatchAdd("*(long *)0x61D2,x","eCANA MCF26");
-    GEL_WatchAdd("*(long *)0x61D4,x","eCANA MDL26");
-    GEL_WatchAdd("*(long *)0x61D6,x","eCANA MDH26");
-
-    GEL_WatchAdd("*(long *)0x6076,x","eCANA LAM27");
-    GEL_WatchAdd("*(long *)0x60B6,x","eCANA MOTS27");
-    GEL_WatchAdd("*(long *)0x60F6,x","eCANA MOTO27");
-    GEL_WatchAdd("*(long *)0x61D8,x","eCANA MID27");
-    GEL_WatchAdd("*(long *)0x61DA,x","eCANA MCF27");
-    GEL_WatchAdd("*(long *)0x61DC,x","eCANA MDL27");
-    GEL_WatchAdd("*(long *)0x61DE,x","eCANA MDH27");
-}
-hotmenu eCAN_A_Mailbox_28_to_29_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6078,x","eCANA LAM28");
-    GEL_WatchAdd("*(long *)0x60B8,x","eCANA MOTS28");
-    GEL_WatchAdd("*(long *)0x60F8,x","eCANA MOTO28");
-    GEL_WatchAdd("*(long *)0x61E0,x","eCANA MID28");
-    GEL_WatchAdd("*(long *)0x61E2,x","eCANA MCF28");
-    GEL_WatchAdd("*(long *)0x61E4,x","eCANA MDL28");
-    GEL_WatchAdd("*(long *)0x61E6,x","eCANA MDH28");
-
-    GEL_WatchAdd("*(long *)0x607A,x","eCANA LAM29");
-    GEL_WatchAdd("*(long *)0x60BA,x","eCANA MOTS29");
-    GEL_WatchAdd("*(long *)0x60FA,x","eCANA MOTO29");
-    GEL_WatchAdd("*(long *)0x61E8,x","eCANA MID29");
-    GEL_WatchAdd("*(long *)0x61EA,x","eCANA MCF29");
-    GEL_WatchAdd("*(long *)0x61EC,x","eCANA MDL29");
-    GEL_WatchAdd("*(long *)0x61EE,x","eCANA MDH29");
-}
-hotmenu eCAN_A_Mailbox_30_to_31_Regs()
-{
-    GEL_WatchAdd("*(long *)0x607C,x","eCANA LAM30");
-    GEL_WatchAdd("*(long *)0x60BC,x","eCANA MOTS30");
-    GEL_WatchAdd("*(long *)0x60FC,x","eCANA MOTO30");
-    GEL_WatchAdd("*(long *)0x61F0,x","eCANA MID30");
-    GEL_WatchAdd("*(long *)0x61F2,x","eCANA MCF30");
-    GEL_WatchAdd("*(long *)0x61F4,x","eCANA MDL30");
-    GEL_WatchAdd("*(long *)0x61F6,x","eCANA MDH30");
-
-    GEL_WatchAdd("*(long *)0x607E,x","eCANA LAM31");
-    GEL_WatchAdd("*(long *)0x60BE,x","eCANA MOTS31");
-    GEL_WatchAdd("*(long *)0x60FE,x","eCANA MOTO31");
-    GEL_WatchAdd("*(long *)0x61F8,x","eCANA MID31");
-    GEL_WatchAdd("*(long *)0x61FA,x","eCANA MCF31");
-    GEL_WatchAdd("*(long *)0x61FC,x","eCANA MDL31");
-    GEL_WatchAdd("*(long *)0x61FE,x","eCANA MDH31");
-}
-hotmenu eCAN_B_Global_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6200,x","eCANB CANME");
-    GEL_WatchAdd("*(long *)0x6202,x","eCANB CANMD");
-    GEL_WatchAdd("*(long *)0x6204,x","eCANB CANTRS");
-    GEL_WatchAdd("*(long *)0x6206,x","eCANB CANTRR");
-    GEL_WatchAdd("*(long *)0x6208,x","eCANB CANTA");
-    GEL_WatchAdd("*(long *)0x620A,x","eCANB CANAA");
-    GEL_WatchAdd("*(long *)0x620C,x","eCANB CANRMP");
-    GEL_WatchAdd("*(long *)0x620E,x","eCANB CANRML");
-    GEL_WatchAdd("*(long *)0x6210,x","eCANB CANRFP");
-    GEL_WatchAdd("*(long *)0x6214,x","eCANB CANMC");
-    GEL_WatchAdd("*(long *)0x6216,x","eCANB CANBTC");
-    GEL_WatchAdd("*(long *)0x6218,x","eCANB CANES");
-    GEL_WatchAdd("*(long *)0x621A,x","eCANB CANTEC");
-    GEL_WatchAdd("*(long *)0x621C,x","eCANB CANREC");
-    GEL_WatchAdd("*(long *)0x621E,x","eCANB CANGIF0");
-    GEL_WatchAdd("*(long *)0x6220,x","eCANB CANGIM");
-    GEL_WatchAdd("*(long *)0x6222,x","eCANB CANGIF1");
-    GEL_WatchAdd("*(long *)0x6224,x","eCANB CANMIM");
-    GEL_WatchAdd("*(long *)0x6226,x","eCANB CANMIL");
-    GEL_WatchAdd("*(long *)0x6228,x","eCANB CANOPC");
-    GEL_WatchAdd("*(long *)0x622A,x","eCANB CANTIOC");
-    GEL_WatchAdd("*(long *)0x622C,x","eCANB CANRIOC");
-    GEL_WatchAdd("*(long *)0x622E,x","eCANB CANLNT");
-    GEL_WatchAdd("*(long *)0x6230,x","eCANB CANTOC");
-    GEL_WatchAdd("*(long *)0x6232,x","eCANB CANTOS");
-}
-hotmenu eCAN_B_Mailbox_0_to_1_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6240,x","eCANB LAM0");
-    GEL_WatchAdd("*(long *)0x6280,x","eCANB MOTS0");
-    GEL_WatchAdd("*(long *)0x62C0,x","eCANB MOTO0");
-    GEL_WatchAdd("*(long *)0x6300,x","eCANB MID0");
-    GEL_WatchAdd("*(long *)0x6302,x","eCANB MCF0");
-    GEL_WatchAdd("*(long *)0x6304,x","eCANB MDL0");
-    GEL_WatchAdd("*(long *)0x6306,x","eCANB MDH0");
-
-    GEL_WatchAdd("*(long *)0x6242,x","eCANB LAM1");
-    GEL_WatchAdd("*(long *)0x6282,x","eCANB MOTS1");
-    GEL_WatchAdd("*(long *)0x62C2,x","eCANB MOTO1");
-    GEL_WatchAdd("*(long *)0x6308,x","eCANB MID1");
-    GEL_WatchAdd("*(long *)0x630A,x","eCANB MCF1");
-    GEL_WatchAdd("*(long *)0x630C,x","eCANB MDL1");
-    GEL_WatchAdd("*(long *)0x630E,x","eCANB MDH1");
-}
-hotmenu eCAN_B_Mailbox_2_to_3_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6244,x","eCANB LAM2");
-    GEL_WatchAdd("*(long *)0x6284,x","eCANB MOTS2");
-    GEL_WatchAdd("*(long *)0x62C4,x","eCANB MOTO2");
-    GEL_WatchAdd("*(long *)0x6310,x","eCANB MID2");
-    GEL_WatchAdd("*(long *)0x6312,x","eCANB MCF2");
-    GEL_WatchAdd("*(long *)0x6314,x","eCANB MDL2");
-    GEL_WatchAdd("*(long *)0x6316,x","eCANB MDH2");
-
-    GEL_WatchAdd("*(long *)0x6246,x","eCANB LAM3");
-    GEL_WatchAdd("*(long *)0x6286,x","eCANB MOTS3");
-    GEL_WatchAdd("*(long *)0x62C6,x","eCANB MOTO3");
-    GEL_WatchAdd("*(long *)0x6318,x","eCANB MID3");
-    GEL_WatchAdd("*(long *)0x631A,x","eCANB MCF3");
-    GEL_WatchAdd("*(long *)0x631C,x","eCANB MDL3");
-    GEL_WatchAdd("*(long *)0x631E,x","eCANB MDH3");
-}
-hotmenu eCAN_B_Mailbox_4_to_5_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6248,x","eCANB LAM4");
-    GEL_WatchAdd("*(long *)0x6288,x","eCANB MOTS4");
-    GEL_WatchAdd("*(long *)0x62C8,x","eCANB MOTO4");
-    GEL_WatchAdd("*(long *)0x6320,x","eCANB MID4");
-    GEL_WatchAdd("*(long *)0x6322,x","eCANB MCF4");
-    GEL_WatchAdd("*(long *)0x6324,x","eCANB MDL4");
-    GEL_WatchAdd("*(long *)0x6326,x","eCANB MDH4");
-
-    GEL_WatchAdd("*(long *)0x624A,x","eCANB LAM5");
-    GEL_WatchAdd("*(long *)0x628A,x","eCANB MOTS5");
-    GEL_WatchAdd("*(long *)0x62CA,x","eCANB MOTO5");
-    GEL_WatchAdd("*(long *)0x6328,x","eCANB MID5");
-    GEL_WatchAdd("*(long *)0x632A,x","eCANB MCF5");
-    GEL_WatchAdd("*(long *)0x632C,x","eCANB MDL5");
-    GEL_WatchAdd("*(long *)0x632E,x","eCANB MDH5");
-}
-hotmenu eCAN_B_Mailbox_6_to_7_Regs()
-{
-    GEL_WatchAdd("*(long *)0x624C,x","eCANB LAM6");
-    GEL_WatchAdd("*(long *)0x628C,x","eCANB MOTS6");
-    GEL_WatchAdd("*(long *)0x62CC,x","eCANB MOTO6");
-    GEL_WatchAdd("*(long *)0x6330,x","eCANB MID6");
-    GEL_WatchAdd("*(long *)0x6332,x","eCANB MCF6");
-    GEL_WatchAdd("*(long *)0x6334,x","eCANB MDL6");
-    GEL_WatchAdd("*(long *)0x6336,x","eCANB MDH6");
-
-    GEL_WatchAdd("*(long *)0x624E,x","eCANB LAM7");
-    GEL_WatchAdd("*(long *)0x628E,x","eCANB MOTS7");
-    GEL_WatchAdd("*(long *)0x62CE,x","eCANB MOTO7");
-    GEL_WatchAdd("*(long *)0x6338,x","eCANB MID7");
-    GEL_WatchAdd("*(long *)0x633A,x","eCANB MCF7");
-    GEL_WatchAdd("*(long *)0x633C,x","eCANB MDL7");
-    GEL_WatchAdd("*(long *)0x633E,x","eCANB MDH7");
-}
-hotmenu eCAN_B_Mailbox_8_to_9_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6250,x","eCANB LAM8");
-    GEL_WatchAdd("*(long *)0x6290,x","eCANB MOTS8");
-    GEL_WatchAdd("*(long *)0x62D0,x","eCANB MOTO8");
-    GEL_WatchAdd("*(long *)0x6340,x","eCANB MID8");
-    GEL_WatchAdd("*(long *)0x6342,x","eCANB MCF8");
-    GEL_WatchAdd("*(long *)0x6344,x","eCANB MDL8");
-    GEL_WatchAdd("*(long *)0x6346,x","eCANB MDH8");
-
-    GEL_WatchAdd("*(long *)0x6252,x","eCANB LAM9");
-    GEL_WatchAdd("*(long *)0x6292,x","eCANB MOTS9");
-    GEL_WatchAdd("*(long *)0x62D2,x","eCANB MOTO9");
-    GEL_WatchAdd("*(long *)0x6348,x","eCANB MID9");
-    GEL_WatchAdd("*(long *)0x634A,x","eCANB MCF9");
-    GEL_WatchAdd("*(long *)0x634C,x","eCANB MDL9");
-    GEL_WatchAdd("*(long *)0x634E,x","eCANB MDH9");
-}
-hotmenu eCAN_B_Mailbox_10_to_11_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6254,x","eCANB LAM10");
-    GEL_WatchAdd("*(long *)0x6294,x","eCANB MOTS10");
-    GEL_WatchAdd("*(long *)0x62D4,x","eCANB MOTO10");
-    GEL_WatchAdd("*(long *)0x6350,x","eCANB MID10");
-    GEL_WatchAdd("*(long *)0x6352,x","eCANB MCF10");
-    GEL_WatchAdd("*(long *)0x6354,x","eCANB MDL10");
-    GEL_WatchAdd("*(long *)0x6356,x","eCANB MDH10");
-
-    GEL_WatchAdd("*(long *)0x6256,x","eCANB LAM11");
-    GEL_WatchAdd("*(long *)0x6296,x","eCANB MOTS11");
-    GEL_WatchAdd("*(long *)0x62D6,x","eCANB MOTO11");
-    GEL_WatchAdd("*(long *)0x6358,x","eCANB MID11");
-    GEL_WatchAdd("*(long *)0x635A,x","eCANB MCF11");
-    GEL_WatchAdd("*(long *)0x635C,x","eCANB MDL11");
-    GEL_WatchAdd("*(long *)0x635E,x","eCANB MDH11");
-}
-hotmenu eCAN_B_Mailbox_12_to_13_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6258,x","eCANB LAM12");
-    GEL_WatchAdd("*(long *)0x6298,x","eCANB MOTS12");
-    GEL_WatchAdd("*(long *)0x62D8,x","eCANB MOTO12");
-    GEL_WatchAdd("*(long *)0x6360,x","eCANB MID12");
-    GEL_WatchAdd("*(long *)0x6362,x","eCANB MCF12");
-    GEL_WatchAdd("*(long *)0x6364,x","eCANB MDL12");
-    GEL_WatchAdd("*(long *)0x6366,x","eCANB MDH12");
-
-    GEL_WatchAdd("*(long *)0x625A,x","eCANB LAM13");
-    GEL_WatchAdd("*(long *)0x629A,x","eCANB MOTS13");
-    GEL_WatchAdd("*(long *)0x62DA,x","eCANB MOTO13");
-    GEL_WatchAdd("*(long *)0x6368,x","eCANB MID13");
-    GEL_WatchAdd("*(long *)0x636A,x","eCANB MCF13");
-    GEL_WatchAdd("*(long *)0x636C,x","eCANB MDL13");
-    GEL_WatchAdd("*(long *)0x636E,x","eCANB MDH13");
-}
-hotmenu eCAN_B_Mailbox_14_to_15_Regs()
-{
-    GEL_WatchAdd("*(long *)0x625C,x","eCANB LAM14");
-    GEL_WatchAdd("*(long *)0x629C,x","eCANB MOTS14");
-    GEL_WatchAdd("*(long *)0x62DC,x","eCANB MOTO14");
-    GEL_WatchAdd("*(long *)0x6370,x","eCANB MID14");
-    GEL_WatchAdd("*(long *)0x6372,x","eCANB MCF14");
-    GEL_WatchAdd("*(long *)0x6374,x","eCANB MDL14");
-    GEL_WatchAdd("*(long *)0x6376,x","eCANB MDH14");
-
-    GEL_WatchAdd("*(long *)0x625E,x","eCANB LAM15");
-    GEL_WatchAdd("*(long *)0x629E,x","eCANB MOTS15");
-    GEL_WatchAdd("*(long *)0x62DE,x","eCANB MOTO15");
-    GEL_WatchAdd("*(long *)0x6378,x","eCANB MID15");
-    GEL_WatchAdd("*(long *)0x637A,x","eCANB MCF15");
-    GEL_WatchAdd("*(long *)0x637C,x","eCANB MDL15");
-    GEL_WatchAdd("*(long *)0x637E,x","eCANB MDH15");
-}
-hotmenu eCAN_B_Mailbox_16_to_17_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6260,x","eCANB LAM16");
-    GEL_WatchAdd("*(long *)0x62A0,x","eCANB MOTS16");
-    GEL_WatchAdd("*(long *)0x62E0,x","eCANB MOTO16");
-    GEL_WatchAdd("*(long *)0x6380,x","eCANB MID16");
-    GEL_WatchAdd("*(long *)0x6382,x","eCANB MCF16");
-    GEL_WatchAdd("*(long *)0x6384,x","eCANB MDL16");
-    GEL_WatchAdd("*(long *)0x6386,x","eCANB MDH16");
-
-    GEL_WatchAdd("*(long *)0x6262,x","eCANB LAM17");
-    GEL_WatchAdd("*(long *)0x62A2,x","eCANB MOTS17");
-    GEL_WatchAdd("*(long *)0x62E2,x","eCANB MOTO17");
-    GEL_WatchAdd("*(long *)0x6388,x","eCANB MID17");
-    GEL_WatchAdd("*(long *)0x638A,x","eCANB MCF17");
-    GEL_WatchAdd("*(long *)0x638C,x","eCANB MDL17");
-    GEL_WatchAdd("*(long *)0x638E,x","eCANB MDH17");
-}
-hotmenu eCAN_B_Mailbox_18_to_19_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6264,x","eCANB LAM18");
-    GEL_WatchAdd("*(long *)0x62A4,x","eCANB MOTS18");
-    GEL_WatchAdd("*(long *)0x62E4,x","eCANB MOTO18");
-    GEL_WatchAdd("*(long *)0x6390,x","eCANB MID18");
-    GEL_WatchAdd("*(long *)0x6392,x","eCANB MCF18");
-    GEL_WatchAdd("*(long *)0x6394,x","eCANB MDL18");
-    GEL_WatchAdd("*(long *)0x6396,x","eCANB MDH18");
-
-    GEL_WatchAdd("*(long *)0x6266,x","eCANB LAM19");
-    GEL_WatchAdd("*(long *)0x62A6,x","eCANB MOTS19");
-    GEL_WatchAdd("*(long *)0x62E6,x","eCANB MOTO19");
-    GEL_WatchAdd("*(long *)0x6398,x","eCANB MID19");
-    GEL_WatchAdd("*(long *)0x639A,x","eCANB MCF19");
-    GEL_WatchAdd("*(long *)0x639C,x","eCANB MDL19");
-    GEL_WatchAdd("*(long *)0x639E,x","eCANB MDH19");
-}
-hotmenu eCAN_B_Mailbox_20_to_21_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6268,x","eCANB LAM20");
-    GEL_WatchAdd("*(long *)0x62A8,x","eCANB MOTS20");
-    GEL_WatchAdd("*(long *)0x62E8,x","eCANB MOTO20");
-    GEL_WatchAdd("*(long *)0x63A0,x","eCANB MID20");
-    GEL_WatchAdd("*(long *)0x63A2,x","eCANB MCF20");
-    GEL_WatchAdd("*(long *)0x63A4,x","eCANB MDL20");
-    GEL_WatchAdd("*(long *)0x63A6,x","eCANB MDH20");
-
-    GEL_WatchAdd("*(long *)0x626A,x","eCANB LAM21");
-    GEL_WatchAdd("*(long *)0x62AA,x","eCANB MOTS21");
-    GEL_WatchAdd("*(long *)0x62EA,x","eCANB MOTO21");
-    GEL_WatchAdd("*(long *)0x63A8,x","eCANB MID21");
-    GEL_WatchAdd("*(long *)0x63AA,x","eCANB MCF21");
-    GEL_WatchAdd("*(long *)0x63AC,x","eCANB MDL21");
-    GEL_WatchAdd("*(long *)0x63AE,x","eCANB MDH21");
-}
-hotmenu eCAN_B_Mailbox_22_to_23_Regs()
-{
-    GEL_WatchAdd("*(long *)0x626C,x","eCANB LAM22");
-    GEL_WatchAdd("*(long *)0x62AC,x","eCANB MOTS22");
-    GEL_WatchAdd("*(long *)0x62EC,x","eCANB MOTO22");
-    GEL_WatchAdd("*(long *)0x63B0,x","eCANB MID22");
-    GEL_WatchAdd("*(long *)0x63B2,x","eCANB MCF22");
-    GEL_WatchAdd("*(long *)0x63B4,x","eCANB MDL22");
-    GEL_WatchAdd("*(long *)0x63B6,x","eCANB MDH22");
-
-    GEL_WatchAdd("*(long *)0x626E,x","eCANB LAM23");
-    GEL_WatchAdd("*(long *)0x62AE,x","eCANB MOTS23");
-    GEL_WatchAdd("*(long *)0x62EE,x","eCANB MOTO23");
-    GEL_WatchAdd("*(long *)0x63B8,x","eCANB MID23");
-    GEL_WatchAdd("*(long *)0x63BA,x","eCANB MCF23");
-    GEL_WatchAdd("*(long *)0x63BC,x","eCANB MDL23");
-    GEL_WatchAdd("*(long *)0x63BE,x","eCANB MDH23");
-}
-hotmenu eCAN_B_Mailbox_24_to_25_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6270,x","eCANB LAM24");
-    GEL_WatchAdd("*(long *)0x62B0,x","eCANB MOTS24");
-    GEL_WatchAdd("*(long *)0x62F0,x","eCANB MOTO24");
-    GEL_WatchAdd("*(long *)0x63C0,x","eCANB MID24");
-    GEL_WatchAdd("*(long *)0x63C2,x","eCANB MCF24");
-    GEL_WatchAdd("*(long *)0x63C4,x","eCANB MDL24");
-    GEL_WatchAdd("*(long *)0x63C6,x","eCANB MDH24");
-
-    GEL_WatchAdd("*(long *)0x6272,x","eCANB LAM25");
-    GEL_WatchAdd("*(long *)0x62B2,x","eCANB MOTS25");
-    GEL_WatchAdd("*(long *)0x62F2,x","eCANB MOTO25");
-    GEL_WatchAdd("*(long *)0x63C8,x","eCANB MID25");
-    GEL_WatchAdd("*(long *)0x63CA,x","eCANB MCF25");
-    GEL_WatchAdd("*(long *)0x63CC,x","eCANB MDL25");
-    GEL_WatchAdd("*(long *)0x63CE,x","eCANB MDH25");
-}
-hotmenu eCAN_B_Mailbox_26_to_27_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6274,x","eCANB LAM26");
-    GEL_WatchAdd("*(long *)0x62B4,x","eCANB MOTS26");
-    GEL_WatchAdd("*(long *)0x62F4,x","eCANB MOTO26");
-    GEL_WatchAdd("*(long *)0x63D0,x","eCANB MID26");
-    GEL_WatchAdd("*(long *)0x63D2,x","eCANB MCF26");
-    GEL_WatchAdd("*(long *)0x63D4,x","eCANB MDL26");
-    GEL_WatchAdd("*(long *)0x63D6,x","eCANB MDH26");
-
-    GEL_WatchAdd("*(long *)0x6276,x","eCANB LAM27");
-    GEL_WatchAdd("*(long *)0x62B6,x","eCANB MOTS27");
-    GEL_WatchAdd("*(long *)0x62F6,x","eCANB MOTO27");
-    GEL_WatchAdd("*(long *)0x63D8,x","eCANB MID27");
-    GEL_WatchAdd("*(long *)0x63DA,x","eCANB MCF27");
-    GEL_WatchAdd("*(long *)0x63DC,x","eCANB MDL27");
-    GEL_WatchAdd("*(long *)0x63DE,x","eCANB MDH27");
-}
-hotmenu eCAN_B_Mailbox_28_to_29_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6278,x","eCANB LAM28");
-    GEL_WatchAdd("*(long *)0x62B8,x","eCANB MOTS28");
-    GEL_WatchAdd("*(long *)0x62F8,x","eCANB MOTO28");
-    GEL_WatchAdd("*(long *)0x63E0,x","eCANB MID28");
-    GEL_WatchAdd("*(long *)0x63E2,x","eCANB MCF28");
-    GEL_WatchAdd("*(long *)0x63E4,x","eCANB MDL28");
-    GEL_WatchAdd("*(long *)0x63E6,x","eCANB MDH28");
-
-    GEL_WatchAdd("*(long *)0x627A,x","eCANB LAM29");
-    GEL_WatchAdd("*(long *)0x62BA,x","eCANB MOTS29");
-    GEL_WatchAdd("*(long *)0x62FA,x","eCANB MOTO29");
-    GEL_WatchAdd("*(long *)0x63E8,x","eCANB MID29");
-    GEL_WatchAdd("*(long *)0x63EA,x","eCANB MCF29");
-    GEL_WatchAdd("*(long *)0x63EC,x","eCANB MDL29");
-    GEL_WatchAdd("*(long *)0x63EE,x","eCANB MDH29");
-}
-hotmenu eCAN_B_Mailbox_30_to_31_Regs()
-{
-    GEL_WatchAdd("*(long *)0x627C,x","eCANB LAM30");
-    GEL_WatchAdd("*(long *)0x62BC,x","eCANB MOTS30");
-    GEL_WatchAdd("*(long *)0x62FC,x","eCANB MOTO30");
-    GEL_WatchAdd("*(long *)0x63F0,x","eCANB MID30");
-    GEL_WatchAdd("*(long *)0x63F2,x","eCANB MCF30");
-    GEL_WatchAdd("*(long *)0x63F4,x","eCANB MDL30");
-    GEL_WatchAdd("*(long *)0x63F6,x","eCANB MDH30");
-
-    GEL_WatchAdd("*(long *)0x627E,x","eCANB LAM31");
-    GEL_WatchAdd("*(long *)0x62BE,x","eCANB MOTS31");
-    GEL_WatchAdd("*(long *)0x62FE,x","eCANB MOTO31");
-    GEL_WatchAdd("*(long *)0x63F8,x","eCANB MID31");
-    GEL_WatchAdd("*(long *)0x63FA,x","eCANB MCF31");
-    GEL_WatchAdd("*(long *)0x63FC,x","eCANB MDL31");
-    GEL_WatchAdd("*(long *)0x63FE,x","eCANB MDH31");
-}
-
-
-/********************************************************************/
-/* Enhanced Capture Registers                                       */
-/********************************************************************/
-menuitem "Watch eCAP Registers";
-
-hotmenu eCAP1_All_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6A00,x","eCAP1 TSCNT");
-    GEL_WatchAdd("*(long *)0x6A02,x","eCAP1 CNTPHS");
-    GEL_WatchAdd("*(long *)0x6A04,x","eCAP1 CAP1");
-    GEL_WatchAdd("*(long *)0x6A06,x","eCAP1 CAP2");
-    GEL_WatchAdd("*(long *)0x6A08,x","eCAP1 CAP3");
-    GEL_WatchAdd("*(long *)0x6A0A,x","eCAP1 CAP4");
-    GEL_WatchAdd("*0x6A14,x","eCAP1 ECCTL1");
-    GEL_WatchAdd("*0x6A15,x","eCAP1 ECCTL2");
-    GEL_WatchAdd("*0x6A16,x","eCAP1 ECEINT");
-    GEL_WatchAdd("*0x6A17,x","eCAP1 ECFLG");
-    GEL_WatchAdd("*0x6A18,x","eCAP1 ECCLR");
-    GEL_WatchAdd("*0x6A19,x","eCAP1 ECFRC");
-}
-hotmenu eCAP2_All_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6A20,x","eCAP2 TSCNT");
-    GEL_WatchAdd("*(long *)0x6A22,x","eCAP2 CNTPHS");
-    GEL_WatchAdd("*(long *)0x6A24,x","eCAP2 CAP1");
-    GEL_WatchAdd("*(long *)0x6A26,x","eCAP2 CAP2");
-    GEL_WatchAdd("*(long *)0x6A28,x","eCAP2 CAP3");
-    GEL_WatchAdd("*(long *)0x6A2A,x","eCAP2 CAP4");
-    GEL_WatchAdd("*0x6A34,x","eCAP2 ECCTL1");
-    GEL_WatchAdd("*0x6A35,x","eCAP2 ECCTL2");
-    GEL_WatchAdd("*0x6A36,x","eCAP2 ECEINT");
-    GEL_WatchAdd("*0x6A37,x","eCAP2 ECFLG");
-    GEL_WatchAdd("*0x6A38,x","eCAP2 ECCLR");
-    GEL_WatchAdd("*0x6A39,x","eCAP2 ECFRC");
-}
-hotmenu eCAP3_All_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6A40,x","eCAP3 TSCNT");
-    GEL_WatchAdd("*(long *)0x6A42,x","eCAP3 CNTPHS");
-    GEL_WatchAdd("*(long *)0x6A44,x","eCAP3 CAP1");
-    GEL_WatchAdd("*(long *)0x6A46,x","eCAP3 CAP2");
-    GEL_WatchAdd("*(long *)0x6A48,x","eCAP3 CAP3");
-    GEL_WatchAdd("*(long *)0x6A4A,x","eCAP3 CAP4");
-    GEL_WatchAdd("*0x6A54,x","eCAP3 ECCTL1");
-    GEL_WatchAdd("*0x6A55,x","eCAP3 ECCTL2");
-    GEL_WatchAdd("*0x6A56,x","eCAP3 ECEINT");
-    GEL_WatchAdd("*0x6A57,x","eCAP3 ECFLG");
-    GEL_WatchAdd("*0x6A58,x","eCAP3 ECCLR");
-    GEL_WatchAdd("*0x6A59,x","eCAP3 ECFRC");
-}
-hotmenu eCAP4_All_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6A60,x","eCAP4 TSCNT");
-    GEL_WatchAdd("*(long *)0x6A62,x","eCAP4 CNTPHS");
-    GEL_WatchAdd("*(long *)0x6A64,x","eCAP4 CAP1");
-    GEL_WatchAdd("*(long *)0x6A66,x","eCAP4 CAP2");
-    GEL_WatchAdd("*(long *)0x6A68,x","eCAP4 CAP3");
-    GEL_WatchAdd("*(long *)0x6A6A,x","eCAP4 CAP4");
-    GEL_WatchAdd("*0x6A74,x","eCAP4 ECCTL1");
-    GEL_WatchAdd("*0x6A75,x","eCAP4 ECCTL2");
-    GEL_WatchAdd("*0x6A76,x","eCAP4 ECEINT");
-    GEL_WatchAdd("*0x6A77,x","eCAP4 ECFLG");
-    GEL_WatchAdd("*0x6A78,x","eCAP4 ECCLR");
-    GEL_WatchAdd("*0x6A79,x","eCAP4 ECFRC");
-}
-hotmenu eCAP5_All_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6A80,x","eCAP5 TSCNT");
-    GEL_WatchAdd("*(long *)0x6A82,x","eCAP5 CNTPHS");
-    GEL_WatchAdd("*(long *)0x6A84,x","eCAP5 CAP1");
-    GEL_WatchAdd("*(long *)0x6A86,x","eCAP5 CAP2");
-    GEL_WatchAdd("*(long *)0x6A88,x","eCAP5 CAP3");
-    GEL_WatchAdd("*(long *)0x6A8A,x","eCAP5 CAP4");
-    GEL_WatchAdd("*0x6A94,x","eCAP5 ECCTL1");
-    GEL_WatchAdd("*0x6A95,x","eCAP5 ECCTL2");
-    GEL_WatchAdd("*0x6A96,x","eCAP5 ECEINT");
-    GEL_WatchAdd("*0x6A97,x","eCAP5 ECFLG");
-    GEL_WatchAdd("*0x6A98,x","eCAP5 ECCLR");
-    GEL_WatchAdd("*0x6A99,x","eCAP5 ECFRC");
-}
-hotmenu eCAP6_All_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6AA0,x","eCAP6 TSCNT");
-    GEL_WatchAdd("*(long *)0x6AA2,x","eCAP6 CNTPHS");
-    GEL_WatchAdd("*(long *)0x6AA4,x","eCAP6 CAP1");
-    GEL_WatchAdd("*(long *)0x6AA6,x","eCAP6 CAP2");
-    GEL_WatchAdd("*(long *)0x6AA8,x","eCAP6 CAP3");
-    GEL_WatchAdd("*(long *)0x6AAA,x","eCAP6 CAP4");
-    GEL_WatchAdd("*0x6AB4,x","eCAP6 ECCTL1");
-    GEL_WatchAdd("*0x6AB5,x","eCAP6 ECCTL2");
-    GEL_WatchAdd("*0x6AB6,x","eCAP6 ECEINT");
-    GEL_WatchAdd("*0x6AB7,x","eCAP6 ECFLG");
-    GEL_WatchAdd("*0x6AB8,x","eCAP6 ECCLR");
-    GEL_WatchAdd("*0x6AB9,x","eCAP6 ECFRC");
-}
-
-/********************************************************************/
-/* Enhanced PWM Registers                                           */
-/********************************************************************/
-menuitem "Watch ePWM Registers";
-
-hotmenu ePWM1_All_Regs()
-{
-    GEL_WatchAdd("*0x6800,x","ePWM1 TBCTL");
-    GEL_WatchAdd("*0x6801,x","ePWM1 TBSTS");
-    GEL_WatchAdd("*0x6802,x","ePWM1 TBPHSHR");
-    GEL_WatchAdd("*0x6803,x","ePWM1 TBPHS");
-    GEL_WatchAdd("*0x6804,x","ePWM1 TBCTR");
-    GEL_WatchAdd("*0x6805,x","ePWM1 TBPRD");
-    GEL_WatchAdd("*0x6807,x","ePWM1 CMPCTL");
-    GEL_WatchAdd("*0x6808,x","ePWM1 CMPAHR");
-    GEL_WatchAdd("*0x6809,x","ePWM1 CMPA");
-    GEL_WatchAdd("*0x680A,x","ePWM1 CMPB");
-    GEL_WatchAdd("*0x680B,x","ePWM1 AQCTLA");
-    GEL_WatchAdd("*0x680C,x","ePWM1 AQCTLB");
-    GEL_WatchAdd("*0x680D,x","ePWM1 AQSFRC");
-    GEL_WatchAdd("*0x680E,x","ePWM1 AQCSFRC");
-    GEL_WatchAdd("*0x680F,x","ePWM1 DBCTL");
-    GEL_WatchAdd("*0x6810,x","ePWM1 DBRED");
-    GEL_WatchAdd("*0x6811,x","ePWM1 DBFED");
-    GEL_WatchAdd("*0x6812,x","ePWM1 TZSEL");
-    GEL_WatchAdd("*0x6813,x","ePWM1 TZDCSEL");
-    GEL_WatchAdd("*0x6814,x","ePWM1 TZCTL");
-    GEL_WatchAdd("*0x6815,x","ePWM1 TZEINT");
-    GEL_WatchAdd("*0x6816,x","ePWM1 TZFLG");
-    GEL_WatchAdd("*0x6817,x","ePWM1 TZCLR");
-    GEL_WatchAdd("*0x6818,x","ePWM1 TZFRC");
-    GEL_WatchAdd("*0x6819,x","ePWM1 ETSEL");
-    GEL_WatchAdd("*0x681A,x","ePWM1 ETPS");
-    GEL_WatchAdd("*0x681B,x","ePWM1 ETFLG");
-    GEL_WatchAdd("*0x681C,x","ePWM1 ETCLR");
-    GEL_WatchAdd("*0x681D,x","ePWM1 ETFRC");
-    GEL_WatchAdd("*0x681E,x","ePWM1 PCCTL");
-    GEL_WatchAdd("*0x6820,x","ePWM1 HRCNFG");
-}
-hotmenu ePWM1_TB_Regs()
-{
-    GEL_WatchAdd("*0x6800,x","ePWM1 TBCTL");
-    GEL_WatchAdd("*0x6801,x","ePWM1 TBSTS");
-    GEL_WatchAdd("*0x6802,x","ePWM1 TBPHSHR");
-    GEL_WatchAdd("*0x6803,x","ePWM1 TBPHS");
-    GEL_WatchAdd("*0x6804,x","ePWM1 TBCTR");
-    GEL_WatchAdd("*0x6805,x","ePWM1 TBPRD");
-}
-hotmenu ePWM1_CMP_Regs()
-{
-    GEL_WatchAdd("*0x6807,x","ePWM1 CMPCTL");
-    GEL_WatchAdd("*0x6808,x","ePWM1 CMPAHR");
-    GEL_WatchAdd("*0x6809,x","ePWM1 CMPA");
-    GEL_WatchAdd("*0x680A,x","ePWM1 CMPB");
-}
-hotmenu ePWM1_AQ_Regs()
-{
-    GEL_WatchAdd("*0x680B,x","ePWM1 AQCTLA");
-    GEL_WatchAdd("*0x680C,x","ePWM1 AQCTLB");
-    GEL_WatchAdd("*0x680D,x","ePWM1 AQSFRC");
-    GEL_WatchAdd("*0x680E,x","ePWM1 AQCSFRC");
-}
-hotmenu ePWM1_DB_Regs()
-{
-    GEL_WatchAdd("*0x680F,x","ePWM1 DBCTL");
-    GEL_WatchAdd("*0x6810,x","ePWM1 DBRED");
-    GEL_WatchAdd("*0x6811,x","ePWM1 DBFED");
-}
-hotmenu ePWM1_TZ_Regs()
-{
-    GEL_WatchAdd("*0x6812,x","ePWM1 TZSEL");
-    GEL_WatchAdd("*0x6814,x","ePWM1 TZCTL");
-    GEL_WatchAdd("*0x6815,x","ePWM1 TZEINT");
-    GEL_WatchAdd("*0x6816,x","ePWM1 TZFLG");
-    GEL_WatchAdd("*0x6817,x","ePWM1 TZCLR");
-    GEL_WatchAdd("*0x6818,x","ePWM1 TZFRC");
-}
-hotmenu ePWM1_ET_Regs()
-{
-    GEL_WatchAdd("*0x6819,x","ePWM1 ETSEL");
-    GEL_WatchAdd("*0x681A,x","ePWM1 ETPS");
-    GEL_WatchAdd("*0x681B,x","ePWM1 ETFLG");
-    GEL_WatchAdd("*0x681C,x","ePWM1 ETCLR");
-    GEL_WatchAdd("*0x681D,x","ePWM1 ETFRC");
-}
-hotmenu ePWM2_All_Regs()
-{
-    GEL_WatchAdd("*0x6840,x","ePWM2 TBCTL");
-    GEL_WatchAdd("*0x6841,x","ePWM2 TBSTS");
-    GEL_WatchAdd("*0x6842,x","ePWM2 TBPHSHR");
-    GEL_WatchAdd("*0x6843,x","ePWM2 TBPHS");
-    GEL_WatchAdd("*0x6844,x","ePWM2 TBCTR");
-    GEL_WatchAdd("*0x6845,x","ePWM2 TBPRD");
-    GEL_WatchAdd("*0x6847,x","ePWM2 CMPCTL");
-    GEL_WatchAdd("*0x6848,x","ePWM2 CMPAHR");
-    GEL_WatchAdd("*0x6849,x","ePWM2 CMPA");
-    GEL_WatchAdd("*0x684A,x","ePWM2 CMPB");
-    GEL_WatchAdd("*0x684B,x","ePWM2 AQCTLA");
-    GEL_WatchAdd("*0x684C,x","ePWM2 AQCTLB");
-    GEL_WatchAdd("*0x684D,x","ePWM2 AQSFRC");
-    GEL_WatchAdd("*0x684E,x","ePWM2 AQCSFRC");
-    GEL_WatchAdd("*0x684F,x","ePWM2 DBCTL");
-    GEL_WatchAdd("*0x6850,x","ePWM2 DBRED");
-    GEL_WatchAdd("*0x6851,x","ePWM2 DBFED");
-    GEL_WatchAdd("*0x6852,x","ePWM2 TZSEL");
-    GEL_WatchAdd("*0x6853,x","ePWM2 TZDCSEL");
-    GEL_WatchAdd("*0x6854,x","ePWM2 TZCTL");
-    GEL_WatchAdd("*0x6855,x","ePWM2 TZEINT");
-    GEL_WatchAdd("*0x6856,x","ePWM2 TZFLG");
-    GEL_WatchAdd("*0x6857,x","ePWM2 TZCLR");
-    GEL_WatchAdd("*0x6858,x","ePWM2 TZFRC");
-    GEL_WatchAdd("*0x6859,x","ePWM2 ETSEL");
-    GEL_WatchAdd("*0x685A,x","ePWM2 ETPS");
-    GEL_WatchAdd("*0x685B,x","ePWM2 ETFLG");
-    GEL_WatchAdd("*0x685C,x","ePWM2 ETCLR");
-    GEL_WatchAdd("*0x685D,x","ePWM2 ETFRC");
-    GEL_WatchAdd("*0x685E,x","ePWM2 PCCTL");
-    GEL_WatchAdd("*0x6860,x","ePWM2 HRCNFG");
-}
-hotmenu ePWM2_TB_Regs()
-{
-    GEL_WatchAdd("*0x6840,x","ePWM2 TBCTL");
-    GEL_WatchAdd("*0x6841,x","ePWM2 TBSTS");
-    GEL_WatchAdd("*0x6842,x","ePWM2 TBPHSHR");
-    GEL_WatchAdd("*0x6843,x","ePWM2 TBPHS");
-    GEL_WatchAdd("*0x6844,x","ePWM2 TBCTR");
-    GEL_WatchAdd("*0x6845,x","ePWM2 TBPRD");
-}
-hotmenu ePWM2_CMP_Regs()
-{
-    GEL_WatchAdd("*0x6847,x","ePWM2 CMPCTL");
-    GEL_WatchAdd("*0x6848,x","ePWM2 CMPAHR");
-    GEL_WatchAdd("*0x6849,x","ePWM2 CMPA");
-    GEL_WatchAdd("*0x684A,x","ePWM2 CMPB");
-}
-hotmenu ePWM2_AQ_Regs()
-{
-    GEL_WatchAdd("*0x684B,x","ePWM2 AQCTLA");
-    GEL_WatchAdd("*0x684C,x","ePWM2 AQCTLB");
-    GEL_WatchAdd("*0x684D,x","ePWM2 AQSFRC");
-    GEL_WatchAdd("*0x684E,x","ePWM2 AQCSFRC");
-}
-hotmenu ePWM2_DB_Regs()
-{
-    GEL_WatchAdd("*0x684F,x","ePWM2 DBCTL");
-    GEL_WatchAdd("*0x6850,x","ePWM2 DBRED");
-    GEL_WatchAdd("*0x6851,x","ePWM2 DBFED");
-}
-hotmenu ePWM2_TZ_Regs()
-{
-    GEL_WatchAdd("*0x6852,x","ePWM2 TZSEL");
-    GEL_WatchAdd("*0x6854,x","ePWM2 TZCTL");
-    GEL_WatchAdd("*0x6855,x","ePWM2 TZEINT");
-    GEL_WatchAdd("*0x6856,x","ePWM2 TZFLG");
-    GEL_WatchAdd("*0x6857,x","ePWM2 TZCLR");
-    GEL_WatchAdd("*0x6858,x","ePWM2 TZFRC");
-}
-hotmenu ePWM2_ET_Regs()
-{
-    GEL_WatchAdd("*0x6859,x","ePWM2 ETSEL");
-    GEL_WatchAdd("*0x685A,x","ePWM2 ETPS");
-    GEL_WatchAdd("*0x685B,x","ePWM2 ETFLG");
-    GEL_WatchAdd("*0x685C,x","ePWM2 ETCLR");
-    GEL_WatchAdd("*0x685D,x","ePWM2 ETFRC");
-}
-hotmenu ePWM3_All_Regs()
-{
-    GEL_WatchAdd("*0x6880,x","ePWM3 TBCTL");
-    GEL_WatchAdd("*0x6881,x","ePWM3 TBSTS");
-    GEL_WatchAdd("*0x6882,x","ePWM3 TBPHSHR");
-    GEL_WatchAdd("*0x6883,x","ePWM3 TBPHS");
-    GEL_WatchAdd("*0x6884,x","ePWM3 TBCTR");
-    GEL_WatchAdd("*0x6885,x","ePWM3 TBPRD");
-    GEL_WatchAdd("*0x6887,x","ePWM3 CMPCTL");
-    GEL_WatchAdd("*0x6888,x","ePWM3 CMPAHR");
-    GEL_WatchAdd("*0x6889,x","ePWM3 CMPA");
-    GEL_WatchAdd("*0x688A,x","ePWM3 CMPB");
-    GEL_WatchAdd("*0x688B,x","ePWM3 AQCTLA");
-    GEL_WatchAdd("*0x688C,x","ePWM3 AQCTLB");
-    GEL_WatchAdd("*0x688D,x","ePWM3 AQSFRC");
-    GEL_WatchAdd("*0x688E,x","ePWM3 AQCSFRC");
-    GEL_WatchAdd("*0x688F,x","ePWM3 DBCTL");
-    GEL_WatchAdd("*0x6890,x","ePWM3 DBRED");
-    GEL_WatchAdd("*0x6891,x","ePWM3 DBFED");
-    GEL_WatchAdd("*0x6892,x","ePWM3 TZSEL");
-    GEL_WatchAdd("*0x6893,x","ePWM3 TZDCSEL");
-    GEL_WatchAdd("*0x6894,x","ePWM3 TZCTL");
-    GEL_WatchAdd("*0x6895,x","ePWM3 TZEINT");
-    GEL_WatchAdd("*0x6896,x","ePWM3 TZFLG");
-    GEL_WatchAdd("*0x6897,x","ePWM3 TZCLR");
-    GEL_WatchAdd("*0x6898,x","ePWM3 TZFRC");
-    GEL_WatchAdd("*0x6899,x","ePWM3 ETSEL");
-    GEL_WatchAdd("*0x689A,x","ePWM3 ETPS");
-    GEL_WatchAdd("*0x689B,x","ePWM3 ETFLG");
-    GEL_WatchAdd("*0x689C,x","ePWM3 ETCLR");
-    GEL_WatchAdd("*0x689D,x","ePWM3 ETFRC");
-    GEL_WatchAdd("*0x689E,x","ePWM3 PCCTL");
-    GEL_WatchAdd("*0x68A0,x","ePWM3 HRCNFG");
-}
-hotmenu ePWM3_TB_Regs()
-{
-    GEL_WatchAdd("*0x6880,x","ePWM3 TBCTL");
-    GEL_WatchAdd("*0x6881,x","ePWM3 TBSTS");
-    GEL_WatchAdd("*0x6882,x","ePWM3 TBPHSHR");
-    GEL_WatchAdd("*0x6883,x","ePWM3 TBPHS");
-    GEL_WatchAdd("*0x6884,x","ePWM3 TBCTR");
-    GEL_WatchAdd("*0x6885,x","ePWM3 TBPRD");
-}
-hotmenu ePWM3_CMP_Regs()
-{
-    GEL_WatchAdd("*0x6887,x","ePWM3 CMPCTL");
-    GEL_WatchAdd("*0x6888,x","ePWM3 CMPAHR");
-    GEL_WatchAdd("*0x6889,x","ePWM3 CMPA");
-    GEL_WatchAdd("*0x688A,x","ePWM3 CMPB");
-}
-hotmenu ePWM3_AQ_Regs()
-{
-    GEL_WatchAdd("*0x688B,x","ePWM3 AQCTLA");
-    GEL_WatchAdd("*0x688C,x","ePWM3 AQCTLB");
-    GEL_WatchAdd("*0x688D,x","ePWM3 AQSFRC");
-    GEL_WatchAdd("*0x688E,x","ePWM3 AQCSFRC");
-}
-hotmenu ePWM3_DB_Regs()
-{
-    GEL_WatchAdd("*0x688F,x","ePWM3 DBCTL");
-    GEL_WatchAdd("*0x6890,x","ePWM3 DBRED");
-    GEL_WatchAdd("*0x6891,x","ePWM3 DBFED");
-}
-hotmenu ePWM3_TZ_Regs()
-{
-    GEL_WatchAdd("*0x6892,x","ePWM3 TZSEL");
-    GEL_WatchAdd("*0x6894,x","ePWM3 TZCTL");
-    GEL_WatchAdd("*0x6895,x","ePWM3 TZEINT");
-    GEL_WatchAdd("*0x6896,x","ePWM3 TZFLG");
-    GEL_WatchAdd("*0x6897,x","ePWM3 TZCLR");
-    GEL_WatchAdd("*0x6898,x","ePWM3 TZFRC");
-}
-hotmenu ePWM3_ET_Regs()
-{
-    GEL_WatchAdd("*0x6899,x","ePWM3 ETSEL");
-    GEL_WatchAdd("*0x689A,x","ePWM3 ETPS");
-    GEL_WatchAdd("*0x689B,x","ePWM3 ETFLG");
-    GEL_WatchAdd("*0x689C,x","ePWM3 ETCLR");
-    GEL_WatchAdd("*0x689D,x","ePWM3 ETFRC");
-}
-hotmenu ePWM4_All_Regs()
-{
-    GEL_WatchAdd("*0x68C0,x","ePWM4 TBCTL");
-    GEL_WatchAdd("*0x68C1,x","ePWM4 TBSTS");
-    GEL_WatchAdd("*0x68C2,x","ePWM4 TBPHSHR");
-    GEL_WatchAdd("*0x68C3,x","ePWM4 TBPHS");
-    GEL_WatchAdd("*0x68C4,x","ePWM4 TBCTR");
-    GEL_WatchAdd("*0x68C5,x","ePWM4 TBPRD");
-    GEL_WatchAdd("*0x68C7,x","ePWM4 CMPCTL");
-    GEL_WatchAdd("*0x68C8,x","ePWM4 CMPAHR");
-    GEL_WatchAdd("*0x68C9,x","ePWM4 CMPA");
-    GEL_WatchAdd("*0x68CA,x","ePWM4 CMPB");
-    GEL_WatchAdd("*0x68CB,x","ePWM4 AQCTLA");
-    GEL_WatchAdd("*0x68CC,x","ePWM4 AQCTLB");
-    GEL_WatchAdd("*0x68CD,x","ePWM4 AQSFRC");
-    GEL_WatchAdd("*0x68CE,x","ePWM4 AQCSFRC");
-    GEL_WatchAdd("*0x68CF,x","ePWM4 DBCTL");
-    GEL_WatchAdd("*0x68D0,x","ePWM4 DBRED");
-    GEL_WatchAdd("*0x68D1,x","ePWM4 DBFED");
-    GEL_WatchAdd("*0x68D2,x","ePWM4 TZSEL");
-    GEL_WatchAdd("*0x68D3,x","ePWM4 TZDCSEL");
-    GEL_WatchAdd("*0x68D4,x","ePWM4 TZCTL");
-    GEL_WatchAdd("*0x68D5,x","ePWM4 TZEINT");
-    GEL_WatchAdd("*0x68D6,x","ePWM4 TZFLG");
-    GEL_WatchAdd("*0x68D7,x","ePWM4 TZCLR");
-    GEL_WatchAdd("*0x68D8,x","ePWM4 TZFRC");
-    GEL_WatchAdd("*0x68D9,x","ePWM4 ETSEL");
-    GEL_WatchAdd("*0x68DA,x","ePWM4 ETPS");
-    GEL_WatchAdd("*0x68DB,x","ePWM4 ETFLG");
-    GEL_WatchAdd("*0x68DC,x","ePWM4 ETCLR");
-    GEL_WatchAdd("*0x68DD,x","ePWM4 ETFRC");
-    GEL_WatchAdd("*0x68DE,x","ePWM4 PCCTL");
-    GEL_WatchAdd("*0x68E0,x","ePWM4 HRCNFG");
-}
-hotmenu ePWM4_TB_Regs()
-{
-    GEL_WatchAdd("*0x68C0,x","ePWM4 TBCTL");
-    GEL_WatchAdd("*0x68C1,x","ePWM4 TBSTS");
-    GEL_WatchAdd("*0x68C2,x","ePWM4 TBPHSHR");
-    GEL_WatchAdd("*0x68C3,x","ePWM4 TBPHS");
-    GEL_WatchAdd("*0x68C4,x","ePWM4 TBCTR");
-    GEL_WatchAdd("*0x68C5,x","ePWM4 TBPRD");
-}
-hotmenu ePWM4_CMP_Regs()
-{
-    GEL_WatchAdd("*0x68C7,x","ePWM4 CMPCTL");
-    GEL_WatchAdd("*0x68C8,x","ePWM4 CMPAHR");
-    GEL_WatchAdd("*0x68C9,x","ePWM4 CMPA");
-    GEL_WatchAdd("*0x68CA,x","ePWM4 CMPB");
-}
-hotmenu ePWM4_AQ_Regs()
-{
-    GEL_WatchAdd("*0x68CB,x","ePWM4 AQCTLA");
-    GEL_WatchAdd("*0x68CC,x","ePWM4 AQCTLB");
-    GEL_WatchAdd("*0x68CD,x","ePWM4 AQSFRC");
-    GEL_WatchAdd("*0x68CE,x","ePWM4 AQCSFRC");
-}
-hotmenu ePWM4_DB_Regs()
-{
-    GEL_WatchAdd("*0x68CF,x","ePWM4 DBCTL");
-    GEL_WatchAdd("*0x68D0,x","ePWM4 DBRED");
-    GEL_WatchAdd("*0x68D1,x","ePWM4 DBFED"); 
-}
-hotmenu ePWM4_TZ_Regs()
-{
-    GEL_WatchAdd("*0x68D2,x","ePWM4 TZSEL");
-    GEL_WatchAdd("*0x68D4,x","ePWM4 TZCTL");
-    GEL_WatchAdd("*0x68D5,x","ePWM4 TZEINT");
-    GEL_WatchAdd("*0x68D6,x","ePWM4 TZFLG");
-    GEL_WatchAdd("*0x68D7,x","ePWM4 TZCLR");
-    GEL_WatchAdd("*0x68D8,x","ePWM4 TZFRC");
-}
-hotmenu ePWM4_ET_Regs()
-{
-    GEL_WatchAdd("*0x68D9,x","ePWM4 ETSEL");
-    GEL_WatchAdd("*0x68DA,x","ePWM4 ETPS");
-    GEL_WatchAdd("*0x68DB,x","ePWM4 ETFLG");
-    GEL_WatchAdd("*0x68DC,x","ePWM4 ETCLR");
-    GEL_WatchAdd("*0x68DD,x","ePWM4 ETFRC");
-}
-hotmenu ePWM5_All_Regs()
-{
-    GEL_WatchAdd("*0x6900,x","ePWM5 TBCTL");
-    GEL_WatchAdd("*0x6901,x","ePWM5 TBSTS");
-    GEL_WatchAdd("*0x6902,x","ePWM5 TBPHSHR");
-    GEL_WatchAdd("*0x6903,x","ePWM5 TBPHS");
-    GEL_WatchAdd("*0x6904,x","ePWM5 TBCTR");
-    GEL_WatchAdd("*0x6905,x","ePWM5 TBPRD");
-    GEL_WatchAdd("*0x6907,x","ePWM5 CMPCTL");
-    GEL_WatchAdd("*0x6908,x","ePWM5 CMPAHR");
-    GEL_WatchAdd("*0x6909,x","ePWM5 CMPA");
-    GEL_WatchAdd("*0x690A,x","ePWM5 CMPB");
-    GEL_WatchAdd("*0x690B,x","ePWM5 AQCTLA");
-    GEL_WatchAdd("*0x690C,x","ePWM5 AQCTLB");
-    GEL_WatchAdd("*0x690D,x","ePWM5 AQSFRC");
-    GEL_WatchAdd("*0x690E,x","ePWM5 AQCSFRC");
-    GEL_WatchAdd("*0x690F,x","ePWM5 DBCTL");
-    GEL_WatchAdd("*0x6910,x","ePWM5 DBRED");
-    GEL_WatchAdd("*0x6911,x","ePWM5 DBFED");
-    GEL_WatchAdd("*0x6912,x","ePWM5 TZSEL");
-    GEL_WatchAdd("*0x6913,x","ePWM5 TZDCSEL");
-    GEL_WatchAdd("*0x6914,x","ePWM5 TZCTL");
-    GEL_WatchAdd("*0x6915,x","ePWM5 TZEINT");
-    GEL_WatchAdd("*0x6916,x","ePWM5 TZFLG");
-    GEL_WatchAdd("*0x6917,x","ePWM5 TZCLR");
-    GEL_WatchAdd("*0x6918,x","ePWM5 TZFRC");
-    GEL_WatchAdd("*0x6919,x","ePWM5 ETSEL");
-    GEL_WatchAdd("*0x691A,x","ePWM5 ETPS");
-    GEL_WatchAdd("*0x691B,x","ePWM5 ETFLG");
-    GEL_WatchAdd("*0x691C,x","ePWM5 ETCLR");
-    GEL_WatchAdd("*0x691D,x","ePWM5 ETFRC");
-    GEL_WatchAdd("*0x691E,x","ePWM5 PCCTL");
-    GEL_WatchAdd("*0x6920,x","ePWM5 HRCNFG");
-}
-hotmenu ePWM5_TB_Regs()
-{
-    GEL_WatchAdd("*0x6900,x","ePWM5 TBCTL");
-    GEL_WatchAdd("*0x6901,x","ePWM5 TBSTS");
-    GEL_WatchAdd("*0x6902,x","ePWM5 TBPHSHR");
-    GEL_WatchAdd("*0x6903,x","ePWM5 TBPHS");
-    GEL_WatchAdd("*0x6904,x","ePWM5 TBCTR");
-    GEL_WatchAdd("*0x6905,x","ePWM5 TBPRD");
-}
-hotmenu ePWM5_CMP_Regs()
-{
-    GEL_WatchAdd("*0x6907,x","ePWM5 CMPCTL");
-    GEL_WatchAdd("*0x6908,x","ePWM5 CMPAHR");
-    GEL_WatchAdd("*0x6909,x","ePWM5 CMPA");
-    GEL_WatchAdd("*0x690A,x","ePWM5 CMPB");
-}
-hotmenu ePWM5_AQ_Regs()
-{
-    GEL_WatchAdd("*0x690B,x","ePWM5 AQCTLA");
-    GEL_WatchAdd("*0x690C,x","ePWM5 AQCTLB");
-    GEL_WatchAdd("*0x690D,x","ePWM5 AQSFRC");
-    GEL_WatchAdd("*0x690E,x","ePWM5 AQCSFRC");
-}
-hotmenu ePWM5_DB_Regs()
-{
-    GEL_WatchAdd("*0x690F,x","ePWM5 DBCTL");
-    GEL_WatchAdd("*0x6910,x","ePWM5 DBRED");
-    GEL_WatchAdd("*0x6911,x","ePWM5 DBFED"); 
-}
-hotmenu ePWM5_TZ_Regs()
-{
-    GEL_WatchAdd("*0x6912,x","ePWM5 TZSEL");
-    GEL_WatchAdd("*0x6914,x","ePWM5 TZCTL");
-    GEL_WatchAdd("*0x6915,x","ePWM5 TZEINT");
-    GEL_WatchAdd("*0x6916,x","ePWM5 TZFLG");
-    GEL_WatchAdd("*0x6917,x","ePWM5 TZCLR");
-    GEL_WatchAdd("*0x6918,x","ePWM5 TZFRC");
-}
-hotmenu ePWM5_ET_Regs()
-{
-    GEL_WatchAdd("*0x6919,x","ePWM5 ETSEL");
-    GEL_WatchAdd("*0x691A,x","ePWM5 ETPS");
-    GEL_WatchAdd("*0x691B,x","ePWM5 ETFLG");
-    GEL_WatchAdd("*0x691C,x","ePWM5 ETCLR");
-    GEL_WatchAdd("*0x691D,x","ePWM5 ETFRC");
-}
-hotmenu ePWM6_All_Regs()
-{
-    GEL_WatchAdd("*0x6940,x","ePWM6 TBCTL");
-    GEL_WatchAdd("*0x6941,x","ePWM6 TBSTS");
-    GEL_WatchAdd("*0x6942,x","ePWM6 TBPHSHR");
-    GEL_WatchAdd("*0x6943,x","ePWM6 TBPHS");
-    GEL_WatchAdd("*0x6944,x","ePWM6 TBCTR");
-    GEL_WatchAdd("*0x6945,x","ePWM6 TBPRD");
-    GEL_WatchAdd("*0x6947,x","ePWM6 CMPCTL");
-    GEL_WatchAdd("*0x6948,x","ePWM6 CMPAHR");
-    GEL_WatchAdd("*0x6949,x","ePWM6 CMPA");
-    GEL_WatchAdd("*0x694A,x","ePWM6 CMPB");
-    GEL_WatchAdd("*0x694B,x","ePWM6 AQCTLA");
-    GEL_WatchAdd("*0x694C,x","ePWM6 AQCTLB");
-    GEL_WatchAdd("*0x694D,x","ePWM6 AQSFRC");
-    GEL_WatchAdd("*0x694E,x","ePWM6 AQCSFRC");
-    GEL_WatchAdd("*0x694F,x","ePWM6 DBCTL");
-    GEL_WatchAdd("*0x6950,x","ePWM6 DBRED");
-    GEL_WatchAdd("*0x6951,x","ePWM6 DBFED");
-    GEL_WatchAdd("*0x6952,x","ePWM6 TZSEL");
-    GEL_WatchAdd("*0x6953,x","ePWM6 TZDCSEL");
-    GEL_WatchAdd("*0x6954,x","ePWM6 TZCTL");
-    GEL_WatchAdd("*0x6955,x","ePWM6 TZEINT");
-    GEL_WatchAdd("*0x6956,x","ePWM6 TZFLG");
-    GEL_WatchAdd("*0x6957,x","ePWM6 TZCLR");
-    GEL_WatchAdd("*0x6958,x","ePWM6 TZFRC");
-    GEL_WatchAdd("*0x6959,x","ePWM6 ETSEL");
-    GEL_WatchAdd("*0x695A,x","ePWM6 ETPS");
-    GEL_WatchAdd("*0x695B,x","ePWM6 ETFLG");
-    GEL_WatchAdd("*0x695C,x","ePWM6 ETCLR");
-    GEL_WatchAdd("*0x695D,x","ePWM6 ETFRC");
-    GEL_WatchAdd("*0x695E,x","ePWM6 PCCTL");
-    GEL_WatchAdd("*0x6960,x","ePWM6 HRCNFG");
-
-}
-hotmenu ePWM6_TB_Regs()
-{
-    GEL_WatchAdd("*0x6940,x","ePWM6 TBCTL");
-    GEL_WatchAdd("*0x6941,x","ePWM6 TBSTS");
-    GEL_WatchAdd("*0x6942,x","ePWM6 TBPHSHR");
-    GEL_WatchAdd("*0x6943,x","ePWM6 TBPHS");
-    GEL_WatchAdd("*0x6944,x","ePWM6 TBCTR");
-    GEL_WatchAdd("*0x6945,x","ePWM6 TBPRD");
-}
-hotmenu ePWM6_CMP_Regs()
-{
-    GEL_WatchAdd("*0x6947,x","ePWM6 CMPCTL");
-    GEL_WatchAdd("*0x6948,x","ePWM6 CMPAHR");
-    GEL_WatchAdd("*0x6949,x","ePWM6 CMPA");
-    GEL_WatchAdd("*0x694A,x","ePWM6 CMPB");
-}
-hotmenu ePWM6_AQ_Regs()
-{
-    GEL_WatchAdd("*0x694B,x","ePWM6 AQCTLA");
-    GEL_WatchAdd("*0x694C,x","ePWM6 AQCTLB");
-    GEL_WatchAdd("*0x694D,x","ePWM6 AQSFRC");
-    GEL_WatchAdd("*0x694E,x","ePWM6 AQCSFRC");
-}
-hotmenu ePWM6_DB_Regs()
-{
-    GEL_WatchAdd("*0x694F,x","ePWM6 DBCTL");
-    GEL_WatchAdd("*0x6950,x","ePWM6 DBRED");
-    GEL_WatchAdd("*0x6951,x","ePWM6 DBFED");
-}
-hotmenu ePWM6_TZ_Regs()
-{
-    GEL_WatchAdd("*0x6952,x","ePWM6 TZSEL");
-    GEL_WatchAdd("*0x6954,x","ePWM6 TZCTL");
-    GEL_WatchAdd("*0x6955,x","ePWM6 TZEINT");
-    GEL_WatchAdd("*0x6956,x","ePWM6 TZFLG");
-    GEL_WatchAdd("*0x6957,x","ePWM6 TZCLR");
-    GEL_WatchAdd("*0x6958,x","ePWM6 TZFRC");
-}
-hotmenu ePWM6_ET_Regs()
-{
-    GEL_WatchAdd("*0x6959,x","ePWM6 ETSEL");
-    GEL_WatchAdd("*0x695A,x","ePWM6 ETPS");
-    GEL_WatchAdd("*0x695B,x","ePWM6 ETFLG");
-    GEL_WatchAdd("*0x695C,x","ePWM6 ETCLR");
-    GEL_WatchAdd("*0x695D,x","ePWM6 ETFRC");
-}
-
-
-/********************************************************************/
-/* Enhanced EQEP Registers                                          */
-/********************************************************************/
-menuitem "Watch eQEP"
-
-hotmenu eQEP1_All_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6B00,x","eQEP1 QPOSCNT");
-    GEL_WatchAdd("*(long *)0x6B02,x","eQEP1 QPOSINIT");
-    GEL_WatchAdd("*(long *)0x6B04,x","eQEP1 QPOSMAX");
-    GEL_WatchAdd("*(long *)0x6B06,x","eQEP1 QPOSCMP");
-    GEL_WatchAdd("*(long *)0x6B08,x","eQEP1 QPOSILAT");
-    GEL_WatchAdd("*(long *)0x6B0A,x","eQEP1 QPOSSLAT");
-    GEL_WatchAdd("*(long *)0x6B0C,x","eQEP1 QPOSLAT");
-    GEL_WatchAdd("*(long *)0x6B0E,x","eQEP1 QUTMR");
-    GEL_WatchAdd("*(long *)0x6B10,x","eQEP1 QUPRD");
-    GEL_WatchAdd("*0x6B12,x","eQEP1 QWDTMR");
-    GEL_WatchAdd("*0x6B13,x","eQEP1 QWDPRD");
-    GEL_WatchAdd("*0x6B14,x","eQEP1 QDECCTL");
-    GEL_WatchAdd("*0x6B15,x","eQEP1 QEPCTL");
-    GEL_WatchAdd("*0x6B16,x","eQEP1 QCAPCTL");
-    GEL_WatchAdd("*0x6B17,x","eQEP1 QPOSCTL");
-    GEL_WatchAdd("*0x6B18,x","eQEP1 QEINT");
-    GEL_WatchAdd("*0x6B19,x","eQEP1 QFLG");
-    GEL_WatchAdd("*0x6B1A,x","eQEP1 QCLR");
-    GEL_WatchAdd("*0x6B1B,x","eQEP1 QFRC");
-    GEL_WatchAdd("*0x6B1C,x","eQEP1 QEPSTS");
-    GEL_WatchAdd("*0x6B1D,x","eQEP1 QCTMR");
-    GEL_WatchAdd("*0x6B1E,x","eQEP1 QCPRD");
-    GEL_WatchAdd("*0x6B1F,x","eQEP1 QCTMRLAT");
-    GEL_WatchAdd("*0x6B20,x","eQEP1 QCPRDLAT");
-}
-hotmenu eQEP2_All_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6B40,x","eQEP2 QPOSCNT");
-    GEL_WatchAdd("*(long *)0x6B42,x","eQEP2 QPOSINIT");
-    GEL_WatchAdd("*(long *)0x6B44,x","eQEP2 QPOSMAX");
-    GEL_WatchAdd("*(long *)0x6B46,x","eQEP2 QPOSCMP");
-    GEL_WatchAdd("*(long *)0x6B48,x","eQEP2 QPOSILAT");
-    GEL_WatchAdd("*(long *)0x6B4A,x","eQEP2 QPOSSLAT");
-    GEL_WatchAdd("*(long *)0x6B4C,x","eQEP2 QPOSLAT");
-    GEL_WatchAdd("(long *)*0x6B4E,x","eQEP2 QUTMR");
-    GEL_WatchAdd("*(long *)0x6B50,x","eQEP2 QUPRD");
-    GEL_WatchAdd("*0x6B52,x","eQEP2 QWDTMR");
-    GEL_WatchAdd("*0x6B53,x","eQEP2 QWDPRD");
-    GEL_WatchAdd("*0x6B54,x","eQEP2 QDECCTL");
-    GEL_WatchAdd("*0x6B55,x","eQEP2 QEPCTL");
-    GEL_WatchAdd("*0x6B56,x","eQEP2 QCAPCTL");
-    GEL_WatchAdd("*0x6B57,x","eQEP2 QPOSCTL");
-    GEL_WatchAdd("*0x6B58,x","eQEP2 QEINT");
-    GEL_WatchAdd("*0x6B59,x","eQEP2 QFLG");
-    GEL_WatchAdd("*0x6B5A,x","eQEP2 QCLR");
-    GEL_WatchAdd("*0x6B5B,x","eQEP2 QFRC");
-    GEL_WatchAdd("*0x6B5C,x","eQEP2 QEPSTS");
-    GEL_WatchAdd("*0x6B5D,x","eQEP2 QCTMR");
-    GEL_WatchAdd("*0x6B5E,x","eQEP2 QCPRD");
-    GEL_WatchAdd("*0x6B5F,x","eQEP2 QCTMRLAT");
-    GEL_WatchAdd("*0x6B60,x","eQEP2 QCPRDLAT");
-}
-
-
-/********************************************************************/
-/* External Interface Registers                                     */
-/********************************************************************/
-menuitem "Watch External Interface Registers";
-
-hotmenu All_External_Interface_Regs()
-{
-    GEL_WatchAdd("*(long *)0x0B20,x","XTIMING0");
-    GEL_WatchAdd("*(long *)0x0B2C,x","XTIMING6");
-    GEL_WatchAdd("*(long *)0x0B2E,x","XTIMING7");
-    GEL_WatchAdd("*(long *)0x0B34,x","XINTCNF2");
-    GEL_WatchAdd("*0x0B38,x","XBANK");
-    GEL_WatchAdd("*0x0B3A,x","XREVISION");
-    GEL_WatchAdd("*0x0B3D,x","XRESET");
-}
-
-/********************************************************************/
-/* External Interrupt Registers                                     */
-/********************************************************************/
-menuitem "Watch External Interrupt Registers";
-
-hotmenu All_XINT_Regs()
-{
-    GEL_WatchAdd("*0x7070,x","XINT1CR");
-    GEL_WatchAdd("*0x7071,x","XINT2CR");
-    GEL_WatchAdd("*0x7072,x","XINT3CR");
-    GEL_WatchAdd("*0x7073,x","XINT4CR");
-    GEL_WatchAdd("*0x7074,x","XINT5CR");
-    GEL_WatchAdd("*0x7075,x","XINT6CR");
-    GEL_WatchAdd("*0x7076,x","XINT7CR");
-    GEL_WatchAdd("*0x7077,x","XNMICR");
-    GEL_WatchAdd("*0x7078,x","XINT1CTR");
-    GEL_WatchAdd("*0x7079,x","XINT2CTR");
-    GEL_WatchAdd("*0x707F,x","XNMICTR");
-}
-hotmenu XINT_Control_Regs()
-{
-    GEL_WatchAdd("*0x7070,x","XINT1CR");
-    GEL_WatchAdd("*0x7071,x","XINT2CR");
-    GEL_WatchAdd("*0x7072,x","XINT3CR");
-    GEL_WatchAdd("*0x7073,x","XINT4CR");
-    GEL_WatchAdd("*0x7074,x","XINT5CR");
-    GEL_WatchAdd("*0x7075,x","XINT6CR");
-    GEL_WatchAdd("*0x7076,x","XINT7CR");
-    GEL_WatchAdd("*0x7077,x","XNMICR");
-}
-hotmenu XINT_Counter_Regs()
-{
-    GEL_WatchAdd("*0x7078,x","XINT1CTR");
-    GEL_WatchAdd("*0x7079,x","XINT2CTR");
-    GEL_WatchAdd("*0x707F,x","XNMICTR");
-}
-
-
-/********************************************************************/
-/* GPIO Registers                                                   */
-/********************************************************************/
-menuitem "Watch GPIO Registers";
-
-hotmenu All_GPIO_CONTROL_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6F80,x","GPACTRL");
-    GEL_WatchAdd("*(long *)0x6F82,x","GPAQSEL1");
-    GEL_WatchAdd("*(long *)0x6F84,x","GPAQSEL2");
-    GEL_WatchAdd("*(long *)0x6F86,x","GPAMUX1");
-    GEL_WatchAdd("*(long *)0x6F88,x","GPAMUX2");
-    GEL_WatchAdd("*(long *)0x6F8A,x","GPADIR");
-    GEL_WatchAdd("*(long *)0x6F8C,x","GPAPUD");
-
-    GEL_WatchAdd("*(long *)0x6F90,x","GPBCTRL");
-    GEL_WatchAdd("*(long *)0x6F92,x","GPBQSEL1");
-    GEL_WatchAdd("*(long *)0x6F94,x","GPBQSEL2");
-    GEL_WatchAdd("*(long *)0x6F96,x","GPBMUX1");
-    GEL_WatchAdd("*(long *)0x6F98,x","GPBMUX2");
-    GEL_WatchAdd("*(long *)0x6F9A,x","GPBDIR");
-    GEL_WatchAdd("*(long *)0x6F9C,x","GPBPUD");
-
-    GEL_WatchAdd("*(long *)0x6FA6,x","GPCMUX1");
-    GEL_WatchAdd("*(long *)0x6FA8,x","GPCMUX2");
-    GEL_WatchAdd("*(long *)0x6FAA,x","GPCDIR");
-    GEL_WatchAdd("*(long *)0x6FAC,x","GPCPUD");
-}
-hotmenu All_GPIO_DATA_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6FC0,x","GPADAT");
-    GEL_WatchAdd("*(long *)0x6FC2,x","GPASET");
-    GEL_WatchAdd("*(long *)0x6FC4,x","GPACLEAR");
-    GEL_WatchAdd("*(long *)0x6FC6,x","GPATOGGLE");
-    
-    GEL_WatchAdd("*(long *)0x6FC8,x","GPBDAT");
-    GEL_WatchAdd("*(long *)0x6FCA,x","GPBSET");
-    GEL_WatchAdd("*(long *)0x6FCC,x","GPBCLEAR");
-    GEL_WatchAdd("*(long *)0x6FCE,x","GPBTOGGLE");
-
-    GEL_WatchAdd("*(long *)0x6FD0,x","GPCDAT");
-    GEL_WatchAdd("*(long *)0x6FD2,x","GPCSET");
-    GEL_WatchAdd("*(long *)0x6FD4,x","GPCCLEAR");
-    GEL_WatchAdd("*(long *)0x6FD6,x","GPCTOGGLE");
-}
-hotmenu All_GPIO_INTERRUPT_Regs()
-{
-    GEL_WatchAdd("*0x6FE0,x","GPIOXINT1SEL");
-    GEL_WatchAdd("*0x6FE1,x","GPIOXINT2SEL");
-    GEL_WatchAdd("*0x6FE2,x","GPIOXNMISEL");
-    GEL_WatchAdd("*0x6FE3,x","GPIOXINT3SEL");
-    GEL_WatchAdd("*0x6FE4,x","GPIOXINT4SEL");
-    GEL_WatchAdd("*0x6FE5,x","GPIOXINT5SEL");
-    GEL_WatchAdd("*0x6FE6,x","GPIOXINT6SEL");
-    GEL_WatchAdd("*0x6FE7,x","GPIOXINT7SEL");
-    GEL_WatchAdd("*(long *)0x6FE8,x","GPIOLPMSEL");
-}
-hotmenu All_GPA_Registers()
-{
-    GEL_WatchAdd("*(long *)0x6F80,x","GPACTRL");
-    GEL_WatchAdd("*(long *)0x6F82,x","GPAQSEL1");
-    GEL_WatchAdd("*(long *)0x6F84,x","GPAQSEL2");
-    GEL_WatchAdd("*(long *)0x6F86,x","GPAMUX1");
-    GEL_WatchAdd("*(long *)0x6F88,x","GPAMUX2");
-    GEL_WatchAdd("*(long *)0x6F8A,x","GPADIR");
-    GEL_WatchAdd("*(long *)0x6F8C,x","GPAPUD");
-    
-    GEL_WatchAdd("*(long *)0x6FC0,x","GPADAT");
-    GEL_WatchAdd("*(long *)0x6FC2,x","GPASET");
-    GEL_WatchAdd("*(long *)0x6FC4,x","GPACLEAR");
-    GEL_WatchAdd("*(long *)0x6FC6,x","GPATOGGLE");
-}
-hotmenu All_GPB_Registers()
-{
-    GEL_WatchAdd("*(long *)0x6F90,x","GPBCTRL");
-    GEL_WatchAdd("*(long *)0x6F92,x","GPBQSEL1");
-    GEL_WatchAdd("*(long *)0x6F94,x","GPBQSEL2");
-    GEL_WatchAdd("*(long *)0x6F96,x","GPBMUX1");
-    GEL_WatchAdd("*(long *)0x6F98,x","GPBMUX2");
-    GEL_WatchAdd("*(long *)0x6F9A,x","GPBDIR");
-    GEL_WatchAdd("*(long *)0x6F9C,x","GPBPUD");
-
-    GEL_WatchAdd("*(long *)0x6FC8,x","GPBDAT");
-    GEL_WatchAdd("*(long *)0x6FCA,x","GPBSET");
-    GEL_WatchAdd("*(long *)0x6FCC,x","GPBCLEAR");
-    GEL_WatchAdd("*(long *)0x6FCE,x","GPBTOGGLE");
-}
-hotmenu All_GPC_Registers()
-{
-    GEL_WatchAdd("*(long *)0x6FA6,x","GPCMUX1");
-    GEL_WatchAdd("*(long *)0x6FA8,x","GPCMUX2");
-    GEL_WatchAdd("*(long *)0x6FAA,x","GPCDIR");
-    GEL_WatchAdd("*(long *)0x6FAC,x","GPCPUD");
-
-    GEL_WatchAdd("*(long *)0x6FC8,x","GPBDAT");
-    GEL_WatchAdd("*(long *)0x6FCA,x","GPBSET");
-    GEL_WatchAdd("*(long *)0x6FCC,x","GPBCLEAR");
-    GEL_WatchAdd("*(long *)0x6FCE,x","GPBTOGGLE");
-
-    GEL_WatchAdd("*(long *)0x6FD0,x","GPCDAT");
-    GEL_WatchAdd("*(long *)0x6FD2,x","GPCSET");
-    GEL_WatchAdd("*(long *)0x6FD4,x","GPCCLEAR");
-    GEL_WatchAdd("*(long *)0x6FD6,x","GPCTOGGLE");
-}
-
-
-/********************************************************************/
-/* Multichannel Serial Port Registers                               */
-/********************************************************************/
-menuitem "Watch McBSP Registers";
-
-hotmenu All_McBSP_A_Regs()
-{
-    GEL_WatchAdd("*0x5000,x","McBSPA DRR2");
-    GEL_WatchAdd("*0x5001,x","McBSPA DRR1");
-    GEL_WatchAdd("*0x5002,x","McBSPA DXR2");
-    GEL_WatchAdd("*0x5003,x","McBSPA DXR1");
-    GEL_WatchAdd("*0x5004,x","McBSPA SPCR2");
-    GEL_WatchAdd("*0x5005,x","McBSPA SPCR1");
-    GEL_WatchAdd("*0x5006,x","McBSPA RCR2");
-    GEL_WatchAdd("*0x5007,x","McBSPA RCR1");
-    GEL_WatchAdd("*0x5008,x","McBSPA XCR2");
-    GEL_WatchAdd("*0x5009,x","McBSPA XCR1");
-    GEL_WatchAdd("*0x500A,x","McBSPA SRGR2");
-    GEL_WatchAdd("*0x500B,x","McBSPA SRGR1");
-    GEL_WatchAdd("*0x500C,x","McBSPA MCR2");
-    GEL_WatchAdd("*0x500D,x","McBSPA MCR1");
-    GEL_WatchAdd("*0x500E,x","McBSPA RCERA");
-    GEL_WatchAdd("*0x500F,x","McBSPA RCERB");
-    GEL_WatchAdd("*0x5010,x","McBSPA XCERA");
-    GEL_WatchAdd("*0x5011,x","McBSPA XCERB");
-    GEL_WatchAdd("*0x5012,x","McBSPA PCR1");
-    GEL_WatchAdd("*0x5013,x","McBSPA RCERC");
-    GEL_WatchAdd("*0x5014,x","McBSPA RCERD");
-    GEL_WatchAdd("*0x5015,x","McBSPA XCERC");
-    GEL_WatchAdd("*0x5016,x","McBSPA XCERD");
-    GEL_WatchAdd("*0x5017,x","McBSPA RCERE");
-    GEL_WatchAdd("*0x5018,x","McBSPA RCERF");
-    GEL_WatchAdd("*0x5019,x","McBSPA XCERE");
-    GEL_WatchAdd("*0x501A,x","McBSPA XCERF");
-    GEL_WatchAdd("*0x501B,x","McBSPA RCERG");
-    GEL_WatchAdd("*0x501C,x","McBSPA RCERH");
-    GEL_WatchAdd("*0x501D,x","McBSPA XCERG");
-    GEL_WatchAdd("*0x501E,x","McBSPA XCERH");
-    GEL_WatchAdd("*0x5023,x","McBSPA MFFINT");
-    GEL_WatchAdd("*0x503F,x","McBSPA Revision");
-}
-
-hotmenu All_McBSP_B_Regs()
-{
-    GEL_WatchAdd("*0x5040,x","McBSPB DRR2");
-    GEL_WatchAdd("*0x5041,x","McBSPB DRR1");
-    GEL_WatchAdd("*0x5042,x","McBSPB DXR2");
-    GEL_WatchAdd("*0x5043,x","McBSPB DXR1");
-    GEL_WatchAdd("*0x5044,x","McBSPB SPCR2");
-    GEL_WatchAdd("*0x5045,x","McBSPB SPCR1");
-    GEL_WatchAdd("*0x5046,x","McBSPB RCR2");
-    GEL_WatchAdd("*0x5047,x","McBSPB RCR1");
-    GEL_WatchAdd("*0x5048,x","McBSPB XCR2");
-    GEL_WatchAdd("*0x5049,x","McBSPB XCR1");
-    GEL_WatchAdd("*0x504A,x","McBSPB SRGR2");
-    GEL_WatchAdd("*0x504B,x","McBSPB SRGR1");
-    GEL_WatchAdd("*0x504C,x","McBSPB MCR2");
-    GEL_WatchAdd("*0x504D,x","McBSPB MCR1");
-    GEL_WatchAdd("*0x504E,x","McBSPB RCERA");
-    GEL_WatchAdd("*0x504F,x","McBSPB RCERB");
-    GEL_WatchAdd("*0x5050,x","McBSPB XCERA");
-    GEL_WatchAdd("*0x5051,x","McBSPB XCERB");
-    GEL_WatchAdd("*0x5052,x","McBSPB PCR1");
-    GEL_WatchAdd("*0x5053,x","McBSPB RCERC");
-    GEL_WatchAdd("*0x5054,x","McBSPB RCERD");
-    GEL_WatchAdd("*0x5055,x","McBSPB XCERC");
-    GEL_WatchAdd("*0x5056,x","McBSPB XCERD");
-    GEL_WatchAdd("*0x5057,x","McBSPB RCERE");
-    GEL_WatchAdd("*0x5058,x","McBSPB RCERF");
-    GEL_WatchAdd("*0x5059,x","McBSPB XCERE");
-    GEL_WatchAdd("*0x505A,x","McBSPB XCERF");
-    GEL_WatchAdd("*0x505B,x","McBSPB RCERG");
-    GEL_WatchAdd("*0x505C,x","McBSPB RCERH");
-    GEL_WatchAdd("*0x505D,x","McBSPB XCERG");
-    GEL_WatchAdd("*0x505E,x","McBSPB XCERH");
-    GEL_WatchAdd("*0x5063,x","McBSPB MFFINT");
-    GEL_WatchAdd("*0x506F,x","McBSPB Revision");
-}
-
-
-
-/********************************************************************/
-/* I2C Registers                                                    */
-/********************************************************************/
-menuitem "Watch I2C Registers";
-
-hotmenu All_I2C_Regs()
-{
-    GEL_WatchAdd("*0x7900,x","I2COAR");
-    GEL_WatchAdd("*0x7901,x","I2CIER");
-    GEL_WatchAdd("*0x7902,x","I2CSTR");
-    GEL_WatchAdd("*0x7903,x","I2CCLKL");
-    GEL_WatchAdd("*0x7904,x","I2CCLKH");
-    GEL_WatchAdd("*0x7905,x","I2CCNT");
-    GEL_WatchAdd("*0x7906,x","I2CDRR");
-    GEL_WatchAdd("*0x7907,x","I2CSAR");
-    GEL_WatchAdd("*0x7908,x","I2CDXR");
-    GEL_WatchAdd("*0x7909,x","I2CMDR");
-    GEL_WatchAdd("*0x790A,x","I2CISRC");
-    GEL_WatchAdd("*0x790C,x","I2CPSC");
-    GEL_WatchAdd("*0x7920,x","I2CFFTX");
-    GEL_WatchAdd("*0x7921,x","I2CFFRX");
-}
-
-
-/********************************************************************/
-/* Peripheral Interrupt Expansion Registers                         */
-/********************************************************************/
-menuitem "Watch Peripheral Interrupt Expansion Registers";
-
-hotmenu All_PIE_Regs()
-{
-    GEL_WatchAdd("*0x0CE0,x","PIECTRL");
-    GEL_WatchAdd("*0x0CE1,x","PIEACK");
-    GEL_WatchAdd("*0x0CE2,x","PIEIER1");
-    GEL_WatchAdd("*0x0CE3,x","PIEIFR1");
-    GEL_WatchAdd("*0x0CE4,x","PIEIER2");
-    GEL_WatchAdd("*0x0CE5,x","PIEIFR2");
-    GEL_WatchAdd("*0x0CE6,x","PIEIER3");
-    GEL_WatchAdd("*0x0CE7,x","PIEIFR3");
-    GEL_WatchAdd("*0x0CE8,x","PIEIER4");
-    GEL_WatchAdd("*0x0CE9,x","PIEIFR4");
-    GEL_WatchAdd("*0x0CEA,x","PIEIER5");
-    GEL_WatchAdd("*0x0CEB,x","PIEIFR5");
-    GEL_WatchAdd("*0x0CEC,x","PIEIER6");
-    GEL_WatchAdd("*0x0CED,x","PIEIFR6");
-    GEL_WatchAdd("*0x0CEE,x","PIEIER7");
-    GEL_WatchAdd("*0x0CEF,x","PIEIFR7");
-    GEL_WatchAdd("*0x0CF0,x","PIEIER8");
-    GEL_WatchAdd("*0x0CF1,x","PIEIFR8");
-    GEL_WatchAdd("*0x0CF2,x","PIEIER9");
-    GEL_WatchAdd("*0x0CF3,x","PIEIFR9");
-    GEL_WatchAdd("*0x0CF4,x","PIEIER10");
-    GEL_WatchAdd("*0x0CF5,x","PIEIFR10");
-    GEL_WatchAdd("*0x0CF6,x","PIEIER11");
-    GEL_WatchAdd("*0x0CF7,x","PIEIFR11");
-    GEL_WatchAdd("*0x0CF8,x","PIEIER12");
-    GEL_WatchAdd("*0x0CF9,x","PIEIFR12");
-}
-hotmenu PIECTRL()
-{
-    GEL_WatchAdd("*0x0CE0,x","PIECTRL");
-}
-hotmenu PIEACK()
-{
-    GEL_WatchAdd("*0x0CE1,x","PIEACK");
-}
-hotmenu PIEIER1_and_PIEIFR1()
-{
-    GEL_WatchAdd("*0x0CE2,x","PIEIER1");
-    GEL_WatchAdd("*0x0CE3,x","PIEIFR1");
-}
-hotmenu PIEIER2_and_PIEIFR2()
-{
-    GEL_WatchAdd("*0x0CE4,x","PIEIER2");
-    GEL_WatchAdd("*0x0CE5,x","PIEIFR2");
-}
-hotmenu PIEIER3_and_PIEIFR3()
-{
-    GEL_WatchAdd("*0x0CE6,x","PIEIER3");
-    GEL_WatchAdd("*0x0CE7,x","PIEIFR3");
-}
-hotmenu PIEIER4_and_PIEIFR4()
-{
-    GEL_WatchAdd("*0x0CE8,x","PIEIER4");
-    GEL_WatchAdd("*0x0CE9,x","PIEIFR4");
-}
-hotmenu PIEIER5_and_PIEIFR5()
-{
-    GEL_WatchAdd("*0x0CEA,x","PIEIER5");
-    GEL_WatchAdd("*0x0CEB,x","PIEIFR5");
-}
-hotmenu PIEIER6_and_PIEIFR6()
-{
-    GEL_WatchAdd("*0x0CEC,x","PIEIER6");
-    GEL_WatchAdd("*0x0CED,x","PIEIFR6");
-}
-hotmenu PIEIER7_and_PIEIFR7()
-{
-    GEL_WatchAdd("*0x0CEE,x","PIEIER7");
-    GEL_WatchAdd("*0x0CEF,x","PIEIFR7");
-}
-hotmenu PIEIER8_and_PIEIFR8()
-{
-    GEL_WatchAdd("*0x0CF0,x","PIEIER8");
-    GEL_WatchAdd("*0x0CF1,x","PIEIFR8");
-}
-hotmenu PIEIER9_and_PIEIFR9()
-{
-    GEL_WatchAdd("*0x0CF2,x","PIEIER9");
-    GEL_WatchAdd("*0x0CF3,x","PIEIFR9");
-}
-hotmenu PIEIFR10_and_PIEIFR10()
-{
-    GEL_WatchAdd("*0x0CF4,x","PIEIER10");
-    GEL_WatchAdd("*0x0CF5,x","PIEIFR10");
-}
-hotmenu PIEIER11_and_PIEIFR11()
-{
-    GEL_WatchAdd("*0x0CF6,x","PIEIER11");
-    GEL_WatchAdd("*0x0CF7,x","PIEIFR11");
-}
-hotmenu PIEIER12_and_PIEIFR12()
-{
-    GEL_WatchAdd("*0x0CF8,x","PIEIER12");
-    GEL_WatchAdd("*0x0CF9,x","PIEIFR12");
-}
-
-
-/********************************************************************/
-/* Serial Communication Interface Registers                         */
-/********************************************************************/
-menuitem "Watch SCI Registers";
-
-hotmenu SCI_A_All_Regs()
-{
-    GEL_WatchAdd("*0x7050,x","SCICCRA");
-    GEL_WatchAdd("*0x7051,x","SCICTL1A");
-    GEL_WatchAdd("*0x7052,x","SCIHBAUDA");
-    GEL_WatchAdd("*0x7053,x","SCILBAUDA");
-    GEL_WatchAdd("*0x7054,x","SCICTL2A");
-    GEL_WatchAdd("*0x7055,x","SCIRXSTA");
-    GEL_WatchAdd("*0x7056,x","SCIRXEMUA");
-    GEL_WatchAdd("*0x7057,x","SCIRXBUFA");
-    GEL_WatchAdd("*0x7059,x","SCITXBUFA");
-    GEL_WatchAdd("*0x705A,x","SCIFFTXA");
-    GEL_WatchAdd("*0x705B,x","SCIFFRXA");
-    GEL_WatchAdd("*0x705C,x","SCIFFCTA");
-    GEL_WatchAdd("*0x705F,x","SCIPRIA");
-}
-hotmenu SCI_A_FIFO_Registers()
-{
-    GEL_WatchAdd("*0x705A,x","SCIFFTXA");
-    GEL_WatchAdd("*0x705B,x","SCIFFRXA");
-    GEL_WatchAdd("*0x705C,x","SCIFFCTA");
-}
-hotmenu SCI_B_All_Regs()
-{
-    GEL_WatchAdd("*0x7750,x","SCICCRB");
-    GEL_WatchAdd("*0x7751,x","SCICTL1B");
-    GEL_WatchAdd("*0x7752,x","SCIHBAUDB");
-    GEL_WatchAdd("*0x7753,x","SCILBAUDB");
-    GEL_WatchAdd("*0x7754,x","SCICTL2B");
-    GEL_WatchAdd("*0x7755,x","SCIRXSTB");
-    GEL_WatchAdd("*0x7756,x","SCIRXEMUB");
-    GEL_WatchAdd("*0x7757,x","SCIRXBUFB");
-    GEL_WatchAdd("*0x7759,x","SCITXBUFB");
-    GEL_WatchAdd("*0x775A,x","SCIFFTXB");
-    GEL_WatchAdd("*0x775B,x","SCIFFRXB");
-    GEL_WatchAdd("*0x775C,x","SCIFFCTB");
-    GEL_WatchAdd("*0x775F,x","SCIPRIB");
-}
-
-hotmenu SCI_B_FIFO_Registers()
-{
-    GEL_WatchAdd("*0x775A,x","SCIFFTXB");
-    GEL_WatchAdd("*0x775B,x","SCIFFRXB");
-    GEL_WatchAdd("*0x775C,x","SCIFFCTB");
-}
-hotmenu SCI_C_All_Regs()
-{
-    GEL_WatchAdd("*0x7770,x","SCICCRC");
-    GEL_WatchAdd("*0x7771,x","SCICTL1C");
-    GEL_WatchAdd("*0x7772,x","SCIHBAUDC");
-    GEL_WatchAdd("*0x7773,x","SCILBAUDC");
-    GEL_WatchAdd("*0x7774,x","SCICTL2C");
-    GEL_WatchAdd("*0x7775,x","SCIRXSTC");
-    GEL_WatchAdd("*0x7776,x","SCIRXEMUC");
-    GEL_WatchAdd("*0x7777,x","SCIRXBUFC");
-    GEL_WatchAdd("*0x7779,x","SCITXBUFC");
-    GEL_WatchAdd("*0x777A,x","SCIFFTXC");
-    GEL_WatchAdd("*0x777B,x","SCIFFRXC");
-    GEL_WatchAdd("*0x777C,x","SCIFFCTC");
-    GEL_WatchAdd("*0x777F,x","SCIPRIC");
-}
-hotmenu SCI_C_FIFO_Registers()
-{
-    GEL_WatchAdd("*0x777A,x","SCIFFTXC");
-    GEL_WatchAdd("*0x777B,x","SCIFFRXC");
-    GEL_WatchAdd("*0x777C,x","SCIFFCTC");
-}
-
-
-/********************************************************************/
-/* Serial Peripheral Interface Registers                            */
-/********************************************************************/
-menuitem "Watch SPI Registers";
-
-hotmenu SPI_A_All_Regs()
-{
-    GEL_WatchAdd("*0x7040,x","SPIA SPICCR");
-    GEL_WatchAdd("*0x7041,x","SPIA SPICTL");
-    GEL_WatchAdd("*0x7042,x","SPIA SPIST");
-    GEL_WatchAdd("*0x7044,x","SPIA SPIBRR");
-    GEL_WatchAdd("*0x7046,x","SPIA SPIEMU");
-    GEL_WatchAdd("*0x7047,x","SPIA SPIRXBUF");
-    GEL_WatchAdd("*0x7048,x","SPIA SPITXBUF");
-    GEL_WatchAdd("*0x7049,x","SPIA SPIDAT");
-    GEL_WatchAdd("*0x704A,x","SPIA SPIFFTX");
-    GEL_WatchAdd("*0x704B,x","SPIA SPIFFRX");
-    GEL_WatchAdd("*0x704C,x","SPIA SPIFFCT");
-    GEL_WatchAdd("*0x704F,x","SPIA SPIPRI");
-}
-hotmenu SPI_A_FIFO_Registers()
-{
-    GEL_WatchAdd("*0x704A,x","SPIA SPIFFTX");
-    GEL_WatchAdd("*0x704B,x","SPIA SPIFFRX");
-    GEL_WatchAdd("*0x704C,x","SPIA SPIFFCT");
-}
-
-
-/********************************************************************/
-/* Watchdog Timer Registers                                         */
-/********************************************************************/
-menuitem "Watch Watchdog Timer Registers";
-
-hotmenu All_Watchdog_Regs()
-{
-    GEL_WatchAdd("*0x7023,x","WDCNTR");
-    GEL_WatchAdd("*0x7025,x","WDKEY");
-    GEL_WatchAdd("*0x7029,x","WDCR");
-    GEL_WatchAdd("*0x7022,x","SCSR");
-}
-
-/********************************************************************/
-/*** End of file ***/
diff --git a/Source/External/v120/DSP2833x_common/gel/f28235.gel b/Source/External/v120/DSP2833x_common/gel/f28235.gel
deleted file mode 100644
index 9d35fee..0000000
--- a/Source/External/v120/DSP2833x_common/gel/f28235.gel
+++ /dev/null
@@ -1,2939 +0,0 @@
-/********************************************************************/
-/* f28235.gel                                                       */
-/* Version 3.30.2                                                   */
-/*                                                                  */
-/* This GEL file is to be used with the TMS320F28235 DSP.           */
-/* Changes may be required to support specific hardware designs.    */
-/*                                                                  */
-/* Code Composer Studio supports six reserved GEL functions that    */
-/* automatically get executed if they are defined. They are:        */
-/*                                                                  */
-/* StartUp()              - Executed whenever CCS is invoked        */
-/* OnReset()              - Executed after Debug->Reset CPU         */
-/* OnRestart()            - Executed after Debug->Restart           */
-/* OnPreFileLoaded()      - Executed before File->Load Program      */
-/* OnFileLoaded()         - Executed after File->Load Program       */
-/* OnTargetConnect()      - Executed after Debug->Connect           */
-/*                                                                  */
-/********************************************************************/
-
-StartUp()
-{
-
-/* The next line automatically loads the .gel file that comes   */
-/* with the DSP2833x Peripheral Header Files download.  To use, */
-/* uncomment, and adjust the directory path as needed.          */
-//  GEL_LoadGel("c:\\CCStudio_v3.3\\cc\\gel\\DSP2833x_Peripheral.gel");
-
-}
-
-OnReset(int nErrorCode)
-{
-    C28x_Mode();
-    Unlock_CSM();
-    ADC_Cal();
-	
-}
-
-OnRestart(int nErrorCode)
-{
-/* CCS will call OnRestart() when you do a Debug->Restart and   */
-/* after you load a new file.  Between running interrupt based  */
-/* programs, this function will clear interrupts and help keep  */
-/* the processor from going off into invalid memory.            */
-     C28x_Mode();
-     IER = 0;
-     IFR = 0;
-     ADC_Cal();
-}
-
-int TxtOutCtl=0;
-OnPreFileLoaded()
-{
-    XINTF_Enable();
-    if (TxtOutCtl==0)
-    {
-     GEL_TextOut("\nNOTES:\nGel will enable XINTFx16 during Debug only.\nEnable XINTF in code prior to use.");
-	 TxtOutCtl=1;
-    }
-}
-
-OnFileLoaded(int nErrorCode, int bSymbolsOnly)
-{
-    ADC_Cal();
-}
-
-OnTargetConnect()
-{    
-    C28x_Mode();
-    F28235_Memory_Map();            /* Initialize the CCS memory map */
-
-/* Check to see if CCS has been started-up with the DSP already */
-/* running in real-time mode.  The user can add whatever        */
-/* custom initialization stuff they want to each case.          */
-
-    if (GEL_IsInRealtimeMode())     /* Do real-time mode target initialization */
-    {
-
-    }
-    else                            /* Do stop-mode target initialization */
-    {
-        GEL_Reset();                /* Reset DSP */
-    }
-
-}
-
-
-/********************************************************************/
-/* These functions are launched by the GEL_Toolbar button plugin    */
-/********************************************************************/
-GEL_Toolbar1()
-{
-    Run_Realtime_with_Reset();
-}
-GEL_Toolbar2()
-{
-    Run_Realtime_with_Restart();
-}
-GEL_Toolbar3()
-{
-    Full_Halt();
-}
-GEL_Toolbar4()
-{
-    Full_Halt_with_Reset();
-}
-
-int GEL_Toolbar5_Toggle = 0;
-GEL_Toolbar5()
-{
-    if(GEL_Toolbar5_Toggle == 0)
-    {
-        GEL_Toolbar5_Toggle = 1;
-        GEL_OpenWindow("GEL_Buttons",1,4);
-        GEL_TextOut("Button 1: Run_Realtime_with_Reset()","GEL_Buttons",0,0);
-        GEL_TextOut("Button 2: Run_Realtime_with_Restart()","GEL_Buttons",0,1);
-        GEL_TextOut("Button 3: Full_Halt()", "GEL_Buttons",0,2);
-        GEL_TextOut("Button 4: Full_Halt_with_Reset()","GEL_Buttons",0,3);
-    }
-    else
-    {
-        GEL_Toolbar5_Toggle = 0;
-        GEL_CloseWindow("GEL_Buttons");
-    }
-}
-
-
-/********************************************************************/
-/* These functions are useful to engage/dis-enagage realtime        */
-/* emulation mode during debug.  They save the user from having to  */
-/* manually perform these steps in CCS.                             */
-/********************************************************************/
-menuitem "Realtime Emulation Control";
-
-hotmenu Run_Realtime_with_Reset()
-{
-    GEL_Reset();                /* Reset the DSP */
-    ST1 = ST1 & 0xFFFD;         /* clear DBGM bit in ST1 */
-    GEL_EnableRealtime();       /* Enable Realtime mode */
-    GEL_Run();                  /* Run the DSP */
-}
-hotmenu Run_Realtime_with_Restart()
-{
-    GEL_Restart();              /* Reset the DSP */
-    ST1 = ST1 & 0xFFFD;         /* clear DBGM bit in ST1 */
-    GEL_EnableRealtime();       /* Enable Realtime mode */
-    GEL_Run();                  /* Run the DSP */
-}
-hotmenu Full_Halt()
-{
-    GEL_DisableRealtime();      /* Disable Realtime mode */
-    GEL_Halt();                 /* Halt the DSP */
-}
-hotmenu Full_Halt_with_Reset()
-{
-    GEL_DisableRealtime();      /* Disable Realtime mode */
-    GEL_Halt();                 /* Halt the DSP */
-    GEL_Reset();                /* Reset the DSP */
-}
-
-
-/********************************************************************/
-/*                         F28235 Memory Map                        */
-/*                                                                  */
-/*   Note: M0M1MAP and VMAP signals tied high on F28235 core        */
-/*                                                                  */
-/*   0x000000 - 0x0003ff   M0 SARAM                (Prog and Data)  */
-/*   0x000400 - 0x0007ff   M1 SARAM                (Prog and Data)  */
-/*   0x000800 - 0x001fff   Peripheral Frame0 (PF0) (Data only)      */
-/*   0x004000 - 0x004fff   XINTF Zone 0            (Prog and Data)  */
-/*   0x005000 - 0x005fff   Peripheral Frame3 (PF3) (Data only)      */
-/*   0x006000 - 0x006fff   Peripheral Frame1 (PF1) (Data only)      */
-/*   0x007000 - 0x007fff   Peripheral Frame2 (PF2) (Data only)      */
-/*   0x008000 - 0x008fff   L0 SARAM                (Prog and Data)  */
-/*   0x009000 - 0x009fff   L1 SARAM                (Prog and Data)  */
-/*   0x00A000 - 0x00Afff   L2 SARAM                (Prog and Data)  */
-/*   0x00B000 - 0x00Bfff   L3 SARAM                (Prog and Data)  */
-/*   0x00C000 - 0x00Cfff   L4 SARAM                (Prog and Data)  */
-/*   0x00D000 - 0x00Dfff   L5 SARAM                (Prog and Data)  */
-/*   0x00E000 - 0x00Efff   L6 SARAM                (Prog and Data)  */
-/*   0x00F000 - 0x00Ffff   L7 SARAM                (Prog and Data)  */
-/*   0x100000 - 0x1fffff   XINTF Zone 6            (Prog and Data)  */
-/*   0x200000 - 0x2fffff   XINTF Zone 7            (Prog and Data   */
-/*   0x300000 - 0x33ffff   Flash                   (Prog and Data)  */
-/*   0x380080 - 0x380088   ADC_cal function        (Prog and Data)  */
-/*   0x380090 - 0x380090   PARTID value            (Prog and Data)  */
-/*   0x380400 - 0x3807ff   OTP                     (Prog and Data)  */
-/*   0x3f8000 - 0x3f8fff   L0 SARAM                (Prog and Data)  */
-/*   0x3f9000 - 0x3f9fff   L1 SARAM                (Prog and Data)  */
-/*   0x3fA000 - 0x3fAfff   L2 SARAM                (Prog and Data)  */
-/*   0x3fB000 - 0x3fBfff   L3 SARAM                (Prog and Data)  */
-/*   0x3fe000 - 0x3fffff   BOOT ROM                (Prog and Data)  */
-/********************************************************************/
-menuitem "Initialize Memory Map";
-
-hotmenu F28235_Memory_Map()
-{
-    GEL_MapReset();
-    GEL_MapOn();
-
-    /* Program memory map */
-    GEL_MapAdd(0x0,0,0x400,1,1);                 /* M0 SARAM        */
-    GEL_MapAdd(0x400,0,0x400,1,1);               /* M1 SARAM        */
-    GEL_MapAdd(0x4000,0,0x1000,1,1);             /* Zone 0          */
-    GEL_MapAdd(0x8000,0,0x1000,1,1);             /* L0 SARAM        */
-    GEL_MapAdd(0x9000,0,0x1000,1,1);             /* L1 SARAM        */
-    GEL_MapAdd(0xA000,0,0x1000,1,1);             /* L2 SARAM        */
-    GEL_MapAdd(0xB000,0,0x1000,1,1);             /* L3 SARAM        */
-    GEL_MapAdd(0xC000,0,0x1000,1,1);             /* L4 SARAM        */
-    GEL_MapAdd(0xD000,0,0x1000,1,1);             /* L5 SARAM        */
-    GEL_MapAdd(0xE000,0,0x1000,1,1);             /* L6 SARAM        */
-    GEL_MapAdd(0xF000,0,0x1000,1,1);             /* L7 SARAM        */
-    GEL_MapAdd(0x100000,0,0x100000,1,1);         /* Zone 6          */
-    GEL_MapAdd(0x200000,0,0x100000,1,1);         /* Zone 7          */
-    GEL_MapAdd(0x300000,0,0x40000,1,0);          /* FLASH           */
-    GEL_MapAdd(0x380080,0,0x00009,1,0);          /* ADC_cal function*/
-    GEL_MapAdd(0x380090,0,0x00001,1,0);          /* PARTID value    */
-    GEL_MapAdd(0x380400,0,0x00400,1,0);          /* OTP             */
-    GEL_MapAdd(0x3f8000,0,0x1000,1,1);           /* L0 SARAM Mirror */
-    GEL_MapAdd(0x3f9000,0,0x1000,1,1);           /* L1 SARAM Mirror */
-    GEL_MapAdd(0x3fA000,0,0x1000,1,1);           /* L2 SARAM Mirror */
-    GEL_MapAdd(0x3fb000,0,0x1000,1,1);           /* L3 SARAM Mirror */
-    GEL_MapAdd(0x3fe000,0,0x2000,1,0);           /* BOOT ROM        */
-
-    /* Data memory map */
-    GEL_MapAdd(0x000,1,0x400,1,1);               /* M0 SARAM        */
-    GEL_MapAdd(0x400,1,0x400,1,1);               /* M1 SARAM        */
-    GEL_MapAdd(0x800,1,0x1800,1,1);               /* PF0             */
-    GEL_MapAdd(0x4000,1,0x1000,1,1);             /* Zone 0          */
-    GEL_MapAdd(0x5000,1,0x1000,1,1);             /* PF3             */
-    GEL_MapAdd(0x6000,1,0x1000,1,1);             /* PF1             */
-    GEL_MapAddStr(0x7000,1,0x1000,"R|W|AS2",0);  /* PF2             */
-    GEL_MapAdd(0x8000,1,0x1000,1,1);             /* L0 SARAM        */
-    GEL_MapAdd(0x9000,1,0x1000,1,1);             /* L1 SARAM        */
-    GEL_MapAdd(0xA000,1,0x1000,1,1);             /* L2 SARAM        */
-    GEL_MapAdd(0xB000,1,0x1000,1,1);             /* L3 SARAM        */
-    GEL_MapAdd(0xC000,1,0x1000,1,1);             /* L4 SARAM        */
-    GEL_MapAdd(0xD000,1,0x1000,1,1);             /* L5 SARAM        */
-    GEL_MapAdd(0xE000,1,0x1000,1,1);             /* L6 SARAM        */
-    GEL_MapAdd(0xF000,1,0x1000,1,1);             /* L7 SARAM        */
-    GEL_MapAdd(0x100000,1,0x100000,1,1);         /* Zone 6          */
-    GEL_MapAdd(0x200000,1,0x100000,1,1);         /* Zone 7          */
-    GEL_MapAdd(0x300000,1,0x40000,1,0);          /* FLASH           */
-    GEL_MapAdd(0x380400,1,0x00400,1,0);          /* OTP             */
-    GEL_MapAdd(0x380080,1,0x00009,1,0);          /* ADC_cal function*/
-    GEL_MapAdd(0x380090,1,0x00001,1,0);          /* PARTID value    */
-    GEL_MapAdd(0x3f8000,1,0x1000,1,1);           /* L0 SARAM Mirror */
-    GEL_MapAdd(0x3f9000,1,0x1000,1,1);           /* L1 SARAM Mirror */
-    GEL_MapAdd(0x3fA000,1,0x1000,1,1);           /* L2 SARAM Mirror */
-    GEL_MapAdd(0x3fb000,1,0x1000,1,1);           /* L3 SARAM Mirror */
-    GEL_MapAdd(0x3fe000,1,0x2000,1,0);           /* BOOT ROM        */
-}
-
-
-/********************************************************************/
-/* The ESTOP0 fill functions are useful for debug.  They fill the   */
-/* RAM with software breakpoints that will trap runaway code.       */
-/********************************************************************/
-hotmenu Fill_F28235_RAM_with_ESTOP0()
-{
-    GEL_MemoryFill(0x000000,1,0x000800,0x7625);      /* Fill M0/M1  */
-    GEL_MemoryFill(0x008000,1,0x002000,0x7625);      /* Fill L0/L1  */
-    GEL_MemoryFill(0x00A000,1,0x002000,0x7625);      /* Fill L2/L3  */
-    GEL_MemoryFill(0x00C000,1,0x002000,0x7625);      /* Fill L4/L5  */
-    GEL_MemoryFill(0x00E000,1,0x002000,0x7625);      /* Fill L6/L7  */
-}
-
-
-/********************************************************************/
-menuitem "Watchdog";
-hotmenu Disable_WD()
-{
-    *0x7029 = *0x7029 | 0x0068;                /* Set the WDDIS bit */
-    *0x7025 = 0x0055;                          /* Service the WD    */
-    *0x7025 = 0x00AA;                          /*  once to be safe. */
-    GEL_TextOut("\nWatchdog Timer Disabled");
-}
-
-
-/********************************************************************/
-menuitem "Code Security Module"
-hotmenu Unlock_CSM()
-{
-    /* Perform dummy reads of the password locations */
-    XAR0 = *0x33FFF8;
-    XAR0 = *0x33FFF9;
-    XAR0 = *0x33FFFA;
-    XAR0 = *0x33FFFB;
-    XAR0 = *0x33FFFC;
-    XAR0 = *0x33FFFD;
-    XAR0 = *0x33FFFE;
-    XAR0 = *0x33FFFF;
-
-    /* Write passwords to the KEY registers.  0xFFFF's are dummy passwords.
-       User should replace them with the correct password for their DSP */
-    *0xAE0 = 0xFFFF;
-    *0xAE1 = 0xFFFF;
-    *0xAE2 = 0xFFFF;
-    *0xAE3 = 0xFFFF;
-    *0xAE4 = 0xFFFF;
-    *0xAE5 = 0xFFFF;
-    *0xAE6 = 0xFFFF;
-    *0xAE7 = 0xFFFF;
-}
-
-
-/********************************************************************/
-menuitem "Addressing Modes";
-hotmenu C28x_Mode()
-{
-    ST1 = ST1 & (~0x0100);      /*   AMODE = 0  */
-    ST1 = ST1 | 0x0200;         /* OBJMODE = 1  */
-}
-hotmenu C24x_Mode()
-{
-    ST1 = ST1 | 0x0100;         /*   AMODE = 1  */
-    ST1 = ST1 | 0x0200;         /* OBJMODE = 1  */
-}
-hotmenu C27x_Mode()
-{
-    ST1 = ST1 & (~0x0100);      /*   AMODE = 0  */
-    ST1 = ST1 & (~0x0200);      /* OBJMODE = 0  */
-}
-
-
-/********************************************************************/
-/*                            PLL Ratios                            */
-/*                                                                  */
-/* The following table describes the PLL clocking ratios (0..10)    */                            
-/*                                                                  */
-/*   Ratio        CLKIN         Description                         */
-/*   -----    --------------    ------------                        */
-/*     0      OSCCLK/2          PLL bypassed                        */
-/*     1      (OSCCLK * 1)/2    15 Mhz for 30 Mhz CLKIN             */
-/*     2      (OSCCLK * 2)/2    30 Mhz for 30 Mhz CLKIN             */
-/*     3      (OSCCLK * 3)/2    45 Mhz for 30 Mhz CLKIN             */
-/*     4      (OSCCLK * 4)/2    60 Mhz for 30 Mhz CLKIN             */
-/*     5      (OSCCLK * 5)/2    75 Mhz for 30 Mhz CLKIN             */
-/*     6      (OSCCLK * 6)/2    90 Mhz for 30 Mhz CLKIN             */
-/*     7      (OSCCLK * 7)/2    105 Mhz for 30 Mhz CLKIN            */
-/*     8      (OSCCLK * 8)/2    120 Mhz for 30 Mhz CLKIN            */
-/*     9      (OSCCLK * 9)/2    135 Mhz for 30 Mhz CLKIN            */
-/*    10      (OSCCLK * 10)/2   150 Mhz for 30 Mhz CLKIN            */
-/********************************************************************/
-menuitem "Set PLL Ratio";
-
-hotmenu Bypass()
-{
-    DIVSEL_div2();     /* DIVSEL = 1/2                      */
-    *0x7021 = 0;       /* CLKIN = OSCCLK/2, PLL is bypassed */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x1_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 1;      /* CLKIN = (OSCCLK * 1)/2 */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x2_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 2;      /* CLKIN = (OSCCLK * 2)/2 */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x3_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 3;      /* CLKIN = (OSCCLK * 3)/2 */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x4_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 4;      /* CLKIN = (OSCCLK * 4)/2 */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x5_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 5;      /* CLKIN = (OSCCLK * 5)/2 */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x6_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 6;      /* CLKIN = (OSCCLK * 6)/2 */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x7_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 7;      /* CLKIN = (OSCCLK * 7)/2 */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x8_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 8;      /* CLKIN = (OSCCLK * 8)/2 */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x9_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 9;      /* CLKIN = (OSCCLK * 9)/2 */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x10_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 10;     /* CLKIN = (OSCCLK * 10)/2 */
-    PLL_Wait();
-}
-// hotmenu OSCCLK_x1_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 1;      /* CLKIN = (OSCCLK * 1)/1 */
-//     PLL_Wait();
-// }
-// hotmenu OSCCLK_x2_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 2;      /* CLKIN = (OSCCLK * 2)/1 */
-//     PLL_Wait();
-// }
-// hotmenu OSCCLK_x3_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 3;      /* CLKIN = (OSCCLK * 3)/1 */
-//     PLL_Wait();
-// }
-// hotmenu OSCCLK_x4_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 4;      /* CLKIN = (OSCCLK * 4)/1 */
-//     PLL_Wait();
-// }
-// hotmenu OSCCLK_x5_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 5;      /* CLKIN = (OSCCLK * 5)/1 */
-//     PLL_Wait();
-// }
-// hotmenu OSCCLK_x6_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 6;      /* CLKIN = (OSCCLK * 6)/1 */
-//     PLL_Wait();
-// }
-// hotmenu OSCCLK_x7_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 7;      /* CLKIN = (OSCCLK * 7)/1 */
-//     PLL_Wait();
-// }
-// hotmenu OSCCLK_x8_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 8;      /* CLKIN = (OSCCLK * 8)/1 */
-//     PLL_Wait();
-// }
-// hotmenu OSCCLK_x9_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 9;      /* CLKIN = (OSCCLK * 9)/1 */
-//     PLL_Wait();
-// }
-// hotmenu OSCCLK_x10_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 10;     /* CLKIN = (OSCCLK * 10)/1 */
-//     PLL_Wait();
-// }
-
-
-
-/********************************************************************/
-/* For F2823x devices, DIVSEL is 1/4 by default.  Switch it to 1/2  */
-/********************************************************************/
-
-DIVSEL_div2()
-{
-    int temp;
-    int PLLSTS;
-
-    PLLSTS = 0x7011;
-
-    temp  = *PLLSTS; 
-    temp &=  0xFE7F;   /* Clear bits 7 & 8 */
-    temp |= 2 << 7;    /* Set bit 8        */
-    *PLLSTS = temp;    /* Switch to 1/2    */
-}
-
-
-
-/********************************************************************/
-/* For F2823x devices, DIVSEL is 1/4 by default.  Switch it to /1   */
-/********************************************************************/
-
-DIVSEL_div1()
-{
-    int temp;
-    int PLLSTS;
-
-    PLLSTS = 0x7011;
-    
-    DIVSEL_div2();     /* First switch DIVSEL to 1/2 and wait */
-    wait();  
-    temp  = *PLLSTS; 
-    temp |= 3 << 7;    /* Set bits 7 & 8   */
-    *PLLSTS = temp;    /* Switch to 1/2    */
-}
-
-wait()
-{
-    int delay = 0;
-    for (delay = 0; delay <= 5; delay ++)
-    {}
-}
-
-/********************************************************************/
-/* For F2823x devices, check the PLLOCKS bit for PLL lock.          */
-/********************************************************************/
-PLL_Wait()
-{
-    int PLLSTS;
-    int delay = 0;
-
-    PLLSTS = 0x7011;
-    
-    
-    while ( ( (unsigned int)*PLLSTS & 0x0001) != 0x0001)
-    {
-        delay++;
-        GEL_TextOut("Waiting for PLL Lock, PLLSTS = %x\n",,,,,(unsigned int)*PLLSTS);
-    }
-    GEL_TextOut("\nPLL lock complete, PLLSTS = %x\n",,,,,(unsigned int)*PLLSTS);
-}
-
-/********************************************************************/
-/* Load the ADC Calibration values from TI OTP                      */
-/********************************************************************/
-menuitem "ADC Calibration"
-hotmenu ADC_Cal()
-{
-    /* Perform dummy reads of the password locations */
-    XAR0 = *0x33FFF8;
-    XAR0 = *0x33FFF9;
-    XAR0 = *0x33FFFA;
-    XAR0 = *0x33FFFB;
-    XAR0 = *0x33FFFC;
-    XAR0 = *0x33FFFD;
-    XAR0 = *0x33FFFE;
-    XAR0 = *0x33FFFF;
-
-    
-    if(((*0x0AEF) & 0x0001) == 0)
-    {
-        XAR0 = *0x701C;
-        *0x701C |= 0x0008;  
-    	*0x711C = *0x380083;
-        *0x711D = *0x380085;
-        *0x701C = XAR0;
-	    XAR0 = 0;
-       
-    } 
-    else
-    {
-        GEL_TextOut("\nADC Calibration not complete, check if device is unlocked and recalibrate."); 
-    }
-}
-
-/********************************************************************/
-/* Enable the XINTF and configure GPIOs for XINTF function          */
-/********************************************************************/
-menuitem "XINTF Enable"
-hotmenu XINTF_Enable()
-{
-
-   /* enable XINTF clock (XTIMCLK) */
-
-   *0x7020 = 0x3700;                          
-   /* GPBMUX1: XA0-XA7, XA16, XZCS0,        */
-   /*          XZCS7, XREADY, XRNW, XWE0    */
-   /* GPAMUX2: XA17-XA19, XZCS6             */
-   /* GPCMUX2: XA8-XA15                     */         
-   /* GPCMUX1: XD0-XD15                     */
-   *(unsigned long *)0x6F96 = 0xFFFFFFC0;   /* GPBMUX1 */
-   *(unsigned long *)0x6f88 = 0xFF000000;   /* GPAMUX2 */  
-   *(unsigned long *)0x6FA8 = 0x0000AAAA;   /* GPCMUX2 */  
-   *(unsigned long *)0x6FA6 = 0xAAAAAAAA;   /* GPCMUX1 */
-
-   /* Uncomment for x32 data bus            */
-   /* GPBMUX2: XD16-XD31                    */
-// *(unsigned long *)0x6F98 = 0xFFFFFFFF;   /* GPBMUX2 */ 
-   
-   /* Zone timing.  
-   /* Each zone can be configured seperately */
-   /* Uncomment the x16 or the x32 timing    */
-   /* depending on the data bus width for    */
-   /* the zone                               */
-
-   /* x16 Timing */
-   *(unsigned long *)0x0B20 = 0x0043FFFF;    /* Zone0 */
-   *(unsigned long *)0x0B2C = 0x0043FFFF;    /* Zone6 */
-   *(unsigned long *)0x0B2E = 0x0043FFFF;    /* Zone7 */
-
-   /* x32 Timing:
-// *(unsigned long *)0x0B20 = 0x0041FFFF;    /* x32 */
-// *(unsigned long *)0x0B2C = 0x0041FFFF;    /* x32 */
-// *(unsigned long *)0x0B2E = 0x0041FFFF;    /* x32 */
-
-   
-}
-
-
-
-
-
-/********************************************************************/
-/* The below are used to display the symbolic names of the F28235   */
-/* memory mapped registers in the watch window. To view these       */
-/* registers, click on the GEL menu button in Code Composer Studio, */
-/* then select which registers or groups of registers you want to   */
-/* view. They will appear in the watch window under the Watch1 tab. */
-/********************************************************************/
-
-/* Add a space line to the GEL menu */
-menuitem "______________________________________";
-hotmenu __() {}
-
-/********************************************************************/
-/* A/D Converter Registers                                          */
-/********************************************************************/
-menuitem "Watch ADC Registers";
-
-hotmenu All_ADC_Regs()
-{
-    GEL_WatchAdd("*0x7100,x","ADCTRL1");
-    GEL_WatchAdd("*0x7101,x","ADCTRL2");
-    GEL_WatchAdd("*0x7102,x","ADCMAXCONV");
-    GEL_WatchAdd("*0x7103,x","ADCCHSELSEQ1");
-    GEL_WatchAdd("*0x7104,x","ADCCHSELSEQ2");
-    GEL_WatchAdd("*0x7105,x","ADCCHSELSEQ3");
-    GEL_WatchAdd("*0x7106,x","ADCCHSELSEQ4");
-    GEL_WatchAdd("*0x7107,x","ADCASEQSR");
-    GEL_WatchAdd("*0x7108,x","ADCRESULT0");
-    GEL_WatchAdd("*0x7109,x","ADCRESULT1");
-    GEL_WatchAdd("*0x710A,x","ADCRESULT2");
-    GEL_WatchAdd("*0x710B,x","ADCRESULT3");
-    GEL_WatchAdd("*0x710C,x","ADCRESULT4");
-    GEL_WatchAdd("*0x710D,x","ADCRESULT5");
-    GEL_WatchAdd("*0x710E,x","ADCRESULT6");
-    GEL_WatchAdd("*0x710F,x","ADCRESULT7");
-    GEL_WatchAdd("*0x7110,x","ADCRESULT8");
-    GEL_WatchAdd("*0x7111,x","ADCRESULT9");
-    GEL_WatchAdd("*0x7112,x","ADCRESULT10");
-    GEL_WatchAdd("*0x7113,x","ADCRESULT11");
-    GEL_WatchAdd("*0x7114,x","ADCRESULT12");
-    GEL_WatchAdd("*0x7115,x","ADCRESULT13");
-    GEL_WatchAdd("*0x7116,x","ADCRESULT14");
-    GEL_WatchAdd("*0x7117,x","ADCRESULT15");
-    GEL_WatchAdd("*0x7118,x","ADCTRL3");
-    GEL_WatchAdd("*0x7119,x","ADCST");
-    GEL_WatchAdd("*0x711C,x","ADCREFSEL");
-    GEL_WatchAdd("*0x711D,x","ADCOFFTRIM");
-
-    GEL_WatchAdd("*0x0B00,x","ADCRESULT0 Mirror");
-    GEL_WatchAdd("*0x0B01,x","ADCRESULT1 Mirror");
-    GEL_WatchAdd("*0x0B02,x","ADCRESULT2 Mirror");
-    GEL_WatchAdd("*0x0B03,x","ADCRESULT3 Mirror");
-    GEL_WatchAdd("*0x0B04,x","ADCRESULT4 Mirror");
-    GEL_WatchAdd("*0x0B05,x","ADCRESULT5 Mirror");
-    GEL_WatchAdd("*0x0B06,x","ADCRESULT6 Mirror");
-    GEL_WatchAdd("*0x0B07,x","ADCRESULT7 Mirror");
-    GEL_WatchAdd("*0x0B08,x","ADCRESULT8 Mirror");
-    GEL_WatchAdd("*0x0B09,x","ADCRESULT9 Mirror");
-    GEL_WatchAdd("*0x0B0A,x","ADCRESULT10 Mirror");
-    GEL_WatchAdd("*0x0B0B,x","ADCRESULT11 Mirror");
-    GEL_WatchAdd("*0x0B0C,x","ADCRESULT12 Mirror");
-    GEL_WatchAdd("*0x0B0D,x","ADCRESULT13 Mirror");
-    GEL_WatchAdd("*0x0B0E,x","ADCRESULT14 Mirror");
-    GEL_WatchAdd("*0x0B0F,x","ADCRESULT15 Mirror");
-}
-hotmenu ADC_Control_Regs()
-{
-    GEL_WatchAdd("*0x7100,x","ADCTRL1");
-    GEL_WatchAdd("*0x7101,x","ADCTRL2");
-    GEL_WatchAdd("*0x7102,x","ADCMAXCONV");
-    GEL_WatchAdd("*0x7107,x","ADCASEQSR");
-    GEL_WatchAdd("*0x7118,x","ADCTRL3");
-    GEL_WatchAdd("*0x7119,x","ADCST");
-    GEL_WatchAdd("*0x711C,x","ADCREFSEL");
-    GEL_WatchAdd("*0x711D,x","ADCOFFTRIM");
-}
-hotmenu ADCCHSELSEQx_Regs()
-{
-    GEL_WatchAdd("*0x7103,x","ADCCHSELSEQ1");
-    GEL_WatchAdd("*0x7104,x","ADCCHSELSEQ2");
-    GEL_WatchAdd("*0x7105,x","ADCCHSELSEQ3");
-    GEL_WatchAdd("*0x7106,x","ADCCHSELSEQ4");
-}
-hotmenu ADCRESULT_0_to_7()
-{
-    GEL_WatchAdd("*0x7108,x","ADCRESULT0");
-    GEL_WatchAdd("*0x7109,x","ADCRESULT1");
-    GEL_WatchAdd("*0x710A,x","ADCRESULT2");
-    GEL_WatchAdd("*0x710B,x","ADCRESULT3");
-    GEL_WatchAdd("*0x710C,x","ADCRESULT4");
-    GEL_WatchAdd("*0x710D,x","ADCRESULT5");
-    GEL_WatchAdd("*0x710E,x","ADCRESULT6");
-    GEL_WatchAdd("*0x710F,x","ADCRESULT7");
-}
-hotmenu ADCRESULT_8_to_15()
-{
-    GEL_WatchAdd("*0x7110,x","ADCRESULT8");
-    GEL_WatchAdd("*0x7111,x","ADCRESULT9");
-    GEL_WatchAdd("*0x7112,x","ADCRESULT10");
-    GEL_WatchAdd("*0x7113,x","ADCRESULT11");
-    GEL_WatchAdd("*0x7114,x","ADCRESULT12");
-    GEL_WatchAdd("*0x7115,x","ADCRESULT13");
-    GEL_WatchAdd("*0x7116,x","ADCRESULT14");
-    GEL_WatchAdd("*0x7117,x","ADCRESULT15");
-}
-hotmenu ADCRESULT_Mirror_0_to_7()
-{
-    GEL_WatchAdd("*0x0B00,x","ADCRESULT0 Mirror");
-    GEL_WatchAdd("*0x0B01,x","ADCRESULT1 Mirror");
-    GEL_WatchAdd("*0x0B02,x","ADCRESULT2 Mirror");
-    GEL_WatchAdd("*0x0B03,x","ADCRESULT3 Mirror");
-    GEL_WatchAdd("*0x0B04,x","ADCRESULT4 Mirror");
-    GEL_WatchAdd("*0x0B05,x","ADCRESULT5 Mirror");
-    GEL_WatchAdd("*0x0B06,x","ADCRESULT6 Mirror");
-    GEL_WatchAdd("*0x0B07,x","ADCRESULT7 Mirror");
-}
-hotmenu ADCRESULT_Mirror_8_to_15()
-{
-    GEL_WatchAdd("*0x0B08,x","ADCRESULT8 Mirror");
-    GEL_WatchAdd("*0x0B09,x","ADCRESULT9 Mirror");
-    GEL_WatchAdd("*0x0B0A,x","ADCRESULT10 Mirror");
-    GEL_WatchAdd("*0x0B0B,x","ADCRESULT11 Mirror");
-    GEL_WatchAdd("*0x0B0C,x","ADCRESULT12 Mirror");
-    GEL_WatchAdd("*0x0B0D,x","ADCRESULT13 Mirror");
-    GEL_WatchAdd("*0x0B0E,x","ADCRESULT14 Mirror");
-    GEL_WatchAdd("*0x0B0F,x","ADCRESULT15 Mirror");
-}
-
-
-/********************************************************************/
-/* Clocking and Low-Power Registers                                 */
-/********************************************************************/
-menuitem "Watch Clocking and Low-Power Registers";
-
-hotmenu All_Clocking_and_Low_Power_Regs()
-{
-    GEL_WatchAdd("*0x7010,x","XCLK");
-    GEL_WatchAdd("*0x7011,x","PLLSTS");
-    GEL_WatchAdd("*0x701A,x","HISPCP");
-    GEL_WatchAdd("*0x701B,x","LOSPCP");
-    GEL_WatchAdd("*0x701C,x","PCLKCR0");
-    GEL_WatchAdd("*0x701D,x","PCLKCR1");
-    GEL_WatchAdd("*0x701E,x","LPMCR0");
-    GEL_WatchAdd("*0x7020,x","PCLKCR3");
-    GEL_WatchAdd("*0x7021,x","PLLCR");
-}
-
-
-/********************************************************************/
-/* Code Security Module Registers                                   */
-/********************************************************************/
-menuitem "Watch Code Security Module Registers";
-
-hotmenu CSMSCR()
-{
-    GEL_WatchAdd("*0x0AEF,x","CSMSCR");
-    GEL_WatchAdd("(*0x0AEF>>15)&1,d"," FORCESEC bit");
-    GEL_WatchAdd("(*0x0AEF)&1,d","     SECURE bit");
-}
-hotmenu PWL_Locations()
-{
-    GEL_WatchAdd("*0x33FFF8,x","PWL0");
-    GEL_WatchAdd("*0x33FFF9,x","PWL1");
-    GEL_WatchAdd("*0x33FFFA,x","PWL2");
-    GEL_WatchAdd("*0x33FFFB,x","PWL3");
-    GEL_WatchAdd("*0x33FFFC,x","PWL4");
-    GEL_WatchAdd("*0x33FFFD,x","PWL5");
-    GEL_WatchAdd("*0x33FFFE,x","PWL6");
-    GEL_WatchAdd("*0x33FFFF,x","PWL7");
-}
-
-
-/********************************************************************/
-/* CPU Timer Registers                                              */
-/********************************************************************/
-menuitem "Watch CPU Timer Registers";
-
-hotmenu All_CPU_Timer0_Regs()
-{
-    GEL_WatchAdd("*0x0C00,x","TIMER0TIM");
-    GEL_WatchAdd("*0x0C01,x","TIMER0TIMH");
-    GEL_WatchAdd("*0x0C02,x","TIMER0PRD");
-    GEL_WatchAdd("*0x0C03,x","TIMER0PRDH");
-    GEL_WatchAdd("*0x0C04,x","TIMER0TCR");
-    GEL_WatchAdd("*0x0C06,x","TIMER0TPR");
-    GEL_WatchAdd("*0x0C07,x","TIMER0TPRH");
-}
-hotmenu All_CPU_Timer1_Regs()
-{
-    GEL_WatchAdd("*0x0C08,x","TIMER1TIM");
-    GEL_WatchAdd("*0x0C09,x","TIMER1TIMH");
-    GEL_WatchAdd("*0x0C0A,x","TIMER1PRD");
-    GEL_WatchAdd("*0x0C0B,x","TIMER1PRDH");
-    GEL_WatchAdd("*0x0C0C,x","TIMER1TCR");
-    GEL_WatchAdd("*0x0C0E,x","TIMER1TPR");
-    GEL_WatchAdd("*0x0C0F,x","TIMER1TPRH");
-}
-hotmenu All_CPU_Timer2_Regs()
-{
-    GEL_WatchAdd("*0x0C10,x","TIMER2TIM");
-    GEL_WatchAdd("*0x0C11,x","TIMER2TIMH");
-    GEL_WatchAdd("*0x0C12,x","TIMER2PRD");
-    GEL_WatchAdd("*0x0C13,x","TIMER2PRDH");
-    GEL_WatchAdd("*0x0C14,x","TIMER2TCR");
-    GEL_WatchAdd("*0x0C16,x","TIMER2TPR");
-    GEL_WatchAdd("*0x0C17,x","TIMER2TPRH");
-}
-
-
-/********************************************************************/
-/* Device Emulation Registers                                       */
-/********************************************************************/
-menuitem "Watch Device Emulation Registers";
-
-hotmenu All_Emulation_Regs()
-{
-    GEL_WatchAdd("*(long *)0x0880,x","DEVICECNF");
-    GEL_WatchAdd("*0x0882,x","CLASSID");
-    GEL_WatchAdd("*0x0883,x","REVID");
-    GEL_WatchAdd("*0x0884,x","PROTSTART");
-    GEL_WatchAdd("*0x0885,x","PROTRANGE");
-    GEL_WatchAdd("*0x380090,x","PARTID");    
-}
-/********************************************************************/
-/* DMA Registers                                                    */
-/********************************************************************/
-menuitem "Watch DMA Registers";
-
-hotmenu All_DMA_Regs()
-{
-    GEL_WatchAdd("*0x1000,x","DMACTRL");
-    GEL_WatchAdd("*0x1001,x","DEBUGCTRL");
-    GEL_WatchAdd("*0x1002,x","REVISION");
-    GEL_WatchAdd("*0x1004,x","PRIORITYCTRL1");
-    GEL_WatchAdd("*0x1006,x","PRIORITYSTAT");
-
-    GEL_WatchAdd("*0x1020,x","DMA Ch1 MODE");
-    GEL_WatchAdd("*0x1021,x","DMA Ch1 CONTROL");
-    GEL_WatchAdd("*0x1022,x","DMA Ch1 BURST_SIZE");
-    GEL_WatchAdd("*0x1023,x","DMA Ch1 BURST_COUNT");
-    GEL_WatchAdd("*0x1024,x","DMA Ch1 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x1025,x","DMA Ch1 DST_BURST_STEP");
-    GEL_WatchAdd("*0x1026,x","DMA Ch1 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x1027,x","DMA Ch1 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x1028,x","DMA Ch1 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x1029,x","DMA Ch1 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x102A,x","DMA Ch1 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x102B,x","DMA Ch1 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x102C,x","DMA Ch1 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x102D,x","DMA Ch1 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x102E,x","DMA Ch1 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x102F,x","DMA Ch1 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x1030,x","DMA Ch1 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1032,x","DMA Ch1 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1034,x","DMA Ch1 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1036,x","DMA Ch1 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1038,x","DMA Ch1 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x103A,x","DMA Ch1 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x103C,x","DMA Ch1 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x103E,x","DMA Ch1 DST_ADDR_ACTIVE");
-
-    GEL_WatchAdd("*0x1040,x","DMA Ch2 MODE");
-    GEL_WatchAdd("*0x1041,x","DMA Ch2 CONTROL");
-    GEL_WatchAdd("*0x1042,x","DMA Ch2 BURST_SIZE");
-    GEL_WatchAdd("*0x1043,x","DMA Ch2 BURST_COUNT");
-    GEL_WatchAdd("*0x1044,x","DMA Ch2 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x1045,x","DMA Ch2 DST_BURST_STEP");
-    GEL_WatchAdd("*0x1046,x","DMA Ch2 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x1047,x","DMA Ch2 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x1048,x","DMA Ch2 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x1049,x","DMA Ch2 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x104A,x","DMA Ch2 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x104B,x","DMA Ch2 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x104C,x","DMA Ch2 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x104D,x","DMA Ch2 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x104E,x","DMA Ch2 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x104F,x","DMA Ch2 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x1050,x","DMA Ch2 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1052,x","DMA Ch2 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1054,x","DMA Ch2 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1056,x","DMA Ch2 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1058,x","DMA Ch2 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x105A,x","DMA Ch2 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x105C,x","DMA Ch2 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x105E,x","DMA Ch2 DST_ADDR_ACTIVE");
-
-    GEL_WatchAdd("*0x1060,x","DMA Ch3 MODE");
-    GEL_WatchAdd("*0x1061,x","DMA Ch3 CONTROL");
-    GEL_WatchAdd("*0x1062,x","DMA Ch3 BURST_SIZE");
-    GEL_WatchAdd("*0x1063,x","DMA Ch3 BURST_COUNT");
-    GEL_WatchAdd("*0x1064,x","DMA Ch3 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x1065,x","DMA Ch3 DST_BURST_STEP");
-    GEL_WatchAdd("*0x1066,x","DMA Ch3 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x1067,x","DMA Ch3 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x1068,x","DMA Ch3 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x1069,x","DMA Ch3 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x106A,x","DMA Ch3 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x106B,x","DMA Ch3 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x106C,x","DMA Ch3 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x106D,x","DMA Ch3 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x106E,x","DMA Ch3 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x106F,x","DMA Ch3 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x1070,x","DMA Ch3 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1072,x","DMA Ch3 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1074,x","DMA Ch3 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1076,x","DMA Ch3 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1078,x","DMA Ch3 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x107A,x","DMA Ch3 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x107C,x","DMA Ch3 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x107E,x","DMA Ch3 DST_ADDR_ACTIVE");
-
-    GEL_WatchAdd("*0x1080,x","DMA Ch4 MODE");
-    GEL_WatchAdd("*0x1081,x","DMA Ch4 CONTROL");
-    GEL_WatchAdd("*0x1082,x","DMA Ch4 BURST_SIZE");
-    GEL_WatchAdd("*0x1083,x","DMA Ch4 BURST_COUNT");
-    GEL_WatchAdd("*0x1084,x","DMA Ch4 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x1085,x","DMA Ch4 DST_BURST_STEP");
-    GEL_WatchAdd("*0x1086,x","DMA Ch4 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x1087,x","DMA Ch4 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x1088,x","DMA Ch4 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x1089,x","DMA Ch4 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x108A,x","DMA Ch4 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x108B,x","DMA Ch4 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x108C,x","DMA Ch4 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x108D,x","DMA Ch4 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x108E,x","DMA Ch4 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x108F,x","DMA Ch4 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x1090,x","DMA Ch4 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1092,x","DMA Ch4 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1094,x","DMA Ch4 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1096,x","DMA Ch4 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1098,x","DMA Ch4 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x109A,x","DMA Ch4 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x109C,x","DMA Ch4 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x109E,x","DMA Ch4 DST_ADDR_ACTIVE");
-
-    GEL_WatchAdd("*0x10A0,x","DMA Ch5 MODE");
-    GEL_WatchAdd("*0x10A1,x","DMA Ch5 CONTROL");
-    GEL_WatchAdd("*0x10A2,x","DMA Ch5 BURST_SIZE");
-    GEL_WatchAdd("*0x10A3,x","DMA Ch5 BURST_COUNT");
-    GEL_WatchAdd("*0x10A4,x","DMA Ch5 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x10A5,x","DMA Ch5 DST_BURST_STEP");
-    GEL_WatchAdd("*0x10A6,x","DMA Ch5 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x10A7,x","DMA Ch5 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x10A8,x","DMA Ch5 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x10A9,x","DMA Ch5 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x10AA,x","DMA Ch5 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x10AB,x","DMA Ch5 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x10AC,x","DMA Ch5 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x10AD,x","DMA Ch5 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x10AE,x","DMA Ch5 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x10AF,x","DMA Ch5 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x10B0,x","DMA Ch5 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10B2,x","DMA Ch5 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10B4,x","DMA Ch5 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10B6,x","DMA Ch5 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10B8,x","DMA Ch5 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10BA,x","DMA Ch5 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10BC,x","DMA Ch5 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10BE,x","DMA Ch5 DST_ADDR_ACTIVE");
-
-    GEL_WatchAdd("*0x10C0,x","DMA Ch6 MODE");
-    GEL_WatchAdd("*0x10C1,x","DMA Ch6 CONTROL");
-    GEL_WatchAdd("*0x10C2,x","DMA Ch6 BURST_SIZE");
-    GEL_WatchAdd("*0x10C3,x","DMA Ch6 BURST_COUNT");
-    GEL_WatchAdd("*0x10C4,x","DMA Ch6 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x10C5,x","DMA Ch6 DST_BURST_STEP");
-    GEL_WatchAdd("*0x10C6,x","DMA Ch6 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x10C7,x","DMA Ch6 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x10C8,x","DMA Ch6 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x10C9,x","DMA Ch6 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x10CA,x","DMA Ch6 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x10CB,x","DMA Ch6 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x10CC,x","DMA Ch6 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x10CD,x","DMA Ch6 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x10CE,x","DMA Ch6 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x10CF,x","DMA Ch6 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x10D0,x","DMA Ch6 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10D2,x","DMA Ch6 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10D4,x","DMA Ch6 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10D6,x","DMA Ch6 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10D8,x","DMA Ch6 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10DA,x","DMA Ch6 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10DC,x","DMA Ch6 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10DE,x","DMA Ch6 DST_ADDR_ACTIVE");
-
-
-}
-hotmenu DMA_Channel_1_regs()
-{
-    GEL_WatchAdd("*0x1020,x","DMA Ch1 MODE");
-    GEL_WatchAdd("*0x1021,x","DMA Ch1 CONTROL");
-    GEL_WatchAdd("*0x1022,x","DMA Ch1 BURST_SIZE");
-    GEL_WatchAdd("*0x1023,x","DMA Ch1 BURST_COUNT");
-    GEL_WatchAdd("*0x1024,x","DMA Ch1 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x1025,x","DMA Ch1 DST_BURST_STEP");
-    GEL_WatchAdd("*0x1026,x","DMA Ch1 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x1027,x","DMA Ch1 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x1028,x","DMA Ch1 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x1029,x","DMA Ch1 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x102A,x","DMA Ch1 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x102B,x","DMA Ch1 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x102C,x","DMA Ch1 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x102D,x","DMA Ch1 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x102E,x","DMA Ch1 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x102F,x","DMA Ch1 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x1030,x","DMA Ch1 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1032,x","DMA Ch1 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1034,x","DMA Ch1 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1036,x","DMA Ch1 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1038,x","DMA Ch1 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x103A,x","DMA Ch1 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x103C,x","DMA Ch1 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x103E,x","DMA Ch1 DST_ADDR_ACTIVE");
-}
-
-hotmenu DMA_Channel_2_regs()
-{
-    GEL_WatchAdd("*0x1040,x","DMA Ch2 MODE");
-    GEL_WatchAdd("*0x1041,x","DMA Ch2 CONTROL");
-    GEL_WatchAdd("*0x1042,x","DMA Ch2 BURST_SIZE");
-    GEL_WatchAdd("*0x1043,x","DMA Ch2 BURST_COUNT");
-    GEL_WatchAdd("*0x1044,x","DMA Ch2 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x1045,x","DMA Ch2 DST_BURST_STEP");
-    GEL_WatchAdd("*0x1046,x","DMA Ch2 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x1047,x","DMA Ch2 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x1048,x","DMA Ch2 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x1049,x","DMA Ch2 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x104A,x","DMA Ch2 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x104B,x","DMA Ch2 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x104C,x","DMA Ch2 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x104D,x","DMA Ch2 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x104E,x","DMA Ch2 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x104F,x","DMA Ch2 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x1050,x","DMA Ch2 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1052,x","DMA Ch2 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1054,x","DMA Ch2 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1056,x","DMA Ch2 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1058,x","DMA Ch2 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x105A,x","DMA Ch2 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x105C,x","DMA Ch2 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x105E,x","DMA Ch2 DST_ADDR_ACTIVE");
-}
-hotmenu DMA_Channel_3_regs()
-{
-    GEL_WatchAdd("*0x1060,x","DMA Ch3 MODE");
-    GEL_WatchAdd("*0x1061,x","DMA Ch3 CONTROL");
-    GEL_WatchAdd("*0x1062,x","DMA Ch3 BURST_SIZE");
-    GEL_WatchAdd("*0x1063,x","DMA Ch3 BURST_COUNT");
-    GEL_WatchAdd("*0x1064,x","DMA Ch3 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x1065,x","DMA Ch3 DST_BURST_STEP");
-    GEL_WatchAdd("*0x1066,x","DMA Ch3 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x1067,x","DMA Ch3 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x1068,x","DMA Ch3 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x1069,x","DMA Ch3 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x106A,x","DMA Ch3 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x106B,x","DMA Ch3 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x106C,x","DMA Ch3 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x106D,x","DMA Ch3 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x106E,x","DMA Ch3 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x106F,x","DMA Ch3 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x1070,x","DMA Ch3 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1072,x","DMA Ch3 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1074,x","DMA Ch3 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1076,x","DMA Ch3 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1078,x","DMA Ch3 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x107A,x","DMA Ch3 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x107C,x","DMA Ch3 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x107E,x","DMA Ch3 DST_ADDR_ACTIVE");
-}
-hotmenu DMA_Channel_4_regs()
-{
-    GEL_WatchAdd("*0x1080,x","DMA Ch4 MODE");
-    GEL_WatchAdd("*0x1081,x","DMA Ch4 CONTROL");
-    GEL_WatchAdd("*0x1082,x","DMA Ch4 BURST_SIZE");
-    GEL_WatchAdd("*0x1083,x","DMA Ch4 BURST_COUNT");
-    GEL_WatchAdd("*0x1084,x","DMA Ch4 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x1085,x","DMA Ch4 DST_BURST_STEP");
-    GEL_WatchAdd("*0x1086,x","DMA Ch4 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x1087,x","DMA Ch4 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x1088,x","DMA Ch4 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x1089,x","DMA Ch4 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x108A,x","DMA Ch4 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x108B,x","DMA Ch4 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x108C,x","DMA Ch4 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x108D,x","DMA Ch4 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x108E,x","DMA Ch4 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x108F,x","DMA Ch4 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x1090,x","DMA Ch4 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1092,x","DMA Ch4 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1094,x","DMA Ch4 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1096,x","DMA Ch4 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1098,x","DMA Ch4 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x109A,x","DMA Ch4 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x109C,x","DMA Ch4 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x109E,x","DMA Ch4 DST_ADDR_ACTIVE");
-}
-hotmenu DMA_Channel_5_regs()
-{
-    GEL_WatchAdd("*0x10A0,x","DMA Ch5 MODE");
-    GEL_WatchAdd("*0x10A1,x","DMA Ch5 CONTROL");
-    GEL_WatchAdd("*0x10A2,x","DMA Ch5 BURST_SIZE");
-    GEL_WatchAdd("*0x10A3,x","DMA Ch5 BURST_COUNT");
-    GEL_WatchAdd("*0x10A4,x","DMA Ch5 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x10A5,x","DMA Ch5 DST_BURST_STEP");
-    GEL_WatchAdd("*0x10A6,x","DMA Ch5 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x10A7,x","DMA Ch5 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x10A8,x","DMA Ch5 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x10A9,x","DMA Ch5 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x10AA,x","DMA Ch5 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x10AB,x","DMA Ch5 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x10AC,x","DMA Ch5 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x10AD,x","DMA Ch5 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x10AE,x","DMA Ch5 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x10AF,x","DMA Ch5 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x10B0,x","DMA Ch5 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10B2,x","DMA Ch5 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10B4,x","DMA Ch5 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10B6,x","DMA Ch5 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10B8,x","DMA Ch5 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10BA,x","DMA Ch5 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10BC,x","DMA Ch5 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10BE,x","DMA Ch5 DST_ADDR_ACTIVE");
-}
-hotmenu DMA_Channel_6_regs()
-{
-    GEL_WatchAdd("*0x10C0,x","DMA Ch6 MODE");
-    GEL_WatchAdd("*0x10C1,x","DMA Ch6 CONTROL");
-    GEL_WatchAdd("*0x10C2,x","DMA Ch6 BURST_SIZE");
-    GEL_WatchAdd("*0x10C3,x","DMA Ch6 BURST_COUNT");
-    GEL_WatchAdd("*0x10C4,x","DMA Ch6 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x10C5,x","DMA Ch6 DST_BURST_STEP");
-    GEL_WatchAdd("*0x10C6,x","DMA Ch6 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x10C7,x","DMA Ch6 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x10C8,x","DMA Ch6 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x10C9,x","DMA Ch6 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x10CA,x","DMA Ch6 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x10CB,x","DMA Ch6 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x10CC,x","DMA Ch6 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x10CD,x","DMA Ch6 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x10CE,x","DMA Ch6 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x10CF,x","DMA Ch6 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x10D0,x","DMA Ch6 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10D2,x","DMA Ch6 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10D4,x","DMA Ch6 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10D6,x","DMA Ch6 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10D8,x","DMA Ch6 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10DA,x","DMA Ch6 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10DC,x","DMA Ch6 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10DE,x","DMA Ch6 DST_ADDR_ACTIVE");
-}
-
-/********************************************************************/
-/* eCAN Registers                                                   */
-/********************************************************************/
-menuitem "Watch eCAN Registers";
-
-hotmenu eCAN_A_Global_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6000,x","eCANA CANME");
-    GEL_WatchAdd("*(long *)0x6002,x","eCANA CANMD");
-    GEL_WatchAdd("*(long *)0x6004,x","eCANA CANTRS");
-    GEL_WatchAdd("*(long *)0x6006,x","eCANA CANTRR");
-    GEL_WatchAdd("*(long *)0x6008,x","eCANA CANTA");
-    GEL_WatchAdd("*(long *)0x600A,x","eCANA CANAA");
-    GEL_WatchAdd("*(long *)0x600C,x","eCANA CANRMP");
-    GEL_WatchAdd("*(long *)0x600E,x","eCANA CANRML");
-    GEL_WatchAdd("*(long *)0x6010,x","eCANA CANRFP");
-    GEL_WatchAdd("*(long *)0x6014,x","eCANA CANMC");
-    GEL_WatchAdd("*(long *)0x6016,x","eCANA CANBTC");
-    GEL_WatchAdd("*(long *)0x6018,x","eCANA CANES");
-    GEL_WatchAdd("*(long *)0x601A,x","eCANA CANTEC");
-    GEL_WatchAdd("*(long *)0x601C,x","eCANA CANREC");
-    GEL_WatchAdd("*(long *)0x601E,x","eCANA CANGIF0");
-    GEL_WatchAdd("*(long *)0x6020,x","eCANA CANGIM");
-    GEL_WatchAdd("*(long *)0x6022,x","eCANA CANGIF1");
-    GEL_WatchAdd("*(long *)0x6024,x","eCANA CANMIM");
-    GEL_WatchAdd("*(long *)0x6026,x","eCANA CANMIL");
-    GEL_WatchAdd("*(long *)0x6028,x","eCANA CANOPC");
-    GEL_WatchAdd("*(long *)0x602A,x","eCANA CANTIOC");
-    GEL_WatchAdd("*(long *)0x602C,x","eCANA CANRIOC");
-    GEL_WatchAdd("*(long *)0x602E,x","eCANA CANLNT");
-    GEL_WatchAdd("*(long *)0x6030,x","eCANA CANTOC");
-    GEL_WatchAdd("*(long *)0x6032,x","eCANA CANTOS");
-}
-hotmenu eCAN_A_Mailbox_0_to_1_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6040,x","eCANA LAM0");
-    GEL_WatchAdd("*(long *)0x6080,x","eCANA MOTS0");
-    GEL_WatchAdd("*(long *)0x60C0,x","eCANA MOTO0");
-    GEL_WatchAdd("*(long *)0x6100,x","eCANA MID0");
-    GEL_WatchAdd("*(long *)0x6102,x","eCANA MCF0");
-    GEL_WatchAdd("*(long *)0x6104,x","eCANA MDL0");
-    GEL_WatchAdd("*(long *)0x6106,x","eCANA MDH0");
-    
-    GEL_WatchAdd("*(long *)0x6042,x","eCANA LAM1");
-    GEL_WatchAdd("*(long *)0x6082,x","eCANA MOTS1");
-    GEL_WatchAdd("*(long *)0x60C2,x","eCANA MOTO1");
-    GEL_WatchAdd("*(long *)0x6108,x","eCANA MID1");
-    GEL_WatchAdd("*(long *)0x610A,x","eCANA MCF1");
-    GEL_WatchAdd("*(long *)0x610C,x","eCANA MDL1");
-    GEL_WatchAdd("*(long *)0x610E,x","eCANA MDH1");
-}
-hotmenu eCAN_A_Mailbox_2_to_3_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6044,x","eCANA LAM2");
-    GEL_WatchAdd("*(long *)0x6084,x","eCANA MOTS2");
-    GEL_WatchAdd("*(long *)0x60C4,x","eCANA MOTO2");
-    GEL_WatchAdd("*(long *)0x6110,x","eCANA MID2");
-    GEL_WatchAdd("*(long *)0x6112,x","eCANA MCF2");
-    GEL_WatchAdd("*(long *)0x6114,x","eCANA MDL2");
-    GEL_WatchAdd("*(long *)0x6116,x","eCANA MDH2");
-
-    GEL_WatchAdd("*(long *)0x6046,x","eCANA LAM3");
-    GEL_WatchAdd("*(long *)0x6086,x","eCANA MOTS3");
-    GEL_WatchAdd("*(long *)0x60C6,x","eCANA MOTO3");
-    GEL_WatchAdd("*(long *)0x6118,x","eCANA MID3");
-    GEL_WatchAdd("*(long *)0x611A,x","eCANA MCF3");
-    GEL_WatchAdd("*(long *)0x611C,x","eCANA MDL3");
-    GEL_WatchAdd("*(long *)0x611E,x","eCANA MDH3");
-}
-hotmenu eCAN_A_Mailbox_4_to_5_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6048,x","eCANA LAM4");
-    GEL_WatchAdd("*(long *)0x6088,x","eCANA MOTS4");
-    GEL_WatchAdd("*(long *)0x60C8,x","eCANA MOTO4");
-    GEL_WatchAdd("*(long *)0x6120,x","eCANA MID4");
-    GEL_WatchAdd("*(long *)0x6122,x","eCANA MCF4");
-    GEL_WatchAdd("*(long *)0x6124,x","eCANA MDL4");
-    GEL_WatchAdd("*(long *)0x6126,x","eCANA MDH4");
-    
-    GEL_WatchAdd("*(long *)0x604A,x","eCANA LAM5");
-    GEL_WatchAdd("*(long *)0x608A,x","eCANA MOTS5");
-    GEL_WatchAdd("*(long *)0x60CA,x","eCANA MOTO5");
-    GEL_WatchAdd("*(long *)0x6128,x","eCANA MID5");
-    GEL_WatchAdd("*(long *)0x612A,x","eCANA MCF5");
-    GEL_WatchAdd("*(long *)0x612C,x","eCANA MDL5");
-    GEL_WatchAdd("*(long *)0x612E,x","eCANA MDH5");
-}
-hotmenu eCAN_A_Mailbox_6_to_7_Regs()
-{
-    GEL_WatchAdd("*(long *)0x604C,x","eCANA LAM6");
-    GEL_WatchAdd("*(long *)0x608C,x","eCANA MOTS6");
-    GEL_WatchAdd("*(long *)0x60CC,x","eCANA MOTO6");
-    GEL_WatchAdd("*(long *)0x6130,x","eCANA MID6");
-    GEL_WatchAdd("*(long *)0x6132,x","eCANA MCF6");
-    GEL_WatchAdd("*(long *)0x6134,x","eCANA MDL6");
-    GEL_WatchAdd("*(long *)0x6136,x","eCANA MDH6");
-    
-    GEL_WatchAdd("*(long *)0x604E,x","eCANA LAM7");
-    GEL_WatchAdd("*(long *)0x608E,x","eCANA MOTS7");
-    GEL_WatchAdd("*(long *)0x60CE,x","eCANA MOTO7");
-    GEL_WatchAdd("*(long *)0x6138,x","eCANA MID7");
-    GEL_WatchAdd("*(long *)0x613A,x","eCANA MCF7");
-    GEL_WatchAdd("*(long *)0x613C,x","eCANA MDL7");
-    GEL_WatchAdd("*(long *)0x613E,x","eCANA MDH7");
-}
-hotmenu eCAN_A_Mailbox_8_to_9_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6050,x","eCANA LAM8");
-    GEL_WatchAdd("*(long *)0x6090,x","eCANA MOTS8");
-    GEL_WatchAdd("*(long *)0x60D0,x","eCANA MOTO8");
-    GEL_WatchAdd("*(long *)0x6140,x","eCANA MID8");
-    GEL_WatchAdd("*(long *)0x6142,x","eCANA MCF8");
-    GEL_WatchAdd("*(long *)0x6144,x","eCANA MDL8");
-    GEL_WatchAdd("*(long *)0x6146,x","eCANA MDH8");
-
-    GEL_WatchAdd("*(long *)0x6052,x","eCANA LAM9");
-    GEL_WatchAdd("*(long *)0x6092,x","eCANA MOTS9");
-    GEL_WatchAdd("*(long *)0x60D2,x","eCANA MOTO9");
-    GEL_WatchAdd("*(long *)0x6148,x","eCANA MID9");
-    GEL_WatchAdd("*(long *)0x614A,x","eCANA MCF9");
-    GEL_WatchAdd("*(long *)0x614C,x","eCANA MDL9");
-    GEL_WatchAdd("*(long *)0x614E,x","eCANA MDH9");
-}
-hotmenu eCAN_A_Mailbox_10_to_11_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6054,x","eCANA LAM10");
-    GEL_WatchAdd("*(long *)0x6094,x","eCANA MOTS10");
-    GEL_WatchAdd("*(long *)0x60D4,x","eCANA MOTO10");
-    GEL_WatchAdd("*(long *)0x6150,x","eCANA MID10");
-    GEL_WatchAdd("*(long *)0x6152,x","eCANA MCF10");
-    GEL_WatchAdd("*(long *)0x6154,x","eCANA MDL10");
-    GEL_WatchAdd("*(long *)0x6156,x","eCANA MDH10");
-
-    GEL_WatchAdd("*(long *)0x6056,x","eCANA LAM11");
-    GEL_WatchAdd("*(long *)0x6096,x","eCANA MOTS11");
-    GEL_WatchAdd("*(long *)0x60D6,x","eCANA MOTO11");
-    GEL_WatchAdd("*(long *)0x6158,x","eCANA MID11");
-    GEL_WatchAdd("*(long *)0x615A,x","eCANA MCF11");
-    GEL_WatchAdd("*(long *)0x615C,x","eCANA MDL11");
-    GEL_WatchAdd("*(long *)0x615E,x","eCANA MDH11");
-}
-hotmenu eCAN_A_Mailbox_12_to_13_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6058,x","eCANA LAM12");
-    GEL_WatchAdd("*(long *)0x6098,x","eCANA MOTS12");
-    GEL_WatchAdd("*(long *)0x60D8,x","eCANA MOTO12");
-    GEL_WatchAdd("*(long *)0x6160,x","eCANA MID12");
-    GEL_WatchAdd("*(long *)0x6162,x","eCANA MCF12");
-    GEL_WatchAdd("*(long *)0x6164,x","eCANA MDL12");
-    GEL_WatchAdd("*(long *)0x6166,x","eCANA MDH12");
-    
-    GEL_WatchAdd("*(long *)0x605A,x","eCANA LAM13");
-    GEL_WatchAdd("*(long *)0x609A,x","eCANA MOTS13");
-    GEL_WatchAdd("*(long *)0x60DA,x","eCANA MOTO13");
-    GEL_WatchAdd("*(long *)0x6168,x","eCANA MID13");
-    GEL_WatchAdd("*(long *)0x616A,x","eCANA MCF13");
-    GEL_WatchAdd("*(long *)0x616C,x","eCANA MDL13");
-    GEL_WatchAdd("*(long *)0x616E,x","eCANA MDH13");
-}
-hotmenu eCAN_A_Mailbox_14_to_15_Regs()
-{
-    GEL_WatchAdd("*(long *)0x605C,x","eCANA LAM14");
-    GEL_WatchAdd("*(long *)0x609C,x","eCANA MOTS14");
-    GEL_WatchAdd("*(long *)0x60DC,x","eCANA MOTO14");
-    GEL_WatchAdd("*(long *)0x6170,x","eCANA MID14");
-    GEL_WatchAdd("*(long *)0x6172,x","eCANA MCF14");
-    GEL_WatchAdd("*(long *)0x6174,x","eCANA MDL14");
-    GEL_WatchAdd("*(long *)0x6176,x","eCANA MDH14");
-    
-    GEL_WatchAdd("*(long *)0x605E,x","eCANA LAM15");
-    GEL_WatchAdd("*(long *)0x609E,x","eCANA MOTS15");
-    GEL_WatchAdd("*(long *)0x60DE,x","eCANA MOTO15");
-    GEL_WatchAdd("*(long *)0x6178,x","eCANA MID15");
-    GEL_WatchAdd("*(long *)0x617A,x","eCANA MCF15");
-    GEL_WatchAdd("*(long *)0x617C,x","eCANA MDL15");
-    GEL_WatchAdd("*(long *)0x617E,x","eCANA MDH15");
-}
-hotmenu eCAN_A_Mailbox_16_to_17_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6060,x","eCANA LAM16");
-    GEL_WatchAdd("*(long *)0x60A0,x","eCANA MOTS16");
-    GEL_WatchAdd("*(long *)0x60E0,x","eCANA MOTO16");
-    GEL_WatchAdd("*(long *)0x6180,x","eCANA MID16");
-    GEL_WatchAdd("*(long *)0x6182,x","eCANA MCF16");
-    GEL_WatchAdd("*(long *)0x6184,x","eCANA MDL16");
-    GEL_WatchAdd("*(long *)0x6186,x","eCANA MDH16");
-
-    GEL_WatchAdd("*(long *)0x6062,x","eCANA LAM17");
-    GEL_WatchAdd("*(long *)0x60A2,x","eCANA MOTS17");
-    GEL_WatchAdd("*(long *)0x60E2,x","eCANA MOTO17");
-    GEL_WatchAdd("*(long *)0x6188,x","eCANA MID17");
-    GEL_WatchAdd("*(long *)0x618A,x","eCANA MCF17");
-    GEL_WatchAdd("*(long *)0x618C,x","eCANA MDL17");
-    GEL_WatchAdd("*(long *)0x618E,x","eCANA MDH17");
-}
-hotmenu eCAN_A_Mailbox_18_to_19_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6064,x","eCANA LAM18");
-    GEL_WatchAdd("*(long *)0x60A4,x","eCANA MOTS18");
-    GEL_WatchAdd("*(long *)0x60E4,x","eCANA MOTO18");
-    GEL_WatchAdd("*(long *)0x6190,x","eCANA MID18");
-    GEL_WatchAdd("*(long *)0x6192,x","eCANA MCF18");
-    GEL_WatchAdd("*(long *)0x6194,x","eCANA MDL18");
-    GEL_WatchAdd("*(long *)0x6196,x","eCANA MDH18");
-
-    GEL_WatchAdd("*(long *)0x6066,x","eCANA LAM19");
-    GEL_WatchAdd("*(long *)0x60A6,x","eCANA MOTS19");
-    GEL_WatchAdd("*(long *)0x60E6,x","eCANA MOTO19");
-    GEL_WatchAdd("*(long *)0x6198,x","eCANA MID19");
-    GEL_WatchAdd("*(long *)0x619A,x","eCANA MCF19");
-    GEL_WatchAdd("*(long *)0x619C,x","eCANA MDL19");
-    GEL_WatchAdd("*(long *)0x619E,x","eCANA MDH19");
-}
-hotmenu eCAN_A_Mailbox_20_to_21_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6068,x","eCANA LAM20");
-    GEL_WatchAdd("*(long *)0x60A8,x","eCANA MOTS20");
-    GEL_WatchAdd("*(long *)0x60E8,x","eCANA MOTO20");
-    GEL_WatchAdd("*(long *)0x61A0,x","eCANA MID20");
-    GEL_WatchAdd("*(long *)0x61A2,x","eCANA MCF20");
-    GEL_WatchAdd("*(long *)0x61A4,x","eCANA MDL20");
-    GEL_WatchAdd("*(long *)0x61A6,x","eCANA MDH20");
-    
-    GEL_WatchAdd("*(long *)0x606A,x","eCANA LAM21");
-    GEL_WatchAdd("*(long *)0x60AA,x","eCANA MOTS21");
-    GEL_WatchAdd("*(long *)0x60EA,x","eCANA MOTO21");
-    GEL_WatchAdd("*(long *)0x61A8,x","eCANA MID21");
-    GEL_WatchAdd("*(long *)0x61AA,x","eCANA MCF21");
-    GEL_WatchAdd("*(long *)0x61AC,x","eCANA MDL21");
-    GEL_WatchAdd("*(long *)0x61AE,x","eCANA MDH21");
-}
-hotmenu eCAN_A_Mailbox_22_to_23_Regs()
-{
-    GEL_WatchAdd("*(long *)0x606C,x","eCANA LAM22");
-    GEL_WatchAdd("*(long *)0x60AC,x","eCANA MOTS22");
-    GEL_WatchAdd("*(long *)0x60EC,x","eCANA MOTO22");
-    GEL_WatchAdd("*(long *)0x61B0,x","eCANA MID22");
-    GEL_WatchAdd("*(long *)0x61B2,x","eCANA MCF22");
-    GEL_WatchAdd("*(long *)0x61B4,x","eCANA MDL22");
-    GEL_WatchAdd("*(long *)0x61B6,x","eCANA MDH22");
-
-    GEL_WatchAdd("*(long *)0x606E,x","eCANA LAM23");
-    GEL_WatchAdd("*(long *)0x60AE,x","eCANA MOTS23");
-    GEL_WatchAdd("*(long *)0x60EE,x","eCANA MOTO23");
-    GEL_WatchAdd("*(long *)0x61B8,x","eCANA MID23");
-    GEL_WatchAdd("*(long *)0x61BA,x","eCANA MCF23");
-    GEL_WatchAdd("*(long *)0x61BC,x","eCANA MDL23");
-    GEL_WatchAdd("*(long *)0x61BE,x","eCANA MDH23");
-}
-hotmenu eCAN_A_Mailbox_24_to_25_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6070,x","eCANA LAM24");
-    GEL_WatchAdd("*(long *)0x60B0,x","eCANA MOTS24");
-    GEL_WatchAdd("*(long *)0x60F0,x","eCANA MOTO24");
-    GEL_WatchAdd("*(long *)0x61C0,x","eCANA MID24");
-    GEL_WatchAdd("*(long *)0x61C2,x","eCANA MCF24");
-    GEL_WatchAdd("*(long *)0x61C4,x","eCANA MDL24");
-    GEL_WatchAdd("*(long *)0x61C6,x","eCANA MDH24");
-
-    GEL_WatchAdd("*(long *)0x6072,x","eCANA LAM25");
-    GEL_WatchAdd("*(long *)0x60B2,x","eCANA MOTS25");
-    GEL_WatchAdd("*(long *)0x60F2,x","eCANA MOTO25");
-    GEL_WatchAdd("*(long *)0x61C8,x","eCANA MID25");
-    GEL_WatchAdd("*(long *)0x61CA,x","eCANA MCF25");
-    GEL_WatchAdd("*(long *)0x61CC,x","eCANA MDL25");
-    GEL_WatchAdd("*(long *)0x61CE,x","eCANA MDH25");
-}
-hotmenu eCAN_A_Mailbox_26_to_27_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6074,x","eCANA LAM26");
-    GEL_WatchAdd("*(long *)0x60B4,x","eCANA MOTS26");
-    GEL_WatchAdd("*(long *)0x60F4,x","eCANA MOTO26");
-    GEL_WatchAdd("*(long *)0x61D0,x","eCANA MID26");
-    GEL_WatchAdd("*(long *)0x61D2,x","eCANA MCF26");
-    GEL_WatchAdd("*(long *)0x61D4,x","eCANA MDL26");
-    GEL_WatchAdd("*(long *)0x61D6,x","eCANA MDH26");
-
-    GEL_WatchAdd("*(long *)0x6076,x","eCANA LAM27");
-    GEL_WatchAdd("*(long *)0x60B6,x","eCANA MOTS27");
-    GEL_WatchAdd("*(long *)0x60F6,x","eCANA MOTO27");
-    GEL_WatchAdd("*(long *)0x61D8,x","eCANA MID27");
-    GEL_WatchAdd("*(long *)0x61DA,x","eCANA MCF27");
-    GEL_WatchAdd("*(long *)0x61DC,x","eCANA MDL27");
-    GEL_WatchAdd("*(long *)0x61DE,x","eCANA MDH27");
-}
-hotmenu eCAN_A_Mailbox_28_to_29_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6078,x","eCANA LAM28");
-    GEL_WatchAdd("*(long *)0x60B8,x","eCANA MOTS28");
-    GEL_WatchAdd("*(long *)0x60F8,x","eCANA MOTO28");
-    GEL_WatchAdd("*(long *)0x61E0,x","eCANA MID28");
-    GEL_WatchAdd("*(long *)0x61E2,x","eCANA MCF28");
-    GEL_WatchAdd("*(long *)0x61E4,x","eCANA MDL28");
-    GEL_WatchAdd("*(long *)0x61E6,x","eCANA MDH28");
-
-    GEL_WatchAdd("*(long *)0x607A,x","eCANA LAM29");
-    GEL_WatchAdd("*(long *)0x60BA,x","eCANA MOTS29");
-    GEL_WatchAdd("*(long *)0x60FA,x","eCANA MOTO29");
-    GEL_WatchAdd("*(long *)0x61E8,x","eCANA MID29");
-    GEL_WatchAdd("*(long *)0x61EA,x","eCANA MCF29");
-    GEL_WatchAdd("*(long *)0x61EC,x","eCANA MDL29");
-    GEL_WatchAdd("*(long *)0x61EE,x","eCANA MDH29");
-}
-hotmenu eCAN_A_Mailbox_30_to_31_Regs()
-{
-    GEL_WatchAdd("*(long *)0x607C,x","eCANA LAM30");
-    GEL_WatchAdd("*(long *)0x60BC,x","eCANA MOTS30");
-    GEL_WatchAdd("*(long *)0x60FC,x","eCANA MOTO30");
-    GEL_WatchAdd("*(long *)0x61F0,x","eCANA MID30");
-    GEL_WatchAdd("*(long *)0x61F2,x","eCANA MCF30");
-    GEL_WatchAdd("*(long *)0x61F4,x","eCANA MDL30");
-    GEL_WatchAdd("*(long *)0x61F6,x","eCANA MDH30");
-
-    GEL_WatchAdd("*(long *)0x607E,x","eCANA LAM31");
-    GEL_WatchAdd("*(long *)0x60BE,x","eCANA MOTS31");
-    GEL_WatchAdd("*(long *)0x60FE,x","eCANA MOTO31");
-    GEL_WatchAdd("*(long *)0x61F8,x","eCANA MID31");
-    GEL_WatchAdd("*(long *)0x61FA,x","eCANA MCF31");
-    GEL_WatchAdd("*(long *)0x61FC,x","eCANA MDL31");
-    GEL_WatchAdd("*(long *)0x61FE,x","eCANA MDH31");
-}
-hotmenu eCAN_B_Global_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6200,x","eCANB CANME");
-    GEL_WatchAdd("*(long *)0x6202,x","eCANB CANMD");
-    GEL_WatchAdd("*(long *)0x6204,x","eCANB CANTRS");
-    GEL_WatchAdd("*(long *)0x6206,x","eCANB CANTRR");
-    GEL_WatchAdd("*(long *)0x6208,x","eCANB CANTA");
-    GEL_WatchAdd("*(long *)0x620A,x","eCANB CANAA");
-    GEL_WatchAdd("*(long *)0x620C,x","eCANB CANRMP");
-    GEL_WatchAdd("*(long *)0x620E,x","eCANB CANRML");
-    GEL_WatchAdd("*(long *)0x6210,x","eCANB CANRFP");
-    GEL_WatchAdd("*(long *)0x6214,x","eCANB CANMC");
-    GEL_WatchAdd("*(long *)0x6216,x","eCANB CANBTC");
-    GEL_WatchAdd("*(long *)0x6218,x","eCANB CANES");
-    GEL_WatchAdd("*(long *)0x621A,x","eCANB CANTEC");
-    GEL_WatchAdd("*(long *)0x621C,x","eCANB CANREC");
-    GEL_WatchAdd("*(long *)0x621E,x","eCANB CANGIF0");
-    GEL_WatchAdd("*(long *)0x6220,x","eCANB CANGIM");
-    GEL_WatchAdd("*(long *)0x6222,x","eCANB CANGIF1");
-    GEL_WatchAdd("*(long *)0x6224,x","eCANB CANMIM");
-    GEL_WatchAdd("*(long *)0x6226,x","eCANB CANMIL");
-    GEL_WatchAdd("*(long *)0x6228,x","eCANB CANOPC");
-    GEL_WatchAdd("*(long *)0x622A,x","eCANB CANTIOC");
-    GEL_WatchAdd("*(long *)0x622C,x","eCANB CANRIOC");
-    GEL_WatchAdd("*(long *)0x622E,x","eCANB CANLNT");
-    GEL_WatchAdd("*(long *)0x6230,x","eCANB CANTOC");
-    GEL_WatchAdd("*(long *)0x6232,x","eCANB CANTOS");
-}
-hotmenu eCAN_B_Mailbox_0_to_1_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6240,x","eCANB LAM0");
-    GEL_WatchAdd("*(long *)0x6280,x","eCANB MOTS0");
-    GEL_WatchAdd("*(long *)0x62C0,x","eCANB MOTO0");
-    GEL_WatchAdd("*(long *)0x6300,x","eCANB MID0");
-    GEL_WatchAdd("*(long *)0x6302,x","eCANB MCF0");
-    GEL_WatchAdd("*(long *)0x6304,x","eCANB MDL0");
-    GEL_WatchAdd("*(long *)0x6306,x","eCANB MDH0");
-
-    GEL_WatchAdd("*(long *)0x6242,x","eCANB LAM1");
-    GEL_WatchAdd("*(long *)0x6282,x","eCANB MOTS1");
-    GEL_WatchAdd("*(long *)0x62C2,x","eCANB MOTO1");
-    GEL_WatchAdd("*(long *)0x6308,x","eCANB MID1");
-    GEL_WatchAdd("*(long *)0x630A,x","eCANB MCF1");
-    GEL_WatchAdd("*(long *)0x630C,x","eCANB MDL1");
-    GEL_WatchAdd("*(long *)0x630E,x","eCANB MDH1");
-}
-hotmenu eCAN_B_Mailbox_2_to_3_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6244,x","eCANB LAM2");
-    GEL_WatchAdd("*(long *)0x6284,x","eCANB MOTS2");
-    GEL_WatchAdd("*(long *)0x62C4,x","eCANB MOTO2");
-    GEL_WatchAdd("*(long *)0x6310,x","eCANB MID2");
-    GEL_WatchAdd("*(long *)0x6312,x","eCANB MCF2");
-    GEL_WatchAdd("*(long *)0x6314,x","eCANB MDL2");
-    GEL_WatchAdd("*(long *)0x6316,x","eCANB MDH2");
-
-    GEL_WatchAdd("*(long *)0x6246,x","eCANB LAM3");
-    GEL_WatchAdd("*(long *)0x6286,x","eCANB MOTS3");
-    GEL_WatchAdd("*(long *)0x62C6,x","eCANB MOTO3");
-    GEL_WatchAdd("*(long *)0x6318,x","eCANB MID3");
-    GEL_WatchAdd("*(long *)0x631A,x","eCANB MCF3");
-    GEL_WatchAdd("*(long *)0x631C,x","eCANB MDL3");
-    GEL_WatchAdd("*(long *)0x631E,x","eCANB MDH3");
-}
-hotmenu eCAN_B_Mailbox_4_to_5_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6248,x","eCANB LAM4");
-    GEL_WatchAdd("*(long *)0x6288,x","eCANB MOTS4");
-    GEL_WatchAdd("*(long *)0x62C8,x","eCANB MOTO4");
-    GEL_WatchAdd("*(long *)0x6320,x","eCANB MID4");
-    GEL_WatchAdd("*(long *)0x6322,x","eCANB MCF4");
-    GEL_WatchAdd("*(long *)0x6324,x","eCANB MDL4");
-    GEL_WatchAdd("*(long *)0x6326,x","eCANB MDH4");
-
-    GEL_WatchAdd("*(long *)0x624A,x","eCANB LAM5");
-    GEL_WatchAdd("*(long *)0x628A,x","eCANB MOTS5");
-    GEL_WatchAdd("*(long *)0x62CA,x","eCANB MOTO5");
-    GEL_WatchAdd("*(long *)0x6328,x","eCANB MID5");
-    GEL_WatchAdd("*(long *)0x632A,x","eCANB MCF5");
-    GEL_WatchAdd("*(long *)0x632C,x","eCANB MDL5");
-    GEL_WatchAdd("*(long *)0x632E,x","eCANB MDH5");
-}
-hotmenu eCAN_B_Mailbox_6_to_7_Regs()
-{
-    GEL_WatchAdd("*(long *)0x624C,x","eCANB LAM6");
-    GEL_WatchAdd("*(long *)0x628C,x","eCANB MOTS6");
-    GEL_WatchAdd("*(long *)0x62CC,x","eCANB MOTO6");
-    GEL_WatchAdd("*(long *)0x6330,x","eCANB MID6");
-    GEL_WatchAdd("*(long *)0x6332,x","eCANB MCF6");
-    GEL_WatchAdd("*(long *)0x6334,x","eCANB MDL6");
-    GEL_WatchAdd("*(long *)0x6336,x","eCANB MDH6");
-
-    GEL_WatchAdd("*(long *)0x624E,x","eCANB LAM7");
-    GEL_WatchAdd("*(long *)0x628E,x","eCANB MOTS7");
-    GEL_WatchAdd("*(long *)0x62CE,x","eCANB MOTO7");
-    GEL_WatchAdd("*(long *)0x6338,x","eCANB MID7");
-    GEL_WatchAdd("*(long *)0x633A,x","eCANB MCF7");
-    GEL_WatchAdd("*(long *)0x633C,x","eCANB MDL7");
-    GEL_WatchAdd("*(long *)0x633E,x","eCANB MDH7");
-}
-hotmenu eCAN_B_Mailbox_8_to_9_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6250,x","eCANB LAM8");
-    GEL_WatchAdd("*(long *)0x6290,x","eCANB MOTS8");
-    GEL_WatchAdd("*(long *)0x62D0,x","eCANB MOTO8");
-    GEL_WatchAdd("*(long *)0x6340,x","eCANB MID8");
-    GEL_WatchAdd("*(long *)0x6342,x","eCANB MCF8");
-    GEL_WatchAdd("*(long *)0x6344,x","eCANB MDL8");
-    GEL_WatchAdd("*(long *)0x6346,x","eCANB MDH8");
-
-    GEL_WatchAdd("*(long *)0x6252,x","eCANB LAM9");
-    GEL_WatchAdd("*(long *)0x6292,x","eCANB MOTS9");
-    GEL_WatchAdd("*(long *)0x62D2,x","eCANB MOTO9");
-    GEL_WatchAdd("*(long *)0x6348,x","eCANB MID9");
-    GEL_WatchAdd("*(long *)0x634A,x","eCANB MCF9");
-    GEL_WatchAdd("*(long *)0x634C,x","eCANB MDL9");
-    GEL_WatchAdd("*(long *)0x634E,x","eCANB MDH9");
-}
-hotmenu eCAN_B_Mailbox_10_to_11_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6254,x","eCANB LAM10");
-    GEL_WatchAdd("*(long *)0x6294,x","eCANB MOTS10");
-    GEL_WatchAdd("*(long *)0x62D4,x","eCANB MOTO10");
-    GEL_WatchAdd("*(long *)0x6350,x","eCANB MID10");
-    GEL_WatchAdd("*(long *)0x6352,x","eCANB MCF10");
-    GEL_WatchAdd("*(long *)0x6354,x","eCANB MDL10");
-    GEL_WatchAdd("*(long *)0x6356,x","eCANB MDH10");
-
-    GEL_WatchAdd("*(long *)0x6256,x","eCANB LAM11");
-    GEL_WatchAdd("*(long *)0x6296,x","eCANB MOTS11");
-    GEL_WatchAdd("*(long *)0x62D6,x","eCANB MOTO11");
-    GEL_WatchAdd("*(long *)0x6358,x","eCANB MID11");
-    GEL_WatchAdd("*(long *)0x635A,x","eCANB MCF11");
-    GEL_WatchAdd("*(long *)0x635C,x","eCANB MDL11");
-    GEL_WatchAdd("*(long *)0x635E,x","eCANB MDH11");
-}
-hotmenu eCAN_B_Mailbox_12_to_13_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6258,x","eCANB LAM12");
-    GEL_WatchAdd("*(long *)0x6298,x","eCANB MOTS12");
-    GEL_WatchAdd("*(long *)0x62D8,x","eCANB MOTO12");
-    GEL_WatchAdd("*(long *)0x6360,x","eCANB MID12");
-    GEL_WatchAdd("*(long *)0x6362,x","eCANB MCF12");
-    GEL_WatchAdd("*(long *)0x6364,x","eCANB MDL12");
-    GEL_WatchAdd("*(long *)0x6366,x","eCANB MDH12");
-
-    GEL_WatchAdd("*(long *)0x625A,x","eCANB LAM13");
-    GEL_WatchAdd("*(long *)0x629A,x","eCANB MOTS13");
-    GEL_WatchAdd("*(long *)0x62DA,x","eCANB MOTO13");
-    GEL_WatchAdd("*(long *)0x6368,x","eCANB MID13");
-    GEL_WatchAdd("*(long *)0x636A,x","eCANB MCF13");
-    GEL_WatchAdd("*(long *)0x636C,x","eCANB MDL13");
-    GEL_WatchAdd("*(long *)0x636E,x","eCANB MDH13");
-}
-hotmenu eCAN_B_Mailbox_14_to_15_Regs()
-{
-    GEL_WatchAdd("*(long *)0x625C,x","eCANB LAM14");
-    GEL_WatchAdd("*(long *)0x629C,x","eCANB MOTS14");
-    GEL_WatchAdd("*(long *)0x62DC,x","eCANB MOTO14");
-    GEL_WatchAdd("*(long *)0x6370,x","eCANB MID14");
-    GEL_WatchAdd("*(long *)0x6372,x","eCANB MCF14");
-    GEL_WatchAdd("*(long *)0x6374,x","eCANB MDL14");
-    GEL_WatchAdd("*(long *)0x6376,x","eCANB MDH14");
-
-    GEL_WatchAdd("*(long *)0x625E,x","eCANB LAM15");
-    GEL_WatchAdd("*(long *)0x629E,x","eCANB MOTS15");
-    GEL_WatchAdd("*(long *)0x62DE,x","eCANB MOTO15");
-    GEL_WatchAdd("*(long *)0x6378,x","eCANB MID15");
-    GEL_WatchAdd("*(long *)0x637A,x","eCANB MCF15");
-    GEL_WatchAdd("*(long *)0x637C,x","eCANB MDL15");
-    GEL_WatchAdd("*(long *)0x637E,x","eCANB MDH15");
-}
-hotmenu eCAN_B_Mailbox_16_to_17_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6260,x","eCANB LAM16");
-    GEL_WatchAdd("*(long *)0x62A0,x","eCANB MOTS16");
-    GEL_WatchAdd("*(long *)0x62E0,x","eCANB MOTO16");
-    GEL_WatchAdd("*(long *)0x6380,x","eCANB MID16");
-    GEL_WatchAdd("*(long *)0x6382,x","eCANB MCF16");
-    GEL_WatchAdd("*(long *)0x6384,x","eCANB MDL16");
-    GEL_WatchAdd("*(long *)0x6386,x","eCANB MDH16");
-
-    GEL_WatchAdd("*(long *)0x6262,x","eCANB LAM17");
-    GEL_WatchAdd("*(long *)0x62A2,x","eCANB MOTS17");
-    GEL_WatchAdd("*(long *)0x62E2,x","eCANB MOTO17");
-    GEL_WatchAdd("*(long *)0x6388,x","eCANB MID17");
-    GEL_WatchAdd("*(long *)0x638A,x","eCANB MCF17");
-    GEL_WatchAdd("*(long *)0x638C,x","eCANB MDL17");
-    GEL_WatchAdd("*(long *)0x638E,x","eCANB MDH17");
-}
-hotmenu eCAN_B_Mailbox_18_to_19_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6264,x","eCANB LAM18");
-    GEL_WatchAdd("*(long *)0x62A4,x","eCANB MOTS18");
-    GEL_WatchAdd("*(long *)0x62E4,x","eCANB MOTO18");
-    GEL_WatchAdd("*(long *)0x6390,x","eCANB MID18");
-    GEL_WatchAdd("*(long *)0x6392,x","eCANB MCF18");
-    GEL_WatchAdd("*(long *)0x6394,x","eCANB MDL18");
-    GEL_WatchAdd("*(long *)0x6396,x","eCANB MDH18");
-
-    GEL_WatchAdd("*(long *)0x6266,x","eCANB LAM19");
-    GEL_WatchAdd("*(long *)0x62A6,x","eCANB MOTS19");
-    GEL_WatchAdd("*(long *)0x62E6,x","eCANB MOTO19");
-    GEL_WatchAdd("*(long *)0x6398,x","eCANB MID19");
-    GEL_WatchAdd("*(long *)0x639A,x","eCANB MCF19");
-    GEL_WatchAdd("*(long *)0x639C,x","eCANB MDL19");
-    GEL_WatchAdd("*(long *)0x639E,x","eCANB MDH19");
-}
-hotmenu eCAN_B_Mailbox_20_to_21_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6268,x","eCANB LAM20");
-    GEL_WatchAdd("*(long *)0x62A8,x","eCANB MOTS20");
-    GEL_WatchAdd("*(long *)0x62E8,x","eCANB MOTO20");
-    GEL_WatchAdd("*(long *)0x63A0,x","eCANB MID20");
-    GEL_WatchAdd("*(long *)0x63A2,x","eCANB MCF20");
-    GEL_WatchAdd("*(long *)0x63A4,x","eCANB MDL20");
-    GEL_WatchAdd("*(long *)0x63A6,x","eCANB MDH20");
-
-    GEL_WatchAdd("*(long *)0x626A,x","eCANB LAM21");
-    GEL_WatchAdd("*(long *)0x62AA,x","eCANB MOTS21");
-    GEL_WatchAdd("*(long *)0x62EA,x","eCANB MOTO21");
-    GEL_WatchAdd("*(long *)0x63A8,x","eCANB MID21");
-    GEL_WatchAdd("*(long *)0x63AA,x","eCANB MCF21");
-    GEL_WatchAdd("*(long *)0x63AC,x","eCANB MDL21");
-    GEL_WatchAdd("*(long *)0x63AE,x","eCANB MDH21");
-}
-hotmenu eCAN_B_Mailbox_22_to_23_Regs()
-{
-    GEL_WatchAdd("*(long *)0x626C,x","eCANB LAM22");
-    GEL_WatchAdd("*(long *)0x62AC,x","eCANB MOTS22");
-    GEL_WatchAdd("*(long *)0x62EC,x","eCANB MOTO22");
-    GEL_WatchAdd("*(long *)0x63B0,x","eCANB MID22");
-    GEL_WatchAdd("*(long *)0x63B2,x","eCANB MCF22");
-    GEL_WatchAdd("*(long *)0x63B4,x","eCANB MDL22");
-    GEL_WatchAdd("*(long *)0x63B6,x","eCANB MDH22");
-
-    GEL_WatchAdd("*(long *)0x626E,x","eCANB LAM23");
-    GEL_WatchAdd("*(long *)0x62AE,x","eCANB MOTS23");
-    GEL_WatchAdd("*(long *)0x62EE,x","eCANB MOTO23");
-    GEL_WatchAdd("*(long *)0x63B8,x","eCANB MID23");
-    GEL_WatchAdd("*(long *)0x63BA,x","eCANB MCF23");
-    GEL_WatchAdd("*(long *)0x63BC,x","eCANB MDL23");
-    GEL_WatchAdd("*(long *)0x63BE,x","eCANB MDH23");
-}
-hotmenu eCAN_B_Mailbox_24_to_25_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6270,x","eCANB LAM24");
-    GEL_WatchAdd("*(long *)0x62B0,x","eCANB MOTS24");
-    GEL_WatchAdd("*(long *)0x62F0,x","eCANB MOTO24");
-    GEL_WatchAdd("*(long *)0x63C0,x","eCANB MID24");
-    GEL_WatchAdd("*(long *)0x63C2,x","eCANB MCF24");
-    GEL_WatchAdd("*(long *)0x63C4,x","eCANB MDL24");
-    GEL_WatchAdd("*(long *)0x63C6,x","eCANB MDH24");
-
-    GEL_WatchAdd("*(long *)0x6272,x","eCANB LAM25");
-    GEL_WatchAdd("*(long *)0x62B2,x","eCANB MOTS25");
-    GEL_WatchAdd("*(long *)0x62F2,x","eCANB MOTO25");
-    GEL_WatchAdd("*(long *)0x63C8,x","eCANB MID25");
-    GEL_WatchAdd("*(long *)0x63CA,x","eCANB MCF25");
-    GEL_WatchAdd("*(long *)0x63CC,x","eCANB MDL25");
-    GEL_WatchAdd("*(long *)0x63CE,x","eCANB MDH25");
-}
-hotmenu eCAN_B_Mailbox_26_to_27_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6274,x","eCANB LAM26");
-    GEL_WatchAdd("*(long *)0x62B4,x","eCANB MOTS26");
-    GEL_WatchAdd("*(long *)0x62F4,x","eCANB MOTO26");
-    GEL_WatchAdd("*(long *)0x63D0,x","eCANB MID26");
-    GEL_WatchAdd("*(long *)0x63D2,x","eCANB MCF26");
-    GEL_WatchAdd("*(long *)0x63D4,x","eCANB MDL26");
-    GEL_WatchAdd("*(long *)0x63D6,x","eCANB MDH26");
-
-    GEL_WatchAdd("*(long *)0x6276,x","eCANB LAM27");
-    GEL_WatchAdd("*(long *)0x62B6,x","eCANB MOTS27");
-    GEL_WatchAdd("*(long *)0x62F6,x","eCANB MOTO27");
-    GEL_WatchAdd("*(long *)0x63D8,x","eCANB MID27");
-    GEL_WatchAdd("*(long *)0x63DA,x","eCANB MCF27");
-    GEL_WatchAdd("*(long *)0x63DC,x","eCANB MDL27");
-    GEL_WatchAdd("*(long *)0x63DE,x","eCANB MDH27");
-}
-hotmenu eCAN_B_Mailbox_28_to_29_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6278,x","eCANB LAM28");
-    GEL_WatchAdd("*(long *)0x62B8,x","eCANB MOTS28");
-    GEL_WatchAdd("*(long *)0x62F8,x","eCANB MOTO28");
-    GEL_WatchAdd("*(long *)0x63E0,x","eCANB MID28");
-    GEL_WatchAdd("*(long *)0x63E2,x","eCANB MCF28");
-    GEL_WatchAdd("*(long *)0x63E4,x","eCANB MDL28");
-    GEL_WatchAdd("*(long *)0x63E6,x","eCANB MDH28");
-
-    GEL_WatchAdd("*(long *)0x627A,x","eCANB LAM29");
-    GEL_WatchAdd("*(long *)0x62BA,x","eCANB MOTS29");
-    GEL_WatchAdd("*(long *)0x62FA,x","eCANB MOTO29");
-    GEL_WatchAdd("*(long *)0x63E8,x","eCANB MID29");
-    GEL_WatchAdd("*(long *)0x63EA,x","eCANB MCF29");
-    GEL_WatchAdd("*(long *)0x63EC,x","eCANB MDL29");
-    GEL_WatchAdd("*(long *)0x63EE,x","eCANB MDH29");
-}
-hotmenu eCAN_B_Mailbox_30_to_31_Regs()
-{
-    GEL_WatchAdd("*(long *)0x627C,x","eCANB LAM30");
-    GEL_WatchAdd("*(long *)0x62BC,x","eCANB MOTS30");
-    GEL_WatchAdd("*(long *)0x62FC,x","eCANB MOTO30");
-    GEL_WatchAdd("*(long *)0x63F0,x","eCANB MID30");
-    GEL_WatchAdd("*(long *)0x63F2,x","eCANB MCF30");
-    GEL_WatchAdd("*(long *)0x63F4,x","eCANB MDL30");
-    GEL_WatchAdd("*(long *)0x63F6,x","eCANB MDH30");
-
-    GEL_WatchAdd("*(long *)0x627E,x","eCANB LAM31");
-    GEL_WatchAdd("*(long *)0x62BE,x","eCANB MOTS31");
-    GEL_WatchAdd("*(long *)0x62FE,x","eCANB MOTO31");
-    GEL_WatchAdd("*(long *)0x63F8,x","eCANB MID31");
-    GEL_WatchAdd("*(long *)0x63FA,x","eCANB MCF31");
-    GEL_WatchAdd("*(long *)0x63FC,x","eCANB MDL31");
-    GEL_WatchAdd("*(long *)0x63FE,x","eCANB MDH31");
-}
-
-
-/********************************************************************/
-/* Enhanced Capture Registers                                       */
-/********************************************************************/
-menuitem "Watch eCAP Registers";
-
-hotmenu eCAP1_All_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6A00,x","eCAP1 TSCNT");
-    GEL_WatchAdd("*(long *)0x6A02,x","eCAP1 CNTPHS");
-    GEL_WatchAdd("*(long *)0x6A04,x","eCAP1 CAP1");
-    GEL_WatchAdd("*(long *)0x6A06,x","eCAP1 CAP2");
-    GEL_WatchAdd("*(long *)0x6A08,x","eCAP1 CAP3");
-    GEL_WatchAdd("*(long *)0x6A0A,x","eCAP1 CAP4");
-    GEL_WatchAdd("*0x6A14,x","eCAP1 ECCTL1");
-    GEL_WatchAdd("*0x6A15,x","eCAP1 ECCTL2");
-    GEL_WatchAdd("*0x6A16,x","eCAP1 ECEINT");
-    GEL_WatchAdd("*0x6A17,x","eCAP1 ECFLG");
-    GEL_WatchAdd("*0x6A18,x","eCAP1 ECCLR");
-    GEL_WatchAdd("*0x6A19,x","eCAP1 ECFRC");
-}
-hotmenu eCAP2_All_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6A20,x","eCAP2 TSCNT");
-    GEL_WatchAdd("*(long *)0x6A22,x","eCAP2 CNTPHS");
-    GEL_WatchAdd("*(long *)0x6A24,x","eCAP2 CAP1");
-    GEL_WatchAdd("*(long *)0x6A26,x","eCAP2 CAP2");
-    GEL_WatchAdd("*(long *)0x6A28,x","eCAP2 CAP3");
-    GEL_WatchAdd("*(long *)0x6A2A,x","eCAP2 CAP4");
-    GEL_WatchAdd("*0x6A34,x","eCAP2 ECCTL1");
-    GEL_WatchAdd("*0x6A35,x","eCAP2 ECCTL2");
-    GEL_WatchAdd("*0x6A36,x","eCAP2 ECEINT");
-    GEL_WatchAdd("*0x6A37,x","eCAP2 ECFLG");
-    GEL_WatchAdd("*0x6A38,x","eCAP2 ECCLR");
-    GEL_WatchAdd("*0x6A39,x","eCAP2 ECFRC");
-}
-hotmenu eCAP3_All_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6A40,x","eCAP3 TSCNT");
-    GEL_WatchAdd("*(long *)0x6A42,x","eCAP3 CNTPHS");
-    GEL_WatchAdd("*(long *)0x6A44,x","eCAP3 CAP1");
-    GEL_WatchAdd("*(long *)0x6A46,x","eCAP3 CAP2");
-    GEL_WatchAdd("*(long *)0x6A48,x","eCAP3 CAP3");
-    GEL_WatchAdd("*(long *)0x6A4A,x","eCAP3 CAP4");
-    GEL_WatchAdd("*0x6A54,x","eCAP3 ECCTL1");
-    GEL_WatchAdd("*0x6A55,x","eCAP3 ECCTL2");
-    GEL_WatchAdd("*0x6A56,x","eCAP3 ECEINT");
-    GEL_WatchAdd("*0x6A57,x","eCAP3 ECFLG");
-    GEL_WatchAdd("*0x6A58,x","eCAP3 ECCLR");
-    GEL_WatchAdd("*0x6A59,x","eCAP3 ECFRC");
-}
-hotmenu eCAP4_All_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6A60,x","eCAP4 TSCNT");
-    GEL_WatchAdd("*(long *)0x6A62,x","eCAP4 CNTPHS");
-    GEL_WatchAdd("*(long *)0x6A64,x","eCAP4 CAP1");
-    GEL_WatchAdd("*(long *)0x6A66,x","eCAP4 CAP2");
-    GEL_WatchAdd("*(long *)0x6A68,x","eCAP4 CAP3");
-    GEL_WatchAdd("*(long *)0x6A6A,x","eCAP4 CAP4");
-    GEL_WatchAdd("*0x6A74,x","eCAP4 ECCTL1");
-    GEL_WatchAdd("*0x6A75,x","eCAP4 ECCTL2");
-    GEL_WatchAdd("*0x6A76,x","eCAP4 ECEINT");
-    GEL_WatchAdd("*0x6A77,x","eCAP4 ECFLG");
-    GEL_WatchAdd("*0x6A78,x","eCAP4 ECCLR");
-    GEL_WatchAdd("*0x6A79,x","eCAP4 ECFRC");
-}
-hotmenu eCAP5_All_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6A80,x","eCAP5 TSCNT");
-    GEL_WatchAdd("*(long *)0x6A82,x","eCAP5 CNTPHS");
-    GEL_WatchAdd("*(long *)0x6A84,x","eCAP5 CAP1");
-    GEL_WatchAdd("*(long *)0x6A86,x","eCAP5 CAP2");
-    GEL_WatchAdd("*(long *)0x6A88,x","eCAP5 CAP3");
-    GEL_WatchAdd("*(long *)0x6A8A,x","eCAP5 CAP4");
-    GEL_WatchAdd("*0x6A94,x","eCAP5 ECCTL1");
-    GEL_WatchAdd("*0x6A95,x","eCAP5 ECCTL2");
-    GEL_WatchAdd("*0x6A96,x","eCAP5 ECEINT");
-    GEL_WatchAdd("*0x6A97,x","eCAP5 ECFLG");
-    GEL_WatchAdd("*0x6A98,x","eCAP5 ECCLR");
-    GEL_WatchAdd("*0x6A99,x","eCAP5 ECFRC");
-}
-hotmenu eCAP6_All_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6AA0,x","eCAP6 TSCNT");
-    GEL_WatchAdd("*(long *)0x6AA2,x","eCAP6 CNTPHS");
-    GEL_WatchAdd("*(long *)0x6AA4,x","eCAP6 CAP1");
-    GEL_WatchAdd("*(long *)0x6AA6,x","eCAP6 CAP2");
-    GEL_WatchAdd("*(long *)0x6AA8,x","eCAP6 CAP3");
-    GEL_WatchAdd("*(long *)0x6AAA,x","eCAP6 CAP4");
-    GEL_WatchAdd("*0x6AB4,x","eCAP6 ECCTL1");
-    GEL_WatchAdd("*0x6AB5,x","eCAP6 ECCTL2");
-    GEL_WatchAdd("*0x6AB6,x","eCAP6 ECEINT");
-    GEL_WatchAdd("*0x6AB7,x","eCAP6 ECFLG");
-    GEL_WatchAdd("*0x6AB8,x","eCAP6 ECCLR");
-    GEL_WatchAdd("*0x6AB9,x","eCAP6 ECFRC");
-}
-
-
-/********************************************************************/
-/* Enhanced PWM Registers                                           */
-/********************************************************************/
-menuitem "Watch ePWM Registers";
-
-hotmenu ePWM1_All_Regs()
-{
-    GEL_WatchAdd("*0x6800,x","ePWM1 TBCTL");
-    GEL_WatchAdd("*0x6801,x","ePWM1 TBSTS");
-    GEL_WatchAdd("*0x6802,x","ePWM1 TBPHSHR");
-    GEL_WatchAdd("*0x6803,x","ePWM1 TBPHS");
-    GEL_WatchAdd("*0x6804,x","ePWM1 TBCTR");
-    GEL_WatchAdd("*0x6805,x","ePWM1 TBPRD");
-    GEL_WatchAdd("*0x6807,x","ePWM1 CMPCTL");
-    GEL_WatchAdd("*0x6808,x","ePWM1 CMPAHR");
-    GEL_WatchAdd("*0x6809,x","ePWM1 CMPA");
-    GEL_WatchAdd("*0x680A,x","ePWM1 CMPB");
-    GEL_WatchAdd("*0x680B,x","ePWM1 AQCTLA");
-    GEL_WatchAdd("*0x680C,x","ePWM1 AQCTLB");
-    GEL_WatchAdd("*0x680D,x","ePWM1 AQSFRC");
-    GEL_WatchAdd("*0x680E,x","ePWM1 AQCSFRC");
-    GEL_WatchAdd("*0x680F,x","ePWM1 DBCTL");
-    GEL_WatchAdd("*0x6810,x","ePWM1 DBRED");
-    GEL_WatchAdd("*0x6811,x","ePWM1 DBFED");
-    GEL_WatchAdd("*0x6812,x","ePWM1 TZSEL");
-    GEL_WatchAdd("*0x6813,x","ePWM1 TZDCSEL");
-    GEL_WatchAdd("*0x6814,x","ePWM1 TZCTL");
-    GEL_WatchAdd("*0x6815,x","ePWM1 TZEINT");
-    GEL_WatchAdd("*0x6816,x","ePWM1 TZFLG");
-    GEL_WatchAdd("*0x6817,x","ePWM1 TZCLR");
-    GEL_WatchAdd("*0x6818,x","ePWM1 TZFRC");
-    GEL_WatchAdd("*0x6819,x","ePWM1 ETSEL");
-    GEL_WatchAdd("*0x681A,x","ePWM1 ETPS");
-    GEL_WatchAdd("*0x681B,x","ePWM1 ETFLG");
-    GEL_WatchAdd("*0x681C,x","ePWM1 ETCLR");
-    GEL_WatchAdd("*0x681D,x","ePWM1 ETFRC");
-    GEL_WatchAdd("*0x681E,x","ePWM1 PCCTL");
-    GEL_WatchAdd("*0x6820,x","ePWM1 HRCNFG");
-}
-hotmenu ePWM1_TB_Regs()
-{
-    GEL_WatchAdd("*0x6800,x","ePWM1 TBCTL");
-    GEL_WatchAdd("*0x6801,x","ePWM1 TBSTS");
-    GEL_WatchAdd("*0x6802,x","ePWM1 TBPHSHR");
-    GEL_WatchAdd("*0x6803,x","ePWM1 TBPHS");
-    GEL_WatchAdd("*0x6804,x","ePWM1 TBCTR");
-    GEL_WatchAdd("*0x6805,x","ePWM1 TBPRD");
-}
-hotmenu ePWM1_CMP_Regs()
-{
-    GEL_WatchAdd("*0x6807,x","ePWM1 CMPCTL");
-    GEL_WatchAdd("*0x6808,x","ePWM1 CMPAHR");
-    GEL_WatchAdd("*0x6809,x","ePWM1 CMPA");
-    GEL_WatchAdd("*0x680A,x","ePWM1 CMPB");
-}
-hotmenu ePWM1_AQ_Regs()
-{
-    GEL_WatchAdd("*0x680B,x","ePWM1 AQCTLA");
-    GEL_WatchAdd("*0x680C,x","ePWM1 AQCTLB");
-    GEL_WatchAdd("*0x680D,x","ePWM1 AQSFRC");
-    GEL_WatchAdd("*0x680E,x","ePWM1 AQCSFRC");
-}
-hotmenu ePWM1_DB_Regs()
-{
-    GEL_WatchAdd("*0x680F,x","ePWM1 DBCTL");
-    GEL_WatchAdd("*0x6810,x","ePWM1 DBRED");
-    GEL_WatchAdd("*0x6811,x","ePWM1 DBFED");
-}
-hotmenu ePWM1_TZ_Regs()
-{
-    GEL_WatchAdd("*0x6812,x","ePWM1 TZSEL");
-    GEL_WatchAdd("*0x6814,x","ePWM1 TZCTL");
-    GEL_WatchAdd("*0x6815,x","ePWM1 TZEINT");
-    GEL_WatchAdd("*0x6816,x","ePWM1 TZFLG");
-    GEL_WatchAdd("*0x6817,x","ePWM1 TZCLR");
-    GEL_WatchAdd("*0x6818,x","ePWM1 TZFRC");
-}
-hotmenu ePWM1_ET_Regs()
-{
-    GEL_WatchAdd("*0x6819,x","ePWM1 ETSEL");
-    GEL_WatchAdd("*0x681A,x","ePWM1 ETPS");
-    GEL_WatchAdd("*0x681B,x","ePWM1 ETFLG");
-    GEL_WatchAdd("*0x681C,x","ePWM1 ETCLR");
-    GEL_WatchAdd("*0x681D,x","ePWM1 ETFRC");
-}
-hotmenu ePWM2_All_Regs()
-{
-    GEL_WatchAdd("*0x6840,x","ePWM2 TBCTL");
-    GEL_WatchAdd("*0x6841,x","ePWM2 TBSTS");
-    GEL_WatchAdd("*0x6842,x","ePWM2 TBPHSHR");
-    GEL_WatchAdd("*0x6843,x","ePWM2 TBPHS");
-    GEL_WatchAdd("*0x6844,x","ePWM2 TBCTR");
-    GEL_WatchAdd("*0x6845,x","ePWM2 TBPRD");
-    GEL_WatchAdd("*0x6847,x","ePWM2 CMPCTL");
-    GEL_WatchAdd("*0x6848,x","ePWM2 CMPAHR");
-    GEL_WatchAdd("*0x6849,x","ePWM2 CMPA");
-    GEL_WatchAdd("*0x684A,x","ePWM2 CMPB");
-    GEL_WatchAdd("*0x684B,x","ePWM2 AQCTLA");
-    GEL_WatchAdd("*0x684C,x","ePWM2 AQCTLB");
-    GEL_WatchAdd("*0x684D,x","ePWM2 AQSFRC");
-    GEL_WatchAdd("*0x684E,x","ePWM2 AQCSFRC");
-    GEL_WatchAdd("*0x684F,x","ePWM2 DBCTL");
-    GEL_WatchAdd("*0x6850,x","ePWM2 DBRED");
-    GEL_WatchAdd("*0x6851,x","ePWM2 DBFED");
-    GEL_WatchAdd("*0x6852,x","ePWM2 TZSEL");
-    GEL_WatchAdd("*0x6853,x","ePWM2 TZDCSEL");
-    GEL_WatchAdd("*0x6854,x","ePWM2 TZCTL");
-    GEL_WatchAdd("*0x6855,x","ePWM2 TZEINT");
-    GEL_WatchAdd("*0x6856,x","ePWM2 TZFLG");
-    GEL_WatchAdd("*0x6857,x","ePWM2 TZCLR");
-    GEL_WatchAdd("*0x6858,x","ePWM2 TZFRC");
-    GEL_WatchAdd("*0x6859,x","ePWM2 ETSEL");
-    GEL_WatchAdd("*0x685A,x","ePWM2 ETPS");
-    GEL_WatchAdd("*0x685B,x","ePWM2 ETFLG");
-    GEL_WatchAdd("*0x685C,x","ePWM2 ETCLR");
-    GEL_WatchAdd("*0x685D,x","ePWM2 ETFRC");
-    GEL_WatchAdd("*0x685E,x","ePWM2 PCCTL");
-    GEL_WatchAdd("*0x6860,x","ePWM2 HRCNFG");
-}
-hotmenu ePWM2_TB_Regs()
-{
-    GEL_WatchAdd("*0x6840,x","ePWM2 TBCTL");
-    GEL_WatchAdd("*0x6841,x","ePWM2 TBSTS");
-    GEL_WatchAdd("*0x6842,x","ePWM2 TBPHSHR");
-    GEL_WatchAdd("*0x6843,x","ePWM2 TBPHS");
-    GEL_WatchAdd("*0x6844,x","ePWM2 TBCTR");
-    GEL_WatchAdd("*0x6845,x","ePWM2 TBPRD");
-}
-hotmenu ePWM2_CMP_Regs()
-{
-    GEL_WatchAdd("*0x6847,x","ePWM2 CMPCTL");
-    GEL_WatchAdd("*0x6848,x","ePWM2 CMPAHR");
-    GEL_WatchAdd("*0x6849,x","ePWM2 CMPA");
-    GEL_WatchAdd("*0x684A,x","ePWM2 CMPB");
-}
-hotmenu ePWM2_AQ_Regs()
-{
-    GEL_WatchAdd("*0x684B,x","ePWM2 AQCTLA");
-    GEL_WatchAdd("*0x684C,x","ePWM2 AQCTLB");
-    GEL_WatchAdd("*0x684D,x","ePWM2 AQSFRC");
-    GEL_WatchAdd("*0x684E,x","ePWM2 AQCSFRC");
-}
-hotmenu ePWM2_DB_Regs()
-{
-    GEL_WatchAdd("*0x684F,x","ePWM2 DBCTL");
-    GEL_WatchAdd("*0x6850,x","ePWM2 DBRED");
-    GEL_WatchAdd("*0x6851,x","ePWM2 DBFED");
-}
-hotmenu ePWM2_TZ_Regs()
-{
-    GEL_WatchAdd("*0x6852,x","ePWM2 TZSEL");
-    GEL_WatchAdd("*0x6854,x","ePWM2 TZCTL");
-    GEL_WatchAdd("*0x6855,x","ePWM2 TZEINT");
-    GEL_WatchAdd("*0x6856,x","ePWM2 TZFLG");
-    GEL_WatchAdd("*0x6857,x","ePWM2 TZCLR");
-    GEL_WatchAdd("*0x6858,x","ePWM2 TZFRC");
-}
-hotmenu ePWM2_ET_Regs()
-{
-    GEL_WatchAdd("*0x6859,x","ePWM2 ETSEL");
-    GEL_WatchAdd("*0x685A,x","ePWM2 ETPS");
-    GEL_WatchAdd("*0x685B,x","ePWM2 ETFLG");
-    GEL_WatchAdd("*0x685C,x","ePWM2 ETCLR");
-    GEL_WatchAdd("*0x685D,x","ePWM2 ETFRC");
-}
-hotmenu ePWM3_All_Regs()
-{
-    GEL_WatchAdd("*0x6880,x","ePWM3 TBCTL");
-    GEL_WatchAdd("*0x6881,x","ePWM3 TBSTS");
-    GEL_WatchAdd("*0x6882,x","ePWM3 TBPHSHR");
-    GEL_WatchAdd("*0x6883,x","ePWM3 TBPHS");
-    GEL_WatchAdd("*0x6884,x","ePWM3 TBCTR");
-    GEL_WatchAdd("*0x6885,x","ePWM3 TBPRD");
-    GEL_WatchAdd("*0x6887,x","ePWM3 CMPCTL");
-    GEL_WatchAdd("*0x6888,x","ePWM3 CMPAHR");
-    GEL_WatchAdd("*0x6889,x","ePWM3 CMPA");
-    GEL_WatchAdd("*0x688A,x","ePWM3 CMPB");
-    GEL_WatchAdd("*0x688B,x","ePWM3 AQCTLA");
-    GEL_WatchAdd("*0x688C,x","ePWM3 AQCTLB");
-    GEL_WatchAdd("*0x688D,x","ePWM3 AQSFRC");
-    GEL_WatchAdd("*0x688E,x","ePWM3 AQCSFRC");
-    GEL_WatchAdd("*0x688F,x","ePWM3 DBCTL");
-    GEL_WatchAdd("*0x6890,x","ePWM3 DBRED");
-    GEL_WatchAdd("*0x6891,x","ePWM3 DBFED");
-    GEL_WatchAdd("*0x6892,x","ePWM3 TZSEL");
-    GEL_WatchAdd("*0x6893,x","ePWM3 TZDCSEL");
-    GEL_WatchAdd("*0x6894,x","ePWM3 TZCTL");
-    GEL_WatchAdd("*0x6895,x","ePWM3 TZEINT");
-    GEL_WatchAdd("*0x6896,x","ePWM3 TZFLG");
-    GEL_WatchAdd("*0x6897,x","ePWM3 TZCLR");
-    GEL_WatchAdd("*0x6898,x","ePWM3 TZFRC");
-    GEL_WatchAdd("*0x6899,x","ePWM3 ETSEL");
-    GEL_WatchAdd("*0x689A,x","ePWM3 ETPS");
-    GEL_WatchAdd("*0x689B,x","ePWM3 ETFLG");
-    GEL_WatchAdd("*0x689C,x","ePWM3 ETCLR");
-    GEL_WatchAdd("*0x689D,x","ePWM3 ETFRC");
-    GEL_WatchAdd("*0x689E,x","ePWM3 PCCTL");
-    GEL_WatchAdd("*0x68A0,x","ePWM3 HRCNFG");
-}
-hotmenu ePWM3_TB_Regs()
-{
-    GEL_WatchAdd("*0x6880,x","ePWM3 TBCTL");
-    GEL_WatchAdd("*0x6881,x","ePWM3 TBSTS");
-    GEL_WatchAdd("*0x6882,x","ePWM3 TBPHSHR");
-    GEL_WatchAdd("*0x6883,x","ePWM3 TBPHS");
-    GEL_WatchAdd("*0x6884,x","ePWM3 TBCTR");
-    GEL_WatchAdd("*0x6885,x","ePWM3 TBPRD");
-}
-hotmenu ePWM3_CMP_Regs()
-{
-    GEL_WatchAdd("*0x6887,x","ePWM3 CMPCTL");
-    GEL_WatchAdd("*0x6888,x","ePWM3 CMPAHR");
-    GEL_WatchAdd("*0x6889,x","ePWM3 CMPA");
-    GEL_WatchAdd("*0x688A,x","ePWM3 CMPB");
-}
-hotmenu ePWM3_AQ_Regs()
-{
-    GEL_WatchAdd("*0x688B,x","ePWM3 AQCTLA");
-    GEL_WatchAdd("*0x688C,x","ePWM3 AQCTLB");
-    GEL_WatchAdd("*0x688D,x","ePWM3 AQSFRC");
-    GEL_WatchAdd("*0x688E,x","ePWM3 AQCSFRC");
-}
-hotmenu ePWM3_DB_Regs()
-{
-    GEL_WatchAdd("*0x688F,x","ePWM3 DBCTL");
-    GEL_WatchAdd("*0x6890,x","ePWM3 DBRED");
-    GEL_WatchAdd("*0x6891,x","ePWM3 DBFED");
-}
-hotmenu ePWM3_TZ_Regs()
-{
-    GEL_WatchAdd("*0x6892,x","ePWM3 TZSEL");
-    GEL_WatchAdd("*0x6894,x","ePWM3 TZCTL");
-    GEL_WatchAdd("*0x6895,x","ePWM3 TZEINT");
-    GEL_WatchAdd("*0x6896,x","ePWM3 TZFLG");
-    GEL_WatchAdd("*0x6897,x","ePWM3 TZCLR");
-    GEL_WatchAdd("*0x6898,x","ePWM3 TZFRC");
-}
-hotmenu ePWM3_ET_Regs()
-{
-    GEL_WatchAdd("*0x6899,x","ePWM3 ETSEL");
-    GEL_WatchAdd("*0x689A,x","ePWM3 ETPS");
-    GEL_WatchAdd("*0x689B,x","ePWM3 ETFLG");
-    GEL_WatchAdd("*0x689C,x","ePWM3 ETCLR");
-    GEL_WatchAdd("*0x689D,x","ePWM3 ETFRC");
-}
-hotmenu ePWM4_All_Regs()
-{
-    GEL_WatchAdd("*0x68C0,x","ePWM4 TBCTL");
-    GEL_WatchAdd("*0x68C1,x","ePWM4 TBSTS");
-    GEL_WatchAdd("*0x68C2,x","ePWM4 TBPHSHR");
-    GEL_WatchAdd("*0x68C3,x","ePWM4 TBPHS");
-    GEL_WatchAdd("*0x68C4,x","ePWM4 TBCTR");
-    GEL_WatchAdd("*0x68C5,x","ePWM4 TBPRD");
-    GEL_WatchAdd("*0x68C7,x","ePWM4 CMPCTL");
-    GEL_WatchAdd("*0x68C8,x","ePWM4 CMPAHR");
-    GEL_WatchAdd("*0x68C9,x","ePWM4 CMPA");
-    GEL_WatchAdd("*0x68CA,x","ePWM4 CMPB");
-    GEL_WatchAdd("*0x68CB,x","ePWM4 AQCTLA");
-    GEL_WatchAdd("*0x68CC,x","ePWM4 AQCTLB");
-    GEL_WatchAdd("*0x68CD,x","ePWM4 AQSFRC");
-    GEL_WatchAdd("*0x68CE,x","ePWM4 AQCSFRC");
-    GEL_WatchAdd("*0x68CF,x","ePWM4 DBCTL");
-    GEL_WatchAdd("*0x68D0,x","ePWM4 DBRED");
-    GEL_WatchAdd("*0x68D1,x","ePWM4 DBFED");
-    GEL_WatchAdd("*0x68D2,x","ePWM4 TZSEL");
-    GEL_WatchAdd("*0x68D3,x","ePWM4 TZDCSEL");
-    GEL_WatchAdd("*0x68D4,x","ePWM4 TZCTL");
-    GEL_WatchAdd("*0x68D5,x","ePWM4 TZEINT");
-    GEL_WatchAdd("*0x68D6,x","ePWM4 TZFLG");
-    GEL_WatchAdd("*0x68D7,x","ePWM4 TZCLR");
-    GEL_WatchAdd("*0x68D8,x","ePWM4 TZFRC");
-    GEL_WatchAdd("*0x68D9,x","ePWM4 ETSEL");
-    GEL_WatchAdd("*0x68DA,x","ePWM4 ETPS");
-    GEL_WatchAdd("*0x68DB,x","ePWM4 ETFLG");
-    GEL_WatchAdd("*0x68DC,x","ePWM4 ETCLR");
-    GEL_WatchAdd("*0x68DD,x","ePWM4 ETFRC");
-    GEL_WatchAdd("*0x68DE,x","ePWM4 PCCTL");
-    GEL_WatchAdd("*0x68E0,x","ePWM4 HRCNFG");
-}
-hotmenu ePWM4_TB_Regs()
-{
-    GEL_WatchAdd("*0x68C0,x","ePWM4 TBCTL");
-    GEL_WatchAdd("*0x68C1,x","ePWM4 TBSTS");
-    GEL_WatchAdd("*0x68C2,x","ePWM4 TBPHSHR");
-    GEL_WatchAdd("*0x68C3,x","ePWM4 TBPHS");
-    GEL_WatchAdd("*0x68C4,x","ePWM4 TBCTR");
-    GEL_WatchAdd("*0x68C5,x","ePWM4 TBPRD");
-}
-hotmenu ePWM4_CMP_Regs()
-{
-    GEL_WatchAdd("*0x68C7,x","ePWM4 CMPCTL");
-    GEL_WatchAdd("*0x68C8,x","ePWM4 CMPAHR");
-    GEL_WatchAdd("*0x68C9,x","ePWM4 CMPA");
-    GEL_WatchAdd("*0x68CA,x","ePWM4 CMPB");
-}
-hotmenu ePWM4_AQ_Regs()
-{
-    GEL_WatchAdd("*0x68CB,x","ePWM4 AQCTLA");
-    GEL_WatchAdd("*0x68CC,x","ePWM4 AQCTLB");
-    GEL_WatchAdd("*0x68CD,x","ePWM4 AQSFRC");
-    GEL_WatchAdd("*0x68CE,x","ePWM4 AQCSFRC");
-}
-hotmenu ePWM4_DB_Regs()
-{
-    GEL_WatchAdd("*0x68CF,x","ePWM4 DBCTL");
-    GEL_WatchAdd("*0x68D0,x","ePWM4 DBRED");
-    GEL_WatchAdd("*0x68D1,x","ePWM4 DBFED"); 
-}
-hotmenu ePWM4_TZ_Regs()
-{
-    GEL_WatchAdd("*0x68D2,x","ePWM4 TZSEL");
-    GEL_WatchAdd("*0x68D4,x","ePWM4 TZCTL");
-    GEL_WatchAdd("*0x68D5,x","ePWM4 TZEINT");
-    GEL_WatchAdd("*0x68D6,x","ePWM4 TZFLG");
-    GEL_WatchAdd("*0x68D7,x","ePWM4 TZCLR");
-    GEL_WatchAdd("*0x68D8,x","ePWM4 TZFRC");
-}
-hotmenu ePWM4_ET_Regs()
-{
-    GEL_WatchAdd("*0x68D9,x","ePWM4 ETSEL");
-    GEL_WatchAdd("*0x68DA,x","ePWM4 ETPS");
-    GEL_WatchAdd("*0x68DB,x","ePWM4 ETFLG");
-    GEL_WatchAdd("*0x68DC,x","ePWM4 ETCLR");
-    GEL_WatchAdd("*0x68DD,x","ePWM4 ETFRC");
-}
-hotmenu ePWM5_All_Regs()
-{
-    GEL_WatchAdd("*0x6900,x","ePWM5 TBCTL");
-    GEL_WatchAdd("*0x6901,x","ePWM5 TBSTS");
-    GEL_WatchAdd("*0x6902,x","ePWM5 TBPHSHR");
-    GEL_WatchAdd("*0x6903,x","ePWM5 TBPHS");
-    GEL_WatchAdd("*0x6904,x","ePWM5 TBCTR");
-    GEL_WatchAdd("*0x6905,x","ePWM5 TBPRD");
-    GEL_WatchAdd("*0x6907,x","ePWM5 CMPCTL");
-    GEL_WatchAdd("*0x6908,x","ePWM5 CMPAHR");
-    GEL_WatchAdd("*0x6909,x","ePWM5 CMPA");
-    GEL_WatchAdd("*0x690A,x","ePWM5 CMPB");
-    GEL_WatchAdd("*0x690B,x","ePWM5 AQCTLA");
-    GEL_WatchAdd("*0x690C,x","ePWM5 AQCTLB");
-    GEL_WatchAdd("*0x690D,x","ePWM5 AQSFRC");
-    GEL_WatchAdd("*0x690E,x","ePWM5 AQCSFRC");
-    GEL_WatchAdd("*0x690F,x","ePWM5 DBCTL");
-    GEL_WatchAdd("*0x6910,x","ePWM5 DBRED");
-    GEL_WatchAdd("*0x6911,x","ePWM5 DBFED");
-    GEL_WatchAdd("*0x6912,x","ePWM5 TZSEL");
-    GEL_WatchAdd("*0x6913,x","ePWM5 TZDCSEL");
-    GEL_WatchAdd("*0x6914,x","ePWM5 TZCTL");
-    GEL_WatchAdd("*0x6915,x","ePWM5 TZEINT");
-    GEL_WatchAdd("*0x6916,x","ePWM5 TZFLG");
-    GEL_WatchAdd("*0x6917,x","ePWM5 TZCLR");
-    GEL_WatchAdd("*0x6918,x","ePWM5 TZFRC");
-    GEL_WatchAdd("*0x6919,x","ePWM5 ETSEL");
-    GEL_WatchAdd("*0x691A,x","ePWM5 ETPS");
-    GEL_WatchAdd("*0x691B,x","ePWM5 ETFLG");
-    GEL_WatchAdd("*0x691C,x","ePWM5 ETCLR");
-    GEL_WatchAdd("*0x691D,x","ePWM5 ETFRC");
-    GEL_WatchAdd("*0x691E,x","ePWM5 PCCTL");
-    GEL_WatchAdd("*0x6920,x","ePWM5 HRCNFG");
-}
-hotmenu ePWM5_TB_Regs()
-{
-    GEL_WatchAdd("*0x6900,x","ePWM5 TBCTL");
-    GEL_WatchAdd("*0x6901,x","ePWM5 TBSTS");
-    GEL_WatchAdd("*0x6902,x","ePWM5 TBPHSHR");
-    GEL_WatchAdd("*0x6903,x","ePWM5 TBPHS");
-    GEL_WatchAdd("*0x6904,x","ePWM5 TBCTR");
-    GEL_WatchAdd("*0x6905,x","ePWM5 TBPRD");
-}
-hotmenu ePWM5_CMP_Regs()
-{
-    GEL_WatchAdd("*0x6907,x","ePWM5 CMPCTL");
-    GEL_WatchAdd("*0x6908,x","ePWM5 CMPAHR");
-    GEL_WatchAdd("*0x6909,x","ePWM5 CMPA");
-    GEL_WatchAdd("*0x690A,x","ePWM5 CMPB");
-}
-hotmenu ePWM5_AQ_Regs()
-{
-    GEL_WatchAdd("*0x690B,x","ePWM5 AQCTLA");
-    GEL_WatchAdd("*0x690C,x","ePWM5 AQCTLB");
-    GEL_WatchAdd("*0x690D,x","ePWM5 AQSFRC");
-    GEL_WatchAdd("*0x690E,x","ePWM5 AQCSFRC");
-}
-hotmenu ePWM5_DB_Regs()
-{
-    GEL_WatchAdd("*0x690F,x","ePWM5 DBCTL");
-    GEL_WatchAdd("*0x6910,x","ePWM5 DBRED");
-    GEL_WatchAdd("*0x6911,x","ePWM5 DBFED"); 
-}
-hotmenu ePWM5_TZ_Regs()
-{
-    GEL_WatchAdd("*0x6912,x","ePWM5 TZSEL");
-    GEL_WatchAdd("*0x6914,x","ePWM5 TZCTL");
-    GEL_WatchAdd("*0x6915,x","ePWM5 TZEINT");
-    GEL_WatchAdd("*0x6916,x","ePWM5 TZFLG");
-    GEL_WatchAdd("*0x6917,x","ePWM5 TZCLR");
-    GEL_WatchAdd("*0x6918,x","ePWM5 TZFRC");
-}
-hotmenu ePWM5_ET_Regs()
-{
-    GEL_WatchAdd("*0x6919,x","ePWM5 ETSEL");
-    GEL_WatchAdd("*0x691A,x","ePWM5 ETPS");
-    GEL_WatchAdd("*0x691B,x","ePWM5 ETFLG");
-    GEL_WatchAdd("*0x691C,x","ePWM5 ETCLR");
-    GEL_WatchAdd("*0x691D,x","ePWM5 ETFRC");
-}
-hotmenu ePWM6_All_Regs()
-{
-    GEL_WatchAdd("*0x6940,x","ePWM6 TBCTL");
-    GEL_WatchAdd("*0x6941,x","ePWM6 TBSTS");
-    GEL_WatchAdd("*0x6942,x","ePWM6 TBPHSHR");
-    GEL_WatchAdd("*0x6943,x","ePWM6 TBPHS");
-    GEL_WatchAdd("*0x6944,x","ePWM6 TBCTR");
-    GEL_WatchAdd("*0x6945,x","ePWM6 TBPRD");
-    GEL_WatchAdd("*0x6947,x","ePWM6 CMPCTL");
-    GEL_WatchAdd("*0x6948,x","ePWM6 CMPAHR");
-    GEL_WatchAdd("*0x6949,x","ePWM6 CMPA");
-    GEL_WatchAdd("*0x694A,x","ePWM6 CMPB");
-    GEL_WatchAdd("*0x694B,x","ePWM6 AQCTLA");
-    GEL_WatchAdd("*0x694C,x","ePWM6 AQCTLB");
-    GEL_WatchAdd("*0x694D,x","ePWM6 AQSFRC");
-    GEL_WatchAdd("*0x694E,x","ePWM6 AQCSFRC");
-    GEL_WatchAdd("*0x694F,x","ePWM6 DBCTL");
-    GEL_WatchAdd("*0x6950,x","ePWM6 DBRED");
-    GEL_WatchAdd("*0x6951,x","ePWM6 DBFED");
-    GEL_WatchAdd("*0x6952,x","ePWM6 TZSEL");
-    GEL_WatchAdd("*0x6953,x","ePWM6 TZDCSEL");
-    GEL_WatchAdd("*0x6954,x","ePWM6 TZCTL");
-    GEL_WatchAdd("*0x6955,x","ePWM6 TZEINT");
-    GEL_WatchAdd("*0x6956,x","ePWM6 TZFLG");
-    GEL_WatchAdd("*0x6957,x","ePWM6 TZCLR");
-    GEL_WatchAdd("*0x6958,x","ePWM6 TZFRC");
-    GEL_WatchAdd("*0x6959,x","ePWM6 ETSEL");
-    GEL_WatchAdd("*0x695A,x","ePWM6 ETPS");
-    GEL_WatchAdd("*0x695B,x","ePWM6 ETFLG");
-    GEL_WatchAdd("*0x695C,x","ePWM6 ETCLR");
-    GEL_WatchAdd("*0x695D,x","ePWM6 ETFRC");
-    GEL_WatchAdd("*0x695E,x","ePWM6 PCCTL");
-    GEL_WatchAdd("*0x6960,x","ePWM6 HRCNFG");
-
-}
-hotmenu ePWM6_TB_Regs()
-{
-    GEL_WatchAdd("*0x6940,x","ePWM6 TBCTL");
-    GEL_WatchAdd("*0x6941,x","ePWM6 TBSTS");
-    GEL_WatchAdd("*0x6942,x","ePWM6 TBPHSHR");
-    GEL_WatchAdd("*0x6943,x","ePWM6 TBPHS");
-    GEL_WatchAdd("*0x6944,x","ePWM6 TBCTR");
-    GEL_WatchAdd("*0x6945,x","ePWM6 TBPRD");
-}
-hotmenu ePWM6_CMP_Regs()
-{
-    GEL_WatchAdd("*0x6947,x","ePWM6 CMPCTL");
-    GEL_WatchAdd("*0x6948,x","ePWM6 CMPAHR");
-    GEL_WatchAdd("*0x6949,x","ePWM6 CMPA");
-    GEL_WatchAdd("*0x694A,x","ePWM6 CMPB");
-}
-hotmenu ePWM6_AQ_Regs()
-{
-    GEL_WatchAdd("*0x694B,x","ePWM6 AQCTLA");
-    GEL_WatchAdd("*0x694C,x","ePWM6 AQCTLB");
-    GEL_WatchAdd("*0x694D,x","ePWM6 AQSFRC");
-    GEL_WatchAdd("*0x694E,x","ePWM6 AQCSFRC");
-}
-hotmenu ePWM6_DB_Regs()
-{
-    GEL_WatchAdd("*0x694F,x","ePWM6 DBCTL");
-    GEL_WatchAdd("*0x6950,x","ePWM6 DBRED");
-    GEL_WatchAdd("*0x6951,x","ePWM6 DBFED");
-}
-hotmenu ePWM6_TZ_Regs()
-{
-    GEL_WatchAdd("*0x6952,x","ePWM6 TZSEL");
-    GEL_WatchAdd("*0x6954,x","ePWM6 TZCTL");
-    GEL_WatchAdd("*0x6955,x","ePWM6 TZEINT");
-    GEL_WatchAdd("*0x6956,x","ePWM6 TZFLG");
-    GEL_WatchAdd("*0x6957,x","ePWM6 TZCLR");
-    GEL_WatchAdd("*0x6958,x","ePWM6 TZFRC");
-}
-hotmenu ePWM6_ET_Regs()
-{
-    GEL_WatchAdd("*0x6959,x","ePWM6 ETSEL");
-    GEL_WatchAdd("*0x695A,x","ePWM6 ETPS");
-    GEL_WatchAdd("*0x695B,x","ePWM6 ETFLG");
-    GEL_WatchAdd("*0x695C,x","ePWM6 ETCLR");
-    GEL_WatchAdd("*0x695D,x","ePWM6 ETFRC");
-}
-
-
-/********************************************************************/
-/* Enhanced EQEP Registers                                          */
-/********************************************************************/
-menuitem "Watch eQEP"
-
-hotmenu eQEP1_All_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6B00,x","eQEP1 QPOSCNT");
-    GEL_WatchAdd("*(long *)0x6B02,x","eQEP1 QPOSINIT");
-    GEL_WatchAdd("*(long *)0x6B04,x","eQEP1 QPOSMAX");
-    GEL_WatchAdd("*(long *)0x6B06,x","eQEP1 QPOSCMP");
-    GEL_WatchAdd("*(long *)0x6B08,x","eQEP1 QPOSILAT");
-    GEL_WatchAdd("*(long *)0x6B0A,x","eQEP1 QPOSSLAT");
-    GEL_WatchAdd("*(long *)0x6B0C,x","eQEP1 QPOSLAT");
-    GEL_WatchAdd("*(long *)0x6B0E,x","eQEP1 QUTMR");
-    GEL_WatchAdd("*(long *)0x6B10,x","eQEP1 QUPRD");
-    GEL_WatchAdd("*0x6B12,x","eQEP1 QWDTMR");
-    GEL_WatchAdd("*0x6B13,x","eQEP1 QWDPRD");
-    GEL_WatchAdd("*0x6B14,x","eQEP1 QDECCTL");
-    GEL_WatchAdd("*0x6B15,x","eQEP1 QEPCTL");
-    GEL_WatchAdd("*0x6B16,x","eQEP1 QCAPCTL");
-    GEL_WatchAdd("*0x6B17,x","eQEP1 QPOSCTL");
-    GEL_WatchAdd("*0x6B18,x","eQEP1 QEINT");
-    GEL_WatchAdd("*0x6B19,x","eQEP1 QFLG");
-    GEL_WatchAdd("*0x6B1A,x","eQEP1 QCLR");
-    GEL_WatchAdd("*0x6B1B,x","eQEP1 QFRC");
-    GEL_WatchAdd("*0x6B1C,x","eQEP1 QEPSTS");
-    GEL_WatchAdd("*0x6B1D,x","eQEP1 QCTMR");
-    GEL_WatchAdd("*0x6B1E,x","eQEP1 QCPRD");
-    GEL_WatchAdd("*0x6B1F,x","eQEP1 QCTMRLAT");
-    GEL_WatchAdd("*0x6B20,x","eQEP1 QCPRDLAT");
-}
-hotmenu eQEP2_All_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6B40,x","eQEP2 QPOSCNT");
-    GEL_WatchAdd("*(long *)0x6B42,x","eQEP2 QPOSINIT");
-    GEL_WatchAdd("*(long *)0x6B44,x","eQEP2 QPOSMAX");
-    GEL_WatchAdd("*(long *)0x6B46,x","eQEP2 QPOSCMP");
-    GEL_WatchAdd("*(long *)0x6B48,x","eQEP2 QPOSILAT");
-    GEL_WatchAdd("*(long *)0x6B4A,x","eQEP2 QPOSSLAT");
-    GEL_WatchAdd("*(long *)0x6B4C,x","eQEP2 QPOSLAT");
-    GEL_WatchAdd("(long *)*0x6B4E,x","eQEP2 QUTMR");
-    GEL_WatchAdd("*(long *)0x6B50,x","eQEP2 QUPRD");
-    GEL_WatchAdd("*0x6B52,x","eQEP2 QWDTMR");
-    GEL_WatchAdd("*0x6B53,x","eQEP2 QWDPRD");
-    GEL_WatchAdd("*0x6B54,x","eQEP2 QDECCTL");
-    GEL_WatchAdd("*0x6B55,x","eQEP2 QEPCTL");
-    GEL_WatchAdd("*0x6B56,x","eQEP2 QCAPCTL");
-    GEL_WatchAdd("*0x6B57,x","eQEP2 QPOSCTL");
-    GEL_WatchAdd("*0x6B58,x","eQEP2 QEINT");
-    GEL_WatchAdd("*0x6B59,x","eQEP2 QFLG");
-    GEL_WatchAdd("*0x6B5A,x","eQEP2 QCLR");
-    GEL_WatchAdd("*0x6B5B,x","eQEP2 QFRC");
-    GEL_WatchAdd("*0x6B5C,x","eQEP2 QEPSTS");
-    GEL_WatchAdd("*0x6B5D,x","eQEP2 QCTMR");
-    GEL_WatchAdd("*0x6B5E,x","eQEP2 QCPRD");
-    GEL_WatchAdd("*0x6B5F,x","eQEP2 QCTMRLAT");
-    GEL_WatchAdd("*0x6B60,x","eQEP2 QCPRDLAT");
-}
-
-
-/********************************************************************/
-/* External Interface Registers                                     */
-/********************************************************************/
-menuitem "Watch External Interface Registers";
-
-hotmenu All_External_Interface_Regs()
-{
-    GEL_WatchAdd("*(long *)0x0B20,x","XTIMING0");
-    GEL_WatchAdd("*(long *)0x0B2C,x","XTIMING6");
-    GEL_WatchAdd("*(long *)0x0B2E,x","XTIMING7");
-    GEL_WatchAdd("*(long *)0x0B34,x","XINTCNF2");
-    GEL_WatchAdd("*0x0B38,x","XBANK");
-    GEL_WatchAdd("*0x0B3A,x","XREVISION");
-    GEL_WatchAdd("*0x0B3D,x","XRESET");
-}
-
-/********************************************************************/
-/* External Interrupt Registers                                     */
-/********************************************************************/
-menuitem "Watch External Interrupt Registers";
-
-hotmenu All_XINT_Regs()
-{
-    GEL_WatchAdd("*0x7070,x","XINT1CR");
-    GEL_WatchAdd("*0x7071,x","XINT2CR");
-    GEL_WatchAdd("*0x7072,x","XINT3CR");
-    GEL_WatchAdd("*0x7073,x","XINT4CR");
-    GEL_WatchAdd("*0x7074,x","XINT5CR");
-    GEL_WatchAdd("*0x7075,x","XINT6CR");
-    GEL_WatchAdd("*0x7076,x","XINT7CR");
-    GEL_WatchAdd("*0x7077,x","XNMICR");
-    GEL_WatchAdd("*0x7078,x","XINT1CTR");
-    GEL_WatchAdd("*0x7079,x","XINT2CTR");
-    GEL_WatchAdd("*0x707F,x","XNMICTR");
-}
-hotmenu XINT_Control_Regs()
-{
-    GEL_WatchAdd("*0x7070,x","XINT1CR");
-    GEL_WatchAdd("*0x7071,x","XINT2CR");
-    GEL_WatchAdd("*0x7072,x","XINT3CR");
-    GEL_WatchAdd("*0x7073,x","XINT4CR");
-    GEL_WatchAdd("*0x7074,x","XINT5CR");
-    GEL_WatchAdd("*0x7075,x","XINT6CR");
-    GEL_WatchAdd("*0x7076,x","XINT7CR");
-    GEL_WatchAdd("*0x7077,x","XNMICR");
-}
-hotmenu XINT_Counter_Regs()
-{
-    GEL_WatchAdd("*0x7078,x","XINT1CTR");
-    GEL_WatchAdd("*0x7079,x","XINT2CTR");
-    GEL_WatchAdd("*0x707F,x","XNMICTR");
-}
-
-
-/********************************************************************/
-/* GPIO Registers                                                   */
-/********************************************************************/
-menuitem "Watch GPIO Registers";
-
-hotmenu All_GPIO_CONTROL_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6F80,x","GPACTRL");
-    GEL_WatchAdd("*(long *)0x6F82,x","GPAQSEL1");
-    GEL_WatchAdd("*(long *)0x6F84,x","GPAQSEL2");
-    GEL_WatchAdd("*(long *)0x6F86,x","GPAMUX1");
-    GEL_WatchAdd("*(long *)0x6F88,x","GPAMUX2");
-    GEL_WatchAdd("*(long *)0x6F8A,x","GPADIR");
-    GEL_WatchAdd("*(long *)0x6F8C,x","GPAPUD");
-
-    GEL_WatchAdd("*(long *)0x6F90,x","GPBCTRL");
-    GEL_WatchAdd("*(long *)0x6F92,x","GPBQSEL1");
-    GEL_WatchAdd("*(long *)0x6F94,x","GPBQSEL2");
-    GEL_WatchAdd("*(long *)0x6F96,x","GPBMUX1");
-    GEL_WatchAdd("*(long *)0x6F98,x","GPBMUX2");
-    GEL_WatchAdd("*(long *)0x6F9A,x","GPBDIR");
-    GEL_WatchAdd("*(long *)0x6F9C,x","GPBPUD");
-
-    GEL_WatchAdd("*(long *)0x6FA6,x","GPCMUX1");
-    GEL_WatchAdd("*(long *)0x6FA8,x","GPCMUX2");
-    GEL_WatchAdd("*(long *)0x6FAA,x","GPCDIR");
-    GEL_WatchAdd("*(long *)0x6FAC,x","GPCPUD");
-}
-hotmenu All_GPIO_DATA_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6FC0,x","GPADAT");
-    GEL_WatchAdd("*(long *)0x6FC2,x","GPASET");
-    GEL_WatchAdd("*(long *)0x6FC4,x","GPACLEAR");
-    GEL_WatchAdd("*(long *)0x6FC6,x","GPATOGGLE");
-    
-    GEL_WatchAdd("*(long *)0x6FC8,x","GPBDAT");
-    GEL_WatchAdd("*(long *)0x6FCA,x","GPBSET");
-    GEL_WatchAdd("*(long *)0x6FCC,x","GPBCLEAR");
-    GEL_WatchAdd("*(long *)0x6FCE,x","GPBTOGGLE");
-
-    GEL_WatchAdd("*(long *)0x6FD0,x","GPCDAT");
-    GEL_WatchAdd("*(long *)0x6FD2,x","GPCSET");
-    GEL_WatchAdd("*(long *)0x6FD4,x","GPCCLEAR");
-    GEL_WatchAdd("*(long *)0x6FD6,x","GPCTOGGLE");
-}
-hotmenu All_GPIO_INTERRUPT_Regs()
-{
-    GEL_WatchAdd("*0x6FE0,x","GPIOXINT1SEL");
-    GEL_WatchAdd("*0x6FE1,x","GPIOXINT2SEL");
-    GEL_WatchAdd("*0x6FE2,x","GPIOXNMISEL");
-    GEL_WatchAdd("*0x6FE3,x","GPIOXINT3SEL");
-    GEL_WatchAdd("*0x6FE4,x","GPIOXINT4SEL");
-    GEL_WatchAdd("*0x6FE5,x","GPIOXINT5SEL");
-    GEL_WatchAdd("*0x6FE6,x","GPIOXINT6SEL");
-    GEL_WatchAdd("*0x6FE7,x","GPIOXINT7SEL");
-    GEL_WatchAdd("*(long *)0x6FE8,x","GPIOLPMSEL");
-}
-hotmenu All_GPA_Registers()
-{
-    GEL_WatchAdd("*(long *)0x6F80,x","GPACTRL");
-    GEL_WatchAdd("*(long *)0x6F82,x","GPAQSEL1");
-    GEL_WatchAdd("*(long *)0x6F84,x","GPAQSEL2");
-    GEL_WatchAdd("*(long *)0x6F86,x","GPAMUX1");
-    GEL_WatchAdd("*(long *)0x6F88,x","GPAMUX2");
-    GEL_WatchAdd("*(long *)0x6F8A,x","GPADIR");
-    GEL_WatchAdd("*(long *)0x6F8C,x","GPAPUD");
-    
-    GEL_WatchAdd("*(long *)0x6FC0,x","GPADAT");
-    GEL_WatchAdd("*(long *)0x6FC2,x","GPASET");
-    GEL_WatchAdd("*(long *)0x6FC4,x","GPACLEAR");
-    GEL_WatchAdd("*(long *)0x6FC6,x","GPATOGGLE");
-}
-hotmenu All_GPB_Registers()
-{
-    GEL_WatchAdd("*(long *)0x6F90,x","GPBCTRL");
-    GEL_WatchAdd("*(long *)0x6F92,x","GPBQSEL1");
-    GEL_WatchAdd("*(long *)0x6F94,x","GPBQSEL2");
-    GEL_WatchAdd("*(long *)0x6F96,x","GPBMUX1");
-    GEL_WatchAdd("*(long *)0x6F98,x","GPBMUX2");
-    GEL_WatchAdd("*(long *)0x6F9A,x","GPBDIR");
-    GEL_WatchAdd("*(long *)0x6F9C,x","GPBPUD");
-
-    GEL_WatchAdd("*(long *)0x6FC8,x","GPBDAT");
-    GEL_WatchAdd("*(long *)0x6FCA,x","GPBSET");
-    GEL_WatchAdd("*(long *)0x6FCC,x","GPBCLEAR");
-    GEL_WatchAdd("*(long *)0x6FCE,x","GPBTOGGLE");
-}
-hotmenu All_GPC_Registers()
-{
-    GEL_WatchAdd("*(long *)0x6FA6,x","GPCMUX1");
-    GEL_WatchAdd("*(long *)0x6FA8,x","GPCMUX2");
-    GEL_WatchAdd("*(long *)0x6FAA,x","GPCDIR");
-    GEL_WatchAdd("*(long *)0x6FAC,x","GPCPUD");
-
-    GEL_WatchAdd("*(long *)0x6FC8,x","GPBDAT");
-    GEL_WatchAdd("*(long *)0x6FCA,x","GPBSET");
-    GEL_WatchAdd("*(long *)0x6FCC,x","GPBCLEAR");
-    GEL_WatchAdd("*(long *)0x6FCE,x","GPBTOGGLE");
-
-    GEL_WatchAdd("*(long *)0x6FD0,x","GPCDAT");
-    GEL_WatchAdd("*(long *)0x6FD2,x","GPCSET");
-    GEL_WatchAdd("*(long *)0x6FD4,x","GPCCLEAR");
-    GEL_WatchAdd("*(long *)0x6FD6,x","GPCTOGGLE");
-}
-
-
-/********************************************************************/
-/* Multichannel Serial Port Registers                               */
-/********************************************************************/
-menuitem "Watch McBSP Registers";
-
-hotmenu All_McBSP_A_Regs()
-{
-    GEL_WatchAdd("*0x5000,x","McBSPA DRR2");
-    GEL_WatchAdd("*0x5001,x","McBSPA DRR1");
-    GEL_WatchAdd("*0x5002,x","McBSPA DXR2");
-    GEL_WatchAdd("*0x5003,x","McBSPA DXR1");
-    GEL_WatchAdd("*0x5004,x","McBSPA SPCR2");
-    GEL_WatchAdd("*0x5005,x","McBSPA SPCR1");
-    GEL_WatchAdd("*0x5006,x","McBSPA RCR2");
-    GEL_WatchAdd("*0x5007,x","McBSPA RCR1");
-    GEL_WatchAdd("*0x5008,x","McBSPA XCR2");
-    GEL_WatchAdd("*0x5009,x","McBSPA XCR1");
-    GEL_WatchAdd("*0x500A,x","McBSPA SRGR2");
-    GEL_WatchAdd("*0x500B,x","McBSPA SRGR1");
-    GEL_WatchAdd("*0x500C,x","McBSPA MCR2");
-    GEL_WatchAdd("*0x500D,x","McBSPA MCR1");
-    GEL_WatchAdd("*0x500E,x","McBSPA RCERA");
-    GEL_WatchAdd("*0x500F,x","McBSPA RCERB");
-    GEL_WatchAdd("*0x5010,x","McBSPA XCERA");
-    GEL_WatchAdd("*0x5011,x","McBSPA XCERB");
-    GEL_WatchAdd("*0x5012,x","McBSPA PCR1");
-    GEL_WatchAdd("*0x5013,x","McBSPA RCERC");
-    GEL_WatchAdd("*0x5014,x","McBSPA RCERD");
-    GEL_WatchAdd("*0x5015,x","McBSPA XCERC");
-    GEL_WatchAdd("*0x5016,x","McBSPA XCERD");
-    GEL_WatchAdd("*0x5017,x","McBSPA RCERE");
-    GEL_WatchAdd("*0x5018,x","McBSPA RCERF");
-    GEL_WatchAdd("*0x5019,x","McBSPA XCERE");
-    GEL_WatchAdd("*0x501A,x","McBSPA XCERF");
-    GEL_WatchAdd("*0x501B,x","McBSPA RCERG");
-    GEL_WatchAdd("*0x501C,x","McBSPA RCERH");
-    GEL_WatchAdd("*0x501D,x","McBSPA XCERG");
-    GEL_WatchAdd("*0x501E,x","McBSPA XCERH");
-    GEL_WatchAdd("*0x5023,x","McBSPA MFFINT");
-    GEL_WatchAdd("*0x503F,x","McBSPA Revision");
-}
-
-hotmenu All_McBSP_B_Regs()
-{
-    GEL_WatchAdd("*0x5040,x","McBSPB DRR2");
-    GEL_WatchAdd("*0x5041,x","McBSPB DRR1");
-    GEL_WatchAdd("*0x5042,x","McBSPB DXR2");
-    GEL_WatchAdd("*0x5043,x","McBSPB DXR1");
-    GEL_WatchAdd("*0x5044,x","McBSPB SPCR2");
-    GEL_WatchAdd("*0x5045,x","McBSPB SPCR1");
-    GEL_WatchAdd("*0x5046,x","McBSPB RCR2");
-    GEL_WatchAdd("*0x5047,x","McBSPB RCR1");
-    GEL_WatchAdd("*0x5048,x","McBSPB XCR2");
-    GEL_WatchAdd("*0x5049,x","McBSPB XCR1");
-    GEL_WatchAdd("*0x504A,x","McBSPB SRGR2");
-    GEL_WatchAdd("*0x504B,x","McBSPB SRGR1");
-    GEL_WatchAdd("*0x504C,x","McBSPB MCR2");
-    GEL_WatchAdd("*0x504D,x","McBSPB MCR1");
-    GEL_WatchAdd("*0x504E,x","McBSPB RCERA");
-    GEL_WatchAdd("*0x504F,x","McBSPB RCERB");
-    GEL_WatchAdd("*0x5050,x","McBSPB XCERA");
-    GEL_WatchAdd("*0x5051,x","McBSPB XCERB");
-    GEL_WatchAdd("*0x5052,x","McBSPB PCR1");
-    GEL_WatchAdd("*0x5053,x","McBSPB RCERC");
-    GEL_WatchAdd("*0x5054,x","McBSPB RCERD");
-    GEL_WatchAdd("*0x5055,x","McBSPB XCERC");
-    GEL_WatchAdd("*0x5056,x","McBSPB XCERD");
-    GEL_WatchAdd("*0x5057,x","McBSPB RCERE");
-    GEL_WatchAdd("*0x5058,x","McBSPB RCERF");
-    GEL_WatchAdd("*0x5059,x","McBSPB XCERE");
-    GEL_WatchAdd("*0x505A,x","McBSPB XCERF");
-    GEL_WatchAdd("*0x505B,x","McBSPB RCERG");
-    GEL_WatchAdd("*0x505C,x","McBSPB RCERH");
-    GEL_WatchAdd("*0x505D,x","McBSPB XCERG");
-    GEL_WatchAdd("*0x505E,x","McBSPB XCERH");
-    GEL_WatchAdd("*0x5063,x","McBSPB MFFINT");
-    GEL_WatchAdd("*0x506F,x","McBSPB Revision");
-}
-
-
-
-/********************************************************************/
-/* I2C Registers                                                    */
-/********************************************************************/
-menuitem "Watch I2C Registers";
-
-hotmenu All_I2C_Regs()
-{
-    GEL_WatchAdd("*0x7900,x","I2COAR");
-    GEL_WatchAdd("*0x7901,x","I2CIER");
-    GEL_WatchAdd("*0x7902,x","I2CSTR");
-    GEL_WatchAdd("*0x7903,x","I2CCLKL");
-    GEL_WatchAdd("*0x7904,x","I2CCLKH");
-    GEL_WatchAdd("*0x7905,x","I2CCNT");
-    GEL_WatchAdd("*0x7906,x","I2CDRR");
-    GEL_WatchAdd("*0x7907,x","I2CSAR");
-    GEL_WatchAdd("*0x7908,x","I2CDXR");
-    GEL_WatchAdd("*0x7909,x","I2CMDR");
-    GEL_WatchAdd("*0x790A,x","I2CISRC");
-    GEL_WatchAdd("*0x790C,x","I2CPSC");
-    GEL_WatchAdd("*0x7920,x","I2CFFTX");
-    GEL_WatchAdd("*0x7921,x","I2CFFRX");
-}
-
-
-/********************************************************************/
-/* Peripheral Interrupt Expansion Registers                         */
-/********************************************************************/
-menuitem "Watch Peripheral Interrupt Expansion Registers";
-
-hotmenu All_PIE_Regs()
-{
-    GEL_WatchAdd("*0x0CE0,x","PIECTRL");
-    GEL_WatchAdd("*0x0CE1,x","PIEACK");
-    GEL_WatchAdd("*0x0CE2,x","PIEIER1");
-    GEL_WatchAdd("*0x0CE3,x","PIEIFR1");
-    GEL_WatchAdd("*0x0CE4,x","PIEIER2");
-    GEL_WatchAdd("*0x0CE5,x","PIEIFR2");
-    GEL_WatchAdd("*0x0CE6,x","PIEIER3");
-    GEL_WatchAdd("*0x0CE7,x","PIEIFR3");
-    GEL_WatchAdd("*0x0CE8,x","PIEIER4");
-    GEL_WatchAdd("*0x0CE9,x","PIEIFR4");
-    GEL_WatchAdd("*0x0CEA,x","PIEIER5");
-    GEL_WatchAdd("*0x0CEB,x","PIEIFR5");
-    GEL_WatchAdd("*0x0CEC,x","PIEIER6");
-    GEL_WatchAdd("*0x0CED,x","PIEIFR6");
-    GEL_WatchAdd("*0x0CEE,x","PIEIER7");
-    GEL_WatchAdd("*0x0CEF,x","PIEIFR7");
-    GEL_WatchAdd("*0x0CF0,x","PIEIER8");
-    GEL_WatchAdd("*0x0CF1,x","PIEIFR8");
-    GEL_WatchAdd("*0x0CF2,x","PIEIER9");
-    GEL_WatchAdd("*0x0CF3,x","PIEIFR9");
-    GEL_WatchAdd("*0x0CF4,x","PIEIER10");
-    GEL_WatchAdd("*0x0CF5,x","PIEIFR10");
-    GEL_WatchAdd("*0x0CF6,x","PIEIER11");
-    GEL_WatchAdd("*0x0CF7,x","PIEIFR11");
-    GEL_WatchAdd("*0x0CF8,x","PIEIER12");
-    GEL_WatchAdd("*0x0CF9,x","PIEIFR12");
-}
-hotmenu PIECTRL()
-{
-    GEL_WatchAdd("*0x0CE0,x","PIECTRL");
-}
-hotmenu PIEACK()
-{
-    GEL_WatchAdd("*0x0CE1,x","PIEACK");
-}
-hotmenu PIEIER1_and_PIEIFR1()
-{
-    GEL_WatchAdd("*0x0CE2,x","PIEIER1");
-    GEL_WatchAdd("*0x0CE3,x","PIEIFR1");
-}
-hotmenu PIEIER2_and_PIEIFR2()
-{
-    GEL_WatchAdd("*0x0CE4,x","PIEIER2");
-    GEL_WatchAdd("*0x0CE5,x","PIEIFR2");
-}
-hotmenu PIEIER3_and_PIEIFR3()
-{
-    GEL_WatchAdd("*0x0CE6,x","PIEIER3");
-    GEL_WatchAdd("*0x0CE7,x","PIEIFR3");
-}
-hotmenu PIEIER4_and_PIEIFR4()
-{
-    GEL_WatchAdd("*0x0CE8,x","PIEIER4");
-    GEL_WatchAdd("*0x0CE9,x","PIEIFR4");
-}
-hotmenu PIEIER5_and_PIEIFR5()
-{
-    GEL_WatchAdd("*0x0CEA,x","PIEIER5");
-    GEL_WatchAdd("*0x0CEB,x","PIEIFR5");
-}
-hotmenu PIEIER6_and_PIEIFR6()
-{
-    GEL_WatchAdd("*0x0CEC,x","PIEIER6");
-    GEL_WatchAdd("*0x0CED,x","PIEIFR6");
-}
-hotmenu PIEIER7_and_PIEIFR7()
-{
-    GEL_WatchAdd("*0x0CEE,x","PIEIER7");
-    GEL_WatchAdd("*0x0CEF,x","PIEIFR7");
-}
-hotmenu PIEIER8_and_PIEIFR8()
-{
-    GEL_WatchAdd("*0x0CF0,x","PIEIER8");
-    GEL_WatchAdd("*0x0CF1,x","PIEIFR8");
-}
-hotmenu PIEIER9_and_PIEIFR9()
-{
-    GEL_WatchAdd("*0x0CF2,x","PIEIER9");
-    GEL_WatchAdd("*0x0CF3,x","PIEIFR9");
-}
-hotmenu PIEIFR10_and_PIEIFR10()
-{
-    GEL_WatchAdd("*0x0CF4,x","PIEIER10");
-    GEL_WatchAdd("*0x0CF5,x","PIEIFR10");
-}
-hotmenu PIEIER11_and_PIEIFR11()
-{
-    GEL_WatchAdd("*0x0CF6,x","PIEIER11");
-    GEL_WatchAdd("*0x0CF7,x","PIEIFR11");
-}
-hotmenu PIEIER12_and_PIEIFR12()
-{
-    GEL_WatchAdd("*0x0CF8,x","PIEIER12");
-    GEL_WatchAdd("*0x0CF9,x","PIEIFR12");
-}
-
-
-/********************************************************************/
-/* Serial Communication Interface Registers                         */
-/********************************************************************/
-menuitem "Watch SCI Registers";
-
-hotmenu SCI_A_All_Regs()
-{
-    GEL_WatchAdd("*0x7050,x","SCICCRA");
-    GEL_WatchAdd("*0x7051,x","SCICTL1A");
-    GEL_WatchAdd("*0x7052,x","SCIHBAUDA");
-    GEL_WatchAdd("*0x7053,x","SCILBAUDA");
-    GEL_WatchAdd("*0x7054,x","SCICTL2A");
-    GEL_WatchAdd("*0x7055,x","SCIRXSTA");
-    GEL_WatchAdd("*0x7056,x","SCIRXEMUA");
-    GEL_WatchAdd("*0x7057,x","SCIRXBUFA");
-    GEL_WatchAdd("*0x7059,x","SCITXBUFA");
-    GEL_WatchAdd("*0x705A,x","SCIFFTXA");
-    GEL_WatchAdd("*0x705B,x","SCIFFRXA");
-    GEL_WatchAdd("*0x705C,x","SCIFFCTA");
-    GEL_WatchAdd("*0x705F,x","SCIPRIA");
-}
-hotmenu SCI_A_FIFO_Registers()
-{
-    GEL_WatchAdd("*0x705A,x","SCIFFTXA");
-    GEL_WatchAdd("*0x705B,x","SCIFFRXA");
-    GEL_WatchAdd("*0x705C,x","SCIFFCTA");
-}
-hotmenu SCI_B_All_Regs()
-{
-    GEL_WatchAdd("*0x7750,x","SCICCRB");
-    GEL_WatchAdd("*0x7751,x","SCICTL1B");
-    GEL_WatchAdd("*0x7752,x","SCIHBAUDB");
-    GEL_WatchAdd("*0x7753,x","SCILBAUDB");
-    GEL_WatchAdd("*0x7754,x","SCICTL2B");
-    GEL_WatchAdd("*0x7755,x","SCIRXSTB");
-    GEL_WatchAdd("*0x7756,x","SCIRXEMUB");
-    GEL_WatchAdd("*0x7757,x","SCIRXBUFB");
-    GEL_WatchAdd("*0x7759,x","SCITXBUFB");
-    GEL_WatchAdd("*0x775A,x","SCIFFTXB");
-    GEL_WatchAdd("*0x775B,x","SCIFFRXB");
-    GEL_WatchAdd("*0x775C,x","SCIFFCTB");
-    GEL_WatchAdd("*0x775F,x","SCIPRIB");
-}
-hotmenu SCI_B_FIFO_Registers()
-{
-    GEL_WatchAdd("*0x775A,x","SCIFFTXB");
-    GEL_WatchAdd("*0x775B,x","SCIFFRXB");
-    GEL_WatchAdd("*0x775C,x","SCIFFCTB");
-}
-hotmenu SCI_C_All_Regs()
-{
-    GEL_WatchAdd("*0x7770,x","SCICCRC");
-    GEL_WatchAdd("*0x7771,x","SCICTL1C");
-    GEL_WatchAdd("*0x7772,x","SCIHBAUDC");
-    GEL_WatchAdd("*0x7773,x","SCILBAUDC");
-    GEL_WatchAdd("*0x7774,x","SCICTL2C");
-    GEL_WatchAdd("*0x7775,x","SCIRXSTC");
-    GEL_WatchAdd("*0x7776,x","SCIRXEMUC");
-    GEL_WatchAdd("*0x7777,x","SCIRXBUFC");
-    GEL_WatchAdd("*0x7779,x","SCITXBUFC");
-    GEL_WatchAdd("*0x777A,x","SCIFFTXC");
-    GEL_WatchAdd("*0x777B,x","SCIFFRXC");
-    GEL_WatchAdd("*0x777C,x","SCIFFCTC");
-    GEL_WatchAdd("*0x777F,x","SCIPRIC");
-}
-hotmenu SCI_C_FIFO_Registers()
-{
-    GEL_WatchAdd("*0x777A,x","SCIFFTXC");
-    GEL_WatchAdd("*0x777B,x","SCIFFRXC");
-    GEL_WatchAdd("*0x777C,x","SCIFFCTC");
-}
-
-
-/********************************************************************/
-/* Serial Peripheral Interface Registers                            */
-/********************************************************************/
-menuitem "Watch SPI Registers";
-
-hotmenu SPI_A_All_Regs()
-{
-    GEL_WatchAdd("*0x7040,x","SPIA SPICCR");
-    GEL_WatchAdd("*0x7041,x","SPIA SPICTL");
-    GEL_WatchAdd("*0x7042,x","SPIA SPIST");
-    GEL_WatchAdd("*0x7044,x","SPIA SPIBRR");
-    GEL_WatchAdd("*0x7046,x","SPIA SPIEMU");
-    GEL_WatchAdd("*0x7047,x","SPIA SPIRXBUF");
-    GEL_WatchAdd("*0x7048,x","SPIA SPITXBUF");
-    GEL_WatchAdd("*0x7049,x","SPIA SPIDAT");
-    GEL_WatchAdd("*0x704A,x","SPIA SPIFFTX");
-    GEL_WatchAdd("*0x704B,x","SPIA SPIFFRX");
-    GEL_WatchAdd("*0x704C,x","SPIA SPIFFCT");
-    GEL_WatchAdd("*0x704F,x","SPIA SPIPRI");
-}
-hotmenu SPI_A_FIFO_Registers()
-{
-    GEL_WatchAdd("*0x704A,x","SPIA SPIFFTX");
-    GEL_WatchAdd("*0x704B,x","SPIA SPIFFRX");
-    GEL_WatchAdd("*0x704C,x","SPIA SPIFFCT");
-}
-
-
-/********************************************************************/
-/* Watchdog Timer Registers                                         */
-/********************************************************************/
-menuitem "Watch Watchdog Timer Registers";
-
-hotmenu All_Watchdog_Regs()
-{
-    GEL_WatchAdd("*0x7023,x","WDCNTR");
-    GEL_WatchAdd("*0x7025,x","WDKEY");
-    GEL_WatchAdd("*0x7029,x","WDCR");
-    GEL_WatchAdd("*0x7022,x","SCSR");
-}
-
-/********************************************************************/
-/*** End of file ***/
diff --git a/Source/External/v120/DSP2833x_common/gel/f28332.gel b/Source/External/v120/DSP2833x_common/gel/f28332.gel
deleted file mode 100644
index 9a9d2fb..0000000
--- a/Source/External/v120/DSP2833x_common/gel/f28332.gel
+++ /dev/null
@@ -1,2845 +0,0 @@
-/********************************************************************/
-/* f28332.gel                                                       */
-/* Version 3.30.2                                                   */
-/*                                                                  */
-/* This GEL file is to be used with the TMS320F28332 DSP.           */
-/* Changes may be required to support specific hardware designs.    */
-/*                                                                  */
-/* Code Composer Studio supports six reserved GEL functions that    */
-/* automatically get executed if they are defined. They are:        */
-/*                                                                  */
-/* StartUp()              - Executed whenever CCS is invoked        */
-/* OnReset()              - Executed after Debug->Reset CPU         */
-/* OnRestart()            - Executed after Debug->Restart           */
-/* OnPreFileLoaded()      - Executed before File->Load Program      */
-/* OnFileLoaded()         - Executed after File->Load Program       */
-/* OnTargetConnect()      - Executed after Debug->Connect           */
-/*                                                                  */
-/********************************************************************/
-
-StartUp()
-{
-
-/* The next line automatically loads the .gel file that comes   */
-/* with the DSP2833x Peripheral Header Files download.  To use, */
-/* uncomment, and adjust the directory path as needed.          */
-//  GEL_LoadGel("c:\\CCStudio_v3.3\\cc\\gel\\DSP2833x_Peripheral.gel");
-
-}
-
-OnReset(int nErrorCode)
-{
-    C28x_Mode();
-    Unlock_CSM();
-    ADC_Cal();
-}
-
-OnRestart(int nErrorCode)
-{
-/* CCS will call OnRestart() when you do a Debug->Restart and   */
-/* after you load a new file.  Between running interrupt based  */
-/* programs, this function will clear interrupts and help keep  */
-/* the processor from going off into invalid memory.            */
-     C28x_Mode();
-     IER = 0;
-     IFR = 0;
-     ADC_Cal();
-}
-
-int TxtOutCtl=0;
-OnPreFileLoaded()
-{
-    XINTF_Enable();
-    if (TxtOutCtl==0)
-    {
-     GEL_TextOut("\nNOTES:\nGel will enable XINTFx16 during Debug only.\nEnable XINTF in code prior to use.");
-     GEL_TextOut("\nFPU Registers can be found via GEL->Watch FPU Registers."); 
-	 TxtOutCtl=1;
-    }
-}
-
-OnFileLoaded(int nErrorCode, int bSymbolsOnly)
-{
-    ADC_Cal();
-}
-
-OnTargetConnect()
-{
-    C28x_Mode();
-    F28332_Memory_Map();            /* Initialize the CCS memory map */
-
-/* Check to see if CCS has been started-up with the DSP already */
-/* running in real-time mode.  The user can add whatever        */
-/* custom initialization stuff they want to each case.          */
-
-    if (GEL_IsInRealtimeMode())     /* Do real-time mode target initialization */
-    {
-
-    }
-    else                            /* Do stop-mode target initialization */
-    {
-        GEL_Reset();                /* Reset DSP */
-    }
-
-}
-
-
-/********************************************************************/
-/* These functions are launched by the GEL_Toolbar button plugin    */
-/********************************************************************/
-GEL_Toolbar1()
-{
-    Run_Realtime_with_Reset();
-}
-GEL_Toolbar2()
-{
-    Run_Realtime_with_Restart();
-}
-GEL_Toolbar3()
-{
-    Full_Halt();
-}
-GEL_Toolbar4()
-{
-    Full_Halt_with_Reset();
-}
-
-int GEL_Toolbar5_Toggle = 0;
-GEL_Toolbar5()
-{
-    if(GEL_Toolbar5_Toggle == 0)
-    {
-        GEL_Toolbar5_Toggle = 1;
-        GEL_OpenWindow("GEL_Buttons",1,4);
-        GEL_TextOut("Button 1: Run_Realtime_with_Reset()","GEL_Buttons",0,0);
-        GEL_TextOut("Button 2: Run_Realtime_with_Restart()","GEL_Buttons",0,1);
-        GEL_TextOut("Button 3: Full_Halt()", "GEL_Buttons",0,2);
-        GEL_TextOut("Button 4: Full_Halt_with_Reset()","GEL_Buttons",0,3);
-    }
-    else
-    {
-        GEL_Toolbar5_Toggle = 0;
-        GEL_CloseWindow("GEL_Buttons");
-    }
-}
-
-
-/********************************************************************/
-/* These functions are useful to engage/dis-enagage realtime        */
-/* emulation mode during debug.  They save the user from having to  */
-/* manually perform these steps in CCS.                             */
-/********************************************************************/
-menuitem "Realtime Emulation Control";
-
-hotmenu Run_Realtime_with_Reset()
-{
-    GEL_Reset();                /* Reset the DSP */
-    ST1 = ST1 & 0xFFFD;         /* clear DBGM bit in ST1 */
-    GEL_EnableRealtime();       /* Enable Realtime mode */
-    GEL_Run();                  /* Run the DSP */
-}
-hotmenu Run_Realtime_with_Restart()
-{
-    GEL_Restart();              /* Reset the DSP */
-    ST1 = ST1 & 0xFFFD;         /* clear DBGM bit in ST1 */
-    GEL_EnableRealtime();       /* Enable Realtime mode */
-    GEL_Run();                  /* Run the DSP */
-}
-hotmenu Full_Halt()
-{
-    GEL_DisableRealtime();      /* Disable Realtime mode */
-    GEL_Halt();                 /* Halt the DSP */
-}
-hotmenu Full_Halt_with_Reset()
-{
-    GEL_DisableRealtime();      /* Disable Realtime mode */
-    GEL_Halt();                 /* Halt the DSP */
-    GEL_Reset();                /* Reset the DSP */
-}
-
-
-/********************************************************************/
-/*                         F28332 Memory Map                        */
-/*                                                                  */
-/*   Note: M0M1MAP and VMAP signals tied high on F28332 core        */
-/*                                                                  */
-/*   0x000000 - 0x0003ff   M0 SARAM                (Prog and Data)  */
-/*   0x000400 - 0x0007ff   M1 SARAM                (Prog and Data)  */
-/*   0x000800 - 0x001fff   Peripheral Frame0 (PF0) (Data only)      */
-/*   0x004000 - 0x004fff   XINTF Zone 0            (Prog and Data)  */
-/*   0x005000 - 0x005fff   Peripheral Frame3 (PF3) (Data only)      */
-/*   0x006000 - 0x006fff   Peripheral Frame1 (PF1) (Data only)      */
-/*   0x007000 - 0x007fff   Peripheral Frame2 (PF2) (Data only)      */
-/*   0x008000 - 0x008fff   L0 SARAM                (Prog and Data)  */
-/*   0x009000 - 0x009fff   L1 SARAM                (Prog and Data)  */
-/*   0x00A000 - 0x00Afff   L2 SARAM                (Prog and Data)  */
-/*   0x00B000 - 0x00Bfff   L3 SARAM                (Prog and Data)  */
-/*   0x00C000 - 0x00Cfff   L4 SARAM                (Prog and Data)  */
-/*   0x00D000 - 0x00Dfff   L5 SARAM                (Prog and Data)  */
-/*   0x100000 - 0x1fffff   XINTF Zone 6            (Prog and Data)  */
-/*   0x200000 - 0x2fffff   XINTF Zone 7            (Prog and Data)  */
-/*   0x330000 - 0x33ffff   Flash                   (Prog and Data)  */
-/*   0x380080 - 0x380088   ADC_cal function        (Prog and Data)  */
-/*   0x380090 - 0x380090   PARTID value            (Prog and Data)  */
-/*   0x380400 - 0x3807ff   OTP                     (Prog and Data)  */
-/*   0x3f8000 - 0x3f8fff   L0 SARAM                (Prog and Data)  */
-/*   0x3f9000 - 0x3f9fff   L1 SARAM                (Prog and Data)  */
-/*   0x3fA000 - 0x3fAfff   L2 SARAM                (Prog and Data)  */
-/*   0x3fB000 - 0x3fBfff   L3 SARAM                (Prog and Data)  */
-/*   0x3fe000 - 0x3fffff   BOOT ROM                (Prog and Data)  */
-/********************************************************************/
-menuitem "Initialize Memory Map";
-
-hotmenu F28332_Memory_Map()
-{
-    GEL_MapReset();
-    GEL_MapOn();
-
-    /* Program memory map */
-    GEL_MapAdd(0x0,0,0x400,1,1);                 /* M0 SARAM        */
-    GEL_MapAdd(0x400,0,0x400,1,1);               /* M1 SARAM        */
-    GEL_MapAdd(0x4000,0,0x1000,1,1);             /* Zone 0          */
-    GEL_MapAdd(0x8000,0,0x1000,1,1);             /* L0 SARAM        */
-    GEL_MapAdd(0x9000,0,0x1000,1,1);             /* L1 SARAM        */
-    GEL_MapAdd(0xA000,0,0x1000,1,1);             /* L2 SARAM        */
-    GEL_MapAdd(0xB000,0,0x1000,1,1);             /* L3 SARAM        */
-    GEL_MapAdd(0xC000,0,0x1000,1,1);             /* L4 SARAM        */
-    GEL_MapAdd(0xD000,0,0x1000,1,1);             /* L5 SARAM        */
-    GEL_MapAdd(0x100000,0,0x100000,1,1);         /* Zone 6          */
-    GEL_MapAdd(0x200000,0,0x100000,1,1);         /* Zone 7          */
-    GEL_MapAdd(0x330000,0,0x10000,1,0);          /* FLASH           */
-    GEL_MapAdd(0x380080,0,0x00009,1,0);          /* ADC_cal function*/
-    GEL_MapAdd(0x380090,0,0x00001,1,0);          /* PARTID value    */
-    GEL_MapAdd(0x380400,0,0x00400,1,0);          /* OTP             */
-    GEL_MapAdd(0x3f8000,0,0x1000,1,1);           /* L0 SARAM Mirror */
-    GEL_MapAdd(0x3f9000,0,0x1000,1,1);           /* L1 SARAM Mirror */
-    GEL_MapAdd(0x3fA000,0,0x1000,1,1);           /* L2 SARAM Mirror */
-    GEL_MapAdd(0x3fb000,0,0x1000,1,1);           /* L3 SARAM Mirror */
-    GEL_MapAdd(0x3fe000,0,0x2000,1,0);           /* BOOT ROM        */
-
-    /* Data memory map */
-    GEL_MapAdd(0x000,1,0x400,1,1);               /* M0 SARAM        */
-    GEL_MapAdd(0x400,1,0x400,1,1);               /* M1 SARAM        */
-    GEL_MapAdd(0x800,1,0x1800,1,1);              /* PF0             */
-    GEL_MapAdd(0x4000,1,0x1000,1,1);             /* Zone 0          */
-    GEL_MapAdd(0x5000,1,0x1000,1,1);             /* PF3             */
-    GEL_MapAdd(0x6000,1,0x1000,1,1);             /* PF1             */
-    GEL_MapAddStr(0x7000,1,0x1000,"R|W|AS2",0);  /* PF2             */
-    GEL_MapAdd(0x8000,1,0x1000,1,1);             /* L0 SARAM        */
-    GEL_MapAdd(0x9000,1,0x1000,1,1);             /* L1 SARAM        */
-    GEL_MapAdd(0xA000,1,0x1000,1,1);             /* L2 SARAM        */
-    GEL_MapAdd(0xB000,1,0x1000,1,1);             /* L3 SARAM        */
-    GEL_MapAdd(0xC000,1,0x1000,1,1);             /* L4 SARAM        */
-    GEL_MapAdd(0xD000,1,0x1000,1,1);             /* L5 SARAM        */
-    GEL_MapAdd(0x100000,1,0x100000,1,1);         /* Zone 6          */
-    GEL_MapAdd(0x200000,1,0x100000,1,1);         /* Zone 7          */
-    GEL_MapAdd(0x330000,1,0x10000,1,0);          /* FLASH           */
-    GEL_MapAdd(0x380080,1,0x00009,1,0);          /* ADC_cal function*/
-    GEL_MapAdd(0x380090,1,0x00001,1,0);          /* PARTID value    */
-    GEL_MapAdd(0x380400,1,0x00400,1,0);          /* OTP             */
-    GEL_MapAdd(0x3f8000,1,0x1000,1,1);           /* L0 SARAM Mirror */
-    GEL_MapAdd(0x3f9000,1,0x1000,1,1);           /* L1 SARAM Mirror */
-    GEL_MapAdd(0x3fA000,1,0x1000,1,1);           /* L2 SARAM Mirror */
-    GEL_MapAdd(0x3fb000,1,0x1000,1,1);           /* L3 SARAM Mirror */
-    GEL_MapAdd(0x3fe000,1,0x2000,1,0);           /* BOOT ROM        */
-}
-
-
-/********************************************************************/
-/* The ESTOP0 fill functions are useful for debug.  They fill the   */
-/* RAM with software breakpoints that will trap runaway code.       */
-/********************************************************************/
-hotmenu Fill_F28332_RAM_with_ESTOP0()
-{
-    GEL_MemoryFill(0x000000,1,0x000800,0x7625);      /* Fill M0/M1  */
-    GEL_MemoryFill(0x008000,1,0x002000,0x7625);      /* Fill L0/L1  */
-    GEL_MemoryFill(0x00A000,1,0x002000,0x7625);      /* Fill L2/L3  */
-    GEL_MemoryFill(0x00C000,1,0x002000,0x7625);      /* Fill L4/L5  */
-}
-
-
-/********************************************************************/
-menuitem "Watchdog";
-hotmenu Disable_WD()
-{
-    *0x7029 = *0x7029 | 0x0068;                /* Set the WDDIS bit */
-    *0x7025 = 0x0055;                          /* Service the WD    */
-    *0x7025 = 0x00AA;                          /*  once to be safe. */
-    GEL_TextOut("\nWatchdog Timer Disabled");
-}
-
-
-/********************************************************************/
-menuitem "Code Security Module"
-hotmenu Unlock_CSM()
-{
-    /* Perform dummy reads of the password locations */
-    XAR0 = *0x33FFF8;
-    XAR0 = *0x33FFF9;
-    XAR0 = *0x33FFFA;
-    XAR0 = *0x33FFFB;
-    XAR0 = *0x33FFFC;
-    XAR0 = *0x33FFFD;
-    XAR0 = *0x33FFFE;
-    XAR0 = *0x33FFFF;
-
-    /* Write passwords to the KEY registers.  0xFFFF's are dummy passwords.
-       User should replace them with the correct password for their DSP */
-    *0xAE0 = 0xFFFF;
-    *0xAE1 = 0xFFFF;
-    *0xAE2 = 0xFFFF;
-    *0xAE3 = 0xFFFF;
-    *0xAE4 = 0xFFFF;
-    *0xAE5 = 0xFFFF;
-    *0xAE6 = 0xFFFF;
-    *0xAE7 = 0xFFFF;
-}
-
-
-/********************************************************************/
-menuitem "Addressing Modes";
-hotmenu C28x_Mode()
-{
-    ST1 = ST1 & (~0x0100);      /*   AMODE = 0  */
-    ST1 = ST1 | 0x0200;         /* OBJMODE = 1  */
-}
-hotmenu C24x_Mode()
-{
-    ST1 = ST1 | 0x0100;         /*   AMODE = 1  */
-    ST1 = ST1 | 0x0200;         /* OBJMODE = 1  */
-}
-hotmenu C27x_Mode()
-{
-    ST1 = ST1 & (~0x0100);      /*   AMODE = 0  */
-    ST1 = ST1 & (~0x0200);      /* OBJMODE = 0  */
-}
-
-
-/********************************************************************/
-/*                            PLL Ratios                            */
-/*                                                                  */
-/* The following table describes the PLL clocking ratios (0..10)    */
-/*                                                                  */
-/*   Ratio        CLKIN         Description                         */
-/*   -----    --------------    ------------                        */
-/*     0      OSCCLK/2          PLL bypassed                        */
-/*     1      (OSCCLK * 1)/2    10 Mhz for 20 Mhz CLKIN             */
-/*     2      (OSCCLK * 2)/2    20 Mhz for 20 Mhz CLKIN             */
-/*     3      (OSCCLK * 3)/2    30 Mhz for 20 Mhz CLKIN             */
-/*     4      (OSCCLK * 4)/2    40 Mhz for 20 Mhz CLKIN             */
-/*     5      (OSCCLK * 5)/2    50 Mhz for 20 Mhz CLKIN             */
-/*     6      (OSCCLK * 6)/2    60 Mhz for 20 Mhz CLKIN             */
-/*     7      (OSCCLK * 7)/2    70 Mhz for 20 Mhz CLKIN             */
-/*     8      (OSCCLK * 8)/2    80 Mhz for 20 Mhz CLKIN             */
-/*     9      (OSCCLK * 9)/2    90 Mhz for 20 Mhz CLKIN             */
-/*    10      (OSCCLK * 10)/2  100 Mhz for 20 Mhz CLKIN             */
-/********************************************************************/
-menuitem "Set PLL Ratio";
-
-hotmenu Bypass()
-{
-    DIVSEL_div2();     /* DIVSEL = 1/2                      */
-    *0x7021 = 0;       /* CLKIN = OSCCLK/2, PLL is bypassed */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x1_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 1;      /* CLKIN = (OSCCLK * 1)/2 */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x2_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 2;      /* CLKIN = (OSCCLK * 2)/2 */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x3_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 3;      /* CLKIN = (OSCCLK * 3)/2 */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x4_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 4;      /* CLKIN = (OSCCLK * 4)/2 */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x5_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 5;      /* CLKIN = (OSCCLK * 5)/2 */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x6_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 6;      /* CLKIN = (OSCCLK * 6)/2 */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x7_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 7;      /* CLKIN = (OSCCLK * 7)/2 */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x8_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 8;      /* CLKIN = (OSCCLK * 8)/2 */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x9_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 9;      /* CLKIN = (OSCCLK * 9)/2 */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x10_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 10;     /* CLKIN = (OSCCLK * 10)/2 */
-    PLL_Wait();
-}
-// hotmenu OSCCLK_x1_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 1;      /* CLKIN = (OSCCLK * 1)/1 */
-//     PLL_Wait();
-// }
-// hotmenu OSCCLK_x2_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 2;      /* CLKIN = (OSCCLK * 2)/1 */
-//     PLL_Wait();
-// }
-// hotmenu OSCCLK_x3_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 3;      /* CLKIN = (OSCCLK * 3)/1 */
-//     PLL_Wait();
-// }
-// hotmenu OSCCLK_x4_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 4;      /* CLKIN = (OSCCLK * 4)/1 */
-//     PLL_Wait();
-// }
-// hotmenu OSCCLK_x5_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 5;      /* CLKIN = (OSCCLK * 5)/1 */
-//     PLL_Wait();
-// }
-// hotmenu OSCCLK_x6_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 6;      /* CLKIN = (OSCCLK * 6)/1 */
-//     PLL_Wait();
-// }
-// hotmenu OSCCLK_x7_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 7;      /* CLKIN = (OSCCLK * 7)/1 */
-//     PLL_Wait();
-// }
-// hotmenu OSCCLK_x8_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 8;      /* CLKIN = (OSCCLK * 8)/1 */
-//     PLL_Wait();
-// }
-// hotmenu OSCCLK_x9_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 9;      /* CLKIN = (OSCCLK * 9)/1 */
-//     PLL_Wait();
-// }
-// hotmenu OSCCLK_x10_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 10;     /* CLKIN = (OSCCLK * 10)/1 */
-//     PLL_Wait();
-// }
-
-
-
-/********************************************************************/
-/* For F2833x devices, DIVSEL is 1/4 by default.  Switch it to 1/2  */
-/********************************************************************/
-
-DIVSEL_div2()
-{
-    int temp;
-    int PLLSTS;
-
-    PLLSTS = 0x7011;
-
-    temp  = *PLLSTS; 
-    temp &=  0xFE7F;   /* Clear bits 7 & 8 */
-    temp |= 2 << 7;    /* Set bit 8        */
-    *PLLSTS = temp;    /* Switch to 1/2    */
-}
-
-
-
-/********************************************************************/
-/* For F2833x devices, DIVSEL is 1/4 by default.  Switch it to /1   */
-/********************************************************************/
-
-DIVSEL_div1()
-{
-    int temp;
-    int PLLSTS;
-
-    PLLSTS = 0x7011;
-    
-    DIVSEL_div2();     /* First switch DIVSEL to 1/2 and wait */
-    wait();  
-    temp  = *PLLSTS; 
-    temp |= 3 << 7;    /* Set bits 7 & 8   */
-    *PLLSTS = temp;    /* Switch to 1/2    */
-}
-
-wait()
-{
-    int delay = 0;
-    for (delay = 0; delay <= 5; delay ++)
-    {}
-}
-
-/********************************************************************/
-/* For F2833x devices, check the PLLOCKS bit for PLL lock.          */
-/********************************************************************/
-PLL_Wait()
-{
-    int PLLSTS;
-    int delay = 0;
-
-    PLLSTS = 0x7011;
-    
-    
-    while ( ( (unsigned int)*PLLSTS & 0x0001) != 0x0001)
-    {
-        delay++;
-        GEL_TextOut("Waiting for PLL Lock, PLLSTS = %x\n",,,,,(unsigned int)*PLLSTS);
-    }
-    GEL_TextOut("\nPLL lock complete, PLLSTS = %x\n",,,,,(unsigned int)*PLLSTS);
-}
-
-
-/********************************************************************/
-/* Load the ADC Calibration values from TI OTP                      */
-/********************************************************************/
-menuitem "ADC Calibration"
-hotmenu ADC_Cal()
-{
-    /* Perform dummy reads of the password locations */
-    XAR0 = *0x33FFF8;
-    XAR0 = *0x33FFF9;
-    XAR0 = *0x33FFFA;
-    XAR0 = *0x33FFFB;
-    XAR0 = *0x33FFFC;
-    XAR0 = *0x33FFFD;
-    XAR0 = *0x33FFFE;
-    XAR0 = *0x33FFFF;
-
-    if(((*0x0AEF) & 0x0001) == 0)
-    {
-        XAR0 = *0x701C;
-        *0x701C |= 0x0008;  
-	*0x711C = *0x380083;
-        *0x711D = *0x380085;
-        *0x701C = XAR0;
-	XAR0 = 0;
-       
-     } 
-     else
-     {
-        GEL_TextOut("\nADC Calibration not complete, device is secure"); 
-     }
-}
-
-/********************************************************************/
-/* Enable the XINTF and configure GPIOs for XINTF function          */
-/********************************************************************/
-menuitem "XINTF Enable"
-hotmenu XINTF_Enable()
-{
-
-   /* enable XINTF clock (XTIMCLK) */
-
-   *0x7020 = 0x3700;                          
-   /* GPBMUX1: XA0-XA7, XA16, XZCS0,        */
-   /*          XZCS7, XREADY, XRNW, XWE0    */
-   /* GPAMUX2: XA17-XA19, XZCS6             */
-   /* GPCMUX2: XA8-XA15                     */         
-   /* GPCMUX1: XD0-XD15                     */
-   *(unsigned long *)0x6F96 = 0xFFFFFFC0;   /* GPBMUX1 */
-   *(unsigned long *)0x6f88 = 0xFF000000;   /* GPAMUX2 */  
-   *(unsigned long *)0x6FA8 = 0x0000AAAA;   /* GPCMUX2 */  
-   *(unsigned long *)0x6FA6 = 0xAAAAAAAA;   /* GPCMUX1 */
-
-   /* Uncomment for x32 data bus            */
-   /* GPBMUX2: XD16-XD31                    */
-// *(unsigned long *)0x6F98 = 0xFFFFFFFF;   /* GPBMUX2 */ 
-   
-   /* Zone timing.  
-   /* Each zone can be configured seperately */
-   /* Uncomment the x16 or the x32 timing    */
-   /* depending on the data bus width for    */
-   /* the zone                               */
-
-   /* x16 Timing */
-   *(unsigned long *)0x0B20 = 0x0043FFFF;    /* Zone0 */
-   *(unsigned long *)0x0B2C = 0x0043FFFF;    /* Zone6 */
-   *(unsigned long *)0x0B2E = 0x0043FFFF;    /* Zone7 */
-
-   /* x32 Timing:
-// *(unsigned long *)0x0B20 = 0x0041FFFF;    /* x32 */
-// *(unsigned long *)0x0B2C = 0x0041FFFF;    /* x32 */
-// *(unsigned long *)0x0B2E = 0x0041FFFF;    /* x32 */
-
-}
-
-/********************************************************************/
-/* The below are used to display the symbolic names of the F28332   */
-/* memory mapped registers in the watch window. To view these       */
-/* registers, click on the GEL menu button in Code Composer Studio, */
-/* then select which registers or groups of registers you want to   */
-/* view. They will appear in the watch window under the Watch1 tab. */
-/********************************************************************/
-
-/* Add a space line to the GEL menu */
-menuitem "______________________________________";
-hotmenu __() {}
-
-/********************************************************************/
-/* A/D Converter Registers                                          */
-/********************************************************************/
-menuitem "Watch ADC Registers";
-
-hotmenu All_ADC_Regs()
-{
-    GEL_WatchAdd("*0x7100,x","ADCTRL1");
-    GEL_WatchAdd("*0x7101,x","ADCTRL2");
-    GEL_WatchAdd("*0x7102,x","ADCMAXCONV");
-    GEL_WatchAdd("*0x7103,x","ADCCHSELSEQ1");
-    GEL_WatchAdd("*0x7104,x","ADCCHSELSEQ2");
-    GEL_WatchAdd("*0x7105,x","ADCCHSELSEQ3");
-    GEL_WatchAdd("*0x7106,x","ADCCHSELSEQ4");
-    GEL_WatchAdd("*0x7107,x","ADCASEQSR");
-    GEL_WatchAdd("*0x7108,x","ADCRESULT0");
-    GEL_WatchAdd("*0x7109,x","ADCRESULT1");
-    GEL_WatchAdd("*0x710A,x","ADCRESULT2");
-    GEL_WatchAdd("*0x710B,x","ADCRESULT3");
-    GEL_WatchAdd("*0x710C,x","ADCRESULT4");
-    GEL_WatchAdd("*0x710D,x","ADCRESULT5");
-    GEL_WatchAdd("*0x710E,x","ADCRESULT6");
-    GEL_WatchAdd("*0x710F,x","ADCRESULT7");
-    GEL_WatchAdd("*0x7110,x","ADCRESULT8");
-    GEL_WatchAdd("*0x7111,x","ADCRESULT9");
-    GEL_WatchAdd("*0x7112,x","ADCRESULT10");
-    GEL_WatchAdd("*0x7113,x","ADCRESULT11");
-    GEL_WatchAdd("*0x7114,x","ADCRESULT12");
-    GEL_WatchAdd("*0x7115,x","ADCRESULT13");
-    GEL_WatchAdd("*0x7116,x","ADCRESULT14");
-    GEL_WatchAdd("*0x7117,x","ADCRESULT15");
-    GEL_WatchAdd("*0x7118,x","ADCTRL3");
-    GEL_WatchAdd("*0x7119,x","ADCST");
-    GEL_WatchAdd("*0x711C,x","ADCREFSEL");
-    GEL_WatchAdd("*0x711D,x","ADCOFFTRIM");
-
-    GEL_WatchAdd("*0x0B00,x","ADCRESULT0 Mirror");
-    GEL_WatchAdd("*0x0B01,x","ADCRESULT1 Mirror");
-    GEL_WatchAdd("*0x0B02,x","ADCRESULT2 Mirror");
-    GEL_WatchAdd("*0x0B03,x","ADCRESULT3 Mirror");
-    GEL_WatchAdd("*0x0B04,x","ADCRESULT4 Mirror");
-    GEL_WatchAdd("*0x0B05,x","ADCRESULT5 Mirror");
-    GEL_WatchAdd("*0x0B06,x","ADCRESULT6 Mirror");
-    GEL_WatchAdd("*0x0B07,x","ADCRESULT7 Mirror");
-    GEL_WatchAdd("*0x0B08,x","ADCRESULT8 Mirror");
-    GEL_WatchAdd("*0x0B09,x","ADCRESULT9 Mirror");
-    GEL_WatchAdd("*0x0B0A,x","ADCRESULT10 Mirror");
-    GEL_WatchAdd("*0x0B0B,x","ADCRESULT11 Mirror");
-    GEL_WatchAdd("*0x0B0C,x","ADCRESULT12 Mirror");
-    GEL_WatchAdd("*0x0B0D,x","ADCRESULT13 Mirror");
-    GEL_WatchAdd("*0x0B0E,x","ADCRESULT14 Mirror");
-    GEL_WatchAdd("*0x0B0F,x","ADCRESULT15 Mirror");
-}
-hotmenu ADC_Control_Regs()
-{
-    GEL_WatchAdd("*0x7100,x","ADCTRL1");
-    GEL_WatchAdd("*0x7101,x","ADCTRL2");
-    GEL_WatchAdd("*0x7102,x","ADCMAXCONV");
-    GEL_WatchAdd("*0x7107,x","ADCASEQSR");
-    GEL_WatchAdd("*0x7118,x","ADCTRL3");
-    GEL_WatchAdd("*0x7119,x","ADCST");
-    GEL_WatchAdd("*0x711C,x","ADCREFSEL");
-    GEL_WatchAdd("*0x711D,x","ADCOFFTRIM");
-}
-hotmenu ADCCHSELSEQx_Regs()
-{
-    GEL_WatchAdd("*0x7103,x","ADCCHSELSEQ1");
-    GEL_WatchAdd("*0x7104,x","ADCCHSELSEQ2");
-    GEL_WatchAdd("*0x7105,x","ADCCHSELSEQ3");
-    GEL_WatchAdd("*0x7106,x","ADCCHSELSEQ4");
-}
-hotmenu ADCRESULT_0_to_7()
-{
-    GEL_WatchAdd("*0x7108,x","ADCRESULT0");
-    GEL_WatchAdd("*0x7109,x","ADCRESULT1");
-    GEL_WatchAdd("*0x710A,x","ADCRESULT2");
-    GEL_WatchAdd("*0x710B,x","ADCRESULT3");
-    GEL_WatchAdd("*0x710C,x","ADCRESULT4");
-    GEL_WatchAdd("*0x710D,x","ADCRESULT5");
-    GEL_WatchAdd("*0x710E,x","ADCRESULT6");
-    GEL_WatchAdd("*0x710F,x","ADCRESULT7");
-}
-hotmenu ADCRESULT_8_to_15()
-{
-    GEL_WatchAdd("*0x7110,x","ADCRESULT8");
-    GEL_WatchAdd("*0x7111,x","ADCRESULT9");
-    GEL_WatchAdd("*0x7112,x","ADCRESULT10");
-    GEL_WatchAdd("*0x7113,x","ADCRESULT11");
-    GEL_WatchAdd("*0x7114,x","ADCRESULT12");
-    GEL_WatchAdd("*0x7115,x","ADCRESULT13");
-    GEL_WatchAdd("*0x7116,x","ADCRESULT14");
-    GEL_WatchAdd("*0x7117,x","ADCRESULT15");
-}
-hotmenu ADCRESULT_Mirror_0_to_7()
-{
-    GEL_WatchAdd("*0x0B00,x","ADCRESULT0 Mirror");
-    GEL_WatchAdd("*0x0B01,x","ADCRESULT1 Mirror");
-    GEL_WatchAdd("*0x0B02,x","ADCRESULT2 Mirror");
-    GEL_WatchAdd("*0x0B03,x","ADCRESULT3 Mirror");
-    GEL_WatchAdd("*0x0B04,x","ADCRESULT4 Mirror");
-    GEL_WatchAdd("*0x0B05,x","ADCRESULT5 Mirror");
-    GEL_WatchAdd("*0x0B06,x","ADCRESULT6 Mirror");
-    GEL_WatchAdd("*0x0B07,x","ADCRESULT7 Mirror");
-}
-hotmenu ADCRESULT_Mirror_8_to_15()
-{
-    GEL_WatchAdd("*0x0B08,x","ADCRESULT8 Mirror");
-    GEL_WatchAdd("*0x0B09,x","ADCRESULT9 Mirror");
-    GEL_WatchAdd("*0x0B0A,x","ADCRESULT10 Mirror");
-    GEL_WatchAdd("*0x0B0B,x","ADCRESULT11 Mirror");
-    GEL_WatchAdd("*0x0B0C,x","ADCRESULT12 Mirror");
-    GEL_WatchAdd("*0x0B0D,x","ADCRESULT13 Mirror");
-    GEL_WatchAdd("*0x0B0E,x","ADCRESULT14 Mirror");
-    GEL_WatchAdd("*0x0B0F,x","ADCRESULT15 Mirror");
-}
-
-
-/********************************************************************/
-/* Clocking and Low-Power Registers                                 */
-/********************************************************************/
-menuitem "Watch Clocking and Low-Power Registers";
-
-hotmenu All_Clocking_and_Low_Power_Regs()
-{
-    GEL_WatchAdd("*0x7010,x","XCLK");
-    GEL_WatchAdd("*0x7011,x","PLLSTS");
-    GEL_WatchAdd("*0x701A,x","HISPCP");
-    GEL_WatchAdd("*0x701B,x","LOSPCP");
-    GEL_WatchAdd("*0x701C,x","PCLKCR0");
-    GEL_WatchAdd("*0x701D,x","PCLKCR1");
-    GEL_WatchAdd("*0x701E,x","LPMCR0");
-    GEL_WatchAdd("*0x7020,x","PCLKCR3");
-    GEL_WatchAdd("*0x7021,x","PLLCR");
-}
-
-/********************************************************************/
-/* Code Security Module Registers                                   */
-/********************************************************************/
-menuitem "Watch Code Security Module Registers";
-
-hotmenu CSMSCR()
-{
-    GEL_WatchAdd("*0x0AEF,x","CSMSCR");
-    GEL_WatchAdd("(*0x0AEF>>15)&1,d"," FORCESEC bit");
-    GEL_WatchAdd("(*0x0AEF)&1,d","     SECURE bit");
-}
-hotmenu PWL_Locations()
-{
-    GEL_WatchAdd("*0x33FFF8,x","PWL0");
-    GEL_WatchAdd("*0x33FFF9,x","PWL1");
-    GEL_WatchAdd("*0x33FFFA,x","PWL2");
-    GEL_WatchAdd("*0x33FFFB,x","PWL3");
-    GEL_WatchAdd("*0x33FFFC,x","PWL4");
-    GEL_WatchAdd("*0x33FFFD,x","PWL5");
-    GEL_WatchAdd("*0x33FFFE,x","PWL6");
-    GEL_WatchAdd("*0x33FFFF,x","PWL7");
-}
-
-
-/********************************************************************/
-/* CPU Timer Registers                                              */
-/********************************************************************/
-menuitem "Watch CPU Timer Registers";
-
-hotmenu All_CPU_Timer0_Regs()
-{
-    GEL_WatchAdd("*0x0C00,x","TIMER0TIM");
-    GEL_WatchAdd("*0x0C01,x","TIMER0TIMH");
-    GEL_WatchAdd("*0x0C02,x","TIMER0PRD");
-    GEL_WatchAdd("*0x0C03,x","TIMER0PRDH");
-    GEL_WatchAdd("*0x0C04,x","TIMER0TCR");
-    GEL_WatchAdd("*0x0C06,x","TIMER0TPR");
-    GEL_WatchAdd("*0x0C07,x","TIMER0TPRH");
-}
-hotmenu All_CPU_Timer1_Regs()
-{
-    GEL_WatchAdd("*0x0C08,x","TIMER1TIM");
-    GEL_WatchAdd("*0x0C09,x","TIMER1TIMH");
-    GEL_WatchAdd("*0x0C0A,x","TIMER1PRD");
-    GEL_WatchAdd("*0x0C0B,x","TIMER1PRDH");
-    GEL_WatchAdd("*0x0C0C,x","TIMER1TCR");
-    GEL_WatchAdd("*0x0C0E,x","TIMER1TPR");
-    GEL_WatchAdd("*0x0C0F,x","TIMER1TPRH");
-}
-hotmenu All_CPU_Timer2_Regs()
-{
-    GEL_WatchAdd("*0x0C10,x","TIMER2TIM");
-    GEL_WatchAdd("*0x0C11,x","TIMER2TIMH");
-    GEL_WatchAdd("*0x0C12,x","TIMER2PRD");
-    GEL_WatchAdd("*0x0C13,x","TIMER2PRDH");
-    GEL_WatchAdd("*0x0C14,x","TIMER2TCR");
-    GEL_WatchAdd("*0x0C16,x","TIMER2TPR");
-    GEL_WatchAdd("*0x0C17,x","TIMER2TPRH");
-}
-
-
-/********************************************************************/
-/* Device Emulation Registers                                       */
-/********************************************************************/
-menuitem "Watch Device Emulation Registers";
-
-hotmenu All_Emulation_Regs()
-{
-    GEL_WatchAdd("*(long *)0x0880,x","DEVICECNF");
-    GEL_WatchAdd("*0x0882,x","CLASSID");
-    GEL_WatchAdd("*0x0883,x","REVID");
-    GEL_WatchAdd("*0x0884,x","PROTSTART");
-    GEL_WatchAdd("*0x0885,x","PROTRANGE");
-    GEL_WatchAdd("*0x380090,x","PARTID");    
-}
-
-/********************************************************************/
-/* DMA Registers                                                    */
-/********************************************************************/
-menuitem "Watch DMA Registers";
-
-hotmenu All_DMA_Regs()
-{
-    GEL_WatchAdd("*0x1000,x","DMACTRL");
-    GEL_WatchAdd("*0x1001,x","DEBUGCTRL");
-    GEL_WatchAdd("*0x1002,x","REVISION");
-    GEL_WatchAdd("*0x1004,x","PRIORITYCTRL1");
-    GEL_WatchAdd("*0x1006,x","PRIORITYSTAT");
-
-    GEL_WatchAdd("*0x1020,x","DMA Ch1 MODE");
-    GEL_WatchAdd("*0x1021,x","DMA Ch1 CONTROL");
-    GEL_WatchAdd("*0x1022,x","DMA Ch1 BURST_SIZE");
-    GEL_WatchAdd("*0x1023,x","DMA Ch1 BURST_COUNT");
-    GEL_WatchAdd("*0x1024,x","DMA Ch1 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x1025,x","DMA Ch1 DST_BURST_STEP");
-    GEL_WatchAdd("*0x1026,x","DMA Ch1 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x1027,x","DMA Ch1 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x1028,x","DMA Ch1 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x1029,x","DMA Ch1 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x102A,x","DMA Ch1 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x102B,x","DMA Ch1 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x102C,x","DMA Ch1 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x102D,x","DMA Ch1 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x102E,x","DMA Ch1 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x102F,x","DMA Ch1 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x1030,x","DMA Ch1 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1032,x","DMA Ch1 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1034,x","DMA Ch1 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1036,x","DMA Ch1 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1038,x","DMA Ch1 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x103A,x","DMA Ch1 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x103C,x","DMA Ch1 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x103E,x","DMA Ch1 DST_ADDR_ACTIVE");
-
-    GEL_WatchAdd("*0x1040,x","DMA Ch2 MODE");
-    GEL_WatchAdd("*0x1041,x","DMA Ch2 CONTROL");
-    GEL_WatchAdd("*0x1042,x","DMA Ch2 BURST_SIZE");
-    GEL_WatchAdd("*0x1043,x","DMA Ch2 BURST_COUNT");
-    GEL_WatchAdd("*0x1044,x","DMA Ch2 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x1045,x","DMA Ch2 DST_BURST_STEP");
-    GEL_WatchAdd("*0x1046,x","DMA Ch2 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x1047,x","DMA Ch2 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x1048,x","DMA Ch2 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x1049,x","DMA Ch2 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x104A,x","DMA Ch2 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x104B,x","DMA Ch2 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x104C,x","DMA Ch2 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x104D,x","DMA Ch2 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x104E,x","DMA Ch2 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x104F,x","DMA Ch2 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x1050,x","DMA Ch2 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1052,x","DMA Ch2 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1054,x","DMA Ch2 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1056,x","DMA Ch2 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1058,x","DMA Ch2 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x105A,x","DMA Ch2 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x105C,x","DMA Ch2 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x105E,x","DMA Ch2 DST_ADDR_ACTIVE");
-
-    GEL_WatchAdd("*0x1060,x","DMA Ch3 MODE");
-    GEL_WatchAdd("*0x1061,x","DMA Ch3 CONTROL");
-    GEL_WatchAdd("*0x1062,x","DMA Ch3 BURST_SIZE");
-    GEL_WatchAdd("*0x1063,x","DMA Ch3 BURST_COUNT");
-    GEL_WatchAdd("*0x1064,x","DMA Ch3 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x1065,x","DMA Ch3 DST_BURST_STEP");
-    GEL_WatchAdd("*0x1066,x","DMA Ch3 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x1067,x","DMA Ch3 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x1068,x","DMA Ch3 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x1069,x","DMA Ch3 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x106A,x","DMA Ch3 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x106B,x","DMA Ch3 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x106C,x","DMA Ch3 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x106D,x","DMA Ch3 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x106E,x","DMA Ch3 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x106F,x","DMA Ch3 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x1070,x","DMA Ch3 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1072,x","DMA Ch3 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1074,x","DMA Ch3 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1076,x","DMA Ch3 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1078,x","DMA Ch3 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x107A,x","DMA Ch3 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x107C,x","DMA Ch3 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x107E,x","DMA Ch3 DST_ADDR_ACTIVE");
-
-    GEL_WatchAdd("*0x1080,x","DMA Ch4 MODE");
-    GEL_WatchAdd("*0x1081,x","DMA Ch4 CONTROL");
-    GEL_WatchAdd("*0x1082,x","DMA Ch4 BURST_SIZE");
-    GEL_WatchAdd("*0x1083,x","DMA Ch4 BURST_COUNT");
-    GEL_WatchAdd("*0x1084,x","DMA Ch4 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x1085,x","DMA Ch4 DST_BURST_STEP");
-    GEL_WatchAdd("*0x1086,x","DMA Ch4 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x1087,x","DMA Ch4 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x1088,x","DMA Ch4 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x1089,x","DMA Ch4 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x108A,x","DMA Ch4 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x108B,x","DMA Ch4 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x108C,x","DMA Ch4 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x108D,x","DMA Ch4 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x108E,x","DMA Ch4 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x108F,x","DMA Ch4 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x1090,x","DMA Ch4 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1092,x","DMA Ch4 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1094,x","DMA Ch4 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1096,x","DMA Ch4 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1098,x","DMA Ch4 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x109A,x","DMA Ch4 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x109C,x","DMA Ch4 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x109E,x","DMA Ch4 DST_ADDR_ACTIVE");
-
-    GEL_WatchAdd("*0x10A0,x","DMA Ch5 MODE");
-    GEL_WatchAdd("*0x10A1,x","DMA Ch5 CONTROL");
-    GEL_WatchAdd("*0x10A2,x","DMA Ch5 BURST_SIZE");
-    GEL_WatchAdd("*0x10A3,x","DMA Ch5 BURST_COUNT");
-    GEL_WatchAdd("*0x10A4,x","DMA Ch5 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x10A5,x","DMA Ch5 DST_BURST_STEP");
-    GEL_WatchAdd("*0x10A6,x","DMA Ch5 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x10A7,x","DMA Ch5 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x10A8,x","DMA Ch5 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x10A9,x","DMA Ch5 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x10AA,x","DMA Ch5 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x10AB,x","DMA Ch5 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x10AC,x","DMA Ch5 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x10AD,x","DMA Ch5 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x10AE,x","DMA Ch5 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x10AF,x","DMA Ch5 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x10B0,x","DMA Ch5 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10B2,x","DMA Ch5 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10B4,x","DMA Ch5 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10B6,x","DMA Ch5 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10B8,x","DMA Ch5 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10BA,x","DMA Ch5 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10BC,x","DMA Ch5 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10BE,x","DMA Ch5 DST_ADDR_ACTIVE");
-
-    GEL_WatchAdd("*0x10C0,x","DMA Ch6 MODE");
-    GEL_WatchAdd("*0x10C1,x","DMA Ch6 CONTROL");
-    GEL_WatchAdd("*0x10C2,x","DMA Ch6 BURST_SIZE");
-    GEL_WatchAdd("*0x10C3,x","DMA Ch6 BURST_COUNT");
-    GEL_WatchAdd("*0x10C4,x","DMA Ch6 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x10C5,x","DMA Ch6 DST_BURST_STEP");
-    GEL_WatchAdd("*0x10C6,x","DMA Ch6 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x10C7,x","DMA Ch6 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x10C8,x","DMA Ch6 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x10C9,x","DMA Ch6 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x10CA,x","DMA Ch6 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x10CB,x","DMA Ch6 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x10CC,x","DMA Ch6 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x10CD,x","DMA Ch6 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x10CE,x","DMA Ch6 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x10CF,x","DMA Ch6 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x10D0,x","DMA Ch6 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10D2,x","DMA Ch6 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10D4,x","DMA Ch6 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10D6,x","DMA Ch6 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10D8,x","DMA Ch6 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10DA,x","DMA Ch6 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10DC,x","DMA Ch6 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10DE,x","DMA Ch6 DST_ADDR_ACTIVE");
-
-
-}
-hotmenu DMA_Channel_1_regs()
-{
-    GEL_WatchAdd("*0x1020,x","DMA Ch1 MODE");
-    GEL_WatchAdd("*0x1021,x","DMA Ch1 CONTROL");
-    GEL_WatchAdd("*0x1022,x","DMA Ch1 BURST_SIZE");
-    GEL_WatchAdd("*0x1023,x","DMA Ch1 BURST_COUNT");
-    GEL_WatchAdd("*0x1024,x","DMA Ch1 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x1025,x","DMA Ch1 DST_BURST_STEP");
-    GEL_WatchAdd("*0x1026,x","DMA Ch1 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x1027,x","DMA Ch1 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x1028,x","DMA Ch1 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x1029,x","DMA Ch1 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x102A,x","DMA Ch1 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x102B,x","DMA Ch1 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x102C,x","DMA Ch1 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x102D,x","DMA Ch1 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x102E,x","DMA Ch1 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x102F,x","DMA Ch1 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x1030,x","DMA Ch1 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1032,x","DMA Ch1 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1034,x","DMA Ch1 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1036,x","DMA Ch1 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1038,x","DMA Ch1 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x103A,x","DMA Ch1 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x103C,x","DMA Ch1 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x103E,x","DMA Ch1 DST_ADDR_ACTIVE");
-}
-
-hotmenu DMA_Channel_2_regs()
-{
-    GEL_WatchAdd("*0x1040,x","DMA Ch2 MODE");
-    GEL_WatchAdd("*0x1041,x","DMA Ch2 CONTROL");
-    GEL_WatchAdd("*0x1042,x","DMA Ch2 BURST_SIZE");
-    GEL_WatchAdd("*0x1043,x","DMA Ch2 BURST_COUNT");
-    GEL_WatchAdd("*0x1044,x","DMA Ch2 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x1045,x","DMA Ch2 DST_BURST_STEP");
-    GEL_WatchAdd("*0x1046,x","DMA Ch2 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x1047,x","DMA Ch2 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x1048,x","DMA Ch2 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x1049,x","DMA Ch2 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x104A,x","DMA Ch2 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x104B,x","DMA Ch2 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x104C,x","DMA Ch2 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x104D,x","DMA Ch2 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x104E,x","DMA Ch2 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x104F,x","DMA Ch2 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x1050,x","DMA Ch2 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1052,x","DMA Ch2 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1054,x","DMA Ch2 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1056,x","DMA Ch2 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1058,x","DMA Ch2 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x105A,x","DMA Ch2 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x105C,x","DMA Ch2 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x105E,x","DMA Ch2 DST_ADDR_ACTIVE");
-}
-hotmenu DMA_Channel_3_regs()
-{
-    GEL_WatchAdd("*0x1060,x","DMA Ch3 MODE");
-    GEL_WatchAdd("*0x1061,x","DMA Ch3 CONTROL");
-    GEL_WatchAdd("*0x1062,x","DMA Ch3 BURST_SIZE");
-    GEL_WatchAdd("*0x1063,x","DMA Ch3 BURST_COUNT");
-    GEL_WatchAdd("*0x1064,x","DMA Ch3 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x1065,x","DMA Ch3 DST_BURST_STEP");
-    GEL_WatchAdd("*0x1066,x","DMA Ch3 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x1067,x","DMA Ch3 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x1068,x","DMA Ch3 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x1069,x","DMA Ch3 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x106A,x","DMA Ch3 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x106B,x","DMA Ch3 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x106C,x","DMA Ch3 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x106D,x","DMA Ch3 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x106E,x","DMA Ch3 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x106F,x","DMA Ch3 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x1070,x","DMA Ch3 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1072,x","DMA Ch3 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1074,x","DMA Ch3 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1076,x","DMA Ch3 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1078,x","DMA Ch3 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x107A,x","DMA Ch3 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x107C,x","DMA Ch3 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x107E,x","DMA Ch3 DST_ADDR_ACTIVE");
-}
-hotmenu DMA_Channel_4_regs()
-{
-    GEL_WatchAdd("*0x1080,x","DMA Ch4 MODE");
-    GEL_WatchAdd("*0x1081,x","DMA Ch4 CONTROL");
-    GEL_WatchAdd("*0x1082,x","DMA Ch4 BURST_SIZE");
-    GEL_WatchAdd("*0x1083,x","DMA Ch4 BURST_COUNT");
-    GEL_WatchAdd("*0x1084,x","DMA Ch4 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x1085,x","DMA Ch4 DST_BURST_STEP");
-    GEL_WatchAdd("*0x1086,x","DMA Ch4 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x1087,x","DMA Ch4 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x1088,x","DMA Ch4 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x1089,x","DMA Ch4 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x108A,x","DMA Ch4 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x108B,x","DMA Ch4 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x108C,x","DMA Ch4 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x108D,x","DMA Ch4 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x108E,x","DMA Ch4 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x108F,x","DMA Ch4 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x1090,x","DMA Ch4 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1092,x","DMA Ch4 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1094,x","DMA Ch4 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1096,x","DMA Ch4 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1098,x","DMA Ch4 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x109A,x","DMA Ch4 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x109C,x","DMA Ch4 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x109E,x","DMA Ch4 DST_ADDR_ACTIVE");
-}
-hotmenu DMA_Channel_5_regs()
-{
-    GEL_WatchAdd("*0x10A0,x","DMA Ch5 MODE");
-    GEL_WatchAdd("*0x10A1,x","DMA Ch5 CONTROL");
-    GEL_WatchAdd("*0x10A2,x","DMA Ch5 BURST_SIZE");
-    GEL_WatchAdd("*0x10A3,x","DMA Ch5 BURST_COUNT");
-    GEL_WatchAdd("*0x10A4,x","DMA Ch5 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x10A5,x","DMA Ch5 DST_BURST_STEP");
-    GEL_WatchAdd("*0x10A6,x","DMA Ch5 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x10A7,x","DMA Ch5 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x10A8,x","DMA Ch5 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x10A9,x","DMA Ch5 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x10AA,x","DMA Ch5 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x10AB,x","DMA Ch5 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x10AC,x","DMA Ch5 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x10AD,x","DMA Ch5 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x10AE,x","DMA Ch5 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x10AF,x","DMA Ch5 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x10B0,x","DMA Ch5 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10B2,x","DMA Ch5 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10B4,x","DMA Ch5 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10B6,x","DMA Ch5 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10B8,x","DMA Ch5 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10BA,x","DMA Ch5 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10BC,x","DMA Ch5 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10BE,x","DMA Ch5 DST_ADDR_ACTIVE");
-}
-hotmenu DMA_Channel_6_regs()
-{
-    GEL_WatchAdd("*0x10C0,x","DMA Ch6 MODE");
-    GEL_WatchAdd("*0x10C1,x","DMA Ch6 CONTROL");
-    GEL_WatchAdd("*0x10C2,x","DMA Ch6 BURST_SIZE");
-    GEL_WatchAdd("*0x10C3,x","DMA Ch6 BURST_COUNT");
-    GEL_WatchAdd("*0x10C4,x","DMA Ch6 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x10C5,x","DMA Ch6 DST_BURST_STEP");
-    GEL_WatchAdd("*0x10C6,x","DMA Ch6 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x10C7,x","DMA Ch6 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x10C8,x","DMA Ch6 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x10C9,x","DMA Ch6 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x10CA,x","DMA Ch6 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x10CB,x","DMA Ch6 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x10CC,x","DMA Ch6 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x10CD,x","DMA Ch6 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x10CE,x","DMA Ch6 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x10CF,x","DMA Ch6 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x10D0,x","DMA Ch6 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10D2,x","DMA Ch6 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10D4,x","DMA Ch6 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10D6,x","DMA Ch6 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10D8,x","DMA Ch6 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10DA,x","DMA Ch6 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10DC,x","DMA Ch6 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10DE,x","DMA Ch6 DST_ADDR_ACTIVE");
-}
-
-/********************************************************************/
-/* eCAN Registers                                                   */
-/********************************************************************/
-menuitem "Watch eCAN Registers";
-
-hotmenu eCAN_A_Global_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6000,x","eCANA CANME");
-    GEL_WatchAdd("*(long *)0x6002,x","eCANA CANMD");
-    GEL_WatchAdd("*(long *)0x6004,x","eCANA CANTRS");
-    GEL_WatchAdd("*(long *)0x6006,x","eCANA CANTRR");
-    GEL_WatchAdd("*(long *)0x6008,x","eCANA CANTA");
-    GEL_WatchAdd("*(long *)0x600A,x","eCANA CANAA");
-    GEL_WatchAdd("*(long *)0x600C,x","eCANA CANRMP");
-    GEL_WatchAdd("*(long *)0x600E,x","eCANA CANRML");
-    GEL_WatchAdd("*(long *)0x6010,x","eCANA CANRFP");
-    GEL_WatchAdd("*(long *)0x6014,x","eCANA CANMC");
-    GEL_WatchAdd("*(long *)0x6016,x","eCANA CANBTC");
-    GEL_WatchAdd("*(long *)0x6018,x","eCANA CANES");
-    GEL_WatchAdd("*(long *)0x601A,x","eCANA CANTEC");
-    GEL_WatchAdd("*(long *)0x601C,x","eCANA CANREC");
-    GEL_WatchAdd("*(long *)0x601E,x","eCANA CANGIF0");
-    GEL_WatchAdd("*(long *)0x6020,x","eCANA CANGIM");
-    GEL_WatchAdd("*(long *)0x6022,x","eCANA CANGIF1");
-    GEL_WatchAdd("*(long *)0x6024,x","eCANA CANMIM");
-    GEL_WatchAdd("*(long *)0x6026,x","eCANA CANMIL");
-    GEL_WatchAdd("*(long *)0x6028,x","eCANA CANOPC");
-    GEL_WatchAdd("*(long *)0x602A,x","eCANA CANTIOC");
-    GEL_WatchAdd("*(long *)0x602C,x","eCANA CANRIOC");
-    GEL_WatchAdd("*(long *)0x602E,x","eCANA CANLNT");
-    GEL_WatchAdd("*(long *)0x6030,x","eCANA CANTOC");
-    GEL_WatchAdd("*(long *)0x6032,x","eCANA CANTOS");
-}
-hotmenu eCAN_A_Mailbox_0_to_1_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6040,x","eCANA LAM0");
-    GEL_WatchAdd("*(long *)0x6080,x","eCANA MOTS0");
-    GEL_WatchAdd("*(long *)0x60C0,x","eCANA MOTO0");
-    GEL_WatchAdd("*(long *)0x6100,x","eCANA MID0");
-    GEL_WatchAdd("*(long *)0x6102,x","eCANA MCF0");
-    GEL_WatchAdd("*(long *)0x6104,x","eCANA MDL0");
-    GEL_WatchAdd("*(long *)0x6106,x","eCANA MDH0");
-    
-    GEL_WatchAdd("*(long *)0x6042,x","eCANA LAM1");
-    GEL_WatchAdd("*(long *)0x6082,x","eCANA MOTS1");
-    GEL_WatchAdd("*(long *)0x60C2,x","eCANA MOTO1");
-    GEL_WatchAdd("*(long *)0x6108,x","eCANA MID1");
-    GEL_WatchAdd("*(long *)0x610A,x","eCANA MCF1");
-    GEL_WatchAdd("*(long *)0x610C,x","eCANA MDL1");
-    GEL_WatchAdd("*(long *)0x610E,x","eCANA MDH1");
-}
-hotmenu eCAN_A_Mailbox_2_to_3_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6044,x","eCANA LAM2");
-    GEL_WatchAdd("*(long *)0x6084,x","eCANA MOTS2");
-    GEL_WatchAdd("*(long *)0x60C4,x","eCANA MOTO2");
-    GEL_WatchAdd("*(long *)0x6110,x","eCANA MID2");
-    GEL_WatchAdd("*(long *)0x6112,x","eCANA MCF2");
-    GEL_WatchAdd("*(long *)0x6114,x","eCANA MDL2");
-    GEL_WatchAdd("*(long *)0x6116,x","eCANA MDH2");
-
-    GEL_WatchAdd("*(long *)0x6046,x","eCANA LAM3");
-    GEL_WatchAdd("*(long *)0x6086,x","eCANA MOTS3");
-    GEL_WatchAdd("*(long *)0x60C6,x","eCANA MOTO3");
-    GEL_WatchAdd("*(long *)0x6118,x","eCANA MID3");
-    GEL_WatchAdd("*(long *)0x611A,x","eCANA MCF3");
-    GEL_WatchAdd("*(long *)0x611C,x","eCANA MDL3");
-    GEL_WatchAdd("*(long *)0x611E,x","eCANA MDH3");
-}
-hotmenu eCAN_A_Mailbox_4_to_5_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6048,x","eCANA LAM4");
-    GEL_WatchAdd("*(long *)0x6088,x","eCANA MOTS4");
-    GEL_WatchAdd("*(long *)0x60C8,x","eCANA MOTO4");
-    GEL_WatchAdd("*(long *)0x6120,x","eCANA MID4");
-    GEL_WatchAdd("*(long *)0x6122,x","eCANA MCF4");
-    GEL_WatchAdd("*(long *)0x6124,x","eCANA MDL4");
-    GEL_WatchAdd("*(long *)0x6126,x","eCANA MDH4");
-    
-    GEL_WatchAdd("*(long *)0x604A,x","eCANA LAM5");
-    GEL_WatchAdd("*(long *)0x608A,x","eCANA MOTS5");
-    GEL_WatchAdd("*(long *)0x60CA,x","eCANA MOTO5");
-    GEL_WatchAdd("*(long *)0x6128,x","eCANA MID5");
-    GEL_WatchAdd("*(long *)0x612A,x","eCANA MCF5");
-    GEL_WatchAdd("*(long *)0x612C,x","eCANA MDL5");
-    GEL_WatchAdd("*(long *)0x612E,x","eCANA MDH5");
-}
-hotmenu eCAN_A_Mailbox_6_to_7_Regs()
-{
-    GEL_WatchAdd("*(long *)0x604C,x","eCANA LAM6");
-    GEL_WatchAdd("*(long *)0x608C,x","eCANA MOTS6");
-    GEL_WatchAdd("*(long *)0x60CC,x","eCANA MOTO6");
-    GEL_WatchAdd("*(long *)0x6130,x","eCANA MID6");
-    GEL_WatchAdd("*(long *)0x6132,x","eCANA MCF6");
-    GEL_WatchAdd("*(long *)0x6134,x","eCANA MDL6");
-    GEL_WatchAdd("*(long *)0x6136,x","eCANA MDH6");
-    
-    GEL_WatchAdd("*(long *)0x604E,x","eCANA LAM7");
-    GEL_WatchAdd("*(long *)0x608E,x","eCANA MOTS7");
-    GEL_WatchAdd("*(long *)0x60CE,x","eCANA MOTO7");
-    GEL_WatchAdd("*(long *)0x6138,x","eCANA MID7");
-    GEL_WatchAdd("*(long *)0x613A,x","eCANA MCF7");
-    GEL_WatchAdd("*(long *)0x613C,x","eCANA MDL7");
-    GEL_WatchAdd("*(long *)0x613E,x","eCANA MDH7");
-}
-hotmenu eCAN_A_Mailbox_8_to_9_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6050,x","eCANA LAM8");
-    GEL_WatchAdd("*(long *)0x6090,x","eCANA MOTS8");
-    GEL_WatchAdd("*(long *)0x60D0,x","eCANA MOTO8");
-    GEL_WatchAdd("*(long *)0x6140,x","eCANA MID8");
-    GEL_WatchAdd("*(long *)0x6142,x","eCANA MCF8");
-    GEL_WatchAdd("*(long *)0x6144,x","eCANA MDL8");
-    GEL_WatchAdd("*(long *)0x6146,x","eCANA MDH8");
-
-    GEL_WatchAdd("*(long *)0x6052,x","eCANA LAM9");
-    GEL_WatchAdd("*(long *)0x6092,x","eCANA MOTS9");
-    GEL_WatchAdd("*(long *)0x60D2,x","eCANA MOTO9");
-    GEL_WatchAdd("*(long *)0x6148,x","eCANA MID9");
-    GEL_WatchAdd("*(long *)0x614A,x","eCANA MCF9");
-    GEL_WatchAdd("*(long *)0x614C,x","eCANA MDL9");
-    GEL_WatchAdd("*(long *)0x614E,x","eCANA MDH9");
-}
-hotmenu eCAN_A_Mailbox_10_to_11_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6054,x","eCANA LAM10");
-    GEL_WatchAdd("*(long *)0x6094,x","eCANA MOTS10");
-    GEL_WatchAdd("*(long *)0x60D4,x","eCANA MOTO10");
-    GEL_WatchAdd("*(long *)0x6150,x","eCANA MID10");
-    GEL_WatchAdd("*(long *)0x6152,x","eCANA MCF10");
-    GEL_WatchAdd("*(long *)0x6154,x","eCANA MDL10");
-    GEL_WatchAdd("*(long *)0x6156,x","eCANA MDH10");
-
-    GEL_WatchAdd("*(long *)0x6056,x","eCANA LAM11");
-    GEL_WatchAdd("*(long *)0x6096,x","eCANA MOTS11");
-    GEL_WatchAdd("*(long *)0x60D6,x","eCANA MOTO11");
-    GEL_WatchAdd("*(long *)0x6158,x","eCANA MID11");
-    GEL_WatchAdd("*(long *)0x615A,x","eCANA MCF11");
-    GEL_WatchAdd("*(long *)0x615C,x","eCANA MDL11");
-    GEL_WatchAdd("*(long *)0x615E,x","eCANA MDH11");
-}
-hotmenu eCAN_A_Mailbox_12_to_13_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6058,x","eCANA LAM12");
-    GEL_WatchAdd("*(long *)0x6098,x","eCANA MOTS12");
-    GEL_WatchAdd("*(long *)0x60D8,x","eCANA MOTO12");
-    GEL_WatchAdd("*(long *)0x6160,x","eCANA MID12");
-    GEL_WatchAdd("*(long *)0x6162,x","eCANA MCF12");
-    GEL_WatchAdd("*(long *)0x6164,x","eCANA MDL12");
-    GEL_WatchAdd("*(long *)0x6166,x","eCANA MDH12");
-    
-    GEL_WatchAdd("*(long *)0x605A,x","eCANA LAM13");
-    GEL_WatchAdd("*(long *)0x609A,x","eCANA MOTS13");
-    GEL_WatchAdd("*(long *)0x60DA,x","eCANA MOTO13");
-    GEL_WatchAdd("*(long *)0x6168,x","eCANA MID13");
-    GEL_WatchAdd("*(long *)0x616A,x","eCANA MCF13");
-    GEL_WatchAdd("*(long *)0x616C,x","eCANA MDL13");
-    GEL_WatchAdd("*(long *)0x616E,x","eCANA MDH13");
-}
-hotmenu eCAN_A_Mailbox_14_to_15_Regs()
-{
-    GEL_WatchAdd("*(long *)0x605C,x","eCANA LAM14");
-    GEL_WatchAdd("*(long *)0x609C,x","eCANA MOTS14");
-    GEL_WatchAdd("*(long *)0x60DC,x","eCANA MOTO14");
-    GEL_WatchAdd("*(long *)0x6170,x","eCANA MID14");
-    GEL_WatchAdd("*(long *)0x6172,x","eCANA MCF14");
-    GEL_WatchAdd("*(long *)0x6174,x","eCANA MDL14");
-    GEL_WatchAdd("*(long *)0x6176,x","eCANA MDH14");
-    
-    GEL_WatchAdd("*(long *)0x605E,x","eCANA LAM15");
-    GEL_WatchAdd("*(long *)0x609E,x","eCANA MOTS15");
-    GEL_WatchAdd("*(long *)0x60DE,x","eCANA MOTO15");
-    GEL_WatchAdd("*(long *)0x6178,x","eCANA MID15");
-    GEL_WatchAdd("*(long *)0x617A,x","eCANA MCF15");
-    GEL_WatchAdd("*(long *)0x617C,x","eCANA MDL15");
-    GEL_WatchAdd("*(long *)0x617E,x","eCANA MDH15");
-}
-hotmenu eCAN_A_Mailbox_16_to_17_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6060,x","eCANA LAM16");
-    GEL_WatchAdd("*(long *)0x60A0,x","eCANA MOTS16");
-    GEL_WatchAdd("*(long *)0x60E0,x","eCANA MOTO16");
-    GEL_WatchAdd("*(long *)0x6180,x","eCANA MID16");
-    GEL_WatchAdd("*(long *)0x6182,x","eCANA MCF16");
-    GEL_WatchAdd("*(long *)0x6184,x","eCANA MDL16");
-    GEL_WatchAdd("*(long *)0x6186,x","eCANA MDH16");
-
-    GEL_WatchAdd("*(long *)0x6062,x","eCANA LAM17");
-    GEL_WatchAdd("*(long *)0x60A2,x","eCANA MOTS17");
-    GEL_WatchAdd("*(long *)0x60E2,x","eCANA MOTO17");
-    GEL_WatchAdd("*(long *)0x6188,x","eCANA MID17");
-    GEL_WatchAdd("*(long *)0x618A,x","eCANA MCF17");
-    GEL_WatchAdd("*(long *)0x618C,x","eCANA MDL17");
-    GEL_WatchAdd("*(long *)0x618E,x","eCANA MDH17");
-}
-hotmenu eCAN_A_Mailbox_18_to_19_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6064,x","eCANA LAM18");
-    GEL_WatchAdd("*(long *)0x60A4,x","eCANA MOTS18");
-    GEL_WatchAdd("*(long *)0x60E4,x","eCANA MOTO18");
-    GEL_WatchAdd("*(long *)0x6190,x","eCANA MID18");
-    GEL_WatchAdd("*(long *)0x6192,x","eCANA MCF18");
-    GEL_WatchAdd("*(long *)0x6194,x","eCANA MDL18");
-    GEL_WatchAdd("*(long *)0x6196,x","eCANA MDH18");
-
-    GEL_WatchAdd("*(long *)0x6066,x","eCANA LAM19");
-    GEL_WatchAdd("*(long *)0x60A6,x","eCANA MOTS19");
-    GEL_WatchAdd("*(long *)0x60E6,x","eCANA MOTO19");
-    GEL_WatchAdd("*(long *)0x6198,x","eCANA MID19");
-    GEL_WatchAdd("*(long *)0x619A,x","eCANA MCF19");
-    GEL_WatchAdd("*(long *)0x619C,x","eCANA MDL19");
-    GEL_WatchAdd("*(long *)0x619E,x","eCANA MDH19");
-}
-hotmenu eCAN_A_Mailbox_20_to_21_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6068,x","eCANA LAM20");
-    GEL_WatchAdd("*(long *)0x60A8,x","eCANA MOTS20");
-    GEL_WatchAdd("*(long *)0x60E8,x","eCANA MOTO20");
-    GEL_WatchAdd("*(long *)0x61A0,x","eCANA MID20");
-    GEL_WatchAdd("*(long *)0x61A2,x","eCANA MCF20");
-    GEL_WatchAdd("*(long *)0x61A4,x","eCANA MDL20");
-    GEL_WatchAdd("*(long *)0x61A6,x","eCANA MDH20");
-    
-    GEL_WatchAdd("*(long *)0x606A,x","eCANA LAM21");
-    GEL_WatchAdd("*(long *)0x60AA,x","eCANA MOTS21");
-    GEL_WatchAdd("*(long *)0x60EA,x","eCANA MOTO21");
-    GEL_WatchAdd("*(long *)0x61A8,x","eCANA MID21");
-    GEL_WatchAdd("*(long *)0x61AA,x","eCANA MCF21");
-    GEL_WatchAdd("*(long *)0x61AC,x","eCANA MDL21");
-    GEL_WatchAdd("*(long *)0x61AE,x","eCANA MDH21");
-}
-hotmenu eCAN_A_Mailbox_22_to_23_Regs()
-{
-    GEL_WatchAdd("*(long *)0x606C,x","eCANA LAM22");
-    GEL_WatchAdd("*(long *)0x60AC,x","eCANA MOTS22");
-    GEL_WatchAdd("*(long *)0x60EC,x","eCANA MOTO22");
-    GEL_WatchAdd("*(long *)0x61B0,x","eCANA MID22");
-    GEL_WatchAdd("*(long *)0x61B2,x","eCANA MCF22");
-    GEL_WatchAdd("*(long *)0x61B4,x","eCANA MDL22");
-    GEL_WatchAdd("*(long *)0x61B6,x","eCANA MDH22");
-
-    GEL_WatchAdd("*(long *)0x606E,x","eCANA LAM23");
-    GEL_WatchAdd("*(long *)0x60AE,x","eCANA MOTS23");
-    GEL_WatchAdd("*(long *)0x60EE,x","eCANA MOTO23");
-    GEL_WatchAdd("*(long *)0x61B8,x","eCANA MID23");
-    GEL_WatchAdd("*(long *)0x61BA,x","eCANA MCF23");
-    GEL_WatchAdd("*(long *)0x61BC,x","eCANA MDL23");
-    GEL_WatchAdd("*(long *)0x61BE,x","eCANA MDH23");
-}
-hotmenu eCAN_A_Mailbox_24_to_25_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6070,x","eCANA LAM24");
-    GEL_WatchAdd("*(long *)0x60B0,x","eCANA MOTS24");
-    GEL_WatchAdd("*(long *)0x60F0,x","eCANA MOTO24");
-    GEL_WatchAdd("*(long *)0x61C0,x","eCANA MID24");
-    GEL_WatchAdd("*(long *)0x61C2,x","eCANA MCF24");
-    GEL_WatchAdd("*(long *)0x61C4,x","eCANA MDL24");
-    GEL_WatchAdd("*(long *)0x61C6,x","eCANA MDH24");
-
-    GEL_WatchAdd("*(long *)0x6072,x","eCANA LAM25");
-    GEL_WatchAdd("*(long *)0x60B2,x","eCANA MOTS25");
-    GEL_WatchAdd("*(long *)0x60F2,x","eCANA MOTO25");
-    GEL_WatchAdd("*(long *)0x61C8,x","eCANA MID25");
-    GEL_WatchAdd("*(long *)0x61CA,x","eCANA MCF25");
-    GEL_WatchAdd("*(long *)0x61CC,x","eCANA MDL25");
-    GEL_WatchAdd("*(long *)0x61CE,x","eCANA MDH25");
-}
-hotmenu eCAN_A_Mailbox_26_to_27_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6074,x","eCANA LAM26");
-    GEL_WatchAdd("*(long *)0x60B4,x","eCANA MOTS26");
-    GEL_WatchAdd("*(long *)0x60F4,x","eCANA MOTO26");
-    GEL_WatchAdd("*(long *)0x61D0,x","eCANA MID26");
-    GEL_WatchAdd("*(long *)0x61D2,x","eCANA MCF26");
-    GEL_WatchAdd("*(long *)0x61D4,x","eCANA MDL26");
-    GEL_WatchAdd("*(long *)0x61D6,x","eCANA MDH26");
-
-    GEL_WatchAdd("*(long *)0x6076,x","eCANA LAM27");
-    GEL_WatchAdd("*(long *)0x60B6,x","eCANA MOTS27");
-    GEL_WatchAdd("*(long *)0x60F6,x","eCANA MOTO27");
-    GEL_WatchAdd("*(long *)0x61D8,x","eCANA MID27");
-    GEL_WatchAdd("*(long *)0x61DA,x","eCANA MCF27");
-    GEL_WatchAdd("*(long *)0x61DC,x","eCANA MDL27");
-    GEL_WatchAdd("*(long *)0x61DE,x","eCANA MDH27");
-}
-hotmenu eCAN_A_Mailbox_28_to_29_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6078,x","eCANA LAM28");
-    GEL_WatchAdd("*(long *)0x60B8,x","eCANA MOTS28");
-    GEL_WatchAdd("*(long *)0x60F8,x","eCANA MOTO28");
-    GEL_WatchAdd("*(long *)0x61E0,x","eCANA MID28");
-    GEL_WatchAdd("*(long *)0x61E2,x","eCANA MCF28");
-    GEL_WatchAdd("*(long *)0x61E4,x","eCANA MDL28");
-    GEL_WatchAdd("*(long *)0x61E6,x","eCANA MDH28");
-
-    GEL_WatchAdd("*(long *)0x607A,x","eCANA LAM29");
-    GEL_WatchAdd("*(long *)0x60BA,x","eCANA MOTS29");
-    GEL_WatchAdd("*(long *)0x60FA,x","eCANA MOTO29");
-    GEL_WatchAdd("*(long *)0x61E8,x","eCANA MID29");
-    GEL_WatchAdd("*(long *)0x61EA,x","eCANA MCF29");
-    GEL_WatchAdd("*(long *)0x61EC,x","eCANA MDL29");
-    GEL_WatchAdd("*(long *)0x61EE,x","eCANA MDH29");
-}
-hotmenu eCAN_A_Mailbox_30_to_31_Regs()
-{
-    GEL_WatchAdd("*(long *)0x607C,x","eCANA LAM30");
-    GEL_WatchAdd("*(long *)0x60BC,x","eCANA MOTS30");
-    GEL_WatchAdd("*(long *)0x60FC,x","eCANA MOTO30");
-    GEL_WatchAdd("*(long *)0x61F0,x","eCANA MID30");
-    GEL_WatchAdd("*(long *)0x61F2,x","eCANA MCF30");
-    GEL_WatchAdd("*(long *)0x61F4,x","eCANA MDL30");
-    GEL_WatchAdd("*(long *)0x61F6,x","eCANA MDH30");
-
-    GEL_WatchAdd("*(long *)0x607E,x","eCANA LAM31");
-    GEL_WatchAdd("*(long *)0x60BE,x","eCANA MOTS31");
-    GEL_WatchAdd("*(long *)0x60FE,x","eCANA MOTO31");
-    GEL_WatchAdd("*(long *)0x61F8,x","eCANA MID31");
-    GEL_WatchAdd("*(long *)0x61FA,x","eCANA MCF31");
-    GEL_WatchAdd("*(long *)0x61FC,x","eCANA MDL31");
-    GEL_WatchAdd("*(long *)0x61FE,x","eCANA MDH31");
-}
-hotmenu eCAN_B_Global_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6200,x","eCANB CANME");
-    GEL_WatchAdd("*(long *)0x6202,x","eCANB CANMD");
-    GEL_WatchAdd("*(long *)0x6204,x","eCANB CANTRS");
-    GEL_WatchAdd("*(long *)0x6206,x","eCANB CANTRR");
-    GEL_WatchAdd("*(long *)0x6208,x","eCANB CANTA");
-    GEL_WatchAdd("*(long *)0x620A,x","eCANB CANAA");
-    GEL_WatchAdd("*(long *)0x620C,x","eCANB CANRMP");
-    GEL_WatchAdd("*(long *)0x620E,x","eCANB CANRML");
-    GEL_WatchAdd("*(long *)0x6210,x","eCANB CANRFP");
-    GEL_WatchAdd("*(long *)0x6214,x","eCANB CANMC");
-    GEL_WatchAdd("*(long *)0x6216,x","eCANB CANBTC");
-    GEL_WatchAdd("*(long *)0x6218,x","eCANB CANES");
-    GEL_WatchAdd("*(long *)0x621A,x","eCANB CANTEC");
-    GEL_WatchAdd("*(long *)0x621C,x","eCANB CANREC");
-    GEL_WatchAdd("*(long *)0x621E,x","eCANB CANGIF0");
-    GEL_WatchAdd("*(long *)0x6220,x","eCANB CANGIM");
-    GEL_WatchAdd("*(long *)0x6222,x","eCANB CANGIF1");
-    GEL_WatchAdd("*(long *)0x6224,x","eCANB CANMIM");
-    GEL_WatchAdd("*(long *)0x6226,x","eCANB CANMIL");
-    GEL_WatchAdd("*(long *)0x6228,x","eCANB CANOPC");
-    GEL_WatchAdd("*(long *)0x622A,x","eCANB CANTIOC");
-    GEL_WatchAdd("*(long *)0x622C,x","eCANB CANRIOC");
-    GEL_WatchAdd("*(long *)0x622E,x","eCANB CANLNT");
-    GEL_WatchAdd("*(long *)0x6230,x","eCANB CANTOC");
-    GEL_WatchAdd("*(long *)0x6232,x","eCANB CANTOS");
-}
-hotmenu eCAN_B_Mailbox_0_to_1_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6240,x","eCANB LAM0");
-    GEL_WatchAdd("*(long *)0x6280,x","eCANB MOTS0");
-    GEL_WatchAdd("*(long *)0x62C0,x","eCANB MOTO0");
-    GEL_WatchAdd("*(long *)0x6300,x","eCANB MID0");
-    GEL_WatchAdd("*(long *)0x6302,x","eCANB MCF0");
-    GEL_WatchAdd("*(long *)0x6304,x","eCANB MDL0");
-    GEL_WatchAdd("*(long *)0x6306,x","eCANB MDH0");
-
-    GEL_WatchAdd("*(long *)0x6242,x","eCANB LAM1");
-    GEL_WatchAdd("*(long *)0x6282,x","eCANB MOTS1");
-    GEL_WatchAdd("*(long *)0x62C2,x","eCANB MOTO1");
-    GEL_WatchAdd("*(long *)0x6308,x","eCANB MID1");
-    GEL_WatchAdd("*(long *)0x630A,x","eCANB MCF1");
-    GEL_WatchAdd("*(long *)0x630C,x","eCANB MDL1");
-    GEL_WatchAdd("*(long *)0x630E,x","eCANB MDH1");
-}
-hotmenu eCAN_B_Mailbox_2_to_3_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6244,x","eCANB LAM2");
-    GEL_WatchAdd("*(long *)0x6284,x","eCANB MOTS2");
-    GEL_WatchAdd("*(long *)0x62C4,x","eCANB MOTO2");
-    GEL_WatchAdd("*(long *)0x6310,x","eCANB MID2");
-    GEL_WatchAdd("*(long *)0x6312,x","eCANB MCF2");
-    GEL_WatchAdd("*(long *)0x6314,x","eCANB MDL2");
-    GEL_WatchAdd("*(long *)0x6316,x","eCANB MDH2");
-
-    GEL_WatchAdd("*(long *)0x6246,x","eCANB LAM3");
-    GEL_WatchAdd("*(long *)0x6286,x","eCANB MOTS3");
-    GEL_WatchAdd("*(long *)0x62C6,x","eCANB MOTO3");
-    GEL_WatchAdd("*(long *)0x6318,x","eCANB MID3");
-    GEL_WatchAdd("*(long *)0x631A,x","eCANB MCF3");
-    GEL_WatchAdd("*(long *)0x631C,x","eCANB MDL3");
-    GEL_WatchAdd("*(long *)0x631E,x","eCANB MDH3");
-}
-hotmenu eCAN_B_Mailbox_4_to_5_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6248,x","eCANB LAM4");
-    GEL_WatchAdd("*(long *)0x6288,x","eCANB MOTS4");
-    GEL_WatchAdd("*(long *)0x62C8,x","eCANB MOTO4");
-    GEL_WatchAdd("*(long *)0x6320,x","eCANB MID4");
-    GEL_WatchAdd("*(long *)0x6322,x","eCANB MCF4");
-    GEL_WatchAdd("*(long *)0x6324,x","eCANB MDL4");
-    GEL_WatchAdd("*(long *)0x6326,x","eCANB MDH4");
-
-    GEL_WatchAdd("*(long *)0x624A,x","eCANB LAM5");
-    GEL_WatchAdd("*(long *)0x628A,x","eCANB MOTS5");
-    GEL_WatchAdd("*(long *)0x62CA,x","eCANB MOTO5");
-    GEL_WatchAdd("*(long *)0x6328,x","eCANB MID5");
-    GEL_WatchAdd("*(long *)0x632A,x","eCANB MCF5");
-    GEL_WatchAdd("*(long *)0x632C,x","eCANB MDL5");
-    GEL_WatchAdd("*(long *)0x632E,x","eCANB MDH5");
-}
-hotmenu eCAN_B_Mailbox_6_to_7_Regs()
-{
-    GEL_WatchAdd("*(long *)0x624C,x","eCANB LAM6");
-    GEL_WatchAdd("*(long *)0x628C,x","eCANB MOTS6");
-    GEL_WatchAdd("*(long *)0x62CC,x","eCANB MOTO6");
-    GEL_WatchAdd("*(long *)0x6330,x","eCANB MID6");
-    GEL_WatchAdd("*(long *)0x6332,x","eCANB MCF6");
-    GEL_WatchAdd("*(long *)0x6334,x","eCANB MDL6");
-    GEL_WatchAdd("*(long *)0x6336,x","eCANB MDH6");
-
-    GEL_WatchAdd("*(long *)0x624E,x","eCANB LAM7");
-    GEL_WatchAdd("*(long *)0x628E,x","eCANB MOTS7");
-    GEL_WatchAdd("*(long *)0x62CE,x","eCANB MOTO7");
-    GEL_WatchAdd("*(long *)0x6338,x","eCANB MID7");
-    GEL_WatchAdd("*(long *)0x633A,x","eCANB MCF7");
-    GEL_WatchAdd("*(long *)0x633C,x","eCANB MDL7");
-    GEL_WatchAdd("*(long *)0x633E,x","eCANB MDH7");
-}
-hotmenu eCAN_B_Mailbox_8_to_9_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6250,x","eCANB LAM8");
-    GEL_WatchAdd("*(long *)0x6290,x","eCANB MOTS8");
-    GEL_WatchAdd("*(long *)0x62D0,x","eCANB MOTO8");
-    GEL_WatchAdd("*(long *)0x6340,x","eCANB MID8");
-    GEL_WatchAdd("*(long *)0x6342,x","eCANB MCF8");
-    GEL_WatchAdd("*(long *)0x6344,x","eCANB MDL8");
-    GEL_WatchAdd("*(long *)0x6346,x","eCANB MDH8");
-
-    GEL_WatchAdd("*(long *)0x6252,x","eCANB LAM9");
-    GEL_WatchAdd("*(long *)0x6292,x","eCANB MOTS9");
-    GEL_WatchAdd("*(long *)0x62D2,x","eCANB MOTO9");
-    GEL_WatchAdd("*(long *)0x6348,x","eCANB MID9");
-    GEL_WatchAdd("*(long *)0x634A,x","eCANB MCF9");
-    GEL_WatchAdd("*(long *)0x634C,x","eCANB MDL9");
-    GEL_WatchAdd("*(long *)0x634E,x","eCANB MDH9");
-}
-hotmenu eCAN_B_Mailbox_10_to_11_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6254,x","eCANB LAM10");
-    GEL_WatchAdd("*(long *)0x6294,x","eCANB MOTS10");
-    GEL_WatchAdd("*(long *)0x62D4,x","eCANB MOTO10");
-    GEL_WatchAdd("*(long *)0x6350,x","eCANB MID10");
-    GEL_WatchAdd("*(long *)0x6352,x","eCANB MCF10");
-    GEL_WatchAdd("*(long *)0x6354,x","eCANB MDL10");
-    GEL_WatchAdd("*(long *)0x6356,x","eCANB MDH10");
-
-    GEL_WatchAdd("*(long *)0x6256,x","eCANB LAM11");
-    GEL_WatchAdd("*(long *)0x6296,x","eCANB MOTS11");
-    GEL_WatchAdd("*(long *)0x62D6,x","eCANB MOTO11");
-    GEL_WatchAdd("*(long *)0x6358,x","eCANB MID11");
-    GEL_WatchAdd("*(long *)0x635A,x","eCANB MCF11");
-    GEL_WatchAdd("*(long *)0x635C,x","eCANB MDL11");
-    GEL_WatchAdd("*(long *)0x635E,x","eCANB MDH11");
-}
-hotmenu eCAN_B_Mailbox_12_to_13_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6258,x","eCANB LAM12");
-    GEL_WatchAdd("*(long *)0x6298,x","eCANB MOTS12");
-    GEL_WatchAdd("*(long *)0x62D8,x","eCANB MOTO12");
-    GEL_WatchAdd("*(long *)0x6360,x","eCANB MID12");
-    GEL_WatchAdd("*(long *)0x6362,x","eCANB MCF12");
-    GEL_WatchAdd("*(long *)0x6364,x","eCANB MDL12");
-    GEL_WatchAdd("*(long *)0x6366,x","eCANB MDH12");
-
-    GEL_WatchAdd("*(long *)0x625A,x","eCANB LAM13");
-    GEL_WatchAdd("*(long *)0x629A,x","eCANB MOTS13");
-    GEL_WatchAdd("*(long *)0x62DA,x","eCANB MOTO13");
-    GEL_WatchAdd("*(long *)0x6368,x","eCANB MID13");
-    GEL_WatchAdd("*(long *)0x636A,x","eCANB MCF13");
-    GEL_WatchAdd("*(long *)0x636C,x","eCANB MDL13");
-    GEL_WatchAdd("*(long *)0x636E,x","eCANB MDH13");
-}
-hotmenu eCAN_B_Mailbox_14_to_15_Regs()
-{
-    GEL_WatchAdd("*(long *)0x625C,x","eCANB LAM14");
-    GEL_WatchAdd("*(long *)0x629C,x","eCANB MOTS14");
-    GEL_WatchAdd("*(long *)0x62DC,x","eCANB MOTO14");
-    GEL_WatchAdd("*(long *)0x6370,x","eCANB MID14");
-    GEL_WatchAdd("*(long *)0x6372,x","eCANB MCF14");
-    GEL_WatchAdd("*(long *)0x6374,x","eCANB MDL14");
-    GEL_WatchAdd("*(long *)0x6376,x","eCANB MDH14");
-
-    GEL_WatchAdd("*(long *)0x625E,x","eCANB LAM15");
-    GEL_WatchAdd("*(long *)0x629E,x","eCANB MOTS15");
-    GEL_WatchAdd("*(long *)0x62DE,x","eCANB MOTO15");
-    GEL_WatchAdd("*(long *)0x6378,x","eCANB MID15");
-    GEL_WatchAdd("*(long *)0x637A,x","eCANB MCF15");
-    GEL_WatchAdd("*(long *)0x637C,x","eCANB MDL15");
-    GEL_WatchAdd("*(long *)0x637E,x","eCANB MDH15");
-}
-hotmenu eCAN_B_Mailbox_16_to_17_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6260,x","eCANB LAM16");
-    GEL_WatchAdd("*(long *)0x62A0,x","eCANB MOTS16");
-    GEL_WatchAdd("*(long *)0x62E0,x","eCANB MOTO16");
-    GEL_WatchAdd("*(long *)0x6380,x","eCANB MID16");
-    GEL_WatchAdd("*(long *)0x6382,x","eCANB MCF16");
-    GEL_WatchAdd("*(long *)0x6384,x","eCANB MDL16");
-    GEL_WatchAdd("*(long *)0x6386,x","eCANB MDH16");
-
-    GEL_WatchAdd("*(long *)0x6262,x","eCANB LAM17");
-    GEL_WatchAdd("*(long *)0x62A2,x","eCANB MOTS17");
-    GEL_WatchAdd("*(long *)0x62E2,x","eCANB MOTO17");
-    GEL_WatchAdd("*(long *)0x6388,x","eCANB MID17");
-    GEL_WatchAdd("*(long *)0x638A,x","eCANB MCF17");
-    GEL_WatchAdd("*(long *)0x638C,x","eCANB MDL17");
-    GEL_WatchAdd("*(long *)0x638E,x","eCANB MDH17");
-}
-hotmenu eCAN_B_Mailbox_18_to_19_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6264,x","eCANB LAM18");
-    GEL_WatchAdd("*(long *)0x62A4,x","eCANB MOTS18");
-    GEL_WatchAdd("*(long *)0x62E4,x","eCANB MOTO18");
-    GEL_WatchAdd("*(long *)0x6390,x","eCANB MID18");
-    GEL_WatchAdd("*(long *)0x6392,x","eCANB MCF18");
-    GEL_WatchAdd("*(long *)0x6394,x","eCANB MDL18");
-    GEL_WatchAdd("*(long *)0x6396,x","eCANB MDH18");
-
-    GEL_WatchAdd("*(long *)0x6266,x","eCANB LAM19");
-    GEL_WatchAdd("*(long *)0x62A6,x","eCANB MOTS19");
-    GEL_WatchAdd("*(long *)0x62E6,x","eCANB MOTO19");
-    GEL_WatchAdd("*(long *)0x6398,x","eCANB MID19");
-    GEL_WatchAdd("*(long *)0x639A,x","eCANB MCF19");
-    GEL_WatchAdd("*(long *)0x639C,x","eCANB MDL19");
-    GEL_WatchAdd("*(long *)0x639E,x","eCANB MDH19");
-}
-hotmenu eCAN_B_Mailbox_20_to_21_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6268,x","eCANB LAM20");
-    GEL_WatchAdd("*(long *)0x62A8,x","eCANB MOTS20");
-    GEL_WatchAdd("*(long *)0x62E8,x","eCANB MOTO20");
-    GEL_WatchAdd("*(long *)0x63A0,x","eCANB MID20");
-    GEL_WatchAdd("*(long *)0x63A2,x","eCANB MCF20");
-    GEL_WatchAdd("*(long *)0x63A4,x","eCANB MDL20");
-    GEL_WatchAdd("*(long *)0x63A6,x","eCANB MDH20");
-
-    GEL_WatchAdd("*(long *)0x626A,x","eCANB LAM21");
-    GEL_WatchAdd("*(long *)0x62AA,x","eCANB MOTS21");
-    GEL_WatchAdd("*(long *)0x62EA,x","eCANB MOTO21");
-    GEL_WatchAdd("*(long *)0x63A8,x","eCANB MID21");
-    GEL_WatchAdd("*(long *)0x63AA,x","eCANB MCF21");
-    GEL_WatchAdd("*(long *)0x63AC,x","eCANB MDL21");
-    GEL_WatchAdd("*(long *)0x63AE,x","eCANB MDH21");
-}
-hotmenu eCAN_B_Mailbox_22_to_23_Regs()
-{
-    GEL_WatchAdd("*(long *)0x626C,x","eCANB LAM22");
-    GEL_WatchAdd("*(long *)0x62AC,x","eCANB MOTS22");
-    GEL_WatchAdd("*(long *)0x62EC,x","eCANB MOTO22");
-    GEL_WatchAdd("*(long *)0x63B0,x","eCANB MID22");
-    GEL_WatchAdd("*(long *)0x63B2,x","eCANB MCF22");
-    GEL_WatchAdd("*(long *)0x63B4,x","eCANB MDL22");
-    GEL_WatchAdd("*(long *)0x63B6,x","eCANB MDH22");
-
-    GEL_WatchAdd("*(long *)0x626E,x","eCANB LAM23");
-    GEL_WatchAdd("*(long *)0x62AE,x","eCANB MOTS23");
-    GEL_WatchAdd("*(long *)0x62EE,x","eCANB MOTO23");
-    GEL_WatchAdd("*(long *)0x63B8,x","eCANB MID23");
-    GEL_WatchAdd("*(long *)0x63BA,x","eCANB MCF23");
-    GEL_WatchAdd("*(long *)0x63BC,x","eCANB MDL23");
-    GEL_WatchAdd("*(long *)0x63BE,x","eCANB MDH23");
-}
-hotmenu eCAN_B_Mailbox_24_to_25_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6270,x","eCANB LAM24");
-    GEL_WatchAdd("*(long *)0x62B0,x","eCANB MOTS24");
-    GEL_WatchAdd("*(long *)0x62F0,x","eCANB MOTO24");
-    GEL_WatchAdd("*(long *)0x63C0,x","eCANB MID24");
-    GEL_WatchAdd("*(long *)0x63C2,x","eCANB MCF24");
-    GEL_WatchAdd("*(long *)0x63C4,x","eCANB MDL24");
-    GEL_WatchAdd("*(long *)0x63C6,x","eCANB MDH24");
-
-    GEL_WatchAdd("*(long *)0x6272,x","eCANB LAM25");
-    GEL_WatchAdd("*(long *)0x62B2,x","eCANB MOTS25");
-    GEL_WatchAdd("*(long *)0x62F2,x","eCANB MOTO25");
-    GEL_WatchAdd("*(long *)0x63C8,x","eCANB MID25");
-    GEL_WatchAdd("*(long *)0x63CA,x","eCANB MCF25");
-    GEL_WatchAdd("*(long *)0x63CC,x","eCANB MDL25");
-    GEL_WatchAdd("*(long *)0x63CE,x","eCANB MDH25");
-}
-hotmenu eCAN_B_Mailbox_26_to_27_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6274,x","eCANB LAM26");
-    GEL_WatchAdd("*(long *)0x62B4,x","eCANB MOTS26");
-    GEL_WatchAdd("*(long *)0x62F4,x","eCANB MOTO26");
-    GEL_WatchAdd("*(long *)0x63D0,x","eCANB MID26");
-    GEL_WatchAdd("*(long *)0x63D2,x","eCANB MCF26");
-    GEL_WatchAdd("*(long *)0x63D4,x","eCANB MDL26");
-    GEL_WatchAdd("*(long *)0x63D6,x","eCANB MDH26");
-
-    GEL_WatchAdd("*(long *)0x6276,x","eCANB LAM27");
-    GEL_WatchAdd("*(long *)0x62B6,x","eCANB MOTS27");
-    GEL_WatchAdd("*(long *)0x62F6,x","eCANB MOTO27");
-    GEL_WatchAdd("*(long *)0x63D8,x","eCANB MID27");
-    GEL_WatchAdd("*(long *)0x63DA,x","eCANB MCF27");
-    GEL_WatchAdd("*(long *)0x63DC,x","eCANB MDL27");
-    GEL_WatchAdd("*(long *)0x63DE,x","eCANB MDH27");
-}
-hotmenu eCAN_B_Mailbox_28_to_29_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6278,x","eCANB LAM28");
-    GEL_WatchAdd("*(long *)0x62B8,x","eCANB MOTS28");
-    GEL_WatchAdd("*(long *)0x62F8,x","eCANB MOTO28");
-    GEL_WatchAdd("*(long *)0x63E0,x","eCANB MID28");
-    GEL_WatchAdd("*(long *)0x63E2,x","eCANB MCF28");
-    GEL_WatchAdd("*(long *)0x63E4,x","eCANB MDL28");
-    GEL_WatchAdd("*(long *)0x63E6,x","eCANB MDH28");
-
-    GEL_WatchAdd("*(long *)0x627A,x","eCANB LAM29");
-    GEL_WatchAdd("*(long *)0x62BA,x","eCANB MOTS29");
-    GEL_WatchAdd("*(long *)0x62FA,x","eCANB MOTO29");
-    GEL_WatchAdd("*(long *)0x63E8,x","eCANB MID29");
-    GEL_WatchAdd("*(long *)0x63EA,x","eCANB MCF29");
-    GEL_WatchAdd("*(long *)0x63EC,x","eCANB MDL29");
-    GEL_WatchAdd("*(long *)0x63EE,x","eCANB MDH29");
-}
-hotmenu eCAN_B_Mailbox_30_to_31_Regs()
-{
-    GEL_WatchAdd("*(long *)0x627C,x","eCANB LAM30");
-    GEL_WatchAdd("*(long *)0x62BC,x","eCANB MOTS30");
-    GEL_WatchAdd("*(long *)0x62FC,x","eCANB MOTO30");
-    GEL_WatchAdd("*(long *)0x63F0,x","eCANB MID30");
-    GEL_WatchAdd("*(long *)0x63F2,x","eCANB MCF30");
-    GEL_WatchAdd("*(long *)0x63F4,x","eCANB MDL30");
-    GEL_WatchAdd("*(long *)0x63F6,x","eCANB MDH30");
-
-    GEL_WatchAdd("*(long *)0x627E,x","eCANB LAM31");
-    GEL_WatchAdd("*(long *)0x62BE,x","eCANB MOTS31");
-    GEL_WatchAdd("*(long *)0x62FE,x","eCANB MOTO31");
-    GEL_WatchAdd("*(long *)0x63F8,x","eCANB MID31");
-    GEL_WatchAdd("*(long *)0x63FA,x","eCANB MCF31");
-    GEL_WatchAdd("*(long *)0x63FC,x","eCANB MDL31");
-    GEL_WatchAdd("*(long *)0x63FE,x","eCANB MDH31");
-}
-
-
-/********************************************************************/
-/* Enhanced Capture Registers                                       */
-/********************************************************************/
-menuitem "Watch eCAP Registers";
-
-hotmenu eCAP1_All_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6A00,x","eCAP1 TSCNT");
-    GEL_WatchAdd("*(long *)0x6A02,x","eCAP1 CNTPHS");
-    GEL_WatchAdd("*(long *)0x6A04,x","eCAP1 CAP1");
-    GEL_WatchAdd("*(long *)0x6A06,x","eCAP1 CAP2");
-    GEL_WatchAdd("*(long *)0x6A08,x","eCAP1 CAP3");
-    GEL_WatchAdd("*(long *)0x6A0A,x","eCAP1 CAP4");
-    GEL_WatchAdd("*0x6A14,x","eCAP1 ECCTL1");
-    GEL_WatchAdd("*0x6A15,x","eCAP1 ECCTL2");
-    GEL_WatchAdd("*0x6A16,x","eCAP1 ECEINT");
-    GEL_WatchAdd("*0x6A17,x","eCAP1 ECFLG");
-    GEL_WatchAdd("*0x6A18,x","eCAP1 ECCLR");
-    GEL_WatchAdd("*0x6A19,x","eCAP1 ECFRC");
-}
-hotmenu eCAP2_All_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6A20,x","eCAP2 TSCNT");
-    GEL_WatchAdd("*(long *)0x6A22,x","eCAP2 CNTPHS");
-    GEL_WatchAdd("*(long *)0x6A24,x","eCAP2 CAP1");
-    GEL_WatchAdd("*(long *)0x6A26,x","eCAP2 CAP2");
-    GEL_WatchAdd("*(long *)0x6A28,x","eCAP2 CAP3");
-    GEL_WatchAdd("*(long *)0x6A2A,x","eCAP2 CAP4");
-    GEL_WatchAdd("*0x6A34,x","eCAP2 ECCTL1");
-    GEL_WatchAdd("*0x6A35,x","eCAP2 ECCTL2");
-    GEL_WatchAdd("*0x6A36,x","eCAP2 ECEINT");
-    GEL_WatchAdd("*0x6A37,x","eCAP2 ECFLG");
-    GEL_WatchAdd("*0x6A38,x","eCAP2 ECCLR");
-    GEL_WatchAdd("*0x6A39,x","eCAP2 ECFRC");
-}
-hotmenu eCAP3_All_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6A40,x","eCAP3 TSCNT");
-    GEL_WatchAdd("*(long *)0x6A42,x","eCAP3 CNTPHS");
-    GEL_WatchAdd("*(long *)0x6A44,x","eCAP3 CAP1");
-    GEL_WatchAdd("*(long *)0x6A46,x","eCAP3 CAP2");
-    GEL_WatchAdd("*(long *)0x6A48,x","eCAP3 CAP3");
-    GEL_WatchAdd("*(long *)0x6A4A,x","eCAP3 CAP4");
-    GEL_WatchAdd("*0x6A54,x","eCAP3 ECCTL1");
-    GEL_WatchAdd("*0x6A55,x","eCAP3 ECCTL2");
-    GEL_WatchAdd("*0x6A56,x","eCAP3 ECEINT");
-    GEL_WatchAdd("*0x6A57,x","eCAP3 ECFLG");
-    GEL_WatchAdd("*0x6A58,x","eCAP3 ECCLR");
-    GEL_WatchAdd("*0x6A59,x","eCAP3 ECFRC");
-}
-hotmenu eCAP4_All_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6A60,x","eCAP4 TSCNT");
-    GEL_WatchAdd("*(long *)0x6A62,x","eCAP4 CNTPHS");
-    GEL_WatchAdd("*(long *)0x6A64,x","eCAP4 CAP1");
-    GEL_WatchAdd("*(long *)0x6A66,x","eCAP4 CAP2");
-    GEL_WatchAdd("*(long *)0x6A68,x","eCAP4 CAP3");
-    GEL_WatchAdd("*(long *)0x6A6A,x","eCAP4 CAP4");
-    GEL_WatchAdd("*0x6A74,x","eCAP4 ECCTL1");
-    GEL_WatchAdd("*0x6A75,x","eCAP4 ECCTL2");
-    GEL_WatchAdd("*0x6A76,x","eCAP4 ECEINT");
-    GEL_WatchAdd("*0x6A77,x","eCAP4 ECFLG");
-    GEL_WatchAdd("*0x6A78,x","eCAP4 ECCLR");
-    GEL_WatchAdd("*0x6A79,x","eCAP4 ECFRC");
-}
-
-/********************************************************************/
-/* Enhanced PWM Registers                                           */
-/********************************************************************/
-menuitem "Watch ePWM Registers";
-
-hotmenu ePWM1_All_Regs()
-{
-    GEL_WatchAdd("*0x6800,x","ePWM1 TBCTL");
-    GEL_WatchAdd("*0x6801,x","ePWM1 TBSTS");
-    GEL_WatchAdd("*0x6802,x","ePWM1 TBPHSHR");
-    GEL_WatchAdd("*0x6803,x","ePWM1 TBPHS");
-    GEL_WatchAdd("*0x6804,x","ePWM1 TBCTR");
-    GEL_WatchAdd("*0x6805,x","ePWM1 TBPRD");
-    GEL_WatchAdd("*0x6807,x","ePWM1 CMPCTL");
-    GEL_WatchAdd("*0x6808,x","ePWM1 CMPAHR");
-    GEL_WatchAdd("*0x6809,x","ePWM1 CMPA");
-    GEL_WatchAdd("*0x680A,x","ePWM1 CMPB");
-    GEL_WatchAdd("*0x680B,x","ePWM1 AQCTLA");
-    GEL_WatchAdd("*0x680C,x","ePWM1 AQCTLB");
-    GEL_WatchAdd("*0x680D,x","ePWM1 AQSFRC");
-    GEL_WatchAdd("*0x680E,x","ePWM1 AQCSFRC");
-    GEL_WatchAdd("*0x680F,x","ePWM1 DBCTL");
-    GEL_WatchAdd("*0x6810,x","ePWM1 DBRED");
-    GEL_WatchAdd("*0x6811,x","ePWM1 DBFED");
-    GEL_WatchAdd("*0x6812,x","ePWM1 TZSEL");
-    GEL_WatchAdd("*0x6813,x","ePWM1 TZDCSEL");
-    GEL_WatchAdd("*0x6814,x","ePWM1 TZCTL");
-    GEL_WatchAdd("*0x6815,x","ePWM1 TZEINT");
-    GEL_WatchAdd("*0x6816,x","ePWM1 TZFLG");
-    GEL_WatchAdd("*0x6817,x","ePWM1 TZCLR");
-    GEL_WatchAdd("*0x6818,x","ePWM1 TZFRC");
-    GEL_WatchAdd("*0x6819,x","ePWM1 ETSEL");
-    GEL_WatchAdd("*0x681A,x","ePWM1 ETPS");
-    GEL_WatchAdd("*0x681B,x","ePWM1 ETFLG");
-    GEL_WatchAdd("*0x681C,x","ePWM1 ETCLR");
-    GEL_WatchAdd("*0x681D,x","ePWM1 ETFRC");
-    GEL_WatchAdd("*0x681E,x","ePWM1 PCCTL");
-    GEL_WatchAdd("*0x6820,x","ePWM1 HRCNFG");
-}
-hotmenu ePWM1_TB_Regs()
-{
-    GEL_WatchAdd("*0x6800,x","ePWM1 TBCTL");
-    GEL_WatchAdd("*0x6801,x","ePWM1 TBSTS");
-    GEL_WatchAdd("*0x6802,x","ePWM1 TBPHSHR");
-    GEL_WatchAdd("*0x6803,x","ePWM1 TBPHS");
-    GEL_WatchAdd("*0x6804,x","ePWM1 TBCTR");
-    GEL_WatchAdd("*0x6805,x","ePWM1 TBPRD");
-}
-hotmenu ePWM1_CMP_Regs()
-{
-    GEL_WatchAdd("*0x6807,x","ePWM1 CMPCTL");
-    GEL_WatchAdd("*0x6808,x","ePWM1 CMPAHR");
-    GEL_WatchAdd("*0x6809,x","ePWM1 CMPA");
-    GEL_WatchAdd("*0x680A,x","ePWM1 CMPB");
-}
-hotmenu ePWM1_AQ_Regs()
-{
-    GEL_WatchAdd("*0x680B,x","ePWM1 AQCTLA");
-    GEL_WatchAdd("*0x680C,x","ePWM1 AQCTLB");
-    GEL_WatchAdd("*0x680D,x","ePWM1 AQSFRC");
-    GEL_WatchAdd("*0x680E,x","ePWM1 AQCSFRC");
-}
-hotmenu ePWM1_DB_Regs()
-{
-    GEL_WatchAdd("*0x680F,x","ePWM1 DBCTL");
-    GEL_WatchAdd("*0x6810,x","ePWM1 DBRED");
-    GEL_WatchAdd("*0x6811,x","ePWM1 DBFED");
-}
-hotmenu ePWM1_TZ_Regs()
-{
-    GEL_WatchAdd("*0x6812,x","ePWM1 TZSEL");
-    GEL_WatchAdd("*0x6814,x","ePWM1 TZCTL");
-    GEL_WatchAdd("*0x6815,x","ePWM1 TZEINT");
-    GEL_WatchAdd("*0x6816,x","ePWM1 TZFLG");
-    GEL_WatchAdd("*0x6817,x","ePWM1 TZCLR");
-    GEL_WatchAdd("*0x6818,x","ePWM1 TZFRC");
-}
-hotmenu ePWM1_ET_Regs()
-{
-    GEL_WatchAdd("*0x6819,x","ePWM1 ETSEL");
-    GEL_WatchAdd("*0x681A,x","ePWM1 ETPS");
-    GEL_WatchAdd("*0x681B,x","ePWM1 ETFLG");
-    GEL_WatchAdd("*0x681C,x","ePWM1 ETCLR");
-    GEL_WatchAdd("*0x681D,x","ePWM1 ETFRC");
-}
-hotmenu ePWM2_All_Regs()
-{
-    GEL_WatchAdd("*0x6840,x","ePWM2 TBCTL");
-    GEL_WatchAdd("*0x6841,x","ePWM2 TBSTS");
-    GEL_WatchAdd("*0x6842,x","ePWM2 TBPHSHR");
-    GEL_WatchAdd("*0x6843,x","ePWM2 TBPHS");
-    GEL_WatchAdd("*0x6844,x","ePWM2 TBCTR");
-    GEL_WatchAdd("*0x6845,x","ePWM2 TBPRD");
-    GEL_WatchAdd("*0x6847,x","ePWM2 CMPCTL");
-    GEL_WatchAdd("*0x6848,x","ePWM2 CMPAHR");
-    GEL_WatchAdd("*0x6849,x","ePWM2 CMPA");
-    GEL_WatchAdd("*0x684A,x","ePWM2 CMPB");
-    GEL_WatchAdd("*0x684B,x","ePWM2 AQCTLA");
-    GEL_WatchAdd("*0x684C,x","ePWM2 AQCTLB");
-    GEL_WatchAdd("*0x684D,x","ePWM2 AQSFRC");
-    GEL_WatchAdd("*0x684E,x","ePWM2 AQCSFRC");
-    GEL_WatchAdd("*0x684F,x","ePWM2 DBCTL");
-    GEL_WatchAdd("*0x6850,x","ePWM2 DBRED");
-    GEL_WatchAdd("*0x6851,x","ePWM2 DBFED");
-    GEL_WatchAdd("*0x6852,x","ePWM2 TZSEL");
-    GEL_WatchAdd("*0x6853,x","ePWM2 TZDCSEL");
-    GEL_WatchAdd("*0x6854,x","ePWM2 TZCTL");
-    GEL_WatchAdd("*0x6855,x","ePWM2 TZEINT");
-    GEL_WatchAdd("*0x6856,x","ePWM2 TZFLG");
-    GEL_WatchAdd("*0x6857,x","ePWM2 TZCLR");
-    GEL_WatchAdd("*0x6858,x","ePWM2 TZFRC");
-    GEL_WatchAdd("*0x6859,x","ePWM2 ETSEL");
-    GEL_WatchAdd("*0x685A,x","ePWM2 ETPS");
-    GEL_WatchAdd("*0x685B,x","ePWM2 ETFLG");
-    GEL_WatchAdd("*0x685C,x","ePWM2 ETCLR");
-    GEL_WatchAdd("*0x685D,x","ePWM2 ETFRC");
-    GEL_WatchAdd("*0x685E,x","ePWM2 PCCTL");
-    GEL_WatchAdd("*0x6860,x","ePWM2 HRCNFG");
-}
-hotmenu ePWM2_TB_Regs()
-{
-    GEL_WatchAdd("*0x6840,x","ePWM2 TBCTL");
-    GEL_WatchAdd("*0x6841,x","ePWM2 TBSTS");
-    GEL_WatchAdd("*0x6842,x","ePWM2 TBPHSHR");
-    GEL_WatchAdd("*0x6843,x","ePWM2 TBPHS");
-    GEL_WatchAdd("*0x6844,x","ePWM2 TBCTR");
-    GEL_WatchAdd("*0x6845,x","ePWM2 TBPRD");
-}
-hotmenu ePWM2_CMP_Regs()
-{
-    GEL_WatchAdd("*0x6847,x","ePWM2 CMPCTL");
-    GEL_WatchAdd("*0x6848,x","ePWM2 CMPAHR");
-    GEL_WatchAdd("*0x6849,x","ePWM2 CMPA");
-    GEL_WatchAdd("*0x684A,x","ePWM2 CMPB");
-}
-hotmenu ePWM2_AQ_Regs()
-{
-    GEL_WatchAdd("*0x684B,x","ePWM2 AQCTLA");
-    GEL_WatchAdd("*0x684C,x","ePWM2 AQCTLB");
-    GEL_WatchAdd("*0x684D,x","ePWM2 AQSFRC");
-    GEL_WatchAdd("*0x684E,x","ePWM2 AQCSFRC");
-}
-hotmenu ePWM2_DB_Regs()
-{
-    GEL_WatchAdd("*0x684F,x","ePWM2 DBCTL");
-    GEL_WatchAdd("*0x6850,x","ePWM2 DBRED");
-    GEL_WatchAdd("*0x6851,x","ePWM2 DBFED");
-}
-hotmenu ePWM2_TZ_Regs()
-{
-    GEL_WatchAdd("*0x6852,x","ePWM2 TZSEL");
-    GEL_WatchAdd("*0x6854,x","ePWM2 TZCTL");
-    GEL_WatchAdd("*0x6855,x","ePWM2 TZEINT");
-    GEL_WatchAdd("*0x6856,x","ePWM2 TZFLG");
-    GEL_WatchAdd("*0x6857,x","ePWM2 TZCLR");
-    GEL_WatchAdd("*0x6858,x","ePWM2 TZFRC");
-}
-hotmenu ePWM2_ET_Regs()
-{
-    GEL_WatchAdd("*0x6859,x","ePWM2 ETSEL");
-    GEL_WatchAdd("*0x685A,x","ePWM2 ETPS");
-    GEL_WatchAdd("*0x685B,x","ePWM2 ETFLG");
-    GEL_WatchAdd("*0x685C,x","ePWM2 ETCLR");
-    GEL_WatchAdd("*0x685D,x","ePWM2 ETFRC");
-}
-hotmenu ePWM3_All_Regs()
-{
-    GEL_WatchAdd("*0x6880,x","ePWM3 TBCTL");
-    GEL_WatchAdd("*0x6881,x","ePWM3 TBSTS");
-    GEL_WatchAdd("*0x6882,x","ePWM3 TBPHSHR");
-    GEL_WatchAdd("*0x6883,x","ePWM3 TBPHS");
-    GEL_WatchAdd("*0x6884,x","ePWM3 TBCTR");
-    GEL_WatchAdd("*0x6885,x","ePWM3 TBPRD");
-    GEL_WatchAdd("*0x6887,x","ePWM3 CMPCTL");
-    GEL_WatchAdd("*0x6888,x","ePWM3 CMPAHR");
-    GEL_WatchAdd("*0x6889,x","ePWM3 CMPA");
-    GEL_WatchAdd("*0x688A,x","ePWM3 CMPB");
-    GEL_WatchAdd("*0x688B,x","ePWM3 AQCTLA");
-    GEL_WatchAdd("*0x688C,x","ePWM3 AQCTLB");
-    GEL_WatchAdd("*0x688D,x","ePWM3 AQSFRC");
-    GEL_WatchAdd("*0x688E,x","ePWM3 AQCSFRC");
-    GEL_WatchAdd("*0x688F,x","ePWM3 DBCTL");
-    GEL_WatchAdd("*0x6890,x","ePWM3 DBRED");
-    GEL_WatchAdd("*0x6891,x","ePWM3 DBFED");
-    GEL_WatchAdd("*0x6892,x","ePWM3 TZSEL");
-    GEL_WatchAdd("*0x6893,x","ePWM3 TZDCSEL");
-    GEL_WatchAdd("*0x6894,x","ePWM3 TZCTL");
-    GEL_WatchAdd("*0x6895,x","ePWM3 TZEINT");
-    GEL_WatchAdd("*0x6896,x","ePWM3 TZFLG");
-    GEL_WatchAdd("*0x6897,x","ePWM3 TZCLR");
-    GEL_WatchAdd("*0x6898,x","ePWM3 TZFRC");
-    GEL_WatchAdd("*0x6899,x","ePWM3 ETSEL");
-    GEL_WatchAdd("*0x689A,x","ePWM3 ETPS");
-    GEL_WatchAdd("*0x689B,x","ePWM3 ETFLG");
-    GEL_WatchAdd("*0x689C,x","ePWM3 ETCLR");
-    GEL_WatchAdd("*0x689D,x","ePWM3 ETFRC");
-    GEL_WatchAdd("*0x689E,x","ePWM3 PCCTL");
-    GEL_WatchAdd("*0x68A0,x","ePWM3 HRCNFG");
-}
-hotmenu ePWM3_TB_Regs()
-{
-    GEL_WatchAdd("*0x6880,x","ePWM3 TBCTL");
-    GEL_WatchAdd("*0x6881,x","ePWM3 TBSTS");
-    GEL_WatchAdd("*0x6882,x","ePWM3 TBPHSHR");
-    GEL_WatchAdd("*0x6883,x","ePWM3 TBPHS");
-    GEL_WatchAdd("*0x6884,x","ePWM3 TBCTR");
-    GEL_WatchAdd("*0x6885,x","ePWM3 TBPRD");
-}
-hotmenu ePWM3_CMP_Regs()
-{
-    GEL_WatchAdd("*0x6887,x","ePWM3 CMPCTL");
-    GEL_WatchAdd("*0x6888,x","ePWM3 CMPAHR");
-    GEL_WatchAdd("*0x6889,x","ePWM3 CMPA");
-    GEL_WatchAdd("*0x688A,x","ePWM3 CMPB");
-}
-hotmenu ePWM3_AQ_Regs()
-{
-    GEL_WatchAdd("*0x688B,x","ePWM3 AQCTLA");
-    GEL_WatchAdd("*0x688C,x","ePWM3 AQCTLB");
-    GEL_WatchAdd("*0x688D,x","ePWM3 AQSFRC");
-    GEL_WatchAdd("*0x688E,x","ePWM3 AQCSFRC");
-}
-hotmenu ePWM3_DB_Regs()
-{
-    GEL_WatchAdd("*0x688F,x","ePWM3 DBCTL");
-    GEL_WatchAdd("*0x6890,x","ePWM3 DBRED");
-    GEL_WatchAdd("*0x6891,x","ePWM3 DBFED");
-}
-hotmenu ePWM3_TZ_Regs()
-{
-    GEL_WatchAdd("*0x6892,x","ePWM3 TZSEL");
-    GEL_WatchAdd("*0x6894,x","ePWM3 TZCTL");
-    GEL_WatchAdd("*0x6895,x","ePWM3 TZEINT");
-    GEL_WatchAdd("*0x6896,x","ePWM3 TZFLG");
-    GEL_WatchAdd("*0x6897,x","ePWM3 TZCLR");
-    GEL_WatchAdd("*0x6898,x","ePWM3 TZFRC");
-}
-hotmenu ePWM3_ET_Regs()
-{
-    GEL_WatchAdd("*0x6899,x","ePWM3 ETSEL");
-    GEL_WatchAdd("*0x689A,x","ePWM3 ETPS");
-    GEL_WatchAdd("*0x689B,x","ePWM3 ETFLG");
-    GEL_WatchAdd("*0x689C,x","ePWM3 ETCLR");
-    GEL_WatchAdd("*0x689D,x","ePWM3 ETFRC");
-}
-hotmenu ePWM4_All_Regs()
-{
-    GEL_WatchAdd("*0x68C0,x","ePWM4 TBCTL");
-    GEL_WatchAdd("*0x68C1,x","ePWM4 TBSTS");
-    GEL_WatchAdd("*0x68C2,x","ePWM4 TBPHSHR");
-    GEL_WatchAdd("*0x68C3,x","ePWM4 TBPHS");
-    GEL_WatchAdd("*0x68C4,x","ePWM4 TBCTR");
-    GEL_WatchAdd("*0x68C5,x","ePWM4 TBPRD");
-    GEL_WatchAdd("*0x68C7,x","ePWM4 CMPCTL");
-    GEL_WatchAdd("*0x68C8,x","ePWM4 CMPAHR");
-    GEL_WatchAdd("*0x68C9,x","ePWM4 CMPA");
-    GEL_WatchAdd("*0x68CA,x","ePWM4 CMPB");
-    GEL_WatchAdd("*0x68CB,x","ePWM4 AQCTLA");
-    GEL_WatchAdd("*0x68CC,x","ePWM4 AQCTLB");
-    GEL_WatchAdd("*0x68CD,x","ePWM4 AQSFRC");
-    GEL_WatchAdd("*0x68CE,x","ePWM4 AQCSFRC");
-    GEL_WatchAdd("*0x68CF,x","ePWM4 DBCTL");
-    GEL_WatchAdd("*0x68D0,x","ePWM4 DBRED");
-    GEL_WatchAdd("*0x68D1,x","ePWM4 DBFED");
-    GEL_WatchAdd("*0x68D2,x","ePWM4 TZSEL");
-    GEL_WatchAdd("*0x68D3,x","ePWM4 TZDCSEL");
-    GEL_WatchAdd("*0x68D4,x","ePWM4 TZCTL");
-    GEL_WatchAdd("*0x68D5,x","ePWM4 TZEINT");
-    GEL_WatchAdd("*0x68D6,x","ePWM4 TZFLG");
-    GEL_WatchAdd("*0x68D7,x","ePWM4 TZCLR");
-    GEL_WatchAdd("*0x68D8,x","ePWM4 TZFRC");
-    GEL_WatchAdd("*0x68D9,x","ePWM4 ETSEL");
-    GEL_WatchAdd("*0x68DA,x","ePWM4 ETPS");
-    GEL_WatchAdd("*0x68DB,x","ePWM4 ETFLG");
-    GEL_WatchAdd("*0x68DC,x","ePWM4 ETCLR");
-    GEL_WatchAdd("*0x68DD,x","ePWM4 ETFRC");
-    GEL_WatchAdd("*0x68DE,x","ePWM4 PCCTL");
-    GEL_WatchAdd("*0x68E0,x","ePWM4 HRCNFG");
-}
-hotmenu ePWM4_TB_Regs()
-{
-    GEL_WatchAdd("*0x68C0,x","ePWM4 TBCTL");
-    GEL_WatchAdd("*0x68C1,x","ePWM4 TBSTS");
-    GEL_WatchAdd("*0x68C2,x","ePWM4 TBPHSHR");
-    GEL_WatchAdd("*0x68C3,x","ePWM4 TBPHS");
-    GEL_WatchAdd("*0x68C4,x","ePWM4 TBCTR");
-    GEL_WatchAdd("*0x68C5,x","ePWM4 TBPRD");
-}
-hotmenu ePWM4_CMP_Regs()
-{
-    GEL_WatchAdd("*0x68C7,x","ePWM4 CMPCTL");
-    GEL_WatchAdd("*0x68C8,x","ePWM4 CMPAHR");
-    GEL_WatchAdd("*0x68C9,x","ePWM4 CMPA");
-    GEL_WatchAdd("*0x68CA,x","ePWM4 CMPB");
-}
-hotmenu ePWM4_AQ_Regs()
-{
-    GEL_WatchAdd("*0x68CB,x","ePWM4 AQCTLA");
-    GEL_WatchAdd("*0x68CC,x","ePWM4 AQCTLB");
-    GEL_WatchAdd("*0x68CD,x","ePWM4 AQSFRC");
-    GEL_WatchAdd("*0x68CE,x","ePWM4 AQCSFRC");
-}
-hotmenu ePWM4_DB_Regs()
-{
-    GEL_WatchAdd("*0x68CF,x","ePWM4 DBCTL");
-    GEL_WatchAdd("*0x68D0,x","ePWM4 DBRED");
-    GEL_WatchAdd("*0x68D1,x","ePWM4 DBFED"); 
-}
-hotmenu ePWM4_TZ_Regs()
-{
-    GEL_WatchAdd("*0x68D2,x","ePWM4 TZSEL");
-    GEL_WatchAdd("*0x68D4,x","ePWM4 TZCTL");
-    GEL_WatchAdd("*0x68D5,x","ePWM4 TZEINT");
-    GEL_WatchAdd("*0x68D6,x","ePWM4 TZFLG");
-    GEL_WatchAdd("*0x68D7,x","ePWM4 TZCLR");
-    GEL_WatchAdd("*0x68D8,x","ePWM4 TZFRC");
-}
-hotmenu ePWM4_ET_Regs()
-{
-    GEL_WatchAdd("*0x68D9,x","ePWM4 ETSEL");
-    GEL_WatchAdd("*0x68DA,x","ePWM4 ETPS");
-    GEL_WatchAdd("*0x68DB,x","ePWM4 ETFLG");
-    GEL_WatchAdd("*0x68DC,x","ePWM4 ETCLR");
-    GEL_WatchAdd("*0x68DD,x","ePWM4 ETFRC");
-}
-hotmenu ePWM5_All_Regs()
-{
-    GEL_WatchAdd("*0x6900,x","ePWM5 TBCTL");
-    GEL_WatchAdd("*0x6901,x","ePWM5 TBSTS");
-    GEL_WatchAdd("*0x6903,x","ePWM5 TBPHS");
-    GEL_WatchAdd("*0x6904,x","ePWM5 TBCTR");
-    GEL_WatchAdd("*0x6905,x","ePWM5 TBPRD");
-    GEL_WatchAdd("*0x6907,x","ePWM5 CMPCTL");
-    GEL_WatchAdd("*0x6909,x","ePWM5 CMPA");
-    GEL_WatchAdd("*0x690A,x","ePWM5 CMPB");
-    GEL_WatchAdd("*0x690B,x","ePWM5 AQCTLA");
-    GEL_WatchAdd("*0x690C,x","ePWM5 AQCTLB");
-    GEL_WatchAdd("*0x690D,x","ePWM5 AQSFRC");
-    GEL_WatchAdd("*0x690E,x","ePWM5 AQCSFRC");
-    GEL_WatchAdd("*0x690F,x","ePWM5 DBCTL");
-    GEL_WatchAdd("*0x6910,x","ePWM5 DBRED");
-    GEL_WatchAdd("*0x6911,x","ePWM5 DBFED");
-    GEL_WatchAdd("*0x6912,x","ePWM5 TZSEL");
-    GEL_WatchAdd("*0x6913,x","ePWM5 TZDCSEL");
-    GEL_WatchAdd("*0x6914,x","ePWM5 TZCTL");
-    GEL_WatchAdd("*0x6915,x","ePWM5 TZEINT");
-    GEL_WatchAdd("*0x6916,x","ePWM5 TZFLG");
-    GEL_WatchAdd("*0x6917,x","ePWM5 TZCLR");
-    GEL_WatchAdd("*0x6918,x","ePWM5 TZFRC");
-    GEL_WatchAdd("*0x6919,x","ePWM5 ETSEL");
-    GEL_WatchAdd("*0x691A,x","ePWM5 ETPS");
-    GEL_WatchAdd("*0x691B,x","ePWM5 ETFLG");
-    GEL_WatchAdd("*0x691C,x","ePWM5 ETCLR");
-    GEL_WatchAdd("*0x691D,x","ePWM5 ETFRC");
-    GEL_WatchAdd("*0x691E,x","ePWM5 PCCTL");
-}
-hotmenu ePWM5_TB_Regs()
-{
-    GEL_WatchAdd("*0x6900,x","ePWM5 TBCTL");
-    GEL_WatchAdd("*0x6901,x","ePWM5 TBSTS");
-    GEL_WatchAdd("*0x6903,x","ePWM5 TBPHS");
-    GEL_WatchAdd("*0x6904,x","ePWM5 TBCTR");
-    GEL_WatchAdd("*0x6905,x","ePWM5 TBPRD");
-}
-hotmenu ePWM5_CMP_Regs()
-{
-    GEL_WatchAdd("*0x6907,x","ePWM5 CMPCTL");
-    GEL_WatchAdd("*0x6909,x","ePWM5 CMPA");
-    GEL_WatchAdd("*0x690A,x","ePWM5 CMPB");
-}
-hotmenu ePWM5_AQ_Regs()
-{
-    GEL_WatchAdd("*0x690B,x","ePWM5 AQCTLA");
-    GEL_WatchAdd("*0x690C,x","ePWM5 AQCTLB");
-    GEL_WatchAdd("*0x690D,x","ePWM5 AQSFRC");
-    GEL_WatchAdd("*0x690E,x","ePWM5 AQCSFRC");
-}
-hotmenu ePWM5_DB_Regs()
-{
-    GEL_WatchAdd("*0x690F,x","ePWM5 DBCTL");
-    GEL_WatchAdd("*0x6910,x","ePWM5 DBRED");
-    GEL_WatchAdd("*0x6911,x","ePWM5 DBFED"); 
-}
-hotmenu ePWM5_TZ_Regs()
-{
-    GEL_WatchAdd("*0x6912,x","ePWM5 TZSEL");
-    GEL_WatchAdd("*0x6914,x","ePWM5 TZCTL");
-    GEL_WatchAdd("*0x6915,x","ePWM5 TZEINT");
-    GEL_WatchAdd("*0x6916,x","ePWM5 TZFLG");
-    GEL_WatchAdd("*0x6917,x","ePWM5 TZCLR");
-    GEL_WatchAdd("*0x6918,x","ePWM5 TZFRC");
-}
-hotmenu ePWM5_ET_Regs()
-{
-    GEL_WatchAdd("*0x6919,x","ePWM5 ETSEL");
-    GEL_WatchAdd("*0x691A,x","ePWM5 ETPS");
-    GEL_WatchAdd("*0x691B,x","ePWM5 ETFLG");
-    GEL_WatchAdd("*0x691C,x","ePWM5 ETCLR");
-    GEL_WatchAdd("*0x691D,x","ePWM5 ETFRC");
-}
-hotmenu ePWM6_All_Regs()
-{
-    GEL_WatchAdd("*0x6940,x","ePWM6 TBCTL");
-    GEL_WatchAdd("*0x6941,x","ePWM6 TBSTS");
-    GEL_WatchAdd("*0x6943,x","ePWM6 TBPHS");
-    GEL_WatchAdd("*0x6944,x","ePWM6 TBCTR");
-    GEL_WatchAdd("*0x6945,x","ePWM6 TBPRD");
-    GEL_WatchAdd("*0x6947,x","ePWM6 CMPCTL");
-    GEL_WatchAdd("*0x6949,x","ePWM6 CMPA");
-    GEL_WatchAdd("*0x694A,x","ePWM6 CMPB");
-    GEL_WatchAdd("*0x694B,x","ePWM6 AQCTLA");
-    GEL_WatchAdd("*0x694C,x","ePWM6 AQCTLB");
-    GEL_WatchAdd("*0x694D,x","ePWM6 AQSFRC");
-    GEL_WatchAdd("*0x694E,x","ePWM6 AQCSFRC");
-    GEL_WatchAdd("*0x694F,x","ePWM6 DBCTL");
-    GEL_WatchAdd("*0x6950,x","ePWM6 DBRED");
-    GEL_WatchAdd("*0x6951,x","ePWM6 DBFED");
-    GEL_WatchAdd("*0x6952,x","ePWM6 TZSEL");
-    GEL_WatchAdd("*0x6953,x","ePWM6 TZDCSEL");
-    GEL_WatchAdd("*0x6954,x","ePWM6 TZCTL");
-    GEL_WatchAdd("*0x6955,x","ePWM6 TZEINT");
-    GEL_WatchAdd("*0x6956,x","ePWM6 TZFLG");
-    GEL_WatchAdd("*0x6957,x","ePWM6 TZCLR");
-    GEL_WatchAdd("*0x6958,x","ePWM6 TZFRC");
-    GEL_WatchAdd("*0x6959,x","ePWM6 ETSEL");
-    GEL_WatchAdd("*0x695A,x","ePWM6 ETPS");
-    GEL_WatchAdd("*0x695B,x","ePWM6 ETFLG");
-    GEL_WatchAdd("*0x695C,x","ePWM6 ETCLR");
-    GEL_WatchAdd("*0x695D,x","ePWM6 ETFRC");
-    GEL_WatchAdd("*0x695E,x","ePWM6 PCCTL");
-
-}
-hotmenu ePWM6_TB_Regs()
-{
-    GEL_WatchAdd("*0x6940,x","ePWM6 TBCTL");
-    GEL_WatchAdd("*0x6941,x","ePWM6 TBSTS");
-    GEL_WatchAdd("*0x6943,x","ePWM6 TBPHS");
-    GEL_WatchAdd("*0x6944,x","ePWM6 TBCTR");
-    GEL_WatchAdd("*0x6945,x","ePWM6 TBPRD");
-}
-hotmenu ePWM6_CMP_Regs()
-{
-    GEL_WatchAdd("*0x6947,x","ePWM6 CMPCTL");
-    GEL_WatchAdd("*0x6949,x","ePWM6 CMPA");
-    GEL_WatchAdd("*0x694A,x","ePWM6 CMPB");
-}
-hotmenu ePWM6_AQ_Regs()
-{
-    GEL_WatchAdd("*0x694B,x","ePWM6 AQCTLA");
-    GEL_WatchAdd("*0x694C,x","ePWM6 AQCTLB");
-    GEL_WatchAdd("*0x694D,x","ePWM6 AQSFRC");
-    GEL_WatchAdd("*0x694E,x","ePWM6 AQCSFRC");
-}
-hotmenu ePWM6_DB_Regs()
-{
-    GEL_WatchAdd("*0x694F,x","ePWM6 DBCTL");
-    GEL_WatchAdd("*0x6950,x","ePWM6 DBRED");
-    GEL_WatchAdd("*0x6951,x","ePWM6 DBFED");
-}
-hotmenu ePWM6_TZ_Regs()
-{
-    GEL_WatchAdd("*0x6952,x","ePWM6 TZSEL");
-    GEL_WatchAdd("*0x6954,x","ePWM6 TZCTL");
-    GEL_WatchAdd("*0x6955,x","ePWM6 TZEINT");
-    GEL_WatchAdd("*0x6956,x","ePWM6 TZFLG");
-    GEL_WatchAdd("*0x6957,x","ePWM6 TZCLR");
-    GEL_WatchAdd("*0x6958,x","ePWM6 TZFRC");
-}
-hotmenu ePWM6_ET_Regs()
-{
-    GEL_WatchAdd("*0x6959,x","ePWM6 ETSEL");
-    GEL_WatchAdd("*0x695A,x","ePWM6 ETPS");
-    GEL_WatchAdd("*0x695B,x","ePWM6 ETFLG");
-    GEL_WatchAdd("*0x695C,x","ePWM6 ETCLR");
-    GEL_WatchAdd("*0x695D,x","ePWM6 ETFRC");
-}
-
-
-/********************************************************************/
-/* Enhanced EQEP Registers                                          */
-/********************************************************************/
-menuitem "Watch eQEP"
-
-hotmenu eQEP1_All_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6B00,x","eQEP1 QPOSCNT");
-    GEL_WatchAdd("*(long *)0x6B02,x","eQEP1 QPOSINIT");
-    GEL_WatchAdd("*(long *)0x6B04,x","eQEP1 QPOSMAX");
-    GEL_WatchAdd("*(long *)0x6B06,x","eQEP1 QPOSCMP");
-    GEL_WatchAdd("*(long *)0x6B08,x","eQEP1 QPOSILAT");
-    GEL_WatchAdd("*(long *)0x6B0A,x","eQEP1 QPOSSLAT");
-    GEL_WatchAdd("*(long *)0x6B0C,x","eQEP1 QPOSLAT");
-    GEL_WatchAdd("*(long *)0x6B0E,x","eQEP1 QUTMR");
-    GEL_WatchAdd("*(long *)0x6B10,x","eQEP1 QUPRD");
-    GEL_WatchAdd("*0x6B12,x","eQEP1 QWDTMR");
-    GEL_WatchAdd("*0x6B13,x","eQEP1 QWDPRD");
-    GEL_WatchAdd("*0x6B14,x","eQEP1 QDECCTL");
-    GEL_WatchAdd("*0x6B15,x","eQEP1 QEPCTL");
-    GEL_WatchAdd("*0x6B16,x","eQEP1 QCAPCTL");
-    GEL_WatchAdd("*0x6B17,x","eQEP1 QPOSCTL");
-    GEL_WatchAdd("*0x6B18,x","eQEP1 QEINT");
-    GEL_WatchAdd("*0x6B19,x","eQEP1 QFLG");
-    GEL_WatchAdd("*0x6B1A,x","eQEP1 QCLR");
-    GEL_WatchAdd("*0x6B1B,x","eQEP1 QFRC");
-    GEL_WatchAdd("*0x6B1C,x","eQEP1 QEPSTS");
-    GEL_WatchAdd("*0x6B1D,x","eQEP1 QCTMR");
-    GEL_WatchAdd("*0x6B1E,x","eQEP1 QCPRD");
-    GEL_WatchAdd("*0x6B1F,x","eQEP1 QCTMRLAT");
-    GEL_WatchAdd("*0x6B20,x","eQEP1 QCPRDLAT");
-}
-hotmenu eQEP2_All_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6B40,x","eQEP2 QPOSCNT");
-    GEL_WatchAdd("*(long *)0x6B42,x","eQEP2 QPOSINIT");
-    GEL_WatchAdd("*(long *)0x6B44,x","eQEP2 QPOSMAX");
-    GEL_WatchAdd("*(long *)0x6B46,x","eQEP2 QPOSCMP");
-    GEL_WatchAdd("*(long *)0x6B48,x","eQEP2 QPOSILAT");
-    GEL_WatchAdd("*(long *)0x6B4A,x","eQEP2 QPOSSLAT");
-    GEL_WatchAdd("*(long *)0x6B4C,x","eQEP2 QPOSLAT");
-    GEL_WatchAdd("(long *)*0x6B4E,x","eQEP2 QUTMR");
-    GEL_WatchAdd("*(long *)0x6B50,x","eQEP2 QUPRD");
-    GEL_WatchAdd("*0x6B52,x","eQEP2 QWDTMR");
-    GEL_WatchAdd("*0x6B53,x","eQEP2 QWDPRD");
-    GEL_WatchAdd("*0x6B54,x","eQEP2 QDECCTL");
-    GEL_WatchAdd("*0x6B55,x","eQEP2 QEPCTL");
-    GEL_WatchAdd("*0x6B56,x","eQEP2 QCAPCTL");
-    GEL_WatchAdd("*0x6B57,x","eQEP2 QPOSCTL");
-    GEL_WatchAdd("*0x6B58,x","eQEP2 QEINT");
-    GEL_WatchAdd("*0x6B59,x","eQEP2 QFLG");
-    GEL_WatchAdd("*0x6B5A,x","eQEP2 QCLR");
-    GEL_WatchAdd("*0x6B5B,x","eQEP2 QFRC");
-    GEL_WatchAdd("*0x6B5C,x","eQEP2 QEPSTS");
-    GEL_WatchAdd("*0x6B5D,x","eQEP2 QCTMR");
-    GEL_WatchAdd("*0x6B5E,x","eQEP2 QCPRD");
-    GEL_WatchAdd("*0x6B5F,x","eQEP2 QCTMRLAT");
-    GEL_WatchAdd("*0x6B60,x","eQEP2 QCPRDLAT");
-}
-
-
-/********************************************************************/
-/* External Interface Registers                                     */
-/********************************************************************/
-menuitem "Watch External Interface Registers";
-
-hotmenu All_External_Interface_Regs()
-{
-    GEL_WatchAdd("*(long *)0x0B20,x","XTIMING0");
-    GEL_WatchAdd("*(long *)0x0B2C,x","XTIMING6");
-    GEL_WatchAdd("*(long *)0x0B2E,x","XTIMING7");
-    GEL_WatchAdd("*(long *)0x0B34,x","XINTCNF2");
-    GEL_WatchAdd("*0x0B38,x","XBANK");
-    GEL_WatchAdd("*0x0B3A,x","XREVISION");
-    GEL_WatchAdd("*0x0B3D,x","XRESET");
-}
-
-/********************************************************************/
-/* External Interrupt Registers                                     */
-/********************************************************************/
-menuitem "Watch External Interrupt Registers";
-
-hotmenu All_XINT_Regs()
-{
-    GEL_WatchAdd("*0x7070,x","XINT1CR");
-    GEL_WatchAdd("*0x7071,x","XINT2CR");
-    GEL_WatchAdd("*0x7072,x","XINT3CR");
-    GEL_WatchAdd("*0x7073,x","XINT4CR");
-    GEL_WatchAdd("*0x7074,x","XINT5CR");
-    GEL_WatchAdd("*0x7075,x","XINT6CR");
-    GEL_WatchAdd("*0x7076,x","XINT7CR");
-    GEL_WatchAdd("*0x7077,x","XNMICR");
-    GEL_WatchAdd("*0x7078,x","XINT1CTR");
-    GEL_WatchAdd("*0x7079,x","XINT2CTR");
-    GEL_WatchAdd("*0x707F,x","XNMICTR");
-}
-hotmenu XINT_Control_Regs()
-{
-    GEL_WatchAdd("*0x7070,x","XINT1CR");
-    GEL_WatchAdd("*0x7071,x","XINT2CR");
-    GEL_WatchAdd("*0x7072,x","XINT3CR");
-    GEL_WatchAdd("*0x7073,x","XINT4CR");
-    GEL_WatchAdd("*0x7074,x","XINT5CR");
-    GEL_WatchAdd("*0x7075,x","XINT6CR");
-    GEL_WatchAdd("*0x7076,x","XINT7CR");
-    GEL_WatchAdd("*0x7077,x","XNMICR");
-}
-hotmenu XINT_Counter_Regs()
-{
-    GEL_WatchAdd("*0x7078,x","XINT1CTR");
-    GEL_WatchAdd("*0x7079,x","XINT2CTR");
-    GEL_WatchAdd("*0x707F,x","XNMICTR");
-}
-
-
-/********************************************************************/
-/* FPU Registers                                                    */
-/********************************************************************/
-menuitem "Watch FPU Registers"
-
-hotmenu All_FPU_Single_Precision_Regs()
-{
-    GEL_WatchAdd("RB");
-    GEL_WatchAdd("STF");
-    GEL_WatchAdd("R0H");
-    GEL_WatchAdd("R1H");
-    GEL_WatchAdd("R2H");
-    GEL_WatchAdd("R3H");
-    GEL_WatchAdd("R4H");
-    GEL_WatchAdd("R5H");
-    GEL_WatchAdd("R6H");
-    GEL_WatchAdd("R7H");
-}
-
-
-/********************************************************************/
-/* GPIO Registers                                                   */
-/********************************************************************/
-menuitem "Watch GPIO Registers";
-
-hotmenu All_GPIO_CONTROL_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6F80,x","GPACTRL");
-    GEL_WatchAdd("*(long *)0x6F82,x","GPAQSEL1");
-    GEL_WatchAdd("*(long *)0x6F84,x","GPAQSEL2");
-    GEL_WatchAdd("*(long *)0x6F86,x","GPAMUX1");
-    GEL_WatchAdd("*(long *)0x6F88,x","GPAMUX2");
-    GEL_WatchAdd("*(long *)0x6F8A,x","GPADIR");
-    GEL_WatchAdd("*(long *)0x6F8C,x","GPAPUD");
-
-    GEL_WatchAdd("*(long *)0x6F90,x","GPBCTRL");
-    GEL_WatchAdd("*(long *)0x6F92,x","GPBQSEL1");
-    GEL_WatchAdd("*(long *)0x6F94,x","GPBQSEL2");
-    GEL_WatchAdd("*(long *)0x6F96,x","GPBMUX1");
-    GEL_WatchAdd("*(long *)0x6F98,x","GPBMUX2");
-    GEL_WatchAdd("*(long *)0x6F9A,x","GPBDIR");
-    GEL_WatchAdd("*(long *)0x6F9C,x","GPBPUD");
-
-    GEL_WatchAdd("*(long *)0x6FA6,x","GPCMUX1");
-    GEL_WatchAdd("*(long *)0x6FA8,x","GPCMUX2");
-    GEL_WatchAdd("*(long *)0x6FAA,x","GPCDIR");
-    GEL_WatchAdd("*(long *)0x6FAC,x","GPCPUD");
-}
-hotmenu All_GPIO_DATA_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6FC0,x","GPADAT");
-    GEL_WatchAdd("*(long *)0x6FC2,x","GPASET");
-    GEL_WatchAdd("*(long *)0x6FC4,x","GPACLEAR");
-    GEL_WatchAdd("*(long *)0x6FC6,x","GPATOGGLE");
-    
-    GEL_WatchAdd("*(long *)0x6FC8,x","GPBDAT");
-    GEL_WatchAdd("*(long *)0x6FCA,x","GPBSET");
-    GEL_WatchAdd("*(long *)0x6FCC,x","GPBCLEAR");
-    GEL_WatchAdd("*(long *)0x6FCE,x","GPBTOGGLE");
-
-    GEL_WatchAdd("*(long *)0x6FD0,x","GPCDAT");
-    GEL_WatchAdd("*(long *)0x6FD2,x","GPCSET");
-    GEL_WatchAdd("*(long *)0x6FD4,x","GPCCLEAR");
-    GEL_WatchAdd("*(long *)0x6FD6,x","GPCTOGGLE");
-}
-hotmenu All_GPIO_INTERRUPT_Regs()
-{
-    GEL_WatchAdd("*0x6FE0,x","GPIOXINT1SEL");
-    GEL_WatchAdd("*0x6FE1,x","GPIOXINT2SEL");
-    GEL_WatchAdd("*0x6FE2,x","GPIOXNMISEL");
-    GEL_WatchAdd("*0x6FE3,x","GPIOXINT3SEL");
-    GEL_WatchAdd("*0x6FE4,x","GPIOXINT4SEL");
-    GEL_WatchAdd("*0x6FE5,x","GPIOXINT5SEL");
-    GEL_WatchAdd("*0x6FE6,x","GPIOXINT6SEL");
-    GEL_WatchAdd("*0x6FE7,x","GPIOXINT7SEL");
-    GEL_WatchAdd("*(long *)0x6FE8,x","GPIOLPMSEL");
-}
-hotmenu All_GPA_Registers()
-{
-    GEL_WatchAdd("*(long *)0x6F80,x","GPACTRL");
-    GEL_WatchAdd("*(long *)0x6F82,x","GPAQSEL1");
-    GEL_WatchAdd("*(long *)0x6F84,x","GPAQSEL2");
-    GEL_WatchAdd("*(long *)0x6F86,x","GPAMUX1");
-    GEL_WatchAdd("*(long *)0x6F88,x","GPAMUX2");
-    GEL_WatchAdd("*(long *)0x6F8A,x","GPADIR");
-    GEL_WatchAdd("*(long *)0x6F8C,x","GPAPUD");
-    
-    GEL_WatchAdd("*(long *)0x6FC0,x","GPADAT");
-    GEL_WatchAdd("*(long *)0x6FC2,x","GPASET");
-    GEL_WatchAdd("*(long *)0x6FC4,x","GPACLEAR");
-    GEL_WatchAdd("*(long *)0x6FC6,x","GPATOGGLE");
-}
-hotmenu All_GPB_Registers()
-{
-    GEL_WatchAdd("*(long *)0x6F90,x","GPBCTRL");
-    GEL_WatchAdd("*(long *)0x6F92,x","GPBQSEL1");
-    GEL_WatchAdd("*(long *)0x6F94,x","GPBQSEL2");
-    GEL_WatchAdd("*(long *)0x6F96,x","GPBMUX1");
-    GEL_WatchAdd("*(long *)0x6F98,x","GPBMUX2");
-    GEL_WatchAdd("*(long *)0x6F9A,x","GPBDIR");
-    GEL_WatchAdd("*(long *)0x6F9C,x","GPBPUD");
-
-    GEL_WatchAdd("*(long *)0x6FC8,x","GPBDAT");
-    GEL_WatchAdd("*(long *)0x6FCA,x","GPBSET");
-    GEL_WatchAdd("*(long *)0x6FCC,x","GPBCLEAR");
-    GEL_WatchAdd("*(long *)0x6FCE,x","GPBTOGGLE");
-}
-hotmenu All_GPC_Registers()
-{
-    GEL_WatchAdd("*(long *)0x6FA6,x","GPCMUX1");
-    GEL_WatchAdd("*(long *)0x6FA8,x","GPCMUX2");
-    GEL_WatchAdd("*(long *)0x6FAA,x","GPCDIR");
-    GEL_WatchAdd("*(long *)0x6FAC,x","GPCPUD");
-
-    GEL_WatchAdd("*(long *)0x6FC8,x","GPBDAT");
-    GEL_WatchAdd("*(long *)0x6FCA,x","GPBSET");
-    GEL_WatchAdd("*(long *)0x6FCC,x","GPBCLEAR");
-    GEL_WatchAdd("*(long *)0x6FCE,x","GPBTOGGLE");
-
-    GEL_WatchAdd("*(long *)0x6FD0,x","GPCDAT");
-    GEL_WatchAdd("*(long *)0x6FD2,x","GPCSET");
-    GEL_WatchAdd("*(long *)0x6FD4,x","GPCCLEAR");
-    GEL_WatchAdd("*(long *)0x6FD6,x","GPCTOGGLE");
-}
-
-
-/********************************************************************/
-/* Multichannel Serial Port Registers                               */
-/********************************************************************/
-menuitem "Watch McBSP Registers";
-
-hotmenu All_McBSP_A_Regs()
-{
-    GEL_WatchAdd("*0x5000,x","McBSPA DRR2");
-    GEL_WatchAdd("*0x5001,x","McBSPA DRR1");
-    GEL_WatchAdd("*0x5002,x","McBSPA DXR2");
-    GEL_WatchAdd("*0x5003,x","McBSPA DXR1");
-    GEL_WatchAdd("*0x5004,x","McBSPA SPCR2");
-    GEL_WatchAdd("*0x5005,x","McBSPA SPCR1");
-    GEL_WatchAdd("*0x5006,x","McBSPA RCR2");
-    GEL_WatchAdd("*0x5007,x","McBSPA RCR1");
-    GEL_WatchAdd("*0x5008,x","McBSPA XCR2");
-    GEL_WatchAdd("*0x5009,x","McBSPA XCR1");
-    GEL_WatchAdd("*0x500A,x","McBSPA SRGR2");
-    GEL_WatchAdd("*0x500B,x","McBSPA SRGR1");
-    GEL_WatchAdd("*0x500C,x","McBSPA MCR2");
-    GEL_WatchAdd("*0x500D,x","McBSPA MCR1");
-    GEL_WatchAdd("*0x500E,x","McBSPA RCERA");
-    GEL_WatchAdd("*0x500F,x","McBSPA RCERB");
-    GEL_WatchAdd("*0x5010,x","McBSPA XCERA");
-    GEL_WatchAdd("*0x5011,x","McBSPA XCERB");
-    GEL_WatchAdd("*0x5012,x","McBSPA PCR1");
-    GEL_WatchAdd("*0x5013,x","McBSPA RCERC");
-    GEL_WatchAdd("*0x5014,x","McBSPA RCERD");
-    GEL_WatchAdd("*0x5015,x","McBSPA XCERC");
-    GEL_WatchAdd("*0x5016,x","McBSPA XCERD");
-    GEL_WatchAdd("*0x5017,x","McBSPA RCERE");
-    GEL_WatchAdd("*0x5018,x","McBSPA RCERF");
-    GEL_WatchAdd("*0x5019,x","McBSPA XCERE");
-    GEL_WatchAdd("*0x501A,x","McBSPA XCERF");
-    GEL_WatchAdd("*0x501B,x","McBSPA RCERG");
-    GEL_WatchAdd("*0x501C,x","McBSPA RCERH");
-    GEL_WatchAdd("*0x501D,x","McBSPA XCERG");
-    GEL_WatchAdd("*0x501E,x","McBSPA XCERH");
-    GEL_WatchAdd("*0x5023,x","McBSPA MFFINT");
-    GEL_WatchAdd("*0x503F,x","McBSPA Revision");
-}
-
-/********************************************************************/
-/* I2C Registers                                                    */
-/********************************************************************/
-menuitem "Watch I2C Registers";
-
-hotmenu All_I2C_Regs()
-{
-    GEL_WatchAdd("*0x7900,x","I2COAR");
-    GEL_WatchAdd("*0x7901,x","I2CIER");
-    GEL_WatchAdd("*0x7902,x","I2CSTR");
-    GEL_WatchAdd("*0x7903,x","I2CCLKL");
-    GEL_WatchAdd("*0x7904,x","I2CCLKH");
-    GEL_WatchAdd("*0x7905,x","I2CCNT");
-    GEL_WatchAdd("*0x7906,x","I2CDRR");
-    GEL_WatchAdd("*0x7907,x","I2CSAR");
-    GEL_WatchAdd("*0x7908,x","I2CDXR");
-    GEL_WatchAdd("*0x7909,x","I2CMDR");
-    GEL_WatchAdd("*0x790A,x","I2CISRC");
-    GEL_WatchAdd("*0x790C,x","I2CPSC");
-    GEL_WatchAdd("*0x7920,x","I2CFFTX");
-    GEL_WatchAdd("*0x7921,x","I2CFFRX");
-}
-
-
-/********************************************************************/
-/* Peripheral Interrupt Expansion Registers                         */
-/********************************************************************/
-menuitem "Watch Peripheral Interrupt Expansion Registers";
-
-hotmenu All_PIE_Regs()
-{
-    GEL_WatchAdd("*0x0CE0,x","PIECTRL");
-    GEL_WatchAdd("*0x0CE1,x","PIEACK");
-    GEL_WatchAdd("*0x0CE2,x","PIEIER1");
-    GEL_WatchAdd("*0x0CE3,x","PIEIFR1");
-    GEL_WatchAdd("*0x0CE4,x","PIEIER2");
-    GEL_WatchAdd("*0x0CE5,x","PIEIFR2");
-    GEL_WatchAdd("*0x0CE6,x","PIEIER3");
-    GEL_WatchAdd("*0x0CE7,x","PIEIFR3");
-    GEL_WatchAdd("*0x0CE8,x","PIEIER4");
-    GEL_WatchAdd("*0x0CE9,x","PIEIFR4");
-    GEL_WatchAdd("*0x0CEA,x","PIEIER5");
-    GEL_WatchAdd("*0x0CEB,x","PIEIFR5");
-    GEL_WatchAdd("*0x0CEC,x","PIEIER6");
-    GEL_WatchAdd("*0x0CED,x","PIEIFR6");
-    GEL_WatchAdd("*0x0CEE,x","PIEIER7");
-    GEL_WatchAdd("*0x0CEF,x","PIEIFR7");
-    GEL_WatchAdd("*0x0CF0,x","PIEIER8");
-    GEL_WatchAdd("*0x0CF1,x","PIEIFR8");
-    GEL_WatchAdd("*0x0CF2,x","PIEIER9");
-    GEL_WatchAdd("*0x0CF3,x","PIEIFR9");
-    GEL_WatchAdd("*0x0CF4,x","PIEIER10");
-    GEL_WatchAdd("*0x0CF5,x","PIEIFR10");
-    GEL_WatchAdd("*0x0CF6,x","PIEIER11");
-    GEL_WatchAdd("*0x0CF7,x","PIEIFR11");
-    GEL_WatchAdd("*0x0CF8,x","PIEIER12");
-    GEL_WatchAdd("*0x0CF9,x","PIEIFR12");
-}
-hotmenu PIECTRL()
-{
-    GEL_WatchAdd("*0x0CE0,x","PIECTRL");
-}
-hotmenu PIEACK()
-{
-    GEL_WatchAdd("*0x0CE1,x","PIEACK");
-}
-hotmenu PIEIER1_and_PIEIFR1()
-{
-    GEL_WatchAdd("*0x0CE2,x","PIEIER1");
-    GEL_WatchAdd("*0x0CE3,x","PIEIFR1");
-}
-hotmenu PIEIER2_and_PIEIFR2()
-{
-    GEL_WatchAdd("*0x0CE4,x","PIEIER2");
-    GEL_WatchAdd("*0x0CE5,x","PIEIFR2");
-}
-hotmenu PIEIER3_and_PIEIFR3()
-{
-    GEL_WatchAdd("*0x0CE6,x","PIEIER3");
-    GEL_WatchAdd("*0x0CE7,x","PIEIFR3");
-}
-hotmenu PIEIER4_and_PIEIFR4()
-{
-    GEL_WatchAdd("*0x0CE8,x","PIEIER4");
-    GEL_WatchAdd("*0x0CE9,x","PIEIFR4");
-}
-hotmenu PIEIER5_and_PIEIFR5()
-{
-    GEL_WatchAdd("*0x0CEA,x","PIEIER5");
-    GEL_WatchAdd("*0x0CEB,x","PIEIFR5");
-}
-hotmenu PIEIER6_and_PIEIFR6()
-{
-    GEL_WatchAdd("*0x0CEC,x","PIEIER6");
-    GEL_WatchAdd("*0x0CED,x","PIEIFR6");
-}
-hotmenu PIEIER7_and_PIEIFR7()
-{
-    GEL_WatchAdd("*0x0CEE,x","PIEIER7");
-    GEL_WatchAdd("*0x0CEF,x","PIEIFR7");
-}
-hotmenu PIEIER8_and_PIEIFR8()
-{
-    GEL_WatchAdd("*0x0CF0,x","PIEIER8");
-    GEL_WatchAdd("*0x0CF1,x","PIEIFR8");
-}
-hotmenu PIEIER9_and_PIEIFR9()
-{
-    GEL_WatchAdd("*0x0CF2,x","PIEIER9");
-    GEL_WatchAdd("*0x0CF3,x","PIEIFR9");
-}
-hotmenu PIEIFR10_and_PIEIFR10()
-{
-    GEL_WatchAdd("*0x0CF4,x","PIEIER10");
-    GEL_WatchAdd("*0x0CF5,x","PIEIFR10");
-}
-hotmenu PIEIER11_and_PIEIFR11()
-{
-    GEL_WatchAdd("*0x0CF6,x","PIEIER11");
-    GEL_WatchAdd("*0x0CF7,x","PIEIFR11");
-}
-hotmenu PIEIER12_and_PIEIFR12()
-{
-    GEL_WatchAdd("*0x0CF8,x","PIEIER12");
-    GEL_WatchAdd("*0x0CF9,x","PIEIFR12");
-}
-
-
-/********************************************************************/
-/* Serial Communication Interface Registers                         */
-/********************************************************************/
-menuitem "Watch SCI Registers";
-
-hotmenu SCI_A_All_Regs()
-{
-    GEL_WatchAdd("*0x7050,x","SCICCRA");
-    GEL_WatchAdd("*0x7051,x","SCICTL1A");
-    GEL_WatchAdd("*0x7052,x","SCIHBAUDA");
-    GEL_WatchAdd("*0x7053,x","SCILBAUDA");
-    GEL_WatchAdd("*0x7054,x","SCICTL2A");
-    GEL_WatchAdd("*0x7055,x","SCIRXSTA");
-    GEL_WatchAdd("*0x7056,x","SCIRXEMUA");
-    GEL_WatchAdd("*0x7057,x","SCIRXBUFA");
-    GEL_WatchAdd("*0x7059,x","SCITXBUFA");
-    GEL_WatchAdd("*0x705A,x","SCIFFTXA");
-    GEL_WatchAdd("*0x705B,x","SCIFFRXA");
-    GEL_WatchAdd("*0x705C,x","SCIFFCTA");
-    GEL_WatchAdd("*0x705F,x","SCIPRIA");
-}
-hotmenu SCI_A_FIFO_Registers()
-{
-    GEL_WatchAdd("*0x705A,x","SCIFFTXA");
-    GEL_WatchAdd("*0x705B,x","SCIFFRXA");
-    GEL_WatchAdd("*0x705C,x","SCIFFCTA");
-}
-hotmenu SCI_B_All_Regs()
-{
-    GEL_WatchAdd("*0x7750,x","SCICCRB");
-    GEL_WatchAdd("*0x7751,x","SCICTL1B");
-    GEL_WatchAdd("*0x7752,x","SCIHBAUDB");
-    GEL_WatchAdd("*0x7753,x","SCILBAUDB");
-    GEL_WatchAdd("*0x7754,x","SCICTL2B");
-    GEL_WatchAdd("*0x7755,x","SCIRXSTB");
-    GEL_WatchAdd("*0x7756,x","SCIRXEMUB");
-    GEL_WatchAdd("*0x7757,x","SCIRXBUFB");
-    GEL_WatchAdd("*0x7759,x","SCITXBUFB");
-    GEL_WatchAdd("*0x775A,x","SCIFFTXB");
-    GEL_WatchAdd("*0x775B,x","SCIFFRXB");
-    GEL_WatchAdd("*0x775C,x","SCIFFCTB");
-    GEL_WatchAdd("*0x775F,x","SCIPRIB");
-}
-hotmenu SCI_B_FIFO_Registers()
-{
-    GEL_WatchAdd("*0x775A,x","SCIFFTXB");
-    GEL_WatchAdd("*0x775B,x","SCIFFRXB");
-    GEL_WatchAdd("*0x775C,x","SCIFFCTB");
-}
-
-
-/********************************************************************/
-/* Serial Peripheral Interface Registers                            */
-/********************************************************************/
-menuitem "Watch SPI Registers";
-
-hotmenu SPI_A_All_Regs()
-{
-    GEL_WatchAdd("*0x7040,x","SPIA SPICCR");
-    GEL_WatchAdd("*0x7041,x","SPIA SPICTL");
-    GEL_WatchAdd("*0x7042,x","SPIA SPIST");
-    GEL_WatchAdd("*0x7044,x","SPIA SPIBRR");
-    GEL_WatchAdd("*0x7046,x","SPIA SPIEMU");
-    GEL_WatchAdd("*0x7047,x","SPIA SPIRXBUF");
-    GEL_WatchAdd("*0x7048,x","SPIA SPITXBUF");
-    GEL_WatchAdd("*0x7049,x","SPIA SPIDAT");
-    GEL_WatchAdd("*0x704A,x","SPIA SPIFFTX");
-    GEL_WatchAdd("*0x704B,x","SPIA SPIFFRX");
-    GEL_WatchAdd("*0x704C,x","SPIA SPIFFCT");
-    GEL_WatchAdd("*0x704F,x","SPIA SPIPRI");
-}
-hotmenu SPI_A_FIFO_Registers()
-{
-    GEL_WatchAdd("*0x704A,x","SPIA SPIFFTX");
-    GEL_WatchAdd("*0x704B,x","SPIA SPIFFRX");
-    GEL_WatchAdd("*0x704C,x","SPIA SPIFFCT");
-}
-
-
-/********************************************************************/
-/* Watchdog Timer Registers                                         */
-/********************************************************************/
-menuitem "Watch Watchdog Timer Registers";
-
-hotmenu All_Watchdog_Regs()
-{
-    GEL_WatchAdd("*0x7023,x","WDCNTR");
-    GEL_WatchAdd("*0x7025,x","WDKEY");
-    GEL_WatchAdd("*0x7029,x","WDCR");
-    GEL_WatchAdd("*0x7022,x","SCSR");
-}
-
-/********************************************************************/
-/*** End of file ***/
diff --git a/Source/External/v120/DSP2833x_common/gel/f28334.gel b/Source/External/v120/DSP2833x_common/gel/f28334.gel
deleted file mode 100644
index fde0000..0000000
--- a/Source/External/v120/DSP2833x_common/gel/f28334.gel
+++ /dev/null
@@ -1,2951 +0,0 @@
-/********************************************************************/
-/* f28334.gel                                                       */
-/* Version 3.30.2                                                   */
-/*                                                                  */
-/* This GEL file is to be used with the TMS320F28334 DSP.           */
-/* Changes may be required to support specific hardware designs.    */
-/*                                                                  */
-/* Code Composer Studio supports six reserved GEL functions that    */
-/* automatically get executed if they are defined. They are:        */
-/*                                                                  */
-/* StartUp()              - Executed whenever CCS is invoked        */
-/* OnReset()              - Executed after Debug->Reset CPU         */
-/* OnRestart()            - Executed after Debug->Restart           */
-/* OnPreFileLoaded()      - Executed before File->Load Program      */
-/* OnFileLoaded()         - Executed after File->Load Program       */
-/* OnTargetConnect()      - Executed after Debug->Connect           */
-/*                                                                  */
-/********************************************************************/
-
-StartUp()
-{
-
-/* The next line automatically loads the .gel file that comes   */
-/* with the DSP2833x Peripheral Header Files download.  To use, */
-/* uncomment, and adjust the directory path as needed.          */
-//  GEL_LoadGel("c:\\CCStudio_v3.3\\cc\\gel\\DSP2833x_Peripheral.gel");
-}
-
-OnReset(int nErrorCode)
-{
-    C28x_Mode();
-    Unlock_CSM();
-    ADC_Cal();
-}
-
-OnRestart(int nErrorCode)
-{
-/* CCS will call OnRestart() when you do a Debug->Restart and   */
-/* after you load a new file.  Between running interrupt based  */
-/* programs, this function will clear interrupts and help keep  */
-/* the processor from going off into invalid memory.            */
-     C28x_Mode();
-     IER = 0;
-     IFR = 0;
-     ADC_Cal();
-}
-
-int TxtOutCtl=0;
-OnPreFileLoaded()
-{
-    XINTF_Enable();
-    if (TxtOutCtl==0)
-    {
-     GEL_TextOut("\nNOTES:\nGel will enable XINTFx16 during Debug only.\nEnable XINTF in code prior to use.");
-     GEL_TextOut("\nFPU Registers can be found via GEL->Watch FPU Registers."); 
-	 TxtOutCtl=1;
-    }
-}
-
-OnFileLoaded(int nErrorCode, int bSymbolsOnly)
-{
-    ADC_Cal();
-}
-
-OnTargetConnect()
-{
-    C28x_Mode();
-    F28334_Memory_Map();            /* Initialize the CCS memory map */
-
-/* Check to see if CCS has been started-up with the DSP already */
-/* running in real-time mode.  The user can add whatever        */
-/* custom initialization stuff they want to each case.          */
-
-    if (GEL_IsInRealtimeMode())     /* Do real-time mode target initialization */
-    {
-
-    }
-    else                            /* Do stop-mode target initialization */
-    {
-        GEL_Reset();                /* Reset DSP */
-    }
-
-}
-
-
-/********************************************************************/
-/* These functions are launched by the GEL_Toolbar button plugin    */
-/********************************************************************/
-GEL_Toolbar1()
-{
-    Run_Realtime_with_Reset();
-}
-GEL_Toolbar2()
-{
-    Run_Realtime_with_Restart();
-}
-GEL_Toolbar3()
-{
-    Full_Halt();
-}
-GEL_Toolbar4()
-{
-    Full_Halt_with_Reset();
-}
-
-int GEL_Toolbar5_Toggle = 0;
-GEL_Toolbar5()
-{
-    if(GEL_Toolbar5_Toggle == 0)
-    {
-        GEL_Toolbar5_Toggle = 1;
-        GEL_OpenWindow("GEL_Buttons",1,4);
-        GEL_TextOut("Button 1: Run_Realtime_with_Reset()","GEL_Buttons",0,0);
-        GEL_TextOut("Button 2: Run_Realtime_with_Restart()","GEL_Buttons",0,1);
-        GEL_TextOut("Button 3: Full_Halt()", "GEL_Buttons",0,2);
-        GEL_TextOut("Button 4: Full_Halt_with_Reset()","GEL_Buttons",0,3);
-    }
-    else
-    {
-        GEL_Toolbar5_Toggle = 0;
-        GEL_CloseWindow("GEL_Buttons");
-    }
-}
-
-
-/********************************************************************/
-/* These functions are useful to engage/dis-enagage realtime        */
-/* emulation mode during debug.  They save the user from having to  */
-/* manually perform these steps in CCS.                             */
-/********************************************************************/
-menuitem "Realtime Emulation Control";
-
-hotmenu Run_Realtime_with_Reset()
-{
-    GEL_Reset();                /* Reset the DSP */
-    ST1 = ST1 & 0xFFFD;         /* clear DBGM bit in ST1 */
-    GEL_EnableRealtime();       /* Enable Realtime mode */
-    GEL_Run();                  /* Run the DSP */
-}
-hotmenu Run_Realtime_with_Restart()
-{
-    GEL_Restart();              /* Reset the DSP */
-    ST1 = ST1 & 0xFFFD;         /* clear DBGM bit in ST1 */
-    GEL_EnableRealtime();       /* Enable Realtime mode */
-    GEL_Run();                  /* Run the DSP */
-}
-hotmenu Full_Halt()
-{
-    GEL_DisableRealtime();      /* Disable Realtime mode */
-    GEL_Halt();                 /* Halt the DSP */
-}
-hotmenu Full_Halt_with_Reset()
-{
-    GEL_DisableRealtime();      /* Disable Realtime mode */
-    GEL_Halt();                 /* Halt the DSP */
-    GEL_Reset();                /* Reset the DSP */
-}
-
-
-/********************************************************************/
-/*                         F28334 Memory Map                        */
-/*                                                                  */
-/*   Note: M0M1MAP and VMAP signals tied high on F28334 core        */
-/*                                                                  */
-/*   0x000000 - 0x0003ff   M0 SARAM                (Prog and Data)  */
-/*   0x000400 - 0x0007ff   M1 SARAM                (Prog and Data)  */
-/*   0x000800 - 0x001fff   Peripheral Frame0 (PF0) (Data only)      */
-/*   0x004000 - 0x004fff   XINTF Zone 0            (Prog and Data)  */
-/*   0x005000 - 0x005fff   Peripheral Frame3 (PF3) (Data only)      */
-/*   0x006000 - 0x006fff   Peripheral Frame1 (PF1) (Data only)      */
-/*   0x007000 - 0x007fff   Peripheral Frame2 (PF2) (Data only)      */
-/*   0x008000 - 0x008fff   L0 SARAM                (Prog and Data)  */
-/*   0x009000 - 0x009fff   L1 SARAM                (Prog and Data)  */
-/*   0x00A000 - 0x00Afff   L2 SARAM                (Prog and Data)  */
-/*   0x00B000 - 0x00Bfff   L3 SARAM                (Prog and Data)  */
-/*   0x00C000 - 0x00Cfff   L4 SARAM                (Prog and Data)  */
-/*   0x00D000 - 0x00Dfff   L5 SARAM                (Prog and Data)  */
-/*   0x00E000 - 0x00Efff   L6 SARAM                (Prog and Data)  */
-/*   0x00F000 - 0x00Ffff   L7 SARAM                (Prog and Data)  */
-/*   0x100000 - 0x1fffff   XINTF Zone 6            (Prog and Data)  */
-/*   0x200000 - 0x2fffff   XINTF Zone 7            (Prog and Data)  */
-/*   0x320000 - 0x33ffff   Flash                   (Prog and Data)  */
-/*   0x380080 - 0x380088   ADC_cal function        (Prog and Data)  */
-/*   0x380090 - 0x380090   PARTID value            (Prog and Data)  */
-/*   0x380400 - 0x3807ff   OTP                     (Prog and Data)  */
-/*   0x3f8000 - 0x3f8fff   L0 SARAM                (Prog and Data)  */
-/*   0x3f9000 - 0x3f9fff   L1 SARAM                (Prog and Data)  */
-/*   0x3fA000 - 0x3fAfff   L2 SARAM                (Prog and Data)  */
-/*   0x3fB000 - 0x3fBfff   L3 SARAM                (Prog and Data)  */
-/*   0x3fe000 - 0x3fffff   BOOT ROM                (Prog and Data)  */
-/********************************************************************/
-menuitem "Initialize Memory Map";
-
-hotmenu F28334_Memory_Map()
-{
-    GEL_MapReset();
-    GEL_MapOn();
-
-    /* Program memory map */
-    GEL_MapAdd(0x0,0,0x400,1,1);                 /* M0 SARAM        */
-    GEL_MapAdd(0x400,0,0x400,1,1);               /* M1 SARAM        */
-    GEL_MapAdd(0x4000,0,0x1000,1,1);             /* Zone 0          */
-    GEL_MapAdd(0x8000,0,0x1000,1,1);             /* L0 SARAM        */
-    GEL_MapAdd(0x9000,0,0x1000,1,1);             /* L1 SARAM        */
-    GEL_MapAdd(0xA000,0,0x1000,1,1);             /* L2 SARAM        */
-    GEL_MapAdd(0xB000,0,0x1000,1,1);             /* L3 SARAM        */
-    GEL_MapAdd(0xC000,0,0x1000,1,1);             /* L4 SARAM        */
-    GEL_MapAdd(0xD000,0,0x1000,1,1);             /* L5 SARAM        */
-    GEL_MapAdd(0xE000,0,0x1000,1,1);             /* L6 SARAM        */
-    GEL_MapAdd(0xF000,0,0x1000,1,1);             /* L7 SARAM        */
-    GEL_MapAdd(0x100000,0,0x100000,1,1);         /* Zone 6          */
-    GEL_MapAdd(0x200000,0,0x100000,1,1);         /* Zone 7          */
-    GEL_MapAdd(0x320000,0,0x20000,1,0);          /* FLASH           */
-    GEL_MapAdd(0x380080,0,0x00009,1,0);          /* ADC_cal function*/
-    GEL_MapAdd(0x380090,0,0x00001,1,0);          /* PARTID value    */
-    GEL_MapAdd(0x380400,0,0x00400,1,0);          /* OTP             */
-    GEL_MapAdd(0x3f8000,0,0x1000,1,1);           /* L0 SARAM Mirror */
-    GEL_MapAdd(0x3f9000,0,0x1000,1,1);           /* L1 SARAM Mirror */
-    GEL_MapAdd(0x3fA000,0,0x1000,1,1);           /* L2 SARAM Mirror */
-    GEL_MapAdd(0x3fb000,0,0x1000,1,1);           /* L3 SARAM Mirror */
-    GEL_MapAdd(0x3fe000,0,0x2000,1,0);           /* BOOT ROM        */
-
-    /* Data memory map */
-    GEL_MapAdd(0x000,1,0x400,1,1);               /* M0 SARAM        */
-    GEL_MapAdd(0x400,1,0x400,1,1);               /* M1 SARAM        */
-    GEL_MapAdd(0x800,1,0x1800,1,1);              /* PF0             */
-    GEL_MapAdd(0x4000,1,0x1000,1,1);             /* Zone 0          */
-    GEL_MapAdd(0x5000,1,0x1000,1,1);             /* PF3             */
-    GEL_MapAdd(0x6000,1,0x1000,1,1);             /* PF1             */
-    GEL_MapAddStr(0x7000,1,0x1000,"R|W|AS2",0);  /* PF2             */
-    GEL_MapAdd(0x8000,1,0x1000,1,1);             /* L0 SARAM        */
-    GEL_MapAdd(0x9000,1,0x1000,1,1);             /* L1 SARAM        */
-    GEL_MapAdd(0xA000,1,0x1000,1,1);             /* L2 SARAM        */
-    GEL_MapAdd(0xB000,1,0x1000,1,1);             /* L3 SARAM        */
-    GEL_MapAdd(0xC000,1,0x1000,1,1);             /* L4 SARAM        */
-    GEL_MapAdd(0xD000,1,0x1000,1,1);             /* L5 SARAM        */
-    GEL_MapAdd(0xE000,1,0x1000,1,1);             /* L6 SARAM        */
-    GEL_MapAdd(0xF000,1,0x1000,1,1);             /* L7 SARAM        */
-    GEL_MapAdd(0x100000,1,0x100000,1,1);         /* Zone 6          */
-    GEL_MapAdd(0x200000,1,0x100000,1,1);         /* Zone 7          */
-    GEL_MapAdd(0x320000,1,0x20000,1,0);          /* FLASH           */
-    GEL_MapAdd(0x380080,1,0x00009,1,0);          /* ADC_cal function*/
-    GEL_MapAdd(0x380090,1,0x00001,1,0);          /* PARTID value    */
-    GEL_MapAdd(0x380400,1,0x00400,1,0);          /* OTP             */
-    GEL_MapAdd(0x3f8000,1,0x1000,1,1);           /* L0 SARAM Mirror */
-    GEL_MapAdd(0x3f9000,1,0x1000,1,1);           /* L1 SARAM Mirror */
-    GEL_MapAdd(0x3fA000,1,0x1000,1,1);           /* L2 SARAM Mirror */
-    GEL_MapAdd(0x3fb000,1,0x1000,1,1);           /* L3 SARAM Mirror */
-    GEL_MapAdd(0x3fe000,1,0x2000,1,0);           /* BOOT ROM        */
-}
-
-
-/********************************************************************/
-/* The ESTOP0 fill functions are useful for debug.  They fill the   */
-/* RAM with software breakpoints that will trap runaway code.       */
-/********************************************************************/
-hotmenu Fill_F28334_RAM_with_ESTOP0()
-{
-    GEL_MemoryFill(0x000000,1,0x000800,0x7625);      /* Fill M0/M1  */
-    GEL_MemoryFill(0x008000,1,0x002000,0x7625);      /* Fill L0/L1  */
-    GEL_MemoryFill(0x00A000,1,0x002000,0x7625);      /* Fill L2/L3  */
-    GEL_MemoryFill(0x00C000,1,0x002000,0x7625);      /* Fill L4/L5  */
-    GEL_MemoryFill(0x00E000,1,0x002000,0x7625);      /* Fill L6/L7  */
-}
-
-
-/********************************************************************/
-menuitem "Watchdog";
-hotmenu Disable_WD()
-{
-    *0x7029 = *0x7029 | 0x0068;                /* Set the WDDIS bit */
-    *0x7025 = 0x0055;                          /* Service the WD    */
-    *0x7025 = 0x00AA;                          /*  once to be safe. */
-    GEL_TextOut("\nWatchdog Timer Disabled");
-}
-
-
-/********************************************************************/
-menuitem "Code Security Module"
-hotmenu Unlock_CSM()
-{
-    /* Perform dummy reads of the password locations */
-    XAR0 = *0x33FFF8;
-    XAR0 = *0x33FFF9;
-    XAR0 = *0x33FFFA;
-    XAR0 = *0x33FFFB;
-    XAR0 = *0x33FFFC;
-    XAR0 = *0x33FFFD;
-    XAR0 = *0x33FFFE;
-    XAR0 = *0x33FFFF;
-
-    /* Write passwords to the KEY registers.  0xFFFF's are dummy passwords.
-       User should replace them with the correct password for their DSP */
-    *0xAE0 = 0xFFFF;
-    *0xAE1 = 0xFFFF;
-    *0xAE2 = 0xFFFF;
-    *0xAE3 = 0xFFFF;
-    *0xAE4 = 0xFFFF;
-    *0xAE5 = 0xFFFF;
-    *0xAE6 = 0xFFFF;
-    *0xAE7 = 0xFFFF;
-}
-
-
-/********************************************************************/
-menuitem "Addressing Modes";
-hotmenu C28x_Mode()
-{
-    ST1 = ST1 & (~0x0100);      /*   AMODE = 0  */
-    ST1 = ST1 | 0x0200;         /* OBJMODE = 1  */
-}
-hotmenu C24x_Mode()
-{
-    ST1 = ST1 | 0x0100;         /*   AMODE = 1  */
-    ST1 = ST1 | 0x0200;         /* OBJMODE = 1  */
-}
-hotmenu C27x_Mode()
-{
-    ST1 = ST1 & (~0x0100);      /*   AMODE = 0  */
-    ST1 = ST1 & (~0x0200);      /* OBJMODE = 0  */
-}
-
-
-/********************************************************************/
-/*                            PLL Ratios                            */
-/*                                                                  */
-/* The following table describes the PLL clocking ratios (0..10)    */
-/*                                                                  */
-/*   Ratio        CLKIN         Description                         */
-/*   -----    --------------    ------------                        */
-/*     0      OSCCLK/2          PLL bypassed                        */
-/*     1      (OSCCLK * 1)/2    15 Mhz for 30 Mhz CLKIN             */
-/*     2      (OSCCLK * 2)/2    30 Mhz for 30 Mhz CLKIN             */
-/*     3      (OSCCLK * 3)/2    45 Mhz for 30 Mhz CLKIN             */
-/*     4      (OSCCLK * 4)/2    60 Mhz for 30 Mhz CLKIN             */
-/*     5      (OSCCLK * 5)/2    75 Mhz for 30 Mhz CLKIN             */
-/*     6      (OSCCLK * 6)/2    90 Mhz for 30 Mhz CLKIN             */
-/*     7      (OSCCLK * 7)/2    105 Mhz for 30 Mhz CLKIN            */
-/*     8      (OSCCLK * 8)/2    120 Mhz for 30 Mhz CLKIN            */
-/*     9      (OSCCLK * 9)/2    135 Mhz for 30 Mhz CLKIN            */
-/*    10      (OSCCLK * 10)/2   150 Mhz for 30 Mhz CLKIN            */
-/********************************************************************/
-menuitem "Set PLL Ratio";
-
-hotmenu Bypass()
-{
-    DIVSEL_div2();     /* DIVSEL = 1/2                      */
-    *0x7021 = 0;       /* CLKIN = OSCCLK/2, PLL is bypassed */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x1_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 1;      /* CLKIN = (OSCCLK * 1)/2 */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x2_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 2;      /* CLKIN = (OSCCLK * 2)/2 */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x3_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 3;      /* CLKIN = (OSCCLK * 3)/2 */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x4_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 4;      /* CLKIN = (OSCCLK * 4)/2 */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x5_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 5;      /* CLKIN = (OSCCLK * 5)/2 */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x6_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 6;      /* CLKIN = (OSCCLK * 6)/2 */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x7_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 7;      /* CLKIN = (OSCCLK * 7)/2 */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x8_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 8;      /* CLKIN = (OSCCLK * 8)/2 */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x9_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 9;      /* CLKIN = (OSCCLK * 9)/2 */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x10_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 10;     /* CLKIN = (OSCCLK * 10)/2 */
-    PLL_Wait();
-}
-// hotmenu OSCCLK_x1_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 1;      /* CLKIN = (OSCCLK * 1)/1 */
-//     PLL_Wait();
-// }
-// hotmenu OSCCLK_x2_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 2;      /* CLKIN = (OSCCLK * 2)/1 */
-//     PLL_Wait();
-// }
-// hotmenu OSCCLK_x3_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 3;      /* CLKIN = (OSCCLK * 3)/1 */
-//     PLL_Wait();
-// }
-// hotmenu OSCCLK_x4_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 4;      /* CLKIN = (OSCCLK * 4)/1 */
-//     PLL_Wait();
-// }
-// hotmenu OSCCLK_x5_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 5;      /* CLKIN = (OSCCLK * 5)/1 */
-//     PLL_Wait();
-// }
-// hotmenu OSCCLK_x6_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 6;      /* CLKIN = (OSCCLK * 6)/1 */
-//     PLL_Wait();
-// }
-// hotmenu OSCCLK_x7_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 7;      /* CLKIN = (OSCCLK * 7)/1 */
-//     PLL_Wait();
-// }
-// hotmenu OSCCLK_x8_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 8;      /* CLKIN = (OSCCLK * 8)/1 */
-//     PLL_Wait();
-// }
-// hotmenu OSCCLK_x9_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 9;      /* CLKIN = (OSCCLK * 9)/1 */
-//     PLL_Wait();
-// }
-// hotmenu OSCCLK_x10_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 10;     /* CLKIN = (OSCCLK * 10)/1 */
-//     PLL_Wait();
-// }
-
-
-
-/********************************************************************/
-/* For F2833x devices, DIVSEL is 1/4 by default.  Switch it to 1/2  */
-/********************************************************************/
-
-DIVSEL_div2()
-{
-    int temp;
-    int PLLSTS;
-
-    PLLSTS = 0x7011;
-
-    temp  = *PLLSTS; 
-    temp &=  0xFE7F;   /* Clear bits 7 & 8 */
-    temp |= 2 << 7;    /* Set bit 8        */
-    *PLLSTS = temp;    /* Switch to 1/2    */
-}
-
-
-
-/********************************************************************/
-/* For F2833x devices, DIVSEL is 1/4 by default.  Switch it to /1   */
-/********************************************************************/
-
-DIVSEL_div1()
-{
-    int temp;
-    int PLLSTS;
-
-    PLLSTS = 0x7011;
-    
-    DIVSEL_div2();     /* First switch DIVSEL to 1/2 and wait */
-    wait();  
-    temp  = *PLLSTS; 
-    temp |= 3 << 7;    /* Set bits 7 & 8   */
-    *PLLSTS = temp;    /* Switch to 1/2    */
-}
-
-wait()
-{
-    int delay = 0;
-    for (delay = 0; delay <= 5; delay ++)
-    {}
-}
-
-/********************************************************************/
-/* For F2833x devices, check the PLLOCKS bit for PLL lock.          */
-/********************************************************************/
-PLL_Wait()
-{
-    int PLLSTS;
-    int delay = 0;
-
-    PLLSTS = 0x7011;
-    
-    
-    while ( ( (unsigned int)*PLLSTS & 0x0001) != 0x0001)
-    {
-        delay++;
-        GEL_TextOut("Waiting for PLL Lock, PLLSTS = %x\n",,,,,(unsigned int)*PLLSTS);
-    }
-    GEL_TextOut("\nPLL lock complete, PLLSTS = %x\n",,,,,(unsigned int)*PLLSTS);
-}
-
-/********************************************************************/
-/* Load the ADC Calibration values from TI OTP                      */
-/********************************************************************/
-menuitem "ADC Calibration"
-hotmenu ADC_Cal()
-{
-    /* Perform dummy reads of the password locations */
-    XAR0 = *0x33FFF8;
-    XAR0 = *0x33FFF9;
-    XAR0 = *0x33FFFA;
-    XAR0 = *0x33FFFB;
-    XAR0 = *0x33FFFC;
-    XAR0 = *0x33FFFD;
-    XAR0 = *0x33FFFE;
-    XAR0 = *0x33FFFF;
-
-    if(((*0x0AEF) & 0x0001) == 0)
-    {
-        XAR0 = *0x701C;
-        *0x701C |= 0x0008;  
-	*0x711C = *0x380083;
-        *0x711D = *0x380085;
-        *0x701C = XAR0;
-	XAR0 = 0;
-    } 
-    else
-    {
-        GEL_TextOut("\nADC Calibration not complete, device is secure"); 
-    }
-}
-
-/********************************************************************/
-/* Enable the XINTF and configure GPIOs for XINTF function          */
-/********************************************************************/
-menuitem "XINTF Enable"
-hotmenu XINTF_Enable()
-{
-
-   /* enable XINTF clock (XTIMCLK) */
-
-   *0x7020 = 0x3700;                          
-   /* GPBMUX1: XA0-XA7, XA16, XZCS0,        */
-   /*          XZCS7, XREADY, XRNW, XWE0    */
-   /* GPAMUX2: XA17-XA19, XZCS6             */
-   /* GPCMUX2: XA8-XA15                     */         
-   /* GPCMUX1: XD0-XD15                     */
-   *(unsigned long *)0x6F96 = 0xFFFFFFC0;   /* GPBMUX1 */
-   *(unsigned long *)0x6f88 = 0xFF000000;   /* GPAMUX2 */  
-   *(unsigned long *)0x6FA8 = 0x0000AAAA;   /* GPCMUX2 */  
-   *(unsigned long *)0x6FA6 = 0xAAAAAAAA;   /* GPCMUX1 */
-
-   /* Uncomment for x32 data bus            */
-   /* GPBMUX2: XD16-XD31                    */
-// *(unsigned long *)0x6F98 = 0xFFFFFFFF;   /* GPBMUX2 */ 
-   
-   /* Zone timing.  
-   /* Each zone can be configured seperately */
-   /* Uncomment the x16 or the x32 timing    */
-   /* depending on the data bus width for    */
-   /* the zone                               */
-
-   /* x16 Timing */
-   *(unsigned long *)0x0B20 = 0x0043FFFF;    /* Zone0 */
-   *(unsigned long *)0x0B2C = 0x0043FFFF;    /* Zone6 */
-   *(unsigned long *)0x0B2E = 0x0043FFFF;    /* Zone7 */
-
-   /* x32 Timing:
-// *(unsigned long *)0x0B20 = 0x0041FFFF;    /* x32 */
-// *(unsigned long *)0x0B2C = 0x0041FFFF;    /* x32 */
-// *(unsigned long *)0x0B2E = 0x0041FFFF;    /* x32 */
- 
-}
-
-/********************************************************************/
-/* The below are used to display the symbolic names of the F28334   */
-/* memory mapped registers in the watch window. To view these       */
-/* registers, click on the GEL menu button in Code Composer Studio, */
-/* then select which registers or groups of registers you want to   */
-/* view. They will appear in the watch window under the Watch1 tab. */
-/********************************************************************/
-
-/* Add a space line to the GEL menu */
-menuitem "______________________________________";
-hotmenu __() {}
-
-/********************************************************************/
-/* A/D Converter Registers                                          */
-/********************************************************************/
-menuitem "Watch ADC Registers";
-
-hotmenu All_ADC_Regs()
-{
-    GEL_WatchAdd("*0x7100,x","ADCTRL1");
-    GEL_WatchAdd("*0x7101,x","ADCTRL2");
-    GEL_WatchAdd("*0x7102,x","ADCMAXCONV");
-    GEL_WatchAdd("*0x7103,x","ADCCHSELSEQ1");
-    GEL_WatchAdd("*0x7104,x","ADCCHSELSEQ2");
-    GEL_WatchAdd("*0x7105,x","ADCCHSELSEQ3");
-    GEL_WatchAdd("*0x7106,x","ADCCHSELSEQ4");
-    GEL_WatchAdd("*0x7107,x","ADCASEQSR");
-    GEL_WatchAdd("*0x7108,x","ADCRESULT0");
-    GEL_WatchAdd("*0x7109,x","ADCRESULT1");
-    GEL_WatchAdd("*0x710A,x","ADCRESULT2");
-    GEL_WatchAdd("*0x710B,x","ADCRESULT3");
-    GEL_WatchAdd("*0x710C,x","ADCRESULT4");
-    GEL_WatchAdd("*0x710D,x","ADCRESULT5");
-    GEL_WatchAdd("*0x710E,x","ADCRESULT6");
-    GEL_WatchAdd("*0x710F,x","ADCRESULT7");
-    GEL_WatchAdd("*0x7110,x","ADCRESULT8");
-    GEL_WatchAdd("*0x7111,x","ADCRESULT9");
-    GEL_WatchAdd("*0x7112,x","ADCRESULT10");
-    GEL_WatchAdd("*0x7113,x","ADCRESULT11");
-    GEL_WatchAdd("*0x7114,x","ADCRESULT12");
-    GEL_WatchAdd("*0x7115,x","ADCRESULT13");
-    GEL_WatchAdd("*0x7116,x","ADCRESULT14");
-    GEL_WatchAdd("*0x7117,x","ADCRESULT15");
-    GEL_WatchAdd("*0x7118,x","ADCTRL3");
-    GEL_WatchAdd("*0x7119,x","ADCST");
-    GEL_WatchAdd("*0x711C,x","ADCREFSEL");
-    GEL_WatchAdd("*0x711D,x","ADCOFFTRIM");
-
-    GEL_WatchAdd("*0x0B00,x","ADCRESULT0 Mirror");
-    GEL_WatchAdd("*0x0B01,x","ADCRESULT1 Mirror");
-    GEL_WatchAdd("*0x0B02,x","ADCRESULT2 Mirror");
-    GEL_WatchAdd("*0x0B03,x","ADCRESULT3 Mirror");
-    GEL_WatchAdd("*0x0B04,x","ADCRESULT4 Mirror");
-    GEL_WatchAdd("*0x0B05,x","ADCRESULT5 Mirror");
-    GEL_WatchAdd("*0x0B06,x","ADCRESULT6 Mirror");
-    GEL_WatchAdd("*0x0B07,x","ADCRESULT7 Mirror");
-    GEL_WatchAdd("*0x0B08,x","ADCRESULT8 Mirror");
-    GEL_WatchAdd("*0x0B09,x","ADCRESULT9 Mirror");
-    GEL_WatchAdd("*0x0B0A,x","ADCRESULT10 Mirror");
-    GEL_WatchAdd("*0x0B0B,x","ADCRESULT11 Mirror");
-    GEL_WatchAdd("*0x0B0C,x","ADCRESULT12 Mirror");
-    GEL_WatchAdd("*0x0B0D,x","ADCRESULT13 Mirror");
-    GEL_WatchAdd("*0x0B0E,x","ADCRESULT14 Mirror");
-    GEL_WatchAdd("*0x0B0F,x","ADCRESULT15 Mirror");
-}
-hotmenu ADC_Control_Regs()
-{
-    GEL_WatchAdd("*0x7100,x","ADCTRL1");
-    GEL_WatchAdd("*0x7101,x","ADCTRL2");
-    GEL_WatchAdd("*0x7102,x","ADCMAXCONV");
-    GEL_WatchAdd("*0x7107,x","ADCASEQSR");
-    GEL_WatchAdd("*0x7118,x","ADCTRL3");
-    GEL_WatchAdd("*0x7119,x","ADCST");
-    GEL_WatchAdd("*0x711C,x","ADCREFSEL");
-    GEL_WatchAdd("*0x711D,x","ADCOFFTRIM");
-}
-hotmenu ADCCHSELSEQx_Regs()
-{
-    GEL_WatchAdd("*0x7103,x","ADCCHSELSEQ1");
-    GEL_WatchAdd("*0x7104,x","ADCCHSELSEQ2");
-    GEL_WatchAdd("*0x7105,x","ADCCHSELSEQ3");
-    GEL_WatchAdd("*0x7106,x","ADCCHSELSEQ4");
-}
-hotmenu ADCRESULT_0_to_7()
-{
-    GEL_WatchAdd("*0x7108,x","ADCRESULT0");
-    GEL_WatchAdd("*0x7109,x","ADCRESULT1");
-    GEL_WatchAdd("*0x710A,x","ADCRESULT2");
-    GEL_WatchAdd("*0x710B,x","ADCRESULT3");
-    GEL_WatchAdd("*0x710C,x","ADCRESULT4");
-    GEL_WatchAdd("*0x710D,x","ADCRESULT5");
-    GEL_WatchAdd("*0x710E,x","ADCRESULT6");
-    GEL_WatchAdd("*0x710F,x","ADCRESULT7");
-}
-hotmenu ADCRESULT_8_to_15()
-{
-    GEL_WatchAdd("*0x7110,x","ADCRESULT8");
-    GEL_WatchAdd("*0x7111,x","ADCRESULT9");
-    GEL_WatchAdd("*0x7112,x","ADCRESULT10");
-    GEL_WatchAdd("*0x7113,x","ADCRESULT11");
-    GEL_WatchAdd("*0x7114,x","ADCRESULT12");
-    GEL_WatchAdd("*0x7115,x","ADCRESULT13");
-    GEL_WatchAdd("*0x7116,x","ADCRESULT14");
-    GEL_WatchAdd("*0x7117,x","ADCRESULT15");
-}
-hotmenu ADCRESULT_Mirror_0_to_7()
-{
-    GEL_WatchAdd("*0x0B00,x","ADCRESULT0 Mirror");
-    GEL_WatchAdd("*0x0B01,x","ADCRESULT1 Mirror");
-    GEL_WatchAdd("*0x0B02,x","ADCRESULT2 Mirror");
-    GEL_WatchAdd("*0x0B03,x","ADCRESULT3 Mirror");
-    GEL_WatchAdd("*0x0B04,x","ADCRESULT4 Mirror");
-    GEL_WatchAdd("*0x0B05,x","ADCRESULT5 Mirror");
-    GEL_WatchAdd("*0x0B06,x","ADCRESULT6 Mirror");
-    GEL_WatchAdd("*0x0B07,x","ADCRESULT7 Mirror");
-}
-hotmenu ADCRESULT_Mirror_8_to_15()
-{
-    GEL_WatchAdd("*0x0B08,x","ADCRESULT8 Mirror");
-    GEL_WatchAdd("*0x0B09,x","ADCRESULT9 Mirror");
-    GEL_WatchAdd("*0x0B0A,x","ADCRESULT10 Mirror");
-    GEL_WatchAdd("*0x0B0B,x","ADCRESULT11 Mirror");
-    GEL_WatchAdd("*0x0B0C,x","ADCRESULT12 Mirror");
-    GEL_WatchAdd("*0x0B0D,x","ADCRESULT13 Mirror");
-    GEL_WatchAdd("*0x0B0E,x","ADCRESULT14 Mirror");
-    GEL_WatchAdd("*0x0B0F,x","ADCRESULT15 Mirror");
-}
-
-
-/********************************************************************/
-/* Clocking and Low-Power Registers                                 */
-/********************************************************************/
-menuitem "Watch Clocking and Low-Power Registers";
-
-hotmenu All_Clocking_and_Low_Power_Regs()
-{
-    GEL_WatchAdd("*0x7010,x","XCLK");
-    GEL_WatchAdd("*0x7011,x","PLLSTS");
-    GEL_WatchAdd("*0x701A,x","HISPCP");
-    GEL_WatchAdd("*0x701B,x","LOSPCP");
-    GEL_WatchAdd("*0x701C,x","PCLKCR0");
-    GEL_WatchAdd("*0x701D,x","PCLKCR1");
-    GEL_WatchAdd("*0x701E,x","LPMCR0");
-    GEL_WatchAdd("*0x7020,x","PCLKCR3");
-    GEL_WatchAdd("*0x7021,x","PLLCR");
-}
-
-/********************************************************************/
-/* Code Security Module Registers                                   */
-/********************************************************************/
-menuitem "Watch Code Security Module Registers";
-
-hotmenu CSMSCR()
-{
-    GEL_WatchAdd("*0x0AEF,x","CSMSCR");
-    GEL_WatchAdd("(*0x0AEF>>15)&1,d"," FORCESEC bit");
-    GEL_WatchAdd("(*0x0AEF)&1,d","     SECURE bit");
-}
-hotmenu PWL_Locations()
-{
-    GEL_WatchAdd("*0x33FFF8,x","PWL0");
-    GEL_WatchAdd("*0x33FFF9,x","PWL1");
-    GEL_WatchAdd("*0x33FFFA,x","PWL2");
-    GEL_WatchAdd("*0x33FFFB,x","PWL3");
-    GEL_WatchAdd("*0x33FFFC,x","PWL4");
-    GEL_WatchAdd("*0x33FFFD,x","PWL5");
-    GEL_WatchAdd("*0x33FFFE,x","PWL6");
-    GEL_WatchAdd("*0x33FFFF,x","PWL7");
-}
-
-
-/********************************************************************/
-/* CPU Timer Registers                                              */
-/********************************************************************/
-menuitem "Watch CPU Timer Registers";
-
-hotmenu All_CPU_Timer0_Regs()
-{
-    GEL_WatchAdd("*0x0C00,x","TIMER0TIM");
-    GEL_WatchAdd("*0x0C01,x","TIMER0TIMH");
-    GEL_WatchAdd("*0x0C02,x","TIMER0PRD");
-    GEL_WatchAdd("*0x0C03,x","TIMER0PRDH");
-    GEL_WatchAdd("*0x0C04,x","TIMER0TCR");
-    GEL_WatchAdd("*0x0C06,x","TIMER0TPR");
-    GEL_WatchAdd("*0x0C07,x","TIMER0TPRH");
-}
-hotmenu All_CPU_Timer1_Regs()
-{
-    GEL_WatchAdd("*0x0C08,x","TIMER1TIM");
-    GEL_WatchAdd("*0x0C09,x","TIMER1TIMH");
-    GEL_WatchAdd("*0x0C0A,x","TIMER1PRD");
-    GEL_WatchAdd("*0x0C0B,x","TIMER1PRDH");
-    GEL_WatchAdd("*0x0C0C,x","TIMER1TCR");
-    GEL_WatchAdd("*0x0C0E,x","TIMER1TPR");
-    GEL_WatchAdd("*0x0C0F,x","TIMER1TPRH");
-}
-hotmenu All_CPU_Timer2_Regs()
-{
-    GEL_WatchAdd("*0x0C10,x","TIMER2TIM");
-    GEL_WatchAdd("*0x0C11,x","TIMER2TIMH");
-    GEL_WatchAdd("*0x0C12,x","TIMER2PRD");
-    GEL_WatchAdd("*0x0C13,x","TIMER2PRDH");
-    GEL_WatchAdd("*0x0C14,x","TIMER2TCR");
-    GEL_WatchAdd("*0x0C16,x","TIMER2TPR");
-    GEL_WatchAdd("*0x0C17,x","TIMER2TPRH");
-}
-
-
-/********************************************************************/
-/* Device Emulation Registers                                       */
-/********************************************************************/
-menuitem "Watch Device Emulation Registers";
-
-hotmenu All_Emulation_Regs()
-{
-    GEL_WatchAdd("*(long *)0x0880,x","DEVICECNF");
-    GEL_WatchAdd("*0x0882,x","CLASSID");
-    GEL_WatchAdd("*0x0883,x","REVID");
-    GEL_WatchAdd("*0x0884,x","PROTSTART");
-    GEL_WatchAdd("*0x0885,x","PROTRANGE");
-    GEL_WatchAdd("*0x380090,x","PARTID");    
-}
-
-/********************************************************************/
-/* DMA Registers                                                    */
-/********************************************************************/
-menuitem "Watch DMA Registers";
-
-hotmenu All_DMA_Regs()
-{
-    GEL_WatchAdd("*0x1000,x","DMACTRL");
-    GEL_WatchAdd("*0x1001,x","DEBUGCTRL");
-    GEL_WatchAdd("*0x1002,x","REVISION");
-    GEL_WatchAdd("*0x1004,x","PRIORITYCTRL1");
-    GEL_WatchAdd("*0x1006,x","PRIORITYSTAT");
-
-    GEL_WatchAdd("*0x1020,x","DMA Ch1 MODE");
-    GEL_WatchAdd("*0x1021,x","DMA Ch1 CONTROL");
-    GEL_WatchAdd("*0x1022,x","DMA Ch1 BURST_SIZE");
-    GEL_WatchAdd("*0x1023,x","DMA Ch1 BURST_COUNT");
-    GEL_WatchAdd("*0x1024,x","DMA Ch1 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x1025,x","DMA Ch1 DST_BURST_STEP");
-    GEL_WatchAdd("*0x1026,x","DMA Ch1 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x1027,x","DMA Ch1 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x1028,x","DMA Ch1 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x1029,x","DMA Ch1 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x102A,x","DMA Ch1 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x102B,x","DMA Ch1 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x102C,x","DMA Ch1 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x102D,x","DMA Ch1 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x102E,x","DMA Ch1 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x102F,x","DMA Ch1 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x1030,x","DMA Ch1 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1032,x","DMA Ch1 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1034,x","DMA Ch1 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1036,x","DMA Ch1 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1038,x","DMA Ch1 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x103A,x","DMA Ch1 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x103C,x","DMA Ch1 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x103E,x","DMA Ch1 DST_ADDR_ACTIVE");
-
-    GEL_WatchAdd("*0x1040,x","DMA Ch2 MODE");
-    GEL_WatchAdd("*0x1041,x","DMA Ch2 CONTROL");
-    GEL_WatchAdd("*0x1042,x","DMA Ch2 BURST_SIZE");
-    GEL_WatchAdd("*0x1043,x","DMA Ch2 BURST_COUNT");
-    GEL_WatchAdd("*0x1044,x","DMA Ch2 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x1045,x","DMA Ch2 DST_BURST_STEP");
-    GEL_WatchAdd("*0x1046,x","DMA Ch2 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x1047,x","DMA Ch2 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x1048,x","DMA Ch2 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x1049,x","DMA Ch2 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x104A,x","DMA Ch2 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x104B,x","DMA Ch2 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x104C,x","DMA Ch2 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x104D,x","DMA Ch2 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x104E,x","DMA Ch2 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x104F,x","DMA Ch2 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x1050,x","DMA Ch2 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1052,x","DMA Ch2 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1054,x","DMA Ch2 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1056,x","DMA Ch2 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1058,x","DMA Ch2 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x105A,x","DMA Ch2 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x105C,x","DMA Ch2 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x105E,x","DMA Ch2 DST_ADDR_ACTIVE");
-
-    GEL_WatchAdd("*0x1060,x","DMA Ch3 MODE");
-    GEL_WatchAdd("*0x1061,x","DMA Ch3 CONTROL");
-    GEL_WatchAdd("*0x1062,x","DMA Ch3 BURST_SIZE");
-    GEL_WatchAdd("*0x1063,x","DMA Ch3 BURST_COUNT");
-    GEL_WatchAdd("*0x1064,x","DMA Ch3 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x1065,x","DMA Ch3 DST_BURST_STEP");
-    GEL_WatchAdd("*0x1066,x","DMA Ch3 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x1067,x","DMA Ch3 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x1068,x","DMA Ch3 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x1069,x","DMA Ch3 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x106A,x","DMA Ch3 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x106B,x","DMA Ch3 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x106C,x","DMA Ch3 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x106D,x","DMA Ch3 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x106E,x","DMA Ch3 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x106F,x","DMA Ch3 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x1070,x","DMA Ch3 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1072,x","DMA Ch3 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1074,x","DMA Ch3 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1076,x","DMA Ch3 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1078,x","DMA Ch3 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x107A,x","DMA Ch3 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x107C,x","DMA Ch3 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x107E,x","DMA Ch3 DST_ADDR_ACTIVE");
-
-    GEL_WatchAdd("*0x1080,x","DMA Ch4 MODE");
-    GEL_WatchAdd("*0x1081,x","DMA Ch4 CONTROL");
-    GEL_WatchAdd("*0x1082,x","DMA Ch4 BURST_SIZE");
-    GEL_WatchAdd("*0x1083,x","DMA Ch4 BURST_COUNT");
-    GEL_WatchAdd("*0x1084,x","DMA Ch4 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x1085,x","DMA Ch4 DST_BURST_STEP");
-    GEL_WatchAdd("*0x1086,x","DMA Ch4 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x1087,x","DMA Ch4 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x1088,x","DMA Ch4 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x1089,x","DMA Ch4 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x108A,x","DMA Ch4 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x108B,x","DMA Ch4 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x108C,x","DMA Ch4 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x108D,x","DMA Ch4 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x108E,x","DMA Ch4 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x108F,x","DMA Ch4 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x1090,x","DMA Ch4 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1092,x","DMA Ch4 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1094,x","DMA Ch4 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1096,x","DMA Ch4 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1098,x","DMA Ch4 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x109A,x","DMA Ch4 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x109C,x","DMA Ch4 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x109E,x","DMA Ch4 DST_ADDR_ACTIVE");
-
-    GEL_WatchAdd("*0x10A0,x","DMA Ch5 MODE");
-    GEL_WatchAdd("*0x10A1,x","DMA Ch5 CONTROL");
-    GEL_WatchAdd("*0x10A2,x","DMA Ch5 BURST_SIZE");
-    GEL_WatchAdd("*0x10A3,x","DMA Ch5 BURST_COUNT");
-    GEL_WatchAdd("*0x10A4,x","DMA Ch5 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x10A5,x","DMA Ch5 DST_BURST_STEP");
-    GEL_WatchAdd("*0x10A6,x","DMA Ch5 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x10A7,x","DMA Ch5 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x10A8,x","DMA Ch5 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x10A9,x","DMA Ch5 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x10AA,x","DMA Ch5 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x10AB,x","DMA Ch5 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x10AC,x","DMA Ch5 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x10AD,x","DMA Ch5 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x10AE,x","DMA Ch5 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x10AF,x","DMA Ch5 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x10B0,x","DMA Ch5 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10B2,x","DMA Ch5 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10B4,x","DMA Ch5 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10B6,x","DMA Ch5 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10B8,x","DMA Ch5 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10BA,x","DMA Ch5 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10BC,x","DMA Ch5 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10BE,x","DMA Ch5 DST_ADDR_ACTIVE");
-
-    GEL_WatchAdd("*0x10C0,x","DMA Ch6 MODE");
-    GEL_WatchAdd("*0x10C1,x","DMA Ch6 CONTROL");
-    GEL_WatchAdd("*0x10C2,x","DMA Ch6 BURST_SIZE");
-    GEL_WatchAdd("*0x10C3,x","DMA Ch6 BURST_COUNT");
-    GEL_WatchAdd("*0x10C4,x","DMA Ch6 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x10C5,x","DMA Ch6 DST_BURST_STEP");
-    GEL_WatchAdd("*0x10C6,x","DMA Ch6 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x10C7,x","DMA Ch6 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x10C8,x","DMA Ch6 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x10C9,x","DMA Ch6 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x10CA,x","DMA Ch6 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x10CB,x","DMA Ch6 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x10CC,x","DMA Ch6 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x10CD,x","DMA Ch6 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x10CE,x","DMA Ch6 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x10CF,x","DMA Ch6 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x10D0,x","DMA Ch6 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10D2,x","DMA Ch6 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10D4,x","DMA Ch6 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10D6,x","DMA Ch6 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10D8,x","DMA Ch6 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10DA,x","DMA Ch6 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10DC,x","DMA Ch6 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10DE,x","DMA Ch6 DST_ADDR_ACTIVE");
-
-
-}
-hotmenu DMA_Channel_1_regs()
-{
-    GEL_WatchAdd("*0x1020,x","DMA Ch1 MODE");
-    GEL_WatchAdd("*0x1021,x","DMA Ch1 CONTROL");
-    GEL_WatchAdd("*0x1022,x","DMA Ch1 BURST_SIZE");
-    GEL_WatchAdd("*0x1023,x","DMA Ch1 BURST_COUNT");
-    GEL_WatchAdd("*0x1024,x","DMA Ch1 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x1025,x","DMA Ch1 DST_BURST_STEP");
-    GEL_WatchAdd("*0x1026,x","DMA Ch1 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x1027,x","DMA Ch1 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x1028,x","DMA Ch1 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x1029,x","DMA Ch1 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x102A,x","DMA Ch1 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x102B,x","DMA Ch1 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x102C,x","DMA Ch1 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x102D,x","DMA Ch1 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x102E,x","DMA Ch1 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x102F,x","DMA Ch1 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x1030,x","DMA Ch1 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1032,x","DMA Ch1 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1034,x","DMA Ch1 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1036,x","DMA Ch1 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1038,x","DMA Ch1 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x103A,x","DMA Ch1 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x103C,x","DMA Ch1 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x103E,x","DMA Ch1 DST_ADDR_ACTIVE");
-}
-
-hotmenu DMA_Channel_2_regs()
-{
-    GEL_WatchAdd("*0x1040,x","DMA Ch2 MODE");
-    GEL_WatchAdd("*0x1041,x","DMA Ch2 CONTROL");
-    GEL_WatchAdd("*0x1042,x","DMA Ch2 BURST_SIZE");
-    GEL_WatchAdd("*0x1043,x","DMA Ch2 BURST_COUNT");
-    GEL_WatchAdd("*0x1044,x","DMA Ch2 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x1045,x","DMA Ch2 DST_BURST_STEP");
-    GEL_WatchAdd("*0x1046,x","DMA Ch2 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x1047,x","DMA Ch2 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x1048,x","DMA Ch2 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x1049,x","DMA Ch2 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x104A,x","DMA Ch2 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x104B,x","DMA Ch2 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x104C,x","DMA Ch2 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x104D,x","DMA Ch2 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x104E,x","DMA Ch2 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x104F,x","DMA Ch2 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x1050,x","DMA Ch2 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1052,x","DMA Ch2 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1054,x","DMA Ch2 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1056,x","DMA Ch2 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1058,x","DMA Ch2 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x105A,x","DMA Ch2 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x105C,x","DMA Ch2 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x105E,x","DMA Ch2 DST_ADDR_ACTIVE");
-}
-hotmenu DMA_Channel_3_regs()
-{
-    GEL_WatchAdd("*0x1060,x","DMA Ch3 MODE");
-    GEL_WatchAdd("*0x1061,x","DMA Ch3 CONTROL");
-    GEL_WatchAdd("*0x1062,x","DMA Ch3 BURST_SIZE");
-    GEL_WatchAdd("*0x1063,x","DMA Ch3 BURST_COUNT");
-    GEL_WatchAdd("*0x1064,x","DMA Ch3 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x1065,x","DMA Ch3 DST_BURST_STEP");
-    GEL_WatchAdd("*0x1066,x","DMA Ch3 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x1067,x","DMA Ch3 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x1068,x","DMA Ch3 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x1069,x","DMA Ch3 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x106A,x","DMA Ch3 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x106B,x","DMA Ch3 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x106C,x","DMA Ch3 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x106D,x","DMA Ch3 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x106E,x","DMA Ch3 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x106F,x","DMA Ch3 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x1070,x","DMA Ch3 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1072,x","DMA Ch3 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1074,x","DMA Ch3 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1076,x","DMA Ch3 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1078,x","DMA Ch3 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x107A,x","DMA Ch3 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x107C,x","DMA Ch3 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x107E,x","DMA Ch3 DST_ADDR_ACTIVE");
-}
-hotmenu DMA_Channel_4_regs()
-{
-    GEL_WatchAdd("*0x1080,x","DMA Ch4 MODE");
-    GEL_WatchAdd("*0x1081,x","DMA Ch4 CONTROL");
-    GEL_WatchAdd("*0x1082,x","DMA Ch4 BURST_SIZE");
-    GEL_WatchAdd("*0x1083,x","DMA Ch4 BURST_COUNT");
-    GEL_WatchAdd("*0x1084,x","DMA Ch4 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x1085,x","DMA Ch4 DST_BURST_STEP");
-    GEL_WatchAdd("*0x1086,x","DMA Ch4 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x1087,x","DMA Ch4 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x1088,x","DMA Ch4 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x1089,x","DMA Ch4 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x108A,x","DMA Ch4 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x108B,x","DMA Ch4 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x108C,x","DMA Ch4 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x108D,x","DMA Ch4 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x108E,x","DMA Ch4 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x108F,x","DMA Ch4 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x1090,x","DMA Ch4 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1092,x","DMA Ch4 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1094,x","DMA Ch4 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1096,x","DMA Ch4 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1098,x","DMA Ch4 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x109A,x","DMA Ch4 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x109C,x","DMA Ch4 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x109E,x","DMA Ch4 DST_ADDR_ACTIVE");
-}
-hotmenu DMA_Channel_5_regs()
-{
-    GEL_WatchAdd("*0x10A0,x","DMA Ch5 MODE");
-    GEL_WatchAdd("*0x10A1,x","DMA Ch5 CONTROL");
-    GEL_WatchAdd("*0x10A2,x","DMA Ch5 BURST_SIZE");
-    GEL_WatchAdd("*0x10A3,x","DMA Ch5 BURST_COUNT");
-    GEL_WatchAdd("*0x10A4,x","DMA Ch5 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x10A5,x","DMA Ch5 DST_BURST_STEP");
-    GEL_WatchAdd("*0x10A6,x","DMA Ch5 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x10A7,x","DMA Ch5 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x10A8,x","DMA Ch5 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x10A9,x","DMA Ch5 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x10AA,x","DMA Ch5 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x10AB,x","DMA Ch5 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x10AC,x","DMA Ch5 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x10AD,x","DMA Ch5 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x10AE,x","DMA Ch5 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x10AF,x","DMA Ch5 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x10B0,x","DMA Ch5 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10B2,x","DMA Ch5 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10B4,x","DMA Ch5 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10B6,x","DMA Ch5 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10B8,x","DMA Ch5 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10BA,x","DMA Ch5 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10BC,x","DMA Ch5 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10BE,x","DMA Ch5 DST_ADDR_ACTIVE");
-}
-hotmenu DMA_Channel_6_regs()
-{
-    GEL_WatchAdd("*0x10C0,x","DMA Ch6 MODE");
-    GEL_WatchAdd("*0x10C1,x","DMA Ch6 CONTROL");
-    GEL_WatchAdd("*0x10C2,x","DMA Ch6 BURST_SIZE");
-    GEL_WatchAdd("*0x10C3,x","DMA Ch6 BURST_COUNT");
-    GEL_WatchAdd("*0x10C4,x","DMA Ch6 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x10C5,x","DMA Ch6 DST_BURST_STEP");
-    GEL_WatchAdd("*0x10C6,x","DMA Ch6 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x10C7,x","DMA Ch6 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x10C8,x","DMA Ch6 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x10C9,x","DMA Ch6 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x10CA,x","DMA Ch6 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x10CB,x","DMA Ch6 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x10CC,x","DMA Ch6 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x10CD,x","DMA Ch6 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x10CE,x","DMA Ch6 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x10CF,x","DMA Ch6 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x10D0,x","DMA Ch6 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10D2,x","DMA Ch6 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10D4,x","DMA Ch6 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10D6,x","DMA Ch6 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10D8,x","DMA Ch6 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10DA,x","DMA Ch6 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10DC,x","DMA Ch6 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10DE,x","DMA Ch6 DST_ADDR_ACTIVE");
-}
-
-/********************************************************************/
-/* eCAN Registers                                                   */
-/********************************************************************/
-menuitem "Watch eCAN Registers";
-
-hotmenu eCAN_A_Global_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6000,x","eCANA CANME");
-    GEL_WatchAdd("*(long *)0x6002,x","eCANA CANMD");
-    GEL_WatchAdd("*(long *)0x6004,x","eCANA CANTRS");
-    GEL_WatchAdd("*(long *)0x6006,x","eCANA CANTRR");
-    GEL_WatchAdd("*(long *)0x6008,x","eCANA CANTA");
-    GEL_WatchAdd("*(long *)0x600A,x","eCANA CANAA");
-    GEL_WatchAdd("*(long *)0x600C,x","eCANA CANRMP");
-    GEL_WatchAdd("*(long *)0x600E,x","eCANA CANRML");
-    GEL_WatchAdd("*(long *)0x6010,x","eCANA CANRFP");
-    GEL_WatchAdd("*(long *)0x6014,x","eCANA CANMC");
-    GEL_WatchAdd("*(long *)0x6016,x","eCANA CANBTC");
-    GEL_WatchAdd("*(long *)0x6018,x","eCANA CANES");
-    GEL_WatchAdd("*(long *)0x601A,x","eCANA CANTEC");
-    GEL_WatchAdd("*(long *)0x601C,x","eCANA CANREC");
-    GEL_WatchAdd("*(long *)0x601E,x","eCANA CANGIF0");
-    GEL_WatchAdd("*(long *)0x6020,x","eCANA CANGIM");
-    GEL_WatchAdd("*(long *)0x6022,x","eCANA CANGIF1");
-    GEL_WatchAdd("*(long *)0x6024,x","eCANA CANMIM");
-    GEL_WatchAdd("*(long *)0x6026,x","eCANA CANMIL");
-    GEL_WatchAdd("*(long *)0x6028,x","eCANA CANOPC");
-    GEL_WatchAdd("*(long *)0x602A,x","eCANA CANTIOC");
-    GEL_WatchAdd("*(long *)0x602C,x","eCANA CANRIOC");
-    GEL_WatchAdd("*(long *)0x602E,x","eCANA CANLNT");
-    GEL_WatchAdd("*(long *)0x6030,x","eCANA CANTOC");
-    GEL_WatchAdd("*(long *)0x6032,x","eCANA CANTOS");
-}
-hotmenu eCAN_A_Mailbox_0_to_1_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6040,x","eCANA LAM0");
-    GEL_WatchAdd("*(long *)0x6080,x","eCANA MOTS0");
-    GEL_WatchAdd("*(long *)0x60C0,x","eCANA MOTO0");
-    GEL_WatchAdd("*(long *)0x6100,x","eCANA MID0");
-    GEL_WatchAdd("*(long *)0x6102,x","eCANA MCF0");
-    GEL_WatchAdd("*(long *)0x6104,x","eCANA MDL0");
-    GEL_WatchAdd("*(long *)0x6106,x","eCANA MDH0");
-    
-    GEL_WatchAdd("*(long *)0x6042,x","eCANA LAM1");
-    GEL_WatchAdd("*(long *)0x6082,x","eCANA MOTS1");
-    GEL_WatchAdd("*(long *)0x60C2,x","eCANA MOTO1");
-    GEL_WatchAdd("*(long *)0x6108,x","eCANA MID1");
-    GEL_WatchAdd("*(long *)0x610A,x","eCANA MCF1");
-    GEL_WatchAdd("*(long *)0x610C,x","eCANA MDL1");
-    GEL_WatchAdd("*(long *)0x610E,x","eCANA MDH1");
-}
-hotmenu eCAN_A_Mailbox_2_to_3_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6044,x","eCANA LAM2");
-    GEL_WatchAdd("*(long *)0x6084,x","eCANA MOTS2");
-    GEL_WatchAdd("*(long *)0x60C4,x","eCANA MOTO2");
-    GEL_WatchAdd("*(long *)0x6110,x","eCANA MID2");
-    GEL_WatchAdd("*(long *)0x6112,x","eCANA MCF2");
-    GEL_WatchAdd("*(long *)0x6114,x","eCANA MDL2");
-    GEL_WatchAdd("*(long *)0x6116,x","eCANA MDH2");
-
-    GEL_WatchAdd("*(long *)0x6046,x","eCANA LAM3");
-    GEL_WatchAdd("*(long *)0x6086,x","eCANA MOTS3");
-    GEL_WatchAdd("*(long *)0x60C6,x","eCANA MOTO3");
-    GEL_WatchAdd("*(long *)0x6118,x","eCANA MID3");
-    GEL_WatchAdd("*(long *)0x611A,x","eCANA MCF3");
-    GEL_WatchAdd("*(long *)0x611C,x","eCANA MDL3");
-    GEL_WatchAdd("*(long *)0x611E,x","eCANA MDH3");
-}
-hotmenu eCAN_A_Mailbox_4_to_5_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6048,x","eCANA LAM4");
-    GEL_WatchAdd("*(long *)0x6088,x","eCANA MOTS4");
-    GEL_WatchAdd("*(long *)0x60C8,x","eCANA MOTO4");
-    GEL_WatchAdd("*(long *)0x6120,x","eCANA MID4");
-    GEL_WatchAdd("*(long *)0x6122,x","eCANA MCF4");
-    GEL_WatchAdd("*(long *)0x6124,x","eCANA MDL4");
-    GEL_WatchAdd("*(long *)0x6126,x","eCANA MDH4");
-    
-    GEL_WatchAdd("*(long *)0x604A,x","eCANA LAM5");
-    GEL_WatchAdd("*(long *)0x608A,x","eCANA MOTS5");
-    GEL_WatchAdd("*(long *)0x60CA,x","eCANA MOTO5");
-    GEL_WatchAdd("*(long *)0x6128,x","eCANA MID5");
-    GEL_WatchAdd("*(long *)0x612A,x","eCANA MCF5");
-    GEL_WatchAdd("*(long *)0x612C,x","eCANA MDL5");
-    GEL_WatchAdd("*(long *)0x612E,x","eCANA MDH5");
-}
-hotmenu eCAN_A_Mailbox_6_to_7_Regs()
-{
-    GEL_WatchAdd("*(long *)0x604C,x","eCANA LAM6");
-    GEL_WatchAdd("*(long *)0x608C,x","eCANA MOTS6");
-    GEL_WatchAdd("*(long *)0x60CC,x","eCANA MOTO6");
-    GEL_WatchAdd("*(long *)0x6130,x","eCANA MID6");
-    GEL_WatchAdd("*(long *)0x6132,x","eCANA MCF6");
-    GEL_WatchAdd("*(long *)0x6134,x","eCANA MDL6");
-    GEL_WatchAdd("*(long *)0x6136,x","eCANA MDH6");
-    
-    GEL_WatchAdd("*(long *)0x604E,x","eCANA LAM7");
-    GEL_WatchAdd("*(long *)0x608E,x","eCANA MOTS7");
-    GEL_WatchAdd("*(long *)0x60CE,x","eCANA MOTO7");
-    GEL_WatchAdd("*(long *)0x6138,x","eCANA MID7");
-    GEL_WatchAdd("*(long *)0x613A,x","eCANA MCF7");
-    GEL_WatchAdd("*(long *)0x613C,x","eCANA MDL7");
-    GEL_WatchAdd("*(long *)0x613E,x","eCANA MDH7");
-}
-hotmenu eCAN_A_Mailbox_8_to_9_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6050,x","eCANA LAM8");
-    GEL_WatchAdd("*(long *)0x6090,x","eCANA MOTS8");
-    GEL_WatchAdd("*(long *)0x60D0,x","eCANA MOTO8");
-    GEL_WatchAdd("*(long *)0x6140,x","eCANA MID8");
-    GEL_WatchAdd("*(long *)0x6142,x","eCANA MCF8");
-    GEL_WatchAdd("*(long *)0x6144,x","eCANA MDL8");
-    GEL_WatchAdd("*(long *)0x6146,x","eCANA MDH8");
-
-    GEL_WatchAdd("*(long *)0x6052,x","eCANA LAM9");
-    GEL_WatchAdd("*(long *)0x6092,x","eCANA MOTS9");
-    GEL_WatchAdd("*(long *)0x60D2,x","eCANA MOTO9");
-    GEL_WatchAdd("*(long *)0x6148,x","eCANA MID9");
-    GEL_WatchAdd("*(long *)0x614A,x","eCANA MCF9");
-    GEL_WatchAdd("*(long *)0x614C,x","eCANA MDL9");
-    GEL_WatchAdd("*(long *)0x614E,x","eCANA MDH9");
-}
-hotmenu eCAN_A_Mailbox_10_to_11_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6054,x","eCANA LAM10");
-    GEL_WatchAdd("*(long *)0x6094,x","eCANA MOTS10");
-    GEL_WatchAdd("*(long *)0x60D4,x","eCANA MOTO10");
-    GEL_WatchAdd("*(long *)0x6150,x","eCANA MID10");
-    GEL_WatchAdd("*(long *)0x6152,x","eCANA MCF10");
-    GEL_WatchAdd("*(long *)0x6154,x","eCANA MDL10");
-    GEL_WatchAdd("*(long *)0x6156,x","eCANA MDH10");
-
-    GEL_WatchAdd("*(long *)0x6056,x","eCANA LAM11");
-    GEL_WatchAdd("*(long *)0x6096,x","eCANA MOTS11");
-    GEL_WatchAdd("*(long *)0x60D6,x","eCANA MOTO11");
-    GEL_WatchAdd("*(long *)0x6158,x","eCANA MID11");
-    GEL_WatchAdd("*(long *)0x615A,x","eCANA MCF11");
-    GEL_WatchAdd("*(long *)0x615C,x","eCANA MDL11");
-    GEL_WatchAdd("*(long *)0x615E,x","eCANA MDH11");
-}
-hotmenu eCAN_A_Mailbox_12_to_13_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6058,x","eCANA LAM12");
-    GEL_WatchAdd("*(long *)0x6098,x","eCANA MOTS12");
-    GEL_WatchAdd("*(long *)0x60D8,x","eCANA MOTO12");
-    GEL_WatchAdd("*(long *)0x6160,x","eCANA MID12");
-    GEL_WatchAdd("*(long *)0x6162,x","eCANA MCF12");
-    GEL_WatchAdd("*(long *)0x6164,x","eCANA MDL12");
-    GEL_WatchAdd("*(long *)0x6166,x","eCANA MDH12");
-    
-    GEL_WatchAdd("*(long *)0x605A,x","eCANA LAM13");
-    GEL_WatchAdd("*(long *)0x609A,x","eCANA MOTS13");
-    GEL_WatchAdd("*(long *)0x60DA,x","eCANA MOTO13");
-    GEL_WatchAdd("*(long *)0x6168,x","eCANA MID13");
-    GEL_WatchAdd("*(long *)0x616A,x","eCANA MCF13");
-    GEL_WatchAdd("*(long *)0x616C,x","eCANA MDL13");
-    GEL_WatchAdd("*(long *)0x616E,x","eCANA MDH13");
-}
-hotmenu eCAN_A_Mailbox_14_to_15_Regs()
-{
-    GEL_WatchAdd("*(long *)0x605C,x","eCANA LAM14");
-    GEL_WatchAdd("*(long *)0x609C,x","eCANA MOTS14");
-    GEL_WatchAdd("*(long *)0x60DC,x","eCANA MOTO14");
-    GEL_WatchAdd("*(long *)0x6170,x","eCANA MID14");
-    GEL_WatchAdd("*(long *)0x6172,x","eCANA MCF14");
-    GEL_WatchAdd("*(long *)0x6174,x","eCANA MDL14");
-    GEL_WatchAdd("*(long *)0x6176,x","eCANA MDH14");
-    
-    GEL_WatchAdd("*(long *)0x605E,x","eCANA LAM15");
-    GEL_WatchAdd("*(long *)0x609E,x","eCANA MOTS15");
-    GEL_WatchAdd("*(long *)0x60DE,x","eCANA MOTO15");
-    GEL_WatchAdd("*(long *)0x6178,x","eCANA MID15");
-    GEL_WatchAdd("*(long *)0x617A,x","eCANA MCF15");
-    GEL_WatchAdd("*(long *)0x617C,x","eCANA MDL15");
-    GEL_WatchAdd("*(long *)0x617E,x","eCANA MDH15");
-}
-hotmenu eCAN_A_Mailbox_16_to_17_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6060,x","eCANA LAM16");
-    GEL_WatchAdd("*(long *)0x60A0,x","eCANA MOTS16");
-    GEL_WatchAdd("*(long *)0x60E0,x","eCANA MOTO16");
-    GEL_WatchAdd("*(long *)0x6180,x","eCANA MID16");
-    GEL_WatchAdd("*(long *)0x6182,x","eCANA MCF16");
-    GEL_WatchAdd("*(long *)0x6184,x","eCANA MDL16");
-    GEL_WatchAdd("*(long *)0x6186,x","eCANA MDH16");
-
-    GEL_WatchAdd("*(long *)0x6062,x","eCANA LAM17");
-    GEL_WatchAdd("*(long *)0x60A2,x","eCANA MOTS17");
-    GEL_WatchAdd("*(long *)0x60E2,x","eCANA MOTO17");
-    GEL_WatchAdd("*(long *)0x6188,x","eCANA MID17");
-    GEL_WatchAdd("*(long *)0x618A,x","eCANA MCF17");
-    GEL_WatchAdd("*(long *)0x618C,x","eCANA MDL17");
-    GEL_WatchAdd("*(long *)0x618E,x","eCANA MDH17");
-}
-hotmenu eCAN_A_Mailbox_18_to_19_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6064,x","eCANA LAM18");
-    GEL_WatchAdd("*(long *)0x60A4,x","eCANA MOTS18");
-    GEL_WatchAdd("*(long *)0x60E4,x","eCANA MOTO18");
-    GEL_WatchAdd("*(long *)0x6190,x","eCANA MID18");
-    GEL_WatchAdd("*(long *)0x6192,x","eCANA MCF18");
-    GEL_WatchAdd("*(long *)0x6194,x","eCANA MDL18");
-    GEL_WatchAdd("*(long *)0x6196,x","eCANA MDH18");
-
-    GEL_WatchAdd("*(long *)0x6066,x","eCANA LAM19");
-    GEL_WatchAdd("*(long *)0x60A6,x","eCANA MOTS19");
-    GEL_WatchAdd("*(long *)0x60E6,x","eCANA MOTO19");
-    GEL_WatchAdd("*(long *)0x6198,x","eCANA MID19");
-    GEL_WatchAdd("*(long *)0x619A,x","eCANA MCF19");
-    GEL_WatchAdd("*(long *)0x619C,x","eCANA MDL19");
-    GEL_WatchAdd("*(long *)0x619E,x","eCANA MDH19");
-}
-hotmenu eCAN_A_Mailbox_20_to_21_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6068,x","eCANA LAM20");
-    GEL_WatchAdd("*(long *)0x60A8,x","eCANA MOTS20");
-    GEL_WatchAdd("*(long *)0x60E8,x","eCANA MOTO20");
-    GEL_WatchAdd("*(long *)0x61A0,x","eCANA MID20");
-    GEL_WatchAdd("*(long *)0x61A2,x","eCANA MCF20");
-    GEL_WatchAdd("*(long *)0x61A4,x","eCANA MDL20");
-    GEL_WatchAdd("*(long *)0x61A6,x","eCANA MDH20");
-    
-    GEL_WatchAdd("*(long *)0x606A,x","eCANA LAM21");
-    GEL_WatchAdd("*(long *)0x60AA,x","eCANA MOTS21");
-    GEL_WatchAdd("*(long *)0x60EA,x","eCANA MOTO21");
-    GEL_WatchAdd("*(long *)0x61A8,x","eCANA MID21");
-    GEL_WatchAdd("*(long *)0x61AA,x","eCANA MCF21");
-    GEL_WatchAdd("*(long *)0x61AC,x","eCANA MDL21");
-    GEL_WatchAdd("*(long *)0x61AE,x","eCANA MDH21");
-}
-hotmenu eCAN_A_Mailbox_22_to_23_Regs()
-{
-    GEL_WatchAdd("*(long *)0x606C,x","eCANA LAM22");
-    GEL_WatchAdd("*(long *)0x60AC,x","eCANA MOTS22");
-    GEL_WatchAdd("*(long *)0x60EC,x","eCANA MOTO22");
-    GEL_WatchAdd("*(long *)0x61B0,x","eCANA MID22");
-    GEL_WatchAdd("*(long *)0x61B2,x","eCANA MCF22");
-    GEL_WatchAdd("*(long *)0x61B4,x","eCANA MDL22");
-    GEL_WatchAdd("*(long *)0x61B6,x","eCANA MDH22");
-
-    GEL_WatchAdd("*(long *)0x606E,x","eCANA LAM23");
-    GEL_WatchAdd("*(long *)0x60AE,x","eCANA MOTS23");
-    GEL_WatchAdd("*(long *)0x60EE,x","eCANA MOTO23");
-    GEL_WatchAdd("*(long *)0x61B8,x","eCANA MID23");
-    GEL_WatchAdd("*(long *)0x61BA,x","eCANA MCF23");
-    GEL_WatchAdd("*(long *)0x61BC,x","eCANA MDL23");
-    GEL_WatchAdd("*(long *)0x61BE,x","eCANA MDH23");
-}
-hotmenu eCAN_A_Mailbox_24_to_25_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6070,x","eCANA LAM24");
-    GEL_WatchAdd("*(long *)0x60B0,x","eCANA MOTS24");
-    GEL_WatchAdd("*(long *)0x60F0,x","eCANA MOTO24");
-    GEL_WatchAdd("*(long *)0x61C0,x","eCANA MID24");
-    GEL_WatchAdd("*(long *)0x61C2,x","eCANA MCF24");
-    GEL_WatchAdd("*(long *)0x61C4,x","eCANA MDL24");
-    GEL_WatchAdd("*(long *)0x61C6,x","eCANA MDH24");
-
-    GEL_WatchAdd("*(long *)0x6072,x","eCANA LAM25");
-    GEL_WatchAdd("*(long *)0x60B2,x","eCANA MOTS25");
-    GEL_WatchAdd("*(long *)0x60F2,x","eCANA MOTO25");
-    GEL_WatchAdd("*(long *)0x61C8,x","eCANA MID25");
-    GEL_WatchAdd("*(long *)0x61CA,x","eCANA MCF25");
-    GEL_WatchAdd("*(long *)0x61CC,x","eCANA MDL25");
-    GEL_WatchAdd("*(long *)0x61CE,x","eCANA MDH25");
-}
-hotmenu eCAN_A_Mailbox_26_to_27_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6074,x","eCANA LAM26");
-    GEL_WatchAdd("*(long *)0x60B4,x","eCANA MOTS26");
-    GEL_WatchAdd("*(long *)0x60F4,x","eCANA MOTO26");
-    GEL_WatchAdd("*(long *)0x61D0,x","eCANA MID26");
-    GEL_WatchAdd("*(long *)0x61D2,x","eCANA MCF26");
-    GEL_WatchAdd("*(long *)0x61D4,x","eCANA MDL26");
-    GEL_WatchAdd("*(long *)0x61D6,x","eCANA MDH26");
-
-    GEL_WatchAdd("*(long *)0x6076,x","eCANA LAM27");
-    GEL_WatchAdd("*(long *)0x60B6,x","eCANA MOTS27");
-    GEL_WatchAdd("*(long *)0x60F6,x","eCANA MOTO27");
-    GEL_WatchAdd("*(long *)0x61D8,x","eCANA MID27");
-    GEL_WatchAdd("*(long *)0x61DA,x","eCANA MCF27");
-    GEL_WatchAdd("*(long *)0x61DC,x","eCANA MDL27");
-    GEL_WatchAdd("*(long *)0x61DE,x","eCANA MDH27");
-}
-hotmenu eCAN_A_Mailbox_28_to_29_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6078,x","eCANA LAM28");
-    GEL_WatchAdd("*(long *)0x60B8,x","eCANA MOTS28");
-    GEL_WatchAdd("*(long *)0x60F8,x","eCANA MOTO28");
-    GEL_WatchAdd("*(long *)0x61E0,x","eCANA MID28");
-    GEL_WatchAdd("*(long *)0x61E2,x","eCANA MCF28");
-    GEL_WatchAdd("*(long *)0x61E4,x","eCANA MDL28");
-    GEL_WatchAdd("*(long *)0x61E6,x","eCANA MDH28");
-
-    GEL_WatchAdd("*(long *)0x607A,x","eCANA LAM29");
-    GEL_WatchAdd("*(long *)0x60BA,x","eCANA MOTS29");
-    GEL_WatchAdd("*(long *)0x60FA,x","eCANA MOTO29");
-    GEL_WatchAdd("*(long *)0x61E8,x","eCANA MID29");
-    GEL_WatchAdd("*(long *)0x61EA,x","eCANA MCF29");
-    GEL_WatchAdd("*(long *)0x61EC,x","eCANA MDL29");
-    GEL_WatchAdd("*(long *)0x61EE,x","eCANA MDH29");
-}
-hotmenu eCAN_A_Mailbox_30_to_31_Regs()
-{
-    GEL_WatchAdd("*(long *)0x607C,x","eCANA LAM30");
-    GEL_WatchAdd("*(long *)0x60BC,x","eCANA MOTS30");
-    GEL_WatchAdd("*(long *)0x60FC,x","eCANA MOTO30");
-    GEL_WatchAdd("*(long *)0x61F0,x","eCANA MID30");
-    GEL_WatchAdd("*(long *)0x61F2,x","eCANA MCF30");
-    GEL_WatchAdd("*(long *)0x61F4,x","eCANA MDL30");
-    GEL_WatchAdd("*(long *)0x61F6,x","eCANA MDH30");
-
-    GEL_WatchAdd("*(long *)0x607E,x","eCANA LAM31");
-    GEL_WatchAdd("*(long *)0x60BE,x","eCANA MOTS31");
-    GEL_WatchAdd("*(long *)0x60FE,x","eCANA MOTO31");
-    GEL_WatchAdd("*(long *)0x61F8,x","eCANA MID31");
-    GEL_WatchAdd("*(long *)0x61FA,x","eCANA MCF31");
-    GEL_WatchAdd("*(long *)0x61FC,x","eCANA MDL31");
-    GEL_WatchAdd("*(long *)0x61FE,x","eCANA MDH31");
-}
-hotmenu eCAN_B_Global_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6200,x","eCANB CANME");
-    GEL_WatchAdd("*(long *)0x6202,x","eCANB CANMD");
-    GEL_WatchAdd("*(long *)0x6204,x","eCANB CANTRS");
-    GEL_WatchAdd("*(long *)0x6206,x","eCANB CANTRR");
-    GEL_WatchAdd("*(long *)0x6208,x","eCANB CANTA");
-    GEL_WatchAdd("*(long *)0x620A,x","eCANB CANAA");
-    GEL_WatchAdd("*(long *)0x620C,x","eCANB CANRMP");
-    GEL_WatchAdd("*(long *)0x620E,x","eCANB CANRML");
-    GEL_WatchAdd("*(long *)0x6210,x","eCANB CANRFP");
-    GEL_WatchAdd("*(long *)0x6214,x","eCANB CANMC");
-    GEL_WatchAdd("*(long *)0x6216,x","eCANB CANBTC");
-    GEL_WatchAdd("*(long *)0x6218,x","eCANB CANES");
-    GEL_WatchAdd("*(long *)0x621A,x","eCANB CANTEC");
-    GEL_WatchAdd("*(long *)0x621C,x","eCANB CANREC");
-    GEL_WatchAdd("*(long *)0x621E,x","eCANB CANGIF0");
-    GEL_WatchAdd("*(long *)0x6220,x","eCANB CANGIM");
-    GEL_WatchAdd("*(long *)0x6222,x","eCANB CANGIF1");
-    GEL_WatchAdd("*(long *)0x6224,x","eCANB CANMIM");
-    GEL_WatchAdd("*(long *)0x6226,x","eCANB CANMIL");
-    GEL_WatchAdd("*(long *)0x6228,x","eCANB CANOPC");
-    GEL_WatchAdd("*(long *)0x622A,x","eCANB CANTIOC");
-    GEL_WatchAdd("*(long *)0x622C,x","eCANB CANRIOC");
-    GEL_WatchAdd("*(long *)0x622E,x","eCANB CANLNT");
-    GEL_WatchAdd("*(long *)0x6230,x","eCANB CANTOC");
-    GEL_WatchAdd("*(long *)0x6232,x","eCANB CANTOS");
-}
-hotmenu eCAN_B_Mailbox_0_to_1_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6240,x","eCANB LAM0");
-    GEL_WatchAdd("*(long *)0x6280,x","eCANB MOTS0");
-    GEL_WatchAdd("*(long *)0x62C0,x","eCANB MOTO0");
-    GEL_WatchAdd("*(long *)0x6300,x","eCANB MID0");
-    GEL_WatchAdd("*(long *)0x6302,x","eCANB MCF0");
-    GEL_WatchAdd("*(long *)0x6304,x","eCANB MDL0");
-    GEL_WatchAdd("*(long *)0x6306,x","eCANB MDH0");
-
-    GEL_WatchAdd("*(long *)0x6242,x","eCANB LAM1");
-    GEL_WatchAdd("*(long *)0x6282,x","eCANB MOTS1");
-    GEL_WatchAdd("*(long *)0x62C2,x","eCANB MOTO1");
-    GEL_WatchAdd("*(long *)0x6308,x","eCANB MID1");
-    GEL_WatchAdd("*(long *)0x630A,x","eCANB MCF1");
-    GEL_WatchAdd("*(long *)0x630C,x","eCANB MDL1");
-    GEL_WatchAdd("*(long *)0x630E,x","eCANB MDH1");
-}
-hotmenu eCAN_B_Mailbox_2_to_3_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6244,x","eCANB LAM2");
-    GEL_WatchAdd("*(long *)0x6284,x","eCANB MOTS2");
-    GEL_WatchAdd("*(long *)0x62C4,x","eCANB MOTO2");
-    GEL_WatchAdd("*(long *)0x6310,x","eCANB MID2");
-    GEL_WatchAdd("*(long *)0x6312,x","eCANB MCF2");
-    GEL_WatchAdd("*(long *)0x6314,x","eCANB MDL2");
-    GEL_WatchAdd("*(long *)0x6316,x","eCANB MDH2");
-
-    GEL_WatchAdd("*(long *)0x6246,x","eCANB LAM3");
-    GEL_WatchAdd("*(long *)0x6286,x","eCANB MOTS3");
-    GEL_WatchAdd("*(long *)0x62C6,x","eCANB MOTO3");
-    GEL_WatchAdd("*(long *)0x6318,x","eCANB MID3");
-    GEL_WatchAdd("*(long *)0x631A,x","eCANB MCF3");
-    GEL_WatchAdd("*(long *)0x631C,x","eCANB MDL3");
-    GEL_WatchAdd("*(long *)0x631E,x","eCANB MDH3");
-}
-hotmenu eCAN_B_Mailbox_4_to_5_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6248,x","eCANB LAM4");
-    GEL_WatchAdd("*(long *)0x6288,x","eCANB MOTS4");
-    GEL_WatchAdd("*(long *)0x62C8,x","eCANB MOTO4");
-    GEL_WatchAdd("*(long *)0x6320,x","eCANB MID4");
-    GEL_WatchAdd("*(long *)0x6322,x","eCANB MCF4");
-    GEL_WatchAdd("*(long *)0x6324,x","eCANB MDL4");
-    GEL_WatchAdd("*(long *)0x6326,x","eCANB MDH4");
-
-    GEL_WatchAdd("*(long *)0x624A,x","eCANB LAM5");
-    GEL_WatchAdd("*(long *)0x628A,x","eCANB MOTS5");
-    GEL_WatchAdd("*(long *)0x62CA,x","eCANB MOTO5");
-    GEL_WatchAdd("*(long *)0x6328,x","eCANB MID5");
-    GEL_WatchAdd("*(long *)0x632A,x","eCANB MCF5");
-    GEL_WatchAdd("*(long *)0x632C,x","eCANB MDL5");
-    GEL_WatchAdd("*(long *)0x632E,x","eCANB MDH5");
-}
-hotmenu eCAN_B_Mailbox_6_to_7_Regs()
-{
-    GEL_WatchAdd("*(long *)0x624C,x","eCANB LAM6");
-    GEL_WatchAdd("*(long *)0x628C,x","eCANB MOTS6");
-    GEL_WatchAdd("*(long *)0x62CC,x","eCANB MOTO6");
-    GEL_WatchAdd("*(long *)0x6330,x","eCANB MID6");
-    GEL_WatchAdd("*(long *)0x6332,x","eCANB MCF6");
-    GEL_WatchAdd("*(long *)0x6334,x","eCANB MDL6");
-    GEL_WatchAdd("*(long *)0x6336,x","eCANB MDH6");
-
-    GEL_WatchAdd("*(long *)0x624E,x","eCANB LAM7");
-    GEL_WatchAdd("*(long *)0x628E,x","eCANB MOTS7");
-    GEL_WatchAdd("*(long *)0x62CE,x","eCANB MOTO7");
-    GEL_WatchAdd("*(long *)0x6338,x","eCANB MID7");
-    GEL_WatchAdd("*(long *)0x633A,x","eCANB MCF7");
-    GEL_WatchAdd("*(long *)0x633C,x","eCANB MDL7");
-    GEL_WatchAdd("*(long *)0x633E,x","eCANB MDH7");
-}
-hotmenu eCAN_B_Mailbox_8_to_9_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6250,x","eCANB LAM8");
-    GEL_WatchAdd("*(long *)0x6290,x","eCANB MOTS8");
-    GEL_WatchAdd("*(long *)0x62D0,x","eCANB MOTO8");
-    GEL_WatchAdd("*(long *)0x6340,x","eCANB MID8");
-    GEL_WatchAdd("*(long *)0x6342,x","eCANB MCF8");
-    GEL_WatchAdd("*(long *)0x6344,x","eCANB MDL8");
-    GEL_WatchAdd("*(long *)0x6346,x","eCANB MDH8");
-
-    GEL_WatchAdd("*(long *)0x6252,x","eCANB LAM9");
-    GEL_WatchAdd("*(long *)0x6292,x","eCANB MOTS9");
-    GEL_WatchAdd("*(long *)0x62D2,x","eCANB MOTO9");
-    GEL_WatchAdd("*(long *)0x6348,x","eCANB MID9");
-    GEL_WatchAdd("*(long *)0x634A,x","eCANB MCF9");
-    GEL_WatchAdd("*(long *)0x634C,x","eCANB MDL9");
-    GEL_WatchAdd("*(long *)0x634E,x","eCANB MDH9");
-}
-hotmenu eCAN_B_Mailbox_10_to_11_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6254,x","eCANB LAM10");
-    GEL_WatchAdd("*(long *)0x6294,x","eCANB MOTS10");
-    GEL_WatchAdd("*(long *)0x62D4,x","eCANB MOTO10");
-    GEL_WatchAdd("*(long *)0x6350,x","eCANB MID10");
-    GEL_WatchAdd("*(long *)0x6352,x","eCANB MCF10");
-    GEL_WatchAdd("*(long *)0x6354,x","eCANB MDL10");
-    GEL_WatchAdd("*(long *)0x6356,x","eCANB MDH10");
-
-    GEL_WatchAdd("*(long *)0x6256,x","eCANB LAM11");
-    GEL_WatchAdd("*(long *)0x6296,x","eCANB MOTS11");
-    GEL_WatchAdd("*(long *)0x62D6,x","eCANB MOTO11");
-    GEL_WatchAdd("*(long *)0x6358,x","eCANB MID11");
-    GEL_WatchAdd("*(long *)0x635A,x","eCANB MCF11");
-    GEL_WatchAdd("*(long *)0x635C,x","eCANB MDL11");
-    GEL_WatchAdd("*(long *)0x635E,x","eCANB MDH11");
-}
-hotmenu eCAN_B_Mailbox_12_to_13_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6258,x","eCANB LAM12");
-    GEL_WatchAdd("*(long *)0x6298,x","eCANB MOTS12");
-    GEL_WatchAdd("*(long *)0x62D8,x","eCANB MOTO12");
-    GEL_WatchAdd("*(long *)0x6360,x","eCANB MID12");
-    GEL_WatchAdd("*(long *)0x6362,x","eCANB MCF12");
-    GEL_WatchAdd("*(long *)0x6364,x","eCANB MDL12");
-    GEL_WatchAdd("*(long *)0x6366,x","eCANB MDH12");
-
-    GEL_WatchAdd("*(long *)0x625A,x","eCANB LAM13");
-    GEL_WatchAdd("*(long *)0x629A,x","eCANB MOTS13");
-    GEL_WatchAdd("*(long *)0x62DA,x","eCANB MOTO13");
-    GEL_WatchAdd("*(long *)0x6368,x","eCANB MID13");
-    GEL_WatchAdd("*(long *)0x636A,x","eCANB MCF13");
-    GEL_WatchAdd("*(long *)0x636C,x","eCANB MDL13");
-    GEL_WatchAdd("*(long *)0x636E,x","eCANB MDH13");
-}
-hotmenu eCAN_B_Mailbox_14_to_15_Regs()
-{
-    GEL_WatchAdd("*(long *)0x625C,x","eCANB LAM14");
-    GEL_WatchAdd("*(long *)0x629C,x","eCANB MOTS14");
-    GEL_WatchAdd("*(long *)0x62DC,x","eCANB MOTO14");
-    GEL_WatchAdd("*(long *)0x6370,x","eCANB MID14");
-    GEL_WatchAdd("*(long *)0x6372,x","eCANB MCF14");
-    GEL_WatchAdd("*(long *)0x6374,x","eCANB MDL14");
-    GEL_WatchAdd("*(long *)0x6376,x","eCANB MDH14");
-
-    GEL_WatchAdd("*(long *)0x625E,x","eCANB LAM15");
-    GEL_WatchAdd("*(long *)0x629E,x","eCANB MOTS15");
-    GEL_WatchAdd("*(long *)0x62DE,x","eCANB MOTO15");
-    GEL_WatchAdd("*(long *)0x6378,x","eCANB MID15");
-    GEL_WatchAdd("*(long *)0x637A,x","eCANB MCF15");
-    GEL_WatchAdd("*(long *)0x637C,x","eCANB MDL15");
-    GEL_WatchAdd("*(long *)0x637E,x","eCANB MDH15");
-}
-hotmenu eCAN_B_Mailbox_16_to_17_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6260,x","eCANB LAM16");
-    GEL_WatchAdd("*(long *)0x62A0,x","eCANB MOTS16");
-    GEL_WatchAdd("*(long *)0x62E0,x","eCANB MOTO16");
-    GEL_WatchAdd("*(long *)0x6380,x","eCANB MID16");
-    GEL_WatchAdd("*(long *)0x6382,x","eCANB MCF16");
-    GEL_WatchAdd("*(long *)0x6384,x","eCANB MDL16");
-    GEL_WatchAdd("*(long *)0x6386,x","eCANB MDH16");
-
-    GEL_WatchAdd("*(long *)0x6262,x","eCANB LAM17");
-    GEL_WatchAdd("*(long *)0x62A2,x","eCANB MOTS17");
-    GEL_WatchAdd("*(long *)0x62E2,x","eCANB MOTO17");
-    GEL_WatchAdd("*(long *)0x6388,x","eCANB MID17");
-    GEL_WatchAdd("*(long *)0x638A,x","eCANB MCF17");
-    GEL_WatchAdd("*(long *)0x638C,x","eCANB MDL17");
-    GEL_WatchAdd("*(long *)0x638E,x","eCANB MDH17");
-}
-hotmenu eCAN_B_Mailbox_18_to_19_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6264,x","eCANB LAM18");
-    GEL_WatchAdd("*(long *)0x62A4,x","eCANB MOTS18");
-    GEL_WatchAdd("*(long *)0x62E4,x","eCANB MOTO18");
-    GEL_WatchAdd("*(long *)0x6390,x","eCANB MID18");
-    GEL_WatchAdd("*(long *)0x6392,x","eCANB MCF18");
-    GEL_WatchAdd("*(long *)0x6394,x","eCANB MDL18");
-    GEL_WatchAdd("*(long *)0x6396,x","eCANB MDH18");
-
-    GEL_WatchAdd("*(long *)0x6266,x","eCANB LAM19");
-    GEL_WatchAdd("*(long *)0x62A6,x","eCANB MOTS19");
-    GEL_WatchAdd("*(long *)0x62E6,x","eCANB MOTO19");
-    GEL_WatchAdd("*(long *)0x6398,x","eCANB MID19");
-    GEL_WatchAdd("*(long *)0x639A,x","eCANB MCF19");
-    GEL_WatchAdd("*(long *)0x639C,x","eCANB MDL19");
-    GEL_WatchAdd("*(long *)0x639E,x","eCANB MDH19");
-}
-hotmenu eCAN_B_Mailbox_20_to_21_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6268,x","eCANB LAM20");
-    GEL_WatchAdd("*(long *)0x62A8,x","eCANB MOTS20");
-    GEL_WatchAdd("*(long *)0x62E8,x","eCANB MOTO20");
-    GEL_WatchAdd("*(long *)0x63A0,x","eCANB MID20");
-    GEL_WatchAdd("*(long *)0x63A2,x","eCANB MCF20");
-    GEL_WatchAdd("*(long *)0x63A4,x","eCANB MDL20");
-    GEL_WatchAdd("*(long *)0x63A6,x","eCANB MDH20");
-
-    GEL_WatchAdd("*(long *)0x626A,x","eCANB LAM21");
-    GEL_WatchAdd("*(long *)0x62AA,x","eCANB MOTS21");
-    GEL_WatchAdd("*(long *)0x62EA,x","eCANB MOTO21");
-    GEL_WatchAdd("*(long *)0x63A8,x","eCANB MID21");
-    GEL_WatchAdd("*(long *)0x63AA,x","eCANB MCF21");
-    GEL_WatchAdd("*(long *)0x63AC,x","eCANB MDL21");
-    GEL_WatchAdd("*(long *)0x63AE,x","eCANB MDH21");
-}
-hotmenu eCAN_B_Mailbox_22_to_23_Regs()
-{
-    GEL_WatchAdd("*(long *)0x626C,x","eCANB LAM22");
-    GEL_WatchAdd("*(long *)0x62AC,x","eCANB MOTS22");
-    GEL_WatchAdd("*(long *)0x62EC,x","eCANB MOTO22");
-    GEL_WatchAdd("*(long *)0x63B0,x","eCANB MID22");
-    GEL_WatchAdd("*(long *)0x63B2,x","eCANB MCF22");
-    GEL_WatchAdd("*(long *)0x63B4,x","eCANB MDL22");
-    GEL_WatchAdd("*(long *)0x63B6,x","eCANB MDH22");
-
-    GEL_WatchAdd("*(long *)0x626E,x","eCANB LAM23");
-    GEL_WatchAdd("*(long *)0x62AE,x","eCANB MOTS23");
-    GEL_WatchAdd("*(long *)0x62EE,x","eCANB MOTO23");
-    GEL_WatchAdd("*(long *)0x63B8,x","eCANB MID23");
-    GEL_WatchAdd("*(long *)0x63BA,x","eCANB MCF23");
-    GEL_WatchAdd("*(long *)0x63BC,x","eCANB MDL23");
-    GEL_WatchAdd("*(long *)0x63BE,x","eCANB MDH23");
-}
-hotmenu eCAN_B_Mailbox_24_to_25_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6270,x","eCANB LAM24");
-    GEL_WatchAdd("*(long *)0x62B0,x","eCANB MOTS24");
-    GEL_WatchAdd("*(long *)0x62F0,x","eCANB MOTO24");
-    GEL_WatchAdd("*(long *)0x63C0,x","eCANB MID24");
-    GEL_WatchAdd("*(long *)0x63C2,x","eCANB MCF24");
-    GEL_WatchAdd("*(long *)0x63C4,x","eCANB MDL24");
-    GEL_WatchAdd("*(long *)0x63C6,x","eCANB MDH24");
-
-    GEL_WatchAdd("*(long *)0x6272,x","eCANB LAM25");
-    GEL_WatchAdd("*(long *)0x62B2,x","eCANB MOTS25");
-    GEL_WatchAdd("*(long *)0x62F2,x","eCANB MOTO25");
-    GEL_WatchAdd("*(long *)0x63C8,x","eCANB MID25");
-    GEL_WatchAdd("*(long *)0x63CA,x","eCANB MCF25");
-    GEL_WatchAdd("*(long *)0x63CC,x","eCANB MDL25");
-    GEL_WatchAdd("*(long *)0x63CE,x","eCANB MDH25");
-}
-hotmenu eCAN_B_Mailbox_26_to_27_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6274,x","eCANB LAM26");
-    GEL_WatchAdd("*(long *)0x62B4,x","eCANB MOTS26");
-    GEL_WatchAdd("*(long *)0x62F4,x","eCANB MOTO26");
-    GEL_WatchAdd("*(long *)0x63D0,x","eCANB MID26");
-    GEL_WatchAdd("*(long *)0x63D2,x","eCANB MCF26");
-    GEL_WatchAdd("*(long *)0x63D4,x","eCANB MDL26");
-    GEL_WatchAdd("*(long *)0x63D6,x","eCANB MDH26");
-
-    GEL_WatchAdd("*(long *)0x6276,x","eCANB LAM27");
-    GEL_WatchAdd("*(long *)0x62B6,x","eCANB MOTS27");
-    GEL_WatchAdd("*(long *)0x62F6,x","eCANB MOTO27");
-    GEL_WatchAdd("*(long *)0x63D8,x","eCANB MID27");
-    GEL_WatchAdd("*(long *)0x63DA,x","eCANB MCF27");
-    GEL_WatchAdd("*(long *)0x63DC,x","eCANB MDL27");
-    GEL_WatchAdd("*(long *)0x63DE,x","eCANB MDH27");
-}
-hotmenu eCAN_B_Mailbox_28_to_29_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6278,x","eCANB LAM28");
-    GEL_WatchAdd("*(long *)0x62B8,x","eCANB MOTS28");
-    GEL_WatchAdd("*(long *)0x62F8,x","eCANB MOTO28");
-    GEL_WatchAdd("*(long *)0x63E0,x","eCANB MID28");
-    GEL_WatchAdd("*(long *)0x63E2,x","eCANB MCF28");
-    GEL_WatchAdd("*(long *)0x63E4,x","eCANB MDL28");
-    GEL_WatchAdd("*(long *)0x63E6,x","eCANB MDH28");
-
-    GEL_WatchAdd("*(long *)0x627A,x","eCANB LAM29");
-    GEL_WatchAdd("*(long *)0x62BA,x","eCANB MOTS29");
-    GEL_WatchAdd("*(long *)0x62FA,x","eCANB MOTO29");
-    GEL_WatchAdd("*(long *)0x63E8,x","eCANB MID29");
-    GEL_WatchAdd("*(long *)0x63EA,x","eCANB MCF29");
-    GEL_WatchAdd("*(long *)0x63EC,x","eCANB MDL29");
-    GEL_WatchAdd("*(long *)0x63EE,x","eCANB MDH29");
-}
-hotmenu eCAN_B_Mailbox_30_to_31_Regs()
-{
-    GEL_WatchAdd("*(long *)0x627C,x","eCANB LAM30");
-    GEL_WatchAdd("*(long *)0x62BC,x","eCANB MOTS30");
-    GEL_WatchAdd("*(long *)0x62FC,x","eCANB MOTO30");
-    GEL_WatchAdd("*(long *)0x63F0,x","eCANB MID30");
-    GEL_WatchAdd("*(long *)0x63F2,x","eCANB MCF30");
-    GEL_WatchAdd("*(long *)0x63F4,x","eCANB MDL30");
-    GEL_WatchAdd("*(long *)0x63F6,x","eCANB MDH30");
-
-    GEL_WatchAdd("*(long *)0x627E,x","eCANB LAM31");
-    GEL_WatchAdd("*(long *)0x62BE,x","eCANB MOTS31");
-    GEL_WatchAdd("*(long *)0x62FE,x","eCANB MOTO31");
-    GEL_WatchAdd("*(long *)0x63F8,x","eCANB MID31");
-    GEL_WatchAdd("*(long *)0x63FA,x","eCANB MCF31");
-    GEL_WatchAdd("*(long *)0x63FC,x","eCANB MDL31");
-    GEL_WatchAdd("*(long *)0x63FE,x","eCANB MDH31");
-}
-
-
-/********************************************************************/
-/* Enhanced Capture Registers                                       */
-/********************************************************************/
-menuitem "Watch eCAP Registers";
-
-hotmenu eCAP1_All_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6A00,x","eCAP1 TSCNT");
-    GEL_WatchAdd("*(long *)0x6A02,x","eCAP1 CNTPHS");
-    GEL_WatchAdd("*(long *)0x6A04,x","eCAP1 CAP1");
-    GEL_WatchAdd("*(long *)0x6A06,x","eCAP1 CAP2");
-    GEL_WatchAdd("*(long *)0x6A08,x","eCAP1 CAP3");
-    GEL_WatchAdd("*(long *)0x6A0A,x","eCAP1 CAP4");
-    GEL_WatchAdd("*0x6A14,x","eCAP1 ECCTL1");
-    GEL_WatchAdd("*0x6A15,x","eCAP1 ECCTL2");
-    GEL_WatchAdd("*0x6A16,x","eCAP1 ECEINT");
-    GEL_WatchAdd("*0x6A17,x","eCAP1 ECFLG");
-    GEL_WatchAdd("*0x6A18,x","eCAP1 ECCLR");
-    GEL_WatchAdd("*0x6A19,x","eCAP1 ECFRC");
-}
-hotmenu eCAP2_All_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6A20,x","eCAP2 TSCNT");
-    GEL_WatchAdd("*(long *)0x6A22,x","eCAP2 CNTPHS");
-    GEL_WatchAdd("*(long *)0x6A24,x","eCAP2 CAP1");
-    GEL_WatchAdd("*(long *)0x6A26,x","eCAP2 CAP2");
-    GEL_WatchAdd("*(long *)0x6A28,x","eCAP2 CAP3");
-    GEL_WatchAdd("*(long *)0x6A2A,x","eCAP2 CAP4");
-    GEL_WatchAdd("*0x6A34,x","eCAP2 ECCTL1");
-    GEL_WatchAdd("*0x6A35,x","eCAP2 ECCTL2");
-    GEL_WatchAdd("*0x6A36,x","eCAP2 ECEINT");
-    GEL_WatchAdd("*0x6A37,x","eCAP2 ECFLG");
-    GEL_WatchAdd("*0x6A38,x","eCAP2 ECCLR");
-    GEL_WatchAdd("*0x6A39,x","eCAP2 ECFRC");
-}
-hotmenu eCAP3_All_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6A40,x","eCAP3 TSCNT");
-    GEL_WatchAdd("*(long *)0x6A42,x","eCAP3 CNTPHS");
-    GEL_WatchAdd("*(long *)0x6A44,x","eCAP3 CAP1");
-    GEL_WatchAdd("*(long *)0x6A46,x","eCAP3 CAP2");
-    GEL_WatchAdd("*(long *)0x6A48,x","eCAP3 CAP3");
-    GEL_WatchAdd("*(long *)0x6A4A,x","eCAP3 CAP4");
-    GEL_WatchAdd("*0x6A54,x","eCAP3 ECCTL1");
-    GEL_WatchAdd("*0x6A55,x","eCAP3 ECCTL2");
-    GEL_WatchAdd("*0x6A56,x","eCAP3 ECEINT");
-    GEL_WatchAdd("*0x6A57,x","eCAP3 ECFLG");
-    GEL_WatchAdd("*0x6A58,x","eCAP3 ECCLR");
-    GEL_WatchAdd("*0x6A59,x","eCAP3 ECFRC");
-}
-hotmenu eCAP4_All_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6A60,x","eCAP4 TSCNT");
-    GEL_WatchAdd("*(long *)0x6A62,x","eCAP4 CNTPHS");
-    GEL_WatchAdd("*(long *)0x6A64,x","eCAP4 CAP1");
-    GEL_WatchAdd("*(long *)0x6A66,x","eCAP4 CAP2");
-    GEL_WatchAdd("*(long *)0x6A68,x","eCAP4 CAP3");
-    GEL_WatchAdd("*(long *)0x6A6A,x","eCAP4 CAP4");
-    GEL_WatchAdd("*0x6A74,x","eCAP4 ECCTL1");
-    GEL_WatchAdd("*0x6A75,x","eCAP4 ECCTL2");
-    GEL_WatchAdd("*0x6A76,x","eCAP4 ECEINT");
-    GEL_WatchAdd("*0x6A77,x","eCAP4 ECFLG");
-    GEL_WatchAdd("*0x6A78,x","eCAP4 ECCLR");
-    GEL_WatchAdd("*0x6A79,x","eCAP4 ECFRC");
-}
-hotmenu eCAP5_All_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6A80,x","eCAP5 TSCNT");
-    GEL_WatchAdd("*(long *)0x6A82,x","eCAP5 CNTPHS");
-    GEL_WatchAdd("*(long *)0x6A84,x","eCAP5 CAP1");
-    GEL_WatchAdd("*(long *)0x6A86,x","eCAP5 CAP2");
-    GEL_WatchAdd("*(long *)0x6A88,x","eCAP5 CAP3");
-    GEL_WatchAdd("*(long *)0x6A8A,x","eCAP5 CAP4");
-    GEL_WatchAdd("*0x6A94,x","eCAP5 ECCTL1");
-    GEL_WatchAdd("*0x6A95,x","eCAP5 ECCTL2");
-    GEL_WatchAdd("*0x6A96,x","eCAP5 ECEINT");
-    GEL_WatchAdd("*0x6A97,x","eCAP5 ECFLG");
-    GEL_WatchAdd("*0x6A98,x","eCAP5 ECCLR");
-    GEL_WatchAdd("*0x6A99,x","eCAP5 ECFRC");
-}
-hotmenu eCAP6_All_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6AA0,x","eCAP6 TSCNT");
-    GEL_WatchAdd("*(long *)0x6AA2,x","eCAP6 CNTPHS");
-    GEL_WatchAdd("*(long *)0x6AA4,x","eCAP6 CAP1");
-    GEL_WatchAdd("*(long *)0x6AA6,x","eCAP6 CAP2");
-    GEL_WatchAdd("*(long *)0x6AA8,x","eCAP6 CAP3");
-    GEL_WatchAdd("*(long *)0x6AAA,x","eCAP6 CAP4");
-    GEL_WatchAdd("*0x6AB4,x","eCAP6 ECCTL1");
-    GEL_WatchAdd("*0x6AB5,x","eCAP6 ECCTL2");
-    GEL_WatchAdd("*0x6AB6,x","eCAP6 ECEINT");
-    GEL_WatchAdd("*0x6AB7,x","eCAP6 ECFLG");
-    GEL_WatchAdd("*0x6AB8,x","eCAP6 ECCLR");
-    GEL_WatchAdd("*0x6AB9,x","eCAP6 ECFRC");
-}
-
-/********************************************************************/
-/* Enhanced PWM Registers                                           */
-/********************************************************************/
-menuitem "Watch ePWM Registers";
-
-hotmenu ePWM1_All_Regs()
-{
-    GEL_WatchAdd("*0x6800,x","ePWM1 TBCTL");
-    GEL_WatchAdd("*0x6801,x","ePWM1 TBSTS");
-    GEL_WatchAdd("*0x6802,x","ePWM1 TBPHSHR");
-    GEL_WatchAdd("*0x6803,x","ePWM1 TBPHS");
-    GEL_WatchAdd("*0x6804,x","ePWM1 TBCTR");
-    GEL_WatchAdd("*0x6805,x","ePWM1 TBPRD");
-    GEL_WatchAdd("*0x6807,x","ePWM1 CMPCTL");
-    GEL_WatchAdd("*0x6808,x","ePWM1 CMPAHR");
-    GEL_WatchAdd("*0x6809,x","ePWM1 CMPA");
-    GEL_WatchAdd("*0x680A,x","ePWM1 CMPB");
-    GEL_WatchAdd("*0x680B,x","ePWM1 AQCTLA");
-    GEL_WatchAdd("*0x680C,x","ePWM1 AQCTLB");
-    GEL_WatchAdd("*0x680D,x","ePWM1 AQSFRC");
-    GEL_WatchAdd("*0x680E,x","ePWM1 AQCSFRC");
-    GEL_WatchAdd("*0x680F,x","ePWM1 DBCTL");
-    GEL_WatchAdd("*0x6810,x","ePWM1 DBRED");
-    GEL_WatchAdd("*0x6811,x","ePWM1 DBFED");
-    GEL_WatchAdd("*0x6812,x","ePWM1 TZSEL");
-    GEL_WatchAdd("*0x6813,x","ePWM1 TZDCSEL");
-    GEL_WatchAdd("*0x6814,x","ePWM1 TZCTL");
-    GEL_WatchAdd("*0x6815,x","ePWM1 TZEINT");
-    GEL_WatchAdd("*0x6816,x","ePWM1 TZFLG");
-    GEL_WatchAdd("*0x6817,x","ePWM1 TZCLR");
-    GEL_WatchAdd("*0x6818,x","ePWM1 TZFRC");
-    GEL_WatchAdd("*0x6819,x","ePWM1 ETSEL");
-    GEL_WatchAdd("*0x681A,x","ePWM1 ETPS");
-    GEL_WatchAdd("*0x681B,x","ePWM1 ETFLG");
-    GEL_WatchAdd("*0x681C,x","ePWM1 ETCLR");
-    GEL_WatchAdd("*0x681D,x","ePWM1 ETFRC");
-    GEL_WatchAdd("*0x681E,x","ePWM1 PCCTL");
-    GEL_WatchAdd("*0x6820,x","ePWM1 HRCNFG");
-}
-hotmenu ePWM1_TB_Regs()
-{
-    GEL_WatchAdd("*0x6800,x","ePWM1 TBCTL");
-    GEL_WatchAdd("*0x6801,x","ePWM1 TBSTS");
-    GEL_WatchAdd("*0x6802,x","ePWM1 TBPHSHR");
-    GEL_WatchAdd("*0x6803,x","ePWM1 TBPHS");
-    GEL_WatchAdd("*0x6804,x","ePWM1 TBCTR");
-    GEL_WatchAdd("*0x6805,x","ePWM1 TBPRD");
-}
-hotmenu ePWM1_CMP_Regs()
-{
-    GEL_WatchAdd("*0x6807,x","ePWM1 CMPCTL");
-    GEL_WatchAdd("*0x6808,x","ePWM1 CMPAHR");
-    GEL_WatchAdd("*0x6809,x","ePWM1 CMPA");
-    GEL_WatchAdd("*0x680A,x","ePWM1 CMPB");
-}
-hotmenu ePWM1_AQ_Regs()
-{
-    GEL_WatchAdd("*0x680B,x","ePWM1 AQCTLA");
-    GEL_WatchAdd("*0x680C,x","ePWM1 AQCTLB");
-    GEL_WatchAdd("*0x680D,x","ePWM1 AQSFRC");
-    GEL_WatchAdd("*0x680E,x","ePWM1 AQCSFRC");
-}
-hotmenu ePWM1_DB_Regs()
-{
-    GEL_WatchAdd("*0x680F,x","ePWM1 DBCTL");
-    GEL_WatchAdd("*0x6810,x","ePWM1 DBRED");
-    GEL_WatchAdd("*0x6811,x","ePWM1 DBFED");
-}
-hotmenu ePWM1_TZ_Regs()
-{
-    GEL_WatchAdd("*0x6812,x","ePWM1 TZSEL");
-    GEL_WatchAdd("*0x6814,x","ePWM1 TZCTL");
-    GEL_WatchAdd("*0x6815,x","ePWM1 TZEINT");
-    GEL_WatchAdd("*0x6816,x","ePWM1 TZFLG");
-    GEL_WatchAdd("*0x6817,x","ePWM1 TZCLR");
-    GEL_WatchAdd("*0x6818,x","ePWM1 TZFRC");
-}
-hotmenu ePWM1_ET_Regs()
-{
-    GEL_WatchAdd("*0x6819,x","ePWM1 ETSEL");
-    GEL_WatchAdd("*0x681A,x","ePWM1 ETPS");
-    GEL_WatchAdd("*0x681B,x","ePWM1 ETFLG");
-    GEL_WatchAdd("*0x681C,x","ePWM1 ETCLR");
-    GEL_WatchAdd("*0x681D,x","ePWM1 ETFRC");
-}
-hotmenu ePWM2_All_Regs()
-{
-    GEL_WatchAdd("*0x6840,x","ePWM2 TBCTL");
-    GEL_WatchAdd("*0x6841,x","ePWM2 TBSTS");
-    GEL_WatchAdd("*0x6842,x","ePWM2 TBPHSHR");
-    GEL_WatchAdd("*0x6843,x","ePWM2 TBPHS");
-    GEL_WatchAdd("*0x6844,x","ePWM2 TBCTR");
-    GEL_WatchAdd("*0x6845,x","ePWM2 TBPRD");
-    GEL_WatchAdd("*0x6847,x","ePWM2 CMPCTL");
-    GEL_WatchAdd("*0x6848,x","ePWM2 CMPAHR");
-    GEL_WatchAdd("*0x6849,x","ePWM2 CMPA");
-    GEL_WatchAdd("*0x684A,x","ePWM2 CMPB");
-    GEL_WatchAdd("*0x684B,x","ePWM2 AQCTLA");
-    GEL_WatchAdd("*0x684C,x","ePWM2 AQCTLB");
-    GEL_WatchAdd("*0x684D,x","ePWM2 AQSFRC");
-    GEL_WatchAdd("*0x684E,x","ePWM2 AQCSFRC");
-    GEL_WatchAdd("*0x684F,x","ePWM2 DBCTL");
-    GEL_WatchAdd("*0x6850,x","ePWM2 DBRED");
-    GEL_WatchAdd("*0x6851,x","ePWM2 DBFED");
-    GEL_WatchAdd("*0x6852,x","ePWM2 TZSEL");
-    GEL_WatchAdd("*0x6853,x","ePWM2 TZDCSEL");
-    GEL_WatchAdd("*0x6854,x","ePWM2 TZCTL");
-    GEL_WatchAdd("*0x6855,x","ePWM2 TZEINT");
-    GEL_WatchAdd("*0x6856,x","ePWM2 TZFLG");
-    GEL_WatchAdd("*0x6857,x","ePWM2 TZCLR");
-    GEL_WatchAdd("*0x6858,x","ePWM2 TZFRC");
-    GEL_WatchAdd("*0x6859,x","ePWM2 ETSEL");
-    GEL_WatchAdd("*0x685A,x","ePWM2 ETPS");
-    GEL_WatchAdd("*0x685B,x","ePWM2 ETFLG");
-    GEL_WatchAdd("*0x685C,x","ePWM2 ETCLR");
-    GEL_WatchAdd("*0x685D,x","ePWM2 ETFRC");
-    GEL_WatchAdd("*0x685E,x","ePWM2 PCCTL");
-    GEL_WatchAdd("*0x6860,x","ePWM2 HRCNFG");
-}
-hotmenu ePWM2_TB_Regs()
-{
-    GEL_WatchAdd("*0x6840,x","ePWM2 TBCTL");
-    GEL_WatchAdd("*0x6841,x","ePWM2 TBSTS");
-    GEL_WatchAdd("*0x6842,x","ePWM2 TBPHSHR");
-    GEL_WatchAdd("*0x6843,x","ePWM2 TBPHS");
-    GEL_WatchAdd("*0x6844,x","ePWM2 TBCTR");
-    GEL_WatchAdd("*0x6845,x","ePWM2 TBPRD");
-}
-hotmenu ePWM2_CMP_Regs()
-{
-    GEL_WatchAdd("*0x6847,x","ePWM2 CMPCTL");
-    GEL_WatchAdd("*0x6848,x","ePWM2 CMPAHR");
-    GEL_WatchAdd("*0x6849,x","ePWM2 CMPA");
-    GEL_WatchAdd("*0x684A,x","ePWM2 CMPB");
-}
-hotmenu ePWM2_AQ_Regs()
-{
-    GEL_WatchAdd("*0x684B,x","ePWM2 AQCTLA");
-    GEL_WatchAdd("*0x684C,x","ePWM2 AQCTLB");
-    GEL_WatchAdd("*0x684D,x","ePWM2 AQSFRC");
-    GEL_WatchAdd("*0x684E,x","ePWM2 AQCSFRC");
-}
-hotmenu ePWM2_DB_Regs()
-{
-    GEL_WatchAdd("*0x684F,x","ePWM2 DBCTL");
-    GEL_WatchAdd("*0x6850,x","ePWM2 DBRED");
-    GEL_WatchAdd("*0x6851,x","ePWM2 DBFED");
-}
-hotmenu ePWM2_TZ_Regs()
-{
-    GEL_WatchAdd("*0x6852,x","ePWM2 TZSEL");
-    GEL_WatchAdd("*0x6854,x","ePWM2 TZCTL");
-    GEL_WatchAdd("*0x6855,x","ePWM2 TZEINT");
-    GEL_WatchAdd("*0x6856,x","ePWM2 TZFLG");
-    GEL_WatchAdd("*0x6857,x","ePWM2 TZCLR");
-    GEL_WatchAdd("*0x6858,x","ePWM2 TZFRC");
-}
-hotmenu ePWM2_ET_Regs()
-{
-    GEL_WatchAdd("*0x6859,x","ePWM2 ETSEL");
-    GEL_WatchAdd("*0x685A,x","ePWM2 ETPS");
-    GEL_WatchAdd("*0x685B,x","ePWM2 ETFLG");
-    GEL_WatchAdd("*0x685C,x","ePWM2 ETCLR");
-    GEL_WatchAdd("*0x685D,x","ePWM2 ETFRC");
-}
-hotmenu ePWM3_All_Regs()
-{
-    GEL_WatchAdd("*0x6880,x","ePWM3 TBCTL");
-    GEL_WatchAdd("*0x6881,x","ePWM3 TBSTS");
-    GEL_WatchAdd("*0x6882,x","ePWM3 TBPHSHR");
-    GEL_WatchAdd("*0x6883,x","ePWM3 TBPHS");
-    GEL_WatchAdd("*0x6884,x","ePWM3 TBCTR");
-    GEL_WatchAdd("*0x6885,x","ePWM3 TBPRD");
-    GEL_WatchAdd("*0x6887,x","ePWM3 CMPCTL");
-    GEL_WatchAdd("*0x6888,x","ePWM3 CMPAHR");
-    GEL_WatchAdd("*0x6889,x","ePWM3 CMPA");
-    GEL_WatchAdd("*0x688A,x","ePWM3 CMPB");
-    GEL_WatchAdd("*0x688B,x","ePWM3 AQCTLA");
-    GEL_WatchAdd("*0x688C,x","ePWM3 AQCTLB");
-    GEL_WatchAdd("*0x688D,x","ePWM3 AQSFRC");
-    GEL_WatchAdd("*0x688E,x","ePWM3 AQCSFRC");
-    GEL_WatchAdd("*0x688F,x","ePWM3 DBCTL");
-    GEL_WatchAdd("*0x6890,x","ePWM3 DBRED");
-    GEL_WatchAdd("*0x6891,x","ePWM3 DBFED");
-    GEL_WatchAdd("*0x6892,x","ePWM3 TZSEL");
-    GEL_WatchAdd("*0x6893,x","ePWM3 TZDCSEL");
-    GEL_WatchAdd("*0x6894,x","ePWM3 TZCTL");
-    GEL_WatchAdd("*0x6895,x","ePWM3 TZEINT");
-    GEL_WatchAdd("*0x6896,x","ePWM3 TZFLG");
-    GEL_WatchAdd("*0x6897,x","ePWM3 TZCLR");
-    GEL_WatchAdd("*0x6898,x","ePWM3 TZFRC");
-    GEL_WatchAdd("*0x6899,x","ePWM3 ETSEL");
-    GEL_WatchAdd("*0x689A,x","ePWM3 ETPS");
-    GEL_WatchAdd("*0x689B,x","ePWM3 ETFLG");
-    GEL_WatchAdd("*0x689C,x","ePWM3 ETCLR");
-    GEL_WatchAdd("*0x689D,x","ePWM3 ETFRC");
-    GEL_WatchAdd("*0x689E,x","ePWM3 PCCTL");
-    GEL_WatchAdd("*0x68A0,x","ePWM3 HRCNFG");
-}
-hotmenu ePWM3_TB_Regs()
-{
-    GEL_WatchAdd("*0x6880,x","ePWM3 TBCTL");
-    GEL_WatchAdd("*0x6881,x","ePWM3 TBSTS");
-    GEL_WatchAdd("*0x6882,x","ePWM3 TBPHSHR");
-    GEL_WatchAdd("*0x6883,x","ePWM3 TBPHS");
-    GEL_WatchAdd("*0x6884,x","ePWM3 TBCTR");
-    GEL_WatchAdd("*0x6885,x","ePWM3 TBPRD");
-}
-hotmenu ePWM3_CMP_Regs()
-{
-    GEL_WatchAdd("*0x6887,x","ePWM3 CMPCTL");
-    GEL_WatchAdd("*0x6888,x","ePWM3 CMPAHR");
-    GEL_WatchAdd("*0x6889,x","ePWM3 CMPA");
-    GEL_WatchAdd("*0x688A,x","ePWM3 CMPB");
-}
-hotmenu ePWM3_AQ_Regs()
-{
-    GEL_WatchAdd("*0x688B,x","ePWM3 AQCTLA");
-    GEL_WatchAdd("*0x688C,x","ePWM3 AQCTLB");
-    GEL_WatchAdd("*0x688D,x","ePWM3 AQSFRC");
-    GEL_WatchAdd("*0x688E,x","ePWM3 AQCSFRC");
-}
-hotmenu ePWM3_DB_Regs()
-{
-    GEL_WatchAdd("*0x688F,x","ePWM3 DBCTL");
-    GEL_WatchAdd("*0x6890,x","ePWM3 DBRED");
-    GEL_WatchAdd("*0x6891,x","ePWM3 DBFED");
-}
-hotmenu ePWM3_TZ_Regs()
-{
-    GEL_WatchAdd("*0x6892,x","ePWM3 TZSEL");
-    GEL_WatchAdd("*0x6894,x","ePWM3 TZCTL");
-    GEL_WatchAdd("*0x6895,x","ePWM3 TZEINT");
-    GEL_WatchAdd("*0x6896,x","ePWM3 TZFLG");
-    GEL_WatchAdd("*0x6897,x","ePWM3 TZCLR");
-    GEL_WatchAdd("*0x6898,x","ePWM3 TZFRC");
-}
-hotmenu ePWM3_ET_Regs()
-{
-    GEL_WatchAdd("*0x6899,x","ePWM3 ETSEL");
-    GEL_WatchAdd("*0x689A,x","ePWM3 ETPS");
-    GEL_WatchAdd("*0x689B,x","ePWM3 ETFLG");
-    GEL_WatchAdd("*0x689C,x","ePWM3 ETCLR");
-    GEL_WatchAdd("*0x689D,x","ePWM3 ETFRC");
-}
-hotmenu ePWM4_All_Regs()
-{
-    GEL_WatchAdd("*0x68C0,x","ePWM4 TBCTL");
-    GEL_WatchAdd("*0x68C1,x","ePWM4 TBSTS");
-    GEL_WatchAdd("*0x68C2,x","ePWM4 TBPHSHR");
-    GEL_WatchAdd("*0x68C3,x","ePWM4 TBPHS");
-    GEL_WatchAdd("*0x68C4,x","ePWM4 TBCTR");
-    GEL_WatchAdd("*0x68C5,x","ePWM4 TBPRD");
-    GEL_WatchAdd("*0x68C7,x","ePWM4 CMPCTL");
-    GEL_WatchAdd("*0x68C8,x","ePWM4 CMPAHR");
-    GEL_WatchAdd("*0x68C9,x","ePWM4 CMPA");
-    GEL_WatchAdd("*0x68CA,x","ePWM4 CMPB");
-    GEL_WatchAdd("*0x68CB,x","ePWM4 AQCTLA");
-    GEL_WatchAdd("*0x68CC,x","ePWM4 AQCTLB");
-    GEL_WatchAdd("*0x68CD,x","ePWM4 AQSFRC");
-    GEL_WatchAdd("*0x68CE,x","ePWM4 AQCSFRC");
-    GEL_WatchAdd("*0x68CF,x","ePWM4 DBCTL");
-    GEL_WatchAdd("*0x68D0,x","ePWM4 DBRED");
-    GEL_WatchAdd("*0x68D1,x","ePWM4 DBFED");
-    GEL_WatchAdd("*0x68D2,x","ePWM4 TZSEL");
-    GEL_WatchAdd("*0x68D3,x","ePWM4 TZDCSEL");
-    GEL_WatchAdd("*0x68D4,x","ePWM4 TZCTL");
-    GEL_WatchAdd("*0x68D5,x","ePWM4 TZEINT");
-    GEL_WatchAdd("*0x68D6,x","ePWM4 TZFLG");
-    GEL_WatchAdd("*0x68D7,x","ePWM4 TZCLR");
-    GEL_WatchAdd("*0x68D8,x","ePWM4 TZFRC");
-    GEL_WatchAdd("*0x68D9,x","ePWM4 ETSEL");
-    GEL_WatchAdd("*0x68DA,x","ePWM4 ETPS");
-    GEL_WatchAdd("*0x68DB,x","ePWM4 ETFLG");
-    GEL_WatchAdd("*0x68DC,x","ePWM4 ETCLR");
-    GEL_WatchAdd("*0x68DD,x","ePWM4 ETFRC");
-    GEL_WatchAdd("*0x68DE,x","ePWM4 PCCTL");
-    GEL_WatchAdd("*0x68E0,x","ePWM4 HRCNFG");
-}
-hotmenu ePWM4_TB_Regs()
-{
-    GEL_WatchAdd("*0x68C0,x","ePWM4 TBCTL");
-    GEL_WatchAdd("*0x68C1,x","ePWM4 TBSTS");
-    GEL_WatchAdd("*0x68C2,x","ePWM4 TBPHSHR");
-    GEL_WatchAdd("*0x68C3,x","ePWM4 TBPHS");
-    GEL_WatchAdd("*0x68C4,x","ePWM4 TBCTR");
-    GEL_WatchAdd("*0x68C5,x","ePWM4 TBPRD");
-}
-hotmenu ePWM4_CMP_Regs()
-{
-    GEL_WatchAdd("*0x68C7,x","ePWM4 CMPCTL");
-    GEL_WatchAdd("*0x68C8,x","ePWM4 CMPAHR");
-    GEL_WatchAdd("*0x68C9,x","ePWM4 CMPA");
-    GEL_WatchAdd("*0x68CA,x","ePWM4 CMPB");
-}
-hotmenu ePWM4_AQ_Regs()
-{
-    GEL_WatchAdd("*0x68CB,x","ePWM4 AQCTLA");
-    GEL_WatchAdd("*0x68CC,x","ePWM4 AQCTLB");
-    GEL_WatchAdd("*0x68CD,x","ePWM4 AQSFRC");
-    GEL_WatchAdd("*0x68CE,x","ePWM4 AQCSFRC");
-}
-hotmenu ePWM4_DB_Regs()
-{
-    GEL_WatchAdd("*0x68CF,x","ePWM4 DBCTL");
-    GEL_WatchAdd("*0x68D0,x","ePWM4 DBRED");
-    GEL_WatchAdd("*0x68D1,x","ePWM4 DBFED"); 
-}
-hotmenu ePWM4_TZ_Regs()
-{
-    GEL_WatchAdd("*0x68D2,x","ePWM4 TZSEL");
-    GEL_WatchAdd("*0x68D4,x","ePWM4 TZCTL");
-    GEL_WatchAdd("*0x68D5,x","ePWM4 TZEINT");
-    GEL_WatchAdd("*0x68D6,x","ePWM4 TZFLG");
-    GEL_WatchAdd("*0x68D7,x","ePWM4 TZCLR");
-    GEL_WatchAdd("*0x68D8,x","ePWM4 TZFRC");
-}
-hotmenu ePWM4_ET_Regs()
-{
-    GEL_WatchAdd("*0x68D9,x","ePWM4 ETSEL");
-    GEL_WatchAdd("*0x68DA,x","ePWM4 ETPS");
-    GEL_WatchAdd("*0x68DB,x","ePWM4 ETFLG");
-    GEL_WatchAdd("*0x68DC,x","ePWM4 ETCLR");
-    GEL_WatchAdd("*0x68DD,x","ePWM4 ETFRC");
-}
-hotmenu ePWM5_All_Regs()
-{
-    GEL_WatchAdd("*0x6900,x","ePWM5 TBCTL");
-    GEL_WatchAdd("*0x6901,x","ePWM5 TBSTS");
-    GEL_WatchAdd("*0x6902,x","ePWM5 TBPHSHR");
-    GEL_WatchAdd("*0x6903,x","ePWM5 TBPHS");
-    GEL_WatchAdd("*0x6904,x","ePWM5 TBCTR");
-    GEL_WatchAdd("*0x6905,x","ePWM5 TBPRD");
-    GEL_WatchAdd("*0x6907,x","ePWM5 CMPCTL");
-    GEL_WatchAdd("*0x6908,x","ePWM5 CMPAHR");
-    GEL_WatchAdd("*0x6909,x","ePWM5 CMPA");
-    GEL_WatchAdd("*0x690A,x","ePWM5 CMPB");
-    GEL_WatchAdd("*0x690B,x","ePWM5 AQCTLA");
-    GEL_WatchAdd("*0x690C,x","ePWM5 AQCTLB");
-    GEL_WatchAdd("*0x690D,x","ePWM5 AQSFRC");
-    GEL_WatchAdd("*0x690E,x","ePWM5 AQCSFRC");
-    GEL_WatchAdd("*0x690F,x","ePWM5 DBCTL");
-    GEL_WatchAdd("*0x6910,x","ePWM5 DBRED");
-    GEL_WatchAdd("*0x6911,x","ePWM5 DBFED");
-    GEL_WatchAdd("*0x6912,x","ePWM5 TZSEL");
-    GEL_WatchAdd("*0x6913,x","ePWM5 TZDCSEL");
-    GEL_WatchAdd("*0x6914,x","ePWM5 TZCTL");
-    GEL_WatchAdd("*0x6915,x","ePWM5 TZEINT");
-    GEL_WatchAdd("*0x6916,x","ePWM5 TZFLG");
-    GEL_WatchAdd("*0x6917,x","ePWM5 TZCLR");
-    GEL_WatchAdd("*0x6918,x","ePWM5 TZFRC");
-    GEL_WatchAdd("*0x6919,x","ePWM5 ETSEL");
-    GEL_WatchAdd("*0x691A,x","ePWM5 ETPS");
-    GEL_WatchAdd("*0x691B,x","ePWM5 ETFLG");
-    GEL_WatchAdd("*0x691C,x","ePWM5 ETCLR");
-    GEL_WatchAdd("*0x691D,x","ePWM5 ETFRC");
-    GEL_WatchAdd("*0x691E,x","ePWM5 PCCTL");
-    GEL_WatchAdd("*0x6920,x","ePWM5 HRCNFG");
-}
-hotmenu ePWM5_TB_Regs()
-{
-    GEL_WatchAdd("*0x6900,x","ePWM5 TBCTL");
-    GEL_WatchAdd("*0x6901,x","ePWM5 TBSTS");
-    GEL_WatchAdd("*0x6902,x","ePWM5 TBPHSHR");
-    GEL_WatchAdd("*0x6903,x","ePWM5 TBPHS");
-    GEL_WatchAdd("*0x6904,x","ePWM5 TBCTR");
-    GEL_WatchAdd("*0x6905,x","ePWM5 TBPRD");
-}
-hotmenu ePWM5_CMP_Regs()
-{
-    GEL_WatchAdd("*0x6907,x","ePWM5 CMPCTL");
-    GEL_WatchAdd("*0x6908,x","ePWM5 CMPAHR");
-    GEL_WatchAdd("*0x6909,x","ePWM5 CMPA");
-    GEL_WatchAdd("*0x690A,x","ePWM5 CMPB");
-}
-hotmenu ePWM5_AQ_Regs()
-{
-    GEL_WatchAdd("*0x690B,x","ePWM5 AQCTLA");
-    GEL_WatchAdd("*0x690C,x","ePWM5 AQCTLB");
-    GEL_WatchAdd("*0x690D,x","ePWM5 AQSFRC");
-    GEL_WatchAdd("*0x690E,x","ePWM5 AQCSFRC");
-}
-hotmenu ePWM5_DB_Regs()
-{
-    GEL_WatchAdd("*0x690F,x","ePWM5 DBCTL");
-    GEL_WatchAdd("*0x6910,x","ePWM5 DBRED");
-    GEL_WatchAdd("*0x6911,x","ePWM5 DBFED"); 
-}
-hotmenu ePWM5_TZ_Regs()
-{
-    GEL_WatchAdd("*0x6912,x","ePWM5 TZSEL");
-    GEL_WatchAdd("*0x6914,x","ePWM5 TZCTL");
-    GEL_WatchAdd("*0x6915,x","ePWM5 TZEINT");
-    GEL_WatchAdd("*0x6916,x","ePWM5 TZFLG");
-    GEL_WatchAdd("*0x6917,x","ePWM5 TZCLR");
-    GEL_WatchAdd("*0x6918,x","ePWM5 TZFRC");
-}
-hotmenu ePWM5_ET_Regs()
-{
-    GEL_WatchAdd("*0x6919,x","ePWM5 ETSEL");
-    GEL_WatchAdd("*0x691A,x","ePWM5 ETPS");
-    GEL_WatchAdd("*0x691B,x","ePWM5 ETFLG");
-    GEL_WatchAdd("*0x691C,x","ePWM5 ETCLR");
-    GEL_WatchAdd("*0x691D,x","ePWM5 ETFRC");
-}
-hotmenu ePWM6_All_Regs()
-{
-    GEL_WatchAdd("*0x6940,x","ePWM6 TBCTL");
-    GEL_WatchAdd("*0x6941,x","ePWM6 TBSTS");
-    GEL_WatchAdd("*0x6942,x","ePWM6 TBPHSHR");
-    GEL_WatchAdd("*0x6943,x","ePWM6 TBPHS");
-    GEL_WatchAdd("*0x6944,x","ePWM6 TBCTR");
-    GEL_WatchAdd("*0x6945,x","ePWM6 TBPRD");
-    GEL_WatchAdd("*0x6947,x","ePWM6 CMPCTL");
-    GEL_WatchAdd("*0x6948,x","ePWM6 CMPAHR");
-    GEL_WatchAdd("*0x6949,x","ePWM6 CMPA");
-    GEL_WatchAdd("*0x694A,x","ePWM6 CMPB");
-    GEL_WatchAdd("*0x694B,x","ePWM6 AQCTLA");
-    GEL_WatchAdd("*0x694C,x","ePWM6 AQCTLB");
-    GEL_WatchAdd("*0x694D,x","ePWM6 AQSFRC");
-    GEL_WatchAdd("*0x694E,x","ePWM6 AQCSFRC");
-    GEL_WatchAdd("*0x694F,x","ePWM6 DBCTL");
-    GEL_WatchAdd("*0x6950,x","ePWM6 DBRED");
-    GEL_WatchAdd("*0x6951,x","ePWM6 DBFED");
-    GEL_WatchAdd("*0x6952,x","ePWM6 TZSEL");
-    GEL_WatchAdd("*0x6953,x","ePWM6 TZDCSEL");
-    GEL_WatchAdd("*0x6954,x","ePWM6 TZCTL");
-    GEL_WatchAdd("*0x6955,x","ePWM6 TZEINT");
-    GEL_WatchAdd("*0x6956,x","ePWM6 TZFLG");
-    GEL_WatchAdd("*0x6957,x","ePWM6 TZCLR");
-    GEL_WatchAdd("*0x6958,x","ePWM6 TZFRC");
-    GEL_WatchAdd("*0x6959,x","ePWM6 ETSEL");
-    GEL_WatchAdd("*0x695A,x","ePWM6 ETPS");
-    GEL_WatchAdd("*0x695B,x","ePWM6 ETFLG");
-    GEL_WatchAdd("*0x695C,x","ePWM6 ETCLR");
-    GEL_WatchAdd("*0x695D,x","ePWM6 ETFRC");
-    GEL_WatchAdd("*0x695E,x","ePWM6 PCCTL");
-    GEL_WatchAdd("*0x6960,x","ePWM6 HRCNFG");
-
-}
-hotmenu ePWM6_TB_Regs()
-{
-    GEL_WatchAdd("*0x6940,x","ePWM6 TBCTL");
-    GEL_WatchAdd("*0x6941,x","ePWM6 TBSTS");
-    GEL_WatchAdd("*0x6942,x","ePWM6 TBPHSHR");
-    GEL_WatchAdd("*0x6943,x","ePWM6 TBPHS");
-    GEL_WatchAdd("*0x6944,x","ePWM6 TBCTR");
-    GEL_WatchAdd("*0x6945,x","ePWM6 TBPRD");
-}
-hotmenu ePWM6_CMP_Regs()
-{
-    GEL_WatchAdd("*0x6947,x","ePWM6 CMPCTL");
-    GEL_WatchAdd("*0x6948,x","ePWM6 CMPAHR");
-    GEL_WatchAdd("*0x6949,x","ePWM6 CMPA");
-    GEL_WatchAdd("*0x694A,x","ePWM6 CMPB");
-}
-hotmenu ePWM6_AQ_Regs()
-{
-    GEL_WatchAdd("*0x694B,x","ePWM6 AQCTLA");
-    GEL_WatchAdd("*0x694C,x","ePWM6 AQCTLB");
-    GEL_WatchAdd("*0x694D,x","ePWM6 AQSFRC");
-    GEL_WatchAdd("*0x694E,x","ePWM6 AQCSFRC");
-}
-hotmenu ePWM6_DB_Regs()
-{
-    GEL_WatchAdd("*0x694F,x","ePWM6 DBCTL");
-    GEL_WatchAdd("*0x6950,x","ePWM6 DBRED");
-    GEL_WatchAdd("*0x6951,x","ePWM6 DBFED");
-}
-hotmenu ePWM6_TZ_Regs()
-{
-    GEL_WatchAdd("*0x6952,x","ePWM6 TZSEL");
-    GEL_WatchAdd("*0x6954,x","ePWM6 TZCTL");
-    GEL_WatchAdd("*0x6955,x","ePWM6 TZEINT");
-    GEL_WatchAdd("*0x6956,x","ePWM6 TZFLG");
-    GEL_WatchAdd("*0x6957,x","ePWM6 TZCLR");
-    GEL_WatchAdd("*0x6958,x","ePWM6 TZFRC");
-}
-hotmenu ePWM6_ET_Regs()
-{
-    GEL_WatchAdd("*0x6959,x","ePWM6 ETSEL");
-    GEL_WatchAdd("*0x695A,x","ePWM6 ETPS");
-    GEL_WatchAdd("*0x695B,x","ePWM6 ETFLG");
-    GEL_WatchAdd("*0x695C,x","ePWM6 ETCLR");
-    GEL_WatchAdd("*0x695D,x","ePWM6 ETFRC");
-}
-
-
-/********************************************************************/
-/* Enhanced EQEP Registers                                          */
-/********************************************************************/
-menuitem "Watch eQEP"
-
-hotmenu eQEP1_All_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6B00,x","eQEP1 QPOSCNT");
-    GEL_WatchAdd("*(long *)0x6B02,x","eQEP1 QPOSINIT");
-    GEL_WatchAdd("*(long *)0x6B04,x","eQEP1 QPOSMAX");
-    GEL_WatchAdd("*(long *)0x6B06,x","eQEP1 QPOSCMP");
-    GEL_WatchAdd("*(long *)0x6B08,x","eQEP1 QPOSILAT");
-    GEL_WatchAdd("*(long *)0x6B0A,x","eQEP1 QPOSSLAT");
-    GEL_WatchAdd("*(long *)0x6B0C,x","eQEP1 QPOSLAT");
-    GEL_WatchAdd("*(long *)0x6B0E,x","eQEP1 QUTMR");
-    GEL_WatchAdd("*(long *)0x6B10,x","eQEP1 QUPRD");
-    GEL_WatchAdd("*0x6B12,x","eQEP1 QWDTMR");
-    GEL_WatchAdd("*0x6B13,x","eQEP1 QWDPRD");
-    GEL_WatchAdd("*0x6B14,x","eQEP1 QDECCTL");
-    GEL_WatchAdd("*0x6B15,x","eQEP1 QEPCTL");
-    GEL_WatchAdd("*0x6B16,x","eQEP1 QCAPCTL");
-    GEL_WatchAdd("*0x6B17,x","eQEP1 QPOSCTL");
-    GEL_WatchAdd("*0x6B18,x","eQEP1 QEINT");
-    GEL_WatchAdd("*0x6B19,x","eQEP1 QFLG");
-    GEL_WatchAdd("*0x6B1A,x","eQEP1 QCLR");
-    GEL_WatchAdd("*0x6B1B,x","eQEP1 QFRC");
-    GEL_WatchAdd("*0x6B1C,x","eQEP1 QEPSTS");
-    GEL_WatchAdd("*0x6B1D,x","eQEP1 QCTMR");
-    GEL_WatchAdd("*0x6B1E,x","eQEP1 QCPRD");
-    GEL_WatchAdd("*0x6B1F,x","eQEP1 QCTMRLAT");
-    GEL_WatchAdd("*0x6B20,x","eQEP1 QCPRDLAT");
-}
-hotmenu eQEP2_All_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6B40,x","eQEP2 QPOSCNT");
-    GEL_WatchAdd("*(long *)0x6B42,x","eQEP2 QPOSINIT");
-    GEL_WatchAdd("*(long *)0x6B44,x","eQEP2 QPOSMAX");
-    GEL_WatchAdd("*(long *)0x6B46,x","eQEP2 QPOSCMP");
-    GEL_WatchAdd("*(long *)0x6B48,x","eQEP2 QPOSILAT");
-    GEL_WatchAdd("*(long *)0x6B4A,x","eQEP2 QPOSSLAT");
-    GEL_WatchAdd("*(long *)0x6B4C,x","eQEP2 QPOSLAT");
-    GEL_WatchAdd("(long *)*0x6B4E,x","eQEP2 QUTMR");
-    GEL_WatchAdd("*(long *)0x6B50,x","eQEP2 QUPRD");
-    GEL_WatchAdd("*0x6B52,x","eQEP2 QWDTMR");
-    GEL_WatchAdd("*0x6B53,x","eQEP2 QWDPRD");
-    GEL_WatchAdd("*0x6B54,x","eQEP2 QDECCTL");
-    GEL_WatchAdd("*0x6B55,x","eQEP2 QEPCTL");
-    GEL_WatchAdd("*0x6B56,x","eQEP2 QCAPCTL");
-    GEL_WatchAdd("*0x6B57,x","eQEP2 QPOSCTL");
-    GEL_WatchAdd("*0x6B58,x","eQEP2 QEINT");
-    GEL_WatchAdd("*0x6B59,x","eQEP2 QFLG");
-    GEL_WatchAdd("*0x6B5A,x","eQEP2 QCLR");
-    GEL_WatchAdd("*0x6B5B,x","eQEP2 QFRC");
-    GEL_WatchAdd("*0x6B5C,x","eQEP2 QEPSTS");
-    GEL_WatchAdd("*0x6B5D,x","eQEP2 QCTMR");
-    GEL_WatchAdd("*0x6B5E,x","eQEP2 QCPRD");
-    GEL_WatchAdd("*0x6B5F,x","eQEP2 QCTMRLAT");
-    GEL_WatchAdd("*0x6B60,x","eQEP2 QCPRDLAT");
-}
-
-
-/********************************************************************/
-/* External Interface Registers                                     */
-/********************************************************************/
-menuitem "Watch External Interface Registers";
-
-hotmenu All_External_Interface_Regs()
-{
-    GEL_WatchAdd("*(long *)0x0B20,x","XTIMING0");
-    GEL_WatchAdd("*(long *)0x0B2C,x","XTIMING6");
-    GEL_WatchAdd("*(long *)0x0B2E,x","XTIMING7");
-    GEL_WatchAdd("*(long *)0x0B34,x","XINTCNF2");
-    GEL_WatchAdd("*0x0B38,x","XBANK");
-    GEL_WatchAdd("*0x0B3A,x","XREVISION");
-    GEL_WatchAdd("*0x0B3D,x","XRESET");
-}
-
-/********************************************************************/
-/* External Interrupt Registers                                     */
-/********************************************************************/
-menuitem "Watch External Interrupt Registers";
-
-hotmenu All_XINT_Regs()
-{
-    GEL_WatchAdd("*0x7070,x","XINT1CR");
-    GEL_WatchAdd("*0x7071,x","XINT2CR");
-    GEL_WatchAdd("*0x7072,x","XINT3CR");
-    GEL_WatchAdd("*0x7073,x","XINT4CR");
-    GEL_WatchAdd("*0x7074,x","XINT5CR");
-    GEL_WatchAdd("*0x7075,x","XINT6CR");
-    GEL_WatchAdd("*0x7076,x","XINT7CR");
-    GEL_WatchAdd("*0x7077,x","XNMICR");
-    GEL_WatchAdd("*0x7078,x","XINT1CTR");
-    GEL_WatchAdd("*0x7079,x","XINT2CTR");
-    GEL_WatchAdd("*0x707F,x","XNMICTR");
-}
-hotmenu XINT_Control_Regs()
-{
-    GEL_WatchAdd("*0x7070,x","XINT1CR");
-    GEL_WatchAdd("*0x7071,x","XINT2CR");
-    GEL_WatchAdd("*0x7072,x","XINT3CR");
-    GEL_WatchAdd("*0x7073,x","XINT4CR");
-    GEL_WatchAdd("*0x7074,x","XINT5CR");
-    GEL_WatchAdd("*0x7075,x","XINT6CR");
-    GEL_WatchAdd("*0x7076,x","XINT7CR");
-    GEL_WatchAdd("*0x7077,x","XNMICR");
-}
-hotmenu XINT_Counter_Regs()
-{
-    GEL_WatchAdd("*0x7078,x","XINT1CTR");
-    GEL_WatchAdd("*0x7079,x","XINT2CTR");
-    GEL_WatchAdd("*0x707F,x","XNMICTR");
-}
-
-
-/********************************************************************/
-/* FPU Registers                                                    */
-/********************************************************************/
-menuitem "Watch FPU Registers"
-
-hotmenu All_FPU_Single_Precision_Regs()
-{
-    GEL_WatchAdd("RB");
-    GEL_WatchAdd("STF");
-    GEL_WatchAdd("R0H");
-    GEL_WatchAdd("R1H");
-    GEL_WatchAdd("R2H");
-    GEL_WatchAdd("R3H");
-    GEL_WatchAdd("R4H");
-    GEL_WatchAdd("R5H");
-    GEL_WatchAdd("R6H");
-    GEL_WatchAdd("R7H");
-}
-
-
-/********************************************************************/
-/* GPIO Registers                                                   */
-/********************************************************************/
-menuitem "Watch GPIO Registers";
-
-hotmenu All_GPIO_CONTROL_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6F80,x","GPACTRL");
-    GEL_WatchAdd("*(long *)0x6F82,x","GPAQSEL1");
-    GEL_WatchAdd("*(long *)0x6F84,x","GPAQSEL2");
-    GEL_WatchAdd("*(long *)0x6F86,x","GPAMUX1");
-    GEL_WatchAdd("*(long *)0x6F88,x","GPAMUX2");
-    GEL_WatchAdd("*(long *)0x6F8A,x","GPADIR");
-    GEL_WatchAdd("*(long *)0x6F8C,x","GPAPUD");
-
-    GEL_WatchAdd("*(long *)0x6F90,x","GPBCTRL");
-    GEL_WatchAdd("*(long *)0x6F92,x","GPBQSEL1");
-    GEL_WatchAdd("*(long *)0x6F94,x","GPBQSEL2");
-    GEL_WatchAdd("*(long *)0x6F96,x","GPBMUX1");
-    GEL_WatchAdd("*(long *)0x6F98,x","GPBMUX2");
-    GEL_WatchAdd("*(long *)0x6F9A,x","GPBDIR");
-    GEL_WatchAdd("*(long *)0x6F9C,x","GPBPUD");
-
-    GEL_WatchAdd("*(long *)0x6FA6,x","GPCMUX1");
-    GEL_WatchAdd("*(long *)0x6FA8,x","GPCMUX2");
-    GEL_WatchAdd("*(long *)0x6FAA,x","GPCDIR");
-    GEL_WatchAdd("*(long *)0x6FAC,x","GPCPUD");
-}
-hotmenu All_GPIO_DATA_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6FC0,x","GPADAT");
-    GEL_WatchAdd("*(long *)0x6FC2,x","GPASET");
-    GEL_WatchAdd("*(long *)0x6FC4,x","GPACLEAR");
-    GEL_WatchAdd("*(long *)0x6FC6,x","GPATOGGLE");
-    
-    GEL_WatchAdd("*(long *)0x6FC8,x","GPBDAT");
-    GEL_WatchAdd("*(long *)0x6FCA,x","GPBSET");
-    GEL_WatchAdd("*(long *)0x6FCC,x","GPBCLEAR");
-    GEL_WatchAdd("*(long *)0x6FCE,x","GPBTOGGLE");
-
-    GEL_WatchAdd("*(long *)0x6FD0,x","GPCDAT");
-    GEL_WatchAdd("*(long *)0x6FD2,x","GPCSET");
-    GEL_WatchAdd("*(long *)0x6FD4,x","GPCCLEAR");
-    GEL_WatchAdd("*(long *)0x6FD6,x","GPCTOGGLE");
-}
-hotmenu All_GPIO_INTERRUPT_Regs()
-{
-    GEL_WatchAdd("*0x6FE0,x","GPIOXINT1SEL");
-    GEL_WatchAdd("*0x6FE1,x","GPIOXINT2SEL");
-    GEL_WatchAdd("*0x6FE2,x","GPIOXNMISEL");
-    GEL_WatchAdd("*0x6FE3,x","GPIOXINT3SEL");
-    GEL_WatchAdd("*0x6FE4,x","GPIOXINT4SEL");
-    GEL_WatchAdd("*0x6FE5,x","GPIOXINT5SEL");
-    GEL_WatchAdd("*0x6FE6,x","GPIOXINT6SEL");
-    GEL_WatchAdd("*0x6FE7,x","GPIOXINT7SEL");
-    GEL_WatchAdd("*(long *)0x6FE8,x","GPIOLPMSEL");
-}
-hotmenu All_GPA_Registers()
-{
-    GEL_WatchAdd("*(long *)0x6F80,x","GPACTRL");
-    GEL_WatchAdd("*(long *)0x6F82,x","GPAQSEL1");
-    GEL_WatchAdd("*(long *)0x6F84,x","GPAQSEL2");
-    GEL_WatchAdd("*(long *)0x6F86,x","GPAMUX1");
-    GEL_WatchAdd("*(long *)0x6F88,x","GPAMUX2");
-    GEL_WatchAdd("*(long *)0x6F8A,x","GPADIR");
-    GEL_WatchAdd("*(long *)0x6F8C,x","GPAPUD");
-    
-    GEL_WatchAdd("*(long *)0x6FC0,x","GPADAT");
-    GEL_WatchAdd("*(long *)0x6FC2,x","GPASET");
-    GEL_WatchAdd("*(long *)0x6FC4,x","GPACLEAR");
-    GEL_WatchAdd("*(long *)0x6FC6,x","GPATOGGLE");
-}
-hotmenu All_GPB_Registers()
-{
-    GEL_WatchAdd("*(long *)0x6F90,x","GPBCTRL");
-    GEL_WatchAdd("*(long *)0x6F92,x","GPBQSEL1");
-    GEL_WatchAdd("*(long *)0x6F94,x","GPBQSEL2");
-    GEL_WatchAdd("*(long *)0x6F96,x","GPBMUX1");
-    GEL_WatchAdd("*(long *)0x6F98,x","GPBMUX2");
-    GEL_WatchAdd("*(long *)0x6F9A,x","GPBDIR");
-    GEL_WatchAdd("*(long *)0x6F9C,x","GPBPUD");
-
-    GEL_WatchAdd("*(long *)0x6FC8,x","GPBDAT");
-    GEL_WatchAdd("*(long *)0x6FCA,x","GPBSET");
-    GEL_WatchAdd("*(long *)0x6FCC,x","GPBCLEAR");
-    GEL_WatchAdd("*(long *)0x6FCE,x","GPBTOGGLE");
-}
-hotmenu All_GPC_Registers()
-{
-    GEL_WatchAdd("*(long *)0x6FA6,x","GPCMUX1");
-    GEL_WatchAdd("*(long *)0x6FA8,x","GPCMUX2");
-    GEL_WatchAdd("*(long *)0x6FAA,x","GPCDIR");
-    GEL_WatchAdd("*(long *)0x6FAC,x","GPCPUD");
-
-    GEL_WatchAdd("*(long *)0x6FC8,x","GPBDAT");
-    GEL_WatchAdd("*(long *)0x6FCA,x","GPBSET");
-    GEL_WatchAdd("*(long *)0x6FCC,x","GPBCLEAR");
-    GEL_WatchAdd("*(long *)0x6FCE,x","GPBTOGGLE");
-
-    GEL_WatchAdd("*(long *)0x6FD0,x","GPCDAT");
-    GEL_WatchAdd("*(long *)0x6FD2,x","GPCSET");
-    GEL_WatchAdd("*(long *)0x6FD4,x","GPCCLEAR");
-    GEL_WatchAdd("*(long *)0x6FD6,x","GPCTOGGLE");
-}
-
-
-/********************************************************************/
-/* Multichannel Serial Port Registers                               */
-/********************************************************************/
-menuitem "Watch McBSP Registers";
-
-hotmenu All_McBSP_A_Regs()
-{
-    GEL_WatchAdd("*0x5000,x","McBSPA DRR2");
-    GEL_WatchAdd("*0x5001,x","McBSPA DRR1");
-    GEL_WatchAdd("*0x5002,x","McBSPA DXR2");
-    GEL_WatchAdd("*0x5003,x","McBSPA DXR1");
-    GEL_WatchAdd("*0x5004,x","McBSPA SPCR2");
-    GEL_WatchAdd("*0x5005,x","McBSPA SPCR1");
-    GEL_WatchAdd("*0x5006,x","McBSPA RCR2");
-    GEL_WatchAdd("*0x5007,x","McBSPA RCR1");
-    GEL_WatchAdd("*0x5008,x","McBSPA XCR2");
-    GEL_WatchAdd("*0x5009,x","McBSPA XCR1");
-    GEL_WatchAdd("*0x500A,x","McBSPA SRGR2");
-    GEL_WatchAdd("*0x500B,x","McBSPA SRGR1");
-    GEL_WatchAdd("*0x500C,x","McBSPA MCR2");
-    GEL_WatchAdd("*0x500D,x","McBSPA MCR1");
-    GEL_WatchAdd("*0x500E,x","McBSPA RCERA");
-    GEL_WatchAdd("*0x500F,x","McBSPA RCERB");
-    GEL_WatchAdd("*0x5010,x","McBSPA XCERA");
-    GEL_WatchAdd("*0x5011,x","McBSPA XCERB");
-    GEL_WatchAdd("*0x5012,x","McBSPA PCR1");
-    GEL_WatchAdd("*0x5013,x","McBSPA RCERC");
-    GEL_WatchAdd("*0x5014,x","McBSPA RCERD");
-    GEL_WatchAdd("*0x5015,x","McBSPA XCERC");
-    GEL_WatchAdd("*0x5016,x","McBSPA XCERD");
-    GEL_WatchAdd("*0x5017,x","McBSPA RCERE");
-    GEL_WatchAdd("*0x5018,x","McBSPA RCERF");
-    GEL_WatchAdd("*0x5019,x","McBSPA XCERE");
-    GEL_WatchAdd("*0x501A,x","McBSPA XCERF");
-    GEL_WatchAdd("*0x501B,x","McBSPA RCERG");
-    GEL_WatchAdd("*0x501C,x","McBSPA RCERH");
-    GEL_WatchAdd("*0x501D,x","McBSPA XCERG");
-    GEL_WatchAdd("*0x501E,x","McBSPA XCERH");
-    GEL_WatchAdd("*0x5023,x","McBSPA MFFINT");
-    GEL_WatchAdd("*0x503F,x","McBSPA Revision");
-}
-
-hotmenu All_McBSP_B_Regs()
-{
-    GEL_WatchAdd("*0x5040,x","McBSPB DRR2");
-    GEL_WatchAdd("*0x5041,x","McBSPB DRR1");
-    GEL_WatchAdd("*0x5042,x","McBSPB DXR2");
-    GEL_WatchAdd("*0x5043,x","McBSPB DXR1");
-    GEL_WatchAdd("*0x5044,x","McBSPB SPCR2");
-    GEL_WatchAdd("*0x5045,x","McBSPB SPCR1");
-    GEL_WatchAdd("*0x5046,x","McBSPB RCR2");
-    GEL_WatchAdd("*0x5047,x","McBSPB RCR1");
-    GEL_WatchAdd("*0x5048,x","McBSPB XCR2");
-    GEL_WatchAdd("*0x5049,x","McBSPB XCR1");
-    GEL_WatchAdd("*0x504A,x","McBSPB SRGR2");
-    GEL_WatchAdd("*0x504B,x","McBSPB SRGR1");
-    GEL_WatchAdd("*0x504C,x","McBSPB MCR2");
-    GEL_WatchAdd("*0x504D,x","McBSPB MCR1");
-    GEL_WatchAdd("*0x504E,x","McBSPB RCERA");
-    GEL_WatchAdd("*0x504F,x","McBSPB RCERB");
-    GEL_WatchAdd("*0x5050,x","McBSPB XCERA");
-    GEL_WatchAdd("*0x5051,x","McBSPB XCERB");
-    GEL_WatchAdd("*0x5052,x","McBSPB PCR1");
-    GEL_WatchAdd("*0x5053,x","McBSPB RCERC");
-    GEL_WatchAdd("*0x5054,x","McBSPB RCERD");
-    GEL_WatchAdd("*0x5055,x","McBSPB XCERC");
-    GEL_WatchAdd("*0x5056,x","McBSPB XCERD");
-    GEL_WatchAdd("*0x5057,x","McBSPB RCERE");
-    GEL_WatchAdd("*0x5058,x","McBSPB RCERF");
-    GEL_WatchAdd("*0x5059,x","McBSPB XCERE");
-    GEL_WatchAdd("*0x505A,x","McBSPB XCERF");
-    GEL_WatchAdd("*0x505B,x","McBSPB RCERG");
-    GEL_WatchAdd("*0x505C,x","McBSPB RCERH");
-    GEL_WatchAdd("*0x505D,x","McBSPB XCERG");
-    GEL_WatchAdd("*0x505E,x","McBSPB XCERH");
-    GEL_WatchAdd("*0x5063,x","McBSPB MFFINT");
-    GEL_WatchAdd("*0x506F,x","McBSPB Revision");
-}
-
-
-
-/********************************************************************/
-/* I2C Registers                                                    */
-/********************************************************************/
-menuitem "Watch I2C Registers";
-
-hotmenu All_I2C_Regs()
-{
-    GEL_WatchAdd("*0x7900,x","I2COAR");
-    GEL_WatchAdd("*0x7901,x","I2CIER");
-    GEL_WatchAdd("*0x7902,x","I2CSTR");
-    GEL_WatchAdd("*0x7903,x","I2CCLKL");
-    GEL_WatchAdd("*0x7904,x","I2CCLKH");
-    GEL_WatchAdd("*0x7905,x","I2CCNT");
-    GEL_WatchAdd("*0x7906,x","I2CDRR");
-    GEL_WatchAdd("*0x7907,x","I2CSAR");
-    GEL_WatchAdd("*0x7908,x","I2CDXR");
-    GEL_WatchAdd("*0x7909,x","I2CMDR");
-    GEL_WatchAdd("*0x790A,x","I2CISRC");
-    GEL_WatchAdd("*0x790C,x","I2CPSC");
-    GEL_WatchAdd("*0x7920,x","I2CFFTX");
-    GEL_WatchAdd("*0x7921,x","I2CFFRX");
-}
-
-
-/********************************************************************/
-/* Peripheral Interrupt Expansion Registers                         */
-/********************************************************************/
-menuitem "Watch Peripheral Interrupt Expansion Registers";
-
-hotmenu All_PIE_Regs()
-{
-    GEL_WatchAdd("*0x0CE0,x","PIECTRL");
-    GEL_WatchAdd("*0x0CE1,x","PIEACK");
-    GEL_WatchAdd("*0x0CE2,x","PIEIER1");
-    GEL_WatchAdd("*0x0CE3,x","PIEIFR1");
-    GEL_WatchAdd("*0x0CE4,x","PIEIER2");
-    GEL_WatchAdd("*0x0CE5,x","PIEIFR2");
-    GEL_WatchAdd("*0x0CE6,x","PIEIER3");
-    GEL_WatchAdd("*0x0CE7,x","PIEIFR3");
-    GEL_WatchAdd("*0x0CE8,x","PIEIER4");
-    GEL_WatchAdd("*0x0CE9,x","PIEIFR4");
-    GEL_WatchAdd("*0x0CEA,x","PIEIER5");
-    GEL_WatchAdd("*0x0CEB,x","PIEIFR5");
-    GEL_WatchAdd("*0x0CEC,x","PIEIER6");
-    GEL_WatchAdd("*0x0CED,x","PIEIFR6");
-    GEL_WatchAdd("*0x0CEE,x","PIEIER7");
-    GEL_WatchAdd("*0x0CEF,x","PIEIFR7");
-    GEL_WatchAdd("*0x0CF0,x","PIEIER8");
-    GEL_WatchAdd("*0x0CF1,x","PIEIFR8");
-    GEL_WatchAdd("*0x0CF2,x","PIEIER9");
-    GEL_WatchAdd("*0x0CF3,x","PIEIFR9");
-    GEL_WatchAdd("*0x0CF4,x","PIEIER10");
-    GEL_WatchAdd("*0x0CF5,x","PIEIFR10");
-    GEL_WatchAdd("*0x0CF6,x","PIEIER11");
-    GEL_WatchAdd("*0x0CF7,x","PIEIFR11");
-    GEL_WatchAdd("*0x0CF8,x","PIEIER12");
-    GEL_WatchAdd("*0x0CF9,x","PIEIFR12");
-}
-hotmenu PIECTRL()
-{
-    GEL_WatchAdd("*0x0CE0,x","PIECTRL");
-}
-hotmenu PIEACK()
-{
-    GEL_WatchAdd("*0x0CE1,x","PIEACK");
-}
-hotmenu PIEIER1_and_PIEIFR1()
-{
-    GEL_WatchAdd("*0x0CE2,x","PIEIER1");
-    GEL_WatchAdd("*0x0CE3,x","PIEIFR1");
-}
-hotmenu PIEIER2_and_PIEIFR2()
-{
-    GEL_WatchAdd("*0x0CE4,x","PIEIER2");
-    GEL_WatchAdd("*0x0CE5,x","PIEIFR2");
-}
-hotmenu PIEIER3_and_PIEIFR3()
-{
-    GEL_WatchAdd("*0x0CE6,x","PIEIER3");
-    GEL_WatchAdd("*0x0CE7,x","PIEIFR3");
-}
-hotmenu PIEIER4_and_PIEIFR4()
-{
-    GEL_WatchAdd("*0x0CE8,x","PIEIER4");
-    GEL_WatchAdd("*0x0CE9,x","PIEIFR4");
-}
-hotmenu PIEIER5_and_PIEIFR5()
-{
-    GEL_WatchAdd("*0x0CEA,x","PIEIER5");
-    GEL_WatchAdd("*0x0CEB,x","PIEIFR5");
-}
-hotmenu PIEIER6_and_PIEIFR6()
-{
-    GEL_WatchAdd("*0x0CEC,x","PIEIER6");
-    GEL_WatchAdd("*0x0CED,x","PIEIFR6");
-}
-hotmenu PIEIER7_and_PIEIFR7()
-{
-    GEL_WatchAdd("*0x0CEE,x","PIEIER7");
-    GEL_WatchAdd("*0x0CEF,x","PIEIFR7");
-}
-hotmenu PIEIER8_and_PIEIFR8()
-{
-    GEL_WatchAdd("*0x0CF0,x","PIEIER8");
-    GEL_WatchAdd("*0x0CF1,x","PIEIFR8");
-}
-hotmenu PIEIER9_and_PIEIFR9()
-{
-    GEL_WatchAdd("*0x0CF2,x","PIEIER9");
-    GEL_WatchAdd("*0x0CF3,x","PIEIFR9");
-}
-hotmenu PIEIFR10_and_PIEIFR10()
-{
-    GEL_WatchAdd("*0x0CF4,x","PIEIER10");
-    GEL_WatchAdd("*0x0CF5,x","PIEIFR10");
-}
-hotmenu PIEIER11_and_PIEIFR11()
-{
-    GEL_WatchAdd("*0x0CF6,x","PIEIER11");
-    GEL_WatchAdd("*0x0CF7,x","PIEIFR11");
-}
-hotmenu PIEIER12_and_PIEIFR12()
-{
-    GEL_WatchAdd("*0x0CF8,x","PIEIER12");
-    GEL_WatchAdd("*0x0CF9,x","PIEIFR12");
-}
-
-
-/********************************************************************/
-/* Serial Communication Interface Registers                         */
-/********************************************************************/
-menuitem "Watch SCI Registers";
-
-hotmenu SCI_A_All_Regs()
-{
-    GEL_WatchAdd("*0x7050,x","SCICCRA");
-    GEL_WatchAdd("*0x7051,x","SCICTL1A");
-    GEL_WatchAdd("*0x7052,x","SCIHBAUDA");
-    GEL_WatchAdd("*0x7053,x","SCILBAUDA");
-    GEL_WatchAdd("*0x7054,x","SCICTL2A");
-    GEL_WatchAdd("*0x7055,x","SCIRXSTA");
-    GEL_WatchAdd("*0x7056,x","SCIRXEMUA");
-    GEL_WatchAdd("*0x7057,x","SCIRXBUFA");
-    GEL_WatchAdd("*0x7059,x","SCITXBUFA");
-    GEL_WatchAdd("*0x705A,x","SCIFFTXA");
-    GEL_WatchAdd("*0x705B,x","SCIFFRXA");
-    GEL_WatchAdd("*0x705C,x","SCIFFCTA");
-    GEL_WatchAdd("*0x705F,x","SCIPRIA");
-}
-hotmenu SCI_A_FIFO_Registers()
-{
-    GEL_WatchAdd("*0x705A,x","SCIFFTXA");
-    GEL_WatchAdd("*0x705B,x","SCIFFRXA");
-    GEL_WatchAdd("*0x705C,x","SCIFFCTA");
-}
-hotmenu SCI_B_All_Regs()
-{
-    GEL_WatchAdd("*0x7750,x","SCICCRB");
-    GEL_WatchAdd("*0x7751,x","SCICTL1B");
-    GEL_WatchAdd("*0x7752,x","SCIHBAUDB");
-    GEL_WatchAdd("*0x7753,x","SCILBAUDB");
-    GEL_WatchAdd("*0x7754,x","SCICTL2B");
-    GEL_WatchAdd("*0x7755,x","SCIRXSTB");
-    GEL_WatchAdd("*0x7756,x","SCIRXEMUB");
-    GEL_WatchAdd("*0x7757,x","SCIRXBUFB");
-    GEL_WatchAdd("*0x7759,x","SCITXBUFB");
-    GEL_WatchAdd("*0x775A,x","SCIFFTXB");
-    GEL_WatchAdd("*0x775B,x","SCIFFRXB");
-    GEL_WatchAdd("*0x775C,x","SCIFFCTB");
-    GEL_WatchAdd("*0x775F,x","SCIPRIB");
-}
-
-hotmenu SCI_B_FIFO_Registers()
-{
-    GEL_WatchAdd("*0x775A,x","SCIFFTXB");
-    GEL_WatchAdd("*0x775B,x","SCIFFRXB");
-    GEL_WatchAdd("*0x775C,x","SCIFFCTB");
-}
-hotmenu SCI_C_All_Regs()
-{
-    GEL_WatchAdd("*0x7770,x","SCICCRC");
-    GEL_WatchAdd("*0x7771,x","SCICTL1C");
-    GEL_WatchAdd("*0x7772,x","SCIHBAUDC");
-    GEL_WatchAdd("*0x7773,x","SCILBAUDC");
-    GEL_WatchAdd("*0x7774,x","SCICTL2C");
-    GEL_WatchAdd("*0x7775,x","SCIRXSTC");
-    GEL_WatchAdd("*0x7776,x","SCIRXEMUC");
-    GEL_WatchAdd("*0x7777,x","SCIRXBUFC");
-    GEL_WatchAdd("*0x7779,x","SCITXBUFC");
-    GEL_WatchAdd("*0x777A,x","SCIFFTXC");
-    GEL_WatchAdd("*0x777B,x","SCIFFRXC");
-    GEL_WatchAdd("*0x777C,x","SCIFFCTC");
-    GEL_WatchAdd("*0x777F,x","SCIPRIC");
-}
-hotmenu SCI_C_FIFO_Registers()
-{
-    GEL_WatchAdd("*0x777A,x","SCIFFTXC");
-    GEL_WatchAdd("*0x777B,x","SCIFFRXC");
-    GEL_WatchAdd("*0x777C,x","SCIFFCTC");
-}
-
-
-/********************************************************************/
-/* Serial Peripheral Interface Registers                            */
-/********************************************************************/
-menuitem "Watch SPI Registers";
-
-hotmenu SPI_A_All_Regs()
-{
-    GEL_WatchAdd("*0x7040,x","SPIA SPICCR");
-    GEL_WatchAdd("*0x7041,x","SPIA SPICTL");
-    GEL_WatchAdd("*0x7042,x","SPIA SPIST");
-    GEL_WatchAdd("*0x7044,x","SPIA SPIBRR");
-    GEL_WatchAdd("*0x7046,x","SPIA SPIEMU");
-    GEL_WatchAdd("*0x7047,x","SPIA SPIRXBUF");
-    GEL_WatchAdd("*0x7048,x","SPIA SPITXBUF");
-    GEL_WatchAdd("*0x7049,x","SPIA SPIDAT");
-    GEL_WatchAdd("*0x704A,x","SPIA SPIFFTX");
-    GEL_WatchAdd("*0x704B,x","SPIA SPIFFRX");
-    GEL_WatchAdd("*0x704C,x","SPIA SPIFFCT");
-    GEL_WatchAdd("*0x704F,x","SPIA SPIPRI");
-}
-hotmenu SPI_A_FIFO_Registers()
-{
-    GEL_WatchAdd("*0x704A,x","SPIA SPIFFTX");
-    GEL_WatchAdd("*0x704B,x","SPIA SPIFFRX");
-    GEL_WatchAdd("*0x704C,x","SPIA SPIFFCT");
-}
-
-
-/********************************************************************/
-/* Watchdog Timer Registers                                         */
-/********************************************************************/
-menuitem "Watch Watchdog Timer Registers";
-
-hotmenu All_Watchdog_Regs()
-{
-    GEL_WatchAdd("*0x7023,x","WDCNTR");
-    GEL_WatchAdd("*0x7025,x","WDKEY");
-    GEL_WatchAdd("*0x7029,x","WDCR");
-    GEL_WatchAdd("*0x7022,x","SCSR");
-}
-
-/********************************************************************/
-/*** End of file ***/
diff --git a/Source/External/v120/DSP2833x_common/gel/f28335.gel b/Source/External/v120/DSP2833x_common/gel/f28335.gel
deleted file mode 100644
index a3c37ec..0000000
--- a/Source/External/v120/DSP2833x_common/gel/f28335.gel
+++ /dev/null
@@ -1,2960 +0,0 @@
-/********************************************************************/
-/* f28335.gel                                                       */
-/* Version 3.30.2                                                   */
-/*                                                                  */
-/* This GEL file is to be used with the TMS320F28335 DSP.           */
-/* Changes may be required to support specific hardware designs.    */
-/*                                                                  */
-/* Code Composer Studio supports six reserved GEL functions that    */
-/* automatically get executed if they are defined. They are:        */
-/*                                                                  */
-/* StartUp()              - Executed whenever CCS is invoked        */
-/* OnReset()              - Executed after Debug->Reset CPU         */
-/* OnRestart()            - Executed after Debug->Restart           */
-/* OnPreFileLoaded()      - Executed before File->Load Program      */
-/* OnFileLoaded()         - Executed after File->Load Program       */
-/* OnTargetConnect()      - Executed after Debug->Connect           */
-/*                                                                  */
-/********************************************************************/
-
-StartUp()
-{
-
-/* The next line automatically loads the .gel file that comes   */
-/* with the DSP2833x Peripheral Header Files download.  To use, */
-/* uncomment, and adjust the directory path as needed.          */
-//  GEL_LoadGel("c:\\CCStudio_v3.3\\cc\\gel\\DSP2833x_Peripheral.gel");
-
-}
-
-OnReset(int nErrorCode)
-{
-    C28x_Mode();
-    Unlock_CSM();
-    ADC_Cal();
-	
-}
-
-OnRestart(int nErrorCode)
-{
-/* CCS will call OnRestart() when you do a Debug->Restart and   */
-/* after you load a new file.  Between running interrupt based  */
-/* programs, this function will clear interrupts and help keep  */
-/* the processor from going off into invalid memory.            */
-     C28x_Mode();
-     IER = 0;
-     IFR = 0;
-     ADC_Cal();
-}
-
-int TxtOutCtl=0;
-OnPreFileLoaded()
-{
-    XINTF_Enable();
-    if (TxtOutCtl==0)
-    {
-     GEL_TextOut("\nNOTES:\nGel will enable XINTFx16 during Debug only.\nEnable XINTF in code prior to use.");
-     GEL_TextOut("\nFPU Registers can be found via GEL->Watch FPU Registers."); 
-	 TxtOutCtl=1;
-    }
-}
-
-OnFileLoaded(int nErrorCode, int bSymbolsOnly)
-{
-    ADC_Cal();
-}
-
-OnTargetConnect()
-{    
-    C28x_Mode();
-    F28335_Memory_Map();            /* Initialize the CCS memory map */
-
-/* Check to see if CCS has been started-up with the DSP already */
-/* running in real-time mode.  The user can add whatever        */
-/* custom initialization stuff they want to each case.          */
-
-    if (GEL_IsInRealtimeMode())     /* Do real-time mode target initialization */
-    {
-
-    }
-    else                            /* Do stop-mode target initialization */
-    {
-        GEL_Reset();                /* Reset DSP */
-    }
-
-}
-
-
-/********************************************************************/
-/* These functions are launched by the GEL_Toolbar button plugin    */
-/********************************************************************/
-GEL_Toolbar1()
-{
-    Run_Realtime_with_Reset();
-}
-GEL_Toolbar2()
-{
-    Run_Realtime_with_Restart();
-}
-GEL_Toolbar3()
-{
-    Full_Halt();
-}
-GEL_Toolbar4()
-{
-    Full_Halt_with_Reset();
-}
-
-int GEL_Toolbar5_Toggle = 0;
-GEL_Toolbar5()
-{
-    if(GEL_Toolbar5_Toggle == 0)
-    {
-        GEL_Toolbar5_Toggle = 1;
-        GEL_OpenWindow("GEL_Buttons",1,4);
-        GEL_TextOut("Button 1: Run_Realtime_with_Reset()","GEL_Buttons",0,0);
-        GEL_TextOut("Button 2: Run_Realtime_with_Restart()","GEL_Buttons",0,1);
-        GEL_TextOut("Button 3: Full_Halt()", "GEL_Buttons",0,2);
-        GEL_TextOut("Button 4: Full_Halt_with_Reset()","GEL_Buttons",0,3);
-    }
-    else
-    {
-        GEL_Toolbar5_Toggle = 0;
-        GEL_CloseWindow("GEL_Buttons");
-    }
-}
-
-
-/********************************************************************/
-/* These functions are useful to engage/dis-enagage realtime        */
-/* emulation mode during debug.  They save the user from having to  */
-/* manually perform these steps in CCS.                             */
-/********************************************************************/
-menuitem "Realtime Emulation Control";
-
-hotmenu Run_Realtime_with_Reset()
-{
-    GEL_Reset();                /* Reset the DSP */
-    ST1 = ST1 & 0xFFFD;         /* clear DBGM bit in ST1 */
-    GEL_EnableRealtime();       /* Enable Realtime mode */
-    GEL_Run();                  /* Run the DSP */
-}
-hotmenu Run_Realtime_with_Restart()
-{
-    GEL_Restart();              /* Reset the DSP */
-    ST1 = ST1 & 0xFFFD;         /* clear DBGM bit in ST1 */
-    GEL_EnableRealtime();       /* Enable Realtime mode */
-    GEL_Run();                  /* Run the DSP */
-}
-hotmenu Full_Halt()
-{
-    GEL_DisableRealtime();      /* Disable Realtime mode */
-    GEL_Halt();                 /* Halt the DSP */
-}
-hotmenu Full_Halt_with_Reset()
-{
-    GEL_DisableRealtime();      /* Disable Realtime mode */
-    GEL_Halt();                 /* Halt the DSP */
-    GEL_Reset();                /* Reset the DSP */
-}
-
-
-/********************************************************************/
-/*                         F28335 Memory Map                        */
-/*                                                                  */
-/*   Note: M0M1MAP and VMAP signals tied high on F28335 core        */
-/*                                                                  */
-/*   0x000000 - 0x0003ff   M0 SARAM                (Prog and Data)  */
-/*   0x000400 - 0x0007ff   M1 SARAM                (Prog and Data)  */
-/*   0x000800 - 0x001fff   Peripheral Frame0 (PF0) (Data only)      */
-/*   0x004000 - 0x004fff   XINTF Zone 0            (Prog and Data)  */
-/*   0x005000 - 0x005fff   Peripheral Frame3 (PF3) (Data only)      */
-/*   0x006000 - 0x006fff   Peripheral Frame1 (PF1) (Data only)      */
-/*   0x007000 - 0x007fff   Peripheral Frame2 (PF2) (Data only)      */
-/*   0x008000 - 0x008fff   L0 SARAM                (Prog and Data)  */
-/*   0x009000 - 0x009fff   L1 SARAM                (Prog and Data)  */
-/*   0x00A000 - 0x00Afff   L2 SARAM                (Prog and Data)  */
-/*   0x00B000 - 0x00Bfff   L3 SARAM                (Prog and Data)  */
-/*   0x00C000 - 0x00Cfff   L4 SARAM                (Prog and Data)  */
-/*   0x00D000 - 0x00Dfff   L5 SARAM                (Prog and Data)  */
-/*   0x00E000 - 0x00Efff   L6 SARAM                (Prog and Data)  */
-/*   0x00F000 - 0x00Ffff   L7 SARAM                (Prog and Data)  */
-/*   0x100000 - 0x1fffff   XINTF Zone 6            (Prog and Data)  */
-/*   0x200000 - 0x2fffff   XINTF Zone 7            (Prog and Data   */
-/*   0x300000 - 0x33ffff   Flash                   (Prog and Data)  */
-/*   0x380080 - 0x380088   ADC_cal function        (Prog and Data)  */
-/*   0x380090 - 0x380090   PARTID value            (Prog and Data)  */
-/*   0x380400 - 0x3807ff   OTP                     (Prog and Data)  */
-/*   0x3f8000 - 0x3f8fff   L0 SARAM                (Prog and Data)  */
-/*   0x3f9000 - 0x3f9fff   L1 SARAM                (Prog and Data)  */
-/*   0x3fA000 - 0x3fAfff   L2 SARAM                (Prog and Data)  */
-/*   0x3fB000 - 0x3fBfff   L3 SARAM                (Prog and Data)  */
-/*   0x3fe000 - 0x3fffff   BOOT ROM                (Prog and Data)  */
-/********************************************************************/
-menuitem "Initialize Memory Map";
-
-hotmenu F28335_Memory_Map()
-{
-    GEL_MapReset();
-    GEL_MapOn();
-
-    /* Program memory map */
-    GEL_MapAdd(0x0,0,0x400,1,1);                 /* M0 SARAM        */
-    GEL_MapAdd(0x400,0,0x400,1,1);               /* M1 SARAM        */
-    GEL_MapAdd(0x4000,0,0x1000,1,1);             /* Zone 0          */
-    GEL_MapAdd(0x8000,0,0x1000,1,1);             /* L0 SARAM        */
-    GEL_MapAdd(0x9000,0,0x1000,1,1);             /* L1 SARAM        */
-    GEL_MapAdd(0xA000,0,0x1000,1,1);             /* L2 SARAM        */
-    GEL_MapAdd(0xB000,0,0x1000,1,1);             /* L3 SARAM        */
-    GEL_MapAdd(0xC000,0,0x1000,1,1);             /* L4 SARAM        */
-    GEL_MapAdd(0xD000,0,0x1000,1,1);             /* L5 SARAM        */
-    GEL_MapAdd(0xE000,0,0x1000,1,1);             /* L6 SARAM        */
-    GEL_MapAdd(0xF000,0,0x1000,1,1);             /* L7 SARAM        */
-    GEL_MapAdd(0x100000,0,0x100000,1,1);         /* Zone 6          */
-    GEL_MapAdd(0x200000,0,0x100000,1,1);         /* Zone 7          */
-    GEL_MapAdd(0x300000,0,0x40000,1,0);          /* FLASH           */
-    GEL_MapAdd(0x380080,0,0x00009,1,0);          /* ADC_cal function*/
-    GEL_MapAdd(0x380090,0,0x00001,1,0);          /* PARTID value    */
-    GEL_MapAdd(0x380400,0,0x00400,1,0);          /* OTP             */
-    GEL_MapAdd(0x3f8000,0,0x1000,1,1);           /* L0 SARAM Mirror */
-    GEL_MapAdd(0x3f9000,0,0x1000,1,1);           /* L1 SARAM Mirror */
-    GEL_MapAdd(0x3fA000,0,0x1000,1,1);           /* L2 SARAM Mirror */
-    GEL_MapAdd(0x3fb000,0,0x1000,1,1);           /* L3 SARAM Mirror */
-    GEL_MapAdd(0x3fe000,0,0x2000,1,0);           /* BOOT ROM        */
-
-    /* Data memory map */
-    GEL_MapAdd(0x000,1,0x400,1,1);               /* M0 SARAM        */
-    GEL_MapAdd(0x400,1,0x400,1,1);               /* M1 SARAM        */
-    GEL_MapAdd(0x800,1,0x1800,1,1);               /* PF0             */
-    GEL_MapAdd(0x4000,1,0x1000,1,1);             /* Zone 0          */
-    GEL_MapAdd(0x5000,1,0x1000,1,1);             /* PF3             */
-    GEL_MapAdd(0x6000,1,0x1000,1,1);             /* PF1             */
-    GEL_MapAddStr(0x7000,1,0x1000,"R|W|AS2",0);  /* PF2             */
-    GEL_MapAdd(0x8000,1,0x1000,1,1);             /* L0 SARAM        */
-    GEL_MapAdd(0x9000,1,0x1000,1,1);             /* L1 SARAM        */
-    GEL_MapAdd(0xA000,1,0x1000,1,1);             /* L2 SARAM        */
-    GEL_MapAdd(0xB000,1,0x1000,1,1);             /* L3 SARAM        */
-    GEL_MapAdd(0xC000,1,0x1000,1,1);             /* L4 SARAM        */
-    GEL_MapAdd(0xD000,1,0x1000,1,1);             /* L5 SARAM        */
-    GEL_MapAdd(0xE000,1,0x1000,1,1);             /* L6 SARAM        */
-    GEL_MapAdd(0xF000,1,0x1000,1,1);             /* L7 SARAM        */
-    GEL_MapAdd(0x100000,1,0x100000,1,1);         /* Zone 6          */
-    GEL_MapAdd(0x200000,1,0x100000,1,1);         /* Zone 7          */
-    GEL_MapAdd(0x300000,1,0x40000,1,0);          /* FLASH           */
-    GEL_MapAdd(0x380400,1,0x00400,1,0);          /* OTP             */
-    GEL_MapAdd(0x380080,1,0x00009,1,0);          /* ADC_cal function*/
-    GEL_MapAdd(0x380090,1,0x00001,1,0);          /* PARTID value    */
-    GEL_MapAdd(0x3f8000,1,0x1000,1,1);           /* L0 SARAM Mirror */
-    GEL_MapAdd(0x3f9000,1,0x1000,1,1);           /* L1 SARAM Mirror */
-    GEL_MapAdd(0x3fA000,1,0x1000,1,1);           /* L2 SARAM Mirror */
-    GEL_MapAdd(0x3fb000,1,0x1000,1,1);           /* L3 SARAM Mirror */
-    GEL_MapAdd(0x3fe000,1,0x2000,1,0);           /* BOOT ROM        */
-}
-
-
-/********************************************************************/
-/* The ESTOP0 fill functions are useful for debug.  They fill the   */
-/* RAM with software breakpoints that will trap runaway code.       */
-/********************************************************************/
-hotmenu Fill_F28335_RAM_with_ESTOP0()
-{
-    GEL_MemoryFill(0x000000,1,0x000800,0x7625);      /* Fill M0/M1  */
-    GEL_MemoryFill(0x008000,1,0x002000,0x7625);      /* Fill L0/L1  */
-    GEL_MemoryFill(0x00A000,1,0x002000,0x7625);      /* Fill L2/L3  */
-    GEL_MemoryFill(0x00C000,1,0x002000,0x7625);      /* Fill L4/L5  */
-    GEL_MemoryFill(0x00E000,1,0x002000,0x7625);      /* Fill L6/L7  */
-}
-
-
-/********************************************************************/
-menuitem "Watchdog";
-hotmenu Disable_WD()
-{
-    *0x7029 = *0x7029 | 0x0068;                /* Set the WDDIS bit */
-    *0x7025 = 0x0055;                          /* Service the WD    */
-    *0x7025 = 0x00AA;                          /*  once to be safe. */
-    GEL_TextOut("\nWatchdog Timer Disabled");
-}
-
-
-/********************************************************************/
-menuitem "Code Security Module"
-hotmenu Unlock_CSM()
-{
-    /* Perform dummy reads of the password locations */
-    XAR0 = *0x33FFF8;
-    XAR0 = *0x33FFF9;
-    XAR0 = *0x33FFFA;
-    XAR0 = *0x33FFFB;
-    XAR0 = *0x33FFFC;
-    XAR0 = *0x33FFFD;
-    XAR0 = *0x33FFFE;
-    XAR0 = *0x33FFFF;
-
-    /* Write passwords to the KEY registers.  0xFFFF's are dummy passwords.
-       User should replace them with the correct password for their DSP */
-    *0xAE0 = 0xFFFF;
-    *0xAE1 = 0xFFFF;
-    *0xAE2 = 0xFFFF;
-    *0xAE3 = 0xFFFF;
-    *0xAE4 = 0xFFFF;
-    *0xAE5 = 0xFFFF;
-    *0xAE6 = 0xFFFF;
-    *0xAE7 = 0xFFFF;
-}
-
-
-/********************************************************************/
-menuitem "Addressing Modes";
-hotmenu C28x_Mode()
-{
-    ST1 = ST1 & (~0x0100);      /*   AMODE = 0  */
-    ST1 = ST1 | 0x0200;         /* OBJMODE = 1  */
-}
-hotmenu C24x_Mode()
-{
-    ST1 = ST1 | 0x0100;         /*   AMODE = 1  */
-    ST1 = ST1 | 0x0200;         /* OBJMODE = 1  */
-}
-hotmenu C27x_Mode()
-{
-    ST1 = ST1 & (~0x0100);      /*   AMODE = 0  */
-    ST1 = ST1 & (~0x0200);      /* OBJMODE = 0  */
-}
-
-
-/********************************************************************/
-/*                            PLL Ratios                            */
-/*                                                                  */
-/* The following table describes the PLL clocking ratios (0..10)    */                            
-/*                                                                  */
-/*   Ratio        CLKIN         Description                         */
-/*   -----    --------------    ------------                        */
-/*     0      OSCCLK/2          PLL bypassed                        */
-/*     1      (OSCCLK * 1)/2    15 Mhz for 30 Mhz CLKIN             */
-/*     2      (OSCCLK * 2)/2    30 Mhz for 30 Mhz CLKIN             */
-/*     3      (OSCCLK * 3)/2    45 Mhz for 30 Mhz CLKIN             */
-/*     4      (OSCCLK * 4)/2    60 Mhz for 30 Mhz CLKIN             */
-/*     5      (OSCCLK * 5)/2    75 Mhz for 30 Mhz CLKIN             */
-/*     6      (OSCCLK * 6)/2    90 Mhz for 30 Mhz CLKIN             */
-/*     7      (OSCCLK * 7)/2    105 Mhz for 30 Mhz CLKIN            */
-/*     8      (OSCCLK * 8)/2    120 Mhz for 30 Mhz CLKIN            */
-/*     9      (OSCCLK * 9)/2    135 Mhz for 30 Mhz CLKIN            */
-/*    10      (OSCCLK * 10)/2   150 Mhz for 30 Mhz CLKIN            */
-/********************************************************************/
-menuitem "Set PLL Ratio";
-
-hotmenu Bypass()
-{
-    DIVSEL_div2();     /* DIVSEL = 1/2                      */
-    *0x7021 = 0;       /* CLKIN = OSCCLK/2, PLL is bypassed */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x1_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 1;      /* CLKIN = (OSCCLK * 1)/2 */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x2_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 2;      /* CLKIN = (OSCCLK * 2)/2 */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x3_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 3;      /* CLKIN = (OSCCLK * 3)/2 */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x4_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 4;      /* CLKIN = (OSCCLK * 4)/2 */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x5_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 5;      /* CLKIN = (OSCCLK * 5)/2 */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x6_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 6;      /* CLKIN = (OSCCLK * 6)/2 */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x7_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 7;      /* CLKIN = (OSCCLK * 7)/2 */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x8_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 8;      /* CLKIN = (OSCCLK * 8)/2 */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x9_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 9;      /* CLKIN = (OSCCLK * 9)/2 */
-    PLL_Wait();
-}
-hotmenu OSCCLK_x10_divided_by_2()
-{
-    DIVSEL_div2();    /* DIVSEL = 1/2           */
-    *0x7021 = 10;     /* CLKIN = (OSCCLK * 10)/2 */
-    PLL_Wait();
-}
-// hotmenu OSCCLK_x1_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 1;      /* CLKIN = (OSCCLK * 1)/1 */
-//     PLL_Wait();
-// }
-// hotmenu OSCCLK_x2_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 2;      /* CLKIN = (OSCCLK * 2)/1 */
-//     PLL_Wait();
-// }
-// hotmenu OSCCLK_x3_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 3;      /* CLKIN = (OSCCLK * 3)/1 */
-//     PLL_Wait();
-// }
-// hotmenu OSCCLK_x4_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 4;      /* CLKIN = (OSCCLK * 4)/1 */
-//     PLL_Wait();
-// }
-// hotmenu OSCCLK_x5_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 5;      /* CLKIN = (OSCCLK * 5)/1 */
-//     PLL_Wait();
-// }
-// hotmenu OSCCLK_x6_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 6;      /* CLKIN = (OSCCLK * 6)/1 */
-//     PLL_Wait();
-// }
-// hotmenu OSCCLK_x7_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 7;      /* CLKIN = (OSCCLK * 7)/1 */
-//     PLL_Wait();
-// }
-// hotmenu OSCCLK_x8_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 8;      /* CLKIN = (OSCCLK * 8)/1 */
-//     PLL_Wait();
-// }
-// hotmenu OSCCLK_x9_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 9;      /* CLKIN = (OSCCLK * 9)/1 */
-//     PLL_Wait();
-// }
-// hotmenu OSCCLK_x10_divided_by_1()
-// {
-//     DIVSEL_div1();    /* DIVSEL = 1/1           */
-//     *0x7021 = 10;     /* CLKIN = (OSCCLK * 10)/1 */
-//     PLL_Wait();
-// }
-
-
-
-/********************************************************************/
-/* For F2833x devices, DIVSEL is 1/4 by default.  Switch it to 1/2  */
-/********************************************************************/
-
-DIVSEL_div2()
-{
-    int temp;
-    int PLLSTS;
-
-    PLLSTS = 0x7011;
-
-    temp  = *PLLSTS; 
-    temp &=  0xFE7F;   /* Clear bits 7 & 8 */
-    temp |= 2 << 7;    /* Set bit 8        */
-    *PLLSTS = temp;    /* Switch to 1/2    */
-}
-
-
-
-/********************************************************************/
-/* For F2833x devices, DIVSEL is 1/4 by default.  Switch it to /1   */
-/********************************************************************/
-
-DIVSEL_div1()
-{
-    int temp;
-    int PLLSTS;
-
-    PLLSTS = 0x7011;
-    
-    DIVSEL_div2();     /* First switch DIVSEL to 1/2 and wait */
-    wait();  
-    temp  = *PLLSTS; 
-    temp |= 3 << 7;    /* Set bits 7 & 8   */
-    *PLLSTS = temp;    /* Switch to 1/2    */
-}
-
-wait()
-{
-    int delay = 0;
-    for (delay = 0; delay <= 5; delay ++)
-    {}
-}
-
-/********************************************************************/
-/* For F2833x devices, check the PLLOCKS bit for PLL lock.          */
-/********************************************************************/
-PLL_Wait()
-{
-    int PLLSTS;
-    int delay = 0;
-
-    PLLSTS = 0x7011;
-    
-    
-    while ( ( (unsigned int)*PLLSTS & 0x0001) != 0x0001)
-    {
-        delay++;
-        GEL_TextOut("Waiting for PLL Lock, PLLSTS = %x\n",,,,,(unsigned int)*PLLSTS);
-    }
-    GEL_TextOut("\nPLL lock complete, PLLSTS = %x\n",,,,,(unsigned int)*PLLSTS);
-}
-
-/********************************************************************/
-/* Load the ADC Calibration values from TI OTP                      */
-/********************************************************************/
-menuitem "ADC Calibration"
-hotmenu ADC_Cal()
-{
-    /* Perform dummy reads of the password locations */
-    XAR0 = *0x33FFF8;
-    XAR0 = *0x33FFF9;
-    XAR0 = *0x33FFFA;
-    XAR0 = *0x33FFFB;
-    XAR0 = *0x33FFFC;
-    XAR0 = *0x33FFFD;
-    XAR0 = *0x33FFFE;
-    XAR0 = *0x33FFFF;
-
-    
-    if(((*0x0AEF) & 0x0001) == 0)
-    {
-        XAR0 = *0x701C;
-        *0x701C |= 0x0008;  
-    	*0x711C = *0x380083;
-        *0x711D = *0x380085;
-        *0x701C = XAR0;
-	    XAR0 = 0;
-       
-    } 
-    else
-    {
-        GEL_TextOut("\nADC Calibration not complete, check if device is unlocked and recalibrate."); 
-    }
-}
-
-/********************************************************************/
-/* Enable the XINTF and configure GPIOs for XINTF function          */
-/********************************************************************/
-menuitem "XINTF Enable"
-hotmenu XINTF_Enable()
-{
-
-   /* enable XINTF clock (XTIMCLK) */
-
-   *0x7020 = 0x3700;                          
-   /* GPBMUX1: XA0-XA7, XA16, XZCS0,        */
-   /*          XZCS7, XREADY, XRNW, XWE0    */
-   /* GPAMUX2: XA17-XA19, XZCS6             */
-   /* GPCMUX2: XA8-XA15                     */         
-   /* GPCMUX1: XD0-XD15                     */
-   *(unsigned long *)0x6F96 = 0xFFFFFFC0;   /* GPBMUX1 */
-   *(unsigned long *)0x6f88 = 0xFF000000;   /* GPAMUX2 */  
-   *(unsigned long *)0x6FA8 = 0x0000AAAA;   /* GPCMUX2 */  
-   *(unsigned long *)0x6FA6 = 0xAAAAAAAA;   /* GPCMUX1 */
-
-   /* Uncomment for x32 data bus            */
-   /* GPBMUX2: XD16-XD31                    */
-// *(unsigned long *)0x6F98 = 0xFFFFFFFF;   /* GPBMUX2 */ 
-   
-   /* Zone timing.  
-   /* Each zone can be configured seperately */
-   /* Uncomment the x16 or the x32 timing    */
-   /* depending on the data bus width for    */
-   /* the zone                               */
-
-   /* x16 Timing */
-   *(unsigned long *)0x0B20 = 0x0043FFFF;    /* Zone0 */
-   *(unsigned long *)0x0B2C = 0x0043FFFF;    /* Zone6 */
-   *(unsigned long *)0x0B2E = 0x0043FFFF;    /* Zone7 */
-
-   /* x32 Timing:
-// *(unsigned long *)0x0B20 = 0x0041FFFF;    /* x32 */
-// *(unsigned long *)0x0B2C = 0x0041FFFF;    /* x32 */
-// *(unsigned long *)0x0B2E = 0x0041FFFF;    /* x32 */
-
-   
-}
-
-
-
-
-
-/********************************************************************/
-/* The below are used to display the symbolic names of the F28335   */
-/* memory mapped registers in the watch window. To view these       */
-/* registers, click on the GEL menu button in Code Composer Studio, */
-/* then select which registers or groups of registers you want to   */
-/* view. They will appear in the watch window under the Watch1 tab. */
-/********************************************************************/
-
-/* Add a space line to the GEL menu */
-menuitem "______________________________________";
-hotmenu __() {}
-
-/********************************************************************/
-/* A/D Converter Registers                                          */
-/********************************************************************/
-menuitem "Watch ADC Registers";
-
-hotmenu All_ADC_Regs()
-{
-    GEL_WatchAdd("*0x7100,x","ADCTRL1");
-    GEL_WatchAdd("*0x7101,x","ADCTRL2");
-    GEL_WatchAdd("*0x7102,x","ADCMAXCONV");
-    GEL_WatchAdd("*0x7103,x","ADCCHSELSEQ1");
-    GEL_WatchAdd("*0x7104,x","ADCCHSELSEQ2");
-    GEL_WatchAdd("*0x7105,x","ADCCHSELSEQ3");
-    GEL_WatchAdd("*0x7106,x","ADCCHSELSEQ4");
-    GEL_WatchAdd("*0x7107,x","ADCASEQSR");
-    GEL_WatchAdd("*0x7108,x","ADCRESULT0");
-    GEL_WatchAdd("*0x7109,x","ADCRESULT1");
-    GEL_WatchAdd("*0x710A,x","ADCRESULT2");
-    GEL_WatchAdd("*0x710B,x","ADCRESULT3");
-    GEL_WatchAdd("*0x710C,x","ADCRESULT4");
-    GEL_WatchAdd("*0x710D,x","ADCRESULT5");
-    GEL_WatchAdd("*0x710E,x","ADCRESULT6");
-    GEL_WatchAdd("*0x710F,x","ADCRESULT7");
-    GEL_WatchAdd("*0x7110,x","ADCRESULT8");
-    GEL_WatchAdd("*0x7111,x","ADCRESULT9");
-    GEL_WatchAdd("*0x7112,x","ADCRESULT10");
-    GEL_WatchAdd("*0x7113,x","ADCRESULT11");
-    GEL_WatchAdd("*0x7114,x","ADCRESULT12");
-    GEL_WatchAdd("*0x7115,x","ADCRESULT13");
-    GEL_WatchAdd("*0x7116,x","ADCRESULT14");
-    GEL_WatchAdd("*0x7117,x","ADCRESULT15");
-    GEL_WatchAdd("*0x7118,x","ADCTRL3");
-    GEL_WatchAdd("*0x7119,x","ADCST");
-    GEL_WatchAdd("*0x711C,x","ADCREFSEL");
-    GEL_WatchAdd("*0x711D,x","ADCOFFTRIM");
-
-    GEL_WatchAdd("*0x0B00,x","ADCRESULT0 Mirror");
-    GEL_WatchAdd("*0x0B01,x","ADCRESULT1 Mirror");
-    GEL_WatchAdd("*0x0B02,x","ADCRESULT2 Mirror");
-    GEL_WatchAdd("*0x0B03,x","ADCRESULT3 Mirror");
-    GEL_WatchAdd("*0x0B04,x","ADCRESULT4 Mirror");
-    GEL_WatchAdd("*0x0B05,x","ADCRESULT5 Mirror");
-    GEL_WatchAdd("*0x0B06,x","ADCRESULT6 Mirror");
-    GEL_WatchAdd("*0x0B07,x","ADCRESULT7 Mirror");
-    GEL_WatchAdd("*0x0B08,x","ADCRESULT8 Mirror");
-    GEL_WatchAdd("*0x0B09,x","ADCRESULT9 Mirror");
-    GEL_WatchAdd("*0x0B0A,x","ADCRESULT10 Mirror");
-    GEL_WatchAdd("*0x0B0B,x","ADCRESULT11 Mirror");
-    GEL_WatchAdd("*0x0B0C,x","ADCRESULT12 Mirror");
-    GEL_WatchAdd("*0x0B0D,x","ADCRESULT13 Mirror");
-    GEL_WatchAdd("*0x0B0E,x","ADCRESULT14 Mirror");
-    GEL_WatchAdd("*0x0B0F,x","ADCRESULT15 Mirror");
-}
-hotmenu ADC_Control_Regs()
-{
-    GEL_WatchAdd("*0x7100,x","ADCTRL1");
-    GEL_WatchAdd("*0x7101,x","ADCTRL2");
-    GEL_WatchAdd("*0x7102,x","ADCMAXCONV");
-    GEL_WatchAdd("*0x7107,x","ADCASEQSR");
-    GEL_WatchAdd("*0x7118,x","ADCTRL3");
-    GEL_WatchAdd("*0x7119,x","ADCST");
-    GEL_WatchAdd("*0x711C,x","ADCREFSEL");
-    GEL_WatchAdd("*0x711D,x","ADCOFFTRIM");
-}
-hotmenu ADCCHSELSEQx_Regs()
-{
-    GEL_WatchAdd("*0x7103,x","ADCCHSELSEQ1");
-    GEL_WatchAdd("*0x7104,x","ADCCHSELSEQ2");
-    GEL_WatchAdd("*0x7105,x","ADCCHSELSEQ3");
-    GEL_WatchAdd("*0x7106,x","ADCCHSELSEQ4");
-}
-hotmenu ADCRESULT_0_to_7()
-{
-    GEL_WatchAdd("*0x7108,x","ADCRESULT0");
-    GEL_WatchAdd("*0x7109,x","ADCRESULT1");
-    GEL_WatchAdd("*0x710A,x","ADCRESULT2");
-    GEL_WatchAdd("*0x710B,x","ADCRESULT3");
-    GEL_WatchAdd("*0x710C,x","ADCRESULT4");
-    GEL_WatchAdd("*0x710D,x","ADCRESULT5");
-    GEL_WatchAdd("*0x710E,x","ADCRESULT6");
-    GEL_WatchAdd("*0x710F,x","ADCRESULT7");
-}
-hotmenu ADCRESULT_8_to_15()
-{
-    GEL_WatchAdd("*0x7110,x","ADCRESULT8");
-    GEL_WatchAdd("*0x7111,x","ADCRESULT9");
-    GEL_WatchAdd("*0x7112,x","ADCRESULT10");
-    GEL_WatchAdd("*0x7113,x","ADCRESULT11");
-    GEL_WatchAdd("*0x7114,x","ADCRESULT12");
-    GEL_WatchAdd("*0x7115,x","ADCRESULT13");
-    GEL_WatchAdd("*0x7116,x","ADCRESULT14");
-    GEL_WatchAdd("*0x7117,x","ADCRESULT15");
-}
-hotmenu ADCRESULT_Mirror_0_to_7()
-{
-    GEL_WatchAdd("*0x0B00,x","ADCRESULT0 Mirror");
-    GEL_WatchAdd("*0x0B01,x","ADCRESULT1 Mirror");
-    GEL_WatchAdd("*0x0B02,x","ADCRESULT2 Mirror");
-    GEL_WatchAdd("*0x0B03,x","ADCRESULT3 Mirror");
-    GEL_WatchAdd("*0x0B04,x","ADCRESULT4 Mirror");
-    GEL_WatchAdd("*0x0B05,x","ADCRESULT5 Mirror");
-    GEL_WatchAdd("*0x0B06,x","ADCRESULT6 Mirror");
-    GEL_WatchAdd("*0x0B07,x","ADCRESULT7 Mirror");
-}
-hotmenu ADCRESULT_Mirror_8_to_15()
-{
-    GEL_WatchAdd("*0x0B08,x","ADCRESULT8 Mirror");
-    GEL_WatchAdd("*0x0B09,x","ADCRESULT9 Mirror");
-    GEL_WatchAdd("*0x0B0A,x","ADCRESULT10 Mirror");
-    GEL_WatchAdd("*0x0B0B,x","ADCRESULT11 Mirror");
-    GEL_WatchAdd("*0x0B0C,x","ADCRESULT12 Mirror");
-    GEL_WatchAdd("*0x0B0D,x","ADCRESULT13 Mirror");
-    GEL_WatchAdd("*0x0B0E,x","ADCRESULT14 Mirror");
-    GEL_WatchAdd("*0x0B0F,x","ADCRESULT15 Mirror");
-}
-
-
-/********************************************************************/
-/* Clocking and Low-Power Registers                                 */
-/********************************************************************/
-menuitem "Watch Clocking and Low-Power Registers";
-
-hotmenu All_Clocking_and_Low_Power_Regs()
-{
-    GEL_WatchAdd("*0x7010,x","XCLK");
-    GEL_WatchAdd("*0x7011,x","PLLSTS");
-    GEL_WatchAdd("*0x701A,x","HISPCP");
-    GEL_WatchAdd("*0x701B,x","LOSPCP");
-    GEL_WatchAdd("*0x701C,x","PCLKCR0");
-    GEL_WatchAdd("*0x701D,x","PCLKCR1");
-    GEL_WatchAdd("*0x701E,x","LPMCR0");
-    GEL_WatchAdd("*0x7020,x","PCLKCR3");
-    GEL_WatchAdd("*0x7021,x","PLLCR");
-}
-
-
-/********************************************************************/
-/* Code Security Module Registers                                   */
-/********************************************************************/
-menuitem "Watch Code Security Module Registers";
-
-hotmenu CSMSCR()
-{
-    GEL_WatchAdd("*0x0AEF,x","CSMSCR");
-    GEL_WatchAdd("(*0x0AEF>>15)&1,d"," FORCESEC bit");
-    GEL_WatchAdd("(*0x0AEF)&1,d","     SECURE bit");
-}
-hotmenu PWL_Locations()
-{
-    GEL_WatchAdd("*0x33FFF8,x","PWL0");
-    GEL_WatchAdd("*0x33FFF9,x","PWL1");
-    GEL_WatchAdd("*0x33FFFA,x","PWL2");
-    GEL_WatchAdd("*0x33FFFB,x","PWL3");
-    GEL_WatchAdd("*0x33FFFC,x","PWL4");
-    GEL_WatchAdd("*0x33FFFD,x","PWL5");
-    GEL_WatchAdd("*0x33FFFE,x","PWL6");
-    GEL_WatchAdd("*0x33FFFF,x","PWL7");
-}
-
-
-/********************************************************************/
-/* CPU Timer Registers                                              */
-/********************************************************************/
-menuitem "Watch CPU Timer Registers";
-
-hotmenu All_CPU_Timer0_Regs()
-{
-    GEL_WatchAdd("*0x0C00,x","TIMER0TIM");
-    GEL_WatchAdd("*0x0C01,x","TIMER0TIMH");
-    GEL_WatchAdd("*0x0C02,x","TIMER0PRD");
-    GEL_WatchAdd("*0x0C03,x","TIMER0PRDH");
-    GEL_WatchAdd("*0x0C04,x","TIMER0TCR");
-    GEL_WatchAdd("*0x0C06,x","TIMER0TPR");
-    GEL_WatchAdd("*0x0C07,x","TIMER0TPRH");
-}
-hotmenu All_CPU_Timer1_Regs()
-{
-    GEL_WatchAdd("*0x0C08,x","TIMER1TIM");
-    GEL_WatchAdd("*0x0C09,x","TIMER1TIMH");
-    GEL_WatchAdd("*0x0C0A,x","TIMER1PRD");
-    GEL_WatchAdd("*0x0C0B,x","TIMER1PRDH");
-    GEL_WatchAdd("*0x0C0C,x","TIMER1TCR");
-    GEL_WatchAdd("*0x0C0E,x","TIMER1TPR");
-    GEL_WatchAdd("*0x0C0F,x","TIMER1TPRH");
-}
-hotmenu All_CPU_Timer2_Regs()
-{
-    GEL_WatchAdd("*0x0C10,x","TIMER2TIM");
-    GEL_WatchAdd("*0x0C11,x","TIMER2TIMH");
-    GEL_WatchAdd("*0x0C12,x","TIMER2PRD");
-    GEL_WatchAdd("*0x0C13,x","TIMER2PRDH");
-    GEL_WatchAdd("*0x0C14,x","TIMER2TCR");
-    GEL_WatchAdd("*0x0C16,x","TIMER2TPR");
-    GEL_WatchAdd("*0x0C17,x","TIMER2TPRH");
-}
-
-
-/********************************************************************/
-/* Device Emulation Registers                                       */
-/********************************************************************/
-menuitem "Watch Device Emulation Registers";
-
-hotmenu All_Emulation_Regs()
-{
-    GEL_WatchAdd("*(long *)0x0880,x","DEVICECNF");
-    GEL_WatchAdd("*0x0882,x","CLASSID");
-    GEL_WatchAdd("*0x0883,x","REVID");
-    GEL_WatchAdd("*0x0884,x","PROTSTART");
-    GEL_WatchAdd("*0x0885,x","PROTRANGE");
-    GEL_WatchAdd("*0x380090,x","PARTID");    
-}
-/********************************************************************/
-/* DMA Registers                                                    */
-/********************************************************************/
-menuitem "Watch DMA Registers";
-
-hotmenu All_DMA_Regs()
-{
-    GEL_WatchAdd("*0x1000,x","DMACTRL");
-    GEL_WatchAdd("*0x1001,x","DEBUGCTRL");
-    GEL_WatchAdd("*0x1002,x","REVISION");
-    GEL_WatchAdd("*0x1004,x","PRIORITYCTRL1");
-    GEL_WatchAdd("*0x1006,x","PRIORITYSTAT");
-
-    GEL_WatchAdd("*0x1020,x","DMA Ch1 MODE");
-    GEL_WatchAdd("*0x1021,x","DMA Ch1 CONTROL");
-    GEL_WatchAdd("*0x1022,x","DMA Ch1 BURST_SIZE");
-    GEL_WatchAdd("*0x1023,x","DMA Ch1 BURST_COUNT");
-    GEL_WatchAdd("*0x1024,x","DMA Ch1 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x1025,x","DMA Ch1 DST_BURST_STEP");
-    GEL_WatchAdd("*0x1026,x","DMA Ch1 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x1027,x","DMA Ch1 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x1028,x","DMA Ch1 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x1029,x","DMA Ch1 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x102A,x","DMA Ch1 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x102B,x","DMA Ch1 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x102C,x","DMA Ch1 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x102D,x","DMA Ch1 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x102E,x","DMA Ch1 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x102F,x","DMA Ch1 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x1030,x","DMA Ch1 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1032,x","DMA Ch1 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1034,x","DMA Ch1 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1036,x","DMA Ch1 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1038,x","DMA Ch1 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x103A,x","DMA Ch1 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x103C,x","DMA Ch1 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x103E,x","DMA Ch1 DST_ADDR_ACTIVE");
-
-    GEL_WatchAdd("*0x1040,x","DMA Ch2 MODE");
-    GEL_WatchAdd("*0x1041,x","DMA Ch2 CONTROL");
-    GEL_WatchAdd("*0x1042,x","DMA Ch2 BURST_SIZE");
-    GEL_WatchAdd("*0x1043,x","DMA Ch2 BURST_COUNT");
-    GEL_WatchAdd("*0x1044,x","DMA Ch2 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x1045,x","DMA Ch2 DST_BURST_STEP");
-    GEL_WatchAdd("*0x1046,x","DMA Ch2 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x1047,x","DMA Ch2 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x1048,x","DMA Ch2 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x1049,x","DMA Ch2 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x104A,x","DMA Ch2 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x104B,x","DMA Ch2 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x104C,x","DMA Ch2 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x104D,x","DMA Ch2 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x104E,x","DMA Ch2 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x104F,x","DMA Ch2 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x1050,x","DMA Ch2 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1052,x","DMA Ch2 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1054,x","DMA Ch2 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1056,x","DMA Ch2 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1058,x","DMA Ch2 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x105A,x","DMA Ch2 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x105C,x","DMA Ch2 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x105E,x","DMA Ch2 DST_ADDR_ACTIVE");
-
-    GEL_WatchAdd("*0x1060,x","DMA Ch3 MODE");
-    GEL_WatchAdd("*0x1061,x","DMA Ch3 CONTROL");
-    GEL_WatchAdd("*0x1062,x","DMA Ch3 BURST_SIZE");
-    GEL_WatchAdd("*0x1063,x","DMA Ch3 BURST_COUNT");
-    GEL_WatchAdd("*0x1064,x","DMA Ch3 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x1065,x","DMA Ch3 DST_BURST_STEP");
-    GEL_WatchAdd("*0x1066,x","DMA Ch3 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x1067,x","DMA Ch3 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x1068,x","DMA Ch3 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x1069,x","DMA Ch3 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x106A,x","DMA Ch3 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x106B,x","DMA Ch3 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x106C,x","DMA Ch3 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x106D,x","DMA Ch3 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x106E,x","DMA Ch3 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x106F,x","DMA Ch3 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x1070,x","DMA Ch3 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1072,x","DMA Ch3 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1074,x","DMA Ch3 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1076,x","DMA Ch3 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1078,x","DMA Ch3 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x107A,x","DMA Ch3 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x107C,x","DMA Ch3 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x107E,x","DMA Ch3 DST_ADDR_ACTIVE");
-
-    GEL_WatchAdd("*0x1080,x","DMA Ch4 MODE");
-    GEL_WatchAdd("*0x1081,x","DMA Ch4 CONTROL");
-    GEL_WatchAdd("*0x1082,x","DMA Ch4 BURST_SIZE");
-    GEL_WatchAdd("*0x1083,x","DMA Ch4 BURST_COUNT");
-    GEL_WatchAdd("*0x1084,x","DMA Ch4 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x1085,x","DMA Ch4 DST_BURST_STEP");
-    GEL_WatchAdd("*0x1086,x","DMA Ch4 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x1087,x","DMA Ch4 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x1088,x","DMA Ch4 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x1089,x","DMA Ch4 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x108A,x","DMA Ch4 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x108B,x","DMA Ch4 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x108C,x","DMA Ch4 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x108D,x","DMA Ch4 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x108E,x","DMA Ch4 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x108F,x","DMA Ch4 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x1090,x","DMA Ch4 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1092,x","DMA Ch4 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1094,x","DMA Ch4 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1096,x","DMA Ch4 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1098,x","DMA Ch4 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x109A,x","DMA Ch4 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x109C,x","DMA Ch4 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x109E,x","DMA Ch4 DST_ADDR_ACTIVE");
-
-    GEL_WatchAdd("*0x10A0,x","DMA Ch5 MODE");
-    GEL_WatchAdd("*0x10A1,x","DMA Ch5 CONTROL");
-    GEL_WatchAdd("*0x10A2,x","DMA Ch5 BURST_SIZE");
-    GEL_WatchAdd("*0x10A3,x","DMA Ch5 BURST_COUNT");
-    GEL_WatchAdd("*0x10A4,x","DMA Ch5 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x10A5,x","DMA Ch5 DST_BURST_STEP");
-    GEL_WatchAdd("*0x10A6,x","DMA Ch5 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x10A7,x","DMA Ch5 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x10A8,x","DMA Ch5 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x10A9,x","DMA Ch5 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x10AA,x","DMA Ch5 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x10AB,x","DMA Ch5 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x10AC,x","DMA Ch5 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x10AD,x","DMA Ch5 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x10AE,x","DMA Ch5 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x10AF,x","DMA Ch5 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x10B0,x","DMA Ch5 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10B2,x","DMA Ch5 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10B4,x","DMA Ch5 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10B6,x","DMA Ch5 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10B8,x","DMA Ch5 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10BA,x","DMA Ch5 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10BC,x","DMA Ch5 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10BE,x","DMA Ch5 DST_ADDR_ACTIVE");
-
-    GEL_WatchAdd("*0x10C0,x","DMA Ch6 MODE");
-    GEL_WatchAdd("*0x10C1,x","DMA Ch6 CONTROL");
-    GEL_WatchAdd("*0x10C2,x","DMA Ch6 BURST_SIZE");
-    GEL_WatchAdd("*0x10C3,x","DMA Ch6 BURST_COUNT");
-    GEL_WatchAdd("*0x10C4,x","DMA Ch6 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x10C5,x","DMA Ch6 DST_BURST_STEP");
-    GEL_WatchAdd("*0x10C6,x","DMA Ch6 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x10C7,x","DMA Ch6 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x10C8,x","DMA Ch6 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x10C9,x","DMA Ch6 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x10CA,x","DMA Ch6 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x10CB,x","DMA Ch6 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x10CC,x","DMA Ch6 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x10CD,x","DMA Ch6 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x10CE,x","DMA Ch6 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x10CF,x","DMA Ch6 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x10D0,x","DMA Ch6 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10D2,x","DMA Ch6 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10D4,x","DMA Ch6 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10D6,x","DMA Ch6 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10D8,x","DMA Ch6 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10DA,x","DMA Ch6 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10DC,x","DMA Ch6 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10DE,x","DMA Ch6 DST_ADDR_ACTIVE");
-
-
-}
-hotmenu DMA_Channel_1_regs()
-{
-    GEL_WatchAdd("*0x1020,x","DMA Ch1 MODE");
-    GEL_WatchAdd("*0x1021,x","DMA Ch1 CONTROL");
-    GEL_WatchAdd("*0x1022,x","DMA Ch1 BURST_SIZE");
-    GEL_WatchAdd("*0x1023,x","DMA Ch1 BURST_COUNT");
-    GEL_WatchAdd("*0x1024,x","DMA Ch1 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x1025,x","DMA Ch1 DST_BURST_STEP");
-    GEL_WatchAdd("*0x1026,x","DMA Ch1 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x1027,x","DMA Ch1 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x1028,x","DMA Ch1 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x1029,x","DMA Ch1 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x102A,x","DMA Ch1 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x102B,x","DMA Ch1 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x102C,x","DMA Ch1 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x102D,x","DMA Ch1 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x102E,x","DMA Ch1 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x102F,x","DMA Ch1 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x1030,x","DMA Ch1 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1032,x","DMA Ch1 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1034,x","DMA Ch1 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1036,x","DMA Ch1 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1038,x","DMA Ch1 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x103A,x","DMA Ch1 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x103C,x","DMA Ch1 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x103E,x","DMA Ch1 DST_ADDR_ACTIVE");
-}
-
-hotmenu DMA_Channel_2_regs()
-{
-    GEL_WatchAdd("*0x1040,x","DMA Ch2 MODE");
-    GEL_WatchAdd("*0x1041,x","DMA Ch2 CONTROL");
-    GEL_WatchAdd("*0x1042,x","DMA Ch2 BURST_SIZE");
-    GEL_WatchAdd("*0x1043,x","DMA Ch2 BURST_COUNT");
-    GEL_WatchAdd("*0x1044,x","DMA Ch2 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x1045,x","DMA Ch2 DST_BURST_STEP");
-    GEL_WatchAdd("*0x1046,x","DMA Ch2 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x1047,x","DMA Ch2 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x1048,x","DMA Ch2 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x1049,x","DMA Ch2 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x104A,x","DMA Ch2 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x104B,x","DMA Ch2 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x104C,x","DMA Ch2 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x104D,x","DMA Ch2 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x104E,x","DMA Ch2 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x104F,x","DMA Ch2 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x1050,x","DMA Ch2 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1052,x","DMA Ch2 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1054,x","DMA Ch2 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1056,x","DMA Ch2 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1058,x","DMA Ch2 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x105A,x","DMA Ch2 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x105C,x","DMA Ch2 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x105E,x","DMA Ch2 DST_ADDR_ACTIVE");
-}
-hotmenu DMA_Channel_3_regs()
-{
-    GEL_WatchAdd("*0x1060,x","DMA Ch3 MODE");
-    GEL_WatchAdd("*0x1061,x","DMA Ch3 CONTROL");
-    GEL_WatchAdd("*0x1062,x","DMA Ch3 BURST_SIZE");
-    GEL_WatchAdd("*0x1063,x","DMA Ch3 BURST_COUNT");
-    GEL_WatchAdd("*0x1064,x","DMA Ch3 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x1065,x","DMA Ch3 DST_BURST_STEP");
-    GEL_WatchAdd("*0x1066,x","DMA Ch3 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x1067,x","DMA Ch3 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x1068,x","DMA Ch3 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x1069,x","DMA Ch3 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x106A,x","DMA Ch3 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x106B,x","DMA Ch3 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x106C,x","DMA Ch3 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x106D,x","DMA Ch3 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x106E,x","DMA Ch3 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x106F,x","DMA Ch3 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x1070,x","DMA Ch3 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1072,x","DMA Ch3 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1074,x","DMA Ch3 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1076,x","DMA Ch3 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1078,x","DMA Ch3 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x107A,x","DMA Ch3 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x107C,x","DMA Ch3 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x107E,x","DMA Ch3 DST_ADDR_ACTIVE");
-}
-hotmenu DMA_Channel_4_regs()
-{
-    GEL_WatchAdd("*0x1080,x","DMA Ch4 MODE");
-    GEL_WatchAdd("*0x1081,x","DMA Ch4 CONTROL");
-    GEL_WatchAdd("*0x1082,x","DMA Ch4 BURST_SIZE");
-    GEL_WatchAdd("*0x1083,x","DMA Ch4 BURST_COUNT");
-    GEL_WatchAdd("*0x1084,x","DMA Ch4 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x1085,x","DMA Ch4 DST_BURST_STEP");
-    GEL_WatchAdd("*0x1086,x","DMA Ch4 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x1087,x","DMA Ch4 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x1088,x","DMA Ch4 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x1089,x","DMA Ch4 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x108A,x","DMA Ch4 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x108B,x","DMA Ch4 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x108C,x","DMA Ch4 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x108D,x","DMA Ch4 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x108E,x","DMA Ch4 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x108F,x","DMA Ch4 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x1090,x","DMA Ch4 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1092,x","DMA Ch4 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x1094,x","DMA Ch4 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1096,x","DMA Ch4 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x1098,x","DMA Ch4 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x109A,x","DMA Ch4 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x109C,x","DMA Ch4 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x109E,x","DMA Ch4 DST_ADDR_ACTIVE");
-}
-hotmenu DMA_Channel_5_regs()
-{
-    GEL_WatchAdd("*0x10A0,x","DMA Ch5 MODE");
-    GEL_WatchAdd("*0x10A1,x","DMA Ch5 CONTROL");
-    GEL_WatchAdd("*0x10A2,x","DMA Ch5 BURST_SIZE");
-    GEL_WatchAdd("*0x10A3,x","DMA Ch5 BURST_COUNT");
-    GEL_WatchAdd("*0x10A4,x","DMA Ch5 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x10A5,x","DMA Ch5 DST_BURST_STEP");
-    GEL_WatchAdd("*0x10A6,x","DMA Ch5 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x10A7,x","DMA Ch5 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x10A8,x","DMA Ch5 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x10A9,x","DMA Ch5 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x10AA,x","DMA Ch5 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x10AB,x","DMA Ch5 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x10AC,x","DMA Ch5 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x10AD,x","DMA Ch5 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x10AE,x","DMA Ch5 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x10AF,x","DMA Ch5 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x10B0,x","DMA Ch5 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10B2,x","DMA Ch5 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10B4,x","DMA Ch5 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10B6,x","DMA Ch5 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10B8,x","DMA Ch5 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10BA,x","DMA Ch5 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10BC,x","DMA Ch5 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10BE,x","DMA Ch5 DST_ADDR_ACTIVE");
-}
-hotmenu DMA_Channel_6_regs()
-{
-    GEL_WatchAdd("*0x10C0,x","DMA Ch6 MODE");
-    GEL_WatchAdd("*0x10C1,x","DMA Ch6 CONTROL");
-    GEL_WatchAdd("*0x10C2,x","DMA Ch6 BURST_SIZE");
-    GEL_WatchAdd("*0x10C3,x","DMA Ch6 BURST_COUNT");
-    GEL_WatchAdd("*0x10C4,x","DMA Ch6 SRC_BURST_STEP");
-    GEL_WatchAdd("*0x10C5,x","DMA Ch6 DST_BURST_STEP");
-    GEL_WatchAdd("*0x10C6,x","DMA Ch6 TRANSFER_SIZE");
-    GEL_WatchAdd("*0x10C7,x","DMA Ch6 TRANSFER_COUNT");
-    GEL_WatchAdd("*0x10C8,x","DMA Ch6 SRC_TRANSFER_STEP");
-    GEL_WatchAdd("*0x10C9,x","DMA Ch6 DST_TRANSFER_STEP");
-    GEL_WatchAdd("*0x10CA,x","DMA Ch6 SRC_WRAP_SIZE");
-    GEL_WatchAdd("*0x10CB,x","DMA Ch6 SRC_WRAP_COUNT");
-    GEL_WatchAdd("*0x10CC,x","DMA Ch6 SRC_WRAP_STEP");
-    GEL_WatchAdd("*0x10CD,x","DMA Ch6 DST_WRAP_SIZE");
-    GEL_WatchAdd("*0x10CE,x","DMA Ch6 DST_WRAP_COUNT");
-    GEL_WatchAdd("*0x10CF,x","DMA Ch6 DST_WRAP_STEP");
-    GEL_WatchAdd("*(long *)0x10D0,x","DMA Ch6 SRC_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10D2,x","DMA Ch6 SRC_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10D4,x","DMA Ch6 SRC_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10D6,x","DMA Ch6 SRC_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10D8,x","DMA Ch6 DST_BEG_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10DA,x","DMA Ch6 DST_ADDR_SHDW");
-    GEL_WatchAdd("*(long *)0x10DC,x","DMA Ch6 DST_BEG_ADDR_ACTIVE");
-    GEL_WatchAdd("*(long *)0x10DE,x","DMA Ch6 DST_ADDR_ACTIVE");
-}
-
-/********************************************************************/
-/* eCAN Registers                                                   */
-/********************************************************************/
-menuitem "Watch eCAN Registers";
-
-hotmenu eCAN_A_Global_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6000,x","eCANA CANME");
-    GEL_WatchAdd("*(long *)0x6002,x","eCANA CANMD");
-    GEL_WatchAdd("*(long *)0x6004,x","eCANA CANTRS");
-    GEL_WatchAdd("*(long *)0x6006,x","eCANA CANTRR");
-    GEL_WatchAdd("*(long *)0x6008,x","eCANA CANTA");
-    GEL_WatchAdd("*(long *)0x600A,x","eCANA CANAA");
-    GEL_WatchAdd("*(long *)0x600C,x","eCANA CANRMP");
-    GEL_WatchAdd("*(long *)0x600E,x","eCANA CANRML");
-    GEL_WatchAdd("*(long *)0x6010,x","eCANA CANRFP");
-    GEL_WatchAdd("*(long *)0x6014,x","eCANA CANMC");
-    GEL_WatchAdd("*(long *)0x6016,x","eCANA CANBTC");
-    GEL_WatchAdd("*(long *)0x6018,x","eCANA CANES");
-    GEL_WatchAdd("*(long *)0x601A,x","eCANA CANTEC");
-    GEL_WatchAdd("*(long *)0x601C,x","eCANA CANREC");
-    GEL_WatchAdd("*(long *)0x601E,x","eCANA CANGIF0");
-    GEL_WatchAdd("*(long *)0x6020,x","eCANA CANGIM");
-    GEL_WatchAdd("*(long *)0x6022,x","eCANA CANGIF1");
-    GEL_WatchAdd("*(long *)0x6024,x","eCANA CANMIM");
-    GEL_WatchAdd("*(long *)0x6026,x","eCANA CANMIL");
-    GEL_WatchAdd("*(long *)0x6028,x","eCANA CANOPC");
-    GEL_WatchAdd("*(long *)0x602A,x","eCANA CANTIOC");
-    GEL_WatchAdd("*(long *)0x602C,x","eCANA CANRIOC");
-    GEL_WatchAdd("*(long *)0x602E,x","eCANA CANLNT");
-    GEL_WatchAdd("*(long *)0x6030,x","eCANA CANTOC");
-    GEL_WatchAdd("*(long *)0x6032,x","eCANA CANTOS");
-}
-hotmenu eCAN_A_Mailbox_0_to_1_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6040,x","eCANA LAM0");
-    GEL_WatchAdd("*(long *)0x6080,x","eCANA MOTS0");
-    GEL_WatchAdd("*(long *)0x60C0,x","eCANA MOTO0");
-    GEL_WatchAdd("*(long *)0x6100,x","eCANA MID0");
-    GEL_WatchAdd("*(long *)0x6102,x","eCANA MCF0");
-    GEL_WatchAdd("*(long *)0x6104,x","eCANA MDL0");
-    GEL_WatchAdd("*(long *)0x6106,x","eCANA MDH0");
-    
-    GEL_WatchAdd("*(long *)0x6042,x","eCANA LAM1");
-    GEL_WatchAdd("*(long *)0x6082,x","eCANA MOTS1");
-    GEL_WatchAdd("*(long *)0x60C2,x","eCANA MOTO1");
-    GEL_WatchAdd("*(long *)0x6108,x","eCANA MID1");
-    GEL_WatchAdd("*(long *)0x610A,x","eCANA MCF1");
-    GEL_WatchAdd("*(long *)0x610C,x","eCANA MDL1");
-    GEL_WatchAdd("*(long *)0x610E,x","eCANA MDH1");
-}
-hotmenu eCAN_A_Mailbox_2_to_3_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6044,x","eCANA LAM2");
-    GEL_WatchAdd("*(long *)0x6084,x","eCANA MOTS2");
-    GEL_WatchAdd("*(long *)0x60C4,x","eCANA MOTO2");
-    GEL_WatchAdd("*(long *)0x6110,x","eCANA MID2");
-    GEL_WatchAdd("*(long *)0x6112,x","eCANA MCF2");
-    GEL_WatchAdd("*(long *)0x6114,x","eCANA MDL2");
-    GEL_WatchAdd("*(long *)0x6116,x","eCANA MDH2");
-
-    GEL_WatchAdd("*(long *)0x6046,x","eCANA LAM3");
-    GEL_WatchAdd("*(long *)0x6086,x","eCANA MOTS3");
-    GEL_WatchAdd("*(long *)0x60C6,x","eCANA MOTO3");
-    GEL_WatchAdd("*(long *)0x6118,x","eCANA MID3");
-    GEL_WatchAdd("*(long *)0x611A,x","eCANA MCF3");
-    GEL_WatchAdd("*(long *)0x611C,x","eCANA MDL3");
-    GEL_WatchAdd("*(long *)0x611E,x","eCANA MDH3");
-}
-hotmenu eCAN_A_Mailbox_4_to_5_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6048,x","eCANA LAM4");
-    GEL_WatchAdd("*(long *)0x6088,x","eCANA MOTS4");
-    GEL_WatchAdd("*(long *)0x60C8,x","eCANA MOTO4");
-    GEL_WatchAdd("*(long *)0x6120,x","eCANA MID4");
-    GEL_WatchAdd("*(long *)0x6122,x","eCANA MCF4");
-    GEL_WatchAdd("*(long *)0x6124,x","eCANA MDL4");
-    GEL_WatchAdd("*(long *)0x6126,x","eCANA MDH4");
-    
-    GEL_WatchAdd("*(long *)0x604A,x","eCANA LAM5");
-    GEL_WatchAdd("*(long *)0x608A,x","eCANA MOTS5");
-    GEL_WatchAdd("*(long *)0x60CA,x","eCANA MOTO5");
-    GEL_WatchAdd("*(long *)0x6128,x","eCANA MID5");
-    GEL_WatchAdd("*(long *)0x612A,x","eCANA MCF5");
-    GEL_WatchAdd("*(long *)0x612C,x","eCANA MDL5");
-    GEL_WatchAdd("*(long *)0x612E,x","eCANA MDH5");
-}
-hotmenu eCAN_A_Mailbox_6_to_7_Regs()
-{
-    GEL_WatchAdd("*(long *)0x604C,x","eCANA LAM6");
-    GEL_WatchAdd("*(long *)0x608C,x","eCANA MOTS6");
-    GEL_WatchAdd("*(long *)0x60CC,x","eCANA MOTO6");
-    GEL_WatchAdd("*(long *)0x6130,x","eCANA MID6");
-    GEL_WatchAdd("*(long *)0x6132,x","eCANA MCF6");
-    GEL_WatchAdd("*(long *)0x6134,x","eCANA MDL6");
-    GEL_WatchAdd("*(long *)0x6136,x","eCANA MDH6");
-    
-    GEL_WatchAdd("*(long *)0x604E,x","eCANA LAM7");
-    GEL_WatchAdd("*(long *)0x608E,x","eCANA MOTS7");
-    GEL_WatchAdd("*(long *)0x60CE,x","eCANA MOTO7");
-    GEL_WatchAdd("*(long *)0x6138,x","eCANA MID7");
-    GEL_WatchAdd("*(long *)0x613A,x","eCANA MCF7");
-    GEL_WatchAdd("*(long *)0x613C,x","eCANA MDL7");
-    GEL_WatchAdd("*(long *)0x613E,x","eCANA MDH7");
-}
-hotmenu eCAN_A_Mailbox_8_to_9_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6050,x","eCANA LAM8");
-    GEL_WatchAdd("*(long *)0x6090,x","eCANA MOTS8");
-    GEL_WatchAdd("*(long *)0x60D0,x","eCANA MOTO8");
-    GEL_WatchAdd("*(long *)0x6140,x","eCANA MID8");
-    GEL_WatchAdd("*(long *)0x6142,x","eCANA MCF8");
-    GEL_WatchAdd("*(long *)0x6144,x","eCANA MDL8");
-    GEL_WatchAdd("*(long *)0x6146,x","eCANA MDH8");
-
-    GEL_WatchAdd("*(long *)0x6052,x","eCANA LAM9");
-    GEL_WatchAdd("*(long *)0x6092,x","eCANA MOTS9");
-    GEL_WatchAdd("*(long *)0x60D2,x","eCANA MOTO9");
-    GEL_WatchAdd("*(long *)0x6148,x","eCANA MID9");
-    GEL_WatchAdd("*(long *)0x614A,x","eCANA MCF9");
-    GEL_WatchAdd("*(long *)0x614C,x","eCANA MDL9");
-    GEL_WatchAdd("*(long *)0x614E,x","eCANA MDH9");
-}
-hotmenu eCAN_A_Mailbox_10_to_11_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6054,x","eCANA LAM10");
-    GEL_WatchAdd("*(long *)0x6094,x","eCANA MOTS10");
-    GEL_WatchAdd("*(long *)0x60D4,x","eCANA MOTO10");
-    GEL_WatchAdd("*(long *)0x6150,x","eCANA MID10");
-    GEL_WatchAdd("*(long *)0x6152,x","eCANA MCF10");
-    GEL_WatchAdd("*(long *)0x6154,x","eCANA MDL10");
-    GEL_WatchAdd("*(long *)0x6156,x","eCANA MDH10");
-
-    GEL_WatchAdd("*(long *)0x6056,x","eCANA LAM11");
-    GEL_WatchAdd("*(long *)0x6096,x","eCANA MOTS11");
-    GEL_WatchAdd("*(long *)0x60D6,x","eCANA MOTO11");
-    GEL_WatchAdd("*(long *)0x6158,x","eCANA MID11");
-    GEL_WatchAdd("*(long *)0x615A,x","eCANA MCF11");
-    GEL_WatchAdd("*(long *)0x615C,x","eCANA MDL11");
-    GEL_WatchAdd("*(long *)0x615E,x","eCANA MDH11");
-}
-hotmenu eCAN_A_Mailbox_12_to_13_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6058,x","eCANA LAM12");
-    GEL_WatchAdd("*(long *)0x6098,x","eCANA MOTS12");
-    GEL_WatchAdd("*(long *)0x60D8,x","eCANA MOTO12");
-    GEL_WatchAdd("*(long *)0x6160,x","eCANA MID12");
-    GEL_WatchAdd("*(long *)0x6162,x","eCANA MCF12");
-    GEL_WatchAdd("*(long *)0x6164,x","eCANA MDL12");
-    GEL_WatchAdd("*(long *)0x6166,x","eCANA MDH12");
-    
-    GEL_WatchAdd("*(long *)0x605A,x","eCANA LAM13");
-    GEL_WatchAdd("*(long *)0x609A,x","eCANA MOTS13");
-    GEL_WatchAdd("*(long *)0x60DA,x","eCANA MOTO13");
-    GEL_WatchAdd("*(long *)0x6168,x","eCANA MID13");
-    GEL_WatchAdd("*(long *)0x616A,x","eCANA MCF13");
-    GEL_WatchAdd("*(long *)0x616C,x","eCANA MDL13");
-    GEL_WatchAdd("*(long *)0x616E,x","eCANA MDH13");
-}
-hotmenu eCAN_A_Mailbox_14_to_15_Regs()
-{
-    GEL_WatchAdd("*(long *)0x605C,x","eCANA LAM14");
-    GEL_WatchAdd("*(long *)0x609C,x","eCANA MOTS14");
-    GEL_WatchAdd("*(long *)0x60DC,x","eCANA MOTO14");
-    GEL_WatchAdd("*(long *)0x6170,x","eCANA MID14");
-    GEL_WatchAdd("*(long *)0x6172,x","eCANA MCF14");
-    GEL_WatchAdd("*(long *)0x6174,x","eCANA MDL14");
-    GEL_WatchAdd("*(long *)0x6176,x","eCANA MDH14");
-    
-    GEL_WatchAdd("*(long *)0x605E,x","eCANA LAM15");
-    GEL_WatchAdd("*(long *)0x609E,x","eCANA MOTS15");
-    GEL_WatchAdd("*(long *)0x60DE,x","eCANA MOTO15");
-    GEL_WatchAdd("*(long *)0x6178,x","eCANA MID15");
-    GEL_WatchAdd("*(long *)0x617A,x","eCANA MCF15");
-    GEL_WatchAdd("*(long *)0x617C,x","eCANA MDL15");
-    GEL_WatchAdd("*(long *)0x617E,x","eCANA MDH15");
-}
-hotmenu eCAN_A_Mailbox_16_to_17_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6060,x","eCANA LAM16");
-    GEL_WatchAdd("*(long *)0x60A0,x","eCANA MOTS16");
-    GEL_WatchAdd("*(long *)0x60E0,x","eCANA MOTO16");
-    GEL_WatchAdd("*(long *)0x6180,x","eCANA MID16");
-    GEL_WatchAdd("*(long *)0x6182,x","eCANA MCF16");
-    GEL_WatchAdd("*(long *)0x6184,x","eCANA MDL16");
-    GEL_WatchAdd("*(long *)0x6186,x","eCANA MDH16");
-
-    GEL_WatchAdd("*(long *)0x6062,x","eCANA LAM17");
-    GEL_WatchAdd("*(long *)0x60A2,x","eCANA MOTS17");
-    GEL_WatchAdd("*(long *)0x60E2,x","eCANA MOTO17");
-    GEL_WatchAdd("*(long *)0x6188,x","eCANA MID17");
-    GEL_WatchAdd("*(long *)0x618A,x","eCANA MCF17");
-    GEL_WatchAdd("*(long *)0x618C,x","eCANA MDL17");
-    GEL_WatchAdd("*(long *)0x618E,x","eCANA MDH17");
-}
-hotmenu eCAN_A_Mailbox_18_to_19_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6064,x","eCANA LAM18");
-    GEL_WatchAdd("*(long *)0x60A4,x","eCANA MOTS18");
-    GEL_WatchAdd("*(long *)0x60E4,x","eCANA MOTO18");
-    GEL_WatchAdd("*(long *)0x6190,x","eCANA MID18");
-    GEL_WatchAdd("*(long *)0x6192,x","eCANA MCF18");
-    GEL_WatchAdd("*(long *)0x6194,x","eCANA MDL18");
-    GEL_WatchAdd("*(long *)0x6196,x","eCANA MDH18");
-
-    GEL_WatchAdd("*(long *)0x6066,x","eCANA LAM19");
-    GEL_WatchAdd("*(long *)0x60A6,x","eCANA MOTS19");
-    GEL_WatchAdd("*(long *)0x60E6,x","eCANA MOTO19");
-    GEL_WatchAdd("*(long *)0x6198,x","eCANA MID19");
-    GEL_WatchAdd("*(long *)0x619A,x","eCANA MCF19");
-    GEL_WatchAdd("*(long *)0x619C,x","eCANA MDL19");
-    GEL_WatchAdd("*(long *)0x619E,x","eCANA MDH19");
-}
-hotmenu eCAN_A_Mailbox_20_to_21_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6068,x","eCANA LAM20");
-    GEL_WatchAdd("*(long *)0x60A8,x","eCANA MOTS20");
-    GEL_WatchAdd("*(long *)0x60E8,x","eCANA MOTO20");
-    GEL_WatchAdd("*(long *)0x61A0,x","eCANA MID20");
-    GEL_WatchAdd("*(long *)0x61A2,x","eCANA MCF20");
-    GEL_WatchAdd("*(long *)0x61A4,x","eCANA MDL20");
-    GEL_WatchAdd("*(long *)0x61A6,x","eCANA MDH20");
-    
-    GEL_WatchAdd("*(long *)0x606A,x","eCANA LAM21");
-    GEL_WatchAdd("*(long *)0x60AA,x","eCANA MOTS21");
-    GEL_WatchAdd("*(long *)0x60EA,x","eCANA MOTO21");
-    GEL_WatchAdd("*(long *)0x61A8,x","eCANA MID21");
-    GEL_WatchAdd("*(long *)0x61AA,x","eCANA MCF21");
-    GEL_WatchAdd("*(long *)0x61AC,x","eCANA MDL21");
-    GEL_WatchAdd("*(long *)0x61AE,x","eCANA MDH21");
-}
-hotmenu eCAN_A_Mailbox_22_to_23_Regs()
-{
-    GEL_WatchAdd("*(long *)0x606C,x","eCANA LAM22");
-    GEL_WatchAdd("*(long *)0x60AC,x","eCANA MOTS22");
-    GEL_WatchAdd("*(long *)0x60EC,x","eCANA MOTO22");
-    GEL_WatchAdd("*(long *)0x61B0,x","eCANA MID22");
-    GEL_WatchAdd("*(long *)0x61B2,x","eCANA MCF22");
-    GEL_WatchAdd("*(long *)0x61B4,x","eCANA MDL22");
-    GEL_WatchAdd("*(long *)0x61B6,x","eCANA MDH22");
-
-    GEL_WatchAdd("*(long *)0x606E,x","eCANA LAM23");
-    GEL_WatchAdd("*(long *)0x60AE,x","eCANA MOTS23");
-    GEL_WatchAdd("*(long *)0x60EE,x","eCANA MOTO23");
-    GEL_WatchAdd("*(long *)0x61B8,x","eCANA MID23");
-    GEL_WatchAdd("*(long *)0x61BA,x","eCANA MCF23");
-    GEL_WatchAdd("*(long *)0x61BC,x","eCANA MDL23");
-    GEL_WatchAdd("*(long *)0x61BE,x","eCANA MDH23");
-}
-hotmenu eCAN_A_Mailbox_24_to_25_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6070,x","eCANA LAM24");
-    GEL_WatchAdd("*(long *)0x60B0,x","eCANA MOTS24");
-    GEL_WatchAdd("*(long *)0x60F0,x","eCANA MOTO24");
-    GEL_WatchAdd("*(long *)0x61C0,x","eCANA MID24");
-    GEL_WatchAdd("*(long *)0x61C2,x","eCANA MCF24");
-    GEL_WatchAdd("*(long *)0x61C4,x","eCANA MDL24");
-    GEL_WatchAdd("*(long *)0x61C6,x","eCANA MDH24");
-
-    GEL_WatchAdd("*(long *)0x6072,x","eCANA LAM25");
-    GEL_WatchAdd("*(long *)0x60B2,x","eCANA MOTS25");
-    GEL_WatchAdd("*(long *)0x60F2,x","eCANA MOTO25");
-    GEL_WatchAdd("*(long *)0x61C8,x","eCANA MID25");
-    GEL_WatchAdd("*(long *)0x61CA,x","eCANA MCF25");
-    GEL_WatchAdd("*(long *)0x61CC,x","eCANA MDL25");
-    GEL_WatchAdd("*(long *)0x61CE,x","eCANA MDH25");
-}
-hotmenu eCAN_A_Mailbox_26_to_27_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6074,x","eCANA LAM26");
-    GEL_WatchAdd("*(long *)0x60B4,x","eCANA MOTS26");
-    GEL_WatchAdd("*(long *)0x60F4,x","eCANA MOTO26");
-    GEL_WatchAdd("*(long *)0x61D0,x","eCANA MID26");
-    GEL_WatchAdd("*(long *)0x61D2,x","eCANA MCF26");
-    GEL_WatchAdd("*(long *)0x61D4,x","eCANA MDL26");
-    GEL_WatchAdd("*(long *)0x61D6,x","eCANA MDH26");
-
-    GEL_WatchAdd("*(long *)0x6076,x","eCANA LAM27");
-    GEL_WatchAdd("*(long *)0x60B6,x","eCANA MOTS27");
-    GEL_WatchAdd("*(long *)0x60F6,x","eCANA MOTO27");
-    GEL_WatchAdd("*(long *)0x61D8,x","eCANA MID27");
-    GEL_WatchAdd("*(long *)0x61DA,x","eCANA MCF27");
-    GEL_WatchAdd("*(long *)0x61DC,x","eCANA MDL27");
-    GEL_WatchAdd("*(long *)0x61DE,x","eCANA MDH27");
-}
-hotmenu eCAN_A_Mailbox_28_to_29_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6078,x","eCANA LAM28");
-    GEL_WatchAdd("*(long *)0x60B8,x","eCANA MOTS28");
-    GEL_WatchAdd("*(long *)0x60F8,x","eCANA MOTO28");
-    GEL_WatchAdd("*(long *)0x61E0,x","eCANA MID28");
-    GEL_WatchAdd("*(long *)0x61E2,x","eCANA MCF28");
-    GEL_WatchAdd("*(long *)0x61E4,x","eCANA MDL28");
-    GEL_WatchAdd("*(long *)0x61E6,x","eCANA MDH28");
-
-    GEL_WatchAdd("*(long *)0x607A,x","eCANA LAM29");
-    GEL_WatchAdd("*(long *)0x60BA,x","eCANA MOTS29");
-    GEL_WatchAdd("*(long *)0x60FA,x","eCANA MOTO29");
-    GEL_WatchAdd("*(long *)0x61E8,x","eCANA MID29");
-    GEL_WatchAdd("*(long *)0x61EA,x","eCANA MCF29");
-    GEL_WatchAdd("*(long *)0x61EC,x","eCANA MDL29");
-    GEL_WatchAdd("*(long *)0x61EE,x","eCANA MDH29");
-}
-hotmenu eCAN_A_Mailbox_30_to_31_Regs()
-{
-    GEL_WatchAdd("*(long *)0x607C,x","eCANA LAM30");
-    GEL_WatchAdd("*(long *)0x60BC,x","eCANA MOTS30");
-    GEL_WatchAdd("*(long *)0x60FC,x","eCANA MOTO30");
-    GEL_WatchAdd("*(long *)0x61F0,x","eCANA MID30");
-    GEL_WatchAdd("*(long *)0x61F2,x","eCANA MCF30");
-    GEL_WatchAdd("*(long *)0x61F4,x","eCANA MDL30");
-    GEL_WatchAdd("*(long *)0x61F6,x","eCANA MDH30");
-
-    GEL_WatchAdd("*(long *)0x607E,x","eCANA LAM31");
-    GEL_WatchAdd("*(long *)0x60BE,x","eCANA MOTS31");
-    GEL_WatchAdd("*(long *)0x60FE,x","eCANA MOTO31");
-    GEL_WatchAdd("*(long *)0x61F8,x","eCANA MID31");
-    GEL_WatchAdd("*(long *)0x61FA,x","eCANA MCF31");
-    GEL_WatchAdd("*(long *)0x61FC,x","eCANA MDL31");
-    GEL_WatchAdd("*(long *)0x61FE,x","eCANA MDH31");
-}
-hotmenu eCAN_B_Global_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6200,x","eCANB CANME");
-    GEL_WatchAdd("*(long *)0x6202,x","eCANB CANMD");
-    GEL_WatchAdd("*(long *)0x6204,x","eCANB CANTRS");
-    GEL_WatchAdd("*(long *)0x6206,x","eCANB CANTRR");
-    GEL_WatchAdd("*(long *)0x6208,x","eCANB CANTA");
-    GEL_WatchAdd("*(long *)0x620A,x","eCANB CANAA");
-    GEL_WatchAdd("*(long *)0x620C,x","eCANB CANRMP");
-    GEL_WatchAdd("*(long *)0x620E,x","eCANB CANRML");
-    GEL_WatchAdd("*(long *)0x6210,x","eCANB CANRFP");
-    GEL_WatchAdd("*(long *)0x6214,x","eCANB CANMC");
-    GEL_WatchAdd("*(long *)0x6216,x","eCANB CANBTC");
-    GEL_WatchAdd("*(long *)0x6218,x","eCANB CANES");
-    GEL_WatchAdd("*(long *)0x621A,x","eCANB CANTEC");
-    GEL_WatchAdd("*(long *)0x621C,x","eCANB CANREC");
-    GEL_WatchAdd("*(long *)0x621E,x","eCANB CANGIF0");
-    GEL_WatchAdd("*(long *)0x6220,x","eCANB CANGIM");
-    GEL_WatchAdd("*(long *)0x6222,x","eCANB CANGIF1");
-    GEL_WatchAdd("*(long *)0x6224,x","eCANB CANMIM");
-    GEL_WatchAdd("*(long *)0x6226,x","eCANB CANMIL");
-    GEL_WatchAdd("*(long *)0x6228,x","eCANB CANOPC");
-    GEL_WatchAdd("*(long *)0x622A,x","eCANB CANTIOC");
-    GEL_WatchAdd("*(long *)0x622C,x","eCANB CANRIOC");
-    GEL_WatchAdd("*(long *)0x622E,x","eCANB CANLNT");
-    GEL_WatchAdd("*(long *)0x6230,x","eCANB CANTOC");
-    GEL_WatchAdd("*(long *)0x6232,x","eCANB CANTOS");
-}
-hotmenu eCAN_B_Mailbox_0_to_1_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6240,x","eCANB LAM0");
-    GEL_WatchAdd("*(long *)0x6280,x","eCANB MOTS0");
-    GEL_WatchAdd("*(long *)0x62C0,x","eCANB MOTO0");
-    GEL_WatchAdd("*(long *)0x6300,x","eCANB MID0");
-    GEL_WatchAdd("*(long *)0x6302,x","eCANB MCF0");
-    GEL_WatchAdd("*(long *)0x6304,x","eCANB MDL0");
-    GEL_WatchAdd("*(long *)0x6306,x","eCANB MDH0");
-
-    GEL_WatchAdd("*(long *)0x6242,x","eCANB LAM1");
-    GEL_WatchAdd("*(long *)0x6282,x","eCANB MOTS1");
-    GEL_WatchAdd("*(long *)0x62C2,x","eCANB MOTO1");
-    GEL_WatchAdd("*(long *)0x6308,x","eCANB MID1");
-    GEL_WatchAdd("*(long *)0x630A,x","eCANB MCF1");
-    GEL_WatchAdd("*(long *)0x630C,x","eCANB MDL1");
-    GEL_WatchAdd("*(long *)0x630E,x","eCANB MDH1");
-}
-hotmenu eCAN_B_Mailbox_2_to_3_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6244,x","eCANB LAM2");
-    GEL_WatchAdd("*(long *)0x6284,x","eCANB MOTS2");
-    GEL_WatchAdd("*(long *)0x62C4,x","eCANB MOTO2");
-    GEL_WatchAdd("*(long *)0x6310,x","eCANB MID2");
-    GEL_WatchAdd("*(long *)0x6312,x","eCANB MCF2");
-    GEL_WatchAdd("*(long *)0x6314,x","eCANB MDL2");
-    GEL_WatchAdd("*(long *)0x6316,x","eCANB MDH2");
-
-    GEL_WatchAdd("*(long *)0x6246,x","eCANB LAM3");
-    GEL_WatchAdd("*(long *)0x6286,x","eCANB MOTS3");
-    GEL_WatchAdd("*(long *)0x62C6,x","eCANB MOTO3");
-    GEL_WatchAdd("*(long *)0x6318,x","eCANB MID3");
-    GEL_WatchAdd("*(long *)0x631A,x","eCANB MCF3");
-    GEL_WatchAdd("*(long *)0x631C,x","eCANB MDL3");
-    GEL_WatchAdd("*(long *)0x631E,x","eCANB MDH3");
-}
-hotmenu eCAN_B_Mailbox_4_to_5_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6248,x","eCANB LAM4");
-    GEL_WatchAdd("*(long *)0x6288,x","eCANB MOTS4");
-    GEL_WatchAdd("*(long *)0x62C8,x","eCANB MOTO4");
-    GEL_WatchAdd("*(long *)0x6320,x","eCANB MID4");
-    GEL_WatchAdd("*(long *)0x6322,x","eCANB MCF4");
-    GEL_WatchAdd("*(long *)0x6324,x","eCANB MDL4");
-    GEL_WatchAdd("*(long *)0x6326,x","eCANB MDH4");
-
-    GEL_WatchAdd("*(long *)0x624A,x","eCANB LAM5");
-    GEL_WatchAdd("*(long *)0x628A,x","eCANB MOTS5");
-    GEL_WatchAdd("*(long *)0x62CA,x","eCANB MOTO5");
-    GEL_WatchAdd("*(long *)0x6328,x","eCANB MID5");
-    GEL_WatchAdd("*(long *)0x632A,x","eCANB MCF5");
-    GEL_WatchAdd("*(long *)0x632C,x","eCANB MDL5");
-    GEL_WatchAdd("*(long *)0x632E,x","eCANB MDH5");
-}
-hotmenu eCAN_B_Mailbox_6_to_7_Regs()
-{
-    GEL_WatchAdd("*(long *)0x624C,x","eCANB LAM6");
-    GEL_WatchAdd("*(long *)0x628C,x","eCANB MOTS6");
-    GEL_WatchAdd("*(long *)0x62CC,x","eCANB MOTO6");
-    GEL_WatchAdd("*(long *)0x6330,x","eCANB MID6");
-    GEL_WatchAdd("*(long *)0x6332,x","eCANB MCF6");
-    GEL_WatchAdd("*(long *)0x6334,x","eCANB MDL6");
-    GEL_WatchAdd("*(long *)0x6336,x","eCANB MDH6");
-
-    GEL_WatchAdd("*(long *)0x624E,x","eCANB LAM7");
-    GEL_WatchAdd("*(long *)0x628E,x","eCANB MOTS7");
-    GEL_WatchAdd("*(long *)0x62CE,x","eCANB MOTO7");
-    GEL_WatchAdd("*(long *)0x6338,x","eCANB MID7");
-    GEL_WatchAdd("*(long *)0x633A,x","eCANB MCF7");
-    GEL_WatchAdd("*(long *)0x633C,x","eCANB MDL7");
-    GEL_WatchAdd("*(long *)0x633E,x","eCANB MDH7");
-}
-hotmenu eCAN_B_Mailbox_8_to_9_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6250,x","eCANB LAM8");
-    GEL_WatchAdd("*(long *)0x6290,x","eCANB MOTS8");
-    GEL_WatchAdd("*(long *)0x62D0,x","eCANB MOTO8");
-    GEL_WatchAdd("*(long *)0x6340,x","eCANB MID8");
-    GEL_WatchAdd("*(long *)0x6342,x","eCANB MCF8");
-    GEL_WatchAdd("*(long *)0x6344,x","eCANB MDL8");
-    GEL_WatchAdd("*(long *)0x6346,x","eCANB MDH8");
-
-    GEL_WatchAdd("*(long *)0x6252,x","eCANB LAM9");
-    GEL_WatchAdd("*(long *)0x6292,x","eCANB MOTS9");
-    GEL_WatchAdd("*(long *)0x62D2,x","eCANB MOTO9");
-    GEL_WatchAdd("*(long *)0x6348,x","eCANB MID9");
-    GEL_WatchAdd("*(long *)0x634A,x","eCANB MCF9");
-    GEL_WatchAdd("*(long *)0x634C,x","eCANB MDL9");
-    GEL_WatchAdd("*(long *)0x634E,x","eCANB MDH9");
-}
-hotmenu eCAN_B_Mailbox_10_to_11_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6254,x","eCANB LAM10");
-    GEL_WatchAdd("*(long *)0x6294,x","eCANB MOTS10");
-    GEL_WatchAdd("*(long *)0x62D4,x","eCANB MOTO10");
-    GEL_WatchAdd("*(long *)0x6350,x","eCANB MID10");
-    GEL_WatchAdd("*(long *)0x6352,x","eCANB MCF10");
-    GEL_WatchAdd("*(long *)0x6354,x","eCANB MDL10");
-    GEL_WatchAdd("*(long *)0x6356,x","eCANB MDH10");
-
-    GEL_WatchAdd("*(long *)0x6256,x","eCANB LAM11");
-    GEL_WatchAdd("*(long *)0x6296,x","eCANB MOTS11");
-    GEL_WatchAdd("*(long *)0x62D6,x","eCANB MOTO11");
-    GEL_WatchAdd("*(long *)0x6358,x","eCANB MID11");
-    GEL_WatchAdd("*(long *)0x635A,x","eCANB MCF11");
-    GEL_WatchAdd("*(long *)0x635C,x","eCANB MDL11");
-    GEL_WatchAdd("*(long *)0x635E,x","eCANB MDH11");
-}
-hotmenu eCAN_B_Mailbox_12_to_13_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6258,x","eCANB LAM12");
-    GEL_WatchAdd("*(long *)0x6298,x","eCANB MOTS12");
-    GEL_WatchAdd("*(long *)0x62D8,x","eCANB MOTO12");
-    GEL_WatchAdd("*(long *)0x6360,x","eCANB MID12");
-    GEL_WatchAdd("*(long *)0x6362,x","eCANB MCF12");
-    GEL_WatchAdd("*(long *)0x6364,x","eCANB MDL12");
-    GEL_WatchAdd("*(long *)0x6366,x","eCANB MDH12");
-
-    GEL_WatchAdd("*(long *)0x625A,x","eCANB LAM13");
-    GEL_WatchAdd("*(long *)0x629A,x","eCANB MOTS13");
-    GEL_WatchAdd("*(long *)0x62DA,x","eCANB MOTO13");
-    GEL_WatchAdd("*(long *)0x6368,x","eCANB MID13");
-    GEL_WatchAdd("*(long *)0x636A,x","eCANB MCF13");
-    GEL_WatchAdd("*(long *)0x636C,x","eCANB MDL13");
-    GEL_WatchAdd("*(long *)0x636E,x","eCANB MDH13");
-}
-hotmenu eCAN_B_Mailbox_14_to_15_Regs()
-{
-    GEL_WatchAdd("*(long *)0x625C,x","eCANB LAM14");
-    GEL_WatchAdd("*(long *)0x629C,x","eCANB MOTS14");
-    GEL_WatchAdd("*(long *)0x62DC,x","eCANB MOTO14");
-    GEL_WatchAdd("*(long *)0x6370,x","eCANB MID14");
-    GEL_WatchAdd("*(long *)0x6372,x","eCANB MCF14");
-    GEL_WatchAdd("*(long *)0x6374,x","eCANB MDL14");
-    GEL_WatchAdd("*(long *)0x6376,x","eCANB MDH14");
-
-    GEL_WatchAdd("*(long *)0x625E,x","eCANB LAM15");
-    GEL_WatchAdd("*(long *)0x629E,x","eCANB MOTS15");
-    GEL_WatchAdd("*(long *)0x62DE,x","eCANB MOTO15");
-    GEL_WatchAdd("*(long *)0x6378,x","eCANB MID15");
-    GEL_WatchAdd("*(long *)0x637A,x","eCANB MCF15");
-    GEL_WatchAdd("*(long *)0x637C,x","eCANB MDL15");
-    GEL_WatchAdd("*(long *)0x637E,x","eCANB MDH15");
-}
-hotmenu eCAN_B_Mailbox_16_to_17_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6260,x","eCANB LAM16");
-    GEL_WatchAdd("*(long *)0x62A0,x","eCANB MOTS16");
-    GEL_WatchAdd("*(long *)0x62E0,x","eCANB MOTO16");
-    GEL_WatchAdd("*(long *)0x6380,x","eCANB MID16");
-    GEL_WatchAdd("*(long *)0x6382,x","eCANB MCF16");
-    GEL_WatchAdd("*(long *)0x6384,x","eCANB MDL16");
-    GEL_WatchAdd("*(long *)0x6386,x","eCANB MDH16");
-
-    GEL_WatchAdd("*(long *)0x6262,x","eCANB LAM17");
-    GEL_WatchAdd("*(long *)0x62A2,x","eCANB MOTS17");
-    GEL_WatchAdd("*(long *)0x62E2,x","eCANB MOTO17");
-    GEL_WatchAdd("*(long *)0x6388,x","eCANB MID17");
-    GEL_WatchAdd("*(long *)0x638A,x","eCANB MCF17");
-    GEL_WatchAdd("*(long *)0x638C,x","eCANB MDL17");
-    GEL_WatchAdd("*(long *)0x638E,x","eCANB MDH17");
-}
-hotmenu eCAN_B_Mailbox_18_to_19_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6264,x","eCANB LAM18");
-    GEL_WatchAdd("*(long *)0x62A4,x","eCANB MOTS18");
-    GEL_WatchAdd("*(long *)0x62E4,x","eCANB MOTO18");
-    GEL_WatchAdd("*(long *)0x6390,x","eCANB MID18");
-    GEL_WatchAdd("*(long *)0x6392,x","eCANB MCF18");
-    GEL_WatchAdd("*(long *)0x6394,x","eCANB MDL18");
-    GEL_WatchAdd("*(long *)0x6396,x","eCANB MDH18");
-
-    GEL_WatchAdd("*(long *)0x6266,x","eCANB LAM19");
-    GEL_WatchAdd("*(long *)0x62A6,x","eCANB MOTS19");
-    GEL_WatchAdd("*(long *)0x62E6,x","eCANB MOTO19");
-    GEL_WatchAdd("*(long *)0x6398,x","eCANB MID19");
-    GEL_WatchAdd("*(long *)0x639A,x","eCANB MCF19");
-    GEL_WatchAdd("*(long *)0x639C,x","eCANB MDL19");
-    GEL_WatchAdd("*(long *)0x639E,x","eCANB MDH19");
-}
-hotmenu eCAN_B_Mailbox_20_to_21_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6268,x","eCANB LAM20");
-    GEL_WatchAdd("*(long *)0x62A8,x","eCANB MOTS20");
-    GEL_WatchAdd("*(long *)0x62E8,x","eCANB MOTO20");
-    GEL_WatchAdd("*(long *)0x63A0,x","eCANB MID20");
-    GEL_WatchAdd("*(long *)0x63A2,x","eCANB MCF20");
-    GEL_WatchAdd("*(long *)0x63A4,x","eCANB MDL20");
-    GEL_WatchAdd("*(long *)0x63A6,x","eCANB MDH20");
-
-    GEL_WatchAdd("*(long *)0x626A,x","eCANB LAM21");
-    GEL_WatchAdd("*(long *)0x62AA,x","eCANB MOTS21");
-    GEL_WatchAdd("*(long *)0x62EA,x","eCANB MOTO21");
-    GEL_WatchAdd("*(long *)0x63A8,x","eCANB MID21");
-    GEL_WatchAdd("*(long *)0x63AA,x","eCANB MCF21");
-    GEL_WatchAdd("*(long *)0x63AC,x","eCANB MDL21");
-    GEL_WatchAdd("*(long *)0x63AE,x","eCANB MDH21");
-}
-hotmenu eCAN_B_Mailbox_22_to_23_Regs()
-{
-    GEL_WatchAdd("*(long *)0x626C,x","eCANB LAM22");
-    GEL_WatchAdd("*(long *)0x62AC,x","eCANB MOTS22");
-    GEL_WatchAdd("*(long *)0x62EC,x","eCANB MOTO22");
-    GEL_WatchAdd("*(long *)0x63B0,x","eCANB MID22");
-    GEL_WatchAdd("*(long *)0x63B2,x","eCANB MCF22");
-    GEL_WatchAdd("*(long *)0x63B4,x","eCANB MDL22");
-    GEL_WatchAdd("*(long *)0x63B6,x","eCANB MDH22");
-
-    GEL_WatchAdd("*(long *)0x626E,x","eCANB LAM23");
-    GEL_WatchAdd("*(long *)0x62AE,x","eCANB MOTS23");
-    GEL_WatchAdd("*(long *)0x62EE,x","eCANB MOTO23");
-    GEL_WatchAdd("*(long *)0x63B8,x","eCANB MID23");
-    GEL_WatchAdd("*(long *)0x63BA,x","eCANB MCF23");
-    GEL_WatchAdd("*(long *)0x63BC,x","eCANB MDL23");
-    GEL_WatchAdd("*(long *)0x63BE,x","eCANB MDH23");
-}
-hotmenu eCAN_B_Mailbox_24_to_25_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6270,x","eCANB LAM24");
-    GEL_WatchAdd("*(long *)0x62B0,x","eCANB MOTS24");
-    GEL_WatchAdd("*(long *)0x62F0,x","eCANB MOTO24");
-    GEL_WatchAdd("*(long *)0x63C0,x","eCANB MID24");
-    GEL_WatchAdd("*(long *)0x63C2,x","eCANB MCF24");
-    GEL_WatchAdd("*(long *)0x63C4,x","eCANB MDL24");
-    GEL_WatchAdd("*(long *)0x63C6,x","eCANB MDH24");
-
-    GEL_WatchAdd("*(long *)0x6272,x","eCANB LAM25");
-    GEL_WatchAdd("*(long *)0x62B2,x","eCANB MOTS25");
-    GEL_WatchAdd("*(long *)0x62F2,x","eCANB MOTO25");
-    GEL_WatchAdd("*(long *)0x63C8,x","eCANB MID25");
-    GEL_WatchAdd("*(long *)0x63CA,x","eCANB MCF25");
-    GEL_WatchAdd("*(long *)0x63CC,x","eCANB MDL25");
-    GEL_WatchAdd("*(long *)0x63CE,x","eCANB MDH25");
-}
-hotmenu eCAN_B_Mailbox_26_to_27_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6274,x","eCANB LAM26");
-    GEL_WatchAdd("*(long *)0x62B4,x","eCANB MOTS26");
-    GEL_WatchAdd("*(long *)0x62F4,x","eCANB MOTO26");
-    GEL_WatchAdd("*(long *)0x63D0,x","eCANB MID26");
-    GEL_WatchAdd("*(long *)0x63D2,x","eCANB MCF26");
-    GEL_WatchAdd("*(long *)0x63D4,x","eCANB MDL26");
-    GEL_WatchAdd("*(long *)0x63D6,x","eCANB MDH26");
-
-    GEL_WatchAdd("*(long *)0x6276,x","eCANB LAM27");
-    GEL_WatchAdd("*(long *)0x62B6,x","eCANB MOTS27");
-    GEL_WatchAdd("*(long *)0x62F6,x","eCANB MOTO27");
-    GEL_WatchAdd("*(long *)0x63D8,x","eCANB MID27");
-    GEL_WatchAdd("*(long *)0x63DA,x","eCANB MCF27");
-    GEL_WatchAdd("*(long *)0x63DC,x","eCANB MDL27");
-    GEL_WatchAdd("*(long *)0x63DE,x","eCANB MDH27");
-}
-hotmenu eCAN_B_Mailbox_28_to_29_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6278,x","eCANB LAM28");
-    GEL_WatchAdd("*(long *)0x62B8,x","eCANB MOTS28");
-    GEL_WatchAdd("*(long *)0x62F8,x","eCANB MOTO28");
-    GEL_WatchAdd("*(long *)0x63E0,x","eCANB MID28");
-    GEL_WatchAdd("*(long *)0x63E2,x","eCANB MCF28");
-    GEL_WatchAdd("*(long *)0x63E4,x","eCANB MDL28");
-    GEL_WatchAdd("*(long *)0x63E6,x","eCANB MDH28");
-
-    GEL_WatchAdd("*(long *)0x627A,x","eCANB LAM29");
-    GEL_WatchAdd("*(long *)0x62BA,x","eCANB MOTS29");
-    GEL_WatchAdd("*(long *)0x62FA,x","eCANB MOTO29");
-    GEL_WatchAdd("*(long *)0x63E8,x","eCANB MID29");
-    GEL_WatchAdd("*(long *)0x63EA,x","eCANB MCF29");
-    GEL_WatchAdd("*(long *)0x63EC,x","eCANB MDL29");
-    GEL_WatchAdd("*(long *)0x63EE,x","eCANB MDH29");
-}
-hotmenu eCAN_B_Mailbox_30_to_31_Regs()
-{
-    GEL_WatchAdd("*(long *)0x627C,x","eCANB LAM30");
-    GEL_WatchAdd("*(long *)0x62BC,x","eCANB MOTS30");
-    GEL_WatchAdd("*(long *)0x62FC,x","eCANB MOTO30");
-    GEL_WatchAdd("*(long *)0x63F0,x","eCANB MID30");
-    GEL_WatchAdd("*(long *)0x63F2,x","eCANB MCF30");
-    GEL_WatchAdd("*(long *)0x63F4,x","eCANB MDL30");
-    GEL_WatchAdd("*(long *)0x63F6,x","eCANB MDH30");
-
-    GEL_WatchAdd("*(long *)0x627E,x","eCANB LAM31");
-    GEL_WatchAdd("*(long *)0x62BE,x","eCANB MOTS31");
-    GEL_WatchAdd("*(long *)0x62FE,x","eCANB MOTO31");
-    GEL_WatchAdd("*(long *)0x63F8,x","eCANB MID31");
-    GEL_WatchAdd("*(long *)0x63FA,x","eCANB MCF31");
-    GEL_WatchAdd("*(long *)0x63FC,x","eCANB MDL31");
-    GEL_WatchAdd("*(long *)0x63FE,x","eCANB MDH31");
-}
-
-
-/********************************************************************/
-/* Enhanced Capture Registers                                       */
-/********************************************************************/
-menuitem "Watch eCAP Registers";
-
-hotmenu eCAP1_All_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6A00,x","eCAP1 TSCNT");
-    GEL_WatchAdd("*(long *)0x6A02,x","eCAP1 CNTPHS");
-    GEL_WatchAdd("*(long *)0x6A04,x","eCAP1 CAP1");
-    GEL_WatchAdd("*(long *)0x6A06,x","eCAP1 CAP2");
-    GEL_WatchAdd("*(long *)0x6A08,x","eCAP1 CAP3");
-    GEL_WatchAdd("*(long *)0x6A0A,x","eCAP1 CAP4");
-    GEL_WatchAdd("*0x6A14,x","eCAP1 ECCTL1");
-    GEL_WatchAdd("*0x6A15,x","eCAP1 ECCTL2");
-    GEL_WatchAdd("*0x6A16,x","eCAP1 ECEINT");
-    GEL_WatchAdd("*0x6A17,x","eCAP1 ECFLG");
-    GEL_WatchAdd("*0x6A18,x","eCAP1 ECCLR");
-    GEL_WatchAdd("*0x6A19,x","eCAP1 ECFRC");
-}
-hotmenu eCAP2_All_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6A20,x","eCAP2 TSCNT");
-    GEL_WatchAdd("*(long *)0x6A22,x","eCAP2 CNTPHS");
-    GEL_WatchAdd("*(long *)0x6A24,x","eCAP2 CAP1");
-    GEL_WatchAdd("*(long *)0x6A26,x","eCAP2 CAP2");
-    GEL_WatchAdd("*(long *)0x6A28,x","eCAP2 CAP3");
-    GEL_WatchAdd("*(long *)0x6A2A,x","eCAP2 CAP4");
-    GEL_WatchAdd("*0x6A34,x","eCAP2 ECCTL1");
-    GEL_WatchAdd("*0x6A35,x","eCAP2 ECCTL2");
-    GEL_WatchAdd("*0x6A36,x","eCAP2 ECEINT");
-    GEL_WatchAdd("*0x6A37,x","eCAP2 ECFLG");
-    GEL_WatchAdd("*0x6A38,x","eCAP2 ECCLR");
-    GEL_WatchAdd("*0x6A39,x","eCAP2 ECFRC");
-}
-hotmenu eCAP3_All_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6A40,x","eCAP3 TSCNT");
-    GEL_WatchAdd("*(long *)0x6A42,x","eCAP3 CNTPHS");
-    GEL_WatchAdd("*(long *)0x6A44,x","eCAP3 CAP1");
-    GEL_WatchAdd("*(long *)0x6A46,x","eCAP3 CAP2");
-    GEL_WatchAdd("*(long *)0x6A48,x","eCAP3 CAP3");
-    GEL_WatchAdd("*(long *)0x6A4A,x","eCAP3 CAP4");
-    GEL_WatchAdd("*0x6A54,x","eCAP3 ECCTL1");
-    GEL_WatchAdd("*0x6A55,x","eCAP3 ECCTL2");
-    GEL_WatchAdd("*0x6A56,x","eCAP3 ECEINT");
-    GEL_WatchAdd("*0x6A57,x","eCAP3 ECFLG");
-    GEL_WatchAdd("*0x6A58,x","eCAP3 ECCLR");
-    GEL_WatchAdd("*0x6A59,x","eCAP3 ECFRC");
-}
-hotmenu eCAP4_All_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6A60,x","eCAP4 TSCNT");
-    GEL_WatchAdd("*(long *)0x6A62,x","eCAP4 CNTPHS");
-    GEL_WatchAdd("*(long *)0x6A64,x","eCAP4 CAP1");
-    GEL_WatchAdd("*(long *)0x6A66,x","eCAP4 CAP2");
-    GEL_WatchAdd("*(long *)0x6A68,x","eCAP4 CAP3");
-    GEL_WatchAdd("*(long *)0x6A6A,x","eCAP4 CAP4");
-    GEL_WatchAdd("*0x6A74,x","eCAP4 ECCTL1");
-    GEL_WatchAdd("*0x6A75,x","eCAP4 ECCTL2");
-    GEL_WatchAdd("*0x6A76,x","eCAP4 ECEINT");
-    GEL_WatchAdd("*0x6A77,x","eCAP4 ECFLG");
-    GEL_WatchAdd("*0x6A78,x","eCAP4 ECCLR");
-    GEL_WatchAdd("*0x6A79,x","eCAP4 ECFRC");
-}
-hotmenu eCAP5_All_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6A80,x","eCAP5 TSCNT");
-    GEL_WatchAdd("*(long *)0x6A82,x","eCAP5 CNTPHS");
-    GEL_WatchAdd("*(long *)0x6A84,x","eCAP5 CAP1");
-    GEL_WatchAdd("*(long *)0x6A86,x","eCAP5 CAP2");
-    GEL_WatchAdd("*(long *)0x6A88,x","eCAP5 CAP3");
-    GEL_WatchAdd("*(long *)0x6A8A,x","eCAP5 CAP4");
-    GEL_WatchAdd("*0x6A94,x","eCAP5 ECCTL1");
-    GEL_WatchAdd("*0x6A95,x","eCAP5 ECCTL2");
-    GEL_WatchAdd("*0x6A96,x","eCAP5 ECEINT");
-    GEL_WatchAdd("*0x6A97,x","eCAP5 ECFLG");
-    GEL_WatchAdd("*0x6A98,x","eCAP5 ECCLR");
-    GEL_WatchAdd("*0x6A99,x","eCAP5 ECFRC");
-}
-hotmenu eCAP6_All_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6AA0,x","eCAP6 TSCNT");
-    GEL_WatchAdd("*(long *)0x6AA2,x","eCAP6 CNTPHS");
-    GEL_WatchAdd("*(long *)0x6AA4,x","eCAP6 CAP1");
-    GEL_WatchAdd("*(long *)0x6AA6,x","eCAP6 CAP2");
-    GEL_WatchAdd("*(long *)0x6AA8,x","eCAP6 CAP3");
-    GEL_WatchAdd("*(long *)0x6AAA,x","eCAP6 CAP4");
-    GEL_WatchAdd("*0x6AB4,x","eCAP6 ECCTL1");
-    GEL_WatchAdd("*0x6AB5,x","eCAP6 ECCTL2");
-    GEL_WatchAdd("*0x6AB6,x","eCAP6 ECEINT");
-    GEL_WatchAdd("*0x6AB7,x","eCAP6 ECFLG");
-    GEL_WatchAdd("*0x6AB8,x","eCAP6 ECCLR");
-    GEL_WatchAdd("*0x6AB9,x","eCAP6 ECFRC");
-}
-
-
-/********************************************************************/
-/* Enhanced PWM Registers                                           */
-/********************************************************************/
-menuitem "Watch ePWM Registers";
-
-hotmenu ePWM1_All_Regs()
-{
-    GEL_WatchAdd("*0x6800,x","ePWM1 TBCTL");
-    GEL_WatchAdd("*0x6801,x","ePWM1 TBSTS");
-    GEL_WatchAdd("*0x6802,x","ePWM1 TBPHSHR");
-    GEL_WatchAdd("*0x6803,x","ePWM1 TBPHS");
-    GEL_WatchAdd("*0x6804,x","ePWM1 TBCTR");
-    GEL_WatchAdd("*0x6805,x","ePWM1 TBPRD");
-    GEL_WatchAdd("*0x6807,x","ePWM1 CMPCTL");
-    GEL_WatchAdd("*0x6808,x","ePWM1 CMPAHR");
-    GEL_WatchAdd("*0x6809,x","ePWM1 CMPA");
-    GEL_WatchAdd("*0x680A,x","ePWM1 CMPB");
-    GEL_WatchAdd("*0x680B,x","ePWM1 AQCTLA");
-    GEL_WatchAdd("*0x680C,x","ePWM1 AQCTLB");
-    GEL_WatchAdd("*0x680D,x","ePWM1 AQSFRC");
-    GEL_WatchAdd("*0x680E,x","ePWM1 AQCSFRC");
-    GEL_WatchAdd("*0x680F,x","ePWM1 DBCTL");
-    GEL_WatchAdd("*0x6810,x","ePWM1 DBRED");
-    GEL_WatchAdd("*0x6811,x","ePWM1 DBFED");
-    GEL_WatchAdd("*0x6812,x","ePWM1 TZSEL");
-    GEL_WatchAdd("*0x6813,x","ePWM1 TZDCSEL");
-    GEL_WatchAdd("*0x6814,x","ePWM1 TZCTL");
-    GEL_WatchAdd("*0x6815,x","ePWM1 TZEINT");
-    GEL_WatchAdd("*0x6816,x","ePWM1 TZFLG");
-    GEL_WatchAdd("*0x6817,x","ePWM1 TZCLR");
-    GEL_WatchAdd("*0x6818,x","ePWM1 TZFRC");
-    GEL_WatchAdd("*0x6819,x","ePWM1 ETSEL");
-    GEL_WatchAdd("*0x681A,x","ePWM1 ETPS");
-    GEL_WatchAdd("*0x681B,x","ePWM1 ETFLG");
-    GEL_WatchAdd("*0x681C,x","ePWM1 ETCLR");
-    GEL_WatchAdd("*0x681D,x","ePWM1 ETFRC");
-    GEL_WatchAdd("*0x681E,x","ePWM1 PCCTL");
-    GEL_WatchAdd("*0x6820,x","ePWM1 HRCNFG");
-}
-hotmenu ePWM1_TB_Regs()
-{
-    GEL_WatchAdd("*0x6800,x","ePWM1 TBCTL");
-    GEL_WatchAdd("*0x6801,x","ePWM1 TBSTS");
-    GEL_WatchAdd("*0x6802,x","ePWM1 TBPHSHR");
-    GEL_WatchAdd("*0x6803,x","ePWM1 TBPHS");
-    GEL_WatchAdd("*0x6804,x","ePWM1 TBCTR");
-    GEL_WatchAdd("*0x6805,x","ePWM1 TBPRD");
-}
-hotmenu ePWM1_CMP_Regs()
-{
-    GEL_WatchAdd("*0x6807,x","ePWM1 CMPCTL");
-    GEL_WatchAdd("*0x6808,x","ePWM1 CMPAHR");
-    GEL_WatchAdd("*0x6809,x","ePWM1 CMPA");
-    GEL_WatchAdd("*0x680A,x","ePWM1 CMPB");
-}
-hotmenu ePWM1_AQ_Regs()
-{
-    GEL_WatchAdd("*0x680B,x","ePWM1 AQCTLA");
-    GEL_WatchAdd("*0x680C,x","ePWM1 AQCTLB");
-    GEL_WatchAdd("*0x680D,x","ePWM1 AQSFRC");
-    GEL_WatchAdd("*0x680E,x","ePWM1 AQCSFRC");
-}
-hotmenu ePWM1_DB_Regs()
-{
-    GEL_WatchAdd("*0x680F,x","ePWM1 DBCTL");
-    GEL_WatchAdd("*0x6810,x","ePWM1 DBRED");
-    GEL_WatchAdd("*0x6811,x","ePWM1 DBFED");
-}
-hotmenu ePWM1_TZ_Regs()
-{
-    GEL_WatchAdd("*0x6812,x","ePWM1 TZSEL");
-    GEL_WatchAdd("*0x6814,x","ePWM1 TZCTL");
-    GEL_WatchAdd("*0x6815,x","ePWM1 TZEINT");
-    GEL_WatchAdd("*0x6816,x","ePWM1 TZFLG");
-    GEL_WatchAdd("*0x6817,x","ePWM1 TZCLR");
-    GEL_WatchAdd("*0x6818,x","ePWM1 TZFRC");
-}
-hotmenu ePWM1_ET_Regs()
-{
-    GEL_WatchAdd("*0x6819,x","ePWM1 ETSEL");
-    GEL_WatchAdd("*0x681A,x","ePWM1 ETPS");
-    GEL_WatchAdd("*0x681B,x","ePWM1 ETFLG");
-    GEL_WatchAdd("*0x681C,x","ePWM1 ETCLR");
-    GEL_WatchAdd("*0x681D,x","ePWM1 ETFRC");
-}
-hotmenu ePWM2_All_Regs()
-{
-    GEL_WatchAdd("*0x6840,x","ePWM2 TBCTL");
-    GEL_WatchAdd("*0x6841,x","ePWM2 TBSTS");
-    GEL_WatchAdd("*0x6842,x","ePWM2 TBPHSHR");
-    GEL_WatchAdd("*0x6843,x","ePWM2 TBPHS");
-    GEL_WatchAdd("*0x6844,x","ePWM2 TBCTR");
-    GEL_WatchAdd("*0x6845,x","ePWM2 TBPRD");
-    GEL_WatchAdd("*0x6847,x","ePWM2 CMPCTL");
-    GEL_WatchAdd("*0x6848,x","ePWM2 CMPAHR");
-    GEL_WatchAdd("*0x6849,x","ePWM2 CMPA");
-    GEL_WatchAdd("*0x684A,x","ePWM2 CMPB");
-    GEL_WatchAdd("*0x684B,x","ePWM2 AQCTLA");
-    GEL_WatchAdd("*0x684C,x","ePWM2 AQCTLB");
-    GEL_WatchAdd("*0x684D,x","ePWM2 AQSFRC");
-    GEL_WatchAdd("*0x684E,x","ePWM2 AQCSFRC");
-    GEL_WatchAdd("*0x684F,x","ePWM2 DBCTL");
-    GEL_WatchAdd("*0x6850,x","ePWM2 DBRED");
-    GEL_WatchAdd("*0x6851,x","ePWM2 DBFED");
-    GEL_WatchAdd("*0x6852,x","ePWM2 TZSEL");
-    GEL_WatchAdd("*0x6853,x","ePWM2 TZDCSEL");
-    GEL_WatchAdd("*0x6854,x","ePWM2 TZCTL");
-    GEL_WatchAdd("*0x6855,x","ePWM2 TZEINT");
-    GEL_WatchAdd("*0x6856,x","ePWM2 TZFLG");
-    GEL_WatchAdd("*0x6857,x","ePWM2 TZCLR");
-    GEL_WatchAdd("*0x6858,x","ePWM2 TZFRC");
-    GEL_WatchAdd("*0x6859,x","ePWM2 ETSEL");
-    GEL_WatchAdd("*0x685A,x","ePWM2 ETPS");
-    GEL_WatchAdd("*0x685B,x","ePWM2 ETFLG");
-    GEL_WatchAdd("*0x685C,x","ePWM2 ETCLR");
-    GEL_WatchAdd("*0x685D,x","ePWM2 ETFRC");
-    GEL_WatchAdd("*0x685E,x","ePWM2 PCCTL");
-    GEL_WatchAdd("*0x6860,x","ePWM2 HRCNFG");
-}
-hotmenu ePWM2_TB_Regs()
-{
-    GEL_WatchAdd("*0x6840,x","ePWM2 TBCTL");
-    GEL_WatchAdd("*0x6841,x","ePWM2 TBSTS");
-    GEL_WatchAdd("*0x6842,x","ePWM2 TBPHSHR");
-    GEL_WatchAdd("*0x6843,x","ePWM2 TBPHS");
-    GEL_WatchAdd("*0x6844,x","ePWM2 TBCTR");
-    GEL_WatchAdd("*0x6845,x","ePWM2 TBPRD");
-}
-hotmenu ePWM2_CMP_Regs()
-{
-    GEL_WatchAdd("*0x6847,x","ePWM2 CMPCTL");
-    GEL_WatchAdd("*0x6848,x","ePWM2 CMPAHR");
-    GEL_WatchAdd("*0x6849,x","ePWM2 CMPA");
-    GEL_WatchAdd("*0x684A,x","ePWM2 CMPB");
-}
-hotmenu ePWM2_AQ_Regs()
-{
-    GEL_WatchAdd("*0x684B,x","ePWM2 AQCTLA");
-    GEL_WatchAdd("*0x684C,x","ePWM2 AQCTLB");
-    GEL_WatchAdd("*0x684D,x","ePWM2 AQSFRC");
-    GEL_WatchAdd("*0x684E,x","ePWM2 AQCSFRC");
-}
-hotmenu ePWM2_DB_Regs()
-{
-    GEL_WatchAdd("*0x684F,x","ePWM2 DBCTL");
-    GEL_WatchAdd("*0x6850,x","ePWM2 DBRED");
-    GEL_WatchAdd("*0x6851,x","ePWM2 DBFED");
-}
-hotmenu ePWM2_TZ_Regs()
-{
-    GEL_WatchAdd("*0x6852,x","ePWM2 TZSEL");
-    GEL_WatchAdd("*0x6854,x","ePWM2 TZCTL");
-    GEL_WatchAdd("*0x6855,x","ePWM2 TZEINT");
-    GEL_WatchAdd("*0x6856,x","ePWM2 TZFLG");
-    GEL_WatchAdd("*0x6857,x","ePWM2 TZCLR");
-    GEL_WatchAdd("*0x6858,x","ePWM2 TZFRC");
-}
-hotmenu ePWM2_ET_Regs()
-{
-    GEL_WatchAdd("*0x6859,x","ePWM2 ETSEL");
-    GEL_WatchAdd("*0x685A,x","ePWM2 ETPS");
-    GEL_WatchAdd("*0x685B,x","ePWM2 ETFLG");
-    GEL_WatchAdd("*0x685C,x","ePWM2 ETCLR");
-    GEL_WatchAdd("*0x685D,x","ePWM2 ETFRC");
-}
-hotmenu ePWM3_All_Regs()
-{
-    GEL_WatchAdd("*0x6880,x","ePWM3 TBCTL");
-    GEL_WatchAdd("*0x6881,x","ePWM3 TBSTS");
-    GEL_WatchAdd("*0x6882,x","ePWM3 TBPHSHR");
-    GEL_WatchAdd("*0x6883,x","ePWM3 TBPHS");
-    GEL_WatchAdd("*0x6884,x","ePWM3 TBCTR");
-    GEL_WatchAdd("*0x6885,x","ePWM3 TBPRD");
-    GEL_WatchAdd("*0x6887,x","ePWM3 CMPCTL");
-    GEL_WatchAdd("*0x6888,x","ePWM3 CMPAHR");
-    GEL_WatchAdd("*0x6889,x","ePWM3 CMPA");
-    GEL_WatchAdd("*0x688A,x","ePWM3 CMPB");
-    GEL_WatchAdd("*0x688B,x","ePWM3 AQCTLA");
-    GEL_WatchAdd("*0x688C,x","ePWM3 AQCTLB");
-    GEL_WatchAdd("*0x688D,x","ePWM3 AQSFRC");
-    GEL_WatchAdd("*0x688E,x","ePWM3 AQCSFRC");
-    GEL_WatchAdd("*0x688F,x","ePWM3 DBCTL");
-    GEL_WatchAdd("*0x6890,x","ePWM3 DBRED");
-    GEL_WatchAdd("*0x6891,x","ePWM3 DBFED");
-    GEL_WatchAdd("*0x6892,x","ePWM3 TZSEL");
-    GEL_WatchAdd("*0x6893,x","ePWM3 TZDCSEL");
-    GEL_WatchAdd("*0x6894,x","ePWM3 TZCTL");
-    GEL_WatchAdd("*0x6895,x","ePWM3 TZEINT");
-    GEL_WatchAdd("*0x6896,x","ePWM3 TZFLG");
-    GEL_WatchAdd("*0x6897,x","ePWM3 TZCLR");
-    GEL_WatchAdd("*0x6898,x","ePWM3 TZFRC");
-    GEL_WatchAdd("*0x6899,x","ePWM3 ETSEL");
-    GEL_WatchAdd("*0x689A,x","ePWM3 ETPS");
-    GEL_WatchAdd("*0x689B,x","ePWM3 ETFLG");
-    GEL_WatchAdd("*0x689C,x","ePWM3 ETCLR");
-    GEL_WatchAdd("*0x689D,x","ePWM3 ETFRC");
-    GEL_WatchAdd("*0x689E,x","ePWM3 PCCTL");
-    GEL_WatchAdd("*0x68A0,x","ePWM3 HRCNFG");
-}
-hotmenu ePWM3_TB_Regs()
-{
-    GEL_WatchAdd("*0x6880,x","ePWM3 TBCTL");
-    GEL_WatchAdd("*0x6881,x","ePWM3 TBSTS");
-    GEL_WatchAdd("*0x6882,x","ePWM3 TBPHSHR");
-    GEL_WatchAdd("*0x6883,x","ePWM3 TBPHS");
-    GEL_WatchAdd("*0x6884,x","ePWM3 TBCTR");
-    GEL_WatchAdd("*0x6885,x","ePWM3 TBPRD");
-}
-hotmenu ePWM3_CMP_Regs()
-{
-    GEL_WatchAdd("*0x6887,x","ePWM3 CMPCTL");
-    GEL_WatchAdd("*0x6888,x","ePWM3 CMPAHR");
-    GEL_WatchAdd("*0x6889,x","ePWM3 CMPA");
-    GEL_WatchAdd("*0x688A,x","ePWM3 CMPB");
-}
-hotmenu ePWM3_AQ_Regs()
-{
-    GEL_WatchAdd("*0x688B,x","ePWM3 AQCTLA");
-    GEL_WatchAdd("*0x688C,x","ePWM3 AQCTLB");
-    GEL_WatchAdd("*0x688D,x","ePWM3 AQSFRC");
-    GEL_WatchAdd("*0x688E,x","ePWM3 AQCSFRC");
-}
-hotmenu ePWM3_DB_Regs()
-{
-    GEL_WatchAdd("*0x688F,x","ePWM3 DBCTL");
-    GEL_WatchAdd("*0x6890,x","ePWM3 DBRED");
-    GEL_WatchAdd("*0x6891,x","ePWM3 DBFED");
-}
-hotmenu ePWM3_TZ_Regs()
-{
-    GEL_WatchAdd("*0x6892,x","ePWM3 TZSEL");
-    GEL_WatchAdd("*0x6894,x","ePWM3 TZCTL");
-    GEL_WatchAdd("*0x6895,x","ePWM3 TZEINT");
-    GEL_WatchAdd("*0x6896,x","ePWM3 TZFLG");
-    GEL_WatchAdd("*0x6897,x","ePWM3 TZCLR");
-    GEL_WatchAdd("*0x6898,x","ePWM3 TZFRC");
-}
-hotmenu ePWM3_ET_Regs()
-{
-    GEL_WatchAdd("*0x6899,x","ePWM3 ETSEL");
-    GEL_WatchAdd("*0x689A,x","ePWM3 ETPS");
-    GEL_WatchAdd("*0x689B,x","ePWM3 ETFLG");
-    GEL_WatchAdd("*0x689C,x","ePWM3 ETCLR");
-    GEL_WatchAdd("*0x689D,x","ePWM3 ETFRC");
-}
-hotmenu ePWM4_All_Regs()
-{
-    GEL_WatchAdd("*0x68C0,x","ePWM4 TBCTL");
-    GEL_WatchAdd("*0x68C1,x","ePWM4 TBSTS");
-    GEL_WatchAdd("*0x68C2,x","ePWM4 TBPHSHR");
-    GEL_WatchAdd("*0x68C3,x","ePWM4 TBPHS");
-    GEL_WatchAdd("*0x68C4,x","ePWM4 TBCTR");
-    GEL_WatchAdd("*0x68C5,x","ePWM4 TBPRD");
-    GEL_WatchAdd("*0x68C7,x","ePWM4 CMPCTL");
-    GEL_WatchAdd("*0x68C8,x","ePWM4 CMPAHR");
-    GEL_WatchAdd("*0x68C9,x","ePWM4 CMPA");
-    GEL_WatchAdd("*0x68CA,x","ePWM4 CMPB");
-    GEL_WatchAdd("*0x68CB,x","ePWM4 AQCTLA");
-    GEL_WatchAdd("*0x68CC,x","ePWM4 AQCTLB");
-    GEL_WatchAdd("*0x68CD,x","ePWM4 AQSFRC");
-    GEL_WatchAdd("*0x68CE,x","ePWM4 AQCSFRC");
-    GEL_WatchAdd("*0x68CF,x","ePWM4 DBCTL");
-    GEL_WatchAdd("*0x68D0,x","ePWM4 DBRED");
-    GEL_WatchAdd("*0x68D1,x","ePWM4 DBFED");
-    GEL_WatchAdd("*0x68D2,x","ePWM4 TZSEL");
-    GEL_WatchAdd("*0x68D3,x","ePWM4 TZDCSEL");
-    GEL_WatchAdd("*0x68D4,x","ePWM4 TZCTL");
-    GEL_WatchAdd("*0x68D5,x","ePWM4 TZEINT");
-    GEL_WatchAdd("*0x68D6,x","ePWM4 TZFLG");
-    GEL_WatchAdd("*0x68D7,x","ePWM4 TZCLR");
-    GEL_WatchAdd("*0x68D8,x","ePWM4 TZFRC");
-    GEL_WatchAdd("*0x68D9,x","ePWM4 ETSEL");
-    GEL_WatchAdd("*0x68DA,x","ePWM4 ETPS");
-    GEL_WatchAdd("*0x68DB,x","ePWM4 ETFLG");
-    GEL_WatchAdd("*0x68DC,x","ePWM4 ETCLR");
-    GEL_WatchAdd("*0x68DD,x","ePWM4 ETFRC");
-    GEL_WatchAdd("*0x68DE,x","ePWM4 PCCTL");
-    GEL_WatchAdd("*0x68E0,x","ePWM4 HRCNFG");
-}
-hotmenu ePWM4_TB_Regs()
-{
-    GEL_WatchAdd("*0x68C0,x","ePWM4 TBCTL");
-    GEL_WatchAdd("*0x68C1,x","ePWM4 TBSTS");
-    GEL_WatchAdd("*0x68C2,x","ePWM4 TBPHSHR");
-    GEL_WatchAdd("*0x68C3,x","ePWM4 TBPHS");
-    GEL_WatchAdd("*0x68C4,x","ePWM4 TBCTR");
-    GEL_WatchAdd("*0x68C5,x","ePWM4 TBPRD");
-}
-hotmenu ePWM4_CMP_Regs()
-{
-    GEL_WatchAdd("*0x68C7,x","ePWM4 CMPCTL");
-    GEL_WatchAdd("*0x68C8,x","ePWM4 CMPAHR");
-    GEL_WatchAdd("*0x68C9,x","ePWM4 CMPA");
-    GEL_WatchAdd("*0x68CA,x","ePWM4 CMPB");
-}
-hotmenu ePWM4_AQ_Regs()
-{
-    GEL_WatchAdd("*0x68CB,x","ePWM4 AQCTLA");
-    GEL_WatchAdd("*0x68CC,x","ePWM4 AQCTLB");
-    GEL_WatchAdd("*0x68CD,x","ePWM4 AQSFRC");
-    GEL_WatchAdd("*0x68CE,x","ePWM4 AQCSFRC");
-}
-hotmenu ePWM4_DB_Regs()
-{
-    GEL_WatchAdd("*0x68CF,x","ePWM4 DBCTL");
-    GEL_WatchAdd("*0x68D0,x","ePWM4 DBRED");
-    GEL_WatchAdd("*0x68D1,x","ePWM4 DBFED"); 
-}
-hotmenu ePWM4_TZ_Regs()
-{
-    GEL_WatchAdd("*0x68D2,x","ePWM4 TZSEL");
-    GEL_WatchAdd("*0x68D4,x","ePWM4 TZCTL");
-    GEL_WatchAdd("*0x68D5,x","ePWM4 TZEINT");
-    GEL_WatchAdd("*0x68D6,x","ePWM4 TZFLG");
-    GEL_WatchAdd("*0x68D7,x","ePWM4 TZCLR");
-    GEL_WatchAdd("*0x68D8,x","ePWM4 TZFRC");
-}
-hotmenu ePWM4_ET_Regs()
-{
-    GEL_WatchAdd("*0x68D9,x","ePWM4 ETSEL");
-    GEL_WatchAdd("*0x68DA,x","ePWM4 ETPS");
-    GEL_WatchAdd("*0x68DB,x","ePWM4 ETFLG");
-    GEL_WatchAdd("*0x68DC,x","ePWM4 ETCLR");
-    GEL_WatchAdd("*0x68DD,x","ePWM4 ETFRC");
-}
-hotmenu ePWM5_All_Regs()
-{
-    GEL_WatchAdd("*0x6900,x","ePWM5 TBCTL");
-    GEL_WatchAdd("*0x6901,x","ePWM5 TBSTS");
-    GEL_WatchAdd("*0x6902,x","ePWM5 TBPHSHR");
-    GEL_WatchAdd("*0x6903,x","ePWM5 TBPHS");
-    GEL_WatchAdd("*0x6904,x","ePWM5 TBCTR");
-    GEL_WatchAdd("*0x6905,x","ePWM5 TBPRD");
-    GEL_WatchAdd("*0x6907,x","ePWM5 CMPCTL");
-    GEL_WatchAdd("*0x6908,x","ePWM5 CMPAHR");
-    GEL_WatchAdd("*0x6909,x","ePWM5 CMPA");
-    GEL_WatchAdd("*0x690A,x","ePWM5 CMPB");
-    GEL_WatchAdd("*0x690B,x","ePWM5 AQCTLA");
-    GEL_WatchAdd("*0x690C,x","ePWM5 AQCTLB");
-    GEL_WatchAdd("*0x690D,x","ePWM5 AQSFRC");
-    GEL_WatchAdd("*0x690E,x","ePWM5 AQCSFRC");
-    GEL_WatchAdd("*0x690F,x","ePWM5 DBCTL");
-    GEL_WatchAdd("*0x6910,x","ePWM5 DBRED");
-    GEL_WatchAdd("*0x6911,x","ePWM5 DBFED");
-    GEL_WatchAdd("*0x6912,x","ePWM5 TZSEL");
-    GEL_WatchAdd("*0x6913,x","ePWM5 TZDCSEL");
-    GEL_WatchAdd("*0x6914,x","ePWM5 TZCTL");
-    GEL_WatchAdd("*0x6915,x","ePWM5 TZEINT");
-    GEL_WatchAdd("*0x6916,x","ePWM5 TZFLG");
-    GEL_WatchAdd("*0x6917,x","ePWM5 TZCLR");
-    GEL_WatchAdd("*0x6918,x","ePWM5 TZFRC");
-    GEL_WatchAdd("*0x6919,x","ePWM5 ETSEL");
-    GEL_WatchAdd("*0x691A,x","ePWM5 ETPS");
-    GEL_WatchAdd("*0x691B,x","ePWM5 ETFLG");
-    GEL_WatchAdd("*0x691C,x","ePWM5 ETCLR");
-    GEL_WatchAdd("*0x691D,x","ePWM5 ETFRC");
-    GEL_WatchAdd("*0x691E,x","ePWM5 PCCTL");
-    GEL_WatchAdd("*0x6920,x","ePWM5 HRCNFG");
-}
-hotmenu ePWM5_TB_Regs()
-{
-    GEL_WatchAdd("*0x6900,x","ePWM5 TBCTL");
-    GEL_WatchAdd("*0x6901,x","ePWM5 TBSTS");
-    GEL_WatchAdd("*0x6902,x","ePWM5 TBPHSHR");
-    GEL_WatchAdd("*0x6903,x","ePWM5 TBPHS");
-    GEL_WatchAdd("*0x6904,x","ePWM5 TBCTR");
-    GEL_WatchAdd("*0x6905,x","ePWM5 TBPRD");
-}
-hotmenu ePWM5_CMP_Regs()
-{
-    GEL_WatchAdd("*0x6907,x","ePWM5 CMPCTL");
-    GEL_WatchAdd("*0x6908,x","ePWM5 CMPAHR");
-    GEL_WatchAdd("*0x6909,x","ePWM5 CMPA");
-    GEL_WatchAdd("*0x690A,x","ePWM5 CMPB");
-}
-hotmenu ePWM5_AQ_Regs()
-{
-    GEL_WatchAdd("*0x690B,x","ePWM5 AQCTLA");
-    GEL_WatchAdd("*0x690C,x","ePWM5 AQCTLB");
-    GEL_WatchAdd("*0x690D,x","ePWM5 AQSFRC");
-    GEL_WatchAdd("*0x690E,x","ePWM5 AQCSFRC");
-}
-hotmenu ePWM5_DB_Regs()
-{
-    GEL_WatchAdd("*0x690F,x","ePWM5 DBCTL");
-    GEL_WatchAdd("*0x6910,x","ePWM5 DBRED");
-    GEL_WatchAdd("*0x6911,x","ePWM5 DBFED"); 
-}
-hotmenu ePWM5_TZ_Regs()
-{
-    GEL_WatchAdd("*0x6912,x","ePWM5 TZSEL");
-    GEL_WatchAdd("*0x6914,x","ePWM5 TZCTL");
-    GEL_WatchAdd("*0x6915,x","ePWM5 TZEINT");
-    GEL_WatchAdd("*0x6916,x","ePWM5 TZFLG");
-    GEL_WatchAdd("*0x6917,x","ePWM5 TZCLR");
-    GEL_WatchAdd("*0x6918,x","ePWM5 TZFRC");
-}
-hotmenu ePWM5_ET_Regs()
-{
-    GEL_WatchAdd("*0x6919,x","ePWM5 ETSEL");
-    GEL_WatchAdd("*0x691A,x","ePWM5 ETPS");
-    GEL_WatchAdd("*0x691B,x","ePWM5 ETFLG");
-    GEL_WatchAdd("*0x691C,x","ePWM5 ETCLR");
-    GEL_WatchAdd("*0x691D,x","ePWM5 ETFRC");
-}
-hotmenu ePWM6_All_Regs()
-{
-    GEL_WatchAdd("*0x6940,x","ePWM6 TBCTL");
-    GEL_WatchAdd("*0x6941,x","ePWM6 TBSTS");
-    GEL_WatchAdd("*0x6942,x","ePWM6 TBPHSHR");
-    GEL_WatchAdd("*0x6943,x","ePWM6 TBPHS");
-    GEL_WatchAdd("*0x6944,x","ePWM6 TBCTR");
-    GEL_WatchAdd("*0x6945,x","ePWM6 TBPRD");
-    GEL_WatchAdd("*0x6947,x","ePWM6 CMPCTL");
-    GEL_WatchAdd("*0x6948,x","ePWM6 CMPAHR");
-    GEL_WatchAdd("*0x6949,x","ePWM6 CMPA");
-    GEL_WatchAdd("*0x694A,x","ePWM6 CMPB");
-    GEL_WatchAdd("*0x694B,x","ePWM6 AQCTLA");
-    GEL_WatchAdd("*0x694C,x","ePWM6 AQCTLB");
-    GEL_WatchAdd("*0x694D,x","ePWM6 AQSFRC");
-    GEL_WatchAdd("*0x694E,x","ePWM6 AQCSFRC");
-    GEL_WatchAdd("*0x694F,x","ePWM6 DBCTL");
-    GEL_WatchAdd("*0x6950,x","ePWM6 DBRED");
-    GEL_WatchAdd("*0x6951,x","ePWM6 DBFED");
-    GEL_WatchAdd("*0x6952,x","ePWM6 TZSEL");
-    GEL_WatchAdd("*0x6953,x","ePWM6 TZDCSEL");
-    GEL_WatchAdd("*0x6954,x","ePWM6 TZCTL");
-    GEL_WatchAdd("*0x6955,x","ePWM6 TZEINT");
-    GEL_WatchAdd("*0x6956,x","ePWM6 TZFLG");
-    GEL_WatchAdd("*0x6957,x","ePWM6 TZCLR");
-    GEL_WatchAdd("*0x6958,x","ePWM6 TZFRC");
-    GEL_WatchAdd("*0x6959,x","ePWM6 ETSEL");
-    GEL_WatchAdd("*0x695A,x","ePWM6 ETPS");
-    GEL_WatchAdd("*0x695B,x","ePWM6 ETFLG");
-    GEL_WatchAdd("*0x695C,x","ePWM6 ETCLR");
-    GEL_WatchAdd("*0x695D,x","ePWM6 ETFRC");
-    GEL_WatchAdd("*0x695E,x","ePWM6 PCCTL");
-    GEL_WatchAdd("*0x6960,x","ePWM6 HRCNFG");
-
-}
-hotmenu ePWM6_TB_Regs()
-{
-    GEL_WatchAdd("*0x6940,x","ePWM6 TBCTL");
-    GEL_WatchAdd("*0x6941,x","ePWM6 TBSTS");
-    GEL_WatchAdd("*0x6942,x","ePWM6 TBPHSHR");
-    GEL_WatchAdd("*0x6943,x","ePWM6 TBPHS");
-    GEL_WatchAdd("*0x6944,x","ePWM6 TBCTR");
-    GEL_WatchAdd("*0x6945,x","ePWM6 TBPRD");
-}
-hotmenu ePWM6_CMP_Regs()
-{
-    GEL_WatchAdd("*0x6947,x","ePWM6 CMPCTL");
-    GEL_WatchAdd("*0x6948,x","ePWM6 CMPAHR");
-    GEL_WatchAdd("*0x6949,x","ePWM6 CMPA");
-    GEL_WatchAdd("*0x694A,x","ePWM6 CMPB");
-}
-hotmenu ePWM6_AQ_Regs()
-{
-    GEL_WatchAdd("*0x694B,x","ePWM6 AQCTLA");
-    GEL_WatchAdd("*0x694C,x","ePWM6 AQCTLB");
-    GEL_WatchAdd("*0x694D,x","ePWM6 AQSFRC");
-    GEL_WatchAdd("*0x694E,x","ePWM6 AQCSFRC");
-}
-hotmenu ePWM6_DB_Regs()
-{
-    GEL_WatchAdd("*0x694F,x","ePWM6 DBCTL");
-    GEL_WatchAdd("*0x6950,x","ePWM6 DBRED");
-    GEL_WatchAdd("*0x6951,x","ePWM6 DBFED");
-}
-hotmenu ePWM6_TZ_Regs()
-{
-    GEL_WatchAdd("*0x6952,x","ePWM6 TZSEL");
-    GEL_WatchAdd("*0x6954,x","ePWM6 TZCTL");
-    GEL_WatchAdd("*0x6955,x","ePWM6 TZEINT");
-    GEL_WatchAdd("*0x6956,x","ePWM6 TZFLG");
-    GEL_WatchAdd("*0x6957,x","ePWM6 TZCLR");
-    GEL_WatchAdd("*0x6958,x","ePWM6 TZFRC");
-}
-hotmenu ePWM6_ET_Regs()
-{
-    GEL_WatchAdd("*0x6959,x","ePWM6 ETSEL");
-    GEL_WatchAdd("*0x695A,x","ePWM6 ETPS");
-    GEL_WatchAdd("*0x695B,x","ePWM6 ETFLG");
-    GEL_WatchAdd("*0x695C,x","ePWM6 ETCLR");
-    GEL_WatchAdd("*0x695D,x","ePWM6 ETFRC");
-}
-
-
-/********************************************************************/
-/* Enhanced EQEP Registers                                          */
-/********************************************************************/
-menuitem "Watch eQEP"
-
-hotmenu eQEP1_All_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6B00,x","eQEP1 QPOSCNT");
-    GEL_WatchAdd("*(long *)0x6B02,x","eQEP1 QPOSINIT");
-    GEL_WatchAdd("*(long *)0x6B04,x","eQEP1 QPOSMAX");
-    GEL_WatchAdd("*(long *)0x6B06,x","eQEP1 QPOSCMP");
-    GEL_WatchAdd("*(long *)0x6B08,x","eQEP1 QPOSILAT");
-    GEL_WatchAdd("*(long *)0x6B0A,x","eQEP1 QPOSSLAT");
-    GEL_WatchAdd("*(long *)0x6B0C,x","eQEP1 QPOSLAT");
-    GEL_WatchAdd("*(long *)0x6B0E,x","eQEP1 QUTMR");
-    GEL_WatchAdd("*(long *)0x6B10,x","eQEP1 QUPRD");
-    GEL_WatchAdd("*0x6B12,x","eQEP1 QWDTMR");
-    GEL_WatchAdd("*0x6B13,x","eQEP1 QWDPRD");
-    GEL_WatchAdd("*0x6B14,x","eQEP1 QDECCTL");
-    GEL_WatchAdd("*0x6B15,x","eQEP1 QEPCTL");
-    GEL_WatchAdd("*0x6B16,x","eQEP1 QCAPCTL");
-    GEL_WatchAdd("*0x6B17,x","eQEP1 QPOSCTL");
-    GEL_WatchAdd("*0x6B18,x","eQEP1 QEINT");
-    GEL_WatchAdd("*0x6B19,x","eQEP1 QFLG");
-    GEL_WatchAdd("*0x6B1A,x","eQEP1 QCLR");
-    GEL_WatchAdd("*0x6B1B,x","eQEP1 QFRC");
-    GEL_WatchAdd("*0x6B1C,x","eQEP1 QEPSTS");
-    GEL_WatchAdd("*0x6B1D,x","eQEP1 QCTMR");
-    GEL_WatchAdd("*0x6B1E,x","eQEP1 QCPRD");
-    GEL_WatchAdd("*0x6B1F,x","eQEP1 QCTMRLAT");
-    GEL_WatchAdd("*0x6B20,x","eQEP1 QCPRDLAT");
-}
-hotmenu eQEP2_All_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6B40,x","eQEP2 QPOSCNT");
-    GEL_WatchAdd("*(long *)0x6B42,x","eQEP2 QPOSINIT");
-    GEL_WatchAdd("*(long *)0x6B44,x","eQEP2 QPOSMAX");
-    GEL_WatchAdd("*(long *)0x6B46,x","eQEP2 QPOSCMP");
-    GEL_WatchAdd("*(long *)0x6B48,x","eQEP2 QPOSILAT");
-    GEL_WatchAdd("*(long *)0x6B4A,x","eQEP2 QPOSSLAT");
-    GEL_WatchAdd("*(long *)0x6B4C,x","eQEP2 QPOSLAT");
-    GEL_WatchAdd("(long *)*0x6B4E,x","eQEP2 QUTMR");
-    GEL_WatchAdd("*(long *)0x6B50,x","eQEP2 QUPRD");
-    GEL_WatchAdd("*0x6B52,x","eQEP2 QWDTMR");
-    GEL_WatchAdd("*0x6B53,x","eQEP2 QWDPRD");
-    GEL_WatchAdd("*0x6B54,x","eQEP2 QDECCTL");
-    GEL_WatchAdd("*0x6B55,x","eQEP2 QEPCTL");
-    GEL_WatchAdd("*0x6B56,x","eQEP2 QCAPCTL");
-    GEL_WatchAdd("*0x6B57,x","eQEP2 QPOSCTL");
-    GEL_WatchAdd("*0x6B58,x","eQEP2 QEINT");
-    GEL_WatchAdd("*0x6B59,x","eQEP2 QFLG");
-    GEL_WatchAdd("*0x6B5A,x","eQEP2 QCLR");
-    GEL_WatchAdd("*0x6B5B,x","eQEP2 QFRC");
-    GEL_WatchAdd("*0x6B5C,x","eQEP2 QEPSTS");
-    GEL_WatchAdd("*0x6B5D,x","eQEP2 QCTMR");
-    GEL_WatchAdd("*0x6B5E,x","eQEP2 QCPRD");
-    GEL_WatchAdd("*0x6B5F,x","eQEP2 QCTMRLAT");
-    GEL_WatchAdd("*0x6B60,x","eQEP2 QCPRDLAT");
-}
-
-
-/********************************************************************/
-/* External Interface Registers                                     */
-/********************************************************************/
-menuitem "Watch External Interface Registers";
-
-hotmenu All_External_Interface_Regs()
-{
-    GEL_WatchAdd("*(long *)0x0B20,x","XTIMING0");
-    GEL_WatchAdd("*(long *)0x0B2C,x","XTIMING6");
-    GEL_WatchAdd("*(long *)0x0B2E,x","XTIMING7");
-    GEL_WatchAdd("*(long *)0x0B34,x","XINTCNF2");
-    GEL_WatchAdd("*0x0B38,x","XBANK");
-    GEL_WatchAdd("*0x0B3A,x","XREVISION");
-    GEL_WatchAdd("*0x0B3D,x","XRESET");
-}
-
-/********************************************************************/
-/* External Interrupt Registers                                     */
-/********************************************************************/
-menuitem "Watch External Interrupt Registers";
-
-hotmenu All_XINT_Regs()
-{
-    GEL_WatchAdd("*0x7070,x","XINT1CR");
-    GEL_WatchAdd("*0x7071,x","XINT2CR");
-    GEL_WatchAdd("*0x7072,x","XINT3CR");
-    GEL_WatchAdd("*0x7073,x","XINT4CR");
-    GEL_WatchAdd("*0x7074,x","XINT5CR");
-    GEL_WatchAdd("*0x7075,x","XINT6CR");
-    GEL_WatchAdd("*0x7076,x","XINT7CR");
-    GEL_WatchAdd("*0x7077,x","XNMICR");
-    GEL_WatchAdd("*0x7078,x","XINT1CTR");
-    GEL_WatchAdd("*0x7079,x","XINT2CTR");
-    GEL_WatchAdd("*0x707F,x","XNMICTR");
-}
-hotmenu XINT_Control_Regs()
-{
-    GEL_WatchAdd("*0x7070,x","XINT1CR");
-    GEL_WatchAdd("*0x7071,x","XINT2CR");
-    GEL_WatchAdd("*0x7072,x","XINT3CR");
-    GEL_WatchAdd("*0x7073,x","XINT4CR");
-    GEL_WatchAdd("*0x7074,x","XINT5CR");
-    GEL_WatchAdd("*0x7075,x","XINT6CR");
-    GEL_WatchAdd("*0x7076,x","XINT7CR");
-    GEL_WatchAdd("*0x7077,x","XNMICR");
-}
-hotmenu XINT_Counter_Regs()
-{
-    GEL_WatchAdd("*0x7078,x","XINT1CTR");
-    GEL_WatchAdd("*0x7079,x","XINT2CTR");
-    GEL_WatchAdd("*0x707F,x","XNMICTR");
-}
-
-
-/********************************************************************/
-/* FPU Registers                                                    */
-/********************************************************************/
-menuitem "Watch FPU Registers"
-
-hotmenu All_FPU_Single_Precision_Regs()
-{
-    GEL_WatchAdd("RB");
-    GEL_WatchAdd("STF");
-    GEL_WatchAdd("R0H");
-    GEL_WatchAdd("R1H");
-    GEL_WatchAdd("R2H");
-    GEL_WatchAdd("R3H");
-    GEL_WatchAdd("R4H");
-    GEL_WatchAdd("R5H");
-    GEL_WatchAdd("R6H");
-    GEL_WatchAdd("R7H");
-}
-
-
-/********************************************************************/
-/* GPIO Registers                                                   */
-/********************************************************************/
-menuitem "Watch GPIO Registers";
-
-hotmenu All_GPIO_CONTROL_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6F80,x","GPACTRL");
-    GEL_WatchAdd("*(long *)0x6F82,x","GPAQSEL1");
-    GEL_WatchAdd("*(long *)0x6F84,x","GPAQSEL2");
-    GEL_WatchAdd("*(long *)0x6F86,x","GPAMUX1");
-    GEL_WatchAdd("*(long *)0x6F88,x","GPAMUX2");
-    GEL_WatchAdd("*(long *)0x6F8A,x","GPADIR");
-    GEL_WatchAdd("*(long *)0x6F8C,x","GPAPUD");
-
-    GEL_WatchAdd("*(long *)0x6F90,x","GPBCTRL");
-    GEL_WatchAdd("*(long *)0x6F92,x","GPBQSEL1");
-    GEL_WatchAdd("*(long *)0x6F94,x","GPBQSEL2");
-    GEL_WatchAdd("*(long *)0x6F96,x","GPBMUX1");
-    GEL_WatchAdd("*(long *)0x6F98,x","GPBMUX2");
-    GEL_WatchAdd("*(long *)0x6F9A,x","GPBDIR");
-    GEL_WatchAdd("*(long *)0x6F9C,x","GPBPUD");
-
-    GEL_WatchAdd("*(long *)0x6FA6,x","GPCMUX1");
-    GEL_WatchAdd("*(long *)0x6FA8,x","GPCMUX2");
-    GEL_WatchAdd("*(long *)0x6FAA,x","GPCDIR");
-    GEL_WatchAdd("*(long *)0x6FAC,x","GPCPUD");
-}
-hotmenu All_GPIO_DATA_Regs()
-{
-    GEL_WatchAdd("*(long *)0x6FC0,x","GPADAT");
-    GEL_WatchAdd("*(long *)0x6FC2,x","GPASET");
-    GEL_WatchAdd("*(long *)0x6FC4,x","GPACLEAR");
-    GEL_WatchAdd("*(long *)0x6FC6,x","GPATOGGLE");
-    
-    GEL_WatchAdd("*(long *)0x6FC8,x","GPBDAT");
-    GEL_WatchAdd("*(long *)0x6FCA,x","GPBSET");
-    GEL_WatchAdd("*(long *)0x6FCC,x","GPBCLEAR");
-    GEL_WatchAdd("*(long *)0x6FCE,x","GPBTOGGLE");
-
-    GEL_WatchAdd("*(long *)0x6FD0,x","GPCDAT");
-    GEL_WatchAdd("*(long *)0x6FD2,x","GPCSET");
-    GEL_WatchAdd("*(long *)0x6FD4,x","GPCCLEAR");
-    GEL_WatchAdd("*(long *)0x6FD6,x","GPCTOGGLE");
-}
-hotmenu All_GPIO_INTERRUPT_Regs()
-{
-    GEL_WatchAdd("*0x6FE0,x","GPIOXINT1SEL");
-    GEL_WatchAdd("*0x6FE1,x","GPIOXINT2SEL");
-    GEL_WatchAdd("*0x6FE2,x","GPIOXNMISEL");
-    GEL_WatchAdd("*0x6FE3,x","GPIOXINT3SEL");
-    GEL_WatchAdd("*0x6FE4,x","GPIOXINT4SEL");
-    GEL_WatchAdd("*0x6FE5,x","GPIOXINT5SEL");
-    GEL_WatchAdd("*0x6FE6,x","GPIOXINT6SEL");
-    GEL_WatchAdd("*0x6FE7,x","GPIOXINT7SEL");
-    GEL_WatchAdd("*(long *)0x6FE8,x","GPIOLPMSEL");
-}
-hotmenu All_GPA_Registers()
-{
-    GEL_WatchAdd("*(long *)0x6F80,x","GPACTRL");
-    GEL_WatchAdd("*(long *)0x6F82,x","GPAQSEL1");
-    GEL_WatchAdd("*(long *)0x6F84,x","GPAQSEL2");
-    GEL_WatchAdd("*(long *)0x6F86,x","GPAMUX1");
-    GEL_WatchAdd("*(long *)0x6F88,x","GPAMUX2");
-    GEL_WatchAdd("*(long *)0x6F8A,x","GPADIR");
-    GEL_WatchAdd("*(long *)0x6F8C,x","GPAPUD");
-    
-    GEL_WatchAdd("*(long *)0x6FC0,x","GPADAT");
-    GEL_WatchAdd("*(long *)0x6FC2,x","GPASET");
-    GEL_WatchAdd("*(long *)0x6FC4,x","GPACLEAR");
-    GEL_WatchAdd("*(long *)0x6FC6,x","GPATOGGLE");
-}
-hotmenu All_GPB_Registers()
-{
-    GEL_WatchAdd("*(long *)0x6F90,x","GPBCTRL");
-    GEL_WatchAdd("*(long *)0x6F92,x","GPBQSEL1");
-    GEL_WatchAdd("*(long *)0x6F94,x","GPBQSEL2");
-    GEL_WatchAdd("*(long *)0x6F96,x","GPBMUX1");
-    GEL_WatchAdd("*(long *)0x6F98,x","GPBMUX2");
-    GEL_WatchAdd("*(long *)0x6F9A,x","GPBDIR");
-    GEL_WatchAdd("*(long *)0x6F9C,x","GPBPUD");
-
-    GEL_WatchAdd("*(long *)0x6FC8,x","GPBDAT");
-    GEL_WatchAdd("*(long *)0x6FCA,x","GPBSET");
-    GEL_WatchAdd("*(long *)0x6FCC,x","GPBCLEAR");
-    GEL_WatchAdd("*(long *)0x6FCE,x","GPBTOGGLE");
-}
-hotmenu All_GPC_Registers()
-{
-    GEL_WatchAdd("*(long *)0x6FA6,x","GPCMUX1");
-    GEL_WatchAdd("*(long *)0x6FA8,x","GPCMUX2");
-    GEL_WatchAdd("*(long *)0x6FAA,x","GPCDIR");
-    GEL_WatchAdd("*(long *)0x6FAC,x","GPCPUD");
-
-    GEL_WatchAdd("*(long *)0x6FC8,x","GPBDAT");
-    GEL_WatchAdd("*(long *)0x6FCA,x","GPBSET");
-    GEL_WatchAdd("*(long *)0x6FCC,x","GPBCLEAR");
-    GEL_WatchAdd("*(long *)0x6FCE,x","GPBTOGGLE");
-
-    GEL_WatchAdd("*(long *)0x6FD0,x","GPCDAT");
-    GEL_WatchAdd("*(long *)0x6FD2,x","GPCSET");
-    GEL_WatchAdd("*(long *)0x6FD4,x","GPCCLEAR");
-    GEL_WatchAdd("*(long *)0x6FD6,x","GPCTOGGLE");
-}
-
-
-/********************************************************************/
-/* Multichannel Serial Port Registers                               */
-/********************************************************************/
-menuitem "Watch McBSP Registers";
-
-hotmenu All_McBSP_A_Regs()
-{
-    GEL_WatchAdd("*0x5000,x","McBSPA DRR2");
-    GEL_WatchAdd("*0x5001,x","McBSPA DRR1");
-    GEL_WatchAdd("*0x5002,x","McBSPA DXR2");
-    GEL_WatchAdd("*0x5003,x","McBSPA DXR1");
-    GEL_WatchAdd("*0x5004,x","McBSPA SPCR2");
-    GEL_WatchAdd("*0x5005,x","McBSPA SPCR1");
-    GEL_WatchAdd("*0x5006,x","McBSPA RCR2");
-    GEL_WatchAdd("*0x5007,x","McBSPA RCR1");
-    GEL_WatchAdd("*0x5008,x","McBSPA XCR2");
-    GEL_WatchAdd("*0x5009,x","McBSPA XCR1");
-    GEL_WatchAdd("*0x500A,x","McBSPA SRGR2");
-    GEL_WatchAdd("*0x500B,x","McBSPA SRGR1");
-    GEL_WatchAdd("*0x500C,x","McBSPA MCR2");
-    GEL_WatchAdd("*0x500D,x","McBSPA MCR1");
-    GEL_WatchAdd("*0x500E,x","McBSPA RCERA");
-    GEL_WatchAdd("*0x500F,x","McBSPA RCERB");
-    GEL_WatchAdd("*0x5010,x","McBSPA XCERA");
-    GEL_WatchAdd("*0x5011,x","McBSPA XCERB");
-    GEL_WatchAdd("*0x5012,x","McBSPA PCR1");
-    GEL_WatchAdd("*0x5013,x","McBSPA RCERC");
-    GEL_WatchAdd("*0x5014,x","McBSPA RCERD");
-    GEL_WatchAdd("*0x5015,x","McBSPA XCERC");
-    GEL_WatchAdd("*0x5016,x","McBSPA XCERD");
-    GEL_WatchAdd("*0x5017,x","McBSPA RCERE");
-    GEL_WatchAdd("*0x5018,x","McBSPA RCERF");
-    GEL_WatchAdd("*0x5019,x","McBSPA XCERE");
-    GEL_WatchAdd("*0x501A,x","McBSPA XCERF");
-    GEL_WatchAdd("*0x501B,x","McBSPA RCERG");
-    GEL_WatchAdd("*0x501C,x","McBSPA RCERH");
-    GEL_WatchAdd("*0x501D,x","McBSPA XCERG");
-    GEL_WatchAdd("*0x501E,x","McBSPA XCERH");
-    GEL_WatchAdd("*0x5023,x","McBSPA MFFINT");
-    GEL_WatchAdd("*0x503F,x","McBSPA Revision");
-}
-
-hotmenu All_McBSP_B_Regs()
-{
-    GEL_WatchAdd("*0x5040,x","McBSPB DRR2");
-    GEL_WatchAdd("*0x5041,x","McBSPB DRR1");
-    GEL_WatchAdd("*0x5042,x","McBSPB DXR2");
-    GEL_WatchAdd("*0x5043,x","McBSPB DXR1");
-    GEL_WatchAdd("*0x5044,x","McBSPB SPCR2");
-    GEL_WatchAdd("*0x5045,x","McBSPB SPCR1");
-    GEL_WatchAdd("*0x5046,x","McBSPB RCR2");
-    GEL_WatchAdd("*0x5047,x","McBSPB RCR1");
-    GEL_WatchAdd("*0x5048,x","McBSPB XCR2");
-    GEL_WatchAdd("*0x5049,x","McBSPB XCR1");
-    GEL_WatchAdd("*0x504A,x","McBSPB SRGR2");
-    GEL_WatchAdd("*0x504B,x","McBSPB SRGR1");
-    GEL_WatchAdd("*0x504C,x","McBSPB MCR2");
-    GEL_WatchAdd("*0x504D,x","McBSPB MCR1");
-    GEL_WatchAdd("*0x504E,x","McBSPB RCERA");
-    GEL_WatchAdd("*0x504F,x","McBSPB RCERB");
-    GEL_WatchAdd("*0x5050,x","McBSPB XCERA");
-    GEL_WatchAdd("*0x5051,x","McBSPB XCERB");
-    GEL_WatchAdd("*0x5052,x","McBSPB PCR1");
-    GEL_WatchAdd("*0x5053,x","McBSPB RCERC");
-    GEL_WatchAdd("*0x5054,x","McBSPB RCERD");
-    GEL_WatchAdd("*0x5055,x","McBSPB XCERC");
-    GEL_WatchAdd("*0x5056,x","McBSPB XCERD");
-    GEL_WatchAdd("*0x5057,x","McBSPB RCERE");
-    GEL_WatchAdd("*0x5058,x","McBSPB RCERF");
-    GEL_WatchAdd("*0x5059,x","McBSPB XCERE");
-    GEL_WatchAdd("*0x505A,x","McBSPB XCERF");
-    GEL_WatchAdd("*0x505B,x","McBSPB RCERG");
-    GEL_WatchAdd("*0x505C,x","McBSPB RCERH");
-    GEL_WatchAdd("*0x505D,x","McBSPB XCERG");
-    GEL_WatchAdd("*0x505E,x","McBSPB XCERH");
-    GEL_WatchAdd("*0x5063,x","McBSPB MFFINT");
-    GEL_WatchAdd("*0x506F,x","McBSPB Revision");
-}
-
-
-
-/********************************************************************/
-/* I2C Registers                                                    */
-/********************************************************************/
-menuitem "Watch I2C Registers";
-
-hotmenu All_I2C_Regs()
-{
-    GEL_WatchAdd("*0x7900,x","I2COAR");
-    GEL_WatchAdd("*0x7901,x","I2CIER");
-    GEL_WatchAdd("*0x7902,x","I2CSTR");
-    GEL_WatchAdd("*0x7903,x","I2CCLKL");
-    GEL_WatchAdd("*0x7904,x","I2CCLKH");
-    GEL_WatchAdd("*0x7905,x","I2CCNT");
-    GEL_WatchAdd("*0x7906,x","I2CDRR");
-    GEL_WatchAdd("*0x7907,x","I2CSAR");
-    GEL_WatchAdd("*0x7908,x","I2CDXR");
-    GEL_WatchAdd("*0x7909,x","I2CMDR");
-    GEL_WatchAdd("*0x790A,x","I2CISRC");
-    GEL_WatchAdd("*0x790C,x","I2CPSC");
-    GEL_WatchAdd("*0x7920,x","I2CFFTX");
-    GEL_WatchAdd("*0x7921,x","I2CFFRX");
-}
-
-
-/********************************************************************/
-/* Peripheral Interrupt Expansion Registers                         */
-/********************************************************************/
-menuitem "Watch Peripheral Interrupt Expansion Registers";
-
-hotmenu All_PIE_Regs()
-{
-    GEL_WatchAdd("*0x0CE0,x","PIECTRL");
-    GEL_WatchAdd("*0x0CE1,x","PIEACK");
-    GEL_WatchAdd("*0x0CE2,x","PIEIER1");
-    GEL_WatchAdd("*0x0CE3,x","PIEIFR1");
-    GEL_WatchAdd("*0x0CE4,x","PIEIER2");
-    GEL_WatchAdd("*0x0CE5,x","PIEIFR2");
-    GEL_WatchAdd("*0x0CE6,x","PIEIER3");
-    GEL_WatchAdd("*0x0CE7,x","PIEIFR3");
-    GEL_WatchAdd("*0x0CE8,x","PIEIER4");
-    GEL_WatchAdd("*0x0CE9,x","PIEIFR4");
-    GEL_WatchAdd("*0x0CEA,x","PIEIER5");
-    GEL_WatchAdd("*0x0CEB,x","PIEIFR5");
-    GEL_WatchAdd("*0x0CEC,x","PIEIER6");
-    GEL_WatchAdd("*0x0CED,x","PIEIFR6");
-    GEL_WatchAdd("*0x0CEE,x","PIEIER7");
-    GEL_WatchAdd("*0x0CEF,x","PIEIFR7");
-    GEL_WatchAdd("*0x0CF0,x","PIEIER8");
-    GEL_WatchAdd("*0x0CF1,x","PIEIFR8");
-    GEL_WatchAdd("*0x0CF2,x","PIEIER9");
-    GEL_WatchAdd("*0x0CF3,x","PIEIFR9");
-    GEL_WatchAdd("*0x0CF4,x","PIEIER10");
-    GEL_WatchAdd("*0x0CF5,x","PIEIFR10");
-    GEL_WatchAdd("*0x0CF6,x","PIEIER11");
-    GEL_WatchAdd("*0x0CF7,x","PIEIFR11");
-    GEL_WatchAdd("*0x0CF8,x","PIEIER12");
-    GEL_WatchAdd("*0x0CF9,x","PIEIFR12");
-}
-hotmenu PIECTRL()
-{
-    GEL_WatchAdd("*0x0CE0,x","PIECTRL");
-}
-hotmenu PIEACK()
-{
-    GEL_WatchAdd("*0x0CE1,x","PIEACK");
-}
-hotmenu PIEIER1_and_PIEIFR1()
-{
-    GEL_WatchAdd("*0x0CE2,x","PIEIER1");
-    GEL_WatchAdd("*0x0CE3,x","PIEIFR1");
-}
-hotmenu PIEIER2_and_PIEIFR2()
-{
-    GEL_WatchAdd("*0x0CE4,x","PIEIER2");
-    GEL_WatchAdd("*0x0CE5,x","PIEIFR2");
-}
-hotmenu PIEIER3_and_PIEIFR3()
-{
-    GEL_WatchAdd("*0x0CE6,x","PIEIER3");
-    GEL_WatchAdd("*0x0CE7,x","PIEIFR3");
-}
-hotmenu PIEIER4_and_PIEIFR4()
-{
-    GEL_WatchAdd("*0x0CE8,x","PIEIER4");
-    GEL_WatchAdd("*0x0CE9,x","PIEIFR4");
-}
-hotmenu PIEIER5_and_PIEIFR5()
-{
-    GEL_WatchAdd("*0x0CEA,x","PIEIER5");
-    GEL_WatchAdd("*0x0CEB,x","PIEIFR5");
-}
-hotmenu PIEIER6_and_PIEIFR6()
-{
-    GEL_WatchAdd("*0x0CEC,x","PIEIER6");
-    GEL_WatchAdd("*0x0CED,x","PIEIFR6");
-}
-hotmenu PIEIER7_and_PIEIFR7()
-{
-    GEL_WatchAdd("*0x0CEE,x","PIEIER7");
-    GEL_WatchAdd("*0x0CEF,x","PIEIFR7");
-}
-hotmenu PIEIER8_and_PIEIFR8()
-{
-    GEL_WatchAdd("*0x0CF0,x","PIEIER8");
-    GEL_WatchAdd("*0x0CF1,x","PIEIFR8");
-}
-hotmenu PIEIER9_and_PIEIFR9()
-{
-    GEL_WatchAdd("*0x0CF2,x","PIEIER9");
-    GEL_WatchAdd("*0x0CF3,x","PIEIFR9");
-}
-hotmenu PIEIFR10_and_PIEIFR10()
-{
-    GEL_WatchAdd("*0x0CF4,x","PIEIER10");
-    GEL_WatchAdd("*0x0CF5,x","PIEIFR10");
-}
-hotmenu PIEIER11_and_PIEIFR11()
-{
-    GEL_WatchAdd("*0x0CF6,x","PIEIER11");
-    GEL_WatchAdd("*0x0CF7,x","PIEIFR11");
-}
-hotmenu PIEIER12_and_PIEIFR12()
-{
-    GEL_WatchAdd("*0x0CF8,x","PIEIER12");
-    GEL_WatchAdd("*0x0CF9,x","PIEIFR12");
-}
-
-
-/********************************************************************/
-/* Serial Communication Interface Registers                         */
-/********************************************************************/
-menuitem "Watch SCI Registers";
-
-hotmenu SCI_A_All_Regs()
-{
-    GEL_WatchAdd("*0x7050,x","SCICCRA");
-    GEL_WatchAdd("*0x7051,x","SCICTL1A");
-    GEL_WatchAdd("*0x7052,x","SCIHBAUDA");
-    GEL_WatchAdd("*0x7053,x","SCILBAUDA");
-    GEL_WatchAdd("*0x7054,x","SCICTL2A");
-    GEL_WatchAdd("*0x7055,x","SCIRXSTA");
-    GEL_WatchAdd("*0x7056,x","SCIRXEMUA");
-    GEL_WatchAdd("*0x7057,x","SCIRXBUFA");
-    GEL_WatchAdd("*0x7059,x","SCITXBUFA");
-    GEL_WatchAdd("*0x705A,x","SCIFFTXA");
-    GEL_WatchAdd("*0x705B,x","SCIFFRXA");
-    GEL_WatchAdd("*0x705C,x","SCIFFCTA");
-    GEL_WatchAdd("*0x705F,x","SCIPRIA");
-}
-hotmenu SCI_A_FIFO_Registers()
-{
-    GEL_WatchAdd("*0x705A,x","SCIFFTXA");
-    GEL_WatchAdd("*0x705B,x","SCIFFRXA");
-    GEL_WatchAdd("*0x705C,x","SCIFFCTA");
-}
-hotmenu SCI_B_All_Regs()
-{
-    GEL_WatchAdd("*0x7750,x","SCICCRB");
-    GEL_WatchAdd("*0x7751,x","SCICTL1B");
-    GEL_WatchAdd("*0x7752,x","SCIHBAUDB");
-    GEL_WatchAdd("*0x7753,x","SCILBAUDB");
-    GEL_WatchAdd("*0x7754,x","SCICTL2B");
-    GEL_WatchAdd("*0x7755,x","SCIRXSTB");
-    GEL_WatchAdd("*0x7756,x","SCIRXEMUB");
-    GEL_WatchAdd("*0x7757,x","SCIRXBUFB");
-    GEL_WatchAdd("*0x7759,x","SCITXBUFB");
-    GEL_WatchAdd("*0x775A,x","SCIFFTXB");
-    GEL_WatchAdd("*0x775B,x","SCIFFRXB");
-    GEL_WatchAdd("*0x775C,x","SCIFFCTB");
-    GEL_WatchAdd("*0x775F,x","SCIPRIB");
-}
-hotmenu SCI_B_FIFO_Registers()
-{
-    GEL_WatchAdd("*0x775A,x","SCIFFTXB");
-    GEL_WatchAdd("*0x775B,x","SCIFFRXB");
-    GEL_WatchAdd("*0x775C,x","SCIFFCTB");
-}
-hotmenu SCI_C_All_Regs()
-{
-    GEL_WatchAdd("*0x7770,x","SCICCRC");
-    GEL_WatchAdd("*0x7771,x","SCICTL1C");
-    GEL_WatchAdd("*0x7772,x","SCIHBAUDC");
-    GEL_WatchAdd("*0x7773,x","SCILBAUDC");
-    GEL_WatchAdd("*0x7774,x","SCICTL2C");
-    GEL_WatchAdd("*0x7775,x","SCIRXSTC");
-    GEL_WatchAdd("*0x7776,x","SCIRXEMUC");
-    GEL_WatchAdd("*0x7777,x","SCIRXBUFC");
-    GEL_WatchAdd("*0x7779,x","SCITXBUFC");
-    GEL_WatchAdd("*0x777A,x","SCIFFTXC");
-    GEL_WatchAdd("*0x777B,x","SCIFFRXC");
-    GEL_WatchAdd("*0x777C,x","SCIFFCTC");
-    GEL_WatchAdd("*0x777F,x","SCIPRIC");
-}
-hotmenu SCI_C_FIFO_Registers()
-{
-    GEL_WatchAdd("*0x777A,x","SCIFFTXC");
-    GEL_WatchAdd("*0x777B,x","SCIFFRXC");
-    GEL_WatchAdd("*0x777C,x","SCIFFCTC");
-}
-
-
-/********************************************************************/
-/* Serial Peripheral Interface Registers                            */
-/********************************************************************/
-menuitem "Watch SPI Registers";
-
-hotmenu SPI_A_All_Regs()
-{
-    GEL_WatchAdd("*0x7040,x","SPIA SPICCR");
-    GEL_WatchAdd("*0x7041,x","SPIA SPICTL");
-    GEL_WatchAdd("*0x7042,x","SPIA SPIST");
-    GEL_WatchAdd("*0x7044,x","SPIA SPIBRR");
-    GEL_WatchAdd("*0x7046,x","SPIA SPIEMU");
-    GEL_WatchAdd("*0x7047,x","SPIA SPIRXBUF");
-    GEL_WatchAdd("*0x7048,x","SPIA SPITXBUF");
-    GEL_WatchAdd("*0x7049,x","SPIA SPIDAT");
-    GEL_WatchAdd("*0x704A,x","SPIA SPIFFTX");
-    GEL_WatchAdd("*0x704B,x","SPIA SPIFFRX");
-    GEL_WatchAdd("*0x704C,x","SPIA SPIFFCT");
-    GEL_WatchAdd("*0x704F,x","SPIA SPIPRI");
-}
-hotmenu SPI_A_FIFO_Registers()
-{
-    GEL_WatchAdd("*0x704A,x","SPIA SPIFFTX");
-    GEL_WatchAdd("*0x704B,x","SPIA SPIFFRX");
-    GEL_WatchAdd("*0x704C,x","SPIA SPIFFCT");
-}
-
-
-/********************************************************************/
-/* Watchdog Timer Registers                                         */
-/********************************************************************/
-menuitem "Watch Watchdog Timer Registers";
-
-hotmenu All_Watchdog_Regs()
-{
-    GEL_WatchAdd("*0x7023,x","WDCNTR");
-    GEL_WatchAdd("*0x7025,x","WDKEY");
-    GEL_WatchAdd("*0x7029,x","WDCR");
-    GEL_WatchAdd("*0x7022,x","SCSR");
-}
-
-/********************************************************************/
-/*** End of file ***/
diff --git a/Source/External/v120/DSP2833x_common/include/DSP2833x_SWPrioritizedIsrLevels.h b/Source/External/v120/DSP2833x_common/include/DSP2833x_SWPrioritizedIsrLevels.h
index 574ffef..c3f3ea1 100644
--- a/Source/External/v120/DSP2833x_common/include/DSP2833x_SWPrioritizedIsrLevels.h
+++ b/Source/External/v120/DSP2833x_common/include/DSP2833x_SWPrioritizedIsrLevels.h
@@ -175,9 +175,9 @@ extern "C" {
 #define	G88PL       0        // reserved
 
 #define	G91PL       1        // SCIRXINTA   (SCI-A)
-#define	G92PL       1        // SCITXINTA   (SCI-A)
-#define	G93PL       1        // SCIRXINTB   (SCI-B)
-#define	G94PL       1        // SCITXINTB   (SCI-B)
+#define	G92PL       5        // SCITXINTA   (SCI-A)
+#define	G93PL       3        // SCIRXINTB   (SCI-B)
+#define	G94PL       4        // SCITXINTB   (SCI-B)
 #define	G95PL       1        // ECAN0INTA   (ECAN-A)
 #define	G96PL       1        // ECAN1INTA   (ECAN-A)
 #define	G97PL       2        // ECAN0INTB   (ECAN-B)
diff --git a/Source/External/v120/DSP2833x_common/include/DSP2833x_SWPrioritizedIsrLevels.h.bak b/Source/External/v120/DSP2833x_common/include/DSP2833x_SWPrioritizedIsrLevels.h.bak
deleted file mode 100644
index a7cf123..0000000
--- a/Source/External/v120/DSP2833x_common/include/DSP2833x_SWPrioritizedIsrLevels.h.bak
+++ /dev/null
@@ -1,5850 +0,0 @@
-// TI File $Revision: /main/2 $
-// Checkin $Date: April 4, 2007   14:25:21 $
-//###########################################################################
-//
-// FILE:    DSP2833x_SWPrioritizedIsrLevels.h
-//
-// TITLE:   DSP28 Devices Software Prioritized Interrupt Service Routine 
-//          Level definitions.
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-#ifndef DSP2833x_SW_PRIORITZIED_ISR_H
-#define DSP2833x_SW_PRIORITZIED_ISR_H
-
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-
-//-------------------------------------------------------------------------------
-// Interrupt Enable Register Allocation For 2833x Devices:
-//-------------------------------------------------------------------------------
-// Interrupts can be enabled/disabled using the CPU interrupt enable register
-// (IER) and the PIE interrupt enable registers (PIEIER1 to PIEIER12). 
-//-------------------------------------------------------------------------------
-//-------------------------------------------------------------------------------
-// Set "Global" Interrupt Priority Level (IER register):
-//-------------------------------------------------------------------------------
-// The user must set the appropriate priority level for each of the CPU
-// interrupts. This is termed as the "global" priority. The priority level
-// must be a number between 1 (highest) to 16 (lowest). A value of 0 must
-// be entered for reserved interrupts or interrupts that are not used. This
-// will also reduce code size by not including ISR's that are not used.
-//
-// Note: The priority levels below are used to calculate the IER register
-//       interrupt masks MINT1 to MINT16.
-//
-//
-// Note: The priority levels shown here may not make sense in a 
-//       real application.  This is for demonstration purposes only!!!
-// 
-//       The user should change these to values that make sense for 
-//       their application.
-//
-// 0  = not used
-// 1  = highest priority
-// ...
-// 16 = lowest priority
-#define	INT1PL      2        // Group1 Interrupts (PIEIER1)
-#define	INT2PL      0        // Group2 Interrupts (PIEIER2)
-#define	INT3PL      4        // Group3 Interrupts (PIEIER3)
-#define	INT4PL      2        // Group4 Interrupts (PIEIER4)
-#define	INT5PL      2        // Group5 Interrupts (PIEIER5)
-#define	INT6PL      3        // Group6 Interrupts (PIEIER6)
-#define	INT7PL      0        // reserved
-#define	INT8PL      0        // reserved
-#define	INT9PL      1        // Group9 Interrupts (PIEIER9)
-#define	INT10PL     0        // reserved
-#define	INT11PL     0        // reserved
-#define	INT12PL     0        // reserved
-#define	INT13PL     4        // XINT13
-#define	INT14PL     4        // INT14 (TINT2)
-#define	INT15PL     4        // DATALOG
-#define	INT16PL     4        // RTOSINT
-
-//-------------------------------------------------------------------------------
-// Set "Group" Interrupt Priority Level (PIEIER1 to PIEIER12 registers):
-//-------------------------------------------------------------------------------
-// The user must set the appropriate priority level for each of the PIE
-// interrupts. This is termed as the "group" priority. The priority level
-// must be a number between 1 (highest) to 8 (lowest). A value of 0 must
-// be entered for reserved interrupts or interrupts that are not used. This
-// will also reduce code size by not including ISR's that are not used:
-//
-// Note: The priority levels below are used to calculate the following
-//       PIEIER register interrupt masks:
-//                           MG11 to MG18
-//                           MG21 to MG28
-//                           MG31 to MG38
-//                           MG41 to MG48
-//                           MG51 to MG58
-//                           MG61 to MG68
-//                           MG71 to MG78
-//                           MG81 to MG88
-//                           MG91 to MG98
-//                           MG101 to MG108
-//                           MG111 to MG118
-//                           MG121 to MG128
-//
-// Note: The priority levels shown here may not make sense in a 
-//       real application.  This is for demonstration purposes only!!!
-// 
-//       The user should change these to values that make sense for 
-//       their application.
-//
-// 0  = not used
-// 1  = highest priority
-// ...
-// 8  = lowest priority
-//
-#define	G11PL       7        // SEQ1INT     (ADC)
-#define	G12PL       6        // SEQ2INT     (ADC)
-#define	G13PL       0        // reserved
-#define	G14PL       1        // XINT1       (External)
-#define	G15PL       3        // XINT2       (External)
-#define	G16PL       2        // ADCINT      (ADC)
-#define	G17PL       1        // TINT0       (CPU Timer 0)
-#define	G18PL       5        // WAKEINT     (WD/LPM)
-
-#define	G21PL       4        // EPWM1_TZINT (ePWM1 Trip)
-#define	G22PL       3        // EPWM2_TZINT (ePWM2 Trip)
-#define	G23PL       2        // EPWM3_TZINT (ePWM3 Trip)
-#define	G24PL       1        // EPWM4_TZINT (ePWM4 Trip)
-#define	G25PL       5        // EPWM5_TZINT (ePWM5 Trip)
-#define	G26PL       6        // EPWM6_TZINT (ePWM6 Trip)
-#define	G27PL       0        // reserved
-#define	G28PL       0        // reserved
-
-#define	G31PL       4        // EPWM1_INT   (ePWM1 Int)
-#define	G32PL       1        // EPWM2_INT   (ePWM2 Int)
-#define	G33PL       1        // EPWM3_INT   (ePWM3 Int)
-#define	G34PL       2        // EPWM4_INT   (ePWM4 Int)
-#define	G35PL       2        // EPWM5_INT   (ePWM5 Int)
-#define	G36PL       1        // EPWM6_INT   (ePWM6 Int)
-#define	G37PL       0        // reserved
-#define	G38PL       0        // reserved
-
-#define	G41PL       2        // ECAP1_INT   (eCAP1 Int)
-#define	G42PL       1        // ECAP2_INT   (eCAP2 Int)
-#define	G43PL       3        // ECAP3_INT   (eCAP3 Int)
-#define	G44PL       3        // ECAP4_INT   (eCAP4 Int)
-#define	G45PL       5        // ECAP5_INT   (eCAP5 Int)
-#define	G46PL       5        // ECAP6_INT   (eCAP6 Int)
-#define	G47PL       0        // reserved
-#define	G48PL       0        // reserved
-
-#define	G51PL       2        // EQEP1_INT   (eQEP1 Int)
-#define	G52PL       1        // EQEP2_INT   (eQEP2 Int)
-#define	G53PL       0        // reserved
-#define	G54PL       0        // reserved
-#define	G55PL       0        // reserved
-#define	G56PL       0        // reserved
-#define	G57PL       0        // reserved
-#define	G58PL       0        // reserved
-
-#define	G61PL       3        // SPIRXINTA   (SPI-A)
-#define	G62PL       1        // SPITXINTA   (SPI-A)
-#define	G63PL       4        // MRINTB      (McBSP-B)
-#define	G64PL       6        // MXINTB      (McBSP-B)          
-#define	G65PL       2        // MRINTA      (McBSP-A)
-#define	G66PL       1        // MXINTA      (McBSP-A)                  
-#define	G67PL       0        // reserved
-#define	G68PL       0        // reserved         
-
-#define	G71PL       5        // DINTCH1     (DMA)
-#define	G72PL       4        // DINTCH2     (DMA)
-#define	G73PL       4        // DINTCH3     (DMA)
-#define	G74PL       2        // DINTCH4     (DMA)
-#define	G75PL       3        // DINTCH5     (DMA)
-#define	G76PL       1        // DINTCH6     (DMA)
-#define	G77PL       0        // reserved
-#define	G78PL       0        // reserved
-
-#define	G81PL       1        // I2CINT1A    (I2C-A)
-#define	G82PL       2        // I2CINT2A    (I2C-A)
-#define	G83PL       0        // reserved
-#define	G84PL       0        // reserved
-#define	G85PL       4        // SCIRXINTC   (SCI-C)
-#define	G86PL       1        // SCITXINTC   (SCI-C)
-#define	G87PL       0        // reserved
-#define	G88PL       0        // reserved
-
-#define	G91PL       1        // SCIRXINTA   (SCI-A)
-#define	G92PL       1        // SCITXINTA   (SCI-A)
-#define	G93PL       1        // SCIRXINTB   (SCI-B)
-#define	G94PL       1        // SCITXINTB   (SCI-B)
-#define	G95PL       1        // ECAN0INTA   (ECAN-A)
-#define	G96PL       1        // ECAN1INTA   (ECAN-A)
-#define	G97PL       2        // ECAN0INTB   (ECAN-B)
-#define	G98PL       4        // ECAN1INTB   (ECAN-B)          
-
-#define	G101PL      0        // reserved
-#define	G102PL      0        // reserved
-#define	G103PL      0        // reserved
-#define	G104PL      0        // reserved
-#define	G105PL      0        // reserved
-#define	G106PL      0        // reserved
-#define	G107PL      0        // reserved
-#define	G108PL      0        // reserved
-
-#define	G111PL      0        // reserved
-#define	G112PL      0        // reserved
-#define	G113PL      0        // reserved
-#define	G114PL      0        // reserved
-#define	G115PL      0        // reserved
-#define	G116PL      0        // reserved
-#define	G117PL      0        // reserved
-#define	G118PL      0        // reserved
-
-#define	G121PL      5        // XINT3       (External)
-#define	G122PL      3        // XINT4       (External)
-#define	G123PL      2        // XINT5       (External)
-#define	G124PL      2        // XINT6       (External)
-#define	G125PL      1        // XINT7       (External)
-#define	G126PL      0        // reserved
-#define	G127PL      6        // LVF         (FPA32)
-#define	G128PL      1        // LUF         (FPA32)
-
-
-// There should be no need to modify code below this line 
-//-------------------------------------------------------------------------------
-// Automatically generate IER interrupt masks MINT1 to MINT16:
-//
-
-// Beginning of MINT1:
-#if (INT1PL == 0)
-#define  MINT1_1PL    ~(1 << 0)
-#else
-#define  MINT1_1PL    0xFFFF
-#endif
-
-#if (INT2PL >= INT1PL) || (INT2PL == 0)
-#define  MINT1_2PL   ~(1 << 1)
-#else
-#define  MINT1_2PL   0xFFFF
-#endif
-
-#if (INT3PL >= INT1PL) || (INT3PL == 0)
-#define  MINT1_3PL   ~(1 << 2)
-#else
-#define  MINT1_3PL   0xFFFF
-#endif
-
-#if (INT4PL >= INT1PL) || (INT4PL == 0)
-#define  MINT1_4PL   ~(1 << 3)
-#else
-#define  MINT1_4PL   0xFFFF
-#endif
-
-#if (INT5PL >= INT1PL) || (INT5PL == 0)
-#define  MINT1_5PL   ~(1 << 4)
-#else
-#define  MINT1_5PL   0xFFFF
-#endif
-
-#if (INT6PL >= INT1PL) || (INT6PL == 0)
-#define  MINT1_6PL   ~(1 << 5)
-#else
-#define  MINT1_6PL   0xFFFF
-#endif
-
-#if (INT7PL >= INT1PL) || (INT7PL == 0)
-#define  MINT1_7PL   ~(1 << 6)
-#else
-#define  MINT1_7PL   0xFFFF
-#endif
-
-#if (INT8PL >= INT1PL) || (INT8PL == 0)
-#define  MINT1_8PL   ~(1 << 7)
-#else
-#define  MINT1_8PL   0xFFFF
-#endif
-
-#if (INT9PL >= INT1PL) || (INT9PL == 0)
-#define  MINT1_9PL   ~(1 << 8)
-#else
-#define  MINT1_9PL   0xFFFF
-#endif
-
-#if (INT10PL >= INT1PL) || (INT10PL == 0)
-#define  MINT1_10PL   ~(1 << 9)
-#else
-#define  MINT1_10PL   0xFFFF
-#endif
-
-#if (INT11PL >= INT1PL) || (INT11PL == 0)
-#define  MINT1_11PL   ~(1 << 10)
-#else
-#define  MINT1_11PL   0xFFFF
-#endif
-
-#if (INT12PL >= INT1PL) || (INT12PL == 0)
-#define  MINT1_12PL   ~(1 << 11)
-#else
-#define  MINT1_12PL   0xFFFF
-#endif
-
-#if (INT13PL >= INT1PL) || (INT13PL == 0)
-#define  MINT1_13PL   ~(1 << 12)
-#else
-#define  MINT1_13PL   0xFFFF
-#endif
-
-#if (INT14PL >= INT1PL) || (INT14PL == 0)
-#define  MINT1_14PL   ~(1 << 13)
-#else
-#define  MINT1_14PL   0xFFFF
-#endif
-
-#if (INT15PL >= INT1PL) || (INT15PL == 0)
-#define  MINT1_15PL   ~(1 << 14)
-#else
-#define  MINT1_15PL   0xFFFF
-#endif
-
-#if (INT16PL >= INT1PL) || (INT16PL == 0)
-#define  MINT1_16PL   ~(1 << 15)
-#else
-#define  MINT1_16PL   0xFFFF
-#endif
-
-#define  MINT1    (MINT1_1PL  & MINT1_2PL  & MINT1_3PL  & MINT1_4PL  & \
-                   MINT1_5PL  & MINT1_6PL  & MINT1_7PL  & MINT1_8PL  & \
-                   MINT1_9PL  & MINT1_10PL & MINT1_11PL & MINT1_12PL & \
-                   MINT1_13PL & MINT1_14PL & MINT1_15PL & MINT1_16PL)
-// End Of MINT1.
-
-// Beginning of MINT2:
-#if (INT1PL >= INT2PL) || (INT1PL == 0)
-#define  MINT2_1PL    ~(1 << 0)
-#else
-#define  MINT2_1PL    0xFFFF
-#endif
-
-#if (INT2PL == 0)
-#define  MINT2_2PL   ~(1 << 1)
-#else
-#define  MINT2_2PL   0xFFFF
-#endif
-
-#if (INT3PL >= INT2PL) || (INT3PL == 0)
-#define  MINT2_3PL   ~(1 << 2)
-#else
-#define  MINT2_3PL   0xFFFF
-#endif
-
-#if (INT4PL >= INT2PL) || (INT4PL == 0)
-#define  MINT2_4PL   ~(1 << 3)
-#else
-#define  MINT2_4PL   0xFFFF
-#endif
-
-#if (INT5PL >= INT2PL) || (INT5PL == 0)
-#define  MINT2_5PL   ~(1 << 4)
-#else
-#define  MINT2_5PL   0xFFFF
-#endif
-
-#if (INT6PL >= INT2PL) || (INT6PL == 0)
-#define  MINT2_6PL   ~(1 << 5)
-#else
-#define  MINT2_6PL   0xFFFF
-#endif
-
-#if (INT7PL >= INT2PL) || (INT7PL == 0)
-#define  MINT2_7PL   ~(1 << 6)
-#else
-#define  MINT2_7PL   0xFFFF
-#endif
-
-#if (INT8PL >= INT2PL) || (INT8PL == 0)
-#define  MINT2_8PL   ~(1 << 7)
-#else
-#define  MINT2_8PL   0xFFFF
-#endif
-
-#if (INT9PL >= INT2PL) || (INT9PL == 0)
-#define  MINT2_9PL   ~(1 << 8)
-#else
-#define  MINT2_9PL   0xFFFF
-#endif
-
-#if (INT10PL >= INT2PL) || (INT10PL == 0)
-#define  MINT2_10PL   ~(1 << 9)
-#else
-#define  MINT2_10PL   0xFFFF
-#endif
-
-#if (INT11PL >= INT2PL) || (INT11PL == 0)
-#define  MINT2_11PL   ~(1 << 10)
-#else
-#define  MINT2_11PL   0xFFFF
-#endif
-
-#if (INT12PL >= INT2PL) || (INT12PL == 0)
-#define  MINT2_12PL   ~(1 << 11)
-#else
-#define  MINT2_12PL   0xFFFF
-#endif
-
-#if (INT13PL >= INT2PL) || (INT13PL == 0)
-#define  MINT2_13PL   ~(1 << 12)
-#else
-#define  MINT2_13PL   0xFFFF
-#endif
-
-#if (INT14PL >= INT2PL) || (INT14PL == 0)
-#define  MINT2_14PL   ~(1 << 13)
-#else
-#define  MINT2_14PL   0xFFFF
-#endif
-
-#if (INT15PL >= INT2PL) || (INT15PL == 0)
-#define  MINT2_15PL   ~(1 << 14)
-#else
-#define  MINT2_15PL   0xFFFF
-#endif
-
-#if (INT16PL >= INT2PL) || (INT16PL == 0)
-#define  MINT2_16PL   ~(1 << 15)
-#else
-#define  MINT2_16PL   0xFFFF
-#endif
-
-#define  MINT2    (MINT2_1PL  & MINT2_2PL  & MINT2_3PL  & MINT2_4PL  & \
-                   MINT2_5PL  & MINT2_6PL  & MINT2_7PL  & MINT2_8PL  & \
-                   MINT2_9PL  & MINT2_10PL & MINT2_11PL & MINT2_12PL & \
-                   MINT2_13PL & MINT2_14PL & MINT2_15PL & MINT2_16PL)
-// End Of MINT2.
-
-// Beginning of MINT3:
-#if (INT1PL >= INT3PL) || (INT1PL == 0)
-#define  MINT3_1PL    ~(1 << 0)
-#else
-#define  MINT3_1PL    0xFFFF
-#endif
-
-#if (INT2PL >= INT3PL) || (INT2PL == 0)
-#define  MINT3_2PL   ~(1 << 1)
-#else
-#define  MINT3_2PL   0xFFFF
-#endif
-
-#if (INT3PL == 0)
-#define  MINT3_3PL   ~(1 << 2)
-#else
-#define  MINT3_3PL   0xFFFF
-#endif
-
-#if (INT4PL >= INT3PL) || (INT4PL == 0)
-#define  MINT3_4PL   ~(1 << 3)
-#else
-#define  MINT3_4PL   0xFFFF
-#endif
-
-#if (INT5PL >= INT3PL) || (INT5PL == 0)
-#define  MINT3_5PL   ~(1 << 4)
-#else
-#define  MINT3_5PL   0xFFFF
-#endif
-
-#if (INT6PL >= INT3PL) || (INT6PL == 0)
-#define  MINT3_6PL   ~(1 << 5)
-#else
-#define  MINT3_6PL   0xFFFF
-#endif
-
-#if (INT7PL >= INT3PL) || (INT7PL == 0)
-#define  MINT3_7PL   ~(1 << 6)
-#else
-#define  MINT3_7PL   0xFFFF
-#endif
-
-#if (INT8PL >= INT3PL) || (INT8PL == 0)
-#define  MINT3_8PL   ~(1 << 7)
-#else
-#define  MINT3_8PL   0xFFFF
-#endif
-
-#if (INT9PL >= INT3PL) || (INT9PL == 0)
-#define  MINT3_9PL   ~(1 << 8)
-#else
-#define  MINT3_9PL   0xFFFF
-#endif
-
-#if (INT10PL >= INT3PL) || (INT10PL == 0)
-#define  MINT3_10PL   ~(1 << 9)
-#else
-#define  MINT3_10PL   0xFFFF
-#endif
-
-#if (INT11PL >= INT3PL) || (INT11PL == 0)
-#define  MINT3_11PL   ~(1 << 10)
-#else
-#define  MINT3_11PL   0xFFFF
-#endif
-
-#if (INT12PL >= INT3PL) || (INT12PL == 0)
-#define  MINT3_12PL   ~(1 << 11)
-#else
-#define  MINT3_12PL   0xFFFF
-#endif
-
-#if (INT13PL >= INT3PL) || (INT13PL == 0)
-#define  MINT3_13PL   ~(1 << 12)
-#else
-#define  MINT3_13PL   0xFFFF
-#endif
-
-#if (INT14PL >= INT3PL) || (INT14PL == 0)
-#define  MINT3_14PL   ~(1 << 13)
-#else
-#define  MINT3_14PL   0xFFFF
-#endif
-
-#if (INT15PL >= INT3PL) || (INT15PL == 0)
-#define  MINT3_15PL   ~(1 << 14)
-#else
-#define  MINT3_15PL   0xFFFF
-#endif
-
-#if (INT16PL >= INT3PL) || (INT16PL == 0)
-#define  MINT3_16PL   ~(1 << 15)
-#else
-#define  MINT3_16PL   0xFFFF
-#endif
-
-#define  MINT3    (MINT3_1PL  & MINT3_2PL  & MINT3_3PL  & MINT3_4PL  & \
-                   MINT3_5PL  & MINT3_6PL  & MINT3_7PL  & MINT3_8PL  & \
-                   MINT3_9PL  & MINT3_10PL & MINT3_11PL & MINT3_12PL & \
-                   MINT3_13PL & MINT3_14PL & MINT3_15PL & MINT3_16PL)
-// End Of MINT3.
-
-// Beginning of MINT4:
-#if (INT1PL >= INT4PL) || (INT1PL == 0)
-#define  MINT4_1PL    ~(1 << 0)
-#else
-#define  MINT4_1PL    0xFFFF
-#endif
-
-#if (INT2PL >= INT4PL) || (INT2PL == 0)
-#define  MINT4_2PL   ~(1 << 1)
-#else
-#define  MINT4_2PL   0xFFFF
-#endif
-
-#if (INT3PL >= INT4PL) || (INT3PL == 0)
-#define  MINT4_3PL   ~(1 << 2)
-#else
-#define  MINT4_3PL   0xFFFF
-#endif
-
-#if (INT4PL == 0)
-#define  MINT4_4PL   ~(1 << 3)
-#else
-#define  MINT4_4PL   0xFFFF
-#endif
-
-#if (INT5PL >= INT4PL) || (INT5PL == 0)
-#define  MINT4_5PL   ~(1 << 4)
-#else
-#define  MINT4_5PL   0xFFFF
-#endif
-
-#if (INT6PL >= INT4PL) || (INT6PL == 0)
-#define  MINT4_6PL   ~(1 << 5)
-#else
-#define  MINT4_6PL   0xFFFF
-#endif
-
-#if (INT7PL >= INT4PL) || (INT7PL == 0)
-#define  MINT4_7PL   ~(1 << 6)
-#else
-#define  MINT4_7PL   0xFFFF
-#endif
-
-#if (INT8PL >= INT4PL) || (INT8PL == 0)
-#define  MINT4_8PL   ~(1 << 7)
-#else
-#define  MINT4_8PL   0xFFFF
-#endif
-
-#if (INT9PL >= INT4PL) || (INT9PL == 0)
-#define  MINT4_9PL   ~(1 << 8)
-#else
-#define  MINT4_9PL   0xFFFF
-#endif
-
-#if (INT10PL >= INT4PL) || (INT10PL == 0)
-#define  MINT4_10PL   ~(1 << 9)
-#else
-#define  MINT4_10PL   0xFFFF
-#endif
-
-#if (INT11PL >= INT4PL) || (INT11PL == 0)
-#define  MINT4_11PL   ~(1 << 10)
-#else
-#define  MINT4_11PL   0xFFFF
-#endif
-
-#if (INT12PL >= INT4PL) || (INT12PL == 0)
-#define  MINT4_12PL   ~(1 << 11)
-#else
-#define  MINT4_12PL   0xFFFF
-#endif
-
-#if (INT13PL >= INT4PL) || (INT13PL == 0)
-#define  MINT4_13PL   ~(1 << 12)
-#else
-#define  MINT4_13PL   0xFFFF
-#endif
-
-#if (INT14PL >= INT4PL) || (INT14PL == 0)
-#define  MINT4_14PL   ~(1 << 13)
-#else
-#define  MINT4_14PL   0xFFFF
-#endif
-
-#if (INT15PL >= INT4PL) || (INT15PL == 0)
-#define  MINT4_15PL   ~(1 << 14)
-#else
-#define  MINT4_15PL   0xFFFF
-#endif
-
-#if (INT16PL >= INT4PL) || (INT16PL == 0)
-#define  MINT4_16PL   ~(1 << 15)
-#else
-#define  MINT4_16PL   0xFFFF
-#endif
-
-#define  MINT4    (MINT4_1PL  & MINT4_2PL  & MINT4_3PL  & MINT4_4PL  & \
-                   MINT4_5PL  & MINT4_6PL  & MINT4_7PL  & MINT4_8PL  & \
-                   MINT4_9PL  & MINT4_10PL & MINT4_11PL & MINT4_12PL & \
-                   MINT4_13PL & MINT4_14PL & MINT4_15PL & MINT4_16PL)
-// End Of MINT4.
-
-// Beginning of MINT5:
-#if (INT1PL >= INT5PL) || (INT1PL == 0)
-#define  MINT5_1PL    ~(1 << 0)
-#else
-#define  MINT5_1PL    0xFFFF
-#endif
-
-#if (INT2PL >= INT5PL) || (INT2PL == 0)
-#define  MINT5_2PL   ~(1 << 1)
-#else
-#define  MINT5_2PL   0xFFFF
-#endif
-
-#if (INT3PL >= INT5PL) || (INT3PL == 0)
-#define  MINT5_3PL   ~(1 << 2)
-#else
-#define  MINT5_3PL   0xFFFF
-#endif
-
-#if (INT4PL >= INT5PL) || (INT4PL == 0)
-#define  MINT5_4PL   ~(1 << 3)
-#else
-#define  MINT5_4PL   0xFFFF
-#endif
-
-#if (INT5PL == 0)
-#define  MINT5_5PL   ~(1 << 4)
-#else
-#define  MINT5_5PL   0xFFFF
-#endif
-
-#if (INT6PL >= INT5PL) || (INT6PL == 0)
-#define  MINT5_6PL   ~(1 << 5)
-#else
-#define  MINT5_6PL   0xFFFF
-#endif
-
-#if (INT7PL >= INT5PL) || (INT7PL == 0)
-#define  MINT5_7PL   ~(1 << 6)
-#else
-#define  MINT5_7PL   0xFFFF
-#endif
-
-#if (INT8PL >= INT5PL) || (INT8PL == 0)
-#define  MINT5_8PL   ~(1 << 7)
-#else
-#define  MINT5_8PL   0xFFFF
-#endif
-
-#if (INT9PL >= INT5PL) || (INT9PL == 0)
-#define  MINT5_9PL   ~(1 << 8)
-#else
-#define  MINT5_9PL   0xFFFF
-#endif
-
-#if (INT10PL >= INT5PL) || (INT10PL == 0)
-#define  MINT5_10PL   ~(1 << 9)
-#else
-#define  MINT5_10PL   0xFFFF
-#endif
-
-#if (INT11PL >= INT5PL) || (INT11PL == 0)
-#define  MINT5_11PL   ~(1 << 10)
-#else
-#define  MINT5_11PL   0xFFFF
-#endif
-
-#if (INT12PL >= INT5PL) || (INT12PL == 0)
-#define  MINT5_12PL   ~(1 << 11)
-#else
-#define  MINT5_12PL   0xFFFF
-#endif
-
-#if (INT13PL >= INT5PL) || (INT13PL == 0)
-#define  MINT5_13PL   ~(1 << 12)
-#else
-#define  MINT5_13PL   0xFFFF
-#endif
-
-#if (INT14PL >= INT5PL) || (INT14PL == 0)
-#define  MINT5_14PL   ~(1 << 13)
-#else
-#define  MINT5_14PL   0xFFFF
-#endif
-
-#if (INT15PL >= INT5PL) || (INT15PL == 0)
-#define  MINT5_15PL   ~(1 << 14)
-#else
-#define  MINT5_15PL   0xFFFF
-#endif
-
-#if (INT16PL >= INT5PL) || (INT16PL == 0)
-#define  MINT5_16PL   ~(1 << 15)
-#else
-#define  MINT5_16PL   0xFFFF
-#endif
-
-#define  MINT5    (MINT5_1PL  & MINT5_2PL  & MINT5_3PL  & MINT5_4PL  & \
-                   MINT5_5PL  & MINT5_6PL  & MINT5_7PL  & MINT5_8PL  & \
-                   MINT5_9PL  & MINT5_10PL & MINT5_11PL & MINT5_12PL & \
-                   MINT5_13PL & MINT5_14PL & MINT5_15PL & MINT5_16PL)
-// End Of MINT5.
-
-// Beginning of MINT6:
-#if (INT1PL >= INT6PL) || (INT1PL == 0)
-#define  MINT6_1PL    ~(1 << 0)
-#else
-#define  MINT6_1PL    0xFFFF
-#endif
-
-#if (INT2PL >= INT6PL) || (INT2PL == 0)
-#define  MINT6_2PL   ~(1 << 1)
-#else
-#define  MINT6_2PL   0xFFFF
-#endif
-
-#if (INT3PL >= INT6PL) || (INT3PL == 0)
-#define  MINT6_3PL   ~(1 << 2)
-#else
-#define  MINT6_3PL   0xFFFF
-#endif
-
-#if (INT4PL >= INT6PL) || (INT4PL == 0)
-#define  MINT6_4PL   ~(1 << 3)
-#else
-#define  MINT6_4PL   0xFFFF
-#endif
-
-#if (INT5PL >= INT6PL) || (INT5PL == 0)
-#define  MINT6_5PL   ~(1 << 4)
-#else
-#define  MINT6_5PL   0xFFFF
-#endif
-
-#if (INT6PL == 0)
-#define  MINT6_6PL   ~(1 << 5)
-#else
-#define  MINT6_6PL   0xFFFF
-#endif
-
-#if (INT7PL >= INT6PL) || (INT7PL == 0)
-#define  MINT6_7PL   ~(1 << 6)
-#else
-#define  MINT6_7PL   0xFFFF
-#endif
-
-#if (INT8PL >= INT6PL) || (INT8PL == 0)
-#define  MINT6_8PL   ~(1 << 7)
-#else
-#define  MINT6_8PL   0xFFFF
-#endif
-
-#if (INT9PL >= INT6PL) || (INT9PL == 0)
-#define  MINT6_9PL   ~(1 << 8)
-#else
-#define  MINT6_9PL   0xFFFF
-#endif
-
-#if (INT10PL >= INT6PL) || (INT10PL == 0)
-#define  MINT6_10PL   ~(1 << 9)
-#else
-#define  MINT6_10PL   0xFFFF
-#endif
-
-#if (INT11PL >= INT6PL) || (INT11PL == 0)
-#define  MINT6_11PL   ~(1 << 10)
-#else
-#define  MINT6_11PL   0xFFFF
-#endif
-
-#if (INT12PL >= INT6PL) || (INT12PL == 0)
-#define  MINT6_12PL   ~(1 << 11)
-#else
-#define  MINT6_12PL   0xFFFF
-#endif
-
-#if (INT13PL >= INT6PL) || (INT13PL == 0)
-#define  MINT6_13PL   ~(1 << 12)
-#else
-#define  MINT6_13PL   0xFFFF
-#endif
-
-#if (INT14PL >= INT6PL) || (INT14PL == 0)
-#define  MINT6_14PL   ~(1 << 13)
-#else
-#define  MINT6_14PL   0xFFFF
-#endif
-
-#if (INT15PL >= INT6PL) || (INT15PL == 0)
-#define  MINT6_15PL   ~(1 << 14)
-#else
-#define  MINT6_15PL   0xFFFF
-#endif
-
-#if (INT16PL >= INT6PL) || (INT16PL == 0)
-#define  MINT6_16PL   ~(1 << 15)
-#else
-#define  MINT6_16PL   0xFFFF
-#endif
-
-#define  MINT6    (MINT6_1PL  & MINT6_2PL  & MINT6_3PL  & MINT6_4PL  & \
-                   MINT6_5PL  & MINT6_6PL  & MINT6_7PL  & MINT6_8PL  & \
-                   MINT6_9PL  & MINT6_10PL & MINT6_11PL & MINT6_12PL & \
-                   MINT6_13PL & MINT6_14PL & MINT6_15PL & MINT6_16PL)
-// End Of MINT6.
-
-// Beginning of MINT7:
-#if (INT1PL >= INT7PL) || (INT1PL == 0)
-#define  MINT7_1PL    ~(1 << 0)
-#else
-#define  MINT7_1PL    0xFFFF
-#endif
-
-#if (INT2PL >= INT7PL) || (INT2PL == 0)
-#define  MINT7_2PL   ~(1 << 1)
-#else
-#define  MINT7_2PL   0xFFFF
-#endif
-
-#if (INT3PL >= INT7PL) || (INT3PL == 0)
-#define  MINT7_3PL   ~(1 << 2)
-#else
-#define  MINT7_3PL   0xFFFF
-#endif
-
-#if (INT4PL >= INT7PL) || (INT4PL == 0)
-#define  MINT7_4PL   ~(1 << 3)
-#else
-#define  MINT7_4PL   0xFFFF
-#endif
-
-#if (INT5PL >= INT7PL) || (INT5PL == 0)
-#define  MINT7_5PL   ~(1 << 4)
-#else
-#define  MINT7_5PL   0xFFFF
-#endif
-
-#if (INT6PL >= INT7PL) || (INT6PL == 0)
-#define  MINT7_6PL   ~(1 << 5)
-#else
-#define  MINT7_6PL   0xFFFF
-#endif
-
-#if (INT7PL == 0)
-#define  MINT7_7PL   ~(1 << 6)
-#else
-#define  MINT7_7PL   0xFFFF
-#endif
-
-#if (INT8PL >= INT7PL) || (INT8PL == 0)
-#define  MINT7_8PL   ~(1 << 7)
-#else
-#define  MINT7_8PL   0xFFFF
-#endif
-
-#if (INT9PL >= INT7PL) || (INT9PL == 0)
-#define  MINT7_9PL   ~(1 << 8)
-#else
-#define  MINT7_9PL   0xFFFF
-#endif
-
-#if (INT10PL >= INT7PL) || (INT10PL == 0)
-#define  MINT7_10PL   ~(1 << 9)
-#else
-#define  MINT7_10PL   0xFFFF
-#endif
-
-#if (INT11PL >= INT7PL) || (INT11PL == 0)
-#define  MINT7_11PL   ~(1 << 10)
-#else
-#define  MINT7_11PL   0xFFFF
-#endif
-
-#if (INT12PL >= INT7PL) || (INT12PL == 0)
-#define  MINT7_12PL   ~(1 << 11)
-#else
-#define  MINT7_12PL   0xFFFF
-#endif
-
-#if (INT13PL >= INT7PL) || (INT13PL == 0)
-#define  MINT7_13PL   ~(1 << 12)
-#else
-#define  MINT7_13PL   0xFFFF
-#endif
-
-#if (INT14PL >= INT7PL) || (INT14PL == 0)
-#define  MINT7_14PL   ~(1 << 13)
-#else
-#define  MINT7_14PL   0xFFFF
-#endif
-
-#if (INT15PL >= INT7PL) || (INT15PL == 0)
-#define  MINT7_15PL   ~(1 << 14)
-#else
-#define  MINT7_15PL   0xFFFF
-#endif
-
-#if (INT16PL >= INT7PL) || (INT16PL == 0)
-#define  MINT7_16PL   ~(1 << 15)
-#else
-#define  MINT7_16PL   0xFFFF
-#endif
-
-#define  MINT7    (MINT7_1PL  & MINT7_2PL  & MINT7_3PL  & MINT7_4PL  & \
-                   MINT7_5PL  & MINT7_6PL  & MINT7_7PL  & MINT7_8PL  & \
-                   MINT7_9PL  & MINT7_10PL & MINT7_11PL & MINT7_12PL & \
-                   MINT7_13PL & MINT7_14PL & MINT7_15PL & MINT7_16PL)
-// End Of MINT7.
-
-// Beginning of MINT8:
-#if (INT1PL >= INT8PL) || (INT1PL == 0)
-#define  MINT8_1PL    ~(1 << 0)
-#else
-#define  MINT8_1PL    0xFFFF
-#endif
-
-#if (INT2PL >= INT8PL) || (INT2PL == 0)
-#define  MINT8_2PL   ~(1 << 1)
-#else
-#define  MINT8_2PL   0xFFFF
-#endif
-
-#if (INT3PL >= INT8PL) || (INT3PL == 0)
-#define  MINT8_3PL   ~(1 << 2)
-#else
-#define  MINT8_3PL   0xFFFF
-#endif
-
-#if (INT4PL >= INT8PL) || (INT4PL == 0)
-#define  MINT8_4PL   ~(1 << 3)
-#else
-#define  MINT8_4PL   0xFFFF
-#endif
-
-#if (INT5PL >= INT8PL) || (INT5PL == 0)
-#define  MINT8_5PL   ~(1 << 4)
-#else
-#define  MINT8_5PL   0xFFFF
-#endif
-
-#if (INT6PL >= INT8PL) || (INT6PL == 0)
-#define  MINT8_6PL   ~(1 << 5)
-#else
-#define  MINT8_6PL   0xFFFF
-#endif
-
-#if (INT7PL >= INT8PL) || (INT7PL == 0)
-#define  MINT8_7PL   ~(1 << 6)
-#else
-#define  MINT8_7PL   0xFFFF
-#endif
-
-#if (INT8PL == 0)
-#define  MINT8_8PL   ~(1 << 7)
-#else
-#define  MINT8_8PL   0xFFFF
-#endif
-
-#if (INT9PL >= INT8PL) || (INT9PL == 0)
-#define  MINT8_9PL   ~(1 << 8)
-#else
-#define  MINT8_9PL   0xFFFF
-#endif
-
-#if (INT10PL >= INT8PL) || (INT10PL == 0)
-#define  MINT8_10PL   ~(1 << 9)
-#else
-#define  MINT8_10PL   0xFFFF
-#endif
-
-#if (INT11PL >= INT8PL) || (INT11PL == 0)
-#define  MINT8_11PL   ~(1 << 10)
-#else
-#define  MINT8_11PL   0xFFFF
-#endif
-
-#if (INT12PL >= INT8PL) || (INT12PL == 0)
-#define  MINT8_12PL   ~(1 << 11)
-#else
-#define  MINT8_12PL   0xFFFF
-#endif
-
-#if (INT13PL >= INT8PL) || (INT13PL == 0)
-#define  MINT8_13PL   ~(1 << 12)
-#else
-#define  MINT8_13PL   0xFFFF
-#endif
-
-#if (INT14PL >= INT8PL) || (INT14PL == 0)
-#define  MINT8_14PL   ~(1 << 13)
-#else
-#define  MINT8_14PL   0xFFFF
-#endif
-
-#if (INT15PL >= INT8PL) || (INT15PL == 0)
-#define  MINT8_15PL   ~(1 << 14)
-#else
-#define  MINT8_15PL   0xFFFF
-#endif
-
-#if (INT16PL >= INT8PL) || (INT16PL == 0)
-#define  MINT8_16PL   ~(1 << 15)
-#else
-#define  MINT8_16PL   0xFFFF
-#endif
-
-#define  MINT8    (MINT8_1PL  & MINT8_2PL  & MINT8_3PL  & MINT8_4PL  & \
-                   MINT8_5PL  & MINT8_6PL  & MINT8_7PL  & MINT8_8PL  & \
-                   MINT8_9PL  & MINT8_10PL & MINT8_11PL & MINT8_12PL & \
-                   MINT8_13PL & MINT8_14PL & MINT8_15PL & MINT8_16PL)
-// End Of MINT8.
-
-// Beginning of MINT9:
-#if (INT1PL >= INT9PL) || (INT1PL == 0)
-#define  MINT9_1PL    ~(1 << 0)
-#else
-#define  MINT9_1PL    0xFFFF
-#endif
-
-#if (INT2PL >= INT9PL) || (INT2PL == 0)
-#define  MINT9_2PL   ~(1 << 1)
-#else
-#define  MINT9_2PL   0xFFFF
-#endif
-
-#if (INT3PL >= INT9PL) || (INT3PL == 0)
-#define  MINT9_3PL   ~(1 << 2)
-#else
-#define  MINT9_3PL   0xFFFF
-#endif
-
-#if (INT4PL >= INT9PL) || (INT4PL == 0)
-#define  MINT9_4PL   ~(1 << 3)
-#else
-#define  MINT9_4PL   0xFFFF
-#endif
-
-#if (INT5PL >= INT9PL) || (INT5PL == 0)
-#define  MINT9_5PL   ~(1 << 4)
-#else
-#define  MINT9_5PL   0xFFFF
-#endif
-
-#if (INT6PL >= INT9PL) || (INT6PL == 0)
-#define  MINT9_6PL   ~(1 << 5)
-#else
-#define  MINT9_6PL   0xFFFF
-#endif
-
-#if (INT7PL >= INT9PL) || (INT7PL == 0)
-#define  MINT9_7PL   ~(1 << 6)
-#else
-#define  MINT9_7PL   0xFFFF
-#endif
-
-#if (INT8PL >= INT9PL) || (INT8PL == 0)
-#define  MINT9_8PL   ~(1 << 7)
-#else
-#define  MINT9_8PL   0xFFFF
-#endif
-
-#if (INT9PL == 0)
-#define  MINT9_9PL   ~(1 << 8)
-#else
-#define  MINT9_9PL   0xFFFF
-#endif
-
-#if (INT10PL >= INT9PL) || (INT10PL == 0)
-#define  MINT9_10PL   ~(1 << 9)
-#else
-#define  MINT9_10PL   0xFFFF
-#endif
-
-#if (INT11PL >= INT9PL) || (INT11PL == 0)
-#define  MINT9_11PL   ~(1 << 10)
-#else
-#define  MINT9_11PL   0xFFFF
-#endif
-
-#if (INT12PL >= INT9PL) || (INT12PL == 0)
-#define  MINT9_12PL   ~(1 << 11)
-#else
-#define  MINT9_12PL   0xFFFF
-#endif
-
-#if (INT13PL >= INT9PL) || (INT13PL == 0)
-#define  MINT9_13PL   ~(1 << 12)
-#else
-#define  MINT9_13PL   0xFFFF
-#endif
-
-#if (INT14PL >= INT9PL) || (INT14PL == 0)
-#define  MINT9_14PL   ~(1 << 13)
-#else
-#define  MINT9_14PL   0xFFFF
-#endif
-
-#if (INT15PL >= INT9PL) || (INT15PL == 0)
-#define  MINT9_15PL   ~(1 << 14)
-#else
-#define  MINT9_15PL   0xFFFF
-#endif
-
-#if (INT16PL >= INT9PL) || (INT16PL == 0)
-#define  MINT9_16PL   ~(1 << 15)
-#else
-#define  MINT9_16PL   0xFFFF
-#endif
-
-#define  MINT9    (MINT9_1PL  & MINT9_2PL  & MINT9_3PL  & MINT9_4PL  & \
-                   MINT9_5PL  & MINT9_6PL  & MINT9_7PL  & MINT9_8PL  & \
-                   MINT9_9PL  & MINT9_10PL & MINT9_11PL & MINT9_12PL & \
-                   MINT9_13PL & MINT9_14PL & MINT9_15PL & MINT9_16PL)
-// End Of MINT9.
-
-// Beginning of MINT10:
-#if (INT1PL >= INT10PL) || (INT1PL == 0)
-#define  MINT10_1PL    ~(1 << 0)
-#else
-#define  MINT10_1PL    0xFFFF
-#endif
-
-#if (INT2PL >= INT10PL) || (INT2PL == 0)
-#define  MINT10_2PL   ~(1 << 1)
-#else
-#define  MINT10_2PL   0xFFFF
-#endif
-
-#if (INT3PL >= INT10PL) || (INT3PL == 0)
-#define  MINT10_3PL   ~(1 << 2)
-#else
-#define  MINT10_3PL   0xFFFF
-#endif
-
-#if (INT4PL >= INT10PL) || (INT4PL == 0)
-#define  MINT10_4PL   ~(1 << 3)
-#else
-#define  MINT10_4PL   0xFFFF
-#endif
-
-#if (INT5PL >= INT10PL) || (INT5PL == 0)
-#define  MINT10_5PL   ~(1 << 4)
-#else
-#define  MINT10_5PL   0xFFFF
-#endif
-
-#if (INT6PL >= INT10PL) || (INT6PL == 0)
-#define  MINT10_6PL   ~(1 << 5)
-#else
-#define  MINT10_6PL   0xFFFF
-#endif
-
-#if (INT7PL >= INT10PL) || (INT7PL == 0)
-#define  MINT10_7PL   ~(1 << 6)
-#else
-#define  MINT10_7PL   0xFFFF
-#endif
-
-#if (INT8PL >= INT10PL) || (INT8PL == 0)
-#define  MINT10_8PL   ~(1 << 7)
-#else
-#define  MINT10_8PL   0xFFFF
-#endif
-
-#if (INT9PL >= INT10PL) || (INT9PL == 0)
-#define  MINT10_9PL   ~(1 << 8)
-#else
-#define  MINT10_9PL   0xFFFF
-#endif
-
-#if (INT10PL == 0)
-#define  MINT10_10PL   ~(1 << 9)
-#else
-#define  MINT10_10PL   0xFFFF
-#endif
-
-#if (INT11PL >= INT10PL) || (INT11PL == 0)
-#define  MINT10_11PL   ~(1 << 10)
-#else
-#define  MINT10_11PL   0xFFFF
-#endif
-
-#if (INT12PL >= INT10PL) || (INT12PL == 0)
-#define  MINT10_12PL   ~(1 << 11)
-#else
-#define  MINT10_12PL   0xFFFF
-#endif
-
-#if (INT13PL >= INT10PL) || (INT13PL == 0)
-#define  MINT10_13PL   ~(1 << 12)
-#else
-#define  MINT10_13PL   0xFFFF
-#endif
-
-#if (INT14PL >= INT10PL) || (INT14PL == 0)
-#define  MINT10_14PL   ~(1 << 13)
-#else
-#define  MINT10_14PL   0xFFFF
-#endif
-
-#if (INT15PL >= INT10PL) || (INT15PL == 0)
-#define  MINT10_15PL   ~(1 << 14)
-#else
-#define  MINT10_15PL   0xFFFF
-#endif
-
-#if (INT16PL >= INT10PL) || (INT16PL == 0)
-#define  MINT10_16PL   ~(1 << 15)
-#else
-#define  MINT10_16PL   0xFFFF
-#endif
-
-#define  MINT10   (MINT10_1PL  & MINT10_2PL  & MINT10_3PL  & MINT10_4PL  & \
-                   MINT10_5PL  & MINT10_6PL  & MINT10_7PL  & MINT10_8PL  & \
-                   MINT10_9PL  & MINT10_10PL & MINT10_11PL & MINT10_12PL & \
-                   MINT10_13PL & MINT10_14PL & MINT10_15PL & MINT10_16PL)
-// End Of MINT10.
-
-// Beginning of MINT11:
-#if (INT1PL >= INT11PL) || (INT1PL == 0)
-#define  MINT11_1PL    ~(1 << 0)
-#else
-#define  MINT11_1PL    0xFFFF
-#endif
-
-#if (INT2PL >= INT11PL) || (INT2PL == 0)
-#define  MINT11_2PL   ~(1 << 1)
-#else
-#define  MINT11_2PL   0xFFFF
-#endif
-
-#if (INT3PL >= INT11PL) || (INT3PL == 0)
-#define  MINT11_3PL   ~(1 << 2)
-#else
-#define  MINT11_3PL   0xFFFF
-#endif
-
-#if (INT4PL >= INT11PL) || (INT4PL == 0)
-#define  MINT11_4PL   ~(1 << 3)
-#else
-#define  MINT11_4PL   0xFFFF
-#endif
-
-#if (INT5PL >= INT11PL) || (INT5PL == 0)
-#define  MINT11_5PL   ~(1 << 4)
-#else
-#define  MINT11_5PL   0xFFFF
-#endif
-
-#if (INT6PL >= INT11PL) || (INT6PL == 0)
-#define  MINT11_6PL   ~(1 << 5)
-#else
-#define  MINT11_6PL   0xFFFF
-#endif
-
-#if (INT7PL >= INT11PL) || (INT7PL == 0)
-#define  MINT11_7PL   ~(1 << 6)
-#else
-#define  MINT11_7PL   0xFFFF
-#endif
-
-#if (INT8PL >= INT11PL) || (INT8PL == 0)
-#define  MINT11_8PL   ~(1 << 7)
-#else
-#define  MINT11_8PL   0xFFFF
-#endif
-
-#if (INT9PL >= INT11PL) || (INT9PL == 0)
-#define  MINT11_9PL   ~(1 << 8)
-#else
-#define  MINT11_9PL   0xFFFF
-#endif
-
-#if (INT10PL >= INT11PL) || (INT10PL == 0)
-#define  MINT11_10PL   ~(1 << 9)
-#else
-#define  MINT11_10PL   0xFFFF
-#endif
-
-#if (INT11PL == 0)
-#define  MINT11_11PL   ~(1 << 10)
-#else
-#define  MINT11_11PL   0xFFFF
-#endif
-
-#if (INT12PL >= INT11PL) || (INT12PL == 0)
-#define  MINT11_12PL   ~(1 << 11)
-#else
-#define  MINT11_12PL   0xFFFF
-#endif
-
-#if (INT13PL >= INT11PL) || (INT13PL == 0)
-#define  MINT11_13PL   ~(1 << 12)
-#else
-#define  MINT11_13PL   0xFFFF
-#endif
-
-#if (INT14PL >= INT11PL) || (INT14PL == 0)
-#define  MINT11_14PL   ~(1 << 13)
-#else
-#define  MINT11_14PL   0xFFFF
-#endif
-
-#if (INT15PL >= INT11PL) || (INT15PL == 0)
-#define  MINT11_15PL   ~(1 << 14)
-#else
-#define  MINT11_15PL   0xFFFF
-#endif
-
-#if (INT16PL >= INT11PL) || (INT16PL == 0)
-#define  MINT11_16PL   ~(1 << 15)
-#else
-#define  MINT11_16PL   0xFFFF
-#endif
-
-#define  MINT11   (MINT11_1PL  & MINT11_2PL  & MINT11_3PL  & MINT11_4PL  & \
-                   MINT11_5PL  & MINT11_6PL  & MINT11_7PL  & MINT11_8PL  & \
-                   MINT11_9PL  & MINT11_10PL & MINT11_11PL & MINT11_12PL & \
-                   MINT11_13PL & MINT11_14PL & MINT11_15PL & MINT11_16PL)
-// End Of MINT11.
-
-// Beginning of MINT12:
-#if (INT1PL >= INT12PL) || (INT1PL == 0)
-#define  MINT12_1PL    ~(1 << 0)
-#else
-#define  MINT12_1PL    0xFFFF
-#endif
-
-#if (INT2PL >= INT12PL) || (INT2PL == 0)
-#define  MINT12_2PL   ~(1 << 1)
-#else
-#define  MINT12_2PL   0xFFFF
-#endif
-
-#if (INT3PL >= INT12PL) || (INT3PL == 0)
-#define  MINT12_3PL   ~(1 << 2)
-#else
-#define  MINT12_3PL   0xFFFF
-#endif
-
-#if (INT4PL >= INT12PL) || (INT4PL == 0)
-#define  MINT12_4PL   ~(1 << 3)
-#else
-#define  MINT12_4PL   0xFFFF
-#endif
-
-#if (INT5PL >= INT12PL) || (INT5PL == 0)
-#define  MINT12_5PL   ~(1 << 4)
-#else
-#define  MINT12_5PL   0xFFFF
-#endif
-
-#if (INT6PL >= INT12PL) || (INT6PL == 0)
-#define  MINT12_6PL   ~(1 << 5)
-#else
-#define  MINT12_6PL   0xFFFF
-#endif
-
-#if (INT7PL >= INT12PL) || (INT7PL == 0)
-#define  MINT12_7PL   ~(1 << 6)
-#else
-#define  MINT12_7PL   0xFFFF
-#endif
-
-#if (INT8PL >= INT12PL) || (INT8PL == 0)
-#define  MINT12_8PL   ~(1 << 7)
-#else
-#define  MINT12_8PL   0xFFFF
-#endif
-
-#if (INT9PL >= INT12PL) || (INT9PL == 0)
-#define  MINT12_9PL   ~(1 << 8)
-#else
-#define  MINT12_9PL   0xFFFF
-#endif
-
-#if (INT10PL >= INT12PL) || (INT10PL == 0)
-#define  MINT12_10PL   ~(1 << 9)
-#else
-#define  MINT12_10PL   0xFFFF
-#endif
-
-#if (INT11PL >= INT12PL) || (INT11PL == 0)
-#define  MINT12_11PL   ~(1 << 10)
-#else
-#define  MINT12_11PL   0xFFFF
-#endif
-
-#if (INT12PL == 0)
-#define  MINT12_12PL   ~(1 << 11)
-#else
-#define  MINT12_12PL   0xFFFF
-#endif
-
-#if (INT13PL >= INT12PL) || (INT13PL == 0)
-#define  MINT12_13PL   ~(1 << 12)
-#else
-#define  MINT12_13PL   0xFFFF
-#endif
-
-#if (INT14PL >= INT12PL) || (INT14PL == 0)
-#define  MINT12_14PL   ~(1 << 13)
-#else
-#define  MINT12_14PL   0xFFFF
-#endif
-
-#if (INT15PL >= INT12PL) || (INT15PL == 0)
-#define  MINT12_15PL   ~(1 << 14)
-#else
-#define  MINT12_15PL   0xFFFF
-#endif
-
-#if (INT16PL >= INT12PL) || (INT16PL == 0)
-#define  MINT12_16PL   ~(1 << 15)
-#else
-#define  MINT12_16PL   0xFFFF
-#endif
-
-#define  MINT12   (MINT12_1PL  & MINT12_2PL  & MINT12_3PL  & MINT12_4PL  & \
-                   MINT12_5PL  & MINT12_6PL  & MINT12_7PL  & MINT12_8PL  & \
-                   MINT12_9PL  & MINT12_10PL & MINT12_11PL & MINT12_12PL & \
-                   MINT12_13PL & MINT12_14PL & MINT12_15PL & MINT12_16PL)
-// End Of MINT12.
-
-// Beginning of MINT13:
-#if (INT1PL >= INT13PL) || (INT1PL == 0)
-#define  MINT13_1PL    ~(1 << 0)
-#else
-#define  MINT13_1PL    0xFFFF
-#endif
-
-#if (INT2PL >= INT13PL) || (INT2PL == 0)
-#define  MINT13_2PL   ~(1 << 1)
-#else
-#define  MINT13_2PL   0xFFFF
-#endif
-
-#if (INT3PL >= INT13PL) || (INT3PL == 0)
-#define  MINT13_3PL   ~(1 << 2)
-#else
-#define  MINT13_3PL   0xFFFF
-#endif
-
-#if (INT4PL >= INT13PL) || (INT4PL == 0)
-#define  MINT13_4PL   ~(1 << 3)
-#else
-#define  MINT13_4PL   0xFFFF
-#endif
-
-#if (INT5PL >= INT13PL) || (INT5PL == 0)
-#define  MINT13_5PL   ~(1 << 4)
-#else
-#define  MINT13_5PL   0xFFFF
-#endif
-
-#if (INT6PL >= INT13PL) || (INT6PL == 0)
-#define  MINT13_6PL   ~(1 << 5)
-#else
-#define  MINT13_6PL   0xFFFF
-#endif
-
-#if (INT7PL >= INT13PL) || (INT7PL == 0)
-#define  MINT13_7PL   ~(1 << 6)
-#else
-#define  MINT13_7PL   0xFFFF
-#endif
-
-#if (INT8PL >= INT13PL) || (INT8PL == 0)
-#define  MINT13_8PL   ~(1 << 7)
-#else
-#define  MINT13_8PL   0xFFFF
-#endif
-
-#if (INT9PL >= INT13PL) || (INT9PL == 0)
-#define  MINT13_9PL   ~(1 << 8)
-#else
-#define  MINT13_9PL   0xFFFF
-#endif
-
-#if (INT10PL >= INT13PL) || (INT10PL == 0)
-#define  MINT13_10PL   ~(1 << 9)
-#else
-#define  MINT13_10PL   0xFFFF
-#endif
-
-#if (INT11PL >= INT13PL) || (INT11PL == 0)
-#define  MINT13_11PL   ~(1 << 10)
-#else
-#define  MINT13_11PL   0xFFFF
-#endif
-
-#define  MINT13_12PL   ~(1 << 11)
-
-#if (INT13PL == 0)
-#define  MINT13_13PL   ~(1 << 12)
-#else
-#define  MINT13_13PL   0xFFFF
-#endif
-
-#if (INT14PL >= INT13PL) || (INT14PL == 0)
-#define  MINT13_14PL   ~(1 << 13)
-#else
-#define  MINT13_14PL   0xFFFF
-#endif
-
-#if (INT15PL >= INT13PL) || (INT15PL == 0)
-#define  MINT13_15PL   ~(1 << 14)
-#else
-#define  MINT13_15PL   0xFFFF
-#endif
-
-#if (INT16PL >= INT13PL) || (INT16PL == 0)
-#define  MINT13_16PL   ~(1 << 15)
-#else
-#define  MINT13_16PL   0xFFFF
-#endif
-
-#define  MINT13   (MINT13_1PL  & MINT13_2PL  & MINT13_3PL  & MINT13_4PL  & \
-                   MINT13_5PL  & MINT13_6PL  & MINT13_7PL  & MINT13_8PL  & \
-                   MINT13_9PL  & MINT13_10PL & MINT13_11PL & MINT13_12PL & \
-                   MINT13_13PL & MINT13_14PL & MINT13_15PL & MINT13_16PL)
-// End Of MINT13.
-
-// Beginning of MINT14:
-#if (INT1PL >= INT14PL) || (INT1PL == 0)
-#define  MINT14_1PL    ~(1 << 0)
-#else
-#define  MINT14_1PL    0xFFFF
-#endif
-
-#if (INT2PL >= INT14PL) || (INT2PL == 0)
-#define  MINT14_2PL   ~(1 << 1)
-#else
-#define  MINT14_2PL   0xFFFF
-#endif
-
-#if (INT3PL >= INT14PL) || (INT3PL == 0)
-#define  MINT14_3PL   ~(1 << 2)
-#else
-#define  MINT14_3PL   0xFFFF
-#endif
-
-#if (INT4PL >= INT14PL) || (INT4PL == 0)
-#define  MINT14_4PL   ~(1 << 3)
-#else
-#define  MINT14_4PL   0xFFFF
-#endif
-
-#if (INT5PL >= INT14PL) || (INT5PL == 0)
-#define  MINT14_5PL   ~(1 << 4)
-#else
-#define  MINT14_5PL   0xFFFF
-#endif
-
-#if (INT6PL >= INT14PL) || (INT6PL == 0)
-#define  MINT14_6PL   ~(1 << 5)
-#else
-#define  MINT14_6PL   0xFFFF
-#endif
-
-#if (INT7PL >= INT14PL) || (INT7PL == 0)
-#define  MINT14_7PL   ~(1 << 6)
-#else
-#define  MINT14_7PL   0xFFFF
-#endif
-
-#if (INT8PL >= INT14PL) || (INT8PL == 0)
-#define  MINT14_8PL   ~(1 << 7)
-#else
-#define  MINT14_8PL   0xFFFF
-#endif
-
-#if (INT9PL >= INT14PL) || (INT9PL == 0)
-#define  MINT14_9PL   ~(1 << 8)
-#else
-#define  MINT14_9PL   0xFFFF
-#endif
-
-#if (INT10PL >= INT14PL) || (INT10PL == 0)
-#define  MINT14_10PL   ~(1 << 9)
-#else
-#define  MINT14_10PL   0xFFFF
-#endif
-
-#if (INT11PL >= INT14PL) || (INT11PL == 0)
-#define  MINT14_11PL   ~(1 << 10)
-#else
-#define  MINT14_11PL   0xFFFF
-#endif
-
-#if (INT12PL >= INT14PL) || (INT12PL == 0)
-#define  MINT14_12PL   ~(1 << 11)
-#else
-#define  MINT14_12PL   0xFFFF
-#endif
-
-#if (INT13PL >= INT14PL) || (INT13PL == 0)
-#define  MINT14_13PL   ~(1 << 12)
-#else
-#define  MINT14_13PL   0xFFFF
-#endif
-
-#define  MINT14_14PL   ~(1 << 13)
-
-#if (INT15PL >= INT14PL) || (INT15PL == 0)
-#define  MINT14_15PL   ~(1 << 14)
-#else
-#define  MINT14_15PL   0xFFFF
-#endif
-
-#if (INT16PL >= INT14PL) || (INT16PL == 0)
-#define  MINT14_16PL   ~(1 << 15)
-#else
-#define  MINT14_16PL   0xFFFF
-#endif
-
-#define  MINT14   (MINT14_1PL  & MINT14_2PL  & MINT14_3PL  & MINT14_4PL  & \
-                   MINT14_5PL  & MINT14_6PL  & MINT14_7PL  & MINT14_8PL  & \
-                   MINT14_9PL  & MINT14_10PL & MINT14_11PL & MINT14_12PL & \
-                   MINT14_13PL & MINT14_14PL & MINT14_15PL & MINT14_16PL)
-// End Of MINT14.
-
-// Beginning of MINT15:
-#if (INT1PL >= INT15PL) || (INT1PL == 0)
-#define  MINT15_1PL    ~(1 << 0)
-#else
-#define  MINT15_1PL    0xFFFF
-#endif
-
-#if (INT2PL >= INT15PL) || (INT2PL == 0)
-#define  MINT15_2PL   ~(1 << 1)
-#else
-#define  MINT15_2PL   0xFFFF
-#endif
-
-#if (INT3PL >= INT15PL) || (INT3PL == 0)
-#define  MINT15_3PL   ~(1 << 2)
-#else
-#define  MINT15_3PL   0xFFFF
-#endif
-
-#if (INT4PL >= INT15PL) || (INT4PL == 0)
-#define  MINT15_4PL   ~(1 << 3)
-#else
-#define  MINT15_4PL   0xFFFF
-#endif
-
-#if (INT5PL >= INT15PL) || (INT5PL == 0)
-#define  MINT15_5PL   ~(1 << 4)
-#else
-#define  MINT15_5PL   0xFFFF
-#endif
-
-#if (INT6PL >= INT15PL) || (INT6PL == 0)
-#define  MINT15_6PL   ~(1 << 5)
-#else
-#define  MINT15_6PL   0xFFFF
-#endif
-
-#if (INT7PL >= INT15PL) || (INT7PL == 0)
-#define  MINT15_7PL   ~(1 << 6)
-#else
-#define  MINT15_7PL   0xFFFF
-#endif
-
-#if (INT8PL >= INT15PL) || (INT8PL == 0)
-#define  MINT15_8PL   ~(1 << 7)
-#else
-#define  MINT15_8PL   0xFFFF
-#endif
-
-#if (INT9PL >= INT15PL) || (INT9PL == 0)
-#define  MINT15_9PL   ~(1 << 8)
-#else
-#define  MINT15_9PL   0xFFFF
-#endif
-
-#if (INT10PL >= INT15PL) || (INT10PL == 0)
-#define  MINT15_10PL   ~(1 << 9)
-#else
-#define  MINT15_10PL   0xFFFF
-#endif
-
-#if (INT11PL >= INT15PL) || (INT11PL == 0)
-#define  MINT15_11PL   ~(1 << 10)
-#else
-#define  MINT15_11PL   0xFFFF
-#endif
-
-#if (INT12PL >= INT15PL) || (INT12PL == 0)
-#define  MINT15_12PL   ~(1 << 11)
-#else
-#define  MINT15_12PL   0xFFFF
-#endif
-
-#if (INT13PL >= INT15PL) || (INT13PL == 0)
-#define  MINT15_13PL   ~(1 << 12)
-#else
-#define  MINT15_13PL   0xFFFF
-#endif
-
-#if (INT14PL >= INT15PL) || (INT14PL == 0)
-#define  MINT15_14PL   ~(1 << 13)
-#else
-#define  MINT15_14PL   0xFFFF
-#endif
-
-#define  MINT15_15PL   ~(1 << 14)
-
-#if (INT16PL >= INT15PL) || (INT16PL == 0)
-#define  MINT15_16PL   ~(1 << 15)
-#else
-#define  MINT15_16PL   0xFFFF
-#endif
-
-#define  MINT15   (MINT15_1PL  & MINT15_2PL  & MINT15_3PL  & MINT15_4PL  & \
-                   MINT15_5PL  & MINT15_6PL  & MINT15_7PL  & MINT15_8PL  & \
-                   MINT15_9PL  & MINT15_10PL & MINT15_11PL & MINT15_12PL & \
-                   MINT15_13PL & MINT15_14PL & MINT15_15PL & MINT15_16PL)
-// End Of MINT15.
-
-// Beginning of MINT16:
-#if (INT1PL >= INT16PL) || (INT1PL == 0)
-#define  MINT16_1PL    ~(1 << 0)
-#else
-#define  MINT16_1PL    0xFFFF
-#endif
-
-#if (INT2PL >= INT16PL) || (INT2PL == 0)
-#define  MINT16_2PL   ~(1 << 1)
-#else
-#define  MINT16_2PL   0xFFFF
-#endif
-
-#if (INT3PL >= INT16PL) || (INT3PL == 0)
-#define  MINT16_3PL   ~(1 << 2)
-#else
-#define  MINT16_3PL   0xFFFF
-#endif
-
-#if (INT4PL >= INT16PL) || (INT4PL == 0)
-#define  MINT16_4PL   ~(1 << 3)
-#else
-#define  MINT16_4PL   0xFFFF
-#endif
-
-#if (INT5PL >= INT16PL) || (INT5PL == 0)
-#define  MINT16_5PL   ~(1 << 4)
-#else
-#define  MINT16_5PL   0xFFFF
-#endif
-
-#if (INT6PL >= INT16PL) || (INT6PL == 0)
-#define  MINT16_6PL   ~(1 << 5)
-#else
-#define  MINT16_6PL   0xFFFF
-#endif
-
-#if (INT7PL >= INT16PL) || (INT7PL == 0)
-#define  MINT16_7PL   ~(1 << 6)
-#else
-#define  MINT16_7PL   0xFFFF
-#endif
-
-#if (INT8PL >= INT16PL) || (INT8PL == 0)
-#define  MINT16_8PL   ~(1 << 7)
-#else
-#define  MINT16_8PL   0xFFFF
-#endif
-
-#if (INT9PL >= INT16PL) || (INT9PL == 0)
-#define  MINT16_9PL   ~(1 << 8)
-#else
-#define  MINT16_9PL   0xFFFF
-#endif
-
-#if (INT10PL >= INT16PL) || (INT10PL == 0)
-#define  MINT16_10PL   ~(1 << 9)
-#else
-#define  MINT16_10PL   0xFFFF
-#endif
-
-#if (INT11PL >= INT16PL) || (INT11PL == 0)
-#define  MINT16_11PL   ~(1 << 10)
-#else
-#define  MINT16_11PL   0xFFFF
-#endif
-
-#if (INT12PL >= INT16PL) || (INT12PL == 0)
-#define  MINT16_12PL   ~(1 << 11)
-#else
-#define  MINT16_12PL   0xFFFF
-#endif
-
-#if (INT13PL >= INT16PL) || (INT13PL == 0)
-#define  MINT16_13PL   ~(1 << 12)
-#else
-#define  MINT16_13PL   0xFFFF
-#endif
-
-#if (INT14PL >= INT16PL) || (INT14PL == 0)
-#define  MINT16_14PL   ~(1 << 13)
-#else
-#define  MINT16_14PL   0xFFFF
-#endif
-
-#if (INT15PL >= INT16PL) || (INT15PL == 0)
-#define  MINT16_15PL   ~(1 << 14)
-#else
-#define  MINT16_15PL   0xFFFF
-#endif
-
-#define  MINT16_16PL   ~(1 << 15)
-
-#define  MINT16   (MINT16_1PL  & MINT16_2PL  & MINT16_3PL  & MINT16_4PL  & \
-                   MINT16_5PL  & MINT16_6PL  & MINT16_7PL  & MINT16_8PL  & \
-                   MINT16_9PL  & MINT16_10PL & MINT16_11PL & MINT16_12PL & \
-                   MINT16_13PL & MINT16_14PL & MINT16_15PL & MINT16_16PL)
-// End Of MINT16.
-
-//-------------------------------------------------------------------------------
-// Automatically generate PIEIER1 interrupt masks MG11 to MG18:
-
-// Beginning of MG11:
-#if (G12PL >= G11PL) || (G12PL == 0)
-#define  MG11_12PL   ~(1 << 1)
-#else
-#define  MG11_12PL   0xFFFF
-#endif
-
-#if (G13PL >= G11PL) || (G13PL == 0)
-#define  MG11_13PL   ~(1 << 2)
-#else
-#define  MG11_13PL   0xFFFF
-#endif
-
-#if (G14PL >= G11PL) || (G14PL == 0)
-#define  MG11_14PL   ~(1 << 3)
-#else
-#define  MG11_14PL   0xFFFF
-#endif
-
-#if (G15PL >= G11PL) || (G15PL == 0)
-#define  MG11_15PL   ~(1 << 4)
-#else
-#define  MG11_15PL   0xFFFF
-#endif
-
-#if (G16PL >= G11PL) || (G16PL == 0)
-#define  MG11_16PL   ~(1 << 5)
-#else
-#define  MG11_16PL   0xFFFF
-#endif
-
-#if (G17PL >= G11PL) || (G17PL == 0)
-#define  MG11_17PL   ~(1 << 6)
-#else
-#define  MG11_17PL   0xFFFF
-#endif
-
-#if (G18PL >= G11PL) || (G18PL == 0)
-#define  MG11_18PL   ~(1 << 7)
-#else
-#define  MG11_18PL   0xFFFF
-#endif
-
-#define  MG11_11PL   0x00FE
-#define  MG11    (MG11_11PL & MG11_12PL & MG11_13PL & MG11_14PL & \
-                  MG11_15PL & MG11_16PL & MG11_17PL & MG11_18PL)
-// End of MG11:
-
-// Beginning of MG12:
-#if (G11PL >= G12PL) || (G11PL == 0)
-#define  MG12_11PL   ~(1)
-#else
-#define  MG12_11PL   0xFFFF
-#endif
-#if (G13PL >= G12PL) || (G13PL == 0)
-#define  MG12_13PL   ~(1 << 2)
-#else
-#define  MG12_13PL   0xFFFF
-#endif
-#if (G14PL >= G12PL) || (G14PL == 0)
-#define  MG12_14PL   ~(1 << 3)
-#else
-#define  MG12_14PL   0xFFFF
-#endif
-#if (G15PL >= G12PL) || (G15PL == 0)
-#define  MG12_15PL   ~(1 << 4)
-#else
-#define  MG12_15PL   0xFFFF
-#endif
-#if (G16PL >= G12PL) || (G16PL == 0)
-#define  MG12_16PL   ~(1 << 5)
-#else
-#define  MG12_16PL   0xFFFF
-#endif
-#if (G17PL >= G12PL) || (G17PL == 0)
-#define  MG12_17PL   ~(1 << 6)
-#else
-#define  MG12_17PL   0xFFFF
-#endif
-#if (G18PL >= G12PL) || (G18PL == 0)
-#define  MG12_18PL   ~(1 << 7)
-#else
-#define  MG12_18PL   0xFFFF
-#endif
-#define  MG12_12PL   0x00FD
-#define  MG12    (MG12_11PL & MG12_12PL & MG12_13PL & MG12_14PL & \
-                  MG12_15PL & MG12_16PL & MG12_17PL & MG12_18PL)
-// End of MG12:
-
-// Beginning of MG13:
-#if (G11PL >= G13PL) || (G11PL == 0)
-#define  MG13_11PL   ~(1)
-#else
-#define  MG13_11PL   0xFFFF
-#endif
-#if (G12PL >= G13PL) || (G12PL == 0)
-#define  MG13_12PL   ~(1 << 1)
-#else
-#define  MG13_12PL   0xFFFF
-#endif
-#if (G14PL >= G13PL) || (G14PL == 0)
-#define  MG13_14PL   ~(1 << 3)
-#else
-#define  MG13_14PL   0xFFFF
-#endif
-#if (G15PL >= G13PL) || (G15PL == 0)
-#define  MG13_15PL   ~(1 << 4)
-#else
-#define  MG13_15PL   0xFFFF
-#endif
-#if (G16PL >= G13PL) || (G16PL == 0)
-#define  MG13_16PL   ~(1 << 5)
-#else
-#define  MG13_16PL   0xFFFF
-#endif
-#if (G17PL >= G13PL) || (G17PL == 0)
-#define  MG13_17PL   ~(1 << 6)
-#else
-#define  MG13_17PL   0xFFFF
-#endif
-#if (G18PL >= G13PL) || (G18PL == 0)
-#define  MG13_18PL   ~(1 << 7)
-#else
-#define  MG13_18PL   0xFFFF
-#endif
-#define  MG13_13PL   0x00FB
-#define  MG13    (MG13_11PL & MG13_12PL & MG13_13PL & MG13_14PL & \
-                  MG13_15PL & MG13_16PL & MG13_17PL & MG13_18PL)
-// End of MG13:
-
-// Beginning of MG14:
-#if (G11PL >= G14PL) || (G11PL == 0)
-#define  MG14_11PL   ~(1)
-#else
-#define  MG14_11PL   0xFFFF
-#endif
-#if (G12PL >= G14PL) || (G12PL == 0)
-#define  MG14_12PL   ~(1 << 1)
-#else
-#define  MG14_12PL   0xFFFF
-#endif
-#if (G13PL >= G14PL) || (G13PL == 0)
-#define  MG14_13PL   ~(1 << 2)
-#else
-#define  MG14_13PL   0xFFFF
-#endif
-#if (G15PL >= G14PL) || (G15PL == 0)
-#define  MG14_15PL   ~(1 << 4)
-#else
-#define  MG14_15PL   0xFFFF
-#endif
-#if (G16PL >= G14PL) || (G16PL == 0)
-#define  MG14_16PL   ~(1 << 5)
-#else
-#define  MG14_16PL   0xFFFF
-#endif
-#if (G17PL >= G14PL) || (G17PL == 0)
-#define  MG14_17PL   ~(1 << 6)
-#else
-#define  MG14_17PL   0xFFFF
-#endif
-#if (G18PL >= G14PL) || (G18PL == 0)
-#define  MG14_18PL   ~(1 << 7)
-#else
-#define  MG14_18PL   0xFFFF
-#endif
-#define  MG14_14PL   0x00F7
-#define  MG14    (MG14_11PL & MG14_12PL & MG14_13PL & MG14_14PL & \
-                  MG14_15PL & MG14_16PL & MG14_17PL & MG14_18PL)
-// End of MG14:
-
-// Beginning of MG15:
-#if (G11PL >= G15PL) || (G11PL == 0)
-#define  MG15_11PL   ~(1)
-#else
-#define  MG15_11PL   0xFFFF
-#endif
-#if (G12PL >= G15PL) || (G12PL == 0)
-#define  MG15_12PL   ~(1 << 1)
-#else
-#define  MG15_12PL   0xFFFF
-#endif
-#if (G13PL >= G15PL) || (G13PL == 0)
-#define  MG15_13PL   ~(1 << 2)
-#else
-#define  MG15_13PL   0xFFFF
-#endif
-#if (G14PL >= G15PL) || (G14PL == 0)
-#define  MG15_14PL   ~(1 << 3)
-#else
-#define  MG15_14PL   0xFFFF
-#endif
-#if (G16PL >= G15PL) || (G16PL == 0)
-#define  MG15_16PL   ~(1 << 5)
-#else
-#define  MG15_16PL   0xFFFF
-#endif
-#if (G17PL >= G15PL) || (G17PL == 0)
-#define  MG15_17PL   ~(1 << 6)
-#else
-#define  MG15_17PL   0xFFFF
-#endif
-#if (G18PL >= G15PL) || (G18PL == 0)
-#define  MG15_18PL   ~(1 << 7)
-#else
-#define  MG15_18PL   0xFFFF
-#endif
-#define  MG15_15PL   0x00EF
-#define  MG15    (MG15_11PL & MG15_12PL & MG15_13PL & MG15_14PL & \
-                  MG15_15PL & MG15_16PL & MG15_17PL & MG15_18PL)
-// End of MG15:
-
-// Beginning of MG16:
-#if (G11PL >= G16PL) || (G11PL == 0)
-#define  MG16_11PL   ~(1)
-#else
-#define  MG16_11PL   0xFFFF
-#endif
-#if (G12PL >= G16PL) || (G12PL == 0)
-#define  MG16_12PL   ~(1 << 1)
-#else
-#define  MG16_12PL   0xFFFF
-#endif
-#if (G13PL >= G16PL) || (G13PL == 0)
-#define  MG16_13PL   ~(1 << 2)
-#else
-#define  MG16_13PL   0xFFFF
-#endif
-#if (G14PL >= G16PL) || (G14PL == 0)
-#define  MG16_14PL   ~(1 << 3)
-#else
-#define  MG16_14PL   0xFFFF
-#endif
-#if (G15PL >= G16PL) || (G15PL == 0)
-#define  MG16_15PL   ~(1 << 4)
-#else
-#define  MG16_15PL   0xFFFF
-#endif
-#if (G17PL >= G16PL) || (G17PL == 0)
-#define  MG16_17PL   ~(1 << 6)
-#else
-#define  MG16_17PL   0xFFFF
-#endif
-#if (G18PL >= G16PL) || (G18PL == 0)
-#define  MG16_18PL   ~(1 << 7)
-#else
-#define  MG16_18PL   0xFFFF
-#endif
-#define  MG16_16PL   0x00DF
-#define  MG16    (MG16_11PL & MG16_12PL & MG16_13PL & MG16_14PL & \
-                  MG16_15PL & MG16_16PL & MG16_17PL & MG16_18PL)
-// End of MG16:
-
-// Beginning of MG17:
-#if (G11PL >= G17PL) || (G11PL == 0)
-#define  MG17_11PL   ~(1)
-#else
-#define  MG17_11PL   0xFFFF
-#endif
-#if (G12PL >= G17PL) || (G12PL == 0)
-#define  MG17_12PL   ~(1 << 1)
-#else
-#define  MG17_12PL   0xFFFF
-#endif
-#if (G13PL >= G17PL) || (G13PL == 0)
-#define  MG17_13PL   ~(1 << 2)
-#else
-#define  MG17_13PL   0xFFFF
-#endif
-#if (G14PL >= G17PL) || (G14PL == 0)
-#define  MG17_14PL   ~(1 << 3)
-#else
-#define  MG17_14PL   0xFFFF
-#endif
-#if (G15PL >= G17PL) || (G15PL == 0)
-#define  MG17_15PL   ~(1 << 4)
-#else
-#define  MG17_15PL   0xFFFF
-#endif
-#if (G16PL >= G17PL) || (G16PL == 0)
-#define  MG17_16PL   ~(1 << 5)
-#else
-#define  MG17_16PL   0xFFFF
-#endif
-#if (G18PL >= G17PL) || (G18PL == 0)
-#define  MG17_18PL   ~(1 << 7)
-#else
-#define  MG17_18PL   0xFFFF
-#endif
-#define  MG17_17PL   0x00BF
-#define  MG17    (MG17_11PL & MG17_12PL & MG17_13PL & MG17_14PL & \
-                  MG17_15PL & MG17_16PL & MG17_17PL & MG17_18PL)
-// End of MG17:
-
-// Beginning of MG18:
-#if (G11PL >= G18PL) || (G11PL == 0)
-#define  MG18_11PL   ~(1)
-#else
-#define  MG18_11PL   0xFFFF
-#endif
-#if (G12PL >= G18PL) || (G12PL == 0)
-#define  MG18_12PL   ~(1 << 1)
-#else
-#define  MG18_12PL   0xFFFF
-#endif
-#if (G13PL >= G18PL) || (G13PL == 0)
-#define  MG18_13PL   ~(1 << 2)
-#else
-#define  MG18_13PL   0xFFFF
-#endif
-#if (G14PL >= G18PL) || (G14PL == 0)
-#define  MG18_14PL   ~(1 << 3)
-#else
-#define  MG18_14PL   0xFFFF
-#endif
-#if (G15PL >= G18PL) || (G15PL == 0)
-#define  MG18_15PL   ~(1 << 4)
-#else
-#define  MG18_15PL   0xFFFF
-#endif
-#if (G16PL >= G18PL) || (G16PL == 0)
-#define  MG18_16PL   ~(1 << 5)
-#else
-#define  MG18_16PL   0xFFFF
-#endif
-#if (G17PL >= G18PL) || (G17PL == 0)
-#define  MG18_17PL   ~(1 << 6)
-#else
-#define  MG18_17PL   0xFFFF
-#endif
-#define  MG18_18PL   0x007F
-#define  MG18    (MG18_11PL & MG18_12PL & MG18_13PL & MG18_14PL & \
-                  MG18_15PL & MG18_16PL & MG18_17PL & MG18_18PL)
-// End of MG18:
-
-//-------------------------------------------------------------------------------
-// Automatically generate PIEIER1 interrupt masks MG21 to MG28:
-//
-
-// Beginning of MG21:
-#if (G22PL >= G21PL) || (G22PL == 0)
-#define  MG21_12PL   ~(1 << 1)
-#else
-#define  MG21_12PL   0xFFFF
-#endif
-#if (G23PL >= G21PL) || (G23PL == 0)
-#define  MG21_13PL   ~(1 << 2)
-#else
-#define  MG21_13PL   0xFFFF
-#endif
-#if (G24PL >= G21PL) || (G24PL == 0)
-#define  MG21_14PL   ~(1 << 3)
-#else
-#define  MG21_14PL   0xFFFF
-#endif
-#if (G25PL >= G21PL) || (G25PL == 0)
-#define  MG21_15PL   ~(1 << 4)
-#else
-#define  MG21_15PL   0xFFFF
-#endif
-#if (G26PL >= G21PL) || (G26PL == 0)
-#define  MG21_16PL   ~(1 << 5)
-#else
-#define  MG21_16PL   0xFFFF
-#endif
-#if (G27PL >= G21PL) || (G27PL == 0)
-#define  MG21_17PL   ~(1 << 6)
-#else
-#define  MG21_17PL   0xFFFF
-#endif
-#if (G28PL >= G21PL) || (G28PL == 0)
-#define  MG21_18PL   ~(1 << 7)
-#else
-#define  MG21_18PL   0xFFFF
-#endif
-#define  MG21_11PL   0x00FE
-#define  MG21    (MG21_11PL & MG21_12PL & MG21_13PL & MG21_14PL & \
-                  MG21_15PL & MG21_16PL & MG21_17PL & MG21_18PL)
-// End of MG21:
-
-// Beginning of MG22:
-#if (G21PL >= G22PL) || (G21PL == 0)
-#define  MG22_11PL   ~(1)
-#else
-#define  MG22_11PL   0xFFFF
-#endif
-#if (G23PL >= G22PL) || (G23PL == 0)
-#define  MG22_13PL   ~(1 << 2)
-#else
-#define  MG22_13PL   0xFFFF
-#endif
-#if (G24PL >= G22PL) || (G24PL == 0)
-#define  MG22_14PL   ~(1 << 3)
-#else
-#define  MG22_14PL   0xFFFF
-#endif
-#if (G25PL >= G22PL) || (G25PL == 0)
-#define  MG22_15PL   ~(1 << 4)
-#else
-#define  MG22_15PL   0xFFFF
-#endif
-#if (G26PL >= G22PL) || (G26PL == 0)
-#define  MG22_16PL   ~(1 << 5)
-#else
-#define  MG22_16PL   0xFFFF
-#endif
-#if (G27PL >= G22PL) || (G27PL == 0)
-#define  MG22_17PL   ~(1 << 6)
-#else
-#define  MG22_17PL   0xFFFF
-#endif
-#if (G28PL >= G22PL) || (G28PL == 0)
-#define  MG22_18PL   ~(1 << 7)
-#else
-#define  MG22_18PL   0xFFFF
-#endif
-#define  MG22_12PL   0x00FD
-#define  MG22    (MG22_11PL & MG22_12PL & MG22_13PL & MG22_14PL & \
-                  MG22_15PL & MG22_16PL & MG22_17PL & MG22_18PL)
-// End of MG22:
-
-// Beginning of MG23:
-#if (G21PL >= G23PL) || (G21PL == 0)
-#define  MG23_11PL   ~(1)
-#else
-#define  MG23_11PL   0xFFFF
-#endif
-#if (G22PL >= G23PL) || (G22PL == 0)
-#define  MG23_12PL   ~(1 << 1)
-#else
-#define  MG23_12PL   0xFFFF
-#endif
-#if (G24PL >= G23PL) || (G24PL == 0)
-#define  MG23_14PL   ~(1 << 3)
-#else
-#define  MG23_14PL   0xFFFF
-#endif
-#if (G25PL >= G23PL) || (G25PL == 0)
-#define  MG23_15PL   ~(1 << 4)
-#else
-#define  MG23_15PL   0xFFFF
-#endif
-#if (G26PL >= G23PL) || (G26PL == 0)
-#define  MG23_16PL   ~(1 << 5)
-#else
-#define  MG23_16PL   0xFFFF
-#endif
-#if (G27PL >= G23PL) || (G27PL == 0)
-#define  MG23_17PL   ~(1 << 6)
-#else
-#define  MG23_17PL   0xFFFF
-#endif
-#if (G28PL >= G23PL) || (G28PL == 0)
-#define  MG23_18PL   ~(1 << 7)
-#else
-#define  MG23_18PL   0xFFFF
-#endif
-#define  MG23_13PL   0x00FB
-#define  MG23    (MG23_11PL & MG23_12PL & MG23_13PL & MG23_14PL & \
-                  MG23_15PL & MG23_16PL & MG23_17PL & MG23_18PL)
-// End of MG23:
-
-// Beginning of MG24:
-#if (G21PL >= G24PL) || (G21PL == 0)
-#define  MG24_11PL   ~(1)
-#else
-#define  MG24_11PL   0xFFFF
-#endif
-#if (G22PL >= G24PL) || (G22PL == 0)
-#define  MG24_12PL   ~(1 << 1)
-#else
-#define  MG24_12PL   0xFFFF
-#endif
-#if (G23PL >= G24PL) || (G23PL == 0)
-#define  MG24_13PL   ~(1 << 2)
-#else
-#define  MG24_13PL   0xFFFF
-#endif
-#if (G25PL >= G24PL) || (G25PL == 0)
-#define  MG24_15PL   ~(1 << 4)
-#else
-#define  MG24_15PL   0xFFFF
-#endif
-#if (G26PL >= G24PL) || (G26PL == 0)
-#define  MG24_16PL   ~(1 << 5)
-#else
-#define  MG24_16PL   0xFFFF
-#endif
-#if (G27PL >= G24PL) || (G27PL == 0)
-#define  MG24_17PL   ~(1 << 6)
-#else
-#define  MG24_17PL   0xFFFF
-#endif
-#if (G28PL >= G24PL) || (G28PL == 0)
-#define  MG24_18PL   ~(1 << 7)
-#else
-#define  MG24_18PL   0xFFFF
-#endif
-#define  MG24_14PL   0x00F7
-#define  MG24    (MG24_11PL & MG24_12PL & MG24_13PL & MG24_14PL & \
-                  MG24_15PL & MG24_16PL & MG24_17PL & MG24_18PL)
-// End of MG24:
-
-// Beginning of MG25:
-#if (G21PL >= G25PL) || (G21PL == 0)
-#define  MG25_11PL   ~(1)
-#else
-#define  MG25_11PL   0xFFFF
-#endif
-#if (G22PL >= G25PL) || (G22PL == 0)
-#define  MG25_12PL   ~(1 << 1)
-#else
-#define  MG25_12PL   0xFFFF
-#endif
-#if (G23PL >= G25PL) || (G23PL == 0)
-#define  MG25_13PL   ~(1 << 2)
-#else
-#define  MG25_13PL   0xFFFF
-#endif
-#if (G24PL >= G25PL) || (G24PL == 0)
-#define  MG25_14PL   ~(1 << 3)
-#else
-#define  MG25_14PL   0xFFFF
-#endif
-#if (G26PL >= G25PL) || (G26PL == 0)
-#define  MG25_16PL   ~(1 << 5)
-#else
-#define  MG25_16PL   0xFFFF
-#endif
-#if (G27PL >= G25PL) || (G27PL == 0)
-#define  MG25_17PL   ~(1 << 6)
-#else
-#define  MG25_17PL   0xFFFF
-#endif
-#if (G28PL >= G25PL) || (G28PL == 0)
-#define  MG25_18PL   ~(1 << 7)
-#else
-#define  MG25_18PL   0xFFFF
-#endif
-#define  MG25_15PL   0x00EF
-#define  MG25    (MG25_11PL & MG25_12PL & MG25_13PL & MG25_14PL & \
-                  MG25_15PL & MG25_16PL & MG25_17PL & MG25_18PL)
-// End of MG25:
-
-// Beginning of MG26:
-#if (G21PL >= G26PL) || (G21PL == 0)
-#define  MG26_11PL   ~(1)
-#else
-#define  MG26_11PL   0xFFFF
-#endif
-#if (G22PL >= G26PL) || (G22PL == 0)
-#define  MG26_12PL   ~(1 << 1)
-#else
-#define  MG26_12PL   0xFFFF
-#endif
-#if (G23PL >= G26PL) || (G23PL == 0)
-#define  MG26_13PL   ~(1 << 2)
-#else
-#define  MG26_13PL   0xFFFF
-#endif
-#if (G24PL >= G26PL) || (G24PL == 0)
-#define  MG26_14PL   ~(1 << 3)
-#else
-#define  MG26_14PL   0xFFFF
-#endif
-#if (G25PL >= G26PL) || (G25PL == 0)
-#define  MG26_15PL   ~(1 << 4)
-#else
-#define  MG26_15PL   0xFFFF
-#endif
-#if (G27PL >= G26PL) || (G27PL == 0)
-#define  MG26_17PL   ~(1 << 6)
-#else
-#define  MG26_17PL   0xFFFF
-#endif
-#if (G28PL >= G26PL) || (G28PL == 0)
-#define  MG26_18PL   ~(1 << 7)
-#else
-#define  MG26_18PL   0xFFFF
-#endif
-#define  MG26_16PL   0x00DF
-#define  MG26    (MG26_11PL & MG26_12PL & MG26_13PL & MG26_14PL & \
-                  MG26_15PL & MG26_16PL & MG26_17PL & MG26_18PL)
-// End of MG26:
-
-// Beginning of MG27:
-#if (G21PL >= G27PL) || (G21PL == 0)
-#define  MG27_11PL   ~(1)
-#else
-#define  MG27_11PL   0xFFFF
-#endif
-#if (G22PL >= G27PL) || (G22PL == 0)
-#define  MG27_12PL   ~(1 << 1)
-#else
-#define  MG27_12PL   0xFFFF
-#endif
-#if (G23PL >= G27PL) || (G23PL == 0)
-#define  MG27_13PL   ~(1 << 2)
-#else
-#define  MG27_13PL   0xFFFF
-#endif
-#if (G24PL >= G27PL) || (G24PL == 0)
-#define  MG27_14PL   ~(1 << 3)
-#else
-#define  MG27_14PL   0xFFFF
-#endif
-#if (G25PL >= G27PL) || (G25PL == 0)
-#define  MG27_15PL   ~(1 << 4)
-#else
-#define  MG27_15PL   0xFFFF
-#endif
-#if (G26PL >= G27PL) || (G26PL == 0)
-#define  MG27_16PL   ~(1 << 5)
-#else
-#define  MG27_16PL   0xFFFF
-#endif
-#if (G28PL >= G27PL) || (G28PL == 0)
-#define  MG27_18PL   ~(1 << 7)
-#else
-#define  MG27_18PL   0xFFFF
-#endif
-#define  MG27_17PL   0x00BF
-#define  MG27    (MG27_11PL & MG27_12PL & MG27_13PL & MG27_14PL & \
-                  MG27_15PL & MG27_16PL & MG27_17PL & MG27_18PL)
-// End of MG27:
-
-// Beginning of MG28:
-#if (G21PL >= G28PL) || (G21PL == 0)
-#define  MG28_11PL   ~(1)
-#else
-#define  MG28_11PL   0xFFFF
-#endif
-#if (G22PL >= G28PL) || (G22PL == 0)
-#define  MG28_12PL   ~(1 << 1)
-#else
-#define  MG28_12PL   0xFFFF
-#endif
-#if (G23PL >= G28PL) || (G23PL == 0)
-#define  MG28_13PL   ~(1 << 2)
-#else
-#define  MG28_13PL   0xFFFF
-#endif
-#if (G24PL >= G28PL) || (G24PL == 0)
-#define  MG28_14PL   ~(1 << 3)
-#else
-#define  MG28_14PL   0xFFFF
-#endif
-#if (G25PL >= G28PL) || (G25PL == 0)
-#define  MG28_15PL   ~(1 << 4)
-#else
-#define  MG28_15PL   0xFFFF
-#endif
-#if (G26PL >= G28PL) || (G26PL == 0)
-#define  MG28_16PL   ~(1 << 5)
-#else
-#define  MG28_16PL   0xFFFF
-#endif
-#if (G27PL >= G28PL) || (G27PL == 0)
-#define  MG28_17PL   ~(1 << 6)
-#else
-#define  MG28_17PL   0xFFFF
-#endif
-#define  MG28_18PL   0x007F
-#define  MG28    (MG28_11PL & MG28_12PL & MG28_13PL & MG28_14PL & \
-                  MG28_15PL & MG28_16PL & MG28_17PL & MG28_18PL)
-// End of MG28:
-
-//-------------------------------------------------------------------------------
-// Automatically generate PIEIER1 interrupt masks MG31 to MG38:
-//
-
-// Beginning of MG31:
-#if (G32PL >= G31PL) || (G32PL == 0)
-#define  MG31_12PL   ~(1 << 1)
-#else
-#define  MG31_12PL   0xFFFF
-#endif
-#if (G33PL >= G31PL) || (G33PL == 0)
-#define  MG31_13PL   ~(1 << 2)
-#else
-#define  MG31_13PL   0xFFFF
-#endif
-#if (G34PL >= G31PL) || (G34PL == 0)
-#define  MG31_14PL   ~(1 << 3)
-#else
-#define  MG31_14PL   0xFFFF
-#endif
-#if (G35PL >= G31PL) || (G35PL == 0)
-#define  MG31_15PL   ~(1 << 4)
-#else
-#define  MG31_15PL   0xFFFF
-#endif
-#if (G36PL >= G31PL) || (G36PL == 0)
-#define  MG31_16PL   ~(1 << 5)
-#else
-#define  MG31_16PL   0xFFFF
-#endif
-#if (G37PL >= G31PL) || (G37PL == 0)
-#define  MG31_17PL   ~(1 << 6)
-#else
-#define  MG31_17PL   0xFFFF
-#endif
-#if (G38PL >= G31PL) || (G38PL == 0)
-#define  MG31_18PL   ~(1 << 7)
-#else
-#define  MG31_18PL   0xFFFF
-#endif
-#define  MG31_11PL   0x00FE
-#define  MG31    (MG31_11PL & MG31_12PL & MG31_13PL & MG31_14PL & \
-                  MG31_15PL & MG31_16PL & MG31_17PL & MG31_18PL)
-// End of MG31:
-
-// Beginning of MG32:
-#if (G31PL >= G32PL) || (G31PL == 0)
-#define  MG32_11PL   ~(1)
-#else
-#define  MG32_11PL   0xFFFF
-#endif
-#if (G33PL >= G32PL) || (G33PL == 0)
-#define  MG32_13PL   ~(1 << 2)
-#else
-#define  MG32_13PL   0xFFFF
-#endif
-#if (G34PL >= G32PL) || (G34PL == 0)
-#define  MG32_14PL   ~(1 << 3)
-#else
-#define  MG32_14PL   0xFFFF
-#endif
-#if (G35PL >= G32PL) || (G35PL == 0)
-#define  MG32_15PL   ~(1 << 4)
-#else
-#define  MG32_15PL   0xFFFF
-#endif
-#if (G36PL >= G32PL) || (G36PL == 0)
-#define  MG32_16PL   ~(1 << 5)
-#else
-#define  MG32_16PL   0xFFFF
-#endif
-#if (G37PL >= G32PL) || (G37PL == 0)
-#define  MG32_17PL   ~(1 << 6)
-#else
-#define  MG32_17PL   0xFFFF
-#endif
-#if (G38PL >= G32PL) || (G38PL == 0)
-#define  MG32_18PL   ~(1 << 7)
-#else
-#define  MG32_18PL   0xFFFF
-#endif
-#define  MG32_12PL   0x00FD
-#define  MG32    (MG32_11PL & MG32_12PL & MG32_13PL & MG32_14PL & \
-                  MG32_15PL & MG32_16PL & MG32_17PL & MG32_18PL)
-// End of MG32:
-
-// Beginning of MG33:
-#if (G31PL >= G33PL) || (G31PL == 0)
-#define  MG33_11PL   ~(1)
-#else
-#define  MG33_11PL   0xFFFF
-#endif
-#if (G32PL >= G33PL) || (G32PL == 0)
-#define  MG33_12PL   ~(1 << 1)
-#else
-#define  MG33_12PL   0xFFFF
-#endif
-#if (G34PL >= G33PL) || (G34PL == 0)
-#define  MG33_14PL   ~(1 << 3)
-#else
-#define  MG33_14PL   0xFFFF
-#endif
-#if (G35PL >= G33PL) || (G35PL == 0)
-#define  MG33_15PL   ~(1 << 4)
-#else
-#define  MG33_15PL   0xFFFF
-#endif
-#if (G36PL >= G33PL) || (G36PL == 0)
-#define  MG33_16PL   ~(1 << 5)
-#else
-#define  MG33_16PL   0xFFFF
-#endif
-#if (G37PL >= G33PL) || (G37PL == 0)
-#define  MG33_17PL   ~(1 << 6)
-#else
-#define  MG33_17PL   0xFFFF
-#endif
-#if (G38PL >= G33PL) || (G38PL == 0)
-#define  MG33_18PL   ~(1 << 7)
-#else
-#define  MG33_18PL   0xFFFF
-#endif
-#define  MG33_13PL   0x00FB
-#define  MG33    (MG33_11PL & MG33_12PL & MG33_13PL & MG33_14PL & \
-                  MG33_15PL & MG33_16PL & MG33_17PL & MG33_18PL)
-// End of MG33:
-
-// Beginning of MG34:
-#if (G31PL >= G34PL) || (G31PL == 0)
-#define  MG34_11PL   ~(1)
-#else
-#define  MG34_11PL   0xFFFF
-#endif
-#if (G32PL >= G34PL) || (G32PL == 0)
-#define  MG34_12PL   ~(1 << 1)
-#else
-#define  MG34_12PL   0xFFFF
-#endif
-#if (G33PL >= G34PL) || (G33PL == 0)
-#define  MG34_13PL   ~(1 << 2)
-#else
-#define  MG34_13PL   0xFFFF
-#endif
-#if (G35PL >= G34PL) || (G35PL == 0)
-#define  MG34_15PL   ~(1 << 4)
-#else
-#define  MG34_15PL   0xFFFF
-#endif
-#if (G36PL >= G34PL) || (G36PL == 0)
-#define  MG34_16PL   ~(1 << 5)
-#else
-#define  MG34_16PL   0xFFFF
-#endif
-#if (G37PL >= G34PL) || (G37PL == 0)
-#define  MG34_17PL   ~(1 << 6)
-#else
-#define  MG34_17PL   0xFFFF
-#endif
-#if (G38PL >= G34PL) || (G38PL == 0)
-#define  MG34_18PL   ~(1 << 7)
-#else
-#define  MG34_18PL   0xFFFF
-#endif
-#define  MG34_14PL   0x00F7
-#define  MG34    (MG34_11PL & MG34_12PL & MG34_13PL & MG34_14PL & \
-                  MG34_15PL & MG34_16PL & MG34_17PL & MG34_18PL)
-// End of MG34:
-
-// Beginning of MG35:
-#if (G31PL >= G35PL) || (G31PL == 0)
-#define  MG35_11PL   ~(1)
-#else
-#define  MG35_11PL   0xFFFF
-#endif
-#if (G32PL >= G35PL) || (G32PL == 0)
-#define  MG35_12PL   ~(1 << 1)
-#else
-#define  MG35_12PL   0xFFFF
-#endif
-#if (G33PL >= G35PL) || (G33PL == 0)
-#define  MG35_13PL   ~(1 << 2)
-#else
-#define  MG35_13PL   0xFFFF
-#endif
-#if (G34PL >= G35PL) || (G34PL == 0)
-#define  MG35_14PL   ~(1 << 3)
-#else
-#define  MG35_14PL   0xFFFF
-#endif
-#if (G36PL >= G35PL) || (G36PL == 0)
-#define  MG35_16PL   ~(1 << 5)
-#else
-#define  MG35_16PL   0xFFFF
-#endif
-#if (G37PL >= G35PL) || (G37PL == 0)
-#define  MG35_17PL   ~(1 << 6)
-#else
-#define  MG35_17PL   0xFFFF
-#endif
-#if (G38PL >= G35PL) || (G38PL == 0)
-#define  MG35_18PL   ~(1 << 7)
-#else
-#define  MG35_18PL   0xFFFF
-#endif
-#define  MG35_15PL   0x00EF
-#define  MG35    (MG35_11PL & MG35_12PL & MG35_13PL & MG35_14PL & \
-                  MG35_15PL & MG35_16PL & MG35_17PL & MG35_18PL)
-// End of MG35:
-
-// Beginning of MG36:
-#if (G31PL >= G36PL) || (G31PL == 0)
-#define  MG36_11PL   ~(1)
-#else
-#define  MG36_11PL   0xFFFF
-#endif
-#if (G32PL >= G36PL) || (G32PL == 0)
-#define  MG36_12PL   ~(1 << 1)
-#else
-#define  MG36_12PL   0xFFFF
-#endif
-#if (G33PL >= G36PL) || (G33PL == 0)
-#define  MG36_13PL   ~(1 << 2)
-#else
-#define  MG36_13PL   0xFFFF
-#endif
-#if (G34PL >= G36PL) || (G34PL == 0)
-#define  MG36_14PL   ~(1 << 3)
-#else
-#define  MG36_14PL   0xFFFF
-#endif
-#if (G35PL >= G36PL) || (G35PL == 0)
-#define  MG36_15PL   ~(1 << 4)
-#else
-#define  MG36_15PL   0xFFFF
-#endif
-#if (G37PL >= G36PL) || (G37PL == 0)
-#define  MG36_17PL   ~(1 << 6)
-#else
-#define  MG36_17PL   0xFFFF
-#endif
-#if (G38PL >= G36PL) || (G38PL == 0)
-#define  MG36_18PL   ~(1 << 7)
-#else
-#define  MG36_18PL   0xFFFF
-#endif
-#define  MG36_16PL   0x00DF
-#define  MG36    (MG36_11PL & MG36_12PL & MG36_13PL & MG36_14PL & \
-                  MG36_15PL & MG36_16PL & MG36_17PL & MG36_18PL)
-// End of MG36:
-
-// Beginning of MG37:
-#if (G31PL >= G37PL) || (G31PL == 0)
-#define  MG37_11PL   ~(1)
-#else
-#define  MG37_11PL   0xFFFF
-#endif
-#if (G32PL >= G37PL) || (G32PL == 0)
-#define  MG37_12PL   ~(1 << 1)
-#else
-#define  MG37_12PL   0xFFFF
-#endif
-#if (G33PL >= G37PL) || (G33PL == 0)
-#define  MG37_13PL   ~(1 << 2)
-#else
-#define  MG37_13PL   0xFFFF
-#endif
-#if (G34PL >= G37PL) || (G34PL == 0)
-#define  MG37_14PL   ~(1 << 3)
-#else
-#define  MG37_14PL   0xFFFF
-#endif
-#if (G35PL >= G37PL) || (G35PL == 0)
-#define  MG37_15PL   ~(1 << 4)
-#else
-#define  MG37_15PL   0xFFFF
-#endif
-#if (G36PL >= G37PL) || (G36PL == 0)
-#define  MG37_16PL   ~(1 << 5)
-#else
-#define  MG37_16PL   0xFFFF
-#endif
-#if (G38PL >= G37PL) || (G38PL == 0)
-#define  MG37_18PL   ~(1 << 7)
-#else
-#define  MG37_18PL   0xFFFF
-#endif
-#define  MG37_17PL   0x00BF
-#define  MG37    (MG37_11PL & MG37_12PL & MG37_13PL & MG37_14PL & \
-                  MG37_15PL & MG37_16PL & MG37_17PL & MG37_18PL)
-// End of MG37:
-
-// Beginning of MG38:
-#if (G31PL >= G38PL) || (G31PL == 0)
-#define  MG38_11PL   ~(1)
-#else
-#define  MG38_11PL   0xFFFF
-#endif
-#if (G32PL >= G38PL) || (G32PL == 0)
-#define  MG38_12PL   ~(1 << 1)
-#else
-#define  MG38_12PL   0xFFFF
-#endif
-#if (G33PL >= G38PL) || (G33PL == 0)
-#define  MG38_13PL   ~(1 << 2)
-#else
-#define  MG38_13PL   0xFFFF
-#endif
-#if (G34PL >= G38PL) || (G34PL == 0)
-#define  MG38_14PL   ~(1 << 3)
-#else
-#define  MG38_14PL   0xFFFF
-#endif
-#if (G35PL >= G38PL) || (G35PL == 0)
-#define  MG38_15PL   ~(1 << 4)
-#else
-#define  MG38_15PL   0xFFFF
-#endif
-#if (G36PL >= G38PL) || (G36PL == 0)
-#define  MG38_16PL   ~(1 << 5)
-#else
-#define  MG38_16PL   0xFFFF
-#endif
-#if (G37PL >= G38PL) || (G37PL == 0)
-#define  MG38_17PL   ~(1 << 6)
-#else
-#define  MG38_17PL   0xFFFF
-#endif
-#define  MG38_18PL   0x007F
-#define  MG38    (MG38_11PL & MG38_12PL & MG38_13PL & MG38_14PL & \
-                  MG38_15PL & MG38_16PL & MG38_17PL & MG38_18PL)
-// End of MG38:
-
-//-------------------------------------------------------------------------------
-// Automatically generate PIEIER1 interrupt masks MG41 to MG48:
-//
-
-// Beginning of MG41:
-#if (G42PL >= G41PL) || (G42PL == 0)
-#define  MG41_12PL   ~(1 << 1)
-#else
-#define  MG41_12PL   0xFFFF
-#endif
-#if (G43PL >= G41PL) || (G43PL == 0)
-#define  MG41_13PL   ~(1 << 2)
-#else
-#define  MG41_13PL   0xFFFF
-#endif
-#if (G44PL >= G41PL) || (G44PL == 0)
-#define  MG41_14PL   ~(1 << 3)
-#else
-#define  MG41_14PL   0xFFFF
-#endif
-#if (G45PL >= G41PL) || (G45PL == 0)
-#define  MG41_15PL   ~(1 << 4)
-#else
-#define  MG41_15PL   0xFFFF
-#endif
-#if (G46PL >= G41PL) || (G46PL == 0)
-#define  MG41_16PL   ~(1 << 5)
-#else
-#define  MG41_16PL   0xFFFF
-#endif
-#if (G47PL >= G41PL) || (G47PL == 0)
-#define  MG41_17PL   ~(1 << 6)
-#else
-#define  MG41_17PL   0xFFFF
-#endif
-#if (G48PL >= G41PL) || (G48PL == 0)
-#define  MG41_18PL   ~(1 << 7)
-#else
-#define  MG41_18PL   0xFFFF
-#endif
-#define  MG41_11PL   0x00FE
-#define  MG41    (MG41_11PL & MG41_12PL & MG41_13PL & MG41_14PL & \
-                  MG41_15PL & MG41_16PL & MG41_17PL & MG41_18PL)
-// End of MG41:
-
-// Beginning of MG42:
-#if (G41PL >= G42PL) || (G41PL == 0)
-#define  MG42_11PL   ~(1)
-#else
-#define  MG42_11PL   0xFFFF
-#endif
-#if (G43PL >= G42PL) || (G43PL == 0)
-#define  MG42_13PL   ~(1 << 2)
-#else
-#define  MG42_13PL   0xFFFF
-#endif
-#if (G44PL >= G42PL) || (G44PL == 0)
-#define  MG42_14PL   ~(1 << 3)
-#else
-#define  MG42_14PL   0xFFFF
-#endif
-#if (G45PL >= G42PL) || (G45PL == 0)
-#define  MG42_15PL   ~(1 << 4)
-#else
-#define  MG42_15PL   0xFFFF
-#endif
-#if (G46PL >= G42PL) || (G46PL == 0)
-#define  MG42_16PL   ~(1 << 5)
-#else
-#define  MG42_16PL   0xFFFF
-#endif
-#if (G47PL >= G42PL) || (G47PL == 0)
-#define  MG42_17PL   ~(1 << 6)
-#else
-#define  MG42_17PL   0xFFFF
-#endif
-#if (G48PL >= G42PL) || (G48PL == 0)
-#define  MG42_18PL   ~(1 << 7)
-#else
-#define  MG42_18PL   0xFFFF
-#endif
-#define  MG42_12PL   0x00FD
-#define  MG42    (MG42_11PL & MG42_12PL & MG42_13PL & MG42_14PL & \
-                  MG42_15PL & MG42_16PL & MG42_17PL & MG42_18PL)
-// End of MG42:
-
-// Beginning of MG43:
-#if (G41PL >= G43PL) || (G41PL == 0)
-#define  MG43_11PL   ~(1)
-#else
-#define  MG43_11PL   0xFFFF
-#endif
-#if (G42PL >= G43PL) || (G42PL == 0)
-#define  MG43_12PL   ~(1 << 1)
-#else
-#define  MG43_12PL   0xFFFF
-#endif
-#if (G44PL >= G43PL) || (G44PL == 0)
-#define  MG43_14PL   ~(1 << 3)
-#else
-#define  MG43_14PL   0xFFFF
-#endif
-#if (G45PL >= G43PL) || (G45PL == 0)
-#define  MG43_15PL   ~(1 << 4)
-#else
-#define  MG43_15PL   0xFFFF
-#endif
-#if (G46PL >= G43PL) || (G46PL == 0)
-#define  MG43_16PL   ~(1 << 5)
-#else
-#define  MG43_16PL   0xFFFF
-#endif
-#if (G47PL >= G43PL) || (G47PL == 0)
-#define  MG43_17PL   ~(1 << 6)
-#else
-#define  MG43_17PL   0xFFFF
-#endif
-#if (G48PL >= G43PL) || (G48PL == 0)
-#define  MG43_18PL   ~(1 << 7)
-#else
-#define  MG43_18PL   0xFFFF
-#endif
-#define  MG43_13PL   0x00FB
-#define  MG43    (MG43_11PL & MG43_12PL & MG43_13PL & MG43_14PL & \
-                  MG43_15PL & MG43_16PL & MG43_17PL & MG43_18PL)
-// End of MG43:
-
-// Beginning of MG44:
-#if (G41PL >= G44PL) || (G41PL == 0)
-#define  MG44_11PL   ~(1)
-#else
-#define  MG44_11PL   0xFFFF
-#endif
-#if (G42PL >= G44PL) || (G42PL == 0)
-#define  MG44_12PL   ~(1 << 1)
-#else
-#define  MG44_12PL   0xFFFF
-#endif
-#if (G43PL >= G44PL) || (G43PL == 0)
-#define  MG44_13PL   ~(1 << 2)
-#else
-#define  MG44_13PL   0xFFFF
-#endif
-#if (G45PL >= G44PL) || (G45PL == 0)
-#define  MG44_15PL   ~(1 << 4)
-#else
-#define  MG44_15PL   0xFFFF
-#endif
-#if (G46PL >= G44PL) || (G46PL == 0)
-#define  MG44_16PL   ~(1 << 5)
-#else
-#define  MG44_16PL   0xFFFF
-#endif
-#if (G47PL >= G44PL) || (G47PL == 0)
-#define  MG44_17PL   ~(1 << 6)
-#else
-#define  MG44_17PL   0xFFFF
-#endif
-#if (G48PL >= G44PL) || (G48PL == 0)
-#define  MG44_18PL   ~(1 << 7)
-#else
-#define  MG44_18PL   0xFFFF
-#endif
-#define  MG44_14PL   0x00F7
-#define  MG44    (MG44_11PL & MG44_12PL & MG44_13PL & MG44_14PL & \
-                  MG44_15PL & MG44_16PL & MG44_17PL & MG44_18PL)
-// End of MG44:
-
-// Beginning of MG45:
-#if (G41PL >= G45PL) || (G41PL == 0)
-#define  MG45_11PL   ~(1)
-#else
-#define  MG45_11PL   0xFFFF
-#endif
-#if (G42PL >= G45PL) || (G42PL == 0)
-#define  MG45_12PL   ~(1 << 1)
-#else
-#define  MG45_12PL   0xFFFF
-#endif
-#if (G43PL >= G45PL) || (G43PL == 0)
-#define  MG45_13PL   ~(1 << 2)
-#else
-#define  MG45_13PL   0xFFFF
-#endif
-#if (G44PL >= G45PL) || (G44PL == 0)
-#define  MG45_14PL   ~(1 << 3)
-#else
-#define  MG45_14PL   0xFFFF
-#endif
-#if (G46PL >= G45PL) || (G46PL == 0)
-#define  MG45_16PL   ~(1 << 5)
-#else
-#define  MG45_16PL   0xFFFF
-#endif
-#if (G47PL >= G45PL) || (G47PL == 0)
-#define  MG45_17PL   ~(1 << 6)
-#else
-#define  MG45_17PL   0xFFFF
-#endif
-#if (G48PL >= G45PL) || (G48PL == 0)
-#define  MG45_18PL   ~(1 << 7)
-#else
-#define  MG45_18PL   0xFFFF
-#endif
-#define  MG45_15PL   0x00EF
-#define  MG45    (MG45_11PL & MG45_12PL & MG45_13PL & MG45_14PL & \
-                  MG45_15PL & MG45_16PL & MG45_17PL & MG45_18PL)
-// End of MG45:
-
-// Beginning of MG46:
-#if (G41PL >= G46PL) || (G41PL == 0)
-#define  MG46_11PL   ~(1)
-#else
-#define  MG46_11PL   0xFFFF
-#endif
-#if (G42PL >= G46PL) || (G42PL == 0)
-#define  MG46_12PL   ~(1 << 1)
-#else
-#define  MG46_12PL   0xFFFF
-#endif
-#if (G43PL >= G46PL) || (G43PL == 0)
-#define  MG46_13PL   ~(1 << 2)
-#else
-#define  MG46_13PL   0xFFFF
-#endif
-#if (G44PL >= G46PL) || (G44PL == 0)
-#define  MG46_14PL   ~(1 << 3)
-#else
-#define  MG46_14PL   0xFFFF
-#endif
-#if (G45PL >= G46PL) || (G45PL == 0)
-#define  MG46_15PL   ~(1 << 4)
-#else
-#define  MG46_15PL   0xFFFF
-#endif
-#if (G47PL >= G46PL) || (G47PL == 0)
-#define  MG46_17PL   ~(1 << 6)
-#else
-#define  MG46_17PL   0xFFFF
-#endif
-#if (G48PL >= G46PL) || (G48PL == 0)
-#define  MG46_18PL   ~(1 << 7)
-#else
-#define  MG46_18PL   0xFFFF
-#endif
-#define  MG46_16PL   0x00DF
-#define  MG46    (MG46_11PL & MG46_12PL & MG46_13PL & MG46_14PL & \
-                  MG46_15PL & MG46_16PL & MG46_17PL & MG46_18PL)
-// End of MG46:
-
-// Beginning of MG47:
-#if (G41PL >= G47PL) || (G41PL == 0)
-#define  MG47_11PL   ~(1)
-#else
-#define  MG47_11PL   0xFFFF
-#endif
-#if (G42PL >= G47PL) || (G42PL == 0)
-#define  MG47_12PL   ~(1 << 1)
-#else
-#define  MG47_12PL   0xFFFF
-#endif
-#if (G43PL >= G47PL) || (G43PL == 0)
-#define  MG47_13PL   ~(1 << 2)
-#else
-#define  MG47_13PL   0xFFFF
-#endif
-#if (G44PL >= G47PL) || (G44PL == 0)
-#define  MG47_14PL   ~(1 << 3)
-#else
-#define  MG47_14PL   0xFFFF
-#endif
-#if (G45PL >= G47PL) || (G45PL == 0)
-#define  MG47_15PL   ~(1 << 4)
-#else
-#define  MG47_15PL   0xFFFF
-#endif
-#if (G46PL >= G47PL) || (G46PL == 0)
-#define  MG47_16PL   ~(1 << 5)
-#else
-#define  MG47_16PL   0xFFFF
-#endif
-#if (G48PL >= G47PL) || (G48PL == 0)
-#define  MG47_18PL   ~(1 << 7)
-#else
-#define  MG47_18PL   0xFFFF
-#endif
-#define  MG47_17PL   0x00BF
-#define  MG47    (MG47_11PL & MG47_12PL & MG47_13PL & MG47_14PL & \
-                  MG47_15PL & MG47_16PL & MG47_17PL & MG47_18PL)
-// End of MG47:
-
-// Beginning of MG48:
-#if (G41PL >= G48PL) || (G41PL == 0)
-#define  MG48_11PL   ~(1)
-#else
-#define  MG48_11PL   0xFFFF
-#endif
-#if (G42PL >= G48PL) || (G42PL == 0)
-#define  MG48_12PL   ~(1 << 1)
-#else
-#define  MG48_12PL   0xFFFF
-#endif
-#if (G43PL >= G48PL) || (G43PL == 0)
-#define  MG48_13PL   ~(1 << 2)
-#else
-#define  MG48_13PL   0xFFFF
-#endif
-#if (G44PL >= G48PL) || (G44PL == 0)
-#define  MG48_14PL   ~(1 << 3)
-#else
-#define  MG48_14PL   0xFFFF
-#endif
-#if (G45PL >= G48PL) || (G45PL == 0)
-#define  MG48_15PL   ~(1 << 4)
-#else
-#define  MG48_15PL   0xFFFF
-#endif
-#if (G46PL >= G48PL) || (G46PL == 0)
-#define  MG48_16PL   ~(1 << 5)
-#else
-#define  MG48_16PL   0xFFFF
-#endif
-#if (G47PL >= G48PL) || (G47PL == 0)
-#define  MG48_17PL   ~(1 << 6)
-#else
-#define  MG48_17PL   0xFFFF
-#endif
-#define  MG48_18PL   0x007F
-#define  MG48    (MG48_11PL & MG48_12PL & MG48_13PL & MG48_14PL & \
-                  MG48_15PL & MG48_16PL & MG48_17PL & MG48_18PL)
-// End of MG48:
-
-//-------------------------------------------------------------------------------
-// Automatically generate PIEIER1 interrupt masks MG51 to MG58:
-//
-
-// Beginning of MG51:
-#if (G52PL >= G51PL) || (G52PL == 0)
-#define  MG51_12PL   ~(1 << 1)
-#else
-#define  MG51_12PL   0xFFFF
-#endif
-#if (G53PL >= G51PL) || (G53PL == 0)
-#define  MG51_13PL   ~(1 << 2)
-#else
-#define  MG51_13PL   0xFFFF
-#endif
-#if (G54PL >= G51PL) || (G54PL == 0)
-#define  MG51_14PL   ~(1 << 3)
-#else
-#define  MG51_14PL   0xFFFF
-#endif
-#if (G55PL >= G51PL) || (G55PL == 0)
-#define  MG51_15PL   ~(1 << 4)
-#else
-#define  MG51_15PL   0xFFFF
-#endif
-#if (G56PL >= G51PL) || (G56PL == 0)
-#define  MG51_16PL   ~(1 << 5)
-#else
-#define  MG51_16PL   0xFFFF
-#endif
-#if (G57PL >= G51PL) || (G57PL == 0)
-#define  MG51_17PL   ~(1 << 6)
-#else
-#define  MG51_17PL   0xFFFF
-#endif
-#if (G58PL >= G51PL) || (G58PL == 0)
-#define  MG51_18PL   ~(1 << 7)
-#else
-#define  MG51_18PL   0xFFFF
-#endif
-#define  MG51_11PL   0x00FE
-#define  MG51    (MG51_11PL & MG51_12PL & MG51_13PL & MG51_14PL & \
-                  MG51_15PL & MG51_16PL & MG51_17PL & MG51_18PL)
-// End of MG51:
-
-// Beginning of MG52:
-#if (G51PL >= G52PL) || (G51PL == 0)
-#define  MG52_11PL   ~(1)
-#else
-#define  MG52_11PL   0xFFFF
-#endif
-#if (G53PL >= G52PL) || (G53PL == 0)
-#define  MG52_13PL   ~(1 << 2)
-#else
-#define  MG52_13PL   0xFFFF
-#endif
-#if (G54PL >= G52PL) || (G54PL == 0)
-#define  MG52_14PL   ~(1 << 3)
-#else
-#define  MG52_14PL   0xFFFF
-#endif
-#if (G55PL >= G52PL) || (G55PL == 0)
-#define  MG52_15PL   ~(1 << 4)
-#else
-#define  MG52_15PL   0xFFFF
-#endif
-#if (G56PL >= G52PL) || (G56PL == 0)
-#define  MG52_16PL   ~(1 << 5)
-#else
-#define  MG52_16PL   0xFFFF
-#endif
-#if (G57PL >= G52PL) || (G57PL == 0)
-#define  MG52_17PL   ~(1 << 6)
-#else
-#define  MG52_17PL   0xFFFF
-#endif
-#if (G58PL >= G52PL) || (G58PL == 0)
-#define  MG52_18PL   ~(1 << 7)
-#else
-#define  MG52_18PL   0xFFFF
-#endif
-#define  MG52_12PL   0x00FD
-#define  MG52    (MG52_11PL & MG52_12PL & MG52_13PL & MG52_14PL & \
-                  MG52_15PL & MG52_16PL & MG52_17PL & MG52_18PL)
-// End of MG52:
-
-// Beginning of MG53:
-#if (G51PL >= G53PL) || (G51PL == 0)
-#define  MG53_11PL   ~(1)
-#else
-#define  MG53_11PL   0xFFFF
-#endif
-#if (G52PL >= G53PL) || (G52PL == 0)
-#define  MG53_12PL   ~(1 << 1)
-#else
-#define  MG53_12PL   0xFFFF
-#endif
-#if (G54PL >= G53PL) || (G54PL == 0)
-#define  MG53_14PL   ~(1 << 3)
-#else
-#define  MG53_14PL   0xFFFF
-#endif
-#if (G55PL >= G53PL) || (G55PL == 0)
-#define  MG53_15PL   ~(1 << 4)
-#else
-#define  MG53_15PL   0xFFFF
-#endif
-#if (G56PL >= G53PL) || (G56PL == 0)
-#define  MG53_16PL   ~(1 << 5)
-#else
-#define  MG53_16PL   0xFFFF
-#endif
-#if (G57PL >= G53PL) || (G57PL == 0)
-#define  MG53_17PL   ~(1 << 6)
-#else
-#define  MG53_17PL   0xFFFF
-#endif
-#if (G58PL >= G53PL) || (G58PL == 0)
-#define  MG53_18PL   ~(1 << 7)
-#else
-#define  MG53_18PL   0xFFFF
-#endif
-#define  MG53_13PL   0x00FB
-#define  MG53    (MG53_11PL & MG53_12PL & MG53_13PL & MG53_14PL & \
-                  MG53_15PL & MG53_16PL & MG53_17PL & MG53_18PL)
-// End of MG53:
-
-// Beginning of MG54:
-#if (G51PL >= G54PL) || (G51PL == 0)
-#define  MG54_11PL   ~(1)
-#else
-#define  MG54_11PL   0xFFFF
-#endif
-#if (G52PL >= G54PL) || (G52PL == 0)
-#define  MG54_12PL   ~(1 << 1)
-#else
-#define  MG54_12PL   0xFFFF
-#endif
-#if (G53PL >= G54PL) || (G53PL == 0)
-#define  MG54_13PL   ~(1 << 2)
-#else
-#define  MG54_13PL   0xFFFF
-#endif
-#if (G55PL >= G54PL) || (G55PL == 0)
-#define  MG54_15PL   ~(1 << 4)
-#else
-#define  MG54_15PL   0xFFFF
-#endif
-#if (G56PL >= G54PL) || (G56PL == 0)
-#define  MG54_16PL   ~(1 << 5)
-#else
-#define  MG54_16PL   0xFFFF
-#endif
-#if (G57PL >= G54PL) || (G57PL == 0)
-#define  MG54_17PL   ~(1 << 6)
-#else
-#define  MG54_17PL   0xFFFF
-#endif
-#if (G58PL >= G54PL) || (G58PL == 0)
-#define  MG54_18PL   ~(1 << 7)
-#else
-#define  MG54_18PL   0xFFFF
-#endif
-#define  MG54_14PL   0x00F7
-#define  MG54    (MG54_11PL & MG54_12PL & MG54_13PL & MG54_14PL & \
-                  MG54_15PL & MG54_16PL & MG54_17PL & MG54_18PL)
-// End of MG54:
-
-// Beginning of MG55:
-#if (G51PL >= G55PL) || (G51PL == 0)
-#define  MG55_11PL   ~(1)
-#else
-#define  MG55_11PL   0xFFFF
-#endif
-#if (G52PL >= G55PL) || (G52PL == 0)
-#define  MG55_12PL   ~(1 << 1)
-#else
-#define  MG55_12PL   0xFFFF
-#endif
-#if (G53PL >= G55PL) || (G53PL == 0)
-#define  MG55_13PL   ~(1 << 2)
-#else
-#define  MG55_13PL   0xFFFF
-#endif
-#if (G54PL >= G55PL) || (G54PL == 0)
-#define  MG55_14PL   ~(1 << 3)
-#else
-#define  MG55_14PL   0xFFFF
-#endif
-#if (G56PL >= G55PL) || (G56PL == 0)
-#define  MG55_16PL   ~(1 << 5)
-#else
-#define  MG55_16PL   0xFFFF
-#endif
-#if (G57PL >= G55PL) || (G57PL == 0)
-#define  MG55_17PL   ~(1 << 6)
-#else
-#define  MG55_17PL   0xFFFF
-#endif
-#if (G58PL >= G55PL) || (G58PL == 0)
-#define  MG55_18PL   ~(1 << 7)
-#else
-#define  MG55_18PL   0xFFFF
-#endif
-#define  MG55_15PL   0x00EF
-#define  MG55    (MG55_11PL & MG55_12PL & MG55_13PL & MG55_14PL & \
-                  MG55_15PL & MG55_16PL & MG55_17PL & MG55_18PL)
-// End of MG55:
-
-// Beginning of MG56:
-#if (G51PL >= G56PL) || (G51PL == 0)
-#define  MG56_11PL   ~(1)
-#else
-#define  MG56_11PL   0xFFFF
-#endif
-#if (G52PL >= G56PL) || (G52PL == 0)
-#define  MG56_12PL   ~(1 << 1)
-#else
-#define  MG56_12PL   0xFFFF
-#endif
-#if (G53PL >= G56PL) || (G53PL == 0)
-#define  MG56_13PL   ~(1 << 2)
-#else
-#define  MG56_13PL   0xFFFF
-#endif
-#if (G54PL >= G56PL) || (G54PL == 0)
-#define  MG56_14PL   ~(1 << 3)
-#else
-#define  MG56_14PL   0xFFFF
-#endif
-#if (G55PL >= G56PL) || (G55PL == 0)
-#define  MG56_15PL   ~(1 << 4)
-#else
-#define  MG56_15PL   0xFFFF
-#endif
-#if (G57PL >= G56PL) || (G57PL == 0)
-#define  MG56_17PL   ~(1 << 6)
-#else
-#define  MG56_17PL   0xFFFF
-#endif
-#if (G58PL >= G56PL) || (G58PL == 0)
-#define  MG56_18PL   ~(1 << 7)
-#else
-#define  MG56_18PL   0xFFFF
-#endif
-#define  MG56_16PL   0x00DF
-#define  MG56    (MG56_11PL & MG56_12PL & MG56_13PL & MG56_14PL & \
-                  MG56_15PL & MG56_16PL & MG56_17PL & MG56_18PL)
-// End of MG56:
-
-// Beginning of MG57:
-#if (G51PL >= G57PL) || (G51PL == 0)
-#define  MG57_11PL   ~(1)
-#else
-#define  MG57_11PL   0xFFFF
-#endif
-#if (G52PL >= G57PL) || (G52PL == 0)
-#define  MG57_12PL   ~(1 << 1)
-#else
-#define  MG57_12PL   0xFFFF
-#endif
-#if (G53PL >= G57PL) || (G53PL == 0)
-#define  MG57_13PL   ~(1 << 2)
-#else
-#define  MG57_13PL   0xFFFF
-#endif
-#if (G54PL >= G57PL) || (G54PL == 0)
-#define  MG57_14PL   ~(1 << 3)
-#else
-#define  MG57_14PL   0xFFFF
-#endif
-#if (G55PL >= G57PL) || (G55PL == 0)
-#define  MG57_15PL   ~(1 << 4)
-#else
-#define  MG57_15PL   0xFFFF
-#endif
-#if (G56PL >= G57PL) || (G56PL == 0)
-#define  MG57_16PL   ~(1 << 5)
-#else
-#define  MG57_16PL   0xFFFF
-#endif
-#if (G58PL >= G57PL) || (G58PL == 0)
-#define  MG57_18PL   ~(1 << 7)
-#else
-#define  MG57_18PL   0xFFFF
-#endif
-#define  MG57_17PL   0x00BF
-#define  MG57    (MG57_11PL & MG57_12PL & MG57_13PL & MG57_14PL & \
-                  MG57_15PL & MG57_16PL & MG57_17PL & MG57_18PL)
-// End of MG57:
-
-// Beginning of MG58:
-#if (G51PL >= G58PL) || (G51PL == 0)
-#define  MG58_11PL   ~(1)
-#else
-#define  MG58_11PL   0xFFFF
-#endif
-#if (G52PL >= G58PL) || (G52PL == 0)
-#define  MG58_12PL   ~(1 << 1)
-#else
-#define  MG58_12PL   0xFFFF
-#endif
-#if (G53PL >= G58PL) || (G53PL == 0)
-#define  MG58_13PL   ~(1 << 2)
-#else
-#define  MG58_13PL   0xFFFF
-#endif
-#if (G54PL >= G58PL) || (G54PL == 0)
-#define  MG58_14PL   ~(1 << 3)
-#else
-#define  MG58_14PL   0xFFFF
-#endif
-#if (G55PL >= G58PL) || (G55PL == 0)
-#define  MG58_15PL   ~(1 << 4)
-#else
-#define  MG58_15PL   0xFFFF
-#endif
-#if (G56PL >= G58PL) || (G56PL == 0)
-#define  MG58_16PL   ~(1 << 5)
-#else
-#define  MG58_16PL   0xFFFF
-#endif
-#if (G57PL >= G58PL) || (G57PL == 0)
-#define  MG58_17PL   ~(1 << 6)
-#else
-#define  MG58_17PL   0xFFFF
-#endif
-#define  MG58_18PL   0x007F
-#define  MG58    (MG58_11PL & MG58_12PL & MG58_13PL & MG58_14PL & \
-                  MG58_15PL & MG58_16PL & MG58_17PL & MG58_18PL)
-// End of MG58:
-
-//-------------------------------------------------------------------------------
-// Automatically generate PIEIER1 interrupt masks MG61 to MG68:
-//
-
-// Beginning of MG61:
-#if (G62PL >= G61PL) || (G62PL == 0)
-#define  MG61_12PL   ~(1 << 1)
-#else
-#define  MG61_12PL   0xFFFF
-#endif
-#if (G63PL >= G61PL) || (G63PL == 0)
-#define  MG61_13PL   ~(1 << 2)
-#else
-#define  MG61_13PL   0xFFFF
-#endif
-#if (G64PL >= G61PL) || (G64PL == 0)
-#define  MG61_14PL   ~(1 << 3)
-#else
-#define  MG61_14PL   0xFFFF
-#endif
-#if (G65PL >= G61PL) || (G65PL == 0)
-#define  MG61_15PL   ~(1 << 4)
-#else
-#define  MG61_15PL   0xFFFF
-#endif
-#if (G66PL >= G61PL) || (G66PL == 0)
-#define  MG61_16PL   ~(1 << 5)
-#else
-#define  MG61_16PL   0xFFFF
-#endif
-#if (G67PL >= G61PL) || (G67PL == 0)
-#define  MG61_17PL   ~(1 << 6)
-#else
-#define  MG61_17PL   0xFFFF
-#endif
-#if (G68PL >= G61PL) || (G68PL == 0)
-#define  MG61_18PL   ~(1 << 7)
-#else
-#define  MG61_18PL   0xFFFF
-#endif
-#define  MG61_11PL   0x00FE
-#define  MG61    (MG61_11PL & MG61_12PL & MG61_13PL & MG61_14PL & \
-                  MG61_15PL & MG61_16PL & MG61_17PL & MG61_18PL)
-// End of MG61:
-
-// Beginning of MG62:
-#if (G61PL >= G62PL) || (G61PL == 0)
-#define  MG62_11PL   ~(1)
-#else
-#define  MG62_11PL   0xFFFF
-#endif
-#if (G63PL >= G62PL) || (G63PL == 0)
-#define  MG62_13PL   ~(1 << 2)
-#else
-#define  MG62_13PL   0xFFFF
-#endif
-#if (G64PL >= G62PL) || (G64PL == 0)
-#define  MG62_14PL   ~(1 << 3)
-#else
-#define  MG62_14PL   0xFFFF
-#endif
-#if (G65PL >= G62PL) || (G65PL == 0)
-#define  MG62_15PL   ~(1 << 4)
-#else
-#define  MG62_15PL   0xFFFF
-#endif
-#if (G66PL >= G62PL) || (G66PL == 0)
-#define  MG62_16PL   ~(1 << 5)
-#else
-#define  MG62_16PL   0xFFFF
-#endif
-#if (G67PL >= G62PL) || (G67PL == 0)
-#define  MG62_17PL   ~(1 << 6)
-#else
-#define  MG62_17PL   0xFFFF
-#endif
-#if (G68PL >= G62PL) || (G68PL == 0)
-#define  MG62_18PL   ~(1 << 7)
-#else
-#define  MG62_18PL   0xFFFF
-#endif
-#define  MG62_12PL   0x00FD
-#define  MG62    (MG62_11PL & MG62_12PL & MG62_13PL & MG62_14PL & \
-                  MG62_15PL & MG62_16PL & MG62_17PL & MG62_18PL)
-// End of MG62:
-
-// Beginning of MG63:
-#if (G61PL >= G63PL) || (G61PL == 0)
-#define  MG63_11PL   ~(1)
-#else
-#define  MG63_11PL   0xFFFF
-#endif
-#if (G62PL >= G63PL) || (G62PL == 0)
-#define  MG63_12PL   ~(1 << 1)
-#else
-#define  MG63_12PL   0xFFFF
-#endif
-#if (G64PL >= G63PL) || (G64PL == 0)
-#define  MG63_14PL   ~(1 << 3)
-#else
-#define  MG63_14PL   0xFFFF
-#endif
-#if (G65PL >= G63PL) || (G65PL == 0)
-#define  MG63_15PL   ~(1 << 4)
-#else
-#define  MG63_15PL   0xFFFF
-#endif
-#if (G66PL >= G63PL) || (G66PL == 0)
-#define  MG63_16PL   ~(1 << 5)
-#else
-#define  MG63_16PL   0xFFFF
-#endif
-#if (G67PL >= G63PL) || (G67PL == 0)
-#define  MG63_17PL   ~(1 << 6)
-#else
-#define  MG63_17PL   0xFFFF
-#endif
-#if (G68PL >= G63PL) || (G68PL == 0)
-#define  MG63_18PL   ~(1 << 7)
-#else
-#define  MG63_18PL   0xFFFF
-#endif
-#define  MG63_13PL   0x00FB
-#define  MG63    (MG63_11PL & MG63_12PL & MG63_13PL & MG63_14PL & \
-                  MG63_15PL & MG63_16PL & MG63_17PL & MG63_18PL)
-// End of MG63:
-
-// Beginning of MG64:
-#if (G61PL >= G64PL) || (G61PL == 0)
-#define  MG64_11PL   ~(1)
-#else
-#define  MG64_11PL   0xFFFF
-#endif
-#if (G62PL >= G64PL) || (G62PL == 0)
-#define  MG64_12PL   ~(1 << 1)
-#else
-#define  MG64_12PL   0xFFFF
-#endif
-#if (G63PL >= G64PL) || (G63PL == 0)
-#define  MG64_13PL   ~(1 << 2)
-#else
-#define  MG64_13PL   0xFFFF
-#endif
-#if (G65PL >= G64PL) || (G65PL == 0)
-#define  MG64_15PL   ~(1 << 4)
-#else
-#define  MG64_15PL   0xFFFF
-#endif
-#if (G66PL >= G64PL) || (G66PL == 0)
-#define  MG64_16PL   ~(1 << 5)
-#else
-#define  MG64_16PL   0xFFFF
-#endif
-#if (G67PL >= G64PL) || (G67PL == 0)
-#define  MG64_17PL   ~(1 << 6)
-#else
-#define  MG64_17PL   0xFFFF
-#endif
-#if (G68PL >= G64PL) || (G68PL == 0)
-#define  MG64_18PL   ~(1 << 7)
-#else
-#define  MG64_18PL   0xFFFF
-#endif
-#define  MG64_14PL   0x00F7
-#define  MG64    (MG64_11PL & MG64_12PL & MG64_13PL & MG64_14PL & \
-                  MG64_15PL & MG64_16PL & MG64_17PL & MG64_18PL)
-// End of MG64:
-
-// Beginning of MG65:
-#if (G61PL >= G65PL) || (G61PL == 0)
-#define  MG65_11PL   ~(1)
-#else
-#define  MG65_11PL   0xFFFF
-#endif
-#if (G62PL >= G65PL) || (G62PL == 0)
-#define  MG65_12PL   ~(1 << 1)
-#else
-#define  MG65_12PL   0xFFFF
-#endif
-#if (G63PL >= G65PL) || (G63PL == 0)
-#define  MG65_13PL   ~(1 << 2)
-#else
-#define  MG65_13PL   0xFFFF
-#endif
-#if (G64PL >= G65PL) || (G64PL == 0)
-#define  MG65_14PL   ~(1 << 3)
-#else
-#define  MG65_14PL   0xFFFF
-#endif
-#if (G66PL >= G65PL) || (G66PL == 0)
-#define  MG65_16PL   ~(1 << 5)
-#else
-#define  MG65_16PL   0xFFFF
-#endif
-#if (G67PL >= G65PL) || (G67PL == 0)
-#define  MG65_17PL   ~(1 << 6)
-#else
-#define  MG65_17PL   0xFFFF
-#endif
-#if (G68PL >= G65PL) || (G68PL == 0)
-#define  MG65_18PL   ~(1 << 7)
-#else
-#define  MG65_18PL   0xFFFF
-#endif
-#define  MG65_15PL   0x00EF
-#define  MG65    (MG65_11PL & MG65_12PL & MG65_13PL & MG65_14PL & \
-                  MG65_15PL & MG65_16PL & MG65_17PL & MG65_18PL)
-// End of MG65:
-
-// Beginning of MG66:
-#if (G61PL >= G66PL) || (G61PL == 0)
-#define  MG66_11PL   ~(1)
-#else
-#define  MG66_11PL   0xFFFF
-#endif
-#if (G62PL >= G66PL) || (G62PL == 0)
-#define  MG66_12PL   ~(1 << 1)
-#else
-#define  MG66_12PL   0xFFFF
-#endif
-#if (G63PL >= G66PL) || (G63PL == 0)
-#define  MG66_13PL   ~(1 << 2)
-#else
-#define  MG66_13PL   0xFFFF
-#endif
-#if (G64PL >= G66PL) || (G64PL == 0)
-#define  MG66_14PL   ~(1 << 3)
-#else
-#define  MG66_14PL   0xFFFF
-#endif
-#if (G65PL >= G66PL) || (G65PL == 0)
-#define  MG66_15PL   ~(1 << 4)
-#else
-#define  MG66_15PL   0xFFFF
-#endif
-#if (G67PL >= G66PL) || (G67PL == 0)
-#define  MG66_17PL   ~(1 << 6)
-#else
-#define  MG66_17PL   0xFFFF
-#endif
-#if (G68PL >= G66PL) || (G68PL == 0)
-#define  MG66_18PL   ~(1 << 7)
-#else
-#define  MG66_18PL   0xFFFF
-#endif
-#define  MG66_16PL   0x00DF
-#define  MG66    (MG66_11PL & MG66_12PL & MG66_13PL & MG66_14PL & \
-                  MG66_15PL & MG66_16PL & MG66_17PL & MG66_18PL)
-// End of MG66:
-
-// Beginning of MG67:
-#if (G61PL >= G67PL) || (G61PL == 0)
-#define  MG67_11PL   ~(1)
-#else
-#define  MG67_11PL   0xFFFF
-#endif
-#if (G62PL >= G67PL) || (G62PL == 0)
-#define  MG67_12PL   ~(1 << 1)
-#else
-#define  MG67_12PL   0xFFFF
-#endif
-#if (G63PL >= G67PL) || (G63PL == 0)
-#define  MG67_13PL   ~(1 << 2)
-#else
-#define  MG67_13PL   0xFFFF
-#endif
-#if (G64PL >= G67PL) || (G64PL == 0)
-#define  MG67_14PL   ~(1 << 3)
-#else
-#define  MG67_14PL   0xFFFF
-#endif
-#if (G65PL >= G67PL) || (G65PL == 0)
-#define  MG67_15PL   ~(1 << 4)
-#else
-#define  MG67_15PL   0xFFFF
-#endif
-#if (G66PL >= G67PL) || (G66PL == 0)
-#define  MG67_16PL   ~(1 << 5)
-#else
-#define  MG67_16PL   0xFFFF
-#endif
-#if (G68PL >= G67PL) || (G68PL == 0)
-#define  MG67_18PL   ~(1 << 7)
-#else
-#define  MG67_18PL   0xFFFF
-#endif
-#define  MG67_17PL   0x00BF
-#define  MG67    (MG67_11PL & MG67_12PL & MG67_13PL & MG67_14PL & \
-                  MG67_15PL & MG67_16PL & MG67_17PL & MG67_18PL)
-// End of MG67:
-
-// Beginning of MG68:
-#if (G61PL >= G68PL) || (G61PL == 0)
-#define  MG68_11PL   ~(1)
-#else
-#define  MG68_11PL   0xFFFF
-#endif
-#if (G62PL >= G68PL) || (G62PL == 0)
-#define  MG68_12PL   ~(1 << 1)
-#else
-#define  MG68_12PL   0xFFFF
-#endif
-#if (G63PL >= G68PL) || (G63PL == 0)
-#define  MG68_13PL   ~(1 << 2)
-#else
-#define  MG68_13PL   0xFFFF
-#endif
-#if (G64PL >= G68PL) || (G64PL == 0)
-#define  MG68_14PL   ~(1 << 3)
-#else
-#define  MG68_14PL   0xFFFF
-#endif
-#if (G65PL >= G68PL) || (G65PL == 0)
-#define  MG68_15PL   ~(1 << 4)
-#else
-#define  MG68_15PL   0xFFFF
-#endif
-#if (G66PL >= G68PL) || (G66PL == 0)
-#define  MG68_16PL   ~(1 << 5)
-#else
-#define  MG68_16PL   0xFFFF
-#endif
-#if (G67PL >= G68PL) || (G67PL == 0)
-#define  MG68_17PL   ~(1 << 6)
-#else
-#define  MG68_17PL   0xFFFF
-#endif
-#define  MG68_18PL   0x007F
-#define  MG68    (MG68_11PL & MG68_12PL & MG68_13PL & MG68_14PL & \
-                  MG68_15PL & MG68_16PL & MG68_17PL & MG68_18PL)
-// End of MG68:
-
-//-------------------------------------------------------------------------------
-// Automatically generate PIEIER1 interrupt masks MG71 to MG78:
-//
-
-// Beginning of MG71:
-#if (G72PL >= G71PL) || (G72PL == 0)
-#define  MG71_12PL   ~(1 << 1)
-#else
-#define  MG71_12PL   0xFFFF
-#endif
-#if (G73PL >= G71PL) || (G73PL == 0)
-#define  MG71_13PL   ~(1 << 2)
-#else
-#define  MG71_13PL   0xFFFF
-#endif
-#if (G74PL >= G71PL) || (G74PL == 0)
-#define  MG71_14PL   ~(1 << 3)
-#else
-#define  MG71_14PL   0xFFFF
-#endif
-#if (G75PL >= G71PL) || (G75PL == 0)
-#define  MG71_15PL   ~(1 << 4)
-#else
-#define  MG71_15PL   0xFFFF
-#endif
-#if (G76PL >= G71PL) || (G76PL == 0)
-#define  MG71_16PL   ~(1 << 5)
-#else
-#define  MG71_16PL   0xFFFF
-#endif
-#if (G77PL >= G71PL) || (G77PL == 0)
-#define  MG71_17PL   ~(1 << 6)
-#else
-#define  MG71_17PL   0xFFFF
-#endif
-#if (G78PL >= G71PL) || (G78PL == 0)
-#define  MG71_18PL   ~(1 << 7)
-#else
-#define  MG71_18PL   0xFFFF
-#endif
-#define  MG71_11PL   0x00FE
-#define  MG71    (MG71_11PL & MG71_12PL & MG71_13PL & MG71_14PL & \
-                  MG71_15PL & MG71_16PL & MG71_17PL & MG71_18PL)
-// End of MG71:
-
-// Beginning of MG72:
-#if (G71PL >= G72PL) || (G71PL == 0)
-#define  MG72_11PL   ~(1)
-#else
-#define  MG72_11PL   0xFFFF
-#endif
-#if (G73PL >= G72PL) || (G73PL == 0)
-#define  MG72_13PL   ~(1 << 2)
-#else
-#define  MG72_13PL   0xFFFF
-#endif
-#if (G74PL >= G72PL) || (G74PL == 0)
-#define  MG72_14PL   ~(1 << 3)
-#else
-#define  MG72_14PL   0xFFFF
-#endif
-#if (G75PL >= G72PL) || (G75PL == 0)
-#define  MG72_15PL   ~(1 << 4)
-#else
-#define  MG72_15PL   0xFFFF
-#endif
-#if (G76PL >= G72PL) || (G76PL == 0)
-#define  MG72_16PL   ~(1 << 5)
-#else
-#define  MG72_16PL   0xFFFF
-#endif
-#if (G77PL >= G72PL) || (G77PL == 0)
-#define  MG72_17PL   ~(1 << 6)
-#else
-#define  MG72_17PL   0xFFFF
-#endif
-#if (G78PL >= G72PL) || (G78PL == 0)
-#define  MG72_18PL   ~(1 << 7)
-#else
-#define  MG72_18PL   0xFFFF
-#endif
-#define  MG72_12PL   0x00FD
-#define  MG72    (MG72_11PL & MG72_12PL & MG72_13PL & MG72_14PL & \
-                  MG72_15PL & MG72_16PL & MG72_17PL & MG72_18PL)
-// End of MG72:
-
-// Beginning of MG73:
-#if (G71PL >= G73PL) || (G71PL == 0)
-#define  MG73_11PL   ~(1)
-#else
-#define  MG73_11PL   0xFFFF
-#endif
-#if (G72PL >= G73PL) || (G72PL == 0)
-#define  MG73_12PL   ~(1 << 1)
-#else
-#define  MG73_12PL   0xFFFF
-#endif
-#if (G74PL >= G73PL) || (G74PL == 0)
-#define  MG73_14PL   ~(1 << 3)
-#else
-#define  MG73_14PL   0xFFFF
-#endif
-#if (G75PL >= G73PL) || (G75PL == 0)
-#define  MG73_15PL   ~(1 << 4)
-#else
-#define  MG73_15PL   0xFFFF
-#endif
-#if (G76PL >= G73PL) || (G76PL == 0)
-#define  MG73_16PL   ~(1 << 5)
-#else
-#define  MG73_16PL   0xFFFF
-#endif
-#if (G77PL >= G73PL) || (G77PL == 0)
-#define  MG73_17PL   ~(1 << 6)
-#else
-#define  MG73_17PL   0xFFFF
-#endif
-#if (G78PL >= G73PL) || (G78PL == 0)
-#define  MG73_18PL   ~(1 << 7)
-#else
-#define  MG73_18PL   0xFFFF
-#endif
-#define  MG73_13PL   0x00FB
-#define  MG73    (MG73_11PL & MG73_12PL & MG73_13PL & MG73_14PL & \
-                  MG73_15PL & MG73_16PL & MG73_17PL & MG73_18PL)
-// End of MG73:
-
-// Beginning of MG74:
-#if (G71PL >= G74PL) || (G71PL == 0)
-#define  MG74_11PL   ~(1)
-#else
-#define  MG74_11PL   0xFFFF
-#endif
-#if (G72PL >= G74PL) || (G72PL == 0)
-#define  MG74_12PL   ~(1 << 1)
-#else
-#define  MG74_12PL   0xFFFF
-#endif
-#if (G73PL >= G74PL) || (G73PL == 0)
-#define  MG74_13PL   ~(1 << 2)
-#else
-#define  MG74_13PL   0xFFFF
-#endif
-#if (G75PL >= G74PL) || (G75PL == 0)
-#define  MG74_15PL   ~(1 << 4)
-#else
-#define  MG74_15PL   0xFFFF
-#endif
-#if (G76PL >= G74PL) || (G76PL == 0)
-#define  MG74_16PL   ~(1 << 5)
-#else
-#define  MG74_16PL   0xFFFF
-#endif
-#if (G77PL >= G74PL) || (G77PL == 0)
-#define  MG74_17PL   ~(1 << 6)
-#else
-#define  MG74_17PL   0xFFFF
-#endif
-#if (G78PL >= G74PL) || (G78PL == 0)
-#define  MG74_18PL   ~(1 << 7)
-#else
-#define  MG74_18PL   0xFFFF
-#endif
-#define  MG74_14PL   0x00F7
-#define  MG74    (MG74_11PL & MG74_12PL & MG74_13PL & MG74_14PL & \
-                  MG74_15PL & MG74_16PL & MG74_17PL & MG74_18PL)
-// End of MG74:
-
-// Beginning of MG75:
-#if (G71PL >= G75PL) || (G71PL == 0)
-#define  MG75_11PL   ~(1)
-#else
-#define  MG75_11PL   0xFFFF
-#endif
-#if (G72PL >= G75PL) || (G72PL == 0)
-#define  MG75_12PL   ~(1 << 1)
-#else
-#define  MG75_12PL   0xFFFF
-#endif
-#if (G73PL >= G75PL) || (G73PL == 0)
-#define  MG75_13PL   ~(1 << 2)
-#else
-#define  MG75_13PL   0xFFFF
-#endif
-#if (G74PL >= G75PL) || (G74PL == 0)
-#define  MG75_14PL   ~(1 << 3)
-#else
-#define  MG75_14PL   0xFFFF
-#endif
-#if (G76PL >= G75PL) || (G76PL == 0)
-#define  MG75_16PL   ~(1 << 5)
-#else
-#define  MG75_16PL   0xFFFF
-#endif
-#if (G77PL >= G75PL) || (G77PL == 0)
-#define  MG75_17PL   ~(1 << 6)
-#else
-#define  MG75_17PL   0xFFFF
-#endif
-#if (G78PL >= G75PL) || (G78PL == 0)
-#define  MG75_18PL   ~(1 << 7)
-#else
-#define  MG75_18PL   0xFFFF
-#endif
-#define  MG75_15PL   0x00EF
-#define  MG75    (MG75_11PL & MG75_12PL & MG75_13PL & MG75_14PL & \
-                  MG75_15PL & MG75_16PL & MG75_17PL & MG75_18PL)
-// End of MG75:
-
-// Beginning of MG76:
-#if (G71PL >= G76PL) || (G71PL == 0)
-#define  MG76_11PL   ~(1)
-#else
-#define  MG76_11PL   0xFFFF
-#endif
-#if (G72PL >= G76PL) || (G72PL == 0)
-#define  MG76_12PL   ~(1 << 1)
-#else
-#define  MG76_12PL   0xFFFF
-#endif
-#if (G73PL >= G76PL) || (G73PL == 0)
-#define  MG76_13PL   ~(1 << 2)
-#else
-#define  MG76_13PL   0xFFFF
-#endif
-#if (G74PL >= G76PL) || (G74PL == 0)
-#define  MG76_14PL   ~(1 << 3)
-#else
-#define  MG76_14PL   0xFFFF
-#endif
-#if (G75PL >= G76PL) || (G75PL == 0)
-#define  MG76_15PL   ~(1 << 4)
-#else
-#define  MG76_15PL   0xFFFF
-#endif
-#if (G77PL >= G76PL) || (G77PL == 0)
-#define  MG76_17PL   ~(1 << 6)
-#else
-#define  MG76_17PL   0xFFFF
-#endif
-#if (G78PL >= G76PL) || (G78PL == 0)
-#define  MG76_18PL   ~(1 << 7)
-#else
-#define  MG76_18PL   0xFFFF
-#endif
-#define  MG76_16PL   0x00DF
-#define  MG76    (MG76_11PL & MG76_12PL & MG76_13PL & MG76_14PL & \
-                  MG76_15PL & MG76_16PL & MG76_17PL & MG76_18PL)
-// End of MG76:
-
-// Beginning of MG77:
-#if (G71PL >= G77PL) || (G71PL == 0)
-#define  MG77_11PL   ~(1)
-#else
-#define  MG77_11PL   0xFFFF
-#endif
-#if (G72PL >= G77PL) || (G72PL == 0)
-#define  MG77_12PL   ~(1 << 1)
-#else
-#define  MG77_12PL   0xFFFF
-#endif
-#if (G73PL >= G77PL) || (G73PL == 0)
-#define  MG77_13PL   ~(1 << 2)
-#else
-#define  MG77_13PL   0xFFFF
-#endif
-#if (G74PL >= G77PL) || (G74PL == 0)
-#define  MG77_14PL   ~(1 << 3)
-#else
-#define  MG77_14PL   0xFFFF
-#endif
-#if (G75PL >= G77PL) || (G75PL == 0)
-#define  MG77_15PL   ~(1 << 4)
-#else
-#define  MG77_15PL   0xFFFF
-#endif
-#if (G76PL >= G77PL) || (G76PL == 0)
-#define  MG77_16PL   ~(1 << 5)
-#else
-#define  MG77_16PL   0xFFFF
-#endif
-#if (G78PL >= G77PL) || (G78PL == 0)
-#define  MG77_18PL   ~(1 << 7)
-#else
-#define  MG77_18PL   0xFFFF
-#endif
-#define  MG77_17PL   0x00BF
-#define  MG77    (MG77_11PL & MG77_12PL & MG77_13PL & MG77_14PL & \
-                  MG77_15PL & MG77_16PL & MG77_17PL & MG77_18PL)
-// End of MG77:
-
-// Beginning of MG78:
-#if (G71PL >= G78PL) || (G71PL == 0)
-#define  MG78_11PL   ~(1)
-#else
-#define  MG78_11PL   0xFFFF
-#endif
-#if (G72PL >= G78PL) || (G72PL == 0)
-#define  MG78_12PL   ~(1 << 1)
-#else
-#define  MG78_12PL   0xFFFF
-#endif
-#if (G73PL >= G78PL) || (G73PL == 0)
-#define  MG78_13PL   ~(1 << 2)
-#else
-#define  MG78_13PL   0xFFFF
-#endif
-#if (G74PL >= G78PL) || (G74PL == 0)
-#define  MG78_14PL   ~(1 << 3)
-#else
-#define  MG78_14PL   0xFFFF
-#endif
-#if (G75PL >= G78PL) || (G75PL == 0)
-#define  MG78_15PL   ~(1 << 4)
-#else
-#define  MG78_15PL   0xFFFF
-#endif
-#if (G76PL >= G78PL) || (G76PL == 0)
-#define  MG78_16PL   ~(1 << 5)
-#else
-#define  MG78_16PL   0xFFFF
-#endif
-#if (G77PL >= G78PL) || (G77PL == 0)
-#define  MG78_17PL   ~(1 << 6)
-#else
-#define  MG78_17PL   0xFFFF
-#endif
-#define  MG78_18PL   0x007F
-#define  MG78    (MG78_11PL & MG78_12PL & MG78_13PL & MG78_14PL & \
-                  MG78_15PL & MG78_16PL & MG78_17PL & MG78_18PL)
-// End of MG78:
-
-//-------------------------------------------------------------------------------
-// Automatically generate PIEIER1 interrupt masks MG81 to MG88:
-//
-
-// Beginning of MG81:
-#if (G82PL >= G81PL) || (G82PL == 0)
-#define  MG81_12PL   ~(1 << 1)
-#else
-#define  MG81_12PL   0xFFFF
-#endif
-#if (G83PL >= G81PL) || (G83PL == 0)
-#define  MG81_13PL   ~(1 << 2)
-#else
-#define  MG81_13PL   0xFFFF
-#endif
-#if (G84PL >= G81PL) || (G84PL == 0)
-#define  MG81_14PL   ~(1 << 3)
-#else
-#define  MG81_14PL   0xFFFF
-#endif
-#if (G85PL >= G81PL) || (G85PL == 0)
-#define  MG81_15PL   ~(1 << 4)
-#else
-#define  MG81_15PL   0xFFFF
-#endif
-#if (G86PL >= G81PL) || (G86PL == 0)
-#define  MG81_16PL   ~(1 << 5)
-#else
-#define  MG81_16PL   0xFFFF
-#endif
-#if (G87PL >= G81PL) || (G87PL == 0)
-#define  MG81_17PL   ~(1 << 6)
-#else
-#define  MG81_17PL   0xFFFF
-#endif
-#if (G88PL >= G81PL) || (G88PL == 0)
-#define  MG81_18PL   ~(1 << 7)
-#else
-#define  MG81_18PL   0xFFFF
-#endif
-#define  MG81_11PL   0x00FE
-#define  MG81    (MG81_11PL & MG81_12PL & MG81_13PL & MG81_14PL & \
-                  MG81_15PL & MG81_16PL & MG81_17PL & MG81_18PL)
-// End of MG81:
-
-// Beginning of MG82:
-#if (G81PL >= G82PL) || (G81PL == 0)
-#define  MG82_11PL   ~(1)
-#else
-#define  MG82_11PL   0xFFFF
-#endif
-#if (G83PL >= G82PL) || (G83PL == 0)
-#define  MG82_13PL   ~(1 << 2)
-#else
-#define  MG82_13PL   0xFFFF
-#endif
-#if (G84PL >= G82PL) || (G84PL == 0)
-#define  MG82_14PL   ~(1 << 3)
-#else
-#define  MG82_14PL   0xFFFF
-#endif
-#if (G85PL >= G82PL) || (G85PL == 0)
-#define  MG82_15PL   ~(1 << 4)
-#else
-#define  MG82_15PL   0xFFFF
-#endif
-#if (G86PL >= G82PL) || (G86PL == 0)
-#define  MG82_16PL   ~(1 << 5)
-#else
-#define  MG82_16PL   0xFFFF
-#endif
-#if (G87PL >= G82PL) || (G87PL == 0)
-#define  MG82_17PL   ~(1 << 6)
-#else
-#define  MG82_17PL   0xFFFF
-#endif
-#if (G88PL >= G82PL) || (G88PL == 0)
-#define  MG82_18PL   ~(1 << 7)
-#else
-#define  MG82_18PL   0xFFFF
-#endif
-#define  MG82_12PL   0x00FD
-#define  MG82    (MG82_11PL & MG82_12PL & MG82_13PL & MG82_14PL & \
-                  MG82_15PL & MG82_16PL & MG82_17PL & MG82_18PL)
-// End of MG82:
-
-// Beginning of MG83:
-#if (G81PL >= G83PL) || (G81PL == 0)
-#define  MG83_11PL   ~(1)
-#else
-#define  MG83_11PL   0xFFFF
-#endif
-#if (G82PL >= G83PL) || (G82PL == 0)
-#define  MG83_12PL   ~(1 << 1)
-#else
-#define  MG83_12PL   0xFFFF
-#endif
-#if (G84PL >= G83PL) || (G84PL == 0)
-#define  MG83_14PL   ~(1 << 3)
-#else
-#define  MG83_14PL   0xFFFF
-#endif
-#if (G85PL >= G83PL) || (G85PL == 0)
-#define  MG83_15PL   ~(1 << 4)
-#else
-#define  MG83_15PL   0xFFFF
-#endif
-#if (G86PL >= G83PL) || (G86PL == 0)
-#define  MG83_16PL   ~(1 << 5)
-#else
-#define  MG83_16PL   0xFFFF
-#endif
-#if (G87PL >= G83PL) || (G87PL == 0)
-#define  MG83_17PL   ~(1 << 6)
-#else
-#define  MG83_17PL   0xFFFF
-#endif
-#if (G88PL >= G83PL) || (G88PL == 0)
-#define  MG83_18PL   ~(1 << 7)
-#else
-#define  MG83_18PL   0xFFFF
-#endif
-#define  MG83_13PL   0x00FB
-#define  MG83    (MG83_11PL & MG83_12PL & MG83_13PL & MG83_14PL & \
-                  MG83_15PL & MG83_16PL & MG83_17PL & MG83_18PL)
-// End of MG83:
-
-// Beginning of MG84:
-#if (G81PL >= G84PL) || (G81PL == 0)
-#define  MG84_11PL   ~(1)
-#else
-#define  MG84_11PL   0xFFFF
-#endif
-#if (G82PL >= G84PL) || (G82PL == 0)
-#define  MG84_12PL   ~(1 << 1)
-#else
-#define  MG84_12PL   0xFFFF
-#endif
-#if (G83PL >= G84PL) || (G83PL == 0)
-#define  MG84_13PL   ~(1 << 2)
-#else
-#define  MG84_13PL   0xFFFF
-#endif
-#if (G85PL >= G84PL) || (G85PL == 0)
-#define  MG84_15PL   ~(1 << 4)
-#else
-#define  MG84_15PL   0xFFFF
-#endif
-#if (G86PL >= G84PL) || (G86PL == 0)
-#define  MG84_16PL   ~(1 << 5)
-#else
-#define  MG84_16PL   0xFFFF
-#endif
-#if (G87PL >= G84PL) || (G87PL == 0)
-#define  MG84_17PL   ~(1 << 6)
-#else
-#define  MG84_17PL   0xFFFF
-#endif
-#if (G88PL >= G84PL) || (G88PL == 0)
-#define  MG84_18PL   ~(1 << 7)
-#else
-#define  MG84_18PL   0xFFFF
-#endif
-#define  MG84_14PL   0x00F7
-#define  MG84    (MG84_11PL & MG84_12PL & MG84_13PL & MG84_14PL & \
-                  MG84_15PL & MG84_16PL & MG84_17PL & MG84_18PL)
-// End of MG84:
-
-// Beginning of MG85:
-#if (G81PL >= G85PL) || (G81PL == 0)
-#define  MG85_11PL   ~(1)
-#else
-#define  MG85_11PL   0xFFFF
-#endif
-#if (G82PL >= G85PL) || (G82PL == 0)
-#define  MG85_12PL   ~(1 << 1)
-#else
-#define  MG85_12PL   0xFFFF
-#endif
-#if (G83PL >= G85PL) || (G83PL == 0)
-#define  MG85_13PL   ~(1 << 2)
-#else
-#define  MG85_13PL   0xFFFF
-#endif
-#if (G84PL >= G85PL) || (G84PL == 0)
-#define  MG85_14PL   ~(1 << 3)
-#else
-#define  MG85_14PL   0xFFFF
-#endif
-#if (G86PL >= G85PL) || (G86PL == 0)
-#define  MG85_16PL   ~(1 << 5)
-#else
-#define  MG85_16PL   0xFFFF
-#endif
-#if (G87PL >= G85PL) || (G87PL == 0)
-#define  MG85_17PL   ~(1 << 6)
-#else
-#define  MG85_17PL   0xFFFF
-#endif
-#if (G88PL >= G85PL) || (G88PL == 0)
-#define  MG85_18PL   ~(1 << 7)
-#else
-#define  MG85_18PL   0xFFFF
-#endif
-#define  MG85_15PL   0x00EF
-#define  MG85    (MG85_11PL & MG85_12PL & MG85_13PL & MG85_14PL & \
-                  MG85_15PL & MG85_16PL & MG85_17PL & MG85_18PL)
-// End of MG85:
-
-// Beginning of MG86:
-#if (G81PL >= G86PL) || (G81PL == 0)
-#define  MG86_11PL   ~(1)
-#else
-#define  MG86_11PL   0xFFFF
-#endif
-#if (G82PL >= G86PL) || (G82PL == 0)
-#define  MG86_12PL   ~(1 << 1)
-#else
-#define  MG86_12PL   0xFFFF
-#endif
-#if (G83PL >= G86PL) || (G83PL == 0)
-#define  MG86_13PL   ~(1 << 2)
-#else
-#define  MG86_13PL   0xFFFF
-#endif
-#if (G84PL >= G86PL) || (G84PL == 0)
-#define  MG86_14PL   ~(1 << 3)
-#else
-#define  MG86_14PL   0xFFFF
-#endif
-#if (G85PL >= G86PL) || (G85PL == 0)
-#define  MG86_15PL   ~(1 << 4)
-#else
-#define  MG86_15PL   0xFFFF
-#endif
-#if (G87PL >= G86PL) || (G87PL == 0)
-#define  MG86_17PL   ~(1 << 6)
-#else
-#define  MG86_17PL   0xFFFF
-#endif
-#if (G88PL >= G86PL) || (G88PL == 0)
-#define  MG86_18PL   ~(1 << 7)
-#else
-#define  MG86_18PL   0xFFFF
-#endif
-#define  MG86_16PL   0x00DF
-#define  MG86    (MG86_11PL & MG86_12PL & MG86_13PL & MG86_14PL & \
-                  MG86_15PL & MG86_16PL & MG86_17PL & MG86_18PL)
-// End of MG86:
-
-// Beginning of MG87:
-#if (G81PL >= G87PL) || (G81PL == 0)
-#define  MG87_11PL   ~(1)
-#else
-#define  MG87_11PL   0xFFFF
-#endif
-#if (G82PL >= G87PL) || (G82PL == 0)
-#define  MG87_12PL   ~(1 << 1)
-#else
-#define  MG87_12PL   0xFFFF
-#endif
-#if (G83PL >= G87PL) || (G83PL == 0)
-#define  MG87_13PL   ~(1 << 2)
-#else
-#define  MG87_13PL   0xFFFF
-#endif
-#if (G84PL >= G87PL) || (G84PL == 0)
-#define  MG87_14PL   ~(1 << 3)
-#else
-#define  MG87_14PL   0xFFFF
-#endif
-#if (G85PL >= G87PL) || (G85PL == 0)
-#define  MG87_15PL   ~(1 << 4)
-#else
-#define  MG87_15PL   0xFFFF
-#endif
-#if (G86PL >= G87PL) || (G86PL == 0)
-#define  MG87_16PL   ~(1 << 5)
-#else
-#define  MG87_16PL   0xFFFF
-#endif
-#if (G88PL >= G87PL) || (G88PL == 0)
-#define  MG87_18PL   ~(1 << 7)
-#else
-#define  MG87_18PL   0xFFFF
-#endif
-#define  MG87_17PL   0x00BF
-#define  MG87    (MG87_11PL & MG87_12PL & MG87_13PL & MG87_14PL & \
-                  MG87_15PL & MG87_16PL & MG87_17PL & MG87_18PL)
-// End of MG87:
-
-// Beginning of MG88:
-#if (G81PL >= G88PL) || (G81PL == 0)
-#define  MG88_11PL   ~(1)
-#else
-#define  MG88_11PL   0xFFFF
-#endif
-#if (G82PL >= G88PL) || (G82PL == 0)
-#define  MG88_12PL   ~(1 << 1)
-#else
-#define  MG88_12PL   0xFFFF
-#endif
-#if (G83PL >= G88PL) || (G83PL == 0)
-#define  MG88_13PL   ~(1 << 2)
-#else
-#define  MG88_13PL   0xFFFF
-#endif
-#if (G84PL >= G88PL) || (G84PL == 0)
-#define  MG88_14PL   ~(1 << 3)
-#else
-#define  MG88_14PL   0xFFFF
-#endif
-#if (G85PL >= G88PL) || (G85PL == 0)
-#define  MG88_15PL   ~(1 << 4)
-#else
-#define  MG88_15PL   0xFFFF
-#endif
-#if (G86PL >= G88PL) || (G86PL == 0)
-#define  MG88_16PL   ~(1 << 5)
-#else
-#define  MG88_16PL   0xFFFF
-#endif
-#if (G87PL >= G88PL) || (G87PL == 0)
-#define  MG88_17PL   ~(1 << 6)
-#else
-#define  MG88_17PL   0xFFFF
-#endif
-#define  MG88_18PL   0x007F
-#define  MG88    (MG88_11PL & MG88_12PL & MG88_13PL & MG88_14PL & \
-                  MG88_15PL & MG88_16PL & MG88_17PL & MG88_18PL)
-// End of MG88:
-
-//-------------------------------------------------------------------------------
-// Automatically generate PIEIER1 interrupt masks MG91 to MG98:
-//
-
-// Beginning of MG91:
-#if (G92PL >= G91PL) || (G92PL == 0)
-#define  MG91_12PL   ~(1 << 1)
-#else
-#define  MG91_12PL   0xFFFF
-#endif
-#if (G93PL >= G91PL) || (G93PL == 0)
-#define  MG91_13PL   ~(1 << 2)
-#else
-#define  MG91_13PL   0xFFFF
-#endif
-#if (G94PL >= G91PL) || (G94PL == 0)
-#define  MG91_14PL   ~(1 << 3)
-#else
-#define  MG91_14PL   0xFFFF
-#endif
-#if (G95PL >= G91PL) || (G95PL == 0)
-#define  MG91_15PL   ~(1 << 4)
-#else
-#define  MG91_15PL   0xFFFF
-#endif
-#if (G96PL >= G91PL) || (G96PL == 0)
-#define  MG91_16PL   ~(1 << 5)
-#else
-#define  MG91_16PL   0xFFFF
-#endif
-#if (G97PL >= G91PL) || (G97PL == 0)
-#define  MG91_17PL   ~(1 << 6)
-#else
-#define  MG91_17PL   0xFFFF
-#endif
-#if (G98PL >= G91PL) || (G98PL == 0)
-#define  MG91_18PL   ~(1 << 7)
-#else
-#define  MG91_18PL   0xFFFF
-#endif
-#define  MG91_11PL   0x00FE
-#define  MG91    (MG91_11PL & MG91_12PL & MG91_13PL & MG91_14PL & \
-                  MG91_15PL & MG91_16PL & MG91_17PL & MG91_18PL)
-// End of MG91:
-
-// Beginning of MG92:
-#if (G91PL >= G92PL) || (G91PL == 0)
-#define  MG92_11PL   ~(1)
-#else
-#define  MG92_11PL   0xFFFF
-#endif
-#if (G93PL >= G92PL) || (G93PL == 0)
-#define  MG92_13PL   ~(1 << 2)
-#else
-#define  MG92_13PL   0xFFFF
-#endif
-#if (G94PL >= G92PL) || (G94PL == 0)
-#define  MG92_14PL   ~(1 << 3)
-#else
-#define  MG92_14PL   0xFFFF
-#endif
-#if (G95PL >= G92PL) || (G95PL == 0)
-#define  MG92_15PL   ~(1 << 4)
-#else
-#define  MG92_15PL   0xFFFF
-#endif
-#if (G96PL >= G92PL) || (G96PL == 0)
-#define  MG92_16PL   ~(1 << 5)
-#else
-#define  MG92_16PL   0xFFFF
-#endif
-#if (G97PL >= G92PL) || (G97PL == 0)
-#define  MG92_17PL   ~(1 << 6)
-#else
-#define  MG92_17PL   0xFFFF
-#endif
-#if (G98PL >= G92PL) || (G98PL == 0)
-#define  MG92_18PL   ~(1 << 7)
-#else
-#define  MG92_18PL   0xFFFF
-#endif
-#define  MG92_12PL   0x00FD
-#define  MG92    (MG92_11PL & MG92_12PL & MG92_13PL & MG92_14PL & \
-                  MG92_15PL & MG92_16PL & MG92_17PL & MG92_18PL)
-// End of MG92:
-
-// Beginning of MG93:
-#if (G91PL >= G93PL) || (G91PL == 0)
-#define  MG93_11PL   ~(1)
-#else
-#define  MG93_11PL   0xFFFF
-#endif
-#if (G92PL >= G93PL) || (G92PL == 0)
-#define  MG93_12PL   ~(1 << 1)
-#else
-#define  MG93_12PL   0xFFFF
-#endif
-#if (G94PL >= G93PL) || (G94PL == 0)
-#define  MG93_14PL   ~(1 << 3)
-#else
-#define  MG93_14PL   0xFFFF
-#endif
-#if (G95PL >= G93PL) || (G95PL == 0)
-#define  MG93_15PL   ~(1 << 4)
-#else
-#define  MG93_15PL   0xFFFF
-#endif
-#if (G96PL >= G93PL) || (G96PL == 0)
-#define  MG93_16PL   ~(1 << 5)
-#else
-#define  MG93_16PL   0xFFFF
-#endif
-#if (G97PL >= G93PL) || (G97PL == 0)
-#define  MG93_17PL   ~(1 << 6)
-#else
-#define  MG93_17PL   0xFFFF
-#endif
-#if (G98PL >= G93PL) || (G98PL == 0)
-#define  MG93_18PL   ~(1 << 7)
-#else
-#define  MG93_18PL   0xFFFF
-#endif
-#define  MG93_13PL   0x00FB
-#define  MG93    (MG93_11PL & MG93_12PL & MG93_13PL & MG93_14PL & \
-                  MG93_15PL & MG93_16PL & MG93_17PL & MG93_18PL)
-// End of MG93:
-
-// Beginning of MG94:
-#if (G91PL >= G94PL) || (G91PL == 0)
-#define  MG94_11PL   ~(1)
-#else
-#define  MG94_11PL   0xFFFF
-#endif
-#if (G92PL >= G94PL) || (G92PL == 0)
-#define  MG94_12PL   ~(1 << 1)
-#else
-#define  MG94_12PL   0xFFFF
-#endif
-#if (G93PL >= G94PL) || (G93PL == 0)
-#define  MG94_13PL   ~(1 << 2)
-#else
-#define  MG94_13PL   0xFFFF
-#endif
-#if (G95PL >= G94PL) || (G95PL == 0)
-#define  MG94_15PL   ~(1 << 4)
-#else
-#define  MG94_15PL   0xFFFF
-#endif
-#if (G96PL >= G94PL) || (G96PL == 0)
-#define  MG94_16PL   ~(1 << 5)
-#else
-#define  MG94_16PL   0xFFFF
-#endif
-#if (G97PL >= G94PL) || (G97PL == 0)
-#define  MG94_17PL   ~(1 << 6)
-#else
-#define  MG94_17PL   0xFFFF
-#endif
-#if (G98PL >= G94PL) || (G98PL == 0)
-#define  MG94_18PL   ~(1 << 7)
-#else
-#define  MG94_18PL   0xFFFF
-#endif
-#define  MG94_14PL   0x00F7
-#define  MG94    (MG94_11PL & MG94_12PL & MG94_13PL & MG94_14PL & \
-                  MG94_15PL & MG94_16PL & MG94_17PL & MG94_18PL)
-// End of MG94:
-
-// Beginning of MG95:
-#if (G91PL >= G95PL) || (G91PL == 0)
-#define  MG95_11PL   ~(1)
-#else
-#define  MG95_11PL   0xFFFF
-#endif
-#if (G92PL >= G95PL) || (G92PL == 0)
-#define  MG95_12PL   ~(1 << 1)
-#else
-#define  MG95_12PL   0xFFFF
-#endif
-#if (G93PL >= G95PL) || (G93PL == 0)
-#define  MG95_13PL   ~(1 << 2)
-#else
-#define  MG95_13PL   0xFFFF
-#endif
-#if (G94PL >= G95PL) || (G94PL == 0)
-#define  MG95_14PL   ~(1 << 3)
-#else
-#define  MG95_14PL   0xFFFF
-#endif
-#if (G96PL >= G95PL) || (G96PL == 0)
-#define  MG95_16PL   ~(1 << 5)
-#else
-#define  MG95_16PL   0xFFFF
-#endif
-#if (G97PL >= G95PL) || (G97PL == 0)
-#define  MG95_17PL   ~(1 << 6)
-#else
-#define  MG95_17PL   0xFFFF
-#endif
-#if (G98PL >= G95PL) || (G98PL == 0)
-#define  MG95_18PL   ~(1 << 7)
-#else
-#define  MG95_18PL   0xFFFF
-#endif
-#define  MG95_15PL   0x00EF
-#define  MG95    (MG95_11PL & MG95_12PL & MG95_13PL & MG95_14PL & \
-                  MG95_15PL & MG95_16PL & MG95_17PL & MG95_18PL)
-// End of MG95:
-
-// Beginning of MG96:
-#if (G91PL >= G96PL) || (G91PL == 0)
-#define  MG96_11PL   ~(1)
-#else
-#define  MG96_11PL   0xFFFF
-#endif
-#if (G92PL >= G96PL) || (G92PL == 0)
-#define  MG96_12PL   ~(1 << 1)
-#else
-#define  MG96_12PL   0xFFFF
-#endif
-#if (G93PL >= G96PL) || (G93PL == 0)
-#define  MG96_13PL   ~(1 << 2)
-#else
-#define  MG96_13PL   0xFFFF
-#endif
-#if (G94PL >= G96PL) || (G94PL == 0)
-#define  MG96_14PL   ~(1 << 3)
-#else
-#define  MG96_14PL   0xFFFF
-#endif
-#if (G95PL >= G96PL) || (G95PL == 0)
-#define  MG96_15PL   ~(1 << 4)
-#else
-#define  MG96_15PL   0xFFFF
-#endif
-#if (G97PL >= G96PL) || (G97PL == 0)
-#define  MG96_17PL   ~(1 << 6)
-#else
-#define  MG96_17PL   0xFFFF
-#endif
-#if (G98PL >= G96PL) || (G98PL == 0)
-#define  MG96_18PL   ~(1 << 7)
-#else
-#define  MG96_18PL   0xFFFF
-#endif
-#define  MG96_16PL   0x00DF
-#define  MG96    (MG96_11PL & MG96_12PL & MG96_13PL & MG96_14PL & \
-                  MG96_15PL & MG96_16PL & MG96_17PL & MG96_18PL)
-// End of MG96:
-
-// Beginning of MG97:
-#if (G91PL >= G97PL) || (G91PL == 0)
-#define  MG97_11PL   ~(1)
-#else
-#define  MG97_11PL   0xFFFF
-#endif
-#if (G92PL >= G97PL) || (G92PL == 0)
-#define  MG97_12PL   ~(1 << 1)
-#else
-#define  MG97_12PL   0xFFFF
-#endif
-#if (G93PL >= G97PL) || (G93PL == 0)
-#define  MG97_13PL   ~(1 << 2)
-#else
-#define  MG97_13PL   0xFFFF
-#endif
-#if (G94PL >= G97PL) || (G94PL == 0)
-#define  MG97_14PL   ~(1 << 3)
-#else
-#define  MG97_14PL   0xFFFF
-#endif
-#if (G95PL >= G97PL) || (G95PL == 0)
-#define  MG97_15PL   ~(1 << 4)
-#else
-#define  MG97_15PL   0xFFFF
-#endif
-#if (G96PL >= G97PL) || (G96PL == 0)
-#define  MG97_16PL   ~(1 << 5)
-#else
-#define  MG97_16PL   0xFFFF
-#endif
-#if (G98PL >= G97PL) || (G98PL == 0)
-#define  MG97_18PL   ~(1 << 7)
-#else
-#define  MG97_18PL   0xFFFF
-#endif
-#define  MG97_17PL   0x00BF
-#define  MG97    (MG97_11PL & MG97_12PL & MG97_13PL & MG97_14PL & \
-                  MG97_15PL & MG97_16PL & MG97_17PL & MG97_18PL)
-// End of MG97:
-
-// Beginning of MG98:
-#if (G91PL >= G98PL) || (G91PL == 0)
-#define  MG98_11PL   ~(1)
-#else
-#define  MG98_11PL   0xFFFF
-#endif
-#if (G92PL >= G98PL) || (G92PL == 0)
-#define  MG98_12PL   ~(1 << 1)
-#else
-#define  MG98_12PL   0xFFFF
-#endif
-#if (G93PL >= G98PL) || (G93PL == 0)
-#define  MG98_13PL   ~(1 << 2)
-#else
-#define  MG98_13PL   0xFFFF
-#endif
-#if (G94PL >= G98PL) || (G94PL == 0)
-#define  MG98_14PL   ~(1 << 3)
-#else
-#define  MG98_14PL   0xFFFF
-#endif
-#if (G95PL >= G98PL) || (G95PL == 0)
-#define  MG98_15PL   ~(1 << 4)
-#else
-#define  MG98_15PL   0xFFFF
-#endif
-#if (G96PL >= G98PL) || (G96PL == 0)
-#define  MG98_16PL   ~(1 << 5)
-#else
-#define  MG98_16PL   0xFFFF
-#endif
-#if (G97PL >= G98PL) || (G97PL == 0)
-#define  MG98_17PL   ~(1 << 6)
-#else
-#define  MG98_17PL   0xFFFF
-#endif
-#define  MG98_18PL   0x007F
-#define  MG98    (MG98_11PL & MG98_12PL & MG98_13PL & MG98_14PL & \
-                  MG98_15PL & MG98_16PL & MG98_17PL & MG98_18PL)
-// End of MG98:
-
-//-------------------------------------------------------------------------------
-// Automatically generate PIEIER1 interrupt masks MG101 to MG108:
-//
-
-// Beginning of MG101:
-#if (G102PL >= G101PL) || (G102PL == 0)
-#define  MG101_12PL   ~(1 << 1)
-#else
-#define  MG101_12PL   0xFFFF
-#endif
-#if (G103PL >= G101PL) || (G103PL == 0)
-#define  MG101_13PL   ~(1 << 2)
-#else
-#define  MG101_13PL   0xFFFF
-#endif
-#if (G104PL >= G101PL) || (G104PL == 0)
-#define  MG101_14PL   ~(1 << 3)
-#else
-#define  MG101_14PL   0xFFFF
-#endif
-#if (G105PL >= G101PL) || (G105PL == 0)
-#define  MG101_15PL   ~(1 << 4)
-#else
-#define  MG101_15PL   0xFFFF
-#endif
-#if (G106PL >= G101PL) || (G106PL == 0)
-#define  MG101_16PL   ~(1 << 5)
-#else
-#define  MG101_16PL   0xFFFF
-#endif
-#if (G107PL >= G101PL) || (G107PL == 0)
-#define  MG101_17PL   ~(1 << 6)
-#else
-#define  MG101_17PL   0xFFFF
-#endif
-#if (G108PL >= G101PL) || (G108PL == 0)
-#define  MG101_18PL   ~(1 << 7)
-#else
-#define  MG101_18PL   0xFFFF
-#endif
-#define  MG101_11PL   0x00FE
-#define  MG101   (MG101_11PL & MG101_12PL & MG101_13PL & MG101_14PL & \
-                  MG101_15PL & MG101_16PL & MG101_17PL & MG101_18PL)
-// End of MG101:
-
-// Beginning of MG102:
-#if (G101PL >= G102PL) || (G101PL == 0)
-#define  MG102_11PL   ~(1)
-#else
-#define  MG102_11PL   0xFFFF
-#endif
-#if (G103PL >= G102PL) || (G103PL == 0)
-#define  MG102_13PL   ~(1 << 2)
-#else
-#define  MG102_13PL   0xFFFF
-#endif
-#if (G104PL >= G102PL) || (G104PL == 0)
-#define  MG102_14PL   ~(1 << 3)
-#else
-#define  MG102_14PL   0xFFFF
-#endif
-#if (G105PL >= G102PL) || (G105PL == 0)
-#define  MG102_15PL   ~(1 << 4)
-#else
-#define  MG102_15PL   0xFFFF
-#endif
-#if (G106PL >= G102PL) || (G106PL == 0)
-#define  MG102_16PL   ~(1 << 5)
-#else
-#define  MG102_16PL   0xFFFF
-#endif
-#if (G107PL >= G102PL) || (G107PL == 0)
-#define  MG102_17PL   ~(1 << 6)
-#else
-#define  MG102_17PL   0xFFFF
-#endif
-#if (G108PL >= G102PL) || (G108PL == 0)
-#define  MG102_18PL   ~(1 << 7)
-#else
-#define  MG102_18PL   0xFFFF
-#endif
-#define  MG102_12PL   0x00FD
-#define  MG102   (MG102_11PL & MG102_12PL & MG102_13PL & MG102_14PL & \
-                  MG102_15PL & MG102_16PL & MG102_17PL & MG102_18PL)
-// End of MG102:
-
-// Beginning of MG103:
-#if (G101PL >= G103PL) || (G101PL == 0)
-#define  MG103_11PL   ~(1)
-#else
-#define  MG103_11PL   0xFFFF
-#endif
-#if (G102PL >= G103PL) || (G102PL == 0)
-#define  MG103_12PL   ~(1 << 1)
-#else
-#define  MG103_12PL   0xFFFF
-#endif
-#if (G104PL >= G103PL) || (G104PL == 0)
-#define  MG103_14PL   ~(1 << 3)
-#else
-#define  MG103_14PL   0xFFFF
-#endif
-#if (G105PL >= G103PL) || (G105PL == 0)
-#define  MG103_15PL   ~(1 << 4)
-#else
-#define  MG103_15PL   0xFFFF
-#endif
-#if (G106PL >= G103PL) || (G106PL == 0)
-#define  MG103_16PL   ~(1 << 5)
-#else
-#define  MG103_16PL   0xFFFF
-#endif
-#if (G107PL >= G103PL) || (G107PL == 0)
-#define  MG103_17PL   ~(1 << 6)
-#else
-#define  MG103_17PL   0xFFFF
-#endif
-#if (G108PL >= G103PL) || (G108PL == 0)
-#define  MG103_18PL   ~(1 << 7)
-#else
-#define  MG103_18PL   0xFFFF
-#endif
-#define  MG103_13PL   0x00FB
-#define  MG103    (MG103_11PL & MG103_12PL & MG103_13PL & MG103_14PL & \
-                  MG103_15PL & MG103_16PL & MG103_17PL & MG103_18PL)
-// End of MG103:
-
-// Beginning of MG104:
-#if (G101PL >= G104PL) || (G101PL == 0)
-#define  MG104_11PL   ~(1)
-#else
-#define  MG104_11PL   0xFFFF
-#endif
-#if (G102PL >= G104PL) || (G102PL == 0)
-#define  MG104_12PL   ~(1 << 1)
-#else
-#define  MG104_12PL   0xFFFF
-#endif
-#if (G103PL >= G104PL) || (G103PL == 0)
-#define  MG104_13PL   ~(1 << 2)
-#else
-#define  MG104_13PL   0xFFFF
-#endif
-#if (G105PL >= G104PL) || (G105PL == 0)
-#define  MG104_15PL   ~(1 << 4)
-#else
-#define  MG104_15PL   0xFFFF
-#endif
-#if (G106PL >= G104PL) || (G106PL == 0)
-#define  MG104_16PL   ~(1 << 5)
-#else
-#define  MG104_16PL   0xFFFF
-#endif
-#if (G107PL >= G104PL) || (G107PL == 0)
-#define  MG104_17PL   ~(1 << 6)
-#else
-#define  MG104_17PL   0xFFFF
-#endif
-#if (G108PL >= G104PL) || (G108PL == 0)
-#define  MG104_18PL   ~(1 << 7)
-#else
-#define  MG104_18PL   0xFFFF
-#endif
-#define  MG104_14PL   0x00F7
-#define  MG104   (MG104_11PL & MG104_12PL & MG104_13PL & MG104_14PL & \
-                  MG104_15PL & MG104_16PL & MG104_17PL & MG104_18PL)
-// End of MG104:
-
-// Beginning of MG105:
-#if (G101PL >= G105PL) || (G101PL == 0)
-#define  MG105_11PL   ~(1)
-#else
-#define  MG105_11PL   0xFFFF
-#endif
-#if (G102PL >= G105PL) || (G102PL == 0)
-#define  MG105_12PL   ~(1 << 1)
-#else
-#define  MG105_12PL   0xFFFF
-#endif
-#if (G103PL >= G105PL) || (G103PL == 0)
-#define  MG105_13PL   ~(1 << 2)
-#else
-#define  MG105_13PL   0xFFFF
-#endif
-#if (G104PL >= G105PL) || (G104PL == 0)
-#define  MG105_14PL   ~(1 << 3)
-#else
-#define  MG105_14PL   0xFFFF
-#endif
-#if (G106PL >= G105PL) || (G106PL == 0)
-#define  MG105_16PL   ~(1 << 5)
-#else
-#define  MG105_16PL   0xFFFF
-#endif
-#if (G107PL >= G105PL) || (G107PL == 0)
-#define  MG105_17PL   ~(1 << 6)
-#else
-#define  MG105_17PL   0xFFFF
-#endif
-#if (G108PL >= G105PL) || (G108PL == 0)
-#define  MG105_18PL   ~(1 << 7)
-#else
-#define  MG105_18PL   0xFFFF
-#endif
-#define  MG105_15PL   0x00EF
-#define  MG105   (MG105_11PL & MG105_12PL & MG105_13PL & MG105_14PL & \
-                  MG105_15PL & MG105_16PL & MG105_17PL & MG105_18PL)
-// End of MG105:
-
-// Beginning of MG106:
-#if (G101PL >= G106PL) || (G101PL == 0)
-#define  MG106_11PL   ~(1)
-#else
-#define  MG106_11PL   0xFFFF
-#endif
-#if (G102PL >= G106PL) || (G102PL == 0)
-#define  MG106_12PL   ~(1 << 1)
-#else
-#define  MG106_12PL   0xFFFF
-#endif
-#if (G103PL >= G106PL) || (G103PL == 0)
-#define  MG106_13PL   ~(1 << 2)
-#else
-#define  MG106_13PL   0xFFFF
-#endif
-#if (G104PL >= G106PL) || (G104PL == 0)
-#define  MG106_14PL   ~(1 << 3)
-#else
-#define  MG106_14PL   0xFFFF
-#endif
-#if (G105PL >= G106PL) || (G105PL == 0)
-#define  MG106_15PL   ~(1 << 4)
-#else
-#define  MG106_15PL   0xFFFF
-#endif
-#if (G107PL >= G106PL) || (G107PL == 0)
-#define  MG106_17PL   ~(1 << 6)
-#else
-#define  MG106_17PL   0xFFFF
-#endif
-#if (G108PL >= G106PL) || (G108PL == 0)
-#define  MG106_18PL   ~(1 << 7)
-#else
-#define  MG106_18PL   0xFFFF
-#endif
-#define  MG106_16PL   0x00DF
-#define  MG106   (MG106_11PL & MG106_12PL & MG106_13PL & MG106_14PL & \
-                  MG106_15PL & MG106_16PL & MG106_17PL & MG106_18PL)
-// End of MG106:
-
-// Beginning of MG107:
-#if (G101PL >= G107PL) || (G101PL == 0)
-#define  MG107_11PL   ~(1)
-#else
-#define  MG107_11PL   0xFFFF
-#endif
-#if (G102PL >= G107PL) || (G102PL == 0)
-#define  MG107_12PL   ~(1 << 1)
-#else
-#define  MG107_12PL   0xFFFF
-#endif
-#if (G103PL >= G107PL) || (G103PL == 0)
-#define  MG107_13PL   ~(1 << 2)
-#else
-#define  MG107_13PL   0xFFFF
-#endif
-#if (G104PL >= G107PL) || (G104PL == 0)
-#define  MG107_14PL   ~(1 << 3)
-#else
-#define  MG107_14PL   0xFFFF
-#endif
-#if (G105PL >= G107PL) || (G105PL == 0)
-#define  MG107_15PL   ~(1 << 4)
-#else
-#define  MG107_15PL   0xFFFF
-#endif
-#if (G106PL >= G107PL) || (G106PL == 0)
-#define  MG107_16PL   ~(1 << 5)
-#else
-#define  MG107_16PL   0xFFFF
-#endif
-#if (G108PL >= G107PL) || (G108PL == 0)
-#define  MG107_18PL   ~(1 << 7)
-#else
-#define  MG107_18PL   0xFFFF
-#endif
-#define  MG107_17PL   0x00BF
-#define  MG107   (MG107_11PL & MG107_12PL & MG107_13PL & MG107_14PL & \
-                  MG107_15PL & MG107_16PL & MG107_17PL & MG107_18PL)
-// End of MG107:
-
-// Beginning of MG108:
-#if (G101PL >= G108PL) || (G101PL == 0)
-#define  MG108_11PL   ~(1)
-#else
-#define  MG108_11PL   0xFFFF
-#endif
-#if (G102PL >= G108PL) || (G102PL == 0)
-#define  MG108_12PL   ~(1 << 1)
-#else
-#define  MG108_12PL   0xFFFF
-#endif
-#if (G103PL >= G108PL) || (G103PL == 0)
-#define  MG108_13PL   ~(1 << 2)
-#else
-#define  MG108_13PL   0xFFFF
-#endif
-#if (G104PL >= G108PL) || (G104PL == 0)
-#define  MG108_14PL   ~(1 << 3)
-#else
-#define  MG108_14PL   0xFFFF
-#endif
-#if (G105PL >= G108PL) || (G105PL == 0)
-#define  MG108_15PL   ~(1 << 4)
-#else
-#define  MG108_15PL   0xFFFF
-#endif
-#if (G106PL >= G108PL) || (G106PL == 0)
-#define  MG108_16PL   ~(1 << 5)
-#else
-#define  MG108_16PL   0xFFFF
-#endif
-#if (G107PL >= G108PL) || (G107PL == 0)
-#define  MG108_17PL   ~(1 << 6)
-#else
-#define  MG108_17PL   0xFFFF
-#endif
-#define  MG108_18PL   0x007F
-#define  MG108    (MG108_11PL & MG108_12PL & MG108_13PL & MG108_14PL & \
-                  MG108_15PL & MG108_16PL & MG108_17PL & MG108_18PL)
-// End of MG108:
-
-//-------------------------------------------------------------------------------
-// Automatically generate PIEIER1 interrupt masks MG111 to MG118:
-//
-
-// Beginning of MG111:
-#if (G112PL >= G111PL) || (G112PL == 0)
-#define  MG111_12PL   ~(1 << 1)
-#else
-#define  MG111_12PL   0xFFFF
-#endif
-#if (G113PL >= G111PL) || (G113PL == 0)
-#define  MG111_13PL   ~(1 << 2)
-#else
-#define  MG111_13PL   0xFFFF
-#endif
-#if (G114PL >= G111PL) || (G114PL == 0)
-#define  MG111_14PL   ~(1 << 3)
-#else
-#define  MG111_14PL   0xFFFF
-#endif
-#if (G115PL >= G111PL) || (G115PL == 0)
-#define  MG111_15PL   ~(1 << 4)
-#else
-#define  MG111_15PL   0xFFFF
-#endif
-#if (G116PL >= G111PL) || (G116PL == 0)
-#define  MG111_16PL   ~(1 << 5)
-#else
-#define  MG111_16PL   0xFFFF
-#endif
-#if (G117PL >= G111PL) || (G117PL == 0)
-#define  MG111_17PL   ~(1 << 6)
-#else
-#define  MG111_17PL   0xFFFF
-#endif
-#if (G118PL >= G111PL) || (G118PL == 0)
-#define  MG111_18PL   ~(1 << 7)
-#else
-#define  MG111_18PL   0xFFFF
-#endif
-#define  MG111_11PL   0x00FE
-#define  MG111   (MG111_11PL & MG111_12PL & MG111_13PL & MG111_14PL & \
-                  MG111_15PL & MG111_16PL & MG111_17PL & MG111_18PL)
-// End of MG111:
-
-// Beginning of MG112:
-#if (G111PL >= G112PL) || (G111PL == 0)
-#define  MG112_11PL   ~(1)
-#else
-#define  MG112_11PL   0xFFFF
-#endif
-#if (G113PL >= G112PL) || (G113PL == 0)
-#define  MG112_13PL   ~(1 << 2)
-#else
-#define  MG112_13PL   0xFFFF
-#endif
-#if (G114PL >= G112PL) || (G114PL == 0)
-#define  MG112_14PL   ~(1 << 3)
-#else
-#define  MG112_14PL   0xFFFF
-#endif
-#if (G115PL >= G112PL) || (G115PL == 0)
-#define  MG112_15PL   ~(1 << 4)
-#else
-#define  MG112_15PL   0xFFFF
-#endif
-#if (G116PL >= G112PL) || (G116PL == 0)
-#define  MG112_16PL   ~(1 << 5)
-#else
-#define  MG112_16PL   0xFFFF
-#endif
-#if (G117PL >= G112PL) || (G117PL == 0)
-#define  MG112_17PL   ~(1 << 6)
-#else
-#define  MG112_17PL   0xFFFF
-#endif
-#if (G118PL >= G112PL) || (G118PL == 0)
-#define  MG112_18PL   ~(1 << 7)
-#else
-#define  MG112_18PL   0xFFFF
-#endif
-#define  MG112_12PL   0x00FD
-#define  MG112   (MG112_11PL & MG112_12PL & MG112_13PL & MG112_14PL & \
-                  MG112_15PL & MG112_16PL & MG112_17PL & MG112_18PL)
-// End of MG112:
-
-// Beginning of MG113:
-#if (G111PL >= G113PL) || (G111PL == 0)
-#define  MG113_11PL   ~(1)
-#else
-#define  MG113_11PL   0xFFFF
-#endif
-#if (G112PL >= G113PL) || (G112PL == 0)
-#define  MG113_12PL   ~(1 << 1)
-#else
-#define  MG113_12PL   0xFFFF
-#endif
-#if (G114PL >= G113PL) || (G114PL == 0)
-#define  MG113_14PL   ~(1 << 3)
-#else
-#define  MG113_14PL   0xFFFF
-#endif
-#if (G115PL >= G113PL) || (G115PL == 0)
-#define  MG113_15PL   ~(1 << 4)
-#else
-#define  MG113_15PL   0xFFFF
-#endif
-#if (G116PL >= G113PL) || (G116PL == 0)
-#define  MG113_16PL   ~(1 << 5)
-#else
-#define  MG113_16PL   0xFFFF
-#endif
-#if (G117PL >= G113PL) || (G117PL == 0)
-#define  MG113_17PL   ~(1 << 6)
-#else
-#define  MG113_17PL   0xFFFF
-#endif
-#if (G118PL >= G113PL) || (G118PL == 0)
-#define  MG113_18PL   ~(1 << 7)
-#else
-#define  MG113_18PL   0xFFFF
-#endif
-#define  MG113_13PL   0x00FB
-#define  MG113   (MG113_11PL & MG113_12PL & MG113_13PL & MG113_14PL & \
-                  MG113_15PL & MG113_16PL & MG113_17PL & MG113_18PL)
-// End of MG113:
-
-// Beginning of MG114:
-#if (G111PL >= G114PL) || (G111PL == 0)
-#define  MG114_11PL   ~(1)
-#else
-#define  MG114_11PL   0xFFFF
-#endif
-#if (G112PL >= G114PL) || (G112PL == 0)
-#define  MG114_12PL   ~(1 << 1)
-#else
-#define  MG114_12PL   0xFFFF
-#endif
-#if (G113PL >= G114PL) || (G113PL == 0)
-#define  MG114_13PL   ~(1 << 2)
-#else
-#define  MG114_13PL   0xFFFF
-#endif
-#if (G115PL >= G114PL) || (G115PL == 0)
-#define  MG114_15PL   ~(1 << 4)
-#else
-#define  MG114_15PL   0xFFFF
-#endif
-#if (G116PL >= G114PL) || (G116PL == 0)
-#define  MG114_16PL   ~(1 << 5)
-#else
-#define  MG114_16PL   0xFFFF
-#endif
-#if (G117PL >= G114PL) || (G117PL == 0)
-#define  MG114_17PL   ~(1 << 6)
-#else
-#define  MG114_17PL   0xFFFF
-#endif
-#if (G118PL >= G114PL) || (G118PL == 0)
-#define  MG114_18PL   ~(1 << 7)
-#else
-#define  MG114_18PL   0xFFFF
-#endif
-#define  MG114_14PL   0x00F7
-#define  MG114   (MG114_11PL & MG114_12PL & MG114_13PL & MG114_14PL & \
-                  MG114_15PL & MG114_16PL & MG114_17PL & MG114_18PL)
-// End of MG114:
-
-// Beginning of MG115:
-#if (G111PL >= G115PL) || (G111PL == 0)
-#define  MG115_11PL   ~(1)
-#else
-#define  MG115_11PL   0xFFFF
-#endif
-#if (G112PL >= G115PL) || (G112PL == 0)
-#define  MG115_12PL   ~(1 << 1)
-#else
-#define  MG115_12PL   0xFFFF
-#endif
-#if (G113PL >= G115PL) || (G113PL == 0)
-#define  MG115_13PL   ~(1 << 2)
-#else
-#define  MG115_13PL   0xFFFF
-#endif
-#if (G114PL >= G115PL) || (G114PL == 0)
-#define  MG115_14PL   ~(1 << 3)
-#else
-#define  MG115_14PL   0xFFFF
-#endif
-#if (G116PL >= G115PL) || (G116PL == 0)
-#define  MG115_16PL   ~(1 << 5)
-#else
-#define  MG115_16PL   0xFFFF
-#endif
-#if (G117PL >= G115PL) || (G117PL == 0)
-#define  MG115_17PL   ~(1 << 6)
-#else
-#define  MG115_17PL   0xFFFF
-#endif
-#if (G118PL >= G115PL) || (G118PL == 0)
-#define  MG115_18PL   ~(1 << 7)
-#else
-#define  MG115_18PL   0xFFFF
-#endif
-#define  MG115_15PL   0x00EF
-#define  MG115    (MG115_11PL & MG115_12PL & MG115_13PL & MG115_14PL & \
-                  MG115_15PL & MG115_16PL & MG115_17PL & MG115_18PL)
-// End of MG115:
-
-// Beginning of MG116:
-#if (G111PL >= G116PL) || (G111PL == 0)
-#define  MG116_11PL   ~(1)
-#else
-#define  MG116_11PL   0xFFFF
-#endif
-#if (G112PL >= G116PL) || (G112PL == 0)
-#define  MG116_12PL   ~(1 << 1)
-#else
-#define  MG116_12PL   0xFFFF
-#endif
-#if (G113PL >= G116PL) || (G113PL == 0)
-#define  MG116_13PL   ~(1 << 2)
-#else
-#define  MG116_13PL   0xFFFF
-#endif
-#if (G114PL >= G116PL) || (G114PL == 0)
-#define  MG116_14PL   ~(1 << 3)
-#else
-#define  MG116_14PL   0xFFFF
-#endif
-#if (G115PL >= G116PL) || (G115PL == 0)
-#define  MG116_15PL   ~(1 << 4)
-#else
-#define  MG116_15PL   0xFFFF
-#endif
-#if (G117PL >= G116PL) || (G117PL == 0)
-#define  MG116_17PL   ~(1 << 6)
-#else
-#define  MG116_17PL   0xFFFF
-#endif
-#if (G118PL >= G116PL) || (G118PL == 0)
-#define  MG116_18PL   ~(1 << 7)
-#else
-#define  MG116_18PL   0xFFFF
-#endif
-#define  MG116_16PL   0x00DF
-#define  MG116   (MG116_11PL & MG116_12PL & MG116_13PL & MG116_14PL & \
-                  MG116_15PL & MG116_16PL & MG116_17PL & MG116_18PL)
-// End of MG116:
-
-// Beginning of MG117:
-#if (G111PL >= G117PL) || (G111PL == 0)
-#define  MG117_11PL   ~(1)
-#else
-#define  MG117_11PL   0xFFFF
-#endif
-#if (G112PL >= G117PL) || (G112PL == 0)
-#define  MG117_12PL   ~(1 << 1)
-#else
-#define  MG117_12PL   0xFFFF
-#endif
-#if (G113PL >= G117PL) || (G113PL == 0)
-#define  MG117_13PL   ~(1 << 2)
-#else
-#define  MG117_13PL   0xFFFF
-#endif
-#if (G114PL >= G117PL) || (G114PL == 0)
-#define  MG117_14PL   ~(1 << 3)
-#else
-#define  MG117_14PL   0xFFFF
-#endif
-#if (G115PL >= G117PL) || (G115PL == 0)
-#define  MG117_15PL   ~(1 << 4)
-#else
-#define  MG117_15PL   0xFFFF
-#endif
-#if (G116PL >= G117PL) || (G116PL == 0)
-#define  MG117_16PL   ~(1 << 5)
-#else
-#define  MG117_16PL   0xFFFF
-#endif
-#if (G118PL >= G117PL) || (G118PL == 0)
-#define  MG117_18PL   ~(1 << 7)
-#else
-#define  MG117_18PL   0xFFFF
-#endif
-#define  MG117_17PL   0x00BF
-#define  MG117   (MG117_11PL & MG117_12PL & MG117_13PL & MG117_14PL & \
-                  MG117_15PL & MG117_16PL & MG117_17PL & MG117_18PL)
-// End of MG117:
-
-// Beginning of MG118:
-#if (G111PL >= G118PL) || (G111PL == 0)
-#define  MG118_11PL   ~(1)
-#else
-#define  MG118_11PL   0xFFFF
-#endif
-#if (G112PL >= G118PL) || (G112PL == 0)
-#define  MG118_12PL   ~(1 << 1)
-#else
-#define  MG118_12PL   0xFFFF
-#endif
-#if (G113PL >= G118PL) || (G113PL == 0)
-#define  MG118_13PL   ~(1 << 2)
-#else
-#define  MG118_13PL   0xFFFF
-#endif
-#if (G114PL >= G118PL) || (G114PL == 0)
-#define  MG118_14PL   ~(1 << 3)
-#else
-#define  MG118_14PL   0xFFFF
-#endif
-#if (G115PL >= G118PL) || (G115PL == 0)
-#define  MG118_15PL   ~(1 << 4)
-#else
-#define  MG118_15PL   0xFFFF
-#endif
-#if (G116PL >= G118PL) || (G116PL == 0)
-#define  MG118_16PL   ~(1 << 5)
-#else
-#define  MG118_16PL   0xFFFF
-#endif
-#if (G117PL >= G118PL) || (G117PL == 0)
-#define  MG118_17PL   ~(1 << 6)
-#else
-#define  MG118_17PL   0xFFFF
-#endif
-#define  MG118_18PL   0x007F
-#define  MG118   (MG118_11PL & MG118_12PL & MG118_13PL & MG118_14PL & \
-                  MG118_15PL & MG118_16PL & MG118_17PL & MG118_18PL)
-// End of MG118:
-
-//-------------------------------------------------------------------------------
-// Automatically generate PIEIER1 interrupt masks MG121 to MG128:
-//
-
-// Beginning of MG121:
-#if (G122PL >= G121PL) || (G122PL == 0)
-#define  MG121_12PL   ~(1 << 1)
-#else
-#define  MG121_12PL   0xFFFF
-#endif
-#if (G123PL >= G121PL) || (G123PL == 0)
-#define  MG121_13PL   ~(1 << 2)
-#else
-#define  MG121_13PL   0xFFFF
-#endif
-#if (G124PL >= G121PL) || (G124PL == 0)
-#define  MG121_14PL   ~(1 << 3)
-#else
-#define  MG121_14PL   0xFFFF
-#endif
-#if (G125PL >= G121PL) || (G125PL == 0)
-#define  MG121_15PL   ~(1 << 4)
-#else
-#define  MG121_15PL   0xFFFF
-#endif
-#if (G126PL >= G121PL) || (G126PL == 0)
-#define  MG121_16PL   ~(1 << 5)
-#else
-#define  MG121_16PL   0xFFFF
-#endif
-#if (G127PL >= G121PL) || (G127PL == 0)
-#define  MG121_17PL   ~(1 << 6)
-#else
-#define  MG121_17PL   0xFFFF
-#endif
-#if (G128PL >= G121PL) || (G128PL == 0)
-#define  MG121_18PL   ~(1 << 7)
-#else
-#define  MG121_18PL   0xFFFF
-#endif
-#define  MG121_11PL   0x00FE
-#define  MG121   (MG121_11PL & MG121_12PL & MG121_13PL & MG121_14PL & \
-                  MG121_15PL & MG121_16PL & MG121_17PL & MG121_18PL)
-// End of MG121:
-
-// Beginning of MG121:
-#if (G121PL >= G122PL) || (G121PL == 0)
-#define  MG122_11PL   ~(1)
-#else
-#define  MG122_11PL   0xFFFF
-#endif
-#if (G123PL >= G122PL) || (G123PL == 0)
-#define  MG122_13PL   ~(1 << 2)
-#else
-#define  MG122_13PL   0xFFFF
-#endif
-#if (G124PL >= G122PL) || (G124PL == 0)
-#define  MG122_14PL   ~(1 << 3)
-#else
-#define  MG122_14PL   0xFFFF
-#endif
-#if (G125PL >= G122PL) || (G125PL == 0)
-#define  MG122_15PL   ~(1 << 4)
-#else
-#define  MG122_15PL   0xFFFF
-#endif
-#if (G126PL >= G122PL) || (G126PL == 0)
-#define  MG122_16PL   ~(1 << 5)
-#else
-#define  MG122_16PL   0xFFFF
-#endif
-#if (G127PL >= G122PL) || (G127PL == 0)
-#define  MG122_17PL   ~(1 << 6)
-#else
-#define  MG122_17PL   0xFFFF
-#endif
-#if (G128PL >= G122PL) || (G128PL == 0)
-#define  MG122_18PL   ~(1 << 7)
-#else
-#define  MG122_18PL   0xFFFF
-#endif
-#define  MG122_12PL   0x00FD
-#define  MG122   (MG122_11PL & MG122_12PL & MG122_13PL & MG122_14PL & \
-                  MG122_15PL & MG122_16PL & MG122_17PL & MG122_18PL)
-// End of MG122:
-
-// Beginning of MG123:
-#if (G121PL >= G123PL) || (G121PL == 0)
-#define  MG123_11PL   ~(1)
-#else
-#define  MG123_11PL   0xFFFF
-#endif
-#if (G122PL >= G123PL) || (G122PL == 0)
-#define  MG123_12PL   ~(1 << 1)
-#else
-#define  MG123_12PL   0xFFFF
-#endif
-#if (G124PL >= G123PL) || (G124PL == 0)
-#define  MG123_14PL   ~(1 << 3)
-#else
-#define  MG123_14PL   0xFFFF
-#endif
-#if (G125PL >= G123PL) || (G125PL == 0)
-#define  MG123_15PL   ~(1 << 4)
-#else
-#define  MG123_15PL   0xFFFF
-#endif
-#if (G126PL >= G123PL) || (G126PL == 0)
-#define  MG123_16PL   ~(1 << 5)
-#else
-#define  MG123_16PL   0xFFFF
-#endif
-#if (G127PL >= G123PL) || (G127PL == 0)
-#define  MG123_17PL   ~(1 << 6)
-#else
-#define  MG123_17PL   0xFFFF
-#endif
-#if (G128PL >= G123PL) || (G128PL == 0)
-#define  MG123_18PL   ~(1 << 7)
-#else
-#define  MG123_18PL   0xFFFF
-#endif
-#define  MG123_13PL   0x00FB
-#define  MG123    (MG123_11PL & MG123_12PL & MG123_13PL & MG123_14PL & \
-                  MG123_15PL & MG123_16PL & MG123_17PL & MG123_18PL)
-// End of MG123:
-
-// Beginning of MG124:
-#if (G121PL >= G124PL) || (G121PL == 0)
-#define  MG124_11PL   ~(1)
-#else
-#define  MG124_11PL   0xFFFF
-#endif
-#if (G122PL >= G124PL) || (G122PL == 0)
-#define  MG124_12PL   ~(1 << 1)
-#else
-#define  MG124_12PL   0xFFFF
-#endif
-#if (G123PL >= G124PL) || (G123PL == 0)
-#define  MG124_13PL   ~(1 << 2)
-#else
-#define  MG124_13PL   0xFFFF
-#endif
-#if (G125PL >= G124PL) || (G125PL == 0)
-#define  MG124_15PL   ~(1 << 4)
-#else
-#define  MG124_15PL   0xFFFF
-#endif
-#if (G126PL >= G124PL) || (G126PL == 0)
-#define  MG124_16PL   ~(1 << 5)
-#else
-#define  MG124_16PL   0xFFFF
-#endif
-#if (G127PL >= G124PL) || (G127PL == 0)
-#define  MG124_17PL   ~(1 << 6)
-#else
-#define  MG124_17PL   0xFFFF
-#endif
-#if (G128PL >= G124PL) || (G128PL == 0)
-#define  MG124_18PL   ~(1 << 7)
-#else
-#define  MG124_18PL   0xFFFF
-#endif
-#define  MG124_14PL   0x00F7
-#define  MG124   (MG124_11PL & MG124_12PL & MG124_13PL & MG124_14PL & \
-                  MG124_15PL & MG124_16PL & MG124_17PL & MG124_18PL)
-// End of MG124:
-
-// Beginning of MG125:
-#if (G121PL >= G125PL) || (G121PL == 0)
-#define  MG125_11PL   ~(1)
-#else
-#define  MG125_11PL   0xFFFF
-#endif
-#if (G122PL >= G125PL) || (G122PL == 0)
-#define  MG125_12PL   ~(1 << 1)
-#else
-#define  MG125_12PL   0xFFFF
-#endif
-#if (G123PL >= G125PL) || (G123PL == 0)
-#define  MG125_13PL   ~(1 << 2)
-#else
-#define  MG125_13PL   0xFFFF
-#endif
-#if (G124PL >= G125PL) || (G124PL == 0)
-#define  MG125_14PL   ~(1 << 3)
-#else
-#define  MG125_14PL   0xFFFF
-#endif
-#if (G126PL >= G125PL) || (G126PL == 0)
-#define  MG125_16PL   ~(1 << 5)
-#else
-#define  MG125_16PL   0xFFFF
-#endif
-#if (G127PL >= G125PL) || (G127PL == 0)
-#define  MG125_17PL   ~(1 << 6)
-#else
-#define  MG125_17PL   0xFFFF
-#endif
-#if (G128PL >= G125PL) || (G128PL == 0)
-#define  MG125_18PL   ~(1 << 7)
-#else
-#define  MG125_18PL   0xFFFF
-#endif
-#define  MG125_15PL   0x00EF
-#define  MG125   (MG125_11PL & MG125_12PL & MG125_13PL & MG125_14PL & \
-                  MG125_15PL & MG125_16PL & MG125_17PL & MG125_18PL)
-// End of MG125:
-
-// Beginning of MG126:
-#if (G121PL >= G126PL) || (G121PL == 0)
-#define  MG126_11PL   ~(1)
-#else
-#define  MG126_11PL   0xFFFF
-#endif
-#if (G122PL >= G126PL) || (G122PL == 0)
-#define  MG126_12PL   ~(1 << 1)
-#else
-#define  MG126_12PL   0xFFFF
-#endif
-#if (G123PL >= G126PL) || (G123PL == 0)
-#define  MG126_13PL   ~(1 << 2)
-#else
-#define  MG126_13PL   0xFFFF
-#endif
-#if (G124PL >= G126PL) || (G124PL == 0)
-#define  MG126_14PL   ~(1 << 3)
-#else
-#define  MG126_14PL   0xFFFF
-#endif
-#if (G125PL >= G126PL) || (G125PL == 0)
-#define  MG126_15PL   ~(1 << 4)
-#else
-#define  MG126_15PL   0xFFFF
-#endif
-#if (G127PL >= G126PL) || (G127PL == 0)
-#define  MG126_17PL   ~(1 << 6)
-#else
-#define  MG126_17PL   0xFFFF
-#endif
-#if (G128PL >= G126PL) || (G128PL == 0)
-#define  MG126_18PL   ~(1 << 7)
-#else
-#define  MG126_18PL   0xFFFF
-#endif
-#define  MG126_16PL   0x00DF
-#define  MG126   (MG126_11PL & MG126_12PL & MG126_13PL & MG126_14PL & \
-                  MG126_15PL & MG126_16PL & MG126_17PL & MG126_18PL)
-// End of MG126:
-
-// Beginning of MG127:
-#if (G121PL >= G127PL) || (G121PL == 0)
-#define  MG127_11PL   ~(1)
-#else
-#define  MG127_11PL   0xFFFF
-#endif
-#if (G122PL >= G127PL) || (G122PL == 0)
-#define  MG127_12PL   ~(1 << 1)
-#else
-#define  MG127_12PL   0xFFFF
-#endif
-#if (G123PL >= G127PL) || (G123PL == 0)
-#define  MG127_13PL   ~(1 << 2)
-#else
-#define  MG127_13PL   0xFFFF
-#endif
-#if (G124PL >= G127PL) || (G124PL == 0)
-#define  MG127_14PL   ~(1 << 3)
-#else
-#define  MG127_14PL   0xFFFF
-#endif
-#if (G125PL >= G127PL) || (G125PL == 0)
-#define  MG127_15PL   ~(1 << 4)
-#else
-#define  MG127_15PL   0xFFFF
-#endif
-#if (G126PL >= G127PL) || (G126PL == 0)
-#define  MG127_16PL   ~(1 << 5)
-#else
-#define  MG127_16PL   0xFFFF
-#endif
-#if (G128PL >= G127PL) || (G128PL == 0)
-#define  MG127_18PL   ~(1 << 7)
-#else
-#define  MG127_18PL   0xFFFF
-#endif
-#define  MG127_17PL   0x00BF
-#define  MG127   (MG127_11PL & MG127_12PL & MG127_13PL & MG127_14PL & \
-                  MG127_15PL & MG127_16PL & MG127_17PL & MG127_18PL)
-// End of MG127:
-
-// Beginning of MG128:
-#if (G121PL >= G128PL) || (G121PL == 0)
-#define  MG128_11PL   ~(1)
-#else
-#define  MG128_11PL   0xFFFF
-#endif
-#if (G122PL >= G128PL) || (G122PL == 0)
-#define  MG128_12PL   ~(1 << 1)
-#else
-#define  MG128_12PL   0xFFFF
-#endif
-#if (G123PL >= G128PL) || (G123PL == 0)
-#define  MG128_13PL   ~(1 << 2)
-#else
-#define  MG128_13PL   0xFFFF
-#endif
-#if (G124PL >= G128PL) || (G124PL == 0)
-#define  MG128_14PL   ~(1 << 3)
-#else
-#define  MG128_14PL   0xFFFF
-#endif
-#if (G125PL >= G128PL) || (G125PL == 0)
-#define  MG128_15PL   ~(1 << 4)
-#else
-#define  MG128_15PL   0xFFFF
-#endif
-#if (G126PL >= G128PL) || (G126PL == 0)
-#define  MG128_16PL   ~(1 << 5)
-#else
-#define  MG128_16PL   0xFFFF
-#endif
-#if (G127PL >= G128PL) || (G127PL == 0)
-#define  MG128_17PL   ~(1 << 6)
-#else
-#define  MG128_17PL   0xFFFF
-#endif
-#define  MG128_18PL   0x007F
-#define  MG128   (MG128_11PL & MG128_12PL & MG128_13PL & MG128_14PL & \
-                  MG128_15PL & MG128_16PL & MG128_17PL & MG128_18PL)
-// End of MG128:
-
-
-#ifdef __cplusplus
-}
-#endif /* extern "C" */
-
-#endif // eof
-
-//===========================================================================
-// No more.
-//===========================================================================
diff --git a/Source/External/v120/DSP2833x_common/include/IQmathLib.h b/Source/External/v120/DSP2833x_common/include/IQmathLib.h
deleted file mode 100644
index b62ddf8..0000000
--- a/Source/External/v120/DSP2833x_common/include/IQmathLib.h
+++ /dev/null
@@ -1,4493 +0,0 @@
-// TI File $Revision: /main/2 $
-// Checkin $Date: July 10, 2008   10:59:52 $
-//###########################################################################
-//
-// FILE:    IQmathLib.h
-//
-// TITLE:   IQ Math library functions definitions.
-//
-//###########################################################################
-//
-// Ver  | dd-mmm-yyyy |  Who  | Description of changes
-// =====|=============|=======|==============================================
-//  1.3 | 19 Nov 2001 | A. T. | Original Release.
-// -----|-------------|-------|----------------------------------------------
-//  1.4 | 17 May 2002 | A. T. | Added new functions and support for
-//      |             |       | intrinsics IQmpy, IQxmpy, IQsat.
-// -----|-------------|-------|----------------------------------------------
-//  1.4a| 12 Jun 2002 | A. T. | Fixed problem with _IQ() operation on
-//      |             |       | variables.
-// -----|-------------|-------|----------------------------------------------
-//  1.4b| 18 Jun 2002 | A. T. | Fixed bug with _IQtoIQN() and _IQNtoIQ()
-//      |             |       | operations.
-// -----|-------------|-------|----------------------------------------------
-//  1.4d| 30 Mar 2003 | DA/SD | 1. Added macro parameters in parentheses
-//      |             |       |    in number of places where it matters
-//      |             |       | 2. Added macro definition to include header
-//      |             |       |    file multiple times in the program.
-// -----|-------------|-------|----------------------------------------------
-//  1.4e| 17 Jun 2004 | AT/DA | Added IQexp function.
-//      |             |       | Added IQasin & IQacos functions (thanks DA).
-// -----|-------------|-------|----------------------------------------------
-//  1.4f| 10 Mar 2005 | AT    | Fixed Bug In IQexp function.
-// -----|-------------|-------|----------------------------------------------
-//  1.5 | 30 Jan 2008 | LH    | 1. Changed the definion of the _IQatan2PU(A,B)
-//      |             |       |    macro for FLOAT_MATH so that a call to
-//      |             |       |    divide will not occur.
-//      |             |       | 2. If MATH_TYPE == FLOAT_MATH, then include the
-//      |             |       |    following standard headers: math.h
-//      |             |       |    stdlib.h.
-//      |             |       | 3. Added missing #defines for the non-global
-//      |             |       |    _IQatanN() function
-//      |             |       | 4. Adding missing definitions for absolute
-//      |             |       |    value when MATH_TYPE == FLOAT_MATH
-//      |             |       | 5. Included limits.h and changed the definition
-//      |             |       |    of MAX_IQ_NEG to LONG_MIN and MAX_IQ_POS
-//      |             |       |    to LONG_MAX
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-//
-// User needs to configure "MATH_TYPE" and "GLOBAL_Q" values:
-//
-//---------------------------------------------------------------------------
-// Select math type, IQ_MATH or FLOAT_MATH:
-//
-
-#ifndef __IQMATHLIB_H_INCLUDED__
-#define __IQMATHLIB_H_INCLUDED__
-
-
-#define   FLOAT_MATH     1
-#define   IQ_MATH        0
-
-#ifndef   MATH_TYPE
-#define   MATH_TYPE      IQ_MATH
-#endif
-
-//---------------------------------------------------------------------------
-// Select global Q value and scaling. The Q value is limited to the
-// following range for all functions:
-//
-//        30 <= GLOBAL_Q <=  1
-//
-#ifndef   GLOBAL_Q
-#define   GLOBAL_Q       24
-#endif
-
-//---------------------------------------------------------------------------
-// If using FLOAT_MATH, include standard headers to avoid conversion issues
-//
-#if MATH_TYPE == FLOAT_MATH
-#include <math.h>
-#include <stdlib.h>
-#endif
-#include <limits.h>
-
-//---------------------------------------------------------------------------
-// Various Usefull Constant Definitions:
-//
-#define   QG          GLOBAL_Q
-#define   Q30         30
-#define   Q29         29
-#define   Q28         28
-#define   Q27         27
-#define   Q26         26
-#define   Q25         25
-#define   Q24         24
-#define   Q23         23
-#define   Q22         22
-#define   Q21         21
-#define   Q20         20
-#define   Q19         19
-#define   Q18         18
-#define   Q17         17
-#define   Q16         16
-#define   Q15         15
-#define   Q14         14
-#define   Q13         13
-#define   Q12         12
-#define   Q11         11
-#define   Q10         10
-#define   Q9          9
-#define   Q8          8
-#define   Q7          7
-#define   Q6          6
-#define   Q5          5
-#define   Q4          4
-#define   Q3          3
-#define   Q2          2
-#define   Q1          1
-
-#define   MAX_IQ_POS  LONG_MAX
-#define   MAX_IQ_NEG  LONG_MIN
-#define   MIN_IQ_POS  1
-#define   MIN_IQ_NEG  -1
-
-//###########################################################################
-#if MATH_TYPE == IQ_MATH
-//###########################################################################
-// If IQ_MATH is used, the following IQmath library function definitions
-// are used:
-//===========================================================================
-typedef   long    _iq;
-typedef   long    _iq30;
-typedef   long    _iq29;
-typedef   long    _iq28;
-typedef   long    _iq27;
-typedef   long    _iq26;
-typedef   long    _iq25;
-typedef   long    _iq24;
-typedef   long    _iq23;
-typedef   long    _iq22;
-typedef   long    _iq21;
-typedef   long    _iq20;
-typedef   long    _iq19;
-typedef   long    _iq18;
-typedef   long    _iq17;
-typedef   long    _iq16;
-typedef   long    _iq15;
-typedef   long    _iq14;
-typedef   long    _iq13;
-typedef   long    _iq12;
-typedef   long    _iq11;
-typedef   long    _iq10;
-typedef   long    _iq9;
-typedef   long    _iq8;
-typedef   long    _iq7;
-typedef   long    _iq6;
-typedef   long    _iq5;
-typedef   long    _iq4;
-typedef   long    _iq3;
-typedef   long    _iq2;
-typedef   long    _iq1;
-//---------------------------------------------------------------------------
-#define   _IQ30(A)      (long) ((A) * 1073741824.0L)
-#define   _IQ29(A)      (long) ((A) * 536870912.0L)
-#define   _IQ28(A)      (long) ((A) * 268435456.0L)
-#define   _IQ27(A)      (long) ((A) * 134217728.0L)
-#define   _IQ26(A)      (long) ((A) * 67108864.0L)
-#define   _IQ25(A)      (long) ((A) * 33554432.0L)
-#define   _IQ24(A)      (long) ((A) * 16777216.0L)
-#define   _IQ23(A)      (long) ((A) * 8388608.0L)
-#define   _IQ22(A)      (long) ((A) * 4194304.0L)
-#define   _IQ21(A)      (long) ((A) * 2097152.0L)
-#define   _IQ20(A)      (long) ((A) * 1048576.0L)
-#define   _IQ19(A)      (long) ((A) * 524288.0L)
-#define   _IQ18(A)      (long) ((A) * 262144.0L)
-#define   _IQ17(A)      (long) ((A) * 131072.0L)
-#define   _IQ16(A)      (long) ((A) * 65536.0L)
-#define   _IQ15(A)      (long) ((A) * 32768.0L)
-#define   _IQ14(A)      (long) ((A) * 16384.0L)
-#define   _IQ13(A)      (long) ((A) * 8192.0L)
-#define   _IQ12(A)      (long) ((A) * 4096.0L)
-#define   _IQ11(A)      (long) ((A) * 2048.0L)
-#define   _IQ10(A)      (long) ((A) * 1024.0L)
-#define   _IQ9(A)       (long) ((A) * 512.0L)
-#define   _IQ8(A)       (long) ((A) * 256.0L)
-#define   _IQ7(A)       (long) ((A) * 128.0L)
-#define   _IQ6(A)       (long) ((A) * 64.0L)
-#define   _IQ5(A)       (long) ((A) * 32.0L)
-#define   _IQ4(A)       (long) ((A) * 16.0L)
-#define   _IQ3(A)       (long) ((A) * 8.0L)
-#define   _IQ2(A)       (long) ((A) * 4.0L)
-#define   _IQ1(A)       (long) ((A) * 2.0L)
-
-#if GLOBAL_Q == 30
-#define   _IQ(A)  _IQ30(A)
-#endif
-#if GLOBAL_Q == 29
-#define   _IQ(A)  _IQ29(A)
-#endif
-#if GLOBAL_Q == 28
-#define   _IQ(A)  _IQ28(A)
-#endif
-#if GLOBAL_Q == 27
-#define   _IQ(A)  _IQ27(A)
-#endif
-#if GLOBAL_Q == 26
-#define   _IQ(A)  _IQ26(A)
-#endif
-#if GLOBAL_Q == 25
-#define   _IQ(A)  _IQ25(A)
-#endif
-#if GLOBAL_Q == 24
-#define   _IQ(A)  _IQ24(A)
-#endif
-#if GLOBAL_Q == 23
-#define   _IQ(A)  _IQ23(A)
-#endif
-#if GLOBAL_Q == 22
-#define   _IQ(A)  _IQ22(A)
-#endif
-#if GLOBAL_Q == 21
-#define   _IQ(A)  _IQ21(A)
-#endif
-#if GLOBAL_Q == 20
-#define   _IQ(A)  _IQ20(A)
-#endif
-#if GLOBAL_Q == 19
-#define   _IQ(A)  _IQ19(A)
-#endif
-#if GLOBAL_Q == 18
-#define   _IQ(A)  _IQ18(A)
-#endif
-#if GLOBAL_Q == 17
-#define   _IQ(A)  _IQ17(A)
-#endif
-#if GLOBAL_Q == 16
-#define   _IQ(A)  _IQ16(A)
-#endif
-#if GLOBAL_Q == 15
-#define   _IQ(A)  _IQ15(A)
-#endif
-#if GLOBAL_Q == 14
-#define   _IQ(A)  _IQ14(A)
-#endif
-#if GLOBAL_Q == 13
-#define   _IQ(A)  _IQ13(A)
-#endif
-#if GLOBAL_Q == 12
-#define   _IQ(A)  _IQ12(A)
-#endif
-#if GLOBAL_Q == 11
-#define   _IQ(A)  _IQ11(A)
-#endif
-#if GLOBAL_Q == 10
-#define   _IQ(A)  _IQ10(A)
-#endif
-#if GLOBAL_Q == 9
-#define   _IQ(A)  _IQ9(A)
-#endif
-#if GLOBAL_Q == 8
-#define   _IQ(A)  _IQ8(A)
-#endif
-#if GLOBAL_Q == 7
-#define   _IQ(A)  _IQ7(A)
-#endif
-#if GLOBAL_Q == 6
-#define   _IQ(A)  _IQ6(A)
-#endif
-#if GLOBAL_Q == 5
-#define   _IQ(A)  _IQ5(A)
-#endif
-#if GLOBAL_Q == 4
-#define   _IQ(A)  _IQ4(A)
-#endif
-#if GLOBAL_Q == 3
-#define   _IQ(A)  _IQ3(A)
-#endif
-#if GLOBAL_Q == 2
-#define   _IQ(A)  _IQ2(A)
-#endif
-#if GLOBAL_Q == 1
-#define   _IQ(A)  _IQ1(A)
-#endif
-//---------------------------------------------------------------------------
-extern    float _IQ30toF(long A);
-extern    float _IQ29toF(long A);
-extern    float _IQ28toF(long A);
-extern    float _IQ27toF(long A);
-extern    float _IQ26toF(long A);
-extern    float _IQ25toF(long A);
-extern    float _IQ24toF(long A);
-extern    float _IQ23toF(long A);
-extern    float _IQ22toF(long A);
-extern    float _IQ21toF(long A);
-extern    float _IQ20toF(long A);
-extern    float _IQ19toF(long A);
-extern    float _IQ18toF(long A);
-extern    float _IQ17toF(long A);
-extern    float _IQ16toF(long A);
-extern    float _IQ15toF(long A);
-extern    float _IQ14toF(long A);
-extern    float _IQ13toF(long A);
-extern    float _IQ12toF(long A);
-extern    float _IQ11toF(long A);
-extern    float _IQ10toF(long A);
-extern    float _IQ9toF(long A);
-extern    float _IQ8toF(long A);
-extern    float _IQ7toF(long A);
-extern    float _IQ6toF(long A);
-extern    float _IQ5toF(long A);
-extern    float _IQ4toF(long A);
-extern    float _IQ3toF(long A);
-extern    float _IQ2toF(long A);
-extern    float _IQ1toF(long A);
-
-#if GLOBAL_Q == 30
-#define   _IQtoF(A)  _IQ30toF(A)
-#endif
-#if GLOBAL_Q == 29
-#define   _IQtoF(A)  _IQ29toF(A)
-#endif
-#if GLOBAL_Q == 28
-#define   _IQtoF(A)  _IQ28toF(A)
-#endif
-#if GLOBAL_Q == 27
-#define   _IQtoF(A)  _IQ27toF(A)
-#endif
-#if GLOBAL_Q == 26
-#define   _IQtoF(A)  _IQ26toF(A)
-#endif
-#if GLOBAL_Q == 25
-#define   _IQtoF(A)  _IQ25toF(A)
-#endif
-#if GLOBAL_Q == 24
-#define   _IQtoF(A)  _IQ24toF(A)
-#endif
-#if GLOBAL_Q == 23
-#define   _IQtoF(A)  _IQ23toF(A)
-#endif
-#if GLOBAL_Q == 22
-#define   _IQtoF(A)  _IQ22toF(A)
-#endif
-#if GLOBAL_Q == 21
-#define   _IQtoF(A)  _IQ21toF(A)
-#endif
-#if GLOBAL_Q == 20
-#define   _IQtoF(A)  _IQ20toF(A)
-#endif
-#if GLOBAL_Q == 19
-#define   _IQtoF(A)  _IQ19toF(A)
-#endif
-#if GLOBAL_Q == 18
-#define   _IQtoF(A)  _IQ18toF(A)
-#endif
-#if GLOBAL_Q == 17
-#define   _IQtoF(A)  _IQ17toF(A)
-#endif
-#if GLOBAL_Q == 16
-#define   _IQtoF(A)  _IQ16toF(A)
-#endif
-#if GLOBAL_Q == 15
-#define   _IQtoF(A)  _IQ15toF(A)
-#endif
-#if GLOBAL_Q == 14
-#define   _IQtoF(A)  _IQ14toF(A)
-#endif
-#if GLOBAL_Q == 13
-#define   _IQtoF(A)  _IQ13toF(A)
-#endif
-#if GLOBAL_Q == 12
-#define   _IQtoF(A)  _IQ12toF(A)
-#endif
-#if GLOBAL_Q == 11
-#define   _IQtoF(A)  _IQ11toF(A)
-#endif
-#if GLOBAL_Q == 10
-#define   _IQtoF(A)  _IQ10toF(A)
-#endif
-#if GLOBAL_Q == 9
-#define   _IQtoF(A)  _IQ9toF(A)
-#endif
-#if GLOBAL_Q == 8
-#define   _IQtoF(A)  _IQ8toF(A)
-#endif
-#if GLOBAL_Q == 7
-#define   _IQtoF(A)  _IQ7toF(A)
-#endif
-#if GLOBAL_Q == 6
-#define   _IQtoF(A)  _IQ6toF(A)
-#endif
-#if GLOBAL_Q == 5
-#define   _IQtoF(A)  _IQ5toF(A)
-#endif
-#if GLOBAL_Q == 4
-#define   _IQtoF(A)  _IQ4toF(A)
-#endif
-#if GLOBAL_Q == 3
-#define   _IQtoF(A)  _IQ3toF(A)
-#endif
-#if GLOBAL_Q == 2
-#define   _IQtoF(A)  _IQ2toF(A)
-#endif
-#if GLOBAL_Q == 1
-#define   _IQtoF(A)  _IQ1toF(A)
-#endif
-//---------------------------------------------------------------------------
-#define   _IQsat(A, Pos, Neg)  __IQsat(A, Pos, Neg)
-//---------------------------------------------------------------------------
-#define   _IQtoIQ30(A)  ((long) (A) << (30 - GLOBAL_Q))
-#define   _IQ30toIQ(A)  ((long) (A) >> (30 - GLOBAL_Q))
-
-#if (GLOBAL_Q >= 29)
-#define   _IQtoIQ29(A) ((long) (A) >> (GLOBAL_Q - 29))
-#define   _IQ29toIQ(A) ((long) (A) << (GLOBAL_Q - 29))
-#else
-#define   _IQtoIQ29(A) ((long) (A) << (29 - GLOBAL_Q))
-#define   _IQ29toIQ(A) ((long) (A) >> (29 - GLOBAL_Q))
-#endif
-
-#if (GLOBAL_Q >= 28)
-#define   _IQtoIQ28(A) ((long) (A) >> (GLOBAL_Q - 28))
-#define   _IQ28toIQ(A) ((long) (A) << (GLOBAL_Q - 28))
-#else
-#define   _IQtoIQ28(A) ((long) (A) << (28 - GLOBAL_Q))
-#define   _IQ28toIQ(A) ((long) (A) >> (28 - GLOBAL_Q))
-#endif
-
-#if (GLOBAL_Q >= 27)
-#define   _IQtoIQ27(A) ((long) (A) >> (GLOBAL_Q - 27))
-#define   _IQ27toIQ(A) ((long) (A) << (GLOBAL_Q - 27))
-#else
-#define   _IQtoIQ27(A) ((long) (A) << (27 - GLOBAL_Q))
-#define   _IQ27toIQ(A) ((long) (A) >> (27 - GLOBAL_Q))
-#endif
-
-#if (GLOBAL_Q >= 26)
-#define   _IQtoIQ26(A) ((long) (A) >> (GLOBAL_Q - 26))
-#define   _IQ26toIQ(A) ((long) (A) << (GLOBAL_Q - 26))
-#else
-#define   _IQtoIQ26(A) ((long) (A) << (26 - GLOBAL_Q))
-#define   _IQ26toIQ(A) ((long) (A) >> (26 - GLOBAL_Q))
-#endif
-
-#if (GLOBAL_Q >= 25)
-#define   _IQtoIQ25(A) ((long) (A) >> (GLOBAL_Q - 25))
-#define   _IQ25toIQ(A) ((long) (A) << (GLOBAL_Q - 25))
-#else
-#define   _IQtoIQ25(A) ((long) (A) << (25 - GLOBAL_Q))
-#define   _IQ25toIQ(A) ((long) (A) >> (25 - GLOBAL_Q))
-#endif
-
-#if (GLOBAL_Q >= 24)
-#define   _IQtoIQ24(A) ((long) (A) >> (GLOBAL_Q - 24))
-#define   _IQ24toIQ(A) ((long) (A) << (GLOBAL_Q - 24))
-#else
-#define   _IQtoIQ24(A) ((long) (A) << (24 - GLOBAL_Q))
-#define   _IQ24toIQ(A) ((long) (A) >> (24 - GLOBAL_Q))
-#endif
-
-#if (GLOBAL_Q >= 23)
-#define   _IQtoIQ23(A) ((long) (A) >> (GLOBAL_Q - 23))
-#define   _IQ23toIQ(A) ((long) (A) << (GLOBAL_Q - 23))
-#else
-#define   _IQtoIQ23(A) ((long) (A) << (23 - GLOBAL_Q))
-#define   _IQ23toIQ(A) ((long) (A) >> (23 - GLOBAL_Q))
-#endif
-
-#if (GLOBAL_Q >= 22)
-#define   _IQtoIQ22(A) ((long) (A) >> (GLOBAL_Q - 22))
-#define   _IQ22toIQ(A) ((long) (A) << (GLOBAL_Q - 22))
-#else
-#define   _IQtoIQ22(A) ((long) (A) << (22 - GLOBAL_Q))
-#define   _IQ22toIQ(A) ((long) (A) >> (22 - GLOBAL_Q))
-#endif
-
-#if (GLOBAL_Q >= 21)
-#define   _IQtoIQ21(A) ((long) (A) >> (GLOBAL_Q - 21))
-#define   _IQ21toIQ(A) ((long) (A) << (GLOBAL_Q - 21))
-#else
-#define   _IQtoIQ21(A) ((long) (A) << (21 - GLOBAL_Q))
-#define   _IQ21toIQ(A) ((long) (A) >> (21 - GLOBAL_Q))
-#endif
-
-#if (GLOBAL_Q >= 20)
-#define   _IQtoIQ20(A) ((long) (A) >> (GLOBAL_Q - 20))
-#define   _IQ20toIQ(A) ((long) (A) << (GLOBAL_Q - 20))
-#else
-#define   _IQtoIQ20(A) ((long) (A) << (20 - GLOBAL_Q))
-#define   _IQ20toIQ(A) ((long) (A) >> (20 - GLOBAL_Q))
-#endif
-
-#if (GLOBAL_Q >= 19)
-#define   _IQtoIQ19(A) ((long) (A) >> (GLOBAL_Q - 19))
-#define   _IQ19toIQ(A) ((long) (A) << (GLOBAL_Q - 19))
-#else
-#define   _IQtoIQ19(A) ((long) (A) << (19 - GLOBAL_Q))
-#define   _IQ19toIQ(A) ((long) (A) >> (19 - GLOBAL_Q))
-#endif
-
-#if (GLOBAL_Q >= 18)
-#define   _IQtoIQ18(A) ((long) (A) >> (GLOBAL_Q - 18))
-#define   _IQ18toIQ(A) ((long) (A) << (GLOBAL_Q - 18))
-#else
-#define   _IQtoIQ18(A) ((long) (A) << (18 - GLOBAL_Q))
-#define   _IQ18toIQ(A) ((long) (A) >> (18 - GLOBAL_Q))
-#endif
-
-#if (GLOBAL_Q >= 17)
-#define   _IQtoIQ17(A) ((long) (A) >> (GLOBAL_Q - 17))
-#define   _IQ17toIQ(A) ((long) (A) << (GLOBAL_Q - 17))
-#else
-#define   _IQtoIQ17(A) ((long) (A) << (17 - GLOBAL_Q))
-#define   _IQ17toIQ(A) ((long) (A) >> (17 - GLOBAL_Q))
-#endif
-
-#if (GLOBAL_Q >= 16)
-#define   _IQtoIQ16(A) ((long) (A) >> (GLOBAL_Q - 16))
-#define   _IQ16toIQ(A) ((long) (A) << (GLOBAL_Q - 16))
-#else
-#define   _IQtoIQ16(A) ((long) (A) << (16 - GLOBAL_Q))
-#define   _IQ16toIQ(A) ((long) (A) >> (16 - GLOBAL_Q))
-#endif
-
-#if (GLOBAL_Q >= 15)
-#define   _IQtoIQ15(A) ((long) (A) >> (GLOBAL_Q - 15))
-#define   _IQ15toIQ(A) ((long) (A) << (GLOBAL_Q - 15))
-#define   _IQtoQ15(A)  ((long) (A) >> (GLOBAL_Q - 15))
-#define   _Q15toIQ(A)  ((long) (A) << (GLOBAL_Q - 15))
-#else
-#define   _IQtoIQ15(A) ((long) (A) << (15 - GLOBAL_Q))
-#define   _IQ15toIQ(A) ((long) (A) >> (15 - GLOBAL_Q))
-#define   _IQtoQ15(A)  ((long) (A) << (15 - GLOBAL_Q))
-#define   _Q15toIQ(A)  ((long) (A) >> (15 - GLOBAL_Q))
-#endif
-
-#if (GLOBAL_Q >= 14)
-#define   _IQtoIQ14(A) ((long) (A) >> (GLOBAL_Q - 14))
-#define   _IQ14toIQ(A) ((long) (A) << (GLOBAL_Q - 14))
-#define   _IQtoQ14(A)  ((long) (A) >> (GLOBAL_Q - 14))
-#define   _Q14toIQ(A)  ((long) (A) << (GLOBAL_Q - 14))
-#else
-#define   _IQtoIQ14(A) ((long) (A) << (14 - GLOBAL_Q))
-#define   _IQ14toIQ(A) ((long) (A) >> (14 - GLOBAL_Q))
-#define   _IQtoQ14(A)  ((long) (A) << (14 - GLOBAL_Q))
-#define   _Q14toIQ(A)  ((long) (A) >> (14 - GLOBAL_Q))
-#endif
-
-#if (GLOBAL_Q >= 13)
-#define   _IQtoIQ13(A) ((long) (A) >> (GLOBAL_Q - 13))
-#define   _IQ13toIQ(A) ((long) (A) << (GLOBAL_Q - 13))
-#define   _IQtoQ13(A)  ((long) (A) >> (GLOBAL_Q - 13))
-#define   _Q13toIQ(A)  ((long) (A) << (GLOBAL_Q - 13))
-#else
-#define   _IQtoIQ13(A) ((long) (A) << (13 - GLOBAL_Q))
-#define   _IQ13toIQ(A) ((long) (A) >> (13 - GLOBAL_Q))
-#define   _IQtoQ13(A)  ((long) (A) << (13 - GLOBAL_Q))
-#define   _Q13toIQ(A)  ((long) (A) >> (13 - GLOBAL_Q))
-#endif
-
-#if (GLOBAL_Q >= 12)
-#define   _IQtoIQ12(A) ((long) (A) >> (GLOBAL_Q - 12))
-#define   _IQ12toIQ(A) ((long) (A) << (GLOBAL_Q - 12))
-#define   _IQtoQ12(A)  ((long) (A) >> (GLOBAL_Q - 12))
-#define   _Q12toIQ(A)  ((long) (A) << (GLOBAL_Q - 12))
-#else
-#define   _IQtoIQ12(A) ((long) (A) << (12 - GLOBAL_Q))
-#define   _IQ12toIQ(A) ((long) (A) >> (12 - GLOBAL_Q))
-#define   _IQtoQ12(A)  ((long) (A) << (12 - GLOBAL_Q))
-#define   _Q12toIQ(A)  ((long) (A) >> (12 - GLOBAL_Q))
-#endif
-
-#if (GLOBAL_Q >= 11)
-#define   _IQtoIQ11(A) ((long) (A) >> (GLOBAL_Q - 11))
-#define   _IQ11toIQ(A) ((long) (A) << (GLOBAL_Q - 11))
-#define   _IQtoQ11(A)  ((long) (A) >> (GLOBAL_Q - 11))
-#define   _Q11toIQ(A)  ((long) (A) << (GLOBAL_Q - 11))
-#else
-#define   _IQtoIQ11(A) ((long) (A) << (11 - GLOBAL_Q))
-#define   _IQ11toIQ(A) ((long) (A) >> (11 - GLOBAL_Q))
-#define   _IQtoQ11(A)  ((long) (A) << (11 - GLOBAL_Q))
-#define   _Q11toIQ(A)  ((long) (A) >> (11 - GLOBAL_Q))
-#endif
-
-#if (GLOBAL_Q >= 10)
-#define   _IQtoIQ10(A) ((long) (A) >> (GLOBAL_Q - 10))
-#define   _IQ10toIQ(A) ((long) (A) << (GLOBAL_Q - 10))
-#define   _IQtoQ10(A)  ((long) (A) >> (GLOBAL_Q - 10))
-#define   _Q10toIQ(A)  ((long) (A) << (GLOBAL_Q - 10))
-#else
-#define   _IQtoIQ10(A) ((long) (A) << (10 - GLOBAL_Q))
-#define   _IQ10toIQ(A) ((long) (A) >> (10 - GLOBAL_Q))
-#define   _IQtoQ10(A)  ((long) (A) << (10 - GLOBAL_Q))
-#define   _Q10toIQ(A)  ((long) (A) >> (10 - GLOBAL_Q))
-#endif
-
-#if (GLOBAL_Q >= 9)
-#define   _IQtoIQ9(A) ((long) (A) >> (GLOBAL_Q - 9))
-#define   _IQ9toIQ(A) ((long) (A) << (GLOBAL_Q - 9))
-#define   _IQtoQ9(A)  ((long) (A) >> (GLOBAL_Q - 9))
-#define   _Q9toIQ(A)  ((long) (A) << (GLOBAL_Q - 9))
-#else
-#define   _IQtoIQ9(A) ((long) (A) << (9 - GLOBAL_Q))
-#define   _IQ9toIQ(A) ((long) (A) >> (9 - GLOBAL_Q))
-#define   _IQtoQ9(A)  ((long) (A) << (9 - GLOBAL_Q))
-#define   _Q9toIQ(A)  ((long) (A) >> (9 - GLOBAL_Q))
-#endif
-
-#if (GLOBAL_Q >= 8)
-#define   _IQtoIQ8(A) ((long) (A) >> (GLOBAL_Q - 8))
-#define   _IQ8toIQ(A) ((long) (A) << (GLOBAL_Q - 8))
-#define   _IQtoQ8(A)  ((long) (A) >> (GLOBAL_Q - 8))
-#define   _Q8toIQ(A)  ((long) (A) << (GLOBAL_Q - 8))
-#else
-#define   _IQtoIQ8(A) ((long) (A) << (8 - GLOBAL_Q))
-#define   _IQ8toIQ(A) ((long) (A) >> (8 - GLOBAL_Q))
-#define   _IQtoQ8(A)  ((long) (A) << (8 - GLOBAL_Q))
-#define   _Q8toIQ(A)  ((long) (A) >> (8 - GLOBAL_Q))
-#endif
-
-#if (GLOBAL_Q >= 7)
-#define   _IQtoIQ7(A) ((long) (A) >> (GLOBAL_Q - 7))
-#define   _IQ7toIQ(A) ((long) (A) << (GLOBAL_Q - 7))
-#define   _IQtoQ7(A)  ((long) (A) >> (GLOBAL_Q - 7))
-#define   _Q7toIQ(A)  ((long) (A) << (GLOBAL_Q - 7))
-#else
-#define   _IQtoIQ7(A) ((long) (A) << (7 - GLOBAL_Q))
-#define   _IQ7toIQ(A) ((long) (A) >> (7 - GLOBAL_Q))
-#define   _IQtoQ7(A)  ((long) (A) << (7 - GLOBAL_Q))
-#define   _Q7toIQ(A)  ((long) (A) >> (7 - GLOBAL_Q))
-#endif
-
-#if (GLOBAL_Q >= 6)
-#define   _IQtoIQ6(A) ((long) (A) >> (GLOBAL_Q - 6))
-#define   _IQ6toIQ(A) ((long) (A) << (GLOBAL_Q - 6))
-#define   _IQtoQ6(A)  ((long) (A) >> (GLOBAL_Q - 6))
-#define   _Q6toIQ(A)  ((long) (A) << (GLOBAL_Q - 6))
-#else
-#define   _IQtoIQ6(A) ((long) (A) << (6 - GLOBAL_Q))
-#define   _IQ6toIQ(A) ((long) (A) >> (6 - GLOBAL_Q))
-#define   _IQtoQ6(A)  ((long) (A) << (6 - GLOBAL_Q))
-#define   _Q6toIQ(A)  ((long) (A) >> (6 - GLOBAL_Q))
-#endif
-
-#if (GLOBAL_Q >= 5)
-#define   _IQtoIQ5(A) ((long) (A) >> (GLOBAL_Q - 5))
-#define   _IQ5toIQ(A) ((long) (A) << (GLOBAL_Q - 5))
-#define   _IQtoQ5(A)  ((long) (A) >> (GLOBAL_Q - 5))
-#define   _Q5toIQ(A)  ((long) (A) << (GLOBAL_Q - 5))
-#else
-#define   _IQtoIQ5(A) ((long) (A) << (5 - GLOBAL_Q))
-#define   _IQ5toIQ(A) ((long) (A) >> (5 - GLOBAL_Q))
-#define   _IQtoQ5(A)  ((long) (A) << (5 - GLOBAL_Q))
-#define   _Q5toIQ(A)  ((long) (A) >> (5 - GLOBAL_Q))
-#endif
-
-#if (GLOBAL_Q >= 4)
-#define   _IQtoIQ4(A) ((long) (A) >> (GLOBAL_Q - 4))
-#define   _IQ4toIQ(A) ((long) (A) << (GLOBAL_Q - 4))
-#define   _IQtoQ4(A)  ((long) (A) >> (GLOBAL_Q - 4))
-#define   _Q4toIQ(A)  ((long) (A) << (GLOBAL_Q - 4))
-#else
-#define   _IQtoIQ4(A) ((long) (A) << (4 - GLOBAL_Q))
-#define   _IQ4toIQ(A) ((long) (A) >> (4 - GLOBAL_Q))
-#define   _IQtoQ4(A)  ((long) (A) << (4 - GLOBAL_Q))
-#define   _Q4toIQ(A)  ((long) (A) >> (4 - GLOBAL_Q))
-#endif
-
-#if (GLOBAL_Q >= 3)
-#define   _IQtoIQ3(A) ((long) (A) >> (GLOBAL_Q - 3))
-#define   _IQ3toIQ(A) ((long) (A) << (GLOBAL_Q - 3))
-#define   _IQtoQ3(A)  ((long) (A) >> (GLOBAL_Q - 3))
-#define   _Q3toIQ(A)  ((long) (A) << (GLOBAL_Q - 3))
-#else
-#define   _IQtoIQ3(A) ((long) (A) << (3 - GLOBAL_Q))
-#define   _IQ3toIQ(A) ((long) (A) >> (3 - GLOBAL_Q))
-#define   _IQtoQ3(A)  ((long) (A) << (3 - GLOBAL_Q))
-#define   _Q3toIQ(A)  ((long) (A) >> (3 - GLOBAL_Q))
-#endif
-
-#if (GLOBAL_Q >= 2)
-#define   _IQtoIQ2(A) ((long) (A) >> (GLOBAL_Q - 2))
-#define   _IQ2toIQ(A) ((long) (A) << (GLOBAL_Q - 2))
-#define   _IQtoQ2(A)  ((long) (A) >> (GLOBAL_Q - 2))
-#define   _Q2toIQ(A)  ((long) (A) << (GLOBAL_Q - 2))
-#else
-#define   _IQtoIQ2(A) ((long) (A) << (2 - GLOBAL_Q))
-#define   _IQ2toIQ(A) ((long) (A) >> (2 - GLOBAL_Q))
-#define   _IQtoQ2(A)  ((long) (A) << (2 - GLOBAL_Q))
-#define   _Q2toIQ(A)  ((long) (A) >> (2 - GLOBAL_Q))
-#endif
-
-#if (GLOBAL_Q >= 1)
-#define   _IQtoQ1(A)  ((long) (A) >> (GLOBAL_Q - 1))
-#define   _Q1toIQ(A)  ((long) (A) << (GLOBAL_Q - 1))
-#else
-#define   _IQtoQ1(A)  ((long) (A) << (1 - GLOBAL_Q))
-#define   _Q1toIQ(A)  ((long) (A) >> (1 - GLOBAL_Q))
-#endif
-
-#define   _IQtoIQ1(A)   ((long) (A) >> (GLOBAL_Q - 1))
-#define   _IQ1toIQ(A)   ((long) (A) << (GLOBAL_Q - 1))
-//---------------------------------------------------------------------------
-#define   _IQmpy(A,B)    __IQmpy(A,B,GLOBAL_Q)
-#define   _IQ30mpy(A,B)  __IQmpy(A,B,30)
-#define   _IQ29mpy(A,B)  __IQmpy(A,B,29)
-#define   _IQ28mpy(A,B)  __IQmpy(A,B,28)
-#define   _IQ27mpy(A,B)  __IQmpy(A,B,27)
-#define   _IQ26mpy(A,B)  __IQmpy(A,B,26)
-#define   _IQ25mpy(A,B)  __IQmpy(A,B,25)
-#define   _IQ24mpy(A,B)  __IQmpy(A,B,24)
-#define   _IQ23mpy(A,B)  __IQmpy(A,B,23)
-#define   _IQ22mpy(A,B)  __IQmpy(A,B,22)
-#define   _IQ21mpy(A,B)  __IQmpy(A,B,21)
-#define   _IQ20mpy(A,B)  __IQmpy(A,B,20)
-#define   _IQ19mpy(A,B)  __IQmpy(A,B,19)
-#define   _IQ18mpy(A,B)  __IQmpy(A,B,18)
-#define   _IQ17mpy(A,B)  __IQmpy(A,B,17)
-#define   _IQ16mpy(A,B)  __IQmpy(A,B,16)
-#define   _IQ15mpy(A,B)  __IQmpy(A,B,15)
-#define   _IQ14mpy(A,B)  __IQmpy(A,B,14)
-#define   _IQ13mpy(A,B)  __IQmpy(A,B,13)
-#define   _IQ12mpy(A,B)  __IQmpy(A,B,12)
-#define   _IQ11mpy(A,B)  __IQmpy(A,B,11)
-#define   _IQ10mpy(A,B)  __IQmpy(A,B,10)
-#define   _IQ9mpy(A,B)   __IQmpy(A,B,9)
-#define   _IQ8mpy(A,B)   __IQmpy(A,B,8)
-#define   _IQ7mpy(A,B)   __IQmpy(A,B,7)
-#define   _IQ6mpy(A,B)   __IQmpy(A,B,6)
-#define   _IQ5mpy(A,B)   __IQmpy(A,B,5)
-#define   _IQ4mpy(A,B)   __IQmpy(A,B,4)
-#define   _IQ3mpy(A,B)   __IQmpy(A,B,3)
-#define   _IQ2mpy(A,B)   __IQmpy(A,B,2)
-#define   _IQ1mpy(A,B)   __IQmpy(A,B,1)
-//---------------------------------------------------------------------------
-extern    long _IQ30rmpy(long A, long B);
-extern    long _IQ29rmpy(long A, long B);
-extern    long _IQ28rmpy(long A, long B);
-extern    long _IQ27rmpy(long A, long B);
-extern    long _IQ26rmpy(long A, long B);
-extern    long _IQ25rmpy(long A, long B);
-extern    long _IQ24rmpy(long A, long B);
-extern    long _IQ23rmpy(long A, long B);
-extern    long _IQ22rmpy(long A, long B);
-extern    long _IQ21rmpy(long A, long B);
-extern    long _IQ20rmpy(long A, long B);
-extern    long _IQ19rmpy(long A, long B);
-extern    long _IQ18rmpy(long A, long B);
-extern    long _IQ17rmpy(long A, long B);
-extern    long _IQ16rmpy(long A, long B);
-extern    long _IQ15rmpy(long A, long B);
-extern    long _IQ14rmpy(long A, long B);
-extern    long _IQ13rmpy(long A, long B);
-extern    long _IQ12rmpy(long A, long B);
-extern    long _IQ11rmpy(long A, long B);
-extern    long _IQ10rmpy(long A, long B);
-extern    long _IQ9rmpy(long A, long B);
-extern    long _IQ8rmpy(long A, long B);
-extern    long _IQ7rmpy(long A, long B);
-extern    long _IQ6rmpy(long A, long B);
-extern    long _IQ5rmpy(long A, long B);
-extern    long _IQ4rmpy(long A, long B);
-extern    long _IQ3rmpy(long A, long B);
-extern    long _IQ2rmpy(long A, long B);
-extern    long _IQ1rmpy(long A, long B);
-
-#if GLOBAL_Q == 30
-#define   _IQrmpy(A,B)  _IQ30rmpy(A,B)
-#endif
-#if GLOBAL_Q == 29
-#define   _IQrmpy(A,B)  _IQ29rmpy(A,B)
-#endif
-#if GLOBAL_Q == 28
-#define   _IQrmpy(A,B)  _IQ28rmpy(A,B)
-#endif
-#if GLOBAL_Q == 27
-#define   _IQrmpy(A,B)  _IQ27rmpy(A,B)
-#endif
-#if GLOBAL_Q == 26
-#define   _IQrmpy(A,B)  _IQ26rmpy(A,B)
-#endif
-#if GLOBAL_Q == 25
-#define   _IQrmpy(A,B)  _IQ25rmpy(A,B)
-#endif
-#if GLOBAL_Q == 24
-#define   _IQrmpy(A,B)  _IQ24rmpy(A,B)
-#endif
-#if GLOBAL_Q == 23
-#define   _IQrmpy(A,B)  _IQ23rmpy(A,B)
-#endif
-#if GLOBAL_Q == 22
-#define   _IQrmpy(A,B)  _IQ22rmpy(A,B)
-#endif
-#if GLOBAL_Q == 21
-#define   _IQrmpy(A,B)  _IQ21rmpy(A,B)
-#endif
-#if GLOBAL_Q == 20
-#define   _IQrmpy(A,B)  _IQ20rmpy(A,B)
-#endif
-#if GLOBAL_Q == 19
-#define   _IQrmpy(A,B)  _IQ19rmpy(A,B)
-#endif
-#if GLOBAL_Q == 18
-#define   _IQrmpy(A,B)  _IQ18rmpy(A,B)
-#endif
-#if GLOBAL_Q == 17
-#define   _IQrmpy(A,B)  _IQ17rmpy(A,B)
-#endif
-#if GLOBAL_Q == 16
-#define   _IQrmpy(A,B)  _IQ16rmpy(A,B)
-#endif
-#if GLOBAL_Q == 15
-#define   _IQrmpy(A,B)  _IQ15rmpy(A,B)
-#endif
-#if GLOBAL_Q == 14
-#define   _IQrmpy(A,B)  _IQ14rmpy(A,B)
-#endif
-#if GLOBAL_Q == 13
-#define   _IQrmpy(A,B)  _IQ13rmpy(A,B)
-#endif
-#if GLOBAL_Q == 12
-#define   _IQrmpy(A,B)  _IQ12rmpy(A,B)
-#endif
-#if GLOBAL_Q == 11
-#define   _IQrmpy(A,B)  _IQ11rmpy(A,B)
-#endif
-#if GLOBAL_Q == 10
-#define   _IQrmpy(A,B)  _IQ10rmpy(A,B)
-#endif
-#if GLOBAL_Q == 9
-#define   _IQrmpy(A,B)  _IQ9rmpy(A,B)
-#endif
-#if GLOBAL_Q == 8
-#define   _IQrmpy(A,B)  _IQ8rmpy(A,B)
-#endif
-#if GLOBAL_Q == 7
-#define   _IQrmpy(A,B)  _IQ7rmpy(A,B)
-#endif
-#if GLOBAL_Q == 6
-#define   _IQrmpy(A,B)  _IQ6rmpy(A,B)
-#endif
-#if GLOBAL_Q == 5
-#define   _IQrmpy(A,B)  _IQ5rmpy(A,B)
-#endif
-#if GLOBAL_Q == 4
-#define   _IQrmpy(A,B)  _IQ4rmpy(A,B)
-#endif
-#if GLOBAL_Q == 3
-#define   _IQrmpy(A,B)  _IQ3rmpy(A,B)
-#endif
-#if GLOBAL_Q == 2
-#define   _IQrmpy(A,B)  _IQ2rmpy(A,B)
-#endif
-#if GLOBAL_Q == 1
-#define   _IQrmpy(A,B)  _IQ1rmpy(A,B)
-#endif
-//---------------------------------------------------------------------------
-extern    long _IQ30rsmpy(long A, long B);
-extern    long _IQ29rsmpy(long A, long B);
-extern    long _IQ28rsmpy(long A, long B);
-extern    long _IQ27rsmpy(long A, long B);
-extern    long _IQ26rsmpy(long A, long B);
-extern    long _IQ25rsmpy(long A, long B);
-extern    long _IQ24rsmpy(long A, long B);
-extern    long _IQ23rsmpy(long A, long B);
-extern    long _IQ22rsmpy(long A, long B);
-extern    long _IQ21rsmpy(long A, long B);
-extern    long _IQ20rsmpy(long A, long B);
-extern    long _IQ19rsmpy(long A, long B);
-extern    long _IQ18rsmpy(long A, long B);
-extern    long _IQ17rsmpy(long A, long B);
-extern    long _IQ16rsmpy(long A, long B);
-extern    long _IQ15rsmpy(long A, long B);
-extern    long _IQ14rsmpy(long A, long B);
-extern    long _IQ13rsmpy(long A, long B);
-extern    long _IQ12rsmpy(long A, long B);
-extern    long _IQ11rsmpy(long A, long B);
-extern    long _IQ10rsmpy(long A, long B);
-extern    long _IQ9rsmpy(long A, long B);
-extern    long _IQ8rsmpy(long A, long B);
-extern    long _IQ7rsmpy(long A, long B);
-extern    long _IQ6rsmpy(long A, long B);
-extern    long _IQ5rsmpy(long A, long B);
-extern    long _IQ4rsmpy(long A, long B);
-extern    long _IQ3rsmpy(long A, long B);
-extern    long _IQ2rsmpy(long A, long B);
-extern    long _IQ1rsmpy(long A, long B);
-
-#if GLOBAL_Q == 30
-#define   _IQrsmpy(A,B)  _IQ30rsmpy(A,B)
-#endif
-#if GLOBAL_Q == 29
-#define   _IQrsmpy(A,B)  _IQ29rsmpy(A,B)
-#endif
-#if GLOBAL_Q == 28
-#define   _IQrsmpy(A,B)  _IQ28rsmpy(A,B)
-#endif
-#if GLOBAL_Q == 27
-#define   _IQrsmpy(A,B)  _IQ27rsmpy(A,B)
-#endif
-#if GLOBAL_Q == 26
-#define   _IQrsmpy(A,B)  _IQ26rsmpy(A,B)
-#endif
-#if GLOBAL_Q == 25
-#define   _IQrsmpy(A,B)  _IQ25rsmpy(A,B)
-#endif
-#if GLOBAL_Q == 24
-#define   _IQrsmpy(A,B)  _IQ24rsmpy(A,B)
-#endif
-#if GLOBAL_Q == 23
-#define   _IQrsmpy(A,B)  _IQ23rsmpy(A,B)
-#endif
-#if GLOBAL_Q == 22
-#define   _IQrsmpy(A,B)  _IQ22rsmpy(A,B)
-#endif
-#if GLOBAL_Q == 21
-#define   _IQrsmpy(A,B)  _IQ21rsmpy(A,B)
-#endif
-#if GLOBAL_Q == 20
-#define   _IQrsmpy(A,B)  _IQ20rsmpy(A,B)
-#endif
-#if GLOBAL_Q == 19
-#define   _IQrsmpy(A,B)  _IQ19rsmpy(A,B)
-#endif
-#if GLOBAL_Q == 18
-#define   _IQrsmpy(A,B)  _IQ18rsmpy(A,B)
-#endif
-#if GLOBAL_Q == 17
-#define   _IQrsmpy(A,B)  _IQ17rsmpy(A,B)
-#endif
-#if GLOBAL_Q == 16
-#define   _IQrsmpy(A,B)  _IQ16rsmpy(A,B)
-#endif
-#if GLOBAL_Q == 15
-#define   _IQrsmpy(A,B)  _IQ15rsmpy(A,B)
-#endif
-#if GLOBAL_Q == 14
-#define   _IQrsmpy(A,B)  _IQ14rsmpy(A,B)
-#endif
-#if GLOBAL_Q == 13
-#define   _IQrsmpy(A,B)  _IQ13rsmpy(A,B)
-#endif
-#if GLOBAL_Q == 12
-#define   _IQrsmpy(A,B)  _IQ12rsmpy(A,B)
-#endif
-#if GLOBAL_Q == 11
-#define   _IQrsmpy(A,B)  _IQ11rsmpy(A,B)
-#endif
-#if GLOBAL_Q == 10
-#define   _IQrsmpy(A,B)  _IQ10rsmpy(A,B)
-#endif
-#if GLOBAL_Q == 9
-#define   _IQrsmpy(A,B)  _IQ9rsmpy(A,B)
-#endif
-#if GLOBAL_Q == 8
-#define   _IQrsmpy(A,B)  _IQ8rsmpy(A,B)
-#endif
-#if GLOBAL_Q == 7
-#define   _IQrsmpy(A,B)  _IQ7rsmpy(A,B)
-#endif
-#if GLOBAL_Q == 6
-#define   _IQrsmpy(A,B)  _IQ6rsmpy(A,B)
-#endif
-#if GLOBAL_Q == 5
-#define   _IQrsmpy(A,B)  _IQ5rsmpy(A,B)
-#endif
-#if GLOBAL_Q == 4
-#define   _IQrsmpy(A,B)  _IQ4rsmpy(A,B)
-#endif
-#if GLOBAL_Q == 3
-#define   _IQrsmpy(A,B)  _IQ3rsmpy(A,B)
-#endif
-#if GLOBAL_Q == 2
-#define   _IQrsmpy(A,B)  _IQ2rsmpy(A,B)
-#endif
-#if GLOBAL_Q == 1
-#define   _IQrsmpy(A,B)  _IQ1rsmpy(A,B)
-#endif
-//---------------------------------------------------------------------------
-extern    long _IQ30div(long A, long B);
-extern    long _IQ29div(long A, long B);
-extern    long _IQ28div(long A, long B);
-extern    long _IQ27div(long A, long B);
-extern    long _IQ26div(long A, long B);
-extern    long _IQ25div(long A, long B);
-extern    long _IQ24div(long A, long B);
-extern    long _IQ23div(long A, long B);
-extern    long _IQ22div(long A, long B);
-extern    long _IQ21div(long A, long B);
-extern    long _IQ20div(long A, long B);
-extern    long _IQ19div(long A, long B);
-extern    long _IQ18div(long A, long B);
-extern    long _IQ17div(long A, long B);
-extern    long _IQ16div(long A, long B);
-extern    long _IQ15div(long A, long B);
-extern    long _IQ14div(long A, long B);
-extern    long _IQ13div(long A, long B);
-extern    long _IQ12div(long A, long B);
-extern    long _IQ11div(long A, long B);
-extern    long _IQ10div(long A, long B);
-extern    long _IQ9div(long A, long B);
-extern    long _IQ8div(long A, long B);
-extern    long _IQ7div(long A, long B);
-extern    long _IQ6div(long A, long B);
-extern    long _IQ5div(long A, long B);
-extern    long _IQ4div(long A, long B);
-extern    long _IQ3div(long A, long B);
-extern    long _IQ2div(long A, long B);
-extern    long _IQ1div(long A, long B);
-
-#if GLOBAL_Q == 30
-#define   _IQdiv(A,B)  _IQ30div(A,B)
-#endif
-#if GLOBAL_Q == 29
-#define   _IQdiv(A,B)  _IQ29div(A,B)
-#endif
-#if GLOBAL_Q == 28
-#define   _IQdiv(A,B)  _IQ28div(A,B)
-#endif
-#if GLOBAL_Q == 27
-#define   _IQdiv(A,B)  _IQ27div(A,B)
-#endif
-#if GLOBAL_Q == 26
-#define   _IQdiv(A,B)  _IQ26div(A,B)
-#endif
-#if GLOBAL_Q == 25
-#define   _IQdiv(A,B)  _IQ25div(A,B)
-#endif
-#if GLOBAL_Q == 24
-#define   _IQdiv(A,B)  _IQ24div(A,B)
-#endif
-#if GLOBAL_Q == 23
-#define   _IQdiv(A,B)  _IQ23div(A,B)
-#endif
-#if GLOBAL_Q == 22
-#define   _IQdiv(A,B)  _IQ22div(A,B)
-#endif
-#if GLOBAL_Q == 21
-#define   _IQdiv(A,B)  _IQ21div(A,B)
-#endif
-#if GLOBAL_Q == 20
-#define   _IQdiv(A,B)  _IQ20div(A,B)
-#endif
-#if GLOBAL_Q == 19
-#define   _IQdiv(A,B)  _IQ19div(A,B)
-#endif
-#if GLOBAL_Q == 18
-#define   _IQdiv(A,B)  _IQ18div(A,B)
-#endif
-#if GLOBAL_Q == 17
-#define   _IQdiv(A,B)  _IQ17div(A,B)
-#endif
-#if GLOBAL_Q == 16
-#define   _IQdiv(A,B)  _IQ16div(A,B)
-#endif
-#if GLOBAL_Q == 15
-#define   _IQdiv(A,B)  _IQ15div(A,B)
-#endif
-#if GLOBAL_Q == 14
-#define   _IQdiv(A,B)  _IQ14div(A,B)
-#endif
-#if GLOBAL_Q == 13
-#define   _IQdiv(A,B)  _IQ13div(A,B)
-#endif
-#if GLOBAL_Q == 12
-#define   _IQdiv(A,B)  _IQ12div(A,B)
-#endif
-#if GLOBAL_Q == 11
-#define   _IQdiv(A,B)  _IQ11div(A,B)
-#endif
-#if GLOBAL_Q == 10
-#define   _IQdiv(A,B)  _IQ10div(A,B)
-#endif
-#if GLOBAL_Q == 9
-#define   _IQdiv(A,B)  _IQ9div(A,B)
-#endif
-#if GLOBAL_Q == 8
-#define   _IQdiv(A,B)  _IQ8div(A,B)
-#endif
-#if GLOBAL_Q == 7
-#define   _IQdiv(A,B)  _IQ7div(A,B)
-#endif
-#if GLOBAL_Q == 6
-#define   _IQdiv(A,B)  _IQ6div(A,B)
-#endif
-#if GLOBAL_Q == 5
-#define   _IQdiv(A,B)  _IQ5div(A,B)
-#endif
-#if GLOBAL_Q == 4
-#define   _IQdiv(A,B)  _IQ4div(A,B)
-#endif
-#if GLOBAL_Q == 3
-#define   _IQdiv(A,B)  _IQ3div(A,B)
-#endif
-#if GLOBAL_Q == 2
-#define   _IQdiv(A,B)  _IQ2div(A,B)
-#endif
-#if GLOBAL_Q == 1
-#define   _IQdiv(A,B)  _IQ1div(A,B)
-#endif
-//---------------------------------------------------------------------------
-extern    long _IQ30sin(long A);
-extern    long _IQ29sin(long A);
-extern    long _IQ28sin(long A);
-extern    long _IQ27sin(long A);
-extern    long _IQ26sin(long A);
-extern    long _IQ25sin(long A);
-extern    long _IQ24sin(long A);
-extern    long _IQ23sin(long A);
-extern    long _IQ22sin(long A);
-extern    long _IQ21sin(long A);
-extern    long _IQ20sin(long A);
-extern    long _IQ19sin(long A);
-extern    long _IQ18sin(long A);
-extern    long _IQ17sin(long A);
-extern    long _IQ16sin(long A);
-extern    long _IQ15sin(long A);
-extern    long _IQ14sin(long A);
-extern    long _IQ13sin(long A);
-extern    long _IQ12sin(long A);
-extern    long _IQ11sin(long A);
-extern    long _IQ10sin(long A);
-extern    long _IQ9sin(long A);
-extern    long _IQ8sin(long A);
-extern    long _IQ7sin(long A);
-extern    long _IQ6sin(long A);
-extern    long _IQ5sin(long A);
-extern    long _IQ4sin(long A);
-extern    long _IQ3sin(long A);
-extern    long _IQ2sin(long A);
-extern    long _IQ1sin(long A);
-
-#if GLOBAL_Q == 30
-#define   _IQsin(A)  _IQ30sin(A)
-#endif
-#if GLOBAL_Q == 29
-#define   _IQsin(A)  _IQ29sin(A)
-#endif
-#if GLOBAL_Q == 28
-#define   _IQsin(A)  _IQ28sin(A)
-#endif
-#if GLOBAL_Q == 27
-#define   _IQsin(A)  _IQ27sin(A)
-#endif
-#if GLOBAL_Q == 26
-#define   _IQsin(A)  _IQ26sin(A)
-#endif
-#if GLOBAL_Q == 25
-#define   _IQsin(A)  _IQ25sin(A)
-#endif
-#if GLOBAL_Q == 24
-#define   _IQsin(A)  _IQ24sin(A)
-#endif
-#if GLOBAL_Q == 23
-#define   _IQsin(A)  _IQ23sin(A)
-#endif
-#if GLOBAL_Q == 22
-#define   _IQsin(A)  _IQ22sin(A)
-#endif
-#if GLOBAL_Q == 21
-#define   _IQsin(A)  _IQ21sin(A)
-#endif
-#if GLOBAL_Q == 20
-#define   _IQsin(A)  _IQ20sin(A)
-#endif
-#if GLOBAL_Q == 19
-#define   _IQsin(A)  _IQ19sin(A)
-#endif
-#if GLOBAL_Q == 18
-#define   _IQsin(A)  _IQ18sin(A)
-#endif
-#if GLOBAL_Q == 17
-#define   _IQsin(A)  _IQ17sin(A)
-#endif
-#if GLOBAL_Q == 16
-#define   _IQsin(A)  _IQ16sin(A)
-#endif
-#if GLOBAL_Q == 15
-#define   _IQsin(A)  _IQ15sin(A)
-#endif
-#if GLOBAL_Q == 14
-#define   _IQsin(A)  _IQ14sin(A)
-#endif
-#if GLOBAL_Q == 13
-#define   _IQsin(A)  _IQ13sin(A)
-#endif
-#if GLOBAL_Q == 12
-#define   _IQsin(A)  _IQ12sin(A)
-#endif
-#if GLOBAL_Q == 11
-#define   _IQsin(A)  _IQ11sin(A)
-#endif
-#if GLOBAL_Q == 10
-#define   _IQsin(A)  _IQ10sin(A)
-#endif
-#if GLOBAL_Q == 9
-#define   _IQsin(A)  _IQ9sin(A)
-#endif
-#if GLOBAL_Q == 8
-#define   _IQsin(A)  _IQ8sin(A)
-#endif
-#if GLOBAL_Q == 7
-#define   _IQsin(A)  _IQ7sin(A)
-#endif
-#if GLOBAL_Q == 6
-#define   _IQsin(A)  _IQ6sin(A)
-#endif
-#if GLOBAL_Q == 5
-#define   _IQsin(A)  _IQ5sin(A)
-#endif
-#if GLOBAL_Q == 4
-#define   _IQsin(A)  _IQ4sin(A)
-#endif
-#if GLOBAL_Q == 3
-#define   _IQsin(A)  _IQ3sin(A)
-#endif
-#if GLOBAL_Q == 2
-#define   _IQsin(A)  _IQ2sin(A)
-#endif
-#if GLOBAL_Q == 1
-#define   _IQsin(A)  _IQ1sin(A)
-#endif
-//---------------------------------------------------------------------------
-extern    long _IQ30sinPU(long A);
-extern    long _IQ29sinPU(long A);
-extern    long _IQ28sinPU(long A);
-extern    long _IQ27sinPU(long A);
-extern    long _IQ26sinPU(long A);
-extern    long _IQ25sinPU(long A);
-extern    long _IQ24sinPU(long A);
-extern    long _IQ23sinPU(long A);
-extern    long _IQ22sinPU(long A);
-extern    long _IQ21sinPU(long A);
-extern    long _IQ20sinPU(long A);
-extern    long _IQ19sinPU(long A);
-extern    long _IQ18sinPU(long A);
-extern    long _IQ17sinPU(long A);
-extern    long _IQ16sinPU(long A);
-extern    long _IQ15sinPU(long A);
-extern    long _IQ14sinPU(long A);
-extern    long _IQ13sinPU(long A);
-extern    long _IQ12sinPU(long A);
-extern    long _IQ11sinPU(long A);
-extern    long _IQ10sinPU(long A);
-extern    long _IQ9sinPU(long A);
-extern    long _IQ8sinPU(long A);
-extern    long _IQ7sinPU(long A);
-extern    long _IQ6sinPU(long A);
-extern    long _IQ5sinPU(long A);
-extern    long _IQ4sinPU(long A);
-extern    long _IQ3sinPU(long A);
-extern    long _IQ2sinPU(long A);
-extern    long _IQ1sinPU(long A);
-
-#if GLOBAL_Q == 30
-#define   _IQsinPU(A)  _IQ30sinPU(A)
-#endif
-#if GLOBAL_Q == 29
-#define   _IQsinPU(A)  _IQ29sinPU(A)
-#endif
-#if GLOBAL_Q == 28
-#define   _IQsinPU(A)  _IQ28sinPU(A)
-#endif
-#if GLOBAL_Q == 27
-#define   _IQsinPU(A)  _IQ27sinPU(A)
-#endif
-#if GLOBAL_Q == 26
-#define   _IQsinPU(A)  _IQ26sinPU(A)
-#endif
-#if GLOBAL_Q == 25
-#define   _IQsinPU(A)  _IQ25sinPU(A)
-#endif
-#if GLOBAL_Q == 24
-#define   _IQsinPU(A)  _IQ24sinPU(A)
-#endif
-#if GLOBAL_Q == 23
-#define   _IQsinPU(A)  _IQ23sinPU(A)
-#endif
-#if GLOBAL_Q == 22
-#define   _IQsinPU(A)  _IQ22sinPU(A)
-#endif
-#if GLOBAL_Q == 21
-#define   _IQsinPU(A)  _IQ21sinPU(A)
-#endif
-#if GLOBAL_Q == 20
-#define   _IQsinPU(A)  _IQ20sinPU(A)
-#endif
-#if GLOBAL_Q == 19
-#define   _IQsinPU(A)  _IQ19sinPU(A)
-#endif
-#if GLOBAL_Q == 18
-#define   _IQsinPU(A)  _IQ18sinPU(A)
-#endif
-#if GLOBAL_Q == 17
-#define   _IQsinPU(A)  _IQ17sinPU(A)
-#endif
-#if GLOBAL_Q == 16
-#define   _IQsinPU(A)  _IQ16sinPU(A)
-#endif
-#if GLOBAL_Q == 15
-#define   _IQsinPU(A)  _IQ15sinPU(A)
-#endif
-#if GLOBAL_Q == 14
-#define   _IQsinPU(A)  _IQ14sinPU(A)
-#endif
-#if GLOBAL_Q == 13
-#define   _IQsinPU(A)  _IQ13sinPU(A)
-#endif
-#if GLOBAL_Q == 12
-#define   _IQsinPU(A)  _IQ12sinPU(A)
-#endif
-#if GLOBAL_Q == 11
-#define   _IQsinPU(A)  _IQ11sinPU(A)
-#endif
-#if GLOBAL_Q == 10
-#define   _IQsinPU(A)  _IQ10sinPU(A)
-#endif
-#if GLOBAL_Q == 9
-#define   _IQsinPU(A)  _IQ9sinPU(A)
-#endif
-#if GLOBAL_Q == 8
-#define   _IQsinPU(A)  _IQ8sinPU(A)
-#endif
-#if GLOBAL_Q == 7
-#define   _IQsinPU(A)  _IQ7sinPU(A)
-#endif
-#if GLOBAL_Q == 6
-#define   _IQsinPU(A)  _IQ6sinPU(A)
-#endif
-#if GLOBAL_Q == 5
-#define   _IQsinPU(A)  _IQ5sinPU(A)
-#endif
-#if GLOBAL_Q == 4
-#define   _IQsinPU(A)  _IQ4sinPU(A)
-#endif
-#if GLOBAL_Q == 3
-#define   _IQsinPU(A)  _IQ3sinPU(A)
-#endif
-#if GLOBAL_Q == 2
-#define   _IQsinPU(A)  _IQ2sinPU(A)
-#endif
-#if GLOBAL_Q == 1
-#define   _IQsinPU(A)  _IQ1sinPU(A)
-#endif
-//---------------------------------------------------------------------------
-extern    long _IQ30asin(long A);
-extern    long _IQ29asin(long A);
-extern    long _IQ28asin(long A);
-extern    long _IQ27asin(long A);
-extern    long _IQ26asin(long A);
-extern    long _IQ25asin(long A);
-extern    long _IQ24asin(long A);
-extern    long _IQ23asin(long A);
-extern    long _IQ22asin(long A);
-extern    long _IQ21asin(long A);
-extern    long _IQ20asin(long A);
-extern    long _IQ19asin(long A);
-extern    long _IQ18asin(long A);
-extern    long _IQ17asin(long A);
-extern    long _IQ16asin(long A);
-extern    long _IQ15asin(long A);
-extern    long _IQ14asin(long A);
-extern    long _IQ13asin(long A);
-extern    long _IQ12asin(long A);
-extern    long _IQ11asin(long A);
-extern    long _IQ10asin(long A);
-extern    long _IQ9asin(long A);
-extern    long _IQ8asin(long A);
-extern    long _IQ7asin(long A);
-extern    long _IQ6asin(long A);
-extern    long _IQ5asin(long A);
-extern    long _IQ4asin(long A);
-extern    long _IQ3asin(long A);
-extern    long _IQ2asin(long A);
-extern    long _IQ1asin(long A);
-
-#if GLOBAL_Q == 30
-#define   _IQasin(A)  _IQ30asin(A)
-#endif
-#if GLOBAL_Q == 29
-#define   _IQasin(A)  _IQ29asin(A)
-#endif
-#if GLOBAL_Q == 28
-#define   _IQasin(A)  _IQ28asin(A)
-#endif
-#if GLOBAL_Q == 27
-#define   _IQasin(A)  _IQ27asin(A)
-#endif
-#if GLOBAL_Q == 26
-#define   _IQasin(A)  _IQ26asin(A)
-#endif
-#if GLOBAL_Q == 25
-#define   _IQasin(A)  _IQ25asin(A)
-#endif
-#if GLOBAL_Q == 24
-#define   _IQasin(A)  _IQ24asin(A)
-#endif
-#if GLOBAL_Q == 23
-#define   _IQasin(A)  _IQ23asin(A)
-#endif
-#if GLOBAL_Q == 22
-#define   _IQasin(A)  _IQ22asin(A)
-#endif
-#if GLOBAL_Q == 21
-#define   _IQasin(A)  _IQ21asin(A)
-#endif
-#if GLOBAL_Q == 20
-#define   _IQasin(A)  _IQ20asin(A)
-#endif
-#if GLOBAL_Q == 19
-#define   _IQasin(A)  _IQ19asin(A)
-#endif
-#if GLOBAL_Q == 18
-#define   _IQasin(A)  _IQ18asin(A)
-#endif
-#if GLOBAL_Q == 17
-#define   _IQasin(A)  _IQ17asin(A)
-#endif
-#if GLOBAL_Q == 16
-#define   _IQasin(A)  _IQ16asin(A)
-#endif
-#if GLOBAL_Q == 15
-#define   _IQasin(A)  _IQ15asin(A)
-#endif
-#if GLOBAL_Q == 14
-#define   _IQasin(A)  _IQ14asin(A)
-#endif
-#if GLOBAL_Q == 13
-#define   _IQasin(A)  _IQ13asin(A)
-#endif
-#if GLOBAL_Q == 12
-#define   _IQasin(A)  _IQ12asin(A)
-#endif
-#if GLOBAL_Q == 11
-#define   _IQasin(A)  _IQ11asin(A)
-#endif
-#if GLOBAL_Q == 10
-#define   _IQasin(A)  _IQ10asin(A)
-#endif
-#if GLOBAL_Q == 9
-#define   _IQasin(A)  _IQ9asin(A)
-#endif
-#if GLOBAL_Q == 8
-#define   _IQasin(A)  _IQ8asin(A)
-#endif
-#if GLOBAL_Q == 7
-#define   _IQasin(A)  _IQ7asin(A)
-#endif
-#if GLOBAL_Q == 6
-#define   _IQasin(A)  _IQ6asin(A)
-#endif
-#if GLOBAL_Q == 5
-#define   _IQasin(A)  _IQ5asin(A)
-#endif
-#if GLOBAL_Q == 4
-#define   _IQasin(A)  _IQ4asin(A)
-#endif
-#if GLOBAL_Q == 3
-#define   _IQasin(A)  _IQ3asin(A)
-#endif
-#if GLOBAL_Q == 2
-#define   _IQasin(A)  _IQ2asin(A)
-#endif
-#if GLOBAL_Q == 1
-#define   _IQasin(A)  _IQ1asin(A)
-#endif
-//---------------------------------------------------------------------------
-extern    long _IQ30cos(long A);
-extern    long _IQ29cos(long A);
-extern    long _IQ28cos(long A);
-extern    long _IQ27cos(long A);
-extern    long _IQ26cos(long A);
-extern    long _IQ25cos(long A);
-extern    long _IQ24cos(long A);
-extern    long _IQ23cos(long A);
-extern    long _IQ22cos(long A);
-extern    long _IQ21cos(long A);
-extern    long _IQ20cos(long A);
-extern    long _IQ19cos(long A);
-extern    long _IQ18cos(long A);
-extern    long _IQ17cos(long A);
-extern    long _IQ16cos(long A);
-extern    long _IQ15cos(long A);
-extern    long _IQ14cos(long A);
-extern    long _IQ13cos(long A);
-extern    long _IQ12cos(long A);
-extern    long _IQ11cos(long A);
-extern    long _IQ10cos(long A);
-extern    long _IQ9cos(long A);
-extern    long _IQ8cos(long A);
-extern    long _IQ7cos(long A);
-extern    long _IQ6cos(long A);
-extern    long _IQ5cos(long A);
-extern    long _IQ4cos(long A);
-extern    long _IQ3cos(long A);
-extern    long _IQ2cos(long A);
-extern    long _IQ1cos(long A);
-
-#if GLOBAL_Q == 30
-#define   _IQcos(A)  _IQ30cos(A)
-#endif
-#if GLOBAL_Q == 29
-#define   _IQcos(A)  _IQ29cos(A)
-#endif
-#if GLOBAL_Q == 28
-#define   _IQcos(A)  _IQ28cos(A)
-#endif
-#if GLOBAL_Q == 27
-#define   _IQcos(A)  _IQ27cos(A)
-#endif
-#if GLOBAL_Q == 26
-#define   _IQcos(A)  _IQ26cos(A)
-#endif
-#if GLOBAL_Q == 25
-#define   _IQcos(A)  _IQ25cos(A)
-#endif
-#if GLOBAL_Q == 24
-#define   _IQcos(A)  _IQ24cos(A)
-#endif
-#if GLOBAL_Q == 23
-#define   _IQcos(A)  _IQ23cos(A)
-#endif
-#if GLOBAL_Q == 22
-#define   _IQcos(A)  _IQ22cos(A)
-#endif
-#if GLOBAL_Q == 21
-#define   _IQcos(A)  _IQ21cos(A)
-#endif
-#if GLOBAL_Q == 20
-#define   _IQcos(A)  _IQ20cos(A)
-#endif
-#if GLOBAL_Q == 19
-#define   _IQcos(A)  _IQ19cos(A)
-#endif
-#if GLOBAL_Q == 18
-#define   _IQcos(A)  _IQ18cos(A)
-#endif
-#if GLOBAL_Q == 17
-#define   _IQcos(A)  _IQ17cos(A)
-#endif
-#if GLOBAL_Q == 16
-#define   _IQcos(A)  _IQ16cos(A)
-#endif
-#if GLOBAL_Q == 15
-#define   _IQcos(A)  _IQ15cos(A)
-#endif
-#if GLOBAL_Q == 14
-#define   _IQcos(A)  _IQ14cos(A)
-#endif
-#if GLOBAL_Q == 13
-#define   _IQcos(A)  _IQ13cos(A)
-#endif
-#if GLOBAL_Q == 12
-#define   _IQcos(A)  _IQ12cos(A)
-#endif
-#if GLOBAL_Q == 11
-#define   _IQcos(A)  _IQ11cos(A)
-#endif
-#if GLOBAL_Q == 10
-#define   _IQcos(A)  _IQ10cos(A)
-#endif
-#if GLOBAL_Q == 9
-#define   _IQcos(A)  _IQ9cos(A)
-#endif
-#if GLOBAL_Q == 8
-#define   _IQcos(A)  _IQ8cos(A)
-#endif
-#if GLOBAL_Q == 7
-#define   _IQcos(A)  _IQ7cos(A)
-#endif
-#if GLOBAL_Q == 6
-#define   _IQcos(A)  _IQ6cos(A)
-#endif
-#if GLOBAL_Q == 5
-#define   _IQcos(A)  _IQ5cos(A)
-#endif
-#if GLOBAL_Q == 4
-#define   _IQcos(A)  _IQ4cos(A)
-#endif
-#if GLOBAL_Q == 3
-#define   _IQcos(A)  _IQ3cos(A)
-#endif
-#if GLOBAL_Q == 2
-#define   _IQcos(A)  _IQ2cos(A)
-#endif
-#if GLOBAL_Q == 1
-#define   _IQcos(A)  _IQ1cos(A)
-#endif
-//---------------------------------------------------------------------------
-extern    long _IQ30cosPU(long A);
-extern    long _IQ29cosPU(long A);
-extern    long _IQ28cosPU(long A);
-extern    long _IQ27cosPU(long A);
-extern    long _IQ26cosPU(long A);
-extern    long _IQ25cosPU(long A);
-extern    long _IQ24cosPU(long A);
-extern    long _IQ23cosPU(long A);
-extern    long _IQ22cosPU(long A);
-extern    long _IQ21cosPU(long A);
-extern    long _IQ20cosPU(long A);
-extern    long _IQ19cosPU(long A);
-extern    long _IQ18cosPU(long A);
-extern    long _IQ17cosPU(long A);
-extern    long _IQ16cosPU(long A);
-extern    long _IQ15cosPU(long A);
-extern    long _IQ14cosPU(long A);
-extern    long _IQ13cosPU(long A);
-extern    long _IQ12cosPU(long A);
-extern    long _IQ11cosPU(long A);
-extern    long _IQ10cosPU(long A);
-extern    long _IQ9cosPU(long A);
-extern    long _IQ8cosPU(long A);
-extern    long _IQ7cosPU(long A);
-extern    long _IQ6cosPU(long A);
-extern    long _IQ5cosPU(long A);
-extern    long _IQ4cosPU(long A);
-extern    long _IQ3cosPU(long A);
-extern    long _IQ2cosPU(long A);
-extern    long _IQ1cosPU(long A);
-
-#if GLOBAL_Q == 30
-#define   _IQcosPU(A)  _IQ30cosPU(A)
-#endif
-#if GLOBAL_Q == 29
-#define   _IQcosPU(A)  _IQ29cosPU(A)
-#endif
-#if GLOBAL_Q == 28
-#define   _IQcosPU(A)  _IQ28cosPU(A)
-#endif
-#if GLOBAL_Q == 27
-#define   _IQcosPU(A)  _IQ27cosPU(A)
-#endif
-#if GLOBAL_Q == 26
-#define   _IQcosPU(A)  _IQ26cosPU(A)
-#endif
-#if GLOBAL_Q == 25
-#define   _IQcosPU(A)  _IQ25cosPU(A)
-#endif
-#if GLOBAL_Q == 24
-#define   _IQcosPU(A)  _IQ24cosPU(A)
-#endif
-#if GLOBAL_Q == 23
-#define   _IQcosPU(A)  _IQ23cosPU(A)
-#endif
-#if GLOBAL_Q == 22
-#define   _IQcosPU(A)  _IQ22cosPU(A)
-#endif
-#if GLOBAL_Q == 21
-#define   _IQcosPU(A)  _IQ21cosPU(A)
-#endif
-#if GLOBAL_Q == 20
-#define   _IQcosPU(A)  _IQ20cosPU(A)
-#endif
-#if GLOBAL_Q == 19
-#define   _IQcosPU(A)  _IQ19cosPU(A)
-#endif
-#if GLOBAL_Q == 18
-#define   _IQcosPU(A)  _IQ18cosPU(A)
-#endif
-#if GLOBAL_Q == 17
-#define   _IQcosPU(A)  _IQ17cosPU(A)
-#endif
-#if GLOBAL_Q == 16
-#define   _IQcosPU(A)  _IQ16cosPU(A)
-#endif
-#if GLOBAL_Q == 15
-#define   _IQcosPU(A)  _IQ15cosPU(A)
-#endif
-#if GLOBAL_Q == 14
-#define   _IQcosPU(A)  _IQ14cosPU(A)
-#endif
-#if GLOBAL_Q == 13
-#define   _IQcosPU(A)  _IQ13cosPU(A)
-#endif
-#if GLOBAL_Q == 12
-#define   _IQcosPU(A)  _IQ12cosPU(A)
-#endif
-#if GLOBAL_Q == 11
-#define   _IQcosPU(A)  _IQ11cosPU(A)
-#endif
-#if GLOBAL_Q == 10
-#define   _IQcosPU(A)  _IQ10cosPU(A)
-#endif
-#if GLOBAL_Q == 9
-#define   _IQcosPU(A)  _IQ9cosPU(A)
-#endif
-#if GLOBAL_Q == 8
-#define   _IQcosPU(A)  _IQ8cosPU(A)
-#endif
-#if GLOBAL_Q == 7
-#define   _IQcosPU(A)  _IQ7cosPU(A)
-#endif
-#if GLOBAL_Q == 6
-#define   _IQcosPU(A)  _IQ6cosPU(A)
-#endif
-#if GLOBAL_Q == 5
-#define   _IQcosPU(A)  _IQ5cosPU(A)
-#endif
-#if GLOBAL_Q == 4
-#define   _IQcosPU(A)  _IQ4cosPU(A)
-#endif
-#if GLOBAL_Q == 3
-#define   _IQcosPU(A)  _IQ3cosPU(A)
-#endif
-#if GLOBAL_Q == 2
-#define   _IQcosPU(A)  _IQ2cosPU(A)
-#endif
-#if GLOBAL_Q == 1
-#define   _IQcosPU(A)  _IQ1cosPU(A)
-#endif
-//---------------------------------------------------------------------------
-extern    long _IQ30acos(long A);
-extern    long _IQ29acos(long A);
-extern    long _IQ28acos(long A);
-extern    long _IQ27acos(long A);
-extern    long _IQ26acos(long A);
-extern    long _IQ25acos(long A);
-extern    long _IQ24acos(long A);
-extern    long _IQ23acos(long A);
-extern    long _IQ22acos(long A);
-extern    long _IQ21acos(long A);
-extern    long _IQ20acos(long A);
-extern    long _IQ19acos(long A);
-extern    long _IQ18acos(long A);
-extern    long _IQ17acos(long A);
-extern    long _IQ16acos(long A);
-extern    long _IQ15acos(long A);
-extern    long _IQ14acos(long A);
-extern    long _IQ13acos(long A);
-extern    long _IQ12acos(long A);
-extern    long _IQ11acos(long A);
-extern    long _IQ10acos(long A);
-extern    long _IQ9acos(long A);
-extern    long _IQ8acos(long A);
-extern    long _IQ7acos(long A);
-extern    long _IQ6acos(long A);
-extern    long _IQ5acos(long A);
-extern    long _IQ4acos(long A);
-extern    long _IQ3acos(long A);
-extern    long _IQ2acos(long A);
-extern    long _IQ1acos(long A);
-
-#if GLOBAL_Q == 30
-#define   _IQacos(A)  _IQ30acos(A)
-#endif
-#if GLOBAL_Q == 29
-#define   _IQacos(A)  _IQ29acos(A)
-#endif
-#if GLOBAL_Q == 28
-#define   _IQacos(A)  _IQ28acos(A)
-#endif
-#if GLOBAL_Q == 27
-#define   _IQacos(A)  _IQ27acos(A)
-#endif
-#if GLOBAL_Q == 26
-#define   _IQacos(A)  _IQ26acos(A)
-#endif
-#if GLOBAL_Q == 25
-#define   _IQacos(A)  _IQ25acos(A)
-#endif
-#if GLOBAL_Q == 24
-#define   _IQacos(A)  _IQ24acos(A)
-#endif
-#if GLOBAL_Q == 23
-#define   _IQacos(A)  _IQ23acos(A)
-#endif
-#if GLOBAL_Q == 22
-#define   _IQacos(A)  _IQ22acos(A)
-#endif
-#if GLOBAL_Q == 21
-#define   _IQacos(A)  _IQ21acos(A)
-#endif
-#if GLOBAL_Q == 20
-#define   _IQacos(A)  _IQ20acos(A)
-#endif
-#if GLOBAL_Q == 19
-#define   _IQacos(A)  _IQ19acos(A)
-#endif
-#if GLOBAL_Q == 18
-#define   _IQacos(A)  _IQ18acos(A)
-#endif
-#if GLOBAL_Q == 17
-#define   _IQacos(A)  _IQ17acos(A)
-#endif
-#if GLOBAL_Q == 16
-#define   _IQacos(A)  _IQ16acos(A)
-#endif
-#if GLOBAL_Q == 15
-#define   _IQacos(A)  _IQ15acos(A)
-#endif
-#if GLOBAL_Q == 14
-#define   _IQacos(A)  _IQ14acos(A)
-#endif
-#if GLOBAL_Q == 13
-#define   _IQacos(A)  _IQ13acos(A)
-#endif
-#if GLOBAL_Q == 12
-#define   _IQacos(A)  _IQ12acos(A)
-#endif
-#if GLOBAL_Q == 11
-#define   _IQacos(A)  _IQ11acos(A)
-#endif
-#if GLOBAL_Q == 10
-#define   _IQacos(A)  _IQ10acos(A)
-#endif
-#if GLOBAL_Q == 9
-#define   _IQacos(A)  _IQ9acos(A)
-#endif
-#if GLOBAL_Q == 8
-#define   _IQacos(A)  _IQ8acos(A)
-#endif
-#if GLOBAL_Q == 7
-#define   _IQacos(A)  _IQ7acos(A)
-#endif
-#if GLOBAL_Q == 6
-#define   _IQacos(A)  _IQ6acos(A)
-#endif
-#if GLOBAL_Q == 5
-#define   _IQacos(A)  _IQ5acos(A)
-#endif
-#if GLOBAL_Q == 4
-#define   _IQacos(A)  _IQ4acos(A)
-#endif
-#if GLOBAL_Q == 3
-#define   _IQacos(A)  _IQ3acos(A)
-#endif
-#if GLOBAL_Q == 2
-#define   _IQacos(A)  _IQ2acos(A)
-#endif
-#if GLOBAL_Q == 1
-#define   _IQacos(A)  _IQ1acos(A)
-#endif
-//---------------------------------------------------------------------------
-extern    long _IQ30atan2(long A, long B);
-extern    long _IQ29atan2(long A, long B);
-extern    long _IQ28atan2(long A, long B);
-extern    long _IQ27atan2(long A, long B);
-extern    long _IQ26atan2(long A, long B);
-extern    long _IQ25atan2(long A, long B);
-extern    long _IQ24atan2(long A, long B);
-extern    long _IQ23atan2(long A, long B);
-extern    long _IQ22atan2(long A, long B);
-extern    long _IQ21atan2(long A, long B);
-extern    long _IQ20atan2(long A, long B);
-extern    long _IQ19atan2(long A, long B);
-extern    long _IQ18atan2(long A, long B);
-extern    long _IQ17atan2(long A, long B);
-extern    long _IQ16atan2(long A, long B);
-extern    long _IQ15atan2(long A, long B);
-extern    long _IQ14atan2(long A, long B);
-extern    long _IQ13atan2(long A, long B);
-extern    long _IQ12atan2(long A, long B);
-extern    long _IQ11atan2(long A, long B);
-extern    long _IQ10atan2(long A, long B);
-extern    long _IQ9atan2(long A, long B);
-extern    long _IQ8atan2(long A, long B);
-extern    long _IQ7atan2(long A, long B);
-extern    long _IQ6atan2(long A, long B);
-extern    long _IQ5atan2(long A, long B);
-extern    long _IQ4atan2(long A, long B);
-extern    long _IQ3atan2(long A, long B);
-extern    long _IQ2atan2(long A, long B);
-extern    long _IQ1atan2(long A, long B);
-
-#if GLOBAL_Q == 30
-#define   _IQatan2(A,B)  _IQ30atan2(A,B)
-#endif
-#if GLOBAL_Q == 29
-#define   _IQatan2(A,B)  _IQ29atan2(A,B)
-#endif
-#if GLOBAL_Q == 28
-#define   _IQatan2(A,B)  _IQ28atan2(A,B)
-#endif
-#if GLOBAL_Q == 27
-#define   _IQatan2(A,B)  _IQ27atan2(A,B)
-#endif
-#if GLOBAL_Q == 26
-#define   _IQatan2(A,B)  _IQ26atan2(A,B)
-#endif
-#if GLOBAL_Q == 25
-#define   _IQatan2(A,B)  _IQ25atan2(A,B)
-#endif
-#if GLOBAL_Q == 24
-#define   _IQatan2(A,B)  _IQ24atan2(A,B)
-#endif
-#if GLOBAL_Q == 23
-#define   _IQatan2(A,B)  _IQ23atan2(A,B)
-#endif
-#if GLOBAL_Q == 22
-#define   _IQatan2(A,B)  _IQ22atan2(A,B)
-#endif
-#if GLOBAL_Q == 21
-#define   _IQatan2(A,B)  _IQ21atan2(A,B)
-#endif
-#if GLOBAL_Q == 20
-#define   _IQatan2(A,B)  _IQ20atan2(A,B)
-#endif
-#if GLOBAL_Q == 19
-#define   _IQatan2(A,B)  _IQ19atan2(A,B)
-#endif
-#if GLOBAL_Q == 18
-#define   _IQatan2(A,B)  _IQ18atan2(A,B)
-#endif
-#if GLOBAL_Q == 17
-#define   _IQatan2(A,B)  _IQ17atan2(A,B)
-#endif
-#if GLOBAL_Q == 16
-#define   _IQatan2(A,B)  _IQ16atan2(A,B)
-#endif
-#if GLOBAL_Q == 15
-#define   _IQatan2(A,B)  _IQ15atan2(A,B)
-#endif
-#if GLOBAL_Q == 14
-#define   _IQatan2(A,B)  _IQ14atan2(A,B)
-#endif
-#if GLOBAL_Q == 13
-#define   _IQatan2(A,B)  _IQ13atan2(A,B)
-#endif
-#if GLOBAL_Q == 12
-#define   _IQatan2(A,B)  _IQ12atan2(A,B)
-#endif
-#if GLOBAL_Q == 11
-#define   _IQatan2(A,B)  _IQ11atan2(A,B)
-#endif
-#if GLOBAL_Q == 10
-#define   _IQatan2(A,B)  _IQ10atan2(A,B)
-#endif
-#if GLOBAL_Q == 9
-#define   _IQatan2(A,B)  _IQ9atan2(A,B)
-#endif
-#if GLOBAL_Q == 8
-#define   _IQatan2(A,B)  _IQ8atan2(A,B)
-#endif
-#if GLOBAL_Q == 7
-#define   _IQatan2(A,B)  _IQ7atan2(A,B)
-#endif
-#if GLOBAL_Q == 6
-#define   _IQatan2(A,B)  _IQ6atan2(A,B)
-#endif
-#if GLOBAL_Q == 5
-#define   _IQatan2(A,B)  _IQ5atan2(A,B)
-#endif
-#if GLOBAL_Q == 4
-#define   _IQatan2(A,B)  _IQ4atan2(A,B)
-#endif
-#if GLOBAL_Q == 3
-#define   _IQatan2(A,B)  _IQ3atan2(A,B)
-#endif
-#if GLOBAL_Q == 2
-#define   _IQatan2(A,B)  _IQ2atan2(A,B)
-#endif
-#if GLOBAL_Q == 1
-#define   _IQatan2(A,B)  _IQ1atan2(A,B)
-#endif
-//---------------------------------------------------------------------------
-extern    long _IQ30atan2PU(long A, long B);
-extern    long _IQ29atan2PU(long A, long B);
-extern    long _IQ28atan2PU(long A, long B);
-extern    long _IQ27atan2PU(long A, long B);
-extern    long _IQ26atan2PU(long A, long B);
-extern    long _IQ25atan2PU(long A, long B);
-extern    long _IQ24atan2PU(long A, long B);
-extern    long _IQ23atan2PU(long A, long B);
-extern    long _IQ22atan2PU(long A, long B);
-extern    long _IQ21atan2PU(long A, long B);
-extern    long _IQ20atan2PU(long A, long B);
-extern    long _IQ19atan2PU(long A, long B);
-extern    long _IQ18atan2PU(long A, long B);
-extern    long _IQ17atan2PU(long A, long B);
-extern    long _IQ16atan2PU(long A, long B);
-extern    long _IQ15atan2PU(long A, long B);
-extern    long _IQ14atan2PU(long A, long B);
-extern    long _IQ13atan2PU(long A, long B);
-extern    long _IQ12atan2PU(long A, long B);
-extern    long _IQ11atan2PU(long A, long B);
-extern    long _IQ10atan2PU(long A, long B);
-extern    long _IQ9atan2PU(long A, long B);
-extern    long _IQ8atan2PU(long A, long B);
-extern    long _IQ7atan2PU(long A, long B);
-extern    long _IQ6atan2PU(long A, long B);
-extern    long _IQ5atan2PU(long A, long B);
-extern    long _IQ4atan2PU(long A, long B);
-extern    long _IQ3atan2PU(long A, long B);
-extern    long _IQ2atan2PU(long A, long B);
-extern    long _IQ1atan2PU(long A, long B);
-
-#if GLOBAL_Q == 30
-#define   _IQatan2PU(A,B)  _IQ30atan2PU(A,B)
-#endif
-#if GLOBAL_Q == 29
-#define   _IQatan2PU(A,B)  _IQ29atan2PU(A,B)
-#endif
-#if GLOBAL_Q == 28
-#define   _IQatan2PU(A,B)  _IQ28atan2PU(A,B)
-#endif
-#if GLOBAL_Q == 27
-#define   _IQatan2PU(A,B)  _IQ27atan2PU(A,B)
-#endif
-#if GLOBAL_Q == 26
-#define   _IQatan2PU(A,B)  _IQ26atan2PU(A,B)
-#endif
-#if GLOBAL_Q == 25
-#define   _IQatan2PU(A,B)  _IQ25atan2PU(A,B)
-#endif
-#if GLOBAL_Q == 24
-#define   _IQatan2PU(A,B)  _IQ24atan2PU(A,B)
-#endif
-#if GLOBAL_Q == 23
-#define   _IQatan2PU(A,B)  _IQ23atan2PU(A,B)
-#endif
-#if GLOBAL_Q == 22
-#define   _IQatan2PU(A,B)  _IQ22atan2PU(A,B)
-#endif
-#if GLOBAL_Q == 21
-#define   _IQatan2PU(A,B)  _IQ21atan2PU(A,B)
-#endif
-#if GLOBAL_Q == 20
-#define   _IQatan2PU(A,B)  _IQ20atan2PU(A,B)
-#endif
-#if GLOBAL_Q == 19
-#define   _IQatan2PU(A,B)  _IQ19atan2PU(A,B)
-#endif
-#if GLOBAL_Q == 18
-#define   _IQatan2PU(A,B)  _IQ18atan2PU(A,B)
-#endif
-#if GLOBAL_Q == 17
-#define   _IQatan2PU(A,B)  _IQ17atan2PU(A,B)
-#endif
-#if GLOBAL_Q == 16
-#define   _IQatan2PU(A,B)  _IQ16atan2PU(A,B)
-#endif
-#if GLOBAL_Q == 15
-#define   _IQatan2PU(A,B)  _IQ15atan2PU(A,B)
-#endif
-#if GLOBAL_Q == 14
-#define   _IQatan2PU(A,B)  _IQ14atan2PU(A,B)
-#endif
-#if GLOBAL_Q == 13
-#define   _IQatan2PU(A,B)  _IQ13atan2PU(A,B)
-#endif
-#if GLOBAL_Q == 12
-#define   _IQatan2PU(A,B)  _IQ12atan2PU(A,B)
-#endif
-#if GLOBAL_Q == 11
-#define   _IQatan2PU(A,B)  _IQ11atan2PU(A,B)
-#endif
-#if GLOBAL_Q == 10
-#define   _IQatan2PU(A,B)  _IQ10atan2PU(A,B)
-#endif
-#if GLOBAL_Q == 9
-#define   _IQatan2PU(A,B)  _IQ9atan2PU(A,B)
-#endif
-#if GLOBAL_Q == 8
-#define   _IQatan2PU(A,B)  _IQ8atan2PU(A,B)
-#endif
-#if GLOBAL_Q == 7
-#define   _IQatan2PU(A,B)  _IQ7atan2PU(A,B)
-#endif
-#if GLOBAL_Q == 6
-#define   _IQatan2PU(A,B)  _IQ6atan2PU(A,B)
-#endif
-#if GLOBAL_Q == 5
-#define   _IQatan2PU(A,B)  _IQ5atan2PU(A,B)
-#endif
-#if GLOBAL_Q == 4
-#define   _IQatan2PU(A,B)  _IQ4atan2PU(A,B)
-#endif
-#if GLOBAL_Q == 3
-#define   _IQatan2PU(A,B)  _IQ3atan2PU(A,B)
-#endif
-#if GLOBAL_Q == 2
-#define   _IQatan2PU(A,B)  _IQ2atan2PU(A,B)
-#endif
-#if GLOBAL_Q == 1
-#define   _IQatan2PU(A,B)  _IQ1atan2PU(A,B)
-#endif
-//---------------------------------------------------------------------------
-#define   _IQ30atan(A)  _IQ30atan2(A,_IQ30(1.0))
-#define   _IQ29atan(A)  _IQ29atan2(A,_IQ29(1.0))
-#define   _IQ28atan(A)  _IQ28atan2(A,_IQ28(1.0))
-#define   _IQ27atan(A)  _IQ27atan2(A,_IQ27(1.0))
-#define   _IQ26atan(A)  _IQ26atan2(A,_IQ26(1.0))
-#define   _IQ25atan(A)  _IQ25atan2(A,_IQ25(1.0))
-#define   _IQ24atan(A)  _IQ24atan2(A,_IQ24(1.0))
-#define   _IQ23atan(A)  _IQ23atan2(A,_IQ23(1.0))
-#define   _IQ22atan(A)  _IQ22atan2(A,_IQ22(1.0))
-#define   _IQ21atan(A)  _IQ21atan2(A,_IQ21(1.0))
-#define   _IQ20atan(A)  _IQ20atan2(A,_IQ20(1.0))
-#define   _IQ19atan(A)  _IQ19atan2(A,_IQ19(1.0))
-#define   _IQ18atan(A)  _IQ18atan2(A,_IQ18(1.0))
-#define   _IQ17atan(A)  _IQ17atan2(A,_IQ17(1.0))
-#define   _IQ16atan(A)  _IQ16atan2(A,_IQ16(1.0))
-#define   _IQ15atan(A)  _IQ15atan2(A,_IQ15(1.0))
-#define   _IQ14atan(A)  _IQ14atan2(A,_IQ14(1.0))
-#define   _IQ13atan(A)  _IQ13atan2(A,_IQ13(1.0))
-#define   _IQ12atan(A)  _IQ12atan2(A,_IQ12(1.0))
-#define   _IQ11atan(A)  _IQ11atan2(A,_IQ11(1.0))
-#define   _IQ10atan(A)  _IQ10atan2(A,_IQ10(1.0))
-#define   _IQ9atan(A)   _IQ9atan2(A,_IQ9(1.0))
-#define   _IQ8atan(A)   _IQ8atan2(A,_IQ8(1.0))
-#define   _IQ7atan(A)   _IQ7atan2(A,_IQ7(1.0))
-#define   _IQ6atan(A)   _IQ6atan2(A,_IQ6(1.0))
-#define   _IQ5atan(A)   _IQ5atan2(A,_IQ5(1.0))
-#define   _IQ4atan(A)   _IQ4atan2(A,_IQ4(1.0))
-#define   _IQ3atan(A)   _IQ3atan2(A,_IQ3(1.0))
-#define   _IQ2atan(A)   _IQ2atan2(A,_IQ2(1.0))
-#define   _IQ1atan(A)   _IQ1atan2(A,_IQ1(1.0))
-#if GLOBAL_Q == 30
-#define   _IQatan(A)  _IQ30atan2(A,_IQ(1.0))
-#endif
-#if GLOBAL_Q == 29
-#define   _IQatan(A)  _IQ29atan2(A,_IQ(1.0))
-#endif
-#if GLOBAL_Q == 28
-#define   _IQatan(A)  _IQ28atan2(A,_IQ(1.0))
-#endif
-#if GLOBAL_Q == 27
-#define   _IQatan(A)  _IQ27atan2(A,_IQ(1.0))
-#endif
-#if GLOBAL_Q == 26
-#define   _IQatan(A)  _IQ26atan2(A,_IQ(1.0))
-#endif
-#if GLOBAL_Q == 25
-#define   _IQatan(A)  _IQ25atan2(A,_IQ(1.0))
-#endif
-#if GLOBAL_Q == 24
-#define   _IQatan(A)  _IQ24atan2(A,_IQ(1.0))
-#endif
-#if GLOBAL_Q == 23
-#define   _IQatan(A)  _IQ23atan2(A,_IQ(1.0))
-#endif
-#if GLOBAL_Q == 22
-#define   _IQatan(A)  _IQ22atan2(A,_IQ(1.0))
-#endif
-#if GLOBAL_Q == 21
-#define   _IQatan(A)  _IQ21atan2(A,_IQ(1.0))
-#endif
-#if GLOBAL_Q == 20
-#define   _IQatan(A)  _IQ20atan2(A,_IQ(1.0))
-#endif
-#if GLOBAL_Q == 19
-#define   _IQatan(A)  _IQ19atan2(A,_IQ(1.0))
-#endif
-#if GLOBAL_Q == 18
-#define   _IQatan(A)  _IQ18atan2(A,_IQ(1.0))
-#endif
-#if GLOBAL_Q == 17
-#define   _IQatan(A)  _IQ17atan2(A,_IQ(1.0))
-#endif
-#if GLOBAL_Q == 16
-#define   _IQatan(A)  _IQ16atan2(A,_IQ(1.0))
-#endif
-#if GLOBAL_Q == 15
-#define   _IQatan(A)  _IQ15atan2(A,_IQ(1.0))
-#endif
-#if GLOBAL_Q == 14
-#define   _IQatan(A)  _IQ14atan2(A,_IQ(1.0))
-#endif
-#if GLOBAL_Q == 13
-#define   _IQatan(A)  _IQ13atan2(A,_IQ(1.0))
-#endif
-#if GLOBAL_Q == 12
-#define   _IQatan(A)  _IQ12atan2(A,_IQ(1.0))
-#endif
-#if GLOBAL_Q == 11
-#define   _IQatan(A)  _IQ11atan2(A,_IQ(1.0))
-#endif
-#if GLOBAL_Q == 10
-#define   _IQatan(A)  _IQ10atan2(A,_IQ(1.0))
-#endif
-#if GLOBAL_Q == 9
-#define   _IQatan(A)  _IQ9atan2(A,_IQ(1.0))
-#endif
-#if GLOBAL_Q == 8
-#define   _IQatan(A)  _IQ8atan2(A,_IQ(1.0))
-#endif
-#if GLOBAL_Q == 7
-#define   _IQatan(A)  _IQ7atan2(A,_IQ(1.0))
-#endif
-#if GLOBAL_Q == 6
-#define   _IQatan(A)  _IQ6atan2(A,_IQ(1.0))
-#endif
-#if GLOBAL_Q == 5
-#define   _IQatan(A)  _IQ5atan2(A,_IQ(1.0))
-#endif
-#if GLOBAL_Q == 4
-#define   _IQatan(A)  _IQ4atan2(A,_IQ(1.0))
-#endif
-#if GLOBAL_Q == 3
-#define   _IQatan(A)  _IQ3atan2(A,_IQ(1.0))
-#endif
-#if GLOBAL_Q == 2
-#define   _IQatan(A)  _IQ2atan2(A,_IQ(1.0))
-#endif
-#if GLOBAL_Q == 1
-#define   _IQatan(A)  _IQ1atan2(A,_IQ(1.0))
-#endif
-//---------------------------------------------------------------------------
-extern    long _IQ30sqrt(long A);
-extern    long _IQ29sqrt(long A);
-extern    long _IQ28sqrt(long A);
-extern    long _IQ27sqrt(long A);
-extern    long _IQ26sqrt(long A);
-extern    long _IQ25sqrt(long A);
-extern    long _IQ24sqrt(long A);
-extern    long _IQ23sqrt(long A);
-extern    long _IQ22sqrt(long A);
-extern    long _IQ21sqrt(long A);
-extern    long _IQ20sqrt(long A);
-extern    long _IQ19sqrt(long A);
-extern    long _IQ18sqrt(long A);
-extern    long _IQ17sqrt(long A);
-extern    long _IQ16sqrt(long A);
-extern    long _IQ15sqrt(long A);
-extern    long _IQ14sqrt(long A);
-extern    long _IQ13sqrt(long A);
-extern    long _IQ12sqrt(long A);
-extern    long _IQ11sqrt(long A);
-extern    long _IQ10sqrt(long A);
-extern    long _IQ9sqrt(long A);
-extern    long _IQ8sqrt(long A);
-extern    long _IQ7sqrt(long A);
-extern    long _IQ6sqrt(long A);
-extern    long _IQ5sqrt(long A);
-extern    long _IQ4sqrt(long A);
-extern    long _IQ3sqrt(long A);
-extern    long _IQ2sqrt(long A);
-extern    long _IQ1sqrt(long A);
-
-#if GLOBAL_Q == 30
-#define   _IQsqrt(A)  _IQ30sqrt(A)
-#endif
-#if GLOBAL_Q == 29
-#define   _IQsqrt(A)  _IQ29sqrt(A)
-#endif
-#if GLOBAL_Q == 28
-#define   _IQsqrt(A)  _IQ28sqrt(A)
-#endif
-#if GLOBAL_Q == 27
-#define   _IQsqrt(A)  _IQ27sqrt(A)
-#endif
-#if GLOBAL_Q == 26
-#define   _IQsqrt(A)  _IQ26sqrt(A)
-#endif
-#if GLOBAL_Q == 25
-#define   _IQsqrt(A)  _IQ25sqrt(A)
-#endif
-#if GLOBAL_Q == 24
-#define   _IQsqrt(A)  _IQ24sqrt(A)
-#endif
-#if GLOBAL_Q == 23
-#define   _IQsqrt(A)  _IQ23sqrt(A)
-#endif
-#if GLOBAL_Q == 22
-#define   _IQsqrt(A)  _IQ22sqrt(A)
-#endif
-#if GLOBAL_Q == 21
-#define   _IQsqrt(A)  _IQ21sqrt(A)
-#endif
-#if GLOBAL_Q == 20
-#define   _IQsqrt(A)  _IQ20sqrt(A)
-#endif
-#if GLOBAL_Q == 19
-#define   _IQsqrt(A)  _IQ19sqrt(A)
-#endif
-#if GLOBAL_Q == 18
-#define   _IQsqrt(A)  _IQ18sqrt(A)
-#endif
-#if GLOBAL_Q == 17
-#define   _IQsqrt(A)  _IQ17sqrt(A)
-#endif
-#if GLOBAL_Q == 16
-#define   _IQsqrt(A)  _IQ16sqrt(A)
-#endif
-#if GLOBAL_Q == 15
-#define   _IQsqrt(A)  _IQ15sqrt(A)
-#endif
-#if GLOBAL_Q == 14
-#define   _IQsqrt(A)  _IQ14sqrt(A)
-#endif
-#if GLOBAL_Q == 13
-#define   _IQsqrt(A)  _IQ13sqrt(A)
-#endif
-#if GLOBAL_Q == 12
-#define   _IQsqrt(A)  _IQ12sqrt(A)
-#endif
-#if GLOBAL_Q == 11
-#define   _IQsqrt(A)  _IQ11sqrt(A)
-#endif
-#if GLOBAL_Q == 10
-#define   _IQsqrt(A)  _IQ10sqrt(A)
-#endif
-#if GLOBAL_Q == 9
-#define   _IQsqrt(A)  _IQ9sqrt(A)
-#endif
-#if GLOBAL_Q == 8
-#define   _IQsqrt(A)  _IQ8sqrt(A)
-#endif
-#if GLOBAL_Q == 7
-#define   _IQsqrt(A)  _IQ7sqrt(A)
-#endif
-#if GLOBAL_Q == 6
-#define   _IQsqrt(A)  _IQ6sqrt(A)
-#endif
-#if GLOBAL_Q == 5
-#define   _IQsqrt(A)  _IQ5sqrt(A)
-#endif
-#if GLOBAL_Q == 4
-#define   _IQsqrt(A)  _IQ4sqrt(A)
-#endif
-#if GLOBAL_Q == 3
-#define   _IQsqrt(A)  _IQ3sqrt(A)
-#endif
-#if GLOBAL_Q == 2
-#define   _IQsqrt(A)  _IQ2sqrt(A)
-#endif
-#if GLOBAL_Q == 1
-#define   _IQsqrt(A)  _IQ1sqrt(A)
-#endif
-//---------------------------------------------------------------------------
-extern    long _IQ30isqrt(long A);
-extern    long _IQ29isqrt(long A);
-extern    long _IQ28isqrt(long A);
-extern    long _IQ27isqrt(long A);
-extern    long _IQ26isqrt(long A);
-extern    long _IQ25isqrt(long A);
-extern    long _IQ24isqrt(long A);
-extern    long _IQ23isqrt(long A);
-extern    long _IQ22isqrt(long A);
-extern    long _IQ21isqrt(long A);
-extern    long _IQ20isqrt(long A);
-extern    long _IQ19isqrt(long A);
-extern    long _IQ18isqrt(long A);
-extern    long _IQ17isqrt(long A);
-extern    long _IQ16isqrt(long A);
-extern    long _IQ15isqrt(long A);
-extern    long _IQ14isqrt(long A);
-extern    long _IQ13isqrt(long A);
-extern    long _IQ12isqrt(long A);
-extern    long _IQ11isqrt(long A);
-extern    long _IQ10isqrt(long A);
-extern    long _IQ9isqrt(long A);
-extern    long _IQ8isqrt(long A);
-extern    long _IQ7isqrt(long A);
-extern    long _IQ6isqrt(long A);
-extern    long _IQ5isqrt(long A);
-extern    long _IQ4isqrt(long A);
-extern    long _IQ3isqrt(long A);
-extern    long _IQ2isqrt(long A);
-extern    long _IQ1isqrt(long A);
-
-#if GLOBAL_Q == 30
-#define   _IQisqrt(A)  _IQ30isqrt(A)
-#endif
-#if GLOBAL_Q == 29
-#define   _IQisqrt(A)  _IQ29isqrt(A)
-#endif
-#if GLOBAL_Q == 28
-#define   _IQisqrt(A)  _IQ28isqrt(A)
-#endif
-#if GLOBAL_Q == 27
-#define   _IQisqrt(A)  _IQ27isqrt(A)
-#endif
-#if GLOBAL_Q == 26
-#define   _IQisqrt(A)  _IQ26isqrt(A)
-#endif
-#if GLOBAL_Q == 25
-#define   _IQisqrt(A)  _IQ25isqrt(A)
-#endif
-#if GLOBAL_Q == 24
-#define   _IQisqrt(A)  _IQ24isqrt(A)
-#endif
-#if GLOBAL_Q == 23
-#define   _IQisqrt(A)  _IQ23isqrt(A)
-#endif
-#if GLOBAL_Q == 22
-#define   _IQisqrt(A)  _IQ22isqrt(A)
-#endif
-#if GLOBAL_Q == 21
-#define   _IQisqrt(A)  _IQ21isqrt(A)
-#endif
-#if GLOBAL_Q == 20
-#define   _IQisqrt(A)  _IQ20isqrt(A)
-#endif
-#if GLOBAL_Q == 19
-#define   _IQisqrt(A)  _IQ19isqrt(A)
-#endif
-#if GLOBAL_Q == 18
-#define   _IQisqrt(A)  _IQ18isqrt(A)
-#endif
-#if GLOBAL_Q == 17
-#define   _IQisqrt(A)  _IQ17isqrt(A)
-#endif
-#if GLOBAL_Q == 16
-#define   _IQisqrt(A)  _IQ16isqrt(A)
-#endif
-#if GLOBAL_Q == 15
-#define   _IQisqrt(A)  _IQ15isqrt(A)
-#endif
-#if GLOBAL_Q == 14
-#define   _IQisqrt(A)  _IQ14isqrt(A)
-#endif
-#if GLOBAL_Q == 13
-#define   _IQisqrt(A)  _IQ13isqrt(A)
-#endif
-#if GLOBAL_Q == 12
-#define   _IQisqrt(A)  _IQ12isqrt(A)
-#endif
-#if GLOBAL_Q == 11
-#define   _IQisqrt(A)  _IQ11isqrt(A)
-#endif
-#if GLOBAL_Q == 10
-#define   _IQisqrt(A)  _IQ10isqrt(A)
-#endif
-#if GLOBAL_Q == 9
-#define   _IQisqrt(A)  _IQ9isqrt(A)
-#endif
-#if GLOBAL_Q == 8
-#define   _IQisqrt(A)  _IQ8isqrt(A)
-#endif
-#if GLOBAL_Q == 7
-#define   _IQisqrt(A)  _IQ7isqrt(A)
-#endif
-#if GLOBAL_Q == 6
-#define   _IQisqrt(A)  _IQ6isqrt(A)
-#endif
-#if GLOBAL_Q == 5
-#define   _IQisqrt(A)  _IQ5isqrt(A)
-#endif
-#if GLOBAL_Q == 4
-#define   _IQisqrt(A)  _IQ4isqrt(A)
-#endif
-#if GLOBAL_Q == 3
-#define   _IQisqrt(A)  _IQ3isqrt(A)
-#endif
-#if GLOBAL_Q == 2
-#define   _IQisqrt(A)  _IQ2isqrt(A)
-#endif
-#if GLOBAL_Q == 1
-#define   _IQisqrt(A)  _IQ1isqrt(A)
-#endif
-//---------------------------------------------------------------------------
-extern    long _IQ30exp(long A);
-extern    long _IQ29exp(long A);
-extern    long _IQ28exp(long A);
-extern    long _IQ27exp(long A);
-extern    long _IQ26exp(long A);
-extern    long _IQ25exp(long A);
-extern    long _IQ24exp(long A);
-extern    long _IQ23exp(long A);
-extern    long _IQ22exp(long A);
-extern    long _IQ21exp(long A);
-extern    long _IQ20exp(long A);
-extern    long _IQ19exp(long A);
-extern    long _IQ18exp(long A);
-extern    long _IQ17exp(long A);
-extern    long _IQ16exp(long A);
-extern    long _IQ15exp(long A);
-extern    long _IQ14exp(long A);
-extern    long _IQ13exp(long A);
-extern    long _IQ12exp(long A);
-extern    long _IQ11exp(long A);
-extern    long _IQ10exp(long A);
-extern    long _IQ9exp(long A);
-extern    long _IQ8exp(long A);
-extern    long _IQ7exp(long A);
-extern    long _IQ6exp(long A);
-extern    long _IQ5exp(long A);
-extern    long _IQ4exp(long A);
-extern    long _IQ3exp(long A);
-extern    long _IQ2exp(long A);
-extern    long _IQ1exp(long A);
-
-#if GLOBAL_Q == 30
-#define   _IQexp(A)  _IQ30exp(A)
-#endif
-#if GLOBAL_Q == 29
-#define   _IQexp(A)  _IQ29exp(A)
-#endif
-#if GLOBAL_Q == 28
-#define   _IQexp(A)  _IQ28exp(A)
-#endif
-#if GLOBAL_Q == 27
-#define   _IQexp(A)  _IQ27exp(A)
-#endif
-#if GLOBAL_Q == 26
-#define   _IQexp(A)  _IQ26exp(A)
-#endif
-#if GLOBAL_Q == 25
-#define   _IQexp(A)  _IQ25exp(A)
-#endif
-#if GLOBAL_Q == 24
-#define   _IQexp(A)  _IQ24exp(A)
-#endif
-#if GLOBAL_Q == 23
-#define   _IQexp(A)  _IQ23exp(A)
-#endif
-#if GLOBAL_Q == 22
-#define   _IQexp(A)  _IQ22exp(A)
-#endif
-#if GLOBAL_Q == 21
-#define   _IQexp(A)  _IQ21exp(A)
-#endif
-#if GLOBAL_Q == 20
-#define   _IQexp(A)  _IQ20exp(A)
-#endif
-#if GLOBAL_Q == 19
-#define   _IQexp(A)  _IQ19exp(A)
-#endif
-#if GLOBAL_Q == 18
-#define   _IQexp(A)  _IQ18exp(A)
-#endif
-#if GLOBAL_Q == 17
-#define   _IQexp(A)  _IQ17exp(A)
-#endif
-#if GLOBAL_Q == 16
-#define   _IQexp(A)  _IQ16exp(A)
-#endif
-#if GLOBAL_Q == 15
-#define   _IQexp(A)  _IQ15exp(A)
-#endif
-#if GLOBAL_Q == 14
-#define   _IQexp(A)  _IQ14exp(A)
-#endif
-#if GLOBAL_Q == 13
-#define   _IQexp(A)  _IQ13exp(A)
-#endif
-#if GLOBAL_Q == 12
-#define   _IQexp(A)  _IQ12exp(A)
-#endif
-#if GLOBAL_Q == 11
-#define   _IQexp(A)  _IQ11exp(A)
-#endif
-#if GLOBAL_Q == 10
-#define   _IQexp(A)  _IQ10exp(A)
-#endif
-#if GLOBAL_Q == 9
-#define   _IQexp(A)  _IQ9exp(A)
-#endif
-#if GLOBAL_Q == 8
-#define   _IQexp(A)  _IQ8exp(A)
-#endif
-#if GLOBAL_Q == 7
-#define   _IQexp(A)  _IQ7exp(A)
-#endif
-#if GLOBAL_Q == 6
-#define   _IQexp(A)  _IQ6exp(A)
-#endif
-#if GLOBAL_Q == 5
-#define   _IQexp(A)  _IQ5exp(A)
-#endif
-#if GLOBAL_Q == 4
-#define   _IQexp(A)  _IQ4exp(A)
-#endif
-#if GLOBAL_Q == 3
-#define   _IQexp(A)  _IQ3exp(A)
-#endif
-#if GLOBAL_Q == 2
-#define   _IQexp(A)  _IQ2exp(A)
-#endif
-#if GLOBAL_Q == 1
-#define   _IQexp(A)  _IQ1exp(A)
-#endif
-//---------------------------------------------------------------------------
-extern    long _IQ30int(long A);
-extern    long _IQ29int(long A);
-extern    long _IQ28int(long A);
-extern    long _IQ27int(long A);
-extern    long _IQ26int(long A);
-extern    long _IQ25int(long A);
-extern    long _IQ24int(long A);
-extern    long _IQ23int(long A);
-extern    long _IQ22int(long A);
-extern    long _IQ21int(long A);
-extern    long _IQ20int(long A);
-extern    long _IQ19int(long A);
-extern    long _IQ18int(long A);
-extern    long _IQ17int(long A);
-extern    long _IQ16int(long A);
-extern    long _IQ15int(long A);
-extern    long _IQ14int(long A);
-extern    long _IQ13int(long A);
-extern    long _IQ12int(long A);
-extern    long _IQ11int(long A);
-extern    long _IQ10int(long A);
-extern    long _IQ9int(long A);
-extern    long _IQ8int(long A);
-extern    long _IQ7int(long A);
-extern    long _IQ6int(long A);
-extern    long _IQ5int(long A);
-extern    long _IQ4int(long A);
-extern    long _IQ3int(long A);
-extern    long _IQ2int(long A);
-extern    long _IQ1int(long A);
-
-#if GLOBAL_Q == 30
-#define   _IQint(A)  _IQ30int(A)
-#endif
-#if GLOBAL_Q == 29
-#define   _IQint(A)  _IQ29int(A)
-#endif
-#if GLOBAL_Q == 28
-#define   _IQint(A)  _IQ28int(A)
-#endif
-#if GLOBAL_Q == 27
-#define   _IQint(A)  _IQ27int(A)
-#endif
-#if GLOBAL_Q == 26
-#define   _IQint(A)  _IQ26int(A)
-#endif
-#if GLOBAL_Q == 25
-#define   _IQint(A)  _IQ25int(A)
-#endif
-#if GLOBAL_Q == 24
-#define   _IQint(A)  _IQ24int(A)
-#endif
-#if GLOBAL_Q == 23
-#define   _IQint(A)  _IQ23int(A)
-#endif
-#if GLOBAL_Q == 22
-#define   _IQint(A)  _IQ22int(A)
-#endif
-#if GLOBAL_Q == 21
-#define   _IQint(A)  _IQ21int(A)
-#endif
-#if GLOBAL_Q == 20
-#define   _IQint(A)  _IQ20int(A)
-#endif
-#if GLOBAL_Q == 19
-#define   _IQint(A)  _IQ19int(A)
-#endif
-#if GLOBAL_Q == 18
-#define   _IQint(A)  _IQ18int(A)
-#endif
-#if GLOBAL_Q == 17
-#define   _IQint(A)  _IQ17int(A)
-#endif
-#if GLOBAL_Q == 16
-#define   _IQint(A)  _IQ16int(A)
-#endif
-#if GLOBAL_Q == 15
-#define   _IQint(A)  _IQ15int(A)
-#endif
-#if GLOBAL_Q == 14
-#define   _IQint(A)  _IQ14int(A)
-#endif
-#if GLOBAL_Q == 13
-#define   _IQint(A)  _IQ13int(A)
-#endif
-#if GLOBAL_Q == 12
-#define   _IQint(A)  _IQ12int(A)
-#endif
-#if GLOBAL_Q == 11
-#define   _IQint(A)  _IQ11int(A)
-#endif
-#if GLOBAL_Q == 10
-#define   _IQint(A)  _IQ10int(A)
-#endif
-#if GLOBAL_Q == 9
-#define   _IQint(A)  _IQ9int(A)
-#endif
-#if GLOBAL_Q == 8
-#define   _IQint(A)  _IQ8int(A)
-#endif
-#if GLOBAL_Q == 7
-#define   _IQint(A)  _IQ7int(A)
-#endif
-#if GLOBAL_Q == 6
-#define   _IQint(A)  _IQ6int(A)
-#endif
-#if GLOBAL_Q == 5
-#define   _IQint(A)  _IQ5int(A)
-#endif
-#if GLOBAL_Q == 4
-#define   _IQint(A)  _IQ4int(A)
-#endif
-#if GLOBAL_Q == 3
-#define   _IQint(A)  _IQ3int(A)
-#endif
-#if GLOBAL_Q == 2
-#define   _IQint(A)  _IQ2int(A)
-#endif
-#if GLOBAL_Q == 1
-#define   _IQint(A)  _IQ1int(A)
-#endif
-//---------------------------------------------------------------------------
-extern    long _IQ30frac(long A);
-extern    long _IQ29frac(long A);
-extern    long _IQ28frac(long A);
-extern    long _IQ27frac(long A);
-extern    long _IQ26frac(long A);
-extern    long _IQ25frac(long A);
-extern    long _IQ24frac(long A);
-extern    long _IQ23frac(long A);
-extern    long _IQ22frac(long A);
-extern    long _IQ21frac(long A);
-extern    long _IQ20frac(long A);
-extern    long _IQ19frac(long A);
-extern    long _IQ18frac(long A);
-extern    long _IQ17frac(long A);
-extern    long _IQ16frac(long A);
-extern    long _IQ15frac(long A);
-extern    long _IQ14frac(long A);
-extern    long _IQ13frac(long A);
-extern    long _IQ12frac(long A);
-extern    long _IQ11frac(long A);
-extern    long _IQ10frac(long A);
-extern    long _IQ9frac(long A);
-extern    long _IQ8frac(long A);
-extern    long _IQ7frac(long A);
-extern    long _IQ6frac(long A);
-extern    long _IQ5frac(long A);
-extern    long _IQ4frac(long A);
-extern    long _IQ3frac(long A);
-extern    long _IQ2frac(long A);
-extern    long _IQ1frac(long A);
-
-#if GLOBAL_Q == 30
-#define   _IQfrac(A)  _IQ30frac(A)
-#endif
-#if GLOBAL_Q == 29
-#define   _IQfrac(A)  _IQ29frac(A)
-#endif
-#if GLOBAL_Q == 28
-#define   _IQfrac(A)  _IQ28frac(A)
-#endif
-#if GLOBAL_Q == 27
-#define   _IQfrac(A)  _IQ27frac(A)
-#endif
-#if GLOBAL_Q == 26
-#define   _IQfrac(A)  _IQ26frac(A)
-#endif
-#if GLOBAL_Q == 25
-#define   _IQfrac(A)  _IQ25frac(A)
-#endif
-#if GLOBAL_Q == 24
-#define   _IQfrac(A)  _IQ24frac(A)
-#endif
-#if GLOBAL_Q == 23
-#define   _IQfrac(A)  _IQ23frac(A)
-#endif
-#if GLOBAL_Q == 22
-#define   _IQfrac(A)  _IQ22frac(A)
-#endif
-#if GLOBAL_Q == 21
-#define   _IQfrac(A)  _IQ21frac(A)
-#endif
-#if GLOBAL_Q == 20
-#define   _IQfrac(A)  _IQ20frac(A)
-#endif
-#if GLOBAL_Q == 19
-#define   _IQfrac(A)  _IQ19frac(A)
-#endif
-#if GLOBAL_Q == 18
-#define   _IQfrac(A)  _IQ18frac(A)
-#endif
-#if GLOBAL_Q == 17
-#define   _IQfrac(A)  _IQ17frac(A)
-#endif
-#if GLOBAL_Q == 16
-#define   _IQfrac(A)  _IQ16frac(A)
-#endif
-#if GLOBAL_Q == 15
-#define   _IQfrac(A)  _IQ15frac(A)
-#endif
-#if GLOBAL_Q == 14
-#define   _IQfrac(A)  _IQ14frac(A)
-#endif
-#if GLOBAL_Q == 13
-#define   _IQfrac(A)  _IQ13frac(A)
-#endif
-#if GLOBAL_Q == 12
-#define   _IQfrac(A)  _IQ12frac(A)
-#endif
-#if GLOBAL_Q == 11
-#define   _IQfrac(A)  _IQ11frac(A)
-#endif
-#if GLOBAL_Q == 10
-#define   _IQfrac(A)  _IQ10frac(A)
-#endif
-#if GLOBAL_Q == 9
-#define   _IQfrac(A)  _IQ9frac(A)
-#endif
-#if GLOBAL_Q == 8
-#define   _IQfrac(A)  _IQ8frac(A)
-#endif
-#if GLOBAL_Q == 7
-#define   _IQfrac(A)  _IQ7frac(A)
-#endif
-#if GLOBAL_Q == 6
-#define   _IQfrac(A)  _IQ6frac(A)
-#endif
-#if GLOBAL_Q == 5
-#define   _IQfrac(A)  _IQ5frac(A)
-#endif
-#if GLOBAL_Q == 4
-#define   _IQfrac(A)  _IQ4frac(A)
-#endif
-#if GLOBAL_Q == 3
-#define   _IQfrac(A)  _IQ3frac(A)
-#endif
-#if GLOBAL_Q == 2
-#define   _IQfrac(A)  _IQ2frac(A)
-#endif
-#if GLOBAL_Q == 1
-#define   _IQfrac(A)  _IQ1frac(A)
-#endif
-//---------------------------------------------------------------------------
-#define   _IQmpyIQX(A, IQA, B, IQB)    __IQxmpy(A, B, (GLOBAL_Q + 32 - IQA - IQB))
-#define   _IQ30mpyIQX(A, IQA, B, IQB)  __IQxmpy(A, B, (30 + 32 - IQA - IQB))
-#define   _IQ29mpyIQX(A, IQA, B, IQB)  __IQxmpy(A, B, (29 + 32 - IQA - IQB))
-#define   _IQ28mpyIQX(A, IQA, B, IQB)  __IQxmpy(A, B, (28 + 32 - IQA - IQB))
-#define   _IQ27mpyIQX(A, IQA, B, IQB)  __IQxmpy(A, B, (27 + 32 - IQA - IQB))
-#define   _IQ26mpyIQX(A, IQA, B, IQB)  __IQxmpy(A, B, (26 + 32 - IQA - IQB))
-#define   _IQ25mpyIQX(A, IQA, B, IQB)  __IQxmpy(A, B, (25 + 32 - IQA - IQB))
-#define   _IQ24mpyIQX(A, IQA, B, IQB)  __IQxmpy(A, B, (24 + 32 - IQA - IQB))
-#define   _IQ23mpyIQX(A, IQA, B, IQB)  __IQxmpy(A, B, (23 + 32 - IQA - IQB))
-#define   _IQ22mpyIQX(A, IQA, B, IQB)  __IQxmpy(A, B, (22 + 32 - IQA - IQB))
-#define   _IQ21mpyIQX(A, IQA, B, IQB)  __IQxmpy(A, B, (21 + 32 - IQA - IQB))
-#define   _IQ20mpyIQX(A, IQA, B, IQB)  __IQxmpy(A, B, (20 + 32 - IQA - IQB))
-#define   _IQ19mpyIQX(A, IQA, B, IQB)  __IQxmpy(A, B, (19 + 32 - IQA - IQB))
-#define   _IQ18mpyIQX(A, IQA, B, IQB)  __IQxmpy(A, B, (18 + 32 - IQA - IQB))
-#define   _IQ17mpyIQX(A, IQA, B, IQB)  __IQxmpy(A, B, (17 + 32 - IQA - IQB))
-#define   _IQ16mpyIQX(A, IQA, B, IQB)  __IQxmpy(A, B, (16 + 32 - IQA - IQB))
-#define   _IQ15mpyIQX(A, IQA, B, IQB)  __IQxmpy(A, B, (15 + 32 - IQA - IQB))
-#define   _IQ14mpyIQX(A, IQA, B, IQB)  __IQxmpy(A, B, (14 + 32 - IQA - IQB))
-#define   _IQ13mpyIQX(A, IQA, B, IQB)  __IQxmpy(A, B, (13 + 32 - IQA - IQB))
-#define   _IQ12mpyIQX(A, IQA, B, IQB)  __IQxmpy(A, B, (12 + 32 - IQA - IQB))
-#define   _IQ11mpyIQX(A, IQA, B, IQB)  __IQxmpy(A, B, (11 + 32 - IQA - IQB))
-#define   _IQ10mpyIQX(A, IQA, B, IQB)  __IQxmpy(A, B, (10 + 32 - IQA - IQB))
-#define   _IQ9mpyIQX(A, IQA, B, IQB)   __IQxmpy(A, B, (9 + 32 - IQA - IQB))
-#define   _IQ8mpyIQX(A, IQA, B, IQB)   __IQxmpy(A, B, (8 + 32 - IQA - IQB))
-#define   _IQ7mpyIQX(A, IQA, B, IQB)   __IQxmpy(A, B, (7 + 32 - IQA - IQB))
-#define   _IQ6mpyIQX(A, IQA, B, IQB)   __IQxmpy(A, B, (6 + 32 - IQA - IQB))
-#define   _IQ5mpyIQX(A, IQA, B, IQB)   __IQxmpy(A, B, (5 + 32 - IQA - IQB))
-#define   _IQ4mpyIQX(A, IQA, B, IQB)   __IQxmpy(A, B, (4 + 32 - IQA - IQB))
-#define   _IQ3mpyIQX(A, IQA, B, IQB)   __IQxmpy(A, B, (3 + 32 - IQA - IQB))
-#define   _IQ2mpyIQX(A, IQA, B, IQB)   __IQxmpy(A, B, (2 + 32 - IQA - IQB))
-#define   _IQ1mpyIQX(A, IQA, B, IQB)   __IQxmpy(A, B, (1 + 32 - IQA - IQB))
-//---------------------------------------------------------------------------
-#define   _IQmpyI32(A,B)    ((A)*(B))
-#define   _IQ30mpyI32(A,B)  ((A)*(B))
-#define   _IQ29mpyI32(A,B)  ((A)*(B))
-#define   _IQ28mpyI32(A,B)  ((A)*(B))
-#define   _IQ27mpyI32(A,B)  ((A)*(B))
-#define   _IQ26mpyI32(A,B)  ((A)*(B))
-#define   _IQ25mpyI32(A,B)  ((A)*(B))
-#define   _IQ24mpyI32(A,B)  ((A)*(B))
-#define   _IQ23mpyI32(A,B)  ((A)*(B))
-#define   _IQ22mpyI32(A,B)  ((A)*(B))
-#define   _IQ21mpyI32(A,B)  ((A)*(B))
-#define   _IQ20mpyI32(A,B)  ((A)*(B))
-#define   _IQ19mpyI32(A,B)  ((A)*(B))
-#define   _IQ18mpyI32(A,B)  ((A)*(B))
-#define   _IQ17mpyI32(A,B)  ((A)*(B))
-#define   _IQ16mpyI32(A,B)  ((A)*(B))
-#define   _IQ15mpyI32(A,B)  ((A)*(B))
-#define   _IQ14mpyI32(A,B)  ((A)*(B))
-#define   _IQ13mpyI32(A,B)  ((A)*(B))
-#define   _IQ12mpyI32(A,B)  ((A)*(B))
-#define   _IQ11mpyI32(A,B)  ((A)*(B))
-#define   _IQ10mpyI32(A,B)  ((A)*(B))
-#define   _IQ9mpyI32(A,B)   ((A)*(B))
-#define   _IQ8mpyI32(A,B)   ((A)*(B))
-#define   _IQ7mpyI32(A,B)   ((A)*(B))
-#define   _IQ6mpyI32(A,B)   ((A)*(B))
-#define   _IQ5mpyI32(A,B)   ((A)*(B))
-#define   _IQ4mpyI32(A,B)   ((A)*(B))
-#define   _IQ3mpyI32(A,B)   ((A)*(B))
-#define   _IQ2mpyI32(A,B)   ((A)*(B))
-#define   _IQ1mpyI32(A,B)   ((A)*(B))
-//---------------------------------------------------------------------------
-extern    long _IQ30mpyI32int(long A, long B);
-extern    long _IQ29mpyI32int(long A, long B);
-extern    long _IQ28mpyI32int(long A, long B);
-extern    long _IQ27mpyI32int(long A, long B);
-extern    long _IQ26mpyI32int(long A, long B);
-extern    long _IQ25mpyI32int(long A, long B);
-extern    long _IQ24mpyI32int(long A, long B);
-extern    long _IQ23mpyI32int(long A, long B);
-extern    long _IQ22mpyI32int(long A, long B);
-extern    long _IQ21mpyI32int(long A, long B);
-extern    long _IQ20mpyI32int(long A, long B);
-extern    long _IQ19mpyI32int(long A, long B);
-extern    long _IQ18mpyI32int(long A, long B);
-extern    long _IQ17mpyI32int(long A, long B);
-extern    long _IQ16mpyI32int(long A, long B);
-extern    long _IQ15mpyI32int(long A, long B);
-extern    long _IQ14mpyI32int(long A, long B);
-extern    long _IQ13mpyI32int(long A, long B);
-extern    long _IQ12mpyI32int(long A, long B);
-extern    long _IQ11mpyI32int(long A, long B);
-extern    long _IQ10mpyI32int(long A, long B);
-extern    long _IQ9mpyI32int(long A, long B);
-extern    long _IQ8mpyI32int(long A, long B);
-extern    long _IQ7mpyI32int(long A, long B);
-extern    long _IQ6mpyI32int(long A, long B);
-extern    long _IQ5mpyI32int(long A, long B);
-extern    long _IQ4mpyI32int(long A, long B);
-extern    long _IQ3mpyI32int(long A, long B);
-extern    long _IQ2mpyI32int(long A, long B);
-extern    long _IQ1mpyI32int(long A, long B);
-
-#if GLOBAL_Q == 30
-#define   _IQmpyI32int(A, B)  _IQ30mpyI32int(A, B)
-#endif
-#if GLOBAL_Q == 29
-#define   _IQmpyI32int(A, B)  _IQ29mpyI32int(A, B)
-#endif
-#if GLOBAL_Q == 28
-#define   _IQmpyI32int(A, B)  _IQ28mpyI32int(A, B)
-#endif
-#if GLOBAL_Q == 27
-#define   _IQmpyI32int(A, B)  _IQ27mpyI32int(A, B)
-#endif
-#if GLOBAL_Q == 26
-#define   _IQmpyI32int(A, B)  _IQ26mpyI32int(A, B)
-#endif
-#if GLOBAL_Q == 25
-#define   _IQmpyI32int(A, B)  _IQ25mpyI32int(A, B)
-#endif
-#if GLOBAL_Q == 24
-#define   _IQmpyI32int(A, B)  _IQ24mpyI32int(A, B)
-#endif
-#if GLOBAL_Q == 23
-#define   _IQmpyI32int(A, B)  _IQ23mpyI32int(A, B)
-#endif
-#if GLOBAL_Q == 22
-#define   _IQmpyI32int(A, B)  _IQ22mpyI32int(A, B)
-#endif
-#if GLOBAL_Q == 21
-#define   _IQmpyI32int(A, B)  _IQ21mpyI32int(A, B)
-#endif
-#if GLOBAL_Q == 20
-#define   _IQmpyI32int(A, B)  _IQ20mpyI32int(A, B)
-#endif
-#if GLOBAL_Q == 19
-#define   _IQmpyI32int(A, B)  _IQ19mpyI32int(A, B)
-#endif
-#if GLOBAL_Q == 18
-#define   _IQmpyI32int(A, B)  _IQ18mpyI32int(A, B)
-#endif
-#if GLOBAL_Q == 17
-#define   _IQmpyI32int(A, B)  _IQ17mpyI32int(A, B)
-#endif
-#if GLOBAL_Q == 16
-#define   _IQmpyI32int(A, B)  _IQ16mpyI32int(A, B)
-#endif
-#if GLOBAL_Q == 15
-#define   _IQmpyI32int(A, B)  _IQ15mpyI32int(A, B)
-#endif
-#if GLOBAL_Q == 14
-#define   _IQmpyI32int(A, B)  _IQ14mpyI32int(A, B)
-#endif
-#if GLOBAL_Q == 13
-#define   _IQmpyI32int(A, B)  _IQ13mpyI32int(A, B)
-#endif
-#if GLOBAL_Q == 12
-#define   _IQmpyI32int(A, B)  _IQ12mpyI32int(A, B)
-#endif
-#if GLOBAL_Q == 11
-#define   _IQmpyI32int(A, B)  _IQ11mpyI32int(A, B)
-#endif
-#if GLOBAL_Q == 10
-#define   _IQmpyI32int(A, B)  _IQ10mpyI32int(A, B)
-#endif
-#if GLOBAL_Q == 9
-#define   _IQmpyI32int(A, B)  _IQ9mpyI32int(A, B)
-#endif
-#if GLOBAL_Q == 8
-#define   _IQmpyI32int(A, B)  _IQ8mpyI32int(A, B)
-#endif
-#if GLOBAL_Q == 7
-#define   _IQmpyI32int(A, B)  _IQ7mpyI32int(A, B)
-#endif
-#if GLOBAL_Q == 6
-#define   _IQmpyI32int(A, B)  _IQ6mpyI32int(A, B)
-#endif
-#if GLOBAL_Q == 5
-#define   _IQmpyI32int(A, B)  _IQ5mpyI32int(A, B)
-#endif
-#if GLOBAL_Q == 4
-#define   _IQmpyI32int(A, B)  _IQ4mpyI32int(A, B)
-#endif
-#if GLOBAL_Q == 3
-#define   _IQmpyI32int(A, B)  _IQ3mpyI32int(A, B)
-#endif
-#if GLOBAL_Q == 2
-#define   _IQmpyI32int(A, B)  _IQ2mpyI32int(A, B)
-#endif
-#if GLOBAL_Q == 1
-#define   _IQmpyI32int(A, B)  _IQ1mpyI32int(A, B)
-#endif
-//---------------------------------------------------------------------------
-extern    long _IQ30mpyI32frac(long A, long B);
-extern    long _IQ29mpyI32frac(long A, long B);
-extern    long _IQ28mpyI32frac(long A, long B);
-extern    long _IQ27mpyI32frac(long A, long B);
-extern    long _IQ26mpyI32frac(long A, long B);
-extern    long _IQ25mpyI32frac(long A, long B);
-extern    long _IQ24mpyI32frac(long A, long B);
-extern    long _IQ23mpyI32frac(long A, long B);
-extern    long _IQ22mpyI32frac(long A, long B);
-extern    long _IQ21mpyI32frac(long A, long B);
-extern    long _IQ20mpyI32frac(long A, long B);
-extern    long _IQ19mpyI32frac(long A, long B);
-extern    long _IQ18mpyI32frac(long A, long B);
-extern    long _IQ17mpyI32frac(long A, long B);
-extern    long _IQ16mpyI32frac(long A, long B);
-extern    long _IQ15mpyI32frac(long A, long B);
-extern    long _IQ14mpyI32frac(long A, long B);
-extern    long _IQ13mpyI32frac(long A, long B);
-extern    long _IQ12mpyI32frac(long A, long B);
-extern    long _IQ11mpyI32frac(long A, long B);
-extern    long _IQ10mpyI32frac(long A, long B);
-extern    long _IQ9mpyI32frac(long A, long B);
-extern    long _IQ8mpyI32frac(long A, long B);
-extern    long _IQ7mpyI32frac(long A, long B);
-extern    long _IQ6mpyI32frac(long A, long B);
-extern    long _IQ5mpyI32frac(long A, long B);
-extern    long _IQ4mpyI32frac(long A, long B);
-extern    long _IQ3mpyI32frac(long A, long B);
-extern    long _IQ2mpyI32frac(long A, long B);
-extern    long _IQ1mpyI32frac(long A, long B);
-
-#if GLOBAL_Q == 30
-#define   _IQmpyI32frac(A, B)  _IQ30mpyI32frac(A, B)
-#endif
-#if GLOBAL_Q == 29
-#define   _IQmpyI32frac(A, B)  _IQ29mpyI32frac(A, B)
-#endif
-#if GLOBAL_Q == 28
-#define   _IQmpyI32frac(A, B)  _IQ28mpyI32frac(A, B)
-#endif
-#if GLOBAL_Q == 27
-#define   _IQmpyI32frac(A, B)  _IQ27mpyI32frac(A, B)
-#endif
-#if GLOBAL_Q == 26
-#define   _IQmpyI32frac(A, B)  _IQ26mpyI32frac(A, B)
-#endif
-#if GLOBAL_Q == 25
-#define   _IQmpyI32frac(A, B)  _IQ25mpyI32frac(A, B)
-#endif
-#if GLOBAL_Q == 24
-#define   _IQmpyI32frac(A, B)  _IQ24mpyI32frac(A, B)
-#endif
-#if GLOBAL_Q == 23
-#define   _IQmpyI32frac(A, B)  _IQ23mpyI32frac(A, B)
-#endif
-#if GLOBAL_Q == 22
-#define   _IQmpyI32frac(A, B)  _IQ22mpyI32frac(A, B)
-#endif
-#if GLOBAL_Q == 21
-#define   _IQmpyI32frac(A, B)  _IQ21mpyI32frac(A, B)
-#endif
-#if GLOBAL_Q == 20
-#define   _IQmpyI32frac(A, B)  _IQ20mpyI32frac(A, B)
-#endif
-#if GLOBAL_Q == 19
-#define   _IQmpyI32frac(A, B)  _IQ19mpyI32frac(A, B)
-#endif
-#if GLOBAL_Q == 18
-#define   _IQmpyI32frac(A, B)  _IQ18mpyI32frac(A, B)
-#endif
-#if GLOBAL_Q == 17
-#define   _IQmpyI32frac(A, B)  _IQ17mpyI32frac(A, B)
-#endif
-#if GLOBAL_Q == 16
-#define   _IQmpyI32frac(A, B)  _IQ16mpyI32frac(A, B)
-#endif
-#if GLOBAL_Q == 15
-#define   _IQmpyI32frac(A, B)  _IQ15mpyI32frac(A, B)
-#endif
-#if GLOBAL_Q == 14
-#define   _IQmpyI32frac(A, B)  _IQ14mpyI32frac(A, B)
-#endif
-#if GLOBAL_Q == 13
-#define   _IQmpyI32frac(A, B)  _IQ13mpyI32frac(A, B)
-#endif
-#if GLOBAL_Q == 12
-#define   _IQmpyI32frac(A, B)  _IQ12mpyI32frac(A, B)
-#endif
-#if GLOBAL_Q == 11
-#define   _IQmpyI32frac(A, B)  _IQ11mpyI32frac(A, B)
-#endif
-#if GLOBAL_Q == 10
-#define   _IQmpyI32frac(A, B)  _IQ10mpyI32frac(A, B)
-#endif
-#if GLOBAL_Q == 9
-#define   _IQmpyI32frac(A, B)  _IQ9mpyI32frac(A, B)
-#endif
-#if GLOBAL_Q == 8
-#define   _IQmpyI32frac(A, B)  _IQ8mpyI32frac(A, B)
-#endif
-#if GLOBAL_Q == 7
-#define   _IQmpyI32frac(A, B)  _IQ7mpyI32frac(A, B)
-#endif
-#if GLOBAL_Q == 6
-#define   _IQmpyI32frac(A, B)  _IQ6mpyI32frac(A, B)
-#endif
-#if GLOBAL_Q == 5
-#define   _IQmpyI32frac(A, B)  _IQ5mpyI32frac(A, B)
-#endif
-#if GLOBAL_Q == 4
-#define   _IQmpyI32frac(A, B)  _IQ4mpyI32frac(A, B)
-#endif
-#if GLOBAL_Q == 3
-#define   _IQmpyI32frac(A, B)  _IQ3mpyI32frac(A, B)
-#endif
-#if GLOBAL_Q == 2
-#define   _IQmpyI32frac(A, B)  _IQ2mpyI32frac(A, B)
-#endif
-#if GLOBAL_Q == 1
-#define   _IQmpyI32frac(A, B)  _IQ1mpyI32frac(A, B)
-#endif
-//---------------------------------------------------------------------------
-extern    long _IQ30mag(long A, long B);
-extern    long _IQ29mag(long A, long B);
-extern    long _IQ28mag(long A, long B);
-extern    long _IQ27mag(long A, long B);
-extern    long _IQ26mag(long A, long B);
-extern    long _IQ25mag(long A, long B);
-extern    long _IQ24mag(long A, long B);
-extern    long _IQ23mag(long A, long B);
-extern    long _IQ22mag(long A, long B);
-extern    long _IQ21mag(long A, long B);
-extern    long _IQ20mag(long A, long B);
-extern    long _IQ19mag(long A, long B);
-extern    long _IQ18mag(long A, long B);
-extern    long _IQ17mag(long A, long B);
-extern    long _IQ16mag(long A, long B);
-extern    long _IQ15mag(long A, long B);
-extern    long _IQ14mag(long A, long B);
-extern    long _IQ13mag(long A, long B);
-extern    long _IQ12mag(long A, long B);
-extern    long _IQ11mag(long A, long B);
-extern    long _IQ10mag(long A, long B);
-extern    long _IQ9mag(long A, long B);
-extern    long _IQ8mag(long A, long B);
-extern    long _IQ7mag(long A, long B);
-extern    long _IQ6mag(long A, long B);
-extern    long _IQ5mag(long A, long B);
-extern    long _IQ4mag(long A, long B);
-extern    long _IQ3mag(long A, long B);
-extern    long _IQ2mag(long A, long B);
-extern    long _IQ1mag(long A, long B);
-
-#if GLOBAL_Q == 30
-#define   _IQmag(A, B)  _IQ30mag(A, B)
-#endif
-#if GLOBAL_Q == 29
-#define   _IQmag(A, B)  _IQ29mag(A, B)
-#endif
-#if GLOBAL_Q == 28
-#define   _IQmag(A, B)  _IQ28mag(A, B)
-#endif
-#if GLOBAL_Q == 27
-#define   _IQmag(A, B)  _IQ27mag(A, B)
-#endif
-#if GLOBAL_Q == 26
-#define   _IQmag(A, B)  _IQ26mag(A, B)
-#endif
-#if GLOBAL_Q == 25
-#define   _IQmag(A, B)  _IQ25mag(A, B)
-#endif
-#if GLOBAL_Q == 24
-#define   _IQmag(A, B)  _IQ24mag(A, B)
-#endif
-#if GLOBAL_Q == 23
-#define   _IQmag(A, B)  _IQ23mag(A, B)
-#endif
-#if GLOBAL_Q == 22
-#define   _IQmag(A, B)  _IQ22mag(A, B)
-#endif
-#if GLOBAL_Q == 21
-#define   _IQmag(A, B)  _IQ21mag(A, B)
-#endif
-#if GLOBAL_Q == 20
-#define   _IQmag(A, B)  _IQ20mag(A, B)
-#endif
-#if GLOBAL_Q == 19
-#define   _IQmag(A, B)  _IQ19mag(A, B)
-#endif
-#if GLOBAL_Q == 18
-#define   _IQmag(A, B)  _IQ18mag(A, B)
-#endif
-#if GLOBAL_Q == 17
-#define   _IQmag(A, B)  _IQ17mag(A, B)
-#endif
-#if GLOBAL_Q == 16
-#define   _IQmag(A, B)  _IQ16mag(A, B)
-#endif
-#if GLOBAL_Q == 15
-#define   _IQmag(A, B)  _IQ15mag(A, B)
-#endif
-#if GLOBAL_Q == 14
-#define   _IQmag(A, B)  _IQ14mag(A, B)
-#endif
-#if GLOBAL_Q == 13
-#define   _IQmag(A, B)  _IQ13mag(A, B)
-#endif
-#if GLOBAL_Q == 12
-#define   _IQmag(A, B)  _IQ12mag(A, B)
-#endif
-#if GLOBAL_Q == 11
-#define   _IQmag(A, B)  _IQ11mag(A, B)
-#endif
-#if GLOBAL_Q == 10
-#define   _IQmag(A, B)  _IQ10mag(A, B)
-#endif
-#if GLOBAL_Q == 9
-#define   _IQmag(A, B)  _IQ9mag(A, B)
-#endif
-#if GLOBAL_Q == 8
-#define   _IQmag(A, B)  _IQ8mag(A, B)
-#endif
-#if GLOBAL_Q == 7
-#define   _IQmag(A, B)  _IQ7mag(A, B)
-#endif
-#if GLOBAL_Q == 6
-#define   _IQmag(A, B)  _IQ6mag(A, B)
-#endif
-#if GLOBAL_Q == 5
-#define   _IQmag(A, B)  _IQ5mag(A, B)
-#endif
-#if GLOBAL_Q == 4
-#define   _IQmag(A, B)  _IQ4mag(A, B)
-#endif
-#if GLOBAL_Q == 3
-#define   _IQmag(A, B)  _IQ3mag(A, B)
-#endif
-#if GLOBAL_Q == 2
-#define   _IQmag(A, B)  _IQ2mag(A, B)
-#endif
-#if GLOBAL_Q == 1
-#define   _IQmag(A, B)  _IQ1mag(A, B)
-#endif
-//---------------------------------------------------------------------------
-extern    long _atoIQN(const char *A, long q_value);
-#define   _atoIQ(A)    _atoIQN(A, GLOBAL_Q)
-#define   _atoIQ30(A)  _atoIQN(A, 30)
-#define   _atoIQ29(A)  _atoIQN(A, 29)
-#define   _atoIQ28(A)  _atoIQN(A, 28)
-#define   _atoIQ27(A)  _atoIQN(A, 27)
-#define   _atoIQ26(A)  _atoIQN(A, 26)
-#define   _atoIQ25(A)  _atoIQN(A, 25)
-#define   _atoIQ24(A)  _atoIQN(A, 24)
-#define   _atoIQ23(A)  _atoIQN(A, 23)
-#define   _atoIQ22(A)  _atoIQN(A, 22)
-#define   _atoIQ21(A)  _atoIQN(A, 21)
-#define   _atoIQ20(A)  _atoIQN(A, 20)
-#define   _atoIQ19(A)  _atoIQN(A, 19)
-#define   _atoIQ18(A)  _atoIQN(A, 18)
-#define   _atoIQ17(A)  _atoIQN(A, 17)
-#define   _atoIQ16(A)  _atoIQN(A, 16)
-#define   _atoIQ15(A)  _atoIQN(A, 15)
-#define   _atoIQ14(A)  _atoIQN(A, 14)
-#define   _atoIQ13(A)  _atoIQN(A, 13)
-#define   _atoIQ12(A)  _atoIQN(A, 12)
-#define   _atoIQ11(A)  _atoIQN(A, 11)
-#define   _atoIQ10(A)  _atoIQN(A, 10)
-#define   _atoIQ9(A)   _atoIQN(A, 9)
-#define   _atoIQ8(A)   _atoIQN(A, 8)
-#define   _atoIQ7(A)   _atoIQN(A, 7)
-#define   _atoIQ6(A)   _atoIQN(A, 6)
-#define   _atoIQ5(A)   _atoIQN(A, 5)
-#define   _atoIQ4(A)   _atoIQN(A, 4)
-#define   _atoIQ3(A)   _atoIQN(A, 3)
-#define   _atoIQ2(A)   _atoIQN(A, 2)
-#define   _atoIQ1(A)   _atoIQN(A, 1)
-//---------------------------------------------------------------------------
-extern    int __IQNtoa(char *A, const char *B, long C, int D);
-extern    int _IQ30toa(char *A, const char *B, long C);
-extern    int _IQ29toa(char *A, const char *B, long C);
-extern    int _IQ28toa(char *A, const char *B, long C);
-extern    int _IQ27toa(char *A, const char *B, long C);
-extern    int _IQ26toa(char *A, const char *B, long C);
-extern    int _IQ25toa(char *A, const char *B, long C);
-extern    int _IQ24toa(char *A, const char *B, long C);
-extern    int _IQ23toa(char *A, const char *B, long C);
-extern    int _IQ22toa(char *A, const char *B, long C);
-extern    int _IQ21toa(char *A, const char *B, long C);
-extern    int _IQ20toa(char *A, const char *B, long C);
-extern    int _IQ19toa(char *A, const char *B, long C);
-extern    int _IQ18toa(char *A, const char *B, long C);
-extern    int _IQ17toa(char *A, const char *B, long C);
-extern    int _IQ16toa(char *A, const char *B, long C);
-extern    int _IQ15toa(char *A, const char *B, long C);
-extern    int _IQ14toa(char *A, const char *B, long C);
-extern    int _IQ13toa(char *A, const char *B, long C);
-extern    int _IQ12toa(char *A, const char *B, long C);
-extern    int _IQ11toa(char *A, const char *B, long C);
-extern    int _IQ10toa(char *A, const char *B, long C);
-extern    int  _IQ9toa(char *A, const char *B, long C);
-extern    int  _IQ8toa(char *A, const char *B, long C);
-extern    int  _IQ7toa(char *A, const char *B, long C);
-extern    int  _IQ6toa(char *A, const char *B, long C);
-extern    int  _IQ5toa(char *A, const char *B, long C);
-extern    int  _IQ4toa(char *A, const char *B, long C);
-extern    int  _IQ3toa(char *A, const char *B, long C);
-extern    int  _IQ2toa(char *A, const char *B, long C);
-extern    int  _IQ1toa(char *A, const char *B, long C);
-
-
-#define   _IQ30toa(A, B, C)   __IQNtoa(A, B, C, 30);
-#define   _IQ29toa(A, B, C)   __IQNtoa(A, B, C, 29);
-#define   _IQ28toa(A, B, C)   __IQNtoa(A, B, C, 28);
-#define   _IQ27toa(A, B, C)   __IQNtoa(A, B, C, 27);
-#define   _IQ26toa(A, B, C)   __IQNtoa(A, B, C, 26);
-#define   _IQ25toa(A, B, C)   __IQNtoa(A, B, C, 25);
-#define   _IQ24toa(A, B, C)   __IQNtoa(A, B, C, 24);
-#define   _IQ23toa(A, B, C)   __IQNtoa(A, B, C, 23);
-#define   _IQ21toa(A, B, C)   __IQNtoa(A, B, C, 21);
-#define   _IQ22toa(A, B, C)   __IQNtoa(A, B, C, 22);
-#define   _IQ20toa(A, B, C)   __IQNtoa(A, B, C, 20);
-#define   _IQ19toa(A, B, C)   __IQNtoa(A, B, C, 19);
-#define   _IQ18toa(A, B, C)   __IQNtoa(A, B, C, 18);
-#define   _IQ17toa(A, B, C)   __IQNtoa(A, B, C, 17);
-#define   _IQ16toa(A, B, C)   __IQNtoa(A, B, C, 16);
-#define   _IQ15toa(A, B, C)   __IQNtoa(A, B, C, 15);
-#define   _IQ14toa(A, B, C)   __IQNtoa(A, B, C, 14);
-#define   _IQ13toa(A, B, C)   __IQNtoa(A, B, C, 13);
-#define   _IQ12toa(A, B, C)   __IQNtoa(A, B, C, 12);
-#define   _IQ11toa(A, B, C)   __IQNtoa(A, B, C, 11);
-#define   _IQ10toa(A, B, C)   __IQNtoa(A, B, C, 10);
-#define   _IQ9toa(A, B, C)    __IQNtoa(A, B, C, 9);
-#define   _IQ8toa(A, B, C)    __IQNtoa(A, B, C, 8);
-#define   _IQ7toa(A, B, C)    __IQNtoa(A, B, C, 7);
-#define   _IQ6toa(A, B, C)    __IQNtoa(A, B, C, 6);
-#define   _IQ5toa(A, B, C)    __IQNtoa(A, B, C, 5);
-#define   _IQ4toa(A, B, C)    __IQNtoa(A, B, C, 4);
-#define   _IQ3toa(A, B, C)    __IQNtoa(A, B, C, 3);
-#define   _IQ2toa(A, B, C)    __IQNtoa(A, B, C, 2);
-#define   _IQ1toa(A, B, C)    __IQNtoa(A, B, C, 1);
-
-
-#if GLOBAL_Q == 30
-#define   _IQtoa(A, B, C)     __IQNtoa(A, B, C, 30)
-#endif
-#if GLOBAL_Q == 29
-#define   _IQtoa(A, B, C)     __IQNtoa(A, B, C, 29)
-#endif
-#if GLOBAL_Q == 28
-#define   _IQtoa(A, B, C)     __IQNtoa(A, B, C, 28)
-#endif
-#if GLOBAL_Q == 27
-#define   _IQtoa(A, B, C)     __IQNtoa(A, B, C, 27)
-#endif
-#if GLOBAL_Q == 26
-#define   _IQtoa(A, B, C)     __IQNtoa(A, B, C, 26)
-#endif
-#if GLOBAL_Q == 25
-#define   _IQtoa(A, B, C)     __IQNtoa(A, B, C, 25)
-#endif
-#if GLOBAL_Q == 24
-#define   _IQtoa(A, B, C)     __IQNtoa(A, B, C, 24)
-#endif
-#if GLOBAL_Q == 23
-#define   _IQtoa(A, B, C)     __IQNtoa(A, B, C, 23)
-#endif
-#if GLOBAL_Q == 22
-#define   _IQtoa(A, B, C)     __IQNtoa(A, B, C, 22)
-#endif
-#if GLOBAL_Q == 21
-#define   _IQtoa(A, B, C)     __IQNtoa(A, B, C, 21)
-#endif
-#if GLOBAL_Q == 20
-#define   _IQtoa(A, B, C)     __IQNtoa(A, B, C, 20)
-#endif
-#if GLOBAL_Q == 19
-#define   _IQtoa(A, B, C)     __IQNtoa(A, B, C, 19)
-#endif
-#if GLOBAL_Q == 18
-#define   _IQtoa(A, B, C)     __IQNtoa(A, B, C, 18)
-#endif
-#if GLOBAL_Q == 17
-#define   _IQtoa(A, B, C)     __IQNtoa(A, B, C, 17)
-#endif
-#if GLOBAL_Q == 16
-#define   _IQtoa(A, B, C)     __IQNtoa(A, B, C, 16)
-#endif
-#if GLOBAL_Q == 15
-#define   _IQtoa(A, B, C)     __IQNtoa(A, B, C, 15)
-#endif
-#if GLOBAL_Q == 14
-#define   _IQtoa(A, B, C)     __IQNtoa(A, B, C, 14)
-#endif
-#if GLOBAL_Q == 13
-#define   _IQtoa(A, B, C)     __IQNtoa(A, B, C, 13)
-#endif
-#if GLOBAL_Q == 12
-#define   _IQtoa(A, B, C)     __IQNtoa(A, B, C, 12)
-#endif
-#if GLOBAL_Q == 11
-#define   _IQtoa(A, B, C)     __IQNtoa(A, B, C, 11)
-#endif
-#if GLOBAL_Q == 10
-#define   _IQtoa(A, B, C)     __IQNtoa(A, B, C, 10)
-#endif
-#if GLOBAL_Q == 9
-#define   _IQtoa(A, B, C)     __IQNtoa(A, B, C, 9)
-#endif
-#if GLOBAL_Q == 8
-#define   _IQtoa(A, B, C)     __IQNtoa(A, B, C, 8)
-#endif
-#if GLOBAL_Q == 7
-#define   _IQtoa(A, B, C)     __IQNtoa(A, B, C, 7)
-#endif
-#if GLOBAL_Q == 6
-#define   _IQtoa(A, B, C)     __IQNtoa(A, B, C, 6)
-#endif
-#if GLOBAL_Q == 5
-#define   _IQtoa(A, B, C)     __IQNtoa(A, B, C, 5)
-#endif
-#if GLOBAL_Q == 4
-#define   _IQtoa(A, B, C)     __IQNtoa(A, B, C, 4)
-#endif
-#if GLOBAL_Q == 3
-#define   _IQtoa(A, B, C)     __IQNtoa(A, B, C, 3)
-#endif
-#if GLOBAL_Q == 2
-#define   _IQtoa(A, B, C)     __IQNtoa(A, B, C, 2)
-#endif
-#if GLOBAL_Q == 1
-#define   _IQtoa(A, B, C)     __IQNtoa(A, B, C, 1)
-#endif
-//---------------------------------------------------------------------------
-#define   _IQabs(A)    labs(A)
-#define   _IQ30abs(A)  labs(A)
-#define   _IQ29abs(A)  labs(A)
-#define   _IQ28abs(A)  labs(A)
-#define   _IQ27abs(A)  labs(A)
-#define   _IQ26abs(A)  labs(A)
-#define   _IQ25abs(A)  labs(A)
-#define   _IQ24abs(A)  labs(A)
-#define   _IQ23abs(A)  labs(A)
-#define   _IQ22abs(A)  labs(A)
-#define   _IQ21abs(A)  labs(A)
-#define   _IQ20abs(A)  labs(A)
-#define   _IQ19abs(A)  labs(A)
-#define   _IQ18abs(A)  labs(A)
-#define   _IQ17abs(A)  labs(A)
-#define   _IQ16abs(A)  labs(A)
-#define   _IQ15abs(A)  labs(A)
-#define   _IQ14abs(A)  labs(A)
-#define   _IQ13abs(A)  labs(A)
-#define   _IQ12abs(A)  labs(A)
-#define   _IQ11abs(A)  labs(A)
-#define   _IQ10abs(A)  labs(A)
-#define   _IQ9abs(A)   labs(A)
-#define   _IQ8abs(A)   labs(A)
-#define   _IQ7abs(A)   labs(A)
-#define   _IQ6abs(A)   labs(A)
-#define   _IQ5abs(A)   labs(A)
-#define   _IQ4abs(A)   labs(A)
-#define   _IQ3abs(A)   labs(A)
-#define   _IQ2abs(A)   labs(A)
-#define   _IQ1abs(A)   labs(A)
-//###########################################################################
-#else   // MATH_TYPE == FLOAT_MATH
-//###########################################################################
-// If FLOAT_MATH is used, the IQmath library function are replaced by
-// equivalent floating point operations:
-//===========================================================================
-typedef   float   _iq;
-typedef   float   _iq30;
-typedef   float   _iq29;
-typedef   float   _iq28;
-typedef   float   _iq27;
-typedef   float   _iq26;
-typedef   float   _iq25;
-typedef   float   _iq24;
-typedef   float   _iq23;
-typedef   float   _iq22;
-typedef   float   _iq21;
-typedef   float   _iq20;
-typedef   float   _iq19;
-typedef   float   _iq18;
-typedef   float   _iq17;
-typedef   float   _iq16;
-typedef   float   _iq15;
-typedef   float   _iq14;
-typedef   float   _iq13;
-typedef   float   _iq12;
-typedef   float   _iq11;
-typedef   float   _iq10;
-typedef   float   _iq9;
-typedef   float   _iq8;
-typedef   float   _iq7;
-typedef   float   _iq6;
-typedef   float   _iq5;
-typedef   float   _iq4;
-typedef   float   _iq3;
-typedef   float   _iq2;
-typedef   float   _iq1;
-//---------------------------------------------------------------------------
-#define   _IQ(A)         (A)
-#define   _IQ30(A)       (A)
-#define   _IQ29(A)       (A)
-#define   _IQ28(A)       (A)
-#define   _IQ27(A)       (A)
-#define   _IQ26(A)       (A)
-#define   _IQ25(A)       (A)
-#define   _IQ24(A)       (A)
-#define   _IQ23(A)       (A)
-#define   _IQ22(A)       (A)
-#define   _IQ21(A)       (A)
-#define   _IQ20(A)       (A)
-#define   _IQ19(A)       (A)
-#define   _IQ18(A)       (A)
-#define   _IQ17(A)       (A)
-#define   _IQ16(A)       (A)
-#define   _IQ15(A)       (A)
-#define   _IQ14(A)       (A)
-#define   _IQ13(A)       (A)
-#define   _IQ12(A)       (A)
-#define   _IQ10(A)       (A)
-#define   _IQ9(A)        (A)
-#define   _IQ8(A)        (A)
-#define   _IQ7(A)        (A)
-#define   _IQ6(A)        (A)
-#define   _IQ5(A)        (A)
-#define   _IQ4(A)        (A)
-#define   _IQ3(A)        (A)
-#define   _IQ2(A)        (A)
-#define   _IQ1(A)        (A)
-//---------------------------------------------------------------------------
-#define   _IQtoF(A)      (A)
-#define   _IQ30toF(A)    (A)
-#define   _IQ29toF(A)    (A)
-#define   _IQ28toF(A)    (A)
-#define   _IQ27toF(A)    (A)
-#define   _IQ26toF(A)    (A)
-#define   _IQ25toF(A)    (A)
-#define   _IQ24toF(A)    (A)
-#define   _IQ23toF(A)    (A)
-#define   _IQ22toF(A)    (A)
-#define   _IQ21toF(A)    (A)
-#define   _IQ20toF(A)    (A)
-#define   _IQ19toF(A)    (A)
-#define   _IQ18toF(A)    (A)
-#define   _IQ17toF(A)    (A)
-#define   _IQ16toF(A)    (A)
-#define   _IQ15toF(A)    (A)
-#define   _IQ14toF(A)    (A)
-#define   _IQ13toF(A)    (A)
-#define   _IQ12toF(A)    (A)
-#define   _IQ11toF(A)    (A)
-#define   _IQ10toF(A)    (A)
-#define   _IQ9toF(A)     (A)
-#define   _IQ8toF(A)     (A)
-#define   _IQ7toF(A)     (A)
-#define   _IQ6toF(A)     (A)
-#define   _IQ5toF(A)     (A)
-#define   _IQ4toF(A)     (A)
-#define   _IQ3toF(A)     (A)
-#define   _IQ2toF(A)     (A)
-#define   _IQ1toF(A)     (A)
-//---------------------------------------------------------------------------
-extern  float _satf(float A, float Pos, float Neg);
-#define   _IQsat(A, Pos, Neg)    _satf(A, Pos, Neg)
-//---------------------------------------------------------------------------
-#define   _IQtoIQ30(A)   (A)
-#define   _IQtoIQ29(A)   (A)
-#define   _IQtoIQ28(A)   (A)
-#define   _IQtoIQ27(A)   (A)
-#define   _IQtoIQ26(A)   (A)
-#define   _IQtoIQ25(A)   (A)
-#define   _IQtoIQ24(A)   (A)
-#define   _IQtoIQ23(A)   (A)
-#define   _IQtoIQ22(A)   (A)
-#define   _IQtoIQ21(A)   (A)
-#define   _IQtoIQ20(A)   (A)
-#define   _IQtoIQ19(A)   (A)
-#define   _IQtoIQ18(A)   (A)
-#define   _IQtoIQ17(A)   (A)
-#define   _IQtoIQ16(A)   (A)
-#define   _IQtoIQ15(A)   (A)
-#define   _IQtoIQ14(A)   (A)
-#define   _IQtoIQ13(A)   (A)
-#define   _IQtoIQ12(A)   (A)
-#define   _IQtoIQ11(A)   (A)
-#define   _IQtoIQ10(A)   (A)
-#define   _IQtoIQ9(A)    (A)
-#define   _IQtoIQ8(A)    (A)
-#define   _IQtoIQ7(A)    (A)
-#define   _IQtoIQ6(A)    (A)
-#define   _IQtoIQ5(A)    (A)
-#define   _IQtoIQ4(A)    (A)
-#define   _IQtoIQ3(A)    (A)
-#define   _IQtoIQ2(A)    (A)
-#define   _IQtoIQ1(A)    (A)
-//---------------------------------------------------------------------------
-#define   _IQ30toIQ(A)   (A)
-#define   _IQ29toIQ(A)   (A)
-#define   _IQ28toIQ(A)   (A)
-#define   _IQ27toIQ(A)   (A)
-#define   _IQ26toIQ(A)   (A)
-#define   _IQ25toIQ(A)   (A)
-#define   _IQ24toIQ(A)   (A)
-#define   _IQ23toIQ(A)   (A)
-#define   _IQ22toIQ(A)   (A)
-#define   _IQ21toIQ(A)   (A)
-#define   _IQ20toIQ(A)   (A)
-#define   _IQ19toIQ(A)   (A)
-#define   _IQ18toIQ(A)   (A)
-#define   _IQ17toIQ(A)   (A)
-#define   _IQ16toIQ(A)   (A)
-#define   _IQ15toIQ(A)   (A)
-#define   _IQ14toIQ(A)   (A)
-#define   _IQ13toIQ(A)   (A)
-#define   _IQ12toIQ(A)   (A)
-#define   _IQ11toIQ(A)   (A)
-#define   _IQ10toIQ(A)   (A)
-#define   _IQ9toIQ(A)    (A)
-#define   _IQ8toIQ(A)    (A)
-#define   _IQ7toIQ(A)    (A)
-#define   _IQ6toIQ(A)    (A)
-#define   _IQ5toIQ(A)    (A)
-#define   _IQ4toIQ(A)    (A)
-#define   _IQ3toIQ(A)    (A)
-#define   _IQ2toIQ(A)    (A)
-#define   _IQ1toIQ(A)    (A)
-//---------------------------------------------------------------------------
-#define   _IQtoQ15(A)    (short) ((long)((A) * 32768.0L))
-#define   _IQtoQ14(A)    (short) ((long)((A) * 16384.0L))
-#define   _IQtoQ13(A)    (short) ((long)((A) * 8192.0L))
-#define   _IQtoQ12(A)    (short) ((long)((A) * 4096.0L))
-#define   _IQtoQ11(A)    (short) ((long)((A) * 2048.0L))
-#define   _IQtoQ10(A)    (short) ((long)((A) * 1024.0L))
-#define   _IQtoQ9(A)     (short) ((long)((A) * 512.0L))
-#define   _IQtoQ8(A)     (short) ((long)((A) * 256.0L))
-#define   _IQtoQ7(A)     (short) ((long)((A) * 128.0L))
-#define   _IQtoQ6(A)     (short) ((long)((A) * 64.0L))
-#define   _IQtoQ5(A)     (short) ((long)((A) * 32.0L))
-#define   _IQtoQ4(A)     (short) ((long)((A) * 16.0L))
-#define   _IQtoQ3(A)     (short) ((long)((A) * 8.0L))
-#define   _IQtoQ2(A)     (short) ((long)((A) * 4.0L))
-#define   _IQtoQ1(A)     (short) ((long)((A) * 2.0L))
-
-//---------------------------------------------------------------------------
-#define   _Q15toIQ(A)    (((float) (A)) * 0.000030518)
-#define   _Q14toIQ(A)    (((float) (A)) * 0.000061035)
-#define   _Q13toIQ(A)    (((float) (A)) * 0.000122070)
-#define   _Q12toIQ(A)    (((float) (A)) * 0.000244141)
-#define   _Q11toIQ(A)    (((float) (A)) * 0.000488281)
-#define   _Q10toIQ(A)    (((float) (A)) * 0.000976563)
-#define   _Q9toIQ(A)     (((float) (A)) * 0.001953125)
-#define   _Q8toIQ(A)     (((float) (A)) * 0.003906250)
-#define   _Q7toIQ(A)     (((float) (A)) * 0.007812500)
-#define   _Q6toIQ(A)     (((float) (A)) * 0.015625000)
-#define   _Q5toIQ(A)     (((float) (A)) * 0.031250000)
-#define   _Q4toIQ(A)     (((float) (A)) * 0.062500000)
-#define   _Q3toIQ(A)     (((float) (A)) * 0.125000000)
-#define   _Q2toIQ(A)     (((float) (A)) * 0.250000000)
-#define   _Q1toIQ(A)     (((float) (A)) * 0.500000000)
-//---------------------------------------------------------------------------
-#define   _IQmpy(A,B)         ((A) * (B))
-#define   _IQ30mpy(A,B)       ((A) * (B))
-#define   _IQ29mpy(A,B)       ((A) * (B))
-#define   _IQ28mpy(A,B)       ((A) * (B))
-#define   _IQ27mpy(A,B)       ((A) * (B))
-#define   _IQ26mpy(A,B)       ((A) * (B))
-#define   _IQ25mpy(A,B)       ((A) * (B))
-#define   _IQ24mpy(A,B)       ((A) * (B))
-#define   _IQ23mpy(A,B)       ((A) * (B))
-#define   _IQ22mpy(A,B)       ((A) * (B))
-#define   _IQ21mpy(A,B)       ((A) * (B))
-#define   _IQ20mpy(A,B)       ((A) * (B))
-#define   _IQ19mpy(A,B)       ((A) * (B))
-#define   _IQ18mpy(A,B)       ((A) * (B))
-#define   _IQ17mpy(A,B)       ((A) * (B))
-#define   _IQ16mpy(A,B)       ((A) * (B))
-#define   _IQ15mpy(A,B)       ((A) * (B))
-#define   _IQ14mpy(A,B)       ((A) * (B))
-#define   _IQ13mpy(A,B)       ((A) * (B))
-#define   _IQ12mpy(A,B)       ((A) * (B))
-#define   _IQ11mpy(A,B)       ((A) * (B))
-#define   _IQ10mpy(A,B)       ((A) * (B))
-#define   _IQ9mpy(A,B)        ((A) * (B))
-#define   _IQ8mpy(A,B)        ((A) * (B))
-#define   _IQ7mpy(A,B)        ((A) * (B))
-#define   _IQ6mpy(A,B)        ((A) * (B))
-#define   _IQ5mpy(A,B)        ((A) * (B))
-#define   _IQ4mpy(A,B)        ((A) * (B))
-#define   _IQ3mpy(A,B)        ((A) * (B))
-#define   _IQ2mpy(A,B)        ((A) * (B))
-#define   _IQ1mpy(A,B)        ((A) * (B))
-//---------------------------------------------------------------------------
-#define   _IQrmpy(A,B)        ((A) * (B))
-#define   _IQ30rmpy(A,B)      ((A) * (B))
-#define   _IQ29rmpy(A,B)      ((A) * (B))
-#define   _IQ28rmpy(A,B)      ((A) * (B))
-#define   _IQ27rmpy(A,B)      ((A) * (B))
-#define   _IQ26rmpy(A,B)      ((A) * (B))
-#define   _IQ25rmpy(A,B)      ((A) * (B))
-#define   _IQ24rmpy(A,B)      ((A) * (B))
-#define   _IQ23rmpy(A,B)      ((A) * (B))
-#define   _IQ22rmpy(A,B)      ((A) * (B))
-#define   _IQ21rmpy(A,B)      ((A) * (B))
-#define   _IQ20rmpy(A,B)      ((A) * (B))
-#define   _IQ19rmpy(A,B)      ((A) * (B))
-#define   _IQ18rmpy(A,B)      ((A) * (B))
-#define   _IQ17rmpy(A,B)      ((A) * (B))
-#define   _IQ16rmpy(A,B)      ((A) * (B))
-#define   _IQ15rmpy(A,B)      ((A) * (B))
-#define   _IQ14rmpy(A,B)      ((A) * (B))
-#define   _IQ13rmpy(A,B)      ((A) * (B))
-#define   _IQ12rmpy(A,B)      ((A) * (B))
-#define   _IQ11rmpy(A,B)      ((A) * (B))
-#define   _IQ10rmpy(A,B)      ((A) * (B))
-#define   _IQ9rmpy(A,B)       ((A) * (B))
-#define   _IQ8rmpy(A,B)       ((A) * (B))
-#define   _IQ7rmpy(A,B)       ((A) * (B))
-#define   _IQ6rmpy(A,B)       ((A) * (B))
-#define   _IQ5rmpy(A,B)       ((A) * (B))
-#define   _IQ4rmpy(A,B)       ((A) * (B))
-#define   _IQ3rmpy(A,B)       ((A) * (B))
-#define   _IQ2rmpy(A,B)       ((A) * (B))
-#define   _IQ1rmpy(A,B)       ((A) * (B))
-//---------------------------------------------------------------------------
-#define   _IQrsmpy(A,B)       ((A) * (B))
-#define   _IQ30rsmpy(A,B)     ((A) * (B))
-#define   _IQ29rsmpy(A,B)     ((A) * (B))
-#define   _IQ28rsmpy(A,B)     ((A) * (B))
-#define   _IQ27rsmpy(A,B)     ((A) * (B))
-#define   _IQ26rsmpy(A,B)     ((A) * (B))
-#define   _IQ25rsmpy(A,B)     ((A) * (B))
-#define   _IQ24rsmpy(A,B)     ((A) * (B))
-#define   _IQ23rsmpy(A,B)     ((A) * (B))
-#define   _IQ22rsmpy(A,B)     ((A) * (B))
-#define   _IQ21rsmpy(A,B)     ((A) * (B))
-#define   _IQ20rsmpy(A,B)     ((A) * (B))
-#define   _IQ19rsmpy(A,B)     ((A) * (B))
-#define   _IQ18rsmpy(A,B)     ((A) * (B))
-#define   _IQ17rsmpy(A,B)     ((A) * (B))
-#define   _IQ16rsmpy(A,B)     ((A) * (B))
-#define   _IQ15rsmpy(A,B)     ((A) * (B))
-#define   _IQ14rsmpy(A,B)     ((A) * (B))
-#define   _IQ13rsmpy(A,B)     ((A) * (B))
-#define   _IQ12rsmpy(A,B)     ((A) * (B))
-#define   _IQ11rsmpy(A,B)     ((A) * (B))
-#define   _IQ10rsmpy(A,B)     ((A) * (B))
-#define   _IQ9rsmpy(A,B)      ((A) * (B))
-#define   _IQ8rsmpy(A,B)      ((A) * (B))
-#define   _IQ7rsmpy(A,B)      ((A) * (B))
-#define   _IQ6rsmpy(A,B)      ((A) * (B))
-#define   _IQ5rsmpy(A,B)      ((A) * (B))
-#define   _IQ4rsmpy(A,B)      ((A) * (B))
-#define   _IQ3rsmpy(A,B)      ((A) * (B))
-#define   _IQ2rsmpy(A,B)      ((A) * (B))
-#define   _IQ1rsmpy(A,B)      ((A) * (B))
-//---------------------------------------------------------------------------
-#define   _IQdiv(A,B)         ((A) / (B))
-#define   _IQ30div(A,B)       ((A) / (B))
-#define   _IQ29div(A,B)       ((A) / (B))
-#define   _IQ28div(A,B)       ((A) / (B))
-#define   _IQ27div(A,B)       ((A) / (B))
-#define   _IQ26div(A,B)       ((A) / (B))
-#define   _IQ25div(A,B)       ((A) / (B))
-#define   _IQ24div(A,B)       ((A) / (B))
-#define   _IQ23div(A,B)       ((A) / (B))
-#define   _IQ22div(A,B)       ((A) / (B))
-#define   _IQ21div(A,B)       ((A) / (B))
-#define   _IQ20div(A,B)       ((A) / (B))
-#define   _IQ19div(A,B)       ((A) / (B))
-#define   _IQ18div(A,B)       ((A) / (B))
-#define   _IQ17div(A,B)       ((A) / (B))
-#define   _IQ16div(A,B)       ((A) / (B))
-#define   _IQ15div(A,B)       ((A) / (B))
-#define   _IQ14div(A,B)       ((A) / (B))
-#define   _IQ13div(A,B)       ((A) / (B))
-#define   _IQ12div(A,B)       ((A) / (B))
-#define   _IQ11div(A,B)       ((A) / (B))
-#define   _IQ10div(A,B)       ((A) / (B))
-#define   _IQ9div(A,B)        ((A) / (B))
-#define   _IQ8div(A,B)        ((A) / (B))
-#define   _IQ7div(A,B)        ((A) / (B))
-#define   _IQ6div(A,B)        ((A) / (B))
-#define   _IQ5div(A,B)        ((A) / (B))
-#define   _IQ4div(A,B)        ((A) / (B))
-#define   _IQ3div(A,B)        ((A) / (B))
-#define   _IQ2div(A,B)        ((A) / (B))
-#define   _IQ1div(A,B)        ((A) / (B))
-//---------------------------------------------------------------------------
-#define   _IQsin(A)           sin(A)
-#define   _IQ30sin(A)         sin(A)
-#define   _IQ29sin(A)         sin(A)
-#define   _IQ28sin(A)         sin(A)
-#define   _IQ27sin(A)         sin(A)
-#define   _IQ26sin(A)         sin(A)
-#define   _IQ25sin(A)         sin(A)
-#define   _IQ24sin(A)         sin(A)
-#define   _IQ23sin(A)         sin(A)
-#define   _IQ22sin(A)         sin(A)
-#define   _IQ21sin(A)         sin(A)
-#define   _IQ20sin(A)         sin(A)
-#define   _IQ19sin(A)         sin(A)
-#define   _IQ18sin(A)         sin(A)
-#define   _IQ17sin(A)         sin(A)
-#define   _IQ16sin(A)         sin(A)
-#define   _IQ15sin(A)         sin(A)
-#define   _IQ14sin(A)         sin(A)
-#define   _IQ13sin(A)         sin(A)
-#define   _IQ12sin(A)         sin(A)
-#define   _IQ11sin(A)         sin(A)
-#define   _IQ10sin(A)         sin(A)
-#define   _IQ9sin(A)          sin(A)
-#define   _IQ8sin(A)          sin(A)
-#define   _IQ7sin(A)          sin(A)
-#define   _IQ6sin(A)          sin(A)
-#define   _IQ5sin(A)          sin(A)
-#define   _IQ4sin(A)          sin(A)
-#define   _IQ3sin(A)          sin(A)
-#define   _IQ2sin(A)          sin(A)
-#define   _IQ1sin(A)          sin(A)
-//---------------------------------------------------------------------------
-#define   _IQsinPU(A)         sin((A)*6.283185307)
-#define   _IQ30sinPU(A)       sin((A)*6.283185307)
-#define   _IQ29sinPU(A)       sin((A)*6.283185307)
-#define   _IQ28sinPU(A)       sin((A)*6.283185307)
-#define   _IQ27sinPU(A)       sin((A)*6.283185307)
-#define   _IQ26sinPU(A)       sin((A)*6.283185307)
-#define   _IQ25sinPU(A)       sin((A)*6.283185307)
-#define   _IQ24sinPU(A)       sin((A)*6.283185307)
-#define   _IQ23sinPU(A)       sin((A)*6.283185307)
-#define   _IQ22sinPU(A)       sin((A)*6.283185307)
-#define   _IQ21sinPU(A)       sin((A)*6.283185307)
-#define   _IQ20sinPU(A)       sin((A)*6.283185307)
-#define   _IQ19sinPU(A)       sin((A)*6.283185307)
-#define   _IQ18sinPU(A)       sin((A)*6.283185307)
-#define   _IQ17sinPU(A)       sin((A)*6.283185307)
-#define   _IQ16sinPU(A)       sin((A)*6.283185307)
-#define   _IQ15sinPU(A)       sin((A)*6.283185307)
-#define   _IQ14sinPU(A)       sin((A)*6.283185307)
-#define   _IQ13sinPU(A)       sin((A)*6.283185307)
-#define   _IQ12sinPU(A)       sin((A)*6.283185307)
-#define   _IQ11sinPU(A)       sin((A)*6.283185307)
-#define   _IQ10sinPU(A)       sin((A)*6.283185307)
-#define   _IQ9sinPU(A)        sin((A)*6.283185307)
-#define   _IQ8sinPU(A)        sin((A)*6.283185307)
-#define   _IQ7sinPU(A)        sin((A)*6.283185307)
-#define   _IQ6sinPU(A)        sin((A)*6.283185307)
-#define   _IQ5sinPU(A)        sin((A)*6.283185307)
-#define   _IQ4sinPU(A)        sin((A)*6.283185307)
-#define   _IQ3sinPU(A)        sin((A)*6.283185307)
-#define   _IQ2sinPU(A)        sin((A)*6.283185307)
-#define   _IQ1sinPU(A)        sin((A)*6.283185307)
-//---------------------------------------------------------------------------
-#define   _IQasin(A)          asin(A)
-#define   _IQ29asin(A)        asin(A)
-#define   _IQ28asin(A)        asin(A)
-#define   _IQ27asin(A)        asin(A)
-#define   _IQ26asin(A)        asin(A)
-#define   _IQ25asin(A)        asin(A)
-#define   _IQ24asin(A)        asin(A)
-#define   _IQ23asin(A)        asin(A)
-#define   _IQ22asin(A)        asin(A)
-#define   _IQ21asin(A)        asin(A)
-#define   _IQ20asin(A)        asin(A)
-#define   _IQ19asin(A)        asin(A)
-#define   _IQ18asin(A)        asin(A)
-#define   _IQ17asin(A)        asin(A)
-#define   _IQ16asin(A)        asin(A)
-#define   _IQ15asin(A)        asin(A)
-#define   _IQ14asin(A)        asin(A)
-#define   _IQ13asin(A)        asin(A)
-#define   _IQ12asin(A)        asin(A)
-#define   _IQ11asin(A)        asin(A)
-#define   _IQ10asin(A)        asin(A)
-#define   _IQ9asin(A)         asin(A)
-#define   _IQ8asin(A)         asin(A)
-#define   _IQ7asin(A)         asin(A)
-#define   _IQ6asin(A)         asin(A)
-#define   _IQ5asin(A)         asin(A)
-#define   _IQ4asin(A)         asin(A)
-#define   _IQ3asin(A)         asin(A)
-#define   _IQ2asin(A)         asin(A)
-#define   _IQ1asin(A)         asin(A)
-//---------------------------------------------------------------------------
-#define   _IQcos(A)           cos(A)
-#define   _IQ30cos(A)         cos(A)
-#define   _IQ29cos(A)         cos(A)
-#define   _IQ28cos(A)         cos(A)
-#define   _IQ27cos(A)         cos(A)
-#define   _IQ26cos(A)         cos(A)
-#define   _IQ25cos(A)         cos(A)
-#define   _IQ24cos(A)         cos(A)
-#define   _IQ23cos(A)         cos(A)
-#define   _IQ22cos(A)         cos(A)
-#define   _IQ21cos(A)         cos(A)
-#define   _IQ20cos(A)         cos(A)
-#define   _IQ19cos(A)         cos(A)
-#define   _IQ18cos(A)         cos(A)
-#define   _IQ17cos(A)         cos(A)
-#define   _IQ16cos(A)         cos(A)
-#define   _IQ15cos(A)         cos(A)
-#define   _IQ14cos(A)         cos(A)
-#define   _IQ13cos(A)         cos(A)
-#define   _IQ12cos(A)         cos(A)
-#define   _IQ11cos(A)         cos(A)
-#define   _IQ10cos(A)         cos(A)
-#define   _IQ9cos(A)          cos(A)
-#define   _IQ8cos(A)          cos(A)
-#define   _IQ7cos(A)          cos(A)
-#define   _IQ6cos(A)          cos(A)
-#define   _IQ5cos(A)          cos(A)
-#define   _IQ4cos(A)          cos(A)
-#define   _IQ3cos(A)          cos(A)
-#define   _IQ2cos(A)          cos(A)
-#define   _IQ1cos(A)          cos(A)
-//---------------------------------------------------------------------------
-#define   _IQcosPU(A)         cos((A)*6.283185307)
-#define   _IQ30cosPU(A)       cos((A)*6.283185307)
-#define   _IQ29cosPU(A)       cos((A)*6.283185307)
-#define   _IQ28cosPU(A)       cos((A)*6.283185307)
-#define   _IQ27cosPU(A)       cos((A)*6.283185307)
-#define   _IQ26cosPU(A)       cos((A)*6.283185307)
-#define   _IQ25cosPU(A)       cos((A)*6.283185307)
-#define   _IQ24cosPU(A)       cos((A)*6.283185307)
-#define   _IQ23cosPU(A)       cos((A)*6.283185307)
-#define   _IQ22cosPU(A)       cos((A)*6.283185307)
-#define   _IQ21cosPU(A)       cos((A)*6.283185307)
-#define   _IQ20cosPU(A)       cos((A)*6.283185307)
-#define   _IQ19cosPU(A)       cos((A)*6.283185307)
-#define   _IQ18cosPU(A)       cos((A)*6.283185307)
-#define   _IQ17cosPU(A)       cos((A)*6.283185307)
-#define   _IQ16cosPU(A)       cos((A)*6.283185307)
-#define   _IQ15cosPU(A)       cos((A)*6.283185307)
-#define   _IQ14cosPU(A)       cos((A)*6.283185307)
-#define   _IQ13cosPU(A)       cos((A)*6.283185307)
-#define   _IQ12cosPU(A)       cos((A)*6.283185307)
-#define   _IQ11cosPU(A)       cos((A)*6.283185307)
-#define   _IQ10cosPU(A)       cos((A)*6.283185307)
-#define   _IQ9cosPU(A)        cos((A)*6.283185307)
-#define   _IQ8cosPU(A)        cos((A)*6.283185307)
-#define   _IQ7cosPU(A)        cos((A)*6.283185307)
-#define   _IQ6cosPU(A)        cos((A)*6.283185307)
-#define   _IQ5cosPU(A)        cos((A)*6.283185307)
-#define   _IQ4cosPU(A)        cos((A)*6.283185307)
-#define   _IQ3cosPU(A)        cos((A)*6.283185307)
-#define   _IQ2cosPU(A)        cos((A)*6.283185307)
-#define   _IQ1cosPU(A)        cos((A)*6.283185307)
-//---------------------------------------------------------------------------
-#define   _IQacos(A)          acos(A)
-#define   _IQ29acos(A)        acos(A)
-#define   _IQ28acos(A)        acos(A)
-#define   _IQ27acos(A)        acos(A)
-#define   _IQ26acos(A)        acos(A)
-#define   _IQ25acos(A)        acos(A)
-#define   _IQ24acos(A)        acos(A)
-#define   _IQ23acos(A)        acos(A)
-#define   _IQ22acos(A)        acos(A)
-#define   _IQ21acos(A)        acos(A)
-#define   _IQ20acos(A)        acos(A)
-#define   _IQ19acos(A)        acos(A)
-#define   _IQ18acos(A)        acos(A)
-#define   _IQ17acos(A)        acos(A)
-#define   _IQ16acos(A)        acos(A)
-#define   _IQ15acos(A)        acos(A)
-#define   _IQ14acos(A)        acos(A)
-#define   _IQ13acos(A)        acos(A)
-#define   _IQ12acos(A)        acos(A)
-#define   _IQ11acos(A)        acos(A)
-#define   _IQ10acos(A)        acos(A)
-#define   _IQ9acos(A)         acos(A)
-#define   _IQ8acos(A)         acos(A)
-#define   _IQ7acos(A)         acos(A)
-#define   _IQ6acos(A)         acos(A)
-#define   _IQ5acos(A)         acos(A)
-#define   _IQ4acos(A)         acos(A)
-#define   _IQ3acos(A)         acos(A)
-#define   _IQ2acos(A)         acos(A)
-#define   _IQ1acos(A)         acos(A)
-//---------------------------------------------------------------------------
-#define   _IQatan(A)          atan(A)
-#define   _IQ30atan(A)        atan(A)
-#define   _IQ29atan(A)        atan(A)
-#define   _IQ28atan(A)        atan(A)
-#define   _IQ27atan(A)        atan(A)
-#define   _IQ26atan(A)        atan(A)
-#define   _IQ25atan(A)        atan(A)
-#define   _IQ24atan(A)        atan(A)
-#define   _IQ23atan(A)        atan(A)
-#define   _IQ22atan(A)        atan(A)
-#define   _IQ21atan(A)        atan(A)
-#define   _IQ20atan(A)        atan(A)
-#define   _IQ19atan(A)        atan(A)
-#define   _IQ18atan(A)        atan(A)
-#define   _IQ17atan(A)        atan(A)
-#define   _IQ16atan(A)        atan(A)
-#define   _IQ15atan(A)        atan(A)
-#define   _IQ14atan(A)        atan(A)
-#define   _IQ13atan(A)        atan(A)
-#define   _IQ12atan(A)        atan(A)
-#define   _IQ11atan(A)        atan(A)
-#define   _IQ10atan(A)        atan(A)
-#define   _IQ9atan(A)         atan(A)
-#define   _IQ8atan(A)         atan(A)
-#define   _IQ7atan(A)         atan(A)
-#define   _IQ6atan(A)         atan(A)
-#define   _IQ5atan(A)         atan(A)
-#define   _IQ4atan(A)         atan(A)
-#define   _IQ3atan(A)         atan(A)
-#define   _IQ2atan(A)         atan(A)
-#define   _IQ1atan(A)         atan(A)
-//---------------------------------------------------------------------------
-#define   _IQatan2(A,B)       atan2(A,B)
-#define   _IQ30atan2(A,B)     atan2(A,B)
-#define   _IQ29atan2(A,B)     atan2(A,B)
-#define   _IQ28atan2(A,B)     atan2(A,B)
-#define   _IQ27atan2(A,B)     atan2(A,B)
-#define   _IQ26atan2(A,B)     atan2(A,B)
-#define   _IQ25atan2(A,B)     atan2(A,B)
-#define   _IQ24atan2(A,B)     atan2(A,B)
-#define   _IQ23atan2(A,B)     atan2(A,B)
-#define   _IQ22atan2(A,B)     atan2(A,B)
-#define   _IQ21atan2(A,B)     atan2(A,B)
-#define   _IQ20atan2(A,B)     atan2(A,B)
-#define   _IQ19atan2(A,B)     atan2(A,B)
-#define   _IQ18atan2(A,B)     atan2(A,B)
-#define   _IQ17atan2(A,B)     atan2(A,B)
-#define   _IQ16atan2(A,B)     atan2(A,B)
-#define   _IQ15atan2(A,B)     atan2(A,B)
-#define   _IQ14atan2(A,B)     atan2(A,B)
-#define   _IQ13atan2(A,B)     atan2(A,B)
-#define   _IQ12atan2(A,B)     atan2(A,B)
-#define   _IQ11atan2(A,B)     atan2(A,B)
-#define   _IQ10atan2(A,B)     atan2(A,B)
-#define   _IQ9atan2(A,B)      atan2(A,B)
-#define   _IQ8atan2(A,B)      atan2(A,B)
-#define   _IQ7atan2(A,B)      atan2(A,B)
-#define   _IQ6atan2(A,B)      atan2(A,B)
-#define   _IQ5atan2(A,B)      atan2(A,B)
-#define   _IQ4atan2(A,B)      atan2(A,B)
-#define   _IQ3atan2(A,B)      atan2(A,B)
-#define   _IQ2atan2(A,B)      atan2(A,B)
-#define   _IQ1atan2(A,B)      atan2(A,B)
-//---------------------------------------------------------------------------
-#define   _IQatan2PU(A,B)     ((atan2(A,B)*(1.0/6.283185307)) >= 0.0 ? (atan2(A,B)*(1.0/6.283185307)):1.0 + (atan2(A,B)*(1.0/6.283185307)))
-#define   _IQ30atan2PU(A,B)   ((atan2(A,B)*(1.0/6.283185307)) >= 0.0 ? (atan2(A,B)*(1.0/6.283185307)):1.0 + (atan2(A,B)*(1.0/6.283185307)))
-#define   _IQ29atan2PU(A,B)   ((atan2(A,B)*(1.0/6.283185307)) >= 0.0 ? (atan2(A,B)*(1.0/6.283185307)):1.0 + (atan2(A,B)*(1.0/6.283185307)))
-#define   _IQ28atan2PU(A,B)   ((atan2(A,B)*(1.0/6.283185307)) >= 0.0 ? (atan2(A,B)*(1.0/6.283185307)):1.0 + (atan2(A,B)*(1.0/6.283185307)))
-#define   _IQ27atan2PU(A,B)   ((atan2(A,B)*(1.0/6.283185307)) >= 0.0 ? (atan2(A,B)*(1.0/6.283185307)):1.0 + (atan2(A,B)*(1.0/6.283185307)))
-#define   _IQ26atan2PU(A,B)   ((atan2(A,B)*(1.0/6.283185307)) >= 0.0 ? (atan2(A,B)*(1.0/6.283185307)):1.0 + (atan2(A,B)*(1.0/6.283185307)))
-#define   _IQ25atan2PU(A,B)   ((atan2(A,B)*(1.0/6.283185307)) >= 0.0 ? (atan2(A,B)*(1.0/6.283185307)):1.0 + (atan2(A,B)*(1.0/6.283185307)))
-#define   _IQ24atan2PU(A,B)   ((atan2(A,B)*(1.0/6.283185307)) >= 0.0 ? (atan2(A,B)*(1.0/6.283185307)):1.0 + (atan2(A,B)*(1.0/6.283185307)))
-#define   _IQ23atan2PU(A,B)   ((atan2(A,B)*(1.0/6.283185307)) >= 0.0 ? (atan2(A,B)*(1.0/6.283185307)):1.0 + (atan2(A,B)*(1.0/6.283185307)))
-#define   _IQ22atan2PU(A,B)   ((atan2(A,B)*(1.0/6.283185307)) >= 0.0 ? (atan2(A,B)*(1.0/6.283185307)):1.0 + (atan2(A,B)*(1.0/6.283185307)))
-#define   _IQ21atan2PU(A,B)   ((atan2(A,B)*(1.0/6.283185307)) >= 0.0 ? (atan2(A,B)*(1.0/6.283185307)):1.0 + (atan2(A,B)*(1.0/6.283185307)))
-#define   _IQ20atan2PU(A,B)   ((atan2(A,B)*(1.0/6.283185307)) >= 0.0 ? (atan2(A,B)*(1.0/6.283185307)):1.0 + (atan2(A,B)*(1.0/6.283185307)))
-#define   _IQ19atan2PU(A,B)   ((atan2(A,B)*(1.0/6.283185307)) >= 0.0 ? (atan2(A,B)*(1.0/6.283185307)):1.0 + (atan2(A,B)*(1.0/6.283185307)))
-#define   _IQ18atan2PU(A,B)   ((atan2(A,B)*(1.0/6.283185307)) >= 0.0 ? (atan2(A,B)*(1.0/6.283185307)):1.0 + (atan2(A,B)*(1.0/6.283185307)))
-#define   _IQ17atan2PU(A,B)   ((atan2(A,B)*(1.0/6.283185307)) >= 0.0 ? (atan2(A,B)*(1.0/6.283185307)):1.0 + (atan2(A,B)*(1.0/6.283185307)))
-#define   _IQ16atan2PU(A,B)   ((atan2(A,B)*(1.0/6.283185307)) >= 0.0 ? (atan2(A,B)*(1.0/6.283185307)):1.0 + (atan2(A,B)*(1.0/6.283185307)))
-#define   _IQ15atan2PU(A,B)   ((atan2(A,B)*(1.0/6.283185307)) >= 0.0 ? (atan2(A,B)*(1.0/6.283185307)):1.0 + (atan2(A,B)*(1.0/6.283185307)))
-#define   _IQ14atan2PU(A,B)   ((atan2(A,B)*(1.0/6.283185307)) >= 0.0 ? (atan2(A,B)*(1.0/6.283185307)):1.0 + (atan2(A,B)*(1.0/6.283185307)))
-#define   _IQ13atan2PU(A,B)   ((atan2(A,B)*(1.0/6.283185307)) >= 0.0 ? (atan2(A,B)*(1.0/6.283185307)):1.0 + (atan2(A,B)*(1.0/6.283185307)))
-#define   _IQ12atan2PU(A,B)   ((atan2(A,B)*(1.0/6.283185307)) >= 0.0 ? (atan2(A,B)*(1.0/6.283185307)):1.0 + (atan2(A,B)*(1.0/6.283185307)))
-#define   _IQ11atan2PU(A,B)   ((atan2(A,B)*(1.0/6.283185307)) >= 0.0 ? (atan2(A,B)*(1.0/6.283185307)):1.0 + (atan2(A,B)*(1.0/6.283185307)))
-#define   _IQ10atan2PU(A,B)   ((atan2(A,B)*(1.0/6.283185307)) >= 0.0 ? (atan2(A,B)*(1.0/6.283185307)):1.0 + (atan2(A,B)*(1.0/6.283185307)))
-#define   _IQ9atan2PU(A,B)    ((atan2(A,B)*(1.0/6.283185307)) >= 0.0 ? (atan2(A,B)*(1.0/6.283185307)):1.0 + (atan2(A,B)*(1.0/6.283185307)))
-#define   _IQ8atan2PU(A,B)    ((atan2(A,B)*(1.0/6.283185307)) >= 0.0 ? (atan2(A,B)*(1.0/6.283185307)):1.0 + (atan2(A,B)*(1.0/6.283185307)))
-#define   _IQ7atan2PU(A,B)    ((atan2(A,B)*(1.0/6.283185307)) >= 0.0 ? (atan2(A,B)*(1.0/6.283185307)):1.0 + (atan2(A,B)*(1.0/6.283185307)))
-#define   _IQ6atan2PU(A,B)    ((atan2(A,B)*(1.0/6.283185307)) >= 0.0 ? (atan2(A,B)*(1.0/6.283185307)):1.0 + (atan2(A,B)*(1.0/6.283185307)))
-#define   _IQ5atan2PU(A,B)    ((atan2(A,B)*(1.0/6.283185307)) >= 0.0 ? (atan2(A,B)*(1.0/6.283185307)):1.0 + (atan2(A,B)*(1.0/6.283185307)))
-#define   _IQ4atan2PU(A,B)    ((atan2(A,B)*(1.0/6.283185307)) >= 0.0 ? (atan2(A,B)*(1.0/6.283185307)):1.0 + (atan2(A,B)*(1.0/6.283185307)))
-#define   _IQ3atan2PU(A,B)    ((atan2(A,B)*(1.0/6.283185307)) >= 0.0 ? (atan2(A,B)*(1.0/6.283185307)):1.0 + (atan2(A,B)*(1.0/6.283185307)))
-#define   _IQ2atan2PU(A,B)    ((atan2(A,B)*(1.0/6.283185307)) >= 0.0 ? (atan2(A,B)*(1.0/6.283185307)):1.0 + (atan2(A,B)*(1.0/6.283185307)))
-#define   _IQ1atan2PU(A,B)    ((atan2(A,B)*(1.0/6.283185307)) >= 0.0 ? (atan2(A,B)*(1.0/6.283185307)):1.0 + (atan2(A,B)*(1.0/6.283185307)))
-//---------------------------------------------------------------------------
-#define   _IQsqrt(A)          sqrt(A)
-#define   _IQ30sqrt(A)        sqrt(A)
-#define   _IQ29sqrt(A)        sqrt(A)
-#define   _IQ28sqrt(A)        sqrt(A)
-#define   _IQ27sqrt(A)        sqrt(A)
-#define   _IQ26sqrt(A)        sqrt(A)
-#define   _IQ25sqrt(A)        sqrt(A)
-#define   _IQ24sqrt(A)        sqrt(A)
-#define   _IQ23sqrt(A)        sqrt(A)
-#define   _IQ22sqrt(A)        sqrt(A)
-#define   _IQ21sqrt(A)        sqrt(A)
-#define   _IQ20sqrt(A)        sqrt(A)
-#define   _IQ19sqrt(A)        sqrt(A)
-#define   _IQ18sqrt(A)        sqrt(A)
-#define   _IQ17sqrt(A)        sqrt(A)
-#define   _IQ16sqrt(A)        sqrt(A)
-#define   _IQ15sqrt(A)        sqrt(A)
-#define   _IQ14sqrt(A)        sqrt(A)
-#define   _IQ13sqrt(A)        sqrt(A)
-#define   _IQ12sqrt(A)        sqrt(A)
-#define   _IQ11sqrt(A)        sqrt(A)
-#define   _IQ10sqrt(A)        sqrt(A)
-#define   _IQ9sqrt(A)         sqrt(A)
-#define   _IQ8sqrt(A)         sqrt(A)
-#define   _IQ7sqrt(A)         sqrt(A)
-#define   _IQ6sqrt(A)         sqrt(A)
-#define   _IQ5sqrt(A)         sqrt(A)
-#define   _IQ4sqrt(A)         sqrt(A)
-#define   _IQ3sqrt(A)         sqrt(A)
-#define   _IQ2sqrt(A)         sqrt(A)
-#define   _IQ1sqrt(A)         sqrt(A)
-//---------------------------------------------------------------------------
-#define   _IQisqrt(A)         (1.0/sqrt(A))
-#define   _IQ30isqrt(A)       (1.0/sqrt(A))
-#define   _IQ29isqrt(A)       (1.0/sqrt(A))
-#define   _IQ28isqrt(A)       (1.0/sqrt(A))
-#define   _IQ27isqrt(A)       (1.0/sqrt(A))
-#define   _IQ26isqrt(A)       (1.0/sqrt(A))
-#define   _IQ25isqrt(A)       (1.0/sqrt(A))
-#define   _IQ24isqrt(A)       (1.0/sqrt(A))
-#define   _IQ23isqrt(A)       (1.0/sqrt(A))
-#define   _IQ22isqrt(A)       (1.0/sqrt(A))
-#define   _IQ21isqrt(A)       (1.0/sqrt(A))
-#define   _IQ20isqrt(A)       (1.0/sqrt(A))
-#define   _IQ19isqrt(A)       (1.0/sqrt(A))
-#define   _IQ18isqrt(A)       (1.0/sqrt(A))
-#define   _IQ17isqrt(A)       (1.0/sqrt(A))
-#define   _IQ16isqrt(A)       (1.0/sqrt(A))
-#define   _IQ15isqrt(A)       (1.0/sqrt(A))
-#define   _IQ14isqrt(A)       (1.0/sqrt(A))
-#define   _IQ13isqrt(A)       (1.0/sqrt(A))
-#define   _IQ12isqrt(A)       (1.0/sqrt(A))
-#define   _IQ11isqrt(A)       (1.0/sqrt(A))
-#define   _IQ10isqrt(A)       (1.0/sqrt(A))
-#define   _IQ9isqrt(A)        (1.0/sqrt(A))
-#define   _IQ8isqrt(A)        (1.0/sqrt(A))
-#define   _IQ7isqrt(A)        (1.0/sqrt(A))
-#define   _IQ6isqrt(A)        (1.0/sqrt(A))
-#define   _IQ5isqrt(A)        (1.0/sqrt(A))
-#define   _IQ4isqrt(A)        (1.0/sqrt(A))
-#define   _IQ3isqrt(A)        (1.0/sqrt(A))
-#define   _IQ2isqrt(A)        (1.0/sqrt(A))
-#define   _IQ1isqrt(A)        (1.0/sqrt(A))
-//---------------------------------------------------------------------------
-#define   _IQexp(A)           exp(A)
-#define   _IQ30exp(A)         exp(A)
-#define   _IQ29exp(A)         exp(A)
-#define   _IQ28exp(A)         exp(A)
-#define   _IQ27exp(A)         exp(A)
-#define   _IQ26exp(A)         exp(A)
-#define   _IQ25exp(A)         exp(A)
-#define   _IQ24exp(A)         exp(A)
-#define   _IQ23exp(A)         exp(A)
-#define   _IQ22exp(A)         exp(A)
-#define   _IQ21exp(A)         exp(A)
-#define   _IQ20exp(A)         exp(A)
-#define   _IQ19exp(A)         exp(A)
-#define   _IQ18exp(A)         exp(A)
-#define   _IQ17exp(A)         exp(A)
-#define   _IQ16exp(A)         exp(A)
-#define   _IQ15exp(A)         exp(A)
-#define   _IQ14exp(A)         exp(A)
-#define   _IQ13exp(A)         exp(A)
-#define   _IQ12exp(A)         exp(A)
-#define   _IQ11exp(A)         exp(A)
-#define   _IQ10exp(A)         exp(A)
-#define   _IQ9exp(A)          exp(A)
-#define   _IQ8exp(A)          exp(A)
-#define   _IQ7exp(A)          exp(A)
-#define   _IQ6exp(A)          exp(A)
-#define   _IQ5exp(A)          exp(A)
-#define   _IQ4exp(A)          exp(A)
-#define   _IQ3exp(A)          exp(A)
-#define   _IQ2exp(A)          exp(A)
-#define   _IQ1exp(A)          exp(A)
-//---------------------------------------------------------------------------
-#define   _IQint(A)           ((long) (A))
-#define   _IQ30int(A)         ((long) (A))
-#define   _IQ29int(A)         ((long) (A))
-#define   _IQ28int(A)         ((long) (A))
-#define   _IQ27int(A)         ((long) (A))
-#define   _IQ26int(A)         ((long) (A))
-#define   _IQ25int(A)         ((long) (A))
-#define   _IQ24int(A)         ((long) (A))
-#define   _IQ23int(A)         ((long) (A))
-#define   _IQ22int(A)         ((long) (A))
-#define   _IQ21int(A)         ((long) (A))
-#define   _IQ20int(A)         ((long) (A))
-#define   _IQ19int(A)         ((long) (A))
-#define   _IQ18int(A)         ((long) (A))
-#define   _IQ17int(A)         ((long) (A))
-#define   _IQ16int(A)         ((long) (A))
-#define   _IQ15int(A)         ((long) (A))
-#define   _IQ14int(A)         ((long) (A))
-#define   _IQ13int(A)         ((long) (A))
-#define   _IQ12int(A)         ((long) (A))
-#define   _IQ11int(A)         ((long) (A))
-#define   _IQ10int(A)         ((long) (A))
-#define   _IQ9int(A)          ((long) (A))
-#define   _IQ8int(A)          ((long) (A))
-#define   _IQ7int(A)          ((long) (A))
-#define   _IQ6int(A)          ((long) (A))
-#define   _IQ5int(A)          ((long) (A))
-#define   _IQ4int(A)          ((long) (A))
-#define   _IQ3int(A)          ((long) (A))
-#define   _IQ2int(A)          ((long) (A))
-#define   _IQ1int(A)          ((long) (A))
-//---------------------------------------------------------------------------
-#define   _IQfrac(A)          ((A) - (float)((long) (A)))
-#define   _IQ30frac(A)        ((A) - (float)((long) (A)))
-#define   _IQ29frac(A)        ((A) - (float)((long) (A)))
-#define   _IQ28frac(A)        ((A) - (float)((long) (A)))
-#define   _IQ27frac(A)        ((A) - (float)((long) (A)))
-#define   _IQ26frac(A)        ((A) - (float)((long) (A)))
-#define   _IQ25frac(A)        ((A) - (float)((long) (A)))
-#define   _IQ24frac(A)        ((A) - (float)((long) (A)))
-#define   _IQ23frac(A)        ((A) - (float)((long) (A)))
-#define   _IQ22frac(A)        ((A) - (float)((long) (A)))
-#define   _IQ21frac(A)        ((A) - (float)((long) (A)))
-#define   _IQ20frac(A)        ((A) - (float)((long) (A)))
-#define   _IQ19frac(A)        ((A) - (float)((long) (A)))
-#define   _IQ18frac(A)        ((A) - (float)((long) (A)))
-#define   _IQ17frac(A)        ((A) - (float)((long) (A)))
-#define   _IQ16frac(A)        ((A) - (float)((long) (A)))
-#define   _IQ15frac(A)        ((A) - (float)((long) (A)))
-#define   _IQ14frac(A)        ((A) - (float)((long) (A)))
-#define   _IQ13frac(A)        ((A) - (float)((long) (A)))
-#define   _IQ12frac(A)        ((A) - (float)((long) (A)))
-#define   _IQ11frac(A)        ((A) - (float)((long) (A)))
-#define   _IQ10frac(A)        ((A) - (float)((long) (A)))
-#define   _IQ9frac(A)         ((A) - (float)((long) (A)))
-#define   _IQ8frac(A)         ((A) - (float)((long) (A)))
-#define   _IQ7frac(A)         ((A) - (float)((long) (A)))
-#define   _IQ6frac(A)         ((A) - (float)((long) (A)))
-#define   _IQ5frac(A)         ((A) - (float)((long) (A)))
-#define   _IQ4frac(A)         ((A) - (float)((long) (A)))
-#define   _IQ3frac(A)         ((A) - (float)((long) (A)))
-#define   _IQ2frac(A)         ((A) - (float)((long) (A)))
-#define   _IQ1frac(A)         ((A) - (float)((long) (A)))
-//---------------------------------------------------------------------------
-#define   _IQmpyIQX(A, IQA, B, IQB)    ((A)*(B))
-#define   _IQ30mpyIQX(A, IQA, B, IQB)  ((A)*(B))
-#define   _IQ29mpyIQX(A, IQA, B, IQB)  ((A)*(B))
-#define   _IQ28mpyIQX(A, IQA, B, IQB)  ((A)*(B))
-#define   _IQ27mpyIQX(A, IQA, B, IQB)  ((A)*(B))
-#define   _IQ26mpyIQX(A, IQA, B, IQB)  ((A)*(B))
-#define   _IQ25mpyIQX(A, IQA, B, IQB)  ((A)*(B))
-#define   _IQ24mpyIQX(A, IQA, B, IQB)  ((A)*(B))
-#define   _IQ23mpyIQX(A, IQA, B, IQB)  ((A)*(B))
-#define   _IQ22mpyIQX(A, IQA, B, IQB)  ((A)*(B))
-#define   _IQ21mpyIQX(A, IQA, B, IQB)  ((A)*(B))
-#define   _IQ20mpyIQX(A, IQA, B, IQB)  ((A)*(B))
-#define   _IQ19mpyIQX(A, IQA, B, IQB)  ((A)*(B))
-#define   _IQ18mpyIQX(A, IQA, B, IQB)  ((A)*(B))
-#define   _IQ17mpyIQX(A, IQA, B, IQB)  ((A)*(B))
-#define   _IQ16mpyIQX(A, IQA, B, IQB)  ((A)*(B))
-#define   _IQ15mpyIQX(A, IQA, B, IQB)  ((A)*(B))
-#define   _IQ14mpyIQX(A, IQA, B, IQB)  ((A)*(B))
-#define   _IQ13mpyIQX(A, IQA, B, IQB)  ((A)*(B))
-#define   _IQ12mpyIQX(A, IQA, B, IQB)  ((A)*(B))
-#define   _IQ11mpyIQX(A, IQA, B, IQB)  ((A)*(B))
-#define   _IQ10mpyIQX(A, IQA, B, IQB)  ((A)*(B))
-#define   _IQ9mpyIQX(A, IQA, B, IQB)   ((A)*(B))
-#define   _IQ8mpyIQX(A, IQA, B, IQB)   ((A)*(B))
-#define   _IQ7mpyIQX(A, IQA, B, IQB)   ((A)*(B))
-#define   _IQ6mpyIQX(A, IQA, B, IQB)   ((A)*(B))
-#define   _IQ5mpyIQX(A, IQA, B, IQB)   ((A)*(B))
-#define   _IQ4mpyIQX(A, IQA, B, IQB)   ((A)*(B))
-#define   _IQ3mpyIQX(A, IQA, B, IQB)   ((A)*(B))
-#define   _IQ2mpyIQX(A, IQA, B, IQB)   ((A)*(B))
-#define   _IQ1mpyIQX(A, IQA, B, IQB)   ((A)*(B))
-//---------------------------------------------------------------------------
-#define   _IQmpyI32(A,B)      ((A) * (float) (B))
-#define   _IQ30mpyI32(A,B)    ((A) * (float) (B))
-#define   _IQ29mpyI32(A,B)    ((A) * (float) (B))
-#define   _IQ28mpyI32(A,B)    ((A) * (float) (B))
-#define   _IQ27mpyI32(A,B)    ((A) * (float) (B))
-#define   _IQ26mpyI32(A,B)    ((A) * (float) (B))
-#define   _IQ25mpyI32(A,B)    ((A) * (float) (B))
-#define   _IQ24mpyI32(A,B)    ((A) * (float) (B))
-#define   _IQ23mpyI32(A,B)    ((A) * (float) (B))
-#define   _IQ22mpyI32(A,B)    ((A) * (float) (B))
-#define   _IQ21mpyI32(A,B)    ((A) * (float) (B))
-#define   _IQ20mpyI32(A,B)    ((A) * (float) (B))
-#define   _IQ19mpyI32(A,B)    ((A) * (float) (B))
-#define   _IQ18mpyI32(A,B)    ((A) * (float) (B))
-#define   _IQ17mpyI32(A,B)    ((A) * (float) (B))
-#define   _IQ16mpyI32(A,B)    ((A) * (float) (B))
-#define   _IQ15mpyI32(A,B)    ((A) * (float) (B))
-#define   _IQ14mpyI32(A,B)    ((A) * (float) (B))
-#define   _IQ13mpyI32(A,B)    ((A) * (float) (B))
-#define   _IQ12mpyI32(A,B)    ((A) * (float) (B))
-#define   _IQ11mpyI32(A,B)    ((A) * (float) (B))
-#define   _IQ10mpyI32(A,B)    ((A) * (float) (B))
-#define   _IQ9mpyI32(A,B)     ((A) * (float) (B))
-#define   _IQ8mpyI32(A,B)     ((A) * (float) (B))
-#define   _IQ7mpyI32(A,B)     ((A) * (float) (B))
-#define   _IQ6mpyI32(A,B)     ((A) * (float) (B))
-#define   _IQ5mpyI32(A,B)     ((A) * (float) (B))
-#define   _IQ4mpyI32(A,B)     ((A) * (float) (B))
-#define   _IQ3mpyI32(A,B)     ((A) * (float) (B))
-#define   _IQ2mpyI32(A,B)     ((A) * (float) (B))
-#define   _IQ1mpyI32(A,B)     ((A) * (float) (B))
-//---------------------------------------------------------------------------
-#define   _IQmpyI32int(A,B)   ((long) ((A) * (float) (B)))
-#define   _IQ30mpyI32int(A,B) ((long) ((A) * (float) (B)))
-#define   _IQ29mpyI32int(A,B) ((long) ((A) * (float) (B)))
-#define   _IQ28mpyI32int(A,B) ((long) ((A) * (float) (B)))
-#define   _IQ27mpyI32int(A,B) ((long) ((A) * (float) (B)))
-#define   _IQ26mpyI32int(A,B) ((long) ((A) * (float) (B)))
-#define   _IQ25mpyI32int(A,B) ((long) ((A) * (float) (B)))
-#define   _IQ24mpyI32int(A,B) ((long) ((A) * (float) (B)))
-#define   _IQ23mpyI32int(A,B) ((long) ((A) * (float) (B)))
-#define   _IQ22mpyI32int(A,B) ((long) ((A) * (float) (B)))
-#define   _IQ21mpyI32int(A,B) ((long) ((A) * (float) (B)))
-#define   _IQ20mpyI32int(A,B) ((long) ((A) * (float) (B)))
-#define   _IQ19mpyI32int(A,B) ((long) ((A) * (float) (B)))
-#define   _IQ18mpyI32int(A,B) ((long) ((A) * (float) (B)))
-#define   _IQ17mpyI32int(A,B) ((long) ((A) * (float) (B)))
-#define   _IQ16mpyI32int(A,B) ((long) ((A) * (float) (B)))
-#define   _IQ15mpyI32int(A,B) ((long) ((A) * (float) (B)))
-#define   _IQ14mpyI32int(A,B) ((long) ((A) * (float) (B)))
-#define   _IQ13mpyI32int(A,B) ((long) ((A) * (float) (B)))
-#define   _IQ12mpyI32int(A,B) ((long) ((A) * (float) (B)))
-#define   _IQ11mpyI32int(A,B) ((long) ((A) * (float) (B)))
-#define   _IQ10mpyI32int(A,B) ((long) ((A) * (float) (B)))
-#define   _IQ9mpyI32int(A,B)  ((long) ((A) * (float) (B)))
-#define   _IQ8mpyI32int(A,B)  ((long) ((A) * (float) (B)))
-#define   _IQ7mpyI32int(A,B)  ((long) ((A) * (float) (B)))
-#define   _IQ6mpyI32int(A,B)  ((long) ((A) * (float) (B)))
-#define   _IQ5mpyI32int(A,B)  ((long) ((A) * (float) (B)))
-#define   _IQ4mpyI32int(A,B)  ((long) ((A) * (float) (B)))
-#define   _IQ3mpyI32int(A,B)  ((long) ((A) * (float) (B)))
-#define   _IQ2mpyI32int(A,B)  ((long) ((A) * (float) (B)))
-#define   _IQ1mpyI32int(A,B)  ((long) ((A) * (float) (B)))
-//---------------------------------------------------------------------------
-#define   _IQmpyI32frac(A,B)    ((A) - (float)((long) ((A) * (float) (B))))
-#define   _IQ30mpyI32frac(A,B)  ((A) - (float)((long) ((A) * (float) (B))))
-#define   _IQ29mpyI32frac(A,B)  ((A) - (float)((long) ((A) * (float) (B))))
-#define   _IQ28mpyI32frac(A,B)  ((A) - (float)((long) ((A) * (float) (B))))
-#define   _IQ27mpyI32frac(A,B)  ((A) - (float)((long) ((A) * (float) (B))))
-#define   _IQ26mpyI32frac(A,B)  ((A) - (float)((long) ((A) * (float) (B))))
-#define   _IQ25mpyI32frac(A,B)  ((A) - (float)((long) ((A) * (float) (B))))
-#define   _IQ24mpyI32frac(A,B)  ((A) - (float)((long) ((A) * (float) (B))))
-#define   _IQ23mpyI32frac(A,B)  ((A) - (float)((long) ((A) * (float) (B))))
-#define   _IQ22mpyI32frac(A,B)  ((A) - (float)((long) ((A) * (float) (B))))
-#define   _IQ21mpyI32frac(A,B)  ((A) - (float)((long) ((A) * (float) (B))))
-#define   _IQ20mpyI32frac(A,B)  ((A) - (float)((long) ((A) * (float) (B))))
-#define   _IQ19mpyI32frac(A,B)  ((A) - (float)((long) ((A) * (float) (B))))
-#define   _IQ18mpyI32frac(A,B)  ((A) - (float)((long) ((A) * (float) (B))))
-#define   _IQ17mpyI32frac(A,B)  ((A) - (float)((long) ((A) * (float) (B))))
-#define   _IQ16mpyI32frac(A,B)  ((A) - (float)((long) ((A) * (float) (B))))
-#define   _IQ15mpyI32frac(A,B)  ((A) - (float)((long) ((A) * (float) (B))))
-#define   _IQ14mpyI32frac(A,B)  ((A) - (float)((long) ((A) * (float) (B))))
-#define   _IQ13mpyI32frac(A,B)  ((A) - (float)((long) ((A) * (float) (B))))
-#define   _IQ12mpyI32frac(A,B)  ((A) - (float)((long) ((A) * (float) (B))))
-#define   _IQ11mpyI32frac(A,B)  ((A) - (float)((long) ((A) * (float) (B))))
-#define   _IQ10mpyI32frac(A,B)  ((A) - (float)((long) ((A) * (float) (B))))
-#define   _IQ9mpyI32frac(A,B)   ((A) - (float)((long) ((A) * (float) (B))))
-#define   _IQ8mpyI32frac(A,B)   ((A) - (float)((long) ((A) * (float) (B))))
-#define   _IQ7mpyI32frac(A,B)   ((A) - (float)((long) ((A) * (float) (B))))
-#define   _IQ6mpyI32frac(A,B)   ((A) - (float)((long) ((A) * (float) (B))))
-#define   _IQ5mpyI32frac(A,B)   ((A) - (float)((long) ((A) * (float) (B))))
-#define   _IQ4mpyI32frac(A,B)   ((A) - (float)((long) ((A) * (float) (B))))
-#define   _IQ3mpyI32frac(A,B)   ((A) - (float)((long) ((A) * (float) (B))))
-#define   _IQ2mpyI32frac(A,B)   ((A) - (float)((long) ((A) * (float) (B))))
-#define   _IQ1mpyI32frac(A,B)   ((A) - (float)((long) ((A) * (float) (B))))
-//---------------------------------------------------------------------------
-#define   _IQmag(A,B)         sqrt((A)*(A) + (B)*(B))
-#define   _IQ30mag(A,B)       sqrt((A)*(A) + (B)*(B))
-#define   _IQ29mag(A,B)       sqrt((A)*(A) + (B)*(B))
-#define   _IQ28mag(A,B)       sqrt((A)*(A) + (B)*(B))
-#define   _IQ27mag(A,B)       sqrt((A)*(A) + (B)*(B))
-#define   _IQ26mag(A,B)       sqrt((A)*(A) + (B)*(B))
-#define   _IQ25mag(A,B)       sqrt((A)*(A) + (B)*(B))
-#define   _IQ24mag(A,B)       sqrt((A)*(A) + (B)*(B))
-#define   _IQ23mag(A,B)       sqrt((A)*(A) + (B)*(B))
-#define   _IQ22mag(A,B)       sqrt((A)*(A) + (B)*(B))
-#define   _IQ21mag(A,B)       sqrt((A)*(A) + (B)*(B))
-#define   _IQ20mag(A,B)       sqrt((A)*(A) + (B)*(B))
-#define   _IQ19mag(A,B)       sqrt((A)*(A) + (B)*(B))
-#define   _IQ18mag(A,B)       sqrt((A)*(A) + (B)*(B))
-#define   _IQ17mag(A,B)       sqrt((A)*(A) + (B)*(B))
-#define   _IQ16mag(A,B)       sqrt((A)*(A) + (B)*(B))
-#define   _IQ15mag(A,B)       sqrt((A)*(A) + (B)*(B))
-#define   _IQ14mag(A,B)       sqrt((A)*(A) + (B)*(B))
-#define   _IQ13mag(A,B)       sqrt((A)*(A) + (B)*(B))
-#define   _IQ12mag(A,B)       sqrt((A)*(A) + (B)*(B))
-#define   _IQ11mag(A,B)       sqrt((A)*(A) + (B)*(B))
-#define   _IQ10mag(A,B)       sqrt((A)*(A) + (B)*(B))
-#define   _IQ9mag(A,B)        sqrt((A)*(A) + (B)*(B))
-#define   _IQ8mag(A,B)        sqrt((A)*(A) + (B)*(B))
-#define   _IQ7mag(A,B)        sqrt((A)*(A) + (B)*(B))
-#define   _IQ6mag(A,B)        sqrt((A)*(A) + (B)*(B))
-#define   _IQ5mag(A,B)        sqrt((A)*(A) + (B)*(B))
-#define   _IQ4mag(A,B)        sqrt((A)*(A) + (B)*(B))
-#define   _IQ3mag(A,B)        sqrt((A)*(A) + (B)*(B))
-#define   _IQ2mag(A,B)        sqrt((A)*(A) + (B)*(B))
-#define   _IQ1mag(A,B)        sqrt((A)*(A) + (B)*(B))
-//---------------------------------------------------------------------------
-#define   _atoIQ(A)           atof(A)
-#define   _atoIQ30(A)         atof(A)
-#define   _atoIQ29(A)         atof(A)
-#define   _atoIQ28(A)         atof(A)
-#define   _atoIQ27(A)         atof(A)
-#define   _atoIQ26(A)         atof(A)
-#define   _atoIQ25(A)         atof(A)
-#define   _atoIQ24(A)         atof(A)
-#define   _atoIQ23(A)         atof(A)
-#define   _atoIQ22(A)         atof(A)
-#define   _atoIQ21(A)         atof(A)
-#define   _atoIQ20(A)         atof(A)
-#define   _atoIQ19(A)         atof(A)
-#define   _atoIQ18(A)         atof(A)
-#define   _atoIQ17(A)         atof(A)
-#define   _atoIQ16(A)         atof(A)
-#define   _atoIQ15(A)         atof(A)
-#define   _atoIQ14(A)         atof(A)
-#define   _atoIQ13(A)         atof(A)
-#define   _atoIQ12(A)         atof(A)
-#define   _atoIQ11(A)         atof(A)
-#define   _atoIQ10(A)         atof(A)
-#define   _atoIQ9(A)          atof(A)
-#define   _atoIQ8(A)          atof(A)
-#define   _atoIQ7(A)          atof(A)
-#define   _atoIQ6(A)          atof(A)
-#define   _atoIQ5(A)          atof(A)
-#define   _atoIQ4(A)          atof(A)
-#define   _atoIQ3(A)          atof(A)
-#define   _atoIQ2(A)          atof(A)
-#define   _atoIQ1(A)          atof(A)
-//---------------------------------------------------------------------------
-#define   _IQtoa(A, B, C)     sprintf(A, B, C)
-#define   _IQ30toa(A, B, C)   sprintf(A, B, C)
-#define   _IQ29toa(A, B, C)   sprintf(A, B, C)
-#define   _IQ28toa(A, B, C)   sprintf(A, B, C)
-#define   _IQ27toa(A, B, C)   sprintf(A, B, C)
-#define   _IQ26toa(A, B, C)   sprintf(A, B, C)
-#define   _IQ25toa(A, B, C)   sprintf(A, B, C)
-#define   _IQ24toa(A, B, C)   sprintf(A, B, C)
-#define   _IQ23toa(A, B, C)   sprintf(A, B, C)
-#define   _IQ22toa(A, B, C)   sprintf(A, B, C)
-#define   _IQ21toa(A, B, C)   sprintf(A, B, C)
-#define   _IQ20toa(A, B, C)   sprintf(A, B, C)
-#define   _IQ19toa(A, B, C)   sprintf(A, B, C)
-#define   _IQ18toa(A, B, C)   sprintf(A, B, C)
-#define   _IQ17toa(A, B, C)   sprintf(A, B, C)
-#define   _IQ16toa(A, B, C)   sprintf(A, B, C)
-#define   _IQ15toa(A, B, C)   sprintf(A, B, C)
-#define   _IQ14toa(A, B, C)   sprintf(A, B, C)
-#define   _IQ13toa(A, B, C)   sprintf(A, B, C)
-#define   _IQ12toa(A, B, C)   sprintf(A, B, C)
-#define   _IQ11toa(A, B, C)   sprintf(A, B, C)
-#define   _IQ10toa(A, B, C)   sprintf(A, B, C)
-#define   _IQ9toa(A, B, C)    sprintf(A, B, C)
-#define   _IQ8toa(A, B, C)    sprintf(A, B, C)
-#define   _IQ7toa(A, B, C)    sprintf(A, B, C)
-#define   _IQ6toa(A, B, C)    sprintf(A, B, C)
-#define   _IQ5toa(A, B, C)    sprintf(A, B, C)
-#define   _IQ4toa(A, B, C)    sprintf(A, B, C)
-#define   _IQ3toa(A, B, C)    sprintf(A, B, C)
-#define   _IQ2toa(A, B, C)    sprintf(A, B, C)
-#define   _IQ1toa(A, B, C)    sprintf(A, B, C)
-//---------------------------------------------------------------------------
-#define   _IQabs(A)    fabs(A)
-#define   _IQ30abs(A)  fabs(A)
-#define   _IQ29abs(A)  fabs(A)
-#define   _IQ28abs(A)  fabs(A)
-#define   _IQ27abs(A)  fabs(A)
-#define   _IQ26abs(A)  fabs(A)
-#define   _IQ25abs(A)  fabs(A)
-#define   _IQ24abs(A)  fabs(A)
-#define   _IQ23abs(A)  fabs(A)
-#define   _IQ22abs(A)  fabs(A)
-#define   _IQ21abs(A)  fabs(A)
-#define   _IQ20abs(A)  fabs(A)
-#define   _IQ19abs(A)  fabs(A)
-#define   _IQ18abs(A)  fabs(A)
-#define   _IQ17abs(A)  fabs(A)
-#define   _IQ16abs(A)  fabs(A)
-#define   _IQ15abs(A)  fabs(A)
-#define   _IQ14abs(A)  fabs(A)
-#define   _IQ13abs(A)  fabs(A)
-#define   _IQ12abs(A)  fabs(A)
-#define   _IQ11abs(A)  fabs(A)
-#define   _IQ10abs(A)  fabs(A)
-#define   _IQ9abs(A)   fabs(A)
-#define   _IQ8abs(A)   fabs(A)
-#define   _IQ7abs(A)   fabs(A)
-#define   _IQ6abs(A)   fabs(A)
-#define   _IQ5abs(A)   fabs(A)
-#define   _IQ4abs(A)   fabs(A)
-#define   _IQ3abs(A)   fabs(A)
-#define   _IQ2abs(A)   fabs(A)
-#define   _IQ1abs(A)   fabs(A)
-//###########################################################################
-#endif  // No more.
-//###########################################################################
-
-#endif /* __IQMATHLIB_H_INCLUDED__ */
diff --git a/Source/External/v120/DSP2833x_common/include/SFO.h b/Source/External/v120/DSP2833x_common/include/SFO.h
deleted file mode 100644
index f698526..0000000
--- a/Source/External/v120/DSP2833x_common/include/SFO.h
+++ /dev/null
@@ -1,52 +0,0 @@
-//###########################################################################
-//
-// FILE:   SFO.H
-//
-// TITLE:  Scale Factor Optimizer Library Interface Header
-//
-//
-//###########################################################################
-//
-//  Ver | dd mmm yyyy | Who  | Description of changes
-// =====|=============|======|===============================================
-//  0.01| 09 Jan 2004 | TI   | New module
-//###########################################################################
-
-
-//============================================================================
-// Description:		This header provides the function call interface
-// 			for the scale factor optimizer for the 'F2833x.
-//============================================================================
-
-
-//============================================================================
-// Multiple include Guard
-//============================================================================
-#ifndef __4090522384024n8273240x3438jx43087401r34ru32r0___
-#define __4090522384024n8273240x3438jx43087401r34ru32r0___
-
-//============================================================================
-// C++ namespace
-//============================================================================
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-
-//============================================================================
-// Function prototypes for MEP SFO
-//============================================================================
-void SFO_MepEn(int nEpwmModule);
-void SFO_MepDis(int nEpwmModule);
-
-//============================================================================
-// Multiple include Guard
-//============================================================================
-#endif // End: Multiple include Guard
-
-//============================================================================
-// C++ namespace
-//============================================================================
-#ifdef __cplusplus
-}
-#endif /* extern "C" */
diff --git a/Source/External/v120/DSP2833x_common/include/SFO_V5.h b/Source/External/v120/DSP2833x_common/include/SFO_V5.h
deleted file mode 100644
index 2374f03..0000000
--- a/Source/External/v120/DSP2833x_common/include/SFO_V5.h
+++ /dev/null
@@ -1,70 +0,0 @@
-
-//###########################################################################
-//
-// FILE:   SFO_V5.H
-//
-// TITLE:  Scale Factor Optimizer Library V5 Interface Header
-//
-//
-//###########################################################################
-//
-//  Ver | dd mmm yyyy | Who  | Description of changes
-// =====|=============|======|===============================================
-//  0.01| 09 Jan 2004 | TI   | New module
-//  0.02| 22 Jun 2007 | TI   | New version (V5) with support for more channels
-//###########################################################################
-
-
-//============================================================================
-// Description:		This header provides the function call interface
-// 			        for the scale factor optimizer V5. For more
-//                  information on the SFO function usage and
-//                  limitations, see the HRPWM Reference Guide
-//                  (spru924) on the TI website.
-//============================================================================
-
-
-//============================================================================
-// Multiple include Guard
-//============================================================================
-#ifndef _SFO_V5_H
-#define _SFO_V5_H
-
-//============================================================================
-// C++ namespace
-//============================================================================
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-//============================================================================
-// USER MUST UPDATE THIS CONSTANT FOR NUMBER OF HRPWM CHANNELS USED + 1
-//============================================================================
-#define PWM_CH	7	// Equal # of HRPWM channels PLUS 1
-                    // i.e. PWM_CH is 7 for 6 channels, 5 for 4 channels etc.
-
-//============================================================================
-// Function prototypes for MEP SFO
-//============================================================================
-
-int SFO_MepEn_V5(int nEpwmModule);  // MEP-Enable V5 Calibration Function
-int SFO_MepDis_V5(int nEpwmModule); // MEP-Disable V5  Calibration Function
-
-//============================================================================
-// Useful Defines when Using SFO Functions
-//============================================================================
-#define SFO_INCOMPLETE      0
-#define SFO_COMPLETE        1
-#define SFO_OUTRANGE_ERROR  2
-
-//============================================================================
-// Multiple include Guard
-//============================================================================
-#endif // End: Multiple include Guard
-
-//============================================================================
-// C++ namespace
-//============================================================================
-#ifdef __cplusplus
-}
-#endif /* extern "C" */
diff --git a/Source/External/v120/DSP2833x_common/lib/IQmath.lib b/Source/External/v120/DSP2833x_common/lib/IQmath.lib
deleted file mode 100644
index 340caf0..0000000
Binary files a/Source/External/v120/DSP2833x_common/lib/IQmath.lib and /dev/null differ
diff --git a/Source/External/v120/DSP2833x_common/lib/IQmath_fpu32.lib b/Source/External/v120/DSP2833x_common/lib/IQmath_fpu32.lib
deleted file mode 100644
index 426802a..0000000
Binary files a/Source/External/v120/DSP2833x_common/lib/IQmath_fpu32.lib and /dev/null differ
diff --git a/Source/External/v120/DSP2833x_common/lib/SFO_TI_Build.lib b/Source/External/v120/DSP2833x_common/lib/SFO_TI_Build.lib
deleted file mode 100644
index 1956f36..0000000
Binary files a/Source/External/v120/DSP2833x_common/lib/SFO_TI_Build.lib and /dev/null differ
diff --git a/Source/External/v120/DSP2833x_common/lib/SFO_TI_Build_V5.lib b/Source/External/v120/DSP2833x_common/lib/SFO_TI_Build_V5.lib
deleted file mode 100644
index 66ba460..0000000
Binary files a/Source/External/v120/DSP2833x_common/lib/SFO_TI_Build_V5.lib and /dev/null differ
diff --git a/Source/External/v120/DSP2833x_common/lib/SFO_TI_Build_V5B.lib b/Source/External/v120/DSP2833x_common/lib/SFO_TI_Build_V5B.lib
deleted file mode 100644
index 0a8447e..0000000
Binary files a/Source/External/v120/DSP2833x_common/lib/SFO_TI_Build_V5B.lib and /dev/null differ
diff --git a/Source/External/v120/DSP2833x_common/lib/SFO_TI_Build_V5B_fpu.lib b/Source/External/v120/DSP2833x_common/lib/SFO_TI_Build_V5B_fpu.lib
deleted file mode 100644
index 16f41df..0000000
Binary files a/Source/External/v120/DSP2833x_common/lib/SFO_TI_Build_V5B_fpu.lib and /dev/null differ
diff --git a/Source/External/v120/DSP2833x_common/lib/SFO_TI_Build_V5_fpu.lib b/Source/External/v120/DSP2833x_common/lib/SFO_TI_Build_V5_fpu.lib
deleted file mode 100644
index e35f7f8..0000000
Binary files a/Source/External/v120/DSP2833x_common/lib/SFO_TI_Build_V5_fpu.lib and /dev/null differ
diff --git a/Source/External/v120/DSP2833x_common/lib/SFO_TI_Build_fpu.lib b/Source/External/v120/DSP2833x_common/lib/SFO_TI_Build_fpu.lib
deleted file mode 100644
index df9e65e..0000000
Binary files a/Source/External/v120/DSP2833x_common/lib/SFO_TI_Build_fpu.lib and /dev/null differ
diff --git a/Source/External/v120/DSP2833x_common/source/DSP2833x_Adc.c b/Source/External/v120/DSP2833x_common/source/DSP2833x_Adc.c
index 70c3011..730415b 100644
--- a/Source/External/v120/DSP2833x_common/source/DSP2833x_Adc.c
+++ b/Source/External/v120/DSP2833x_common/source/DSP2833x_Adc.c
@@ -53,6 +53,7 @@ void InitAdc(void)
 	// CPU_RATE define statement in the DSP2833x_Examples.h file must
 	// contain the correct CPU clock period in nanoseconds.
 
+	AdcRegs.ADCREFSEL.bit.REF_SEL = 0x01;
     AdcRegs.ADCTRL3.all = 0x00E0;  // Power up bandgap/reference/ADC circuits
     DELAY_US(ADC_usDELAY);         // Delay before converting ADC channels
 //pause_us(50L);
diff --git a/Source/External/v120/DSP2833x_common/source/DSP2833x_CSMPasswords.asm b/Source/External/v120/DSP2833x_common/source/DSP2833x_CSMPasswords.asm
deleted file mode 100644
index 27eb60a..0000000
--- a/Source/External/v120/DSP2833x_common/source/DSP2833x_CSMPasswords.asm
+++ /dev/null
@@ -1,67 +0,0 @@
-;// TI File $Revision: /main/3 $
-;// Checkin $Date: June 26, 2007   16:41:07 $
-;//###########################################################################
-;//
-;// FILE:	DSP2833x_CSMPasswords.asm
-;//
-;// TITLE:	DSP2833x Code Security Module Passwords.
-;// 
-;// DESCRIPTION:
-;//
-;//         This file is used to specify password values to
-;//         program into the CSM password locations in Flash
-;//         at 0x33FFF8 - 0x33FFFF.
-;//
-;//         In addition, the reserved locations 0x33FF80 - 0X33fff5 are 
-;//         all programmed to 0x0000
-;//
-;//###########################################################################
-;//
-;// Original source based on D.A.
-;// 
-;// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-;// $Release Date: August 1, 2008 $
-;//###########################################################################
-
-; The "csmpasswords" section contains the actual CSM passwords that will be
-; linked and programmed into to the CSM password locations (PWL) in flash.  
-; These passwords must be known in order to unlock the CSM module. 
-; All 0xFFFF's (erased) is the default value for the password locations (PWL).
-
-; It is recommended that all passwords be left as 0xFFFF during code
-; development.  Passwords of 0xFFFF do not activate code security and dummy 
-; reads of the CSM PWL registers is all that is required to unlock the CSM.  
-; When code development is complete, modify the passwords to activate the
-; code security module.
-
-      .sect "csmpasswds"
-
-      .int	0xFFFF		;PWL0 (LSW of 128-bit password)
-      .int	0xFFFF		;PWL1
-      .int	0xFFFF		;PWL2
-      .int	0xFFFF		;PWL3
-      .int	0xFFFF		;PWL4
-      .int	0xFFFF		;PWL5
-      .int	0xFFFF		;PWL6
-      .int	0xFFFF		;PWL7 (MSW of 128-bit password)
-	
-;----------------------------------------------------------------------
-
-; For code security operation, all addresses between 0x33FF80 and
-; 0X33fff5 cannot be used as program code or data.  These locations
-; must be programmed to 0x0000 when the code security password locations
-; (PWL) are programmed.  If security is not a concern, then these addresses
-; can be used for code or data.  
-
-; The section "csm_rsvd" can be used to program these locations to 0x0000.
-
-        .sect "csm_rsvd"
-        .loop (33FFF5h - 33FF80h + 1)
-              .int 0x0000
-        .endloop
-
-;//===========================================================================
-;// End of file.
-;//===========================================================================
-
-      
diff --git a/Source/External/v120/DSP2833x_common/source/DSP2833x_CodeStartBranch.asm b/Source/External/v120/DSP2833x_common/source/DSP2833x_CodeStartBranch.asm
deleted file mode 100644
index 430efa3..0000000
--- a/Source/External/v120/DSP2833x_common/source/DSP2833x_CodeStartBranch.asm
+++ /dev/null
@@ -1,86 +0,0 @@
-;// TI File $Revision: /main/1 $
-;// Checkin $Date: August 18, 2006   13:45:55 $
-;//###########################################################################
-;//
-;// FILE:  DSP2833x_CodeStartBranch.asm	
-;//
-;// TITLE: Branch for redirecting code execution after boot. 
-;//
-;// For these examples, code_start is the first code that is executed after
-;// exiting the boot ROM code. 
-;//
-;// The codestart section in the linker cmd file is used to physically place
-;// this code at the correct memory location.  This section should be placed 
-;// at the location the BOOT ROM will re-direct the code to.  For example, 
-;// for boot to FLASH this code will be located at 0x3f7ff6. 
-;//
-;// In addition, the example DSP2833x projects are setup such that the codegen
-;// entry point is also set to the code_start label.  This is done by linker 
-;// option -e in the project build options.  When the debugger loads the code,
-;// it will automatically set the PC to the "entry point" address indicated by
-;// the -e linker option.  In this case the debugger is simply assigning the PC, 
-;// it is not the same as a full reset of the device. 
-;// 
-;// The compiler may warn that the entry point for the project is other then
-;//  _c_init00.  _c_init00 is the C environment setup and is run before 
-;// main() is entered. The code_start code will re-direct the execution 
-;// to _c_init00 and thus there is no worry and this warning can be ignored. 
-;// 
-;//###########################################################################
-;// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-;// $Release Date: August 1, 2008 $
-;//###########################################################################
-
-
-***********************************************************************
-
-WD_DISABLE	.set	1		;set to 1 to disable WD, else set to 0
-
-    .ref _c_int00
-    .global code_start
-
-***********************************************************************
-* Function: codestart section
-*
-* Description: Branch to code starting point
-***********************************************************************
-
-    .sect "codestart"
-
-code_start:
-    .if WD_DISABLE == 1
-        LB wd_disable       ;Branch to watchdog disable code
-    .else
-        LB _c_int00         ;Branch to start of boot.asm in RTS library
-    .endif
-
-;end codestart section
-
-
-***********************************************************************
-* Function: wd_disable
-*
-* Description: Disables the watchdog timer
-***********************************************************************
-    .if WD_DISABLE == 1
-
-    .text
-wd_disable:
-    SETC OBJMODE        ;Set OBJMODE for 28x object code
-    EALLOW              ;Enable EALLOW protected register access
-    MOVZ DP, #7029h>>6  ;Set data page for WDCR register
-    MOV @7029h, #0068h  ;Set WDDIS bit in WDCR to disable WD
-    EDIS                ;Disable EALLOW protected register access
-    LB _c_int00         ;Branch to start of boot.asm in RTS library
-
-    .endif
-
-;end wd_disable
-
-
-
-	.end
-	
-;//===========================================================================
-;// End of file.
-;//===========================================================================
diff --git a/Source/External/v120/DSP2833x_common/source/DSP2833x_DBGIER.asm b/Source/External/v120/DSP2833x_common/source/DSP2833x_DBGIER.asm
deleted file mode 100644
index 7c226ce..0000000
--- a/Source/External/v120/DSP2833x_common/source/DSP2833x_DBGIER.asm
+++ /dev/null
@@ -1,28 +0,0 @@
-;// TI File $Revision: /main/1 $
-;// Checkin $Date: August 18, 2006   13:46:03 $
-;//###########################################################################
-;//
-;// FILE:  DSP2833x_DBGIER.asm
-;//
-;// TITLE: Set the DBGIER register
-;//
-;// DESCRIPTION:
-;//  
-;//  Function to set the DBGIER register (for realtime emulation).
-;//  Function Prototype: void SetDBGIER(Uint16)
-;//  Useage: SetDBGIER(value);
-;//  Input Parameters: Uint16 value = value to put in DBGIER register. 
-;//  Return Value: none          
-;//
-;//###########################################################################
-;// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-;// $Release Date: August 1, 2008 $
-;//###########################################################################	
-		.global _SetDBGIER
-		.text
-		
-_SetDBGIER:
-		MOV 	*SP++,AL
-		POP 	DBGIER
-		LRETR
-		
diff --git a/Source/External/v120/DSP2833x_common/source/DSP2833x_DMA.c b/Source/External/v120/DSP2833x_common/source/DSP2833x_DMA.c
deleted file mode 100644
index 83c4f3c..0000000
--- a/Source/External/v120/DSP2833x_common/source/DSP2833x_DMA.c
+++ /dev/null
@@ -1,590 +0,0 @@
-//###########################################################################
-//
-// FILE:	DSP2833x_DMA.c
-//
-// TITLE:	DSP2833x Device DMA Initialization & Support Functions.
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-#include "DSP2833x_Device.h"     // Headerfile Include File
-#include "DSP2833x_Examples.h"   // Examples Include File
-
-// This function initializes the DMA to a known state.
-//
-void DMAInitialize(void)
-{
-	EALLOW;
-
-	// Perform a hard reset on DMA
-	DmaRegs.DMACTRL.bit.HARDRESET = 1;
-    asm (" nop"); // one NOP required after HARDRESET
-
-	// Allow DMA to run free on emulation suspend
-	DmaRegs.DEBUGCTRL.bit.FREE = 1;
-
-	EDIS;
-}
-
-
-void DMACH1AddrConfig(volatile Uint16 *DMA_Dest,volatile Uint16 *DMA_Source)
-{
-	EALLOW;
-	// Set up SOURCE address:
-	DmaRegs.CH1.SRC_BEG_ADDR_SHADOW = (Uint32)DMA_Source;	// Point to beginning of source buffer
-	DmaRegs.CH1.SRC_ADDR_SHADOW =     (Uint32)DMA_Source;
-
-	// Set up DESTINATION address:
-	DmaRegs.CH1.DST_BEG_ADDR_SHADOW = (Uint32)DMA_Dest;	    // Point to beginning of destination buffer
-	DmaRegs.CH1.DST_ADDR_SHADOW =     (Uint32)DMA_Dest;
-
-
-	EDIS;
-}
-
-void DMACH1BurstConfig(Uint16 bsize, int16 srcbstep, int16 desbstep)
-{
-	EALLOW;
-
-	// Set up BURST registers:
-	DmaRegs.CH1.BURST_SIZE.all = bsize;	                // Number of words(X-1) x-ferred in a burst
-	DmaRegs.CH1.SRC_BURST_STEP = srcbstep;			    // Increment source addr between each word x-ferred
-	DmaRegs.CH1.DST_BURST_STEP = desbstep;              // Increment dest addr between each word x-ferred
-
-
-	EDIS;
-}
-
-void DMACH1TransferConfig(Uint16 tsize, int16 srctstep, int16 deststep)
-{
-	EALLOW;
-
-	// Set up TRANSFER registers:
-	DmaRegs.CH1.TRANSFER_SIZE = tsize;                  // Number of bursts per transfer, DMA interrupt will occur after completed transfer
-	DmaRegs.CH1.SRC_TRANSFER_STEP = srctstep;			// TRANSFER_STEP is ignored when WRAP occurs
-	DmaRegs.CH1.DST_TRANSFER_STEP = deststep;			// TRANSFER_STEP is ignored when WRAP occurs
-
-	EDIS;
-}
-
-void DMACH1WrapConfig(Uint16 srcwsize, int16 srcwstep, Uint16 deswsize, int16 deswstep)
-{
-	EALLOW;
-
-		// Set up WRAP registers:
-	DmaRegs.CH1.SRC_WRAP_SIZE = srcwsize;				// Wrap source address after N bursts
-    DmaRegs.CH1.SRC_WRAP_STEP = srcwstep;			    // Step for source wrap
-
-	DmaRegs.CH1.DST_WRAP_SIZE = deswsize;				// Wrap destination address after N bursts
-	DmaRegs.CH1.DST_WRAP_STEP = deswstep;				// Step for destination wrap
-
-	EDIS;
-}
-
-
-void DMACH1ModeConfig(Uint16 persel, Uint16 perinte, Uint16 oneshot, Uint16 cont, Uint16 synce, Uint16 syncsel, Uint16 ovrinte, Uint16 datasize, Uint16 chintmode, Uint16 chinte)
-{
-	EALLOW;
-
-	// Set up MODE Register:
-	DmaRegs.CH1.MODE.bit.PERINTSEL = persel;	    // Passed DMA channel as peripheral interrupt source
-	DmaRegs.CH1.MODE.bit.PERINTE = perinte;       	// Peripheral interrupt enable
-	DmaRegs.CH1.MODE.bit.ONESHOT = oneshot;       	// Oneshot enable
-	DmaRegs.CH1.MODE.bit.CONTINUOUS = cont;    		// Continous enable
-	DmaRegs.CH1.MODE.bit.SYNCE = synce;         	// Peripheral sync enable/disable
-	DmaRegs.CH1.MODE.bit.SYNCSEL = syncsel;       	// Sync effects source or destination
-	DmaRegs.CH1.MODE.bit.OVRINTE = ovrinte;         // Enable/disable the overflow interrupt
-	DmaRegs.CH1.MODE.bit.DATASIZE = datasize;      	// 16-bit/32-bit data size transfers
-	DmaRegs.CH1.MODE.bit.CHINTMODE = chintmode;		// Generate interrupt to CPU at beginning/end of transfer
-	DmaRegs.CH1.MODE.bit.CHINTE = chinte;        	// Channel Interrupt to CPU enable
-
-	// Clear any spurious flags:
-	DmaRegs.CH1.CONTROL.bit.PERINTCLR = 1;  		// Clear any spurious interrupt flags
-	DmaRegs.CH1.CONTROL.bit.SYNCCLR = 1;    		// Clear any spurious sync flags
-	DmaRegs.CH1.CONTROL.bit.ERRCLR = 1; 	     	// Clear any spurious sync error flags
-
-	// Initialize PIE vector for CPU interrupt:
-	PieCtrlRegs.PIEIER7.bit.INTx1 = 1;              // Enable DMA CH1 interrupt in PIE
-
-	EDIS;
-}
-
-// This function starts DMA Channel 1.
-void StartDMACH1(void)
-{
-	EALLOW;
-	DmaRegs.CH1.CONTROL.bit.RUN = 1;
-	EDIS;
-}
-
-void DMACH2AddrConfig(volatile Uint16 *DMA_Dest,volatile Uint16 *DMA_Source)
-{
-	EALLOW;
-
-	// Set up SOURCE address:
-	DmaRegs.CH2.SRC_BEG_ADDR_SHADOW = (Uint32)DMA_Source;	// Point to beginning of source buffer
-	DmaRegs.CH2.SRC_ADDR_SHADOW =     (Uint32)DMA_Source;
-
-	// Set up DESTINATION address:
-	DmaRegs.CH2.DST_BEG_ADDR_SHADOW = (Uint32)DMA_Dest;	    // Point to beginning of destination buffer
-	DmaRegs.CH2.DST_ADDR_SHADOW =     (Uint32)DMA_Dest;
-
-
-	EDIS;
-}
-
-void DMACH2BurstConfig(Uint16 bsize, int16 srcbstep, int16 desbstep)
-{
-	EALLOW;
-
-	// Set up BURST registers:
-	DmaRegs.CH2.BURST_SIZE.all = bsize;	                // Number of words(X-1) x-ferred in a burst
-	DmaRegs.CH2.SRC_BURST_STEP = srcbstep;			    // Increment source addr between each word x-ferred
-	DmaRegs.CH2.DST_BURST_STEP = desbstep;              // Increment dest addr between each word x-ferred
-
-
-	EDIS;
-}
-
-void DMACH2TransferConfig(Uint16 tsize, int16 srctstep, int16 deststep)
-{
-	EALLOW;
-
-		// Set up TRANSFER registers:
-	DmaRegs.CH2.TRANSFER_SIZE = tsize;                  // Number of bursts per transfer, DMA interrupt will occur after completed transfer
-	DmaRegs.CH2.SRC_TRANSFER_STEP = srctstep;			// TRANSFER_STEP is ignored when WRAP occurs
-	DmaRegs.CH2.DST_TRANSFER_STEP = deststep;			// TRANSFER_STEP is ignored when WRAP occurs
-
-	EDIS;
-}
-
-void DMACH2WrapConfig(Uint16 srcwsize, int16 srcwstep, Uint16 deswsize, int16 deswstep)
-{
-	EALLOW;
-
-		// Set up WRAP registers:
-	DmaRegs.CH2.SRC_WRAP_SIZE = srcwsize;				// Wrap source address after N bursts
-    DmaRegs.CH2.SRC_WRAP_STEP = srcwstep;			    // Step for source wrap
-
-	DmaRegs.CH2.DST_WRAP_SIZE = deswsize;				// Wrap destination address after N bursts
-	DmaRegs.CH2.DST_WRAP_STEP = deswstep;				// Step for destination wrap
-
-	EDIS;
-}
-
-
-void DMACH2ModeConfig(Uint16 persel, Uint16 perinte, Uint16 oneshot, Uint16 cont, Uint16 synce, Uint16 syncsel, Uint16 ovrinte, Uint16 datasize, Uint16 chintmode, Uint16 chinte)
-{
-	EALLOW;
-
-		// Set up MODE Register:
-	DmaRegs.CH2.MODE.bit.PERINTSEL = persel;	    // Passed DMA channel as peripheral interrupt source
-	DmaRegs.CH2.MODE.bit.PERINTE = perinte;       	// Peripheral interrupt enable
-	DmaRegs.CH2.MODE.bit.ONESHOT = oneshot;       	// Oneshot enable
-	DmaRegs.CH2.MODE.bit.CONTINUOUS = cont;    		// Continous enable
-	DmaRegs.CH2.MODE.bit.SYNCE = synce;         	// Peripheral sync enable/disable
-	DmaRegs.CH2.MODE.bit.SYNCSEL = syncsel;       	// Sync effects source or destination
-	DmaRegs.CH2.MODE.bit.OVRINTE = ovrinte;         // Enable/disable the overflow interrupt
-	DmaRegs.CH2.MODE.bit.DATASIZE = datasize;      	// 16-bit/32-bit data size transfers
-	DmaRegs.CH2.MODE.bit.CHINTMODE = chintmode;		// Generate interrupt to CPU at beginning/end of transfer
-	DmaRegs.CH2.MODE.bit.CHINTE = chinte;        	// Channel Interrupt to CPU enable
-
-	// Clear any spurious flags:
-	DmaRegs.CH2.CONTROL.bit.PERINTCLR = 1;  		// Clear any spurious interrupt flags
-	DmaRegs.CH2.CONTROL.bit.SYNCCLR = 1;    		// Clear any spurious sync flags
-	DmaRegs.CH2.CONTROL.bit.ERRCLR = 1; 	     	// Clear any spurious sync error flags
-
-	// Initialize PIE vector for CPU interrupt:
-	PieCtrlRegs.PIEIER7.bit.INTx2 = 1;              // Enable DMA CH2 interrupt in PIE
-
-	EDIS;
-}
-
-
-
-// This function starts DMA Channel 2.
-void StartDMACH2(void)
-{
-	EALLOW;
-	DmaRegs.CH2.CONTROL.bit.RUN = 1;
-	EDIS;
-}
-
-
-
-void DMACH3AddrConfig(volatile Uint16 *DMA_Dest,volatile Uint16 *DMA_Source)
-{
-	EALLOW;
-
-	// Set up SOURCE address:
-	DmaRegs.CH3.SRC_BEG_ADDR_SHADOW = (Uint32)DMA_Source;	// Point to beginning of source buffer
-	DmaRegs.CH3.SRC_ADDR_SHADOW =     (Uint32)DMA_Source;
-
-	// Set up DESTINATION address:
-	DmaRegs.CH3.DST_BEG_ADDR_SHADOW = (Uint32)DMA_Dest;	    // Point to beginning of destination buffer
-	DmaRegs.CH3.DST_ADDR_SHADOW =     (Uint32)DMA_Dest;
-
-
-	EDIS;
-}
-
-void DMACH3BurstConfig(Uint16 bsize, int16 srcbstep, int16 desbstep)
-{
-	EALLOW;
-
-	// Set up BURST registers:
-	DmaRegs.CH3.BURST_SIZE.all = bsize;	                // Number of words(X-1) x-ferred in a burst
-	DmaRegs.CH3.SRC_BURST_STEP = srcbstep;			    // Increment source addr between each word x-ferred
-	DmaRegs.CH3.DST_BURST_STEP = desbstep;              // Increment dest addr between each word x-ferred
-
-
-	EDIS;
-}
-
-void DMACH3TransferConfig(Uint16 tsize, int16 srctstep, int16 deststep)
-{
-	EALLOW;
-
-		// Set up TRANSFER registers:
-	DmaRegs.CH3.TRANSFER_SIZE = tsize;                  // Number of bursts per transfer, DMA interrupt will occur after completed transfer
-	DmaRegs.CH3.SRC_TRANSFER_STEP = srctstep;			// TRANSFER_STEP is ignored when WRAP occurs
-	DmaRegs.CH3.DST_TRANSFER_STEP = deststep;			// TRANSFER_STEP is ignored when WRAP occurs
-
-	EDIS;
-}
-
-void DMACH3WrapConfig(Uint16 srcwsize, int16 srcwstep, Uint16 deswsize, int16 deswstep)
-{
-	EALLOW;
-
-			// Set up WRAP registers:
-	DmaRegs.CH3.SRC_WRAP_SIZE = srcwsize;				// Wrap source address after N bursts
-    DmaRegs.CH3.SRC_WRAP_STEP = srcwstep;			    // Step for source wrap
-
-	DmaRegs.CH3.DST_WRAP_SIZE = deswsize;				// Wrap destination address after N bursts
-	DmaRegs.CH3.DST_WRAP_STEP = deswstep;				// Step for destination wrap
-
-	EDIS;
-}
-
-
-void DMACH3ModeConfig(Uint16 persel, Uint16 perinte, Uint16 oneshot, Uint16 cont, Uint16 synce, Uint16 syncsel, Uint16 ovrinte, Uint16 datasize, Uint16 chintmode, Uint16 chinte)
-{
-	EALLOW;
-
-	// Set up MODE Register:
-	DmaRegs.CH3.MODE.bit.PERINTSEL = persel;	    // Passed DMA channel as peripheral interrupt source
-	DmaRegs.CH3.MODE.bit.PERINTE = perinte;       	// Peripheral interrupt enable
-	DmaRegs.CH3.MODE.bit.ONESHOT = oneshot;       	// Oneshot enable
-	DmaRegs.CH3.MODE.bit.CONTINUOUS = cont;    		// Continous enable
-	DmaRegs.CH3.MODE.bit.SYNCE = synce;         	// Peripheral sync enable/disable
-	DmaRegs.CH3.MODE.bit.SYNCSEL = syncsel;       	// Sync effects source or destination
-	DmaRegs.CH3.MODE.bit.OVRINTE = ovrinte;         // Enable/disable the overflow interrupt
-	DmaRegs.CH3.MODE.bit.DATASIZE = datasize;      	// 16-bit/32-bit data size transfers
-	DmaRegs.CH3.MODE.bit.CHINTMODE = chintmode;		// Generate interrupt to CPU at beginning/end of transfer
-	DmaRegs.CH3.MODE.bit.CHINTE = chinte;        	// Channel Interrupt to CPU enable
-
-	// Clear any spurious flags:
-	DmaRegs.CH3.CONTROL.bit.PERINTCLR = 1;  		// Clear any spurious interrupt flags
-	DmaRegs.CH3.CONTROL.bit.SYNCCLR = 1;    		// Clear any spurious sync flags
-	DmaRegs.CH3.CONTROL.bit.ERRCLR = 1; 	     	// Clear any spurious sync error flags
-
-	// Initialize PIE vector for CPU interrupt:
-	PieCtrlRegs.PIEIER7.bit.INTx3 = 1;              // Enable DMA CH3 interrupt in PIE
-
-	EDIS;
-}
-
-// This function starts DMA Channel 3.
-void StartDMACH3(void)
-{
-	EALLOW;
-	DmaRegs.CH3.CONTROL.bit.RUN = 1;
-	EDIS;
-}
-
-
-void DMACH4AddrConfig(volatile Uint16 *DMA_Dest,volatile Uint16 *DMA_Source)
-{
-	EALLOW;
-
-	// Set up SOURCE address:
-	DmaRegs.CH4.SRC_BEG_ADDR_SHADOW = (Uint32)DMA_Source;	// Point to beginning of source buffer
-	DmaRegs.CH4.SRC_ADDR_SHADOW =     (Uint32)DMA_Source;
-
-	// Set up DESTINATION address:
-	DmaRegs.CH4.DST_BEG_ADDR_SHADOW = (Uint32)DMA_Dest;	    // Point to beginning of destination buffer
-	DmaRegs.CH4.DST_ADDR_SHADOW =     (Uint32)DMA_Dest;
-
-
-	EDIS;
-}
-
-void DMACH4BurstConfig(Uint16 bsize, int16 srcbstep, int16 desbstep)
-{
-	EALLOW;
-
-	// Set up BURST registers:
-	DmaRegs.CH4.BURST_SIZE.all = bsize;	                // Number of words(X-1) x-ferred in a burst
-	DmaRegs.CH4.SRC_BURST_STEP = srcbstep;			    // Increment source addr between each word x-ferred
-	DmaRegs.CH4.DST_BURST_STEP = desbstep;              // Increment dest addr between each word x-ferred
-
-
-	EDIS;
-}
-
-void DMACH4TransferConfig(Uint16 tsize, int16 srctstep, int16 deststep)
-{
-	EALLOW;
-
-	// Set up TRANSFER registers:
-	DmaRegs.CH4.TRANSFER_SIZE = tsize;                  // Number of bursts per transfer, DMA interrupt will occur after completed transfer
-	DmaRegs.CH4.SRC_TRANSFER_STEP = srctstep;			// TRANSFER_STEP is ignored when WRAP occurs
-	DmaRegs.CH4.DST_TRANSFER_STEP = deststep;			// TRANSFER_STEP is ignored when WRAP occurs
-
-	EDIS;
-}
-
-void DMACH4WrapConfig(Uint16 srcwsize, int16 srcwstep, Uint16 deswsize, int16 deswstep)
-{
-	EALLOW;
-
-		// Set up WRAP registers:
-	DmaRegs.CH4.SRC_WRAP_SIZE = srcwsize;				// Wrap source address after N bursts
-    DmaRegs.CH4.SRC_WRAP_STEP = srcwstep;			    // Step for source wrap
-
-	DmaRegs.CH4.DST_WRAP_SIZE = deswsize;				// Wrap destination address after N bursts
-	DmaRegs.CH4.DST_WRAP_STEP = deswstep;				// Step for destination wrap
-
-	EDIS;
-}
-
-
-void DMACH4ModeConfig(Uint16 persel, Uint16 perinte, Uint16 oneshot, Uint16 cont, Uint16 synce, Uint16 syncsel, Uint16 ovrinte, Uint16 datasize, Uint16 chintmode, Uint16 chinte)
-{
-	EALLOW;
-
-		// Set up MODE Register:
-	DmaRegs.CH4.MODE.bit.PERINTSEL = persel;	    // Passed DMA channel as peripheral interrupt source
-	DmaRegs.CH4.MODE.bit.PERINTE = perinte;       	// Peripheral interrupt enable
-	DmaRegs.CH4.MODE.bit.ONESHOT = oneshot;       	// Oneshot enable
-	DmaRegs.CH4.MODE.bit.CONTINUOUS = cont;    		// Continous enable
-	DmaRegs.CH4.MODE.bit.SYNCE = synce;         	// Peripheral sync enable/disable
-	DmaRegs.CH4.MODE.bit.SYNCSEL = syncsel;       	// Sync effects source or destination
-	DmaRegs.CH4.MODE.bit.OVRINTE = ovrinte;         // Enable/disable the overflow interrupt
-	DmaRegs.CH4.MODE.bit.DATASIZE = datasize;      	// 16-bit/32-bit data size transfers
-	DmaRegs.CH4.MODE.bit.CHINTMODE = chintmode;		// Generate interrupt to CPU at beginning/end of transfer
-	DmaRegs.CH4.MODE.bit.CHINTE = chinte;        	// Channel Interrupt to CPU enable
-
-	// Clear any spurious flags:
-	DmaRegs.CH4.CONTROL.bit.PERINTCLR = 1;  		// Clear any spurious interrupt flags
-	DmaRegs.CH4.CONTROL.bit.SYNCCLR = 1;    		// Clear any spurious sync flags
-	DmaRegs.CH4.CONTROL.bit.ERRCLR = 1; 	     	// Clear any spurious sync error flags
-
-	// Initialize PIE vector for CPU interrupt:
-	PieCtrlRegs.PIEIER7.bit.INTx4 = 1;              // Enable DMA CH4 interrupt in PIE
-
-	EDIS;
-}
-
-
-// This function starts DMA Channel 4.
-void StartDMACH4(void)
-{
-	EALLOW;
-	DmaRegs.CH4.CONTROL.bit.RUN = 1;
-	EDIS;
-}
-
-
-void DMACH5AddrConfig(volatile Uint16 *DMA_Dest,volatile Uint16 *DMA_Source)
-{
-	EALLOW;
-
-	// Set up SOURCE address:
-	DmaRegs.CH5.SRC_BEG_ADDR_SHADOW = (Uint32)DMA_Source;	// Point to beginning of source buffer
-	DmaRegs.CH5.SRC_ADDR_SHADOW =     (Uint32)DMA_Source;
-
-	// Set up DESTINATION address:
-	DmaRegs.CH5.DST_BEG_ADDR_SHADOW = (Uint32)DMA_Dest;	    // Point to beginning of destination buffer
-	DmaRegs.CH5.DST_ADDR_SHADOW =     (Uint32)DMA_Dest;
-
-
-	EDIS;
-}
-
-void DMACH5BurstConfig(Uint16 bsize, int16 srcbstep, int16 desbstep)
-{
-	EALLOW;
-
-
-	// Set up BURST registers:
-	DmaRegs.CH5.BURST_SIZE.all = bsize;	                // Number of words(X-1) x-ferred in a burst
-	DmaRegs.CH5.SRC_BURST_STEP = srcbstep;			    // Increment source addr between each word x-ferred
-	DmaRegs.CH5.DST_BURST_STEP = desbstep;              // Increment dest addr between each word x-ferred
-
-	EDIS;
-}
-
-void DMACH5TransferConfig(Uint16 tsize, int16 srctstep, int16 deststep)
-{
-	EALLOW;
-
-
-		// Set up TRANSFER registers:
-	DmaRegs.CH5.TRANSFER_SIZE = tsize;                  // Number of bursts per transfer, DMA interrupt will occur after completed transfer
-	DmaRegs.CH5.SRC_TRANSFER_STEP = srctstep;			// TRANSFER_STEP is ignored when WRAP occurs
-	DmaRegs.CH5.DST_TRANSFER_STEP = deststep;			// TRANSFER_STEP is ignored when WRAP occurs
-
-	EDIS;
-}
-
-void DMACH5WrapConfig(Uint16 srcwsize, int16 srcwstep, Uint16 deswsize, int16 deswstep)
-{
-	EALLOW;
-
-
-		// Set up WRAP registers:
-	DmaRegs.CH5.SRC_WRAP_SIZE = srcwsize;				// Wrap source address after N bursts
-    DmaRegs.CH5.SRC_WRAP_STEP = srcwstep;			    // Step for source wrap
-
-	DmaRegs.CH5.DST_WRAP_SIZE = deswsize;				// Wrap destination address after N bursts
-	DmaRegs.CH5.DST_WRAP_STEP = deswstep;				// Step for destination wrap
-
-	EDIS;
-}
-
-
-void DMACH5ModeConfig(Uint16 persel, Uint16 perinte, Uint16 oneshot, Uint16 cont, Uint16 synce, Uint16 syncsel, Uint16 ovrinte, Uint16 datasize, Uint16 chintmode, Uint16 chinte)
-{
-	EALLOW;
-
-		// Set up MODE Register:
-	DmaRegs.CH5.MODE.bit.PERINTSEL = persel;	    // Passed DMA channel as peripheral interrupt source
-	DmaRegs.CH5.MODE.bit.PERINTE = perinte;       	// Peripheral interrupt enable
-	DmaRegs.CH5.MODE.bit.ONESHOT = oneshot;       	// Oneshot enable
-	DmaRegs.CH5.MODE.bit.CONTINUOUS = cont;    		// Continous enable
-	DmaRegs.CH5.MODE.bit.SYNCE = synce;         	// Peripheral sync enable/disable
-	DmaRegs.CH5.MODE.bit.SYNCSEL = syncsel;       	// Sync effects source or destination
-	DmaRegs.CH5.MODE.bit.OVRINTE = ovrinte;         // Enable/disable the overflow interrupt
-	DmaRegs.CH5.MODE.bit.DATASIZE = datasize;      	// 16-bit/32-bit data size transfers
-	DmaRegs.CH5.MODE.bit.CHINTMODE = chintmode;		// Generate interrupt to CPU at beginning/end of transfer
-	DmaRegs.CH5.MODE.bit.CHINTE = chinte;        	// Channel Interrupt to CPU enable
-
-	// Clear any spurious flags:
-	DmaRegs.CH5.CONTROL.bit.PERINTCLR = 1;  		// Clear any spurious interrupt flags
-	DmaRegs.CH5.CONTROL.bit.SYNCCLR = 1;    		// Clear any spurious sync flags
-	DmaRegs.CH5.CONTROL.bit.ERRCLR = 1; 	     	// Clear any spurious sync error flags
-
-	// Initialize PIE vector for CPU interrupt:
-	PieCtrlRegs.PIEIER7.bit.INTx5 = 1;              // Enable DMA CH5 interrupt in PIE
-
-	EDIS;
-}
-
-// This function starts DMA Channel 5.
-void StartDMACH5(void)
-{
-	EALLOW;
-	DmaRegs.CH5.CONTROL.bit.RUN = 1;
-	EDIS;
-}
-
-
-
-void DMACH6AddrConfig(volatile Uint16 *DMA_Dest,volatile Uint16 *DMA_Source)
-{
-	EALLOW;
-
-	// Set up SOURCE address:
-	DmaRegs.CH6.SRC_BEG_ADDR_SHADOW = (Uint32)DMA_Source;	// Point to beginning of source buffer
-	DmaRegs.CH6.SRC_ADDR_SHADOW =     (Uint32)DMA_Source;
-
-	// Set up DESTINATION address:
-	DmaRegs.CH6.DST_BEG_ADDR_SHADOW = (Uint32)DMA_Dest;	    // Point to beginning of destination buffer
-	DmaRegs.CH6.DST_ADDR_SHADOW =     (Uint32)DMA_Dest;
-
-
-	EDIS;
-}
-
-void DMACH6BurstConfig(Uint16 bsize,Uint16 srcbstep, int16 desbstep)
-{
-	EALLOW;
-
-	// Set up BURST registers:
-	DmaRegs.CH6.BURST_SIZE.all = bsize;	                // Number of words(X-1) x-ferred in a burst
-	DmaRegs.CH6.SRC_BURST_STEP = srcbstep;				    // Increment source addr between each word x-ferred
-	DmaRegs.CH6.DST_BURST_STEP = desbstep;                // Increment dest addr between each word x-ferred
-
-
-	EDIS;
-}
-
-void DMACH6TransferConfig(Uint16 tsize, int16 srctstep, int16 deststep)
-{
-	EALLOW;
-
-	// Set up TRANSFER registers:
-	DmaRegs.CH6.TRANSFER_SIZE = tsize;                  // Number of bursts per transfer, DMA interrupt will occur after completed transfer
-	DmaRegs.CH6.SRC_TRANSFER_STEP = srctstep;			// TRANSFER_STEP is ignored when WRAP occurs
-	DmaRegs.CH6.DST_TRANSFER_STEP = deststep;			// TRANSFER_STEP is ignored when WRAP occurs
-
-	EDIS;
-}
-
-void DMACH6WrapConfig(Uint16 srcwsize, int16 srcwstep, Uint16 deswsize, int16 deswstep)
-{
-	EALLOW;
-
-		// Set up WRAP registers:
-	DmaRegs.CH6.SRC_WRAP_SIZE = srcwsize;				// Wrap source address after N bursts
-    DmaRegs.CH6.SRC_WRAP_STEP = srcwstep;			    // Step for source wrap
-
-	DmaRegs.CH6.DST_WRAP_SIZE = deswsize;				// Wrap destination address after N bursts
-	DmaRegs.CH6.DST_WRAP_STEP = deswstep;				// Step for destination wrap
-
-	EDIS;
-}
-
-
-void DMACH6ModeConfig(Uint16 persel, Uint16 perinte, Uint16 oneshot, Uint16 cont, Uint16 synce, Uint16 syncsel, Uint16 ovrinte, Uint16 datasize, Uint16 chintmode, Uint16 chinte)
-{
-	EALLOW;
-
-		// Set up MODE Register:
-	DmaRegs.CH6.MODE.bit.PERINTSEL = persel;	    // Passed DMA channel as peripheral interrupt source
-	DmaRegs.CH6.MODE.bit.PERINTE = perinte;       	// Peripheral interrupt enable
-	DmaRegs.CH6.MODE.bit.ONESHOT = oneshot;       	// Oneshot enable
-	DmaRegs.CH6.MODE.bit.CONTINUOUS = cont;    		// Continous enable
-	DmaRegs.CH6.MODE.bit.SYNCE = synce;         	// Peripheral sync enable/disable
-	DmaRegs.CH6.MODE.bit.SYNCSEL = syncsel;       	// Sync effects source or destination
-	DmaRegs.CH6.MODE.bit.OVRINTE = ovrinte;         // Enable/disable the overflow interrupt
-	DmaRegs.CH6.MODE.bit.DATASIZE = datasize;      	// 16-bit/32-bit data size transfers
-	DmaRegs.CH6.MODE.bit.CHINTMODE = chintmode;		// Generate interrupt to CPU at beginning/end of transfer
-	DmaRegs.CH6.MODE.bit.CHINTE = chinte;        	// Channel Interrupt to CPU enable
-
-	// Clear any spurious flags:
-	DmaRegs.CH6.CONTROL.bit.PERINTCLR = 1;  		// Clear any spurious interrupt flags
-	DmaRegs.CH6.CONTROL.bit.SYNCCLR = 1;    		// Clear any spurious sync flags
-	DmaRegs.CH6.CONTROL.bit.ERRCLR = 1; 	     	// Clear any spurious sync error flags
-
-	// Initialize PIE vector for CPU interrupt:
-	PieCtrlRegs.PIEIER7.bit.INTx6 = 1;              // Enable DMA CH6 interrupt in PIE
-
-	EDIS;
-}
-
-// This function starts DMA Channel 6.
-void StartDMACH6(void)
-{
-	EALLOW;
-	DmaRegs.CH6.CONTROL.bit.RUN = 1;
-	EDIS;
-}
-
-//===========================================================================
-// No more.
-//===========================================================================
diff --git a/Source/External/v120/DSP2833x_common/source/DSP2833x_DefaultIsr.c b/Source/External/v120/DSP2833x_common/source/DSP2833x_DefaultIsr.c
deleted file mode 100644
index df76fda..0000000
--- a/Source/External/v120/DSP2833x_common/source/DSP2833x_DefaultIsr.c
+++ /dev/null
@@ -1,1187 +0,0 @@
-// TI File $Revision: /main/2 $
-// Checkin $Date: January 14, 2008   11:17:46 $
-//###########################################################################
-//
-// FILE:	DSP2833x_DefaultIsr.c
-//
-// TITLE:	DSP2833x Device Default Interrupt Service Routines.
-//
-// This file contains shell ISR routines for the 2833x PIE vector table.
-// Typically these shell ISR routines can be used to populate the entire PIE
-// vector table during device debug.  In this manner if an interrupt is taken
-// during firmware development, there will always be an ISR to catch it.
-//
-// As develpment progresses, these ISR rotuines can be eliminated and replaced
-// with the user's own ISR routines for each interrupt.  Since these shell ISRs
-// include infinite loops they will typically not be included as-is in the final
-// production firmware.
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-#include "DSP2833x_Device.h"     // DSP2833x Headerfile Include File
-#include "DSP2833x_Examples.h"   // DSP2833x Examples Include File
-
-
-// Connected to INT13 of CPU (use MINT13 mask):
-// Note CPU-Timer1 is reserved for TI use, however XINT13
-// ISR can be used by the user.
-interrupt void INT13_ISR(void)     // INT13 or CPU-Timer1
-{
-  // Insert ISR Code here
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-}
-
-// Note CPU-Timer2 is reserved for TI use.
-interrupt void INT14_ISR(void)     // CPU-Timer2
-{
-  // Insert ISR Code here
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-}
-
-interrupt void DATALOG_ISR(void)   // Datalogging interrupt
-{
-   // Insert ISR Code here
-
-   // Next two lines for debug only to halt the processor here
-   // Remove after inserting ISR Code
-   asm ("      ESTOP0");
-   for(;;);
-}
-
-interrupt void RTOSINT_ISR(void)   // RTOS interrupt
-{
-  // Insert ISR Code here
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-}
-
-interrupt void EMUINT_ISR(void)    // Emulation interrupt
-{
-  // Insert ISR Code here
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-}
-
-interrupt void NMI_ISR(void)       // Non-maskable interrupt
-{
-  // Insert ISR Code here
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-}
-
-interrupt void ILLEGAL_ISR(void)   // Illegal operation TRAP
-{
-  // Insert ISR Code here
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm("          ESTOP0");
-  for(;;);
-
-}
-
-
-interrupt void USER1_ISR(void)     // User Defined trap 1
-{
-  // Insert ISR Code here
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-
-}
-
-interrupt void USER2_ISR(void)     // User Defined trap 2
-{
-  // Insert ISR Code here
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-
-
-}
-
-interrupt void USER3_ISR(void)     // User Defined trap 3
-{
-  // Insert ISR Code here
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-}
-
-interrupt void USER4_ISR(void)     // User Defined trap 4
-{
-  // Insert ISR Code here
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-}
-
-interrupt void USER5_ISR(void)     // User Defined trap 5
-{
-  // Insert ISR Code here
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-}
-
-interrupt void USER6_ISR(void)     // User Defined trap 6
-{
-  // Insert ISR Code here
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-}
-
-interrupt void USER7_ISR(void)     // User Defined trap 7
-{
-  // Insert ISR Code here
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-}
-
-interrupt void USER8_ISR(void)     // User Defined trap 8
-{
-  // Insert ISR Code here
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-}
-
-interrupt void USER9_ISR(void)     // User Defined trap 9
-{
-  // Insert ISR Code here
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-}
-
-interrupt void USER10_ISR(void)    // User Defined trap 10
-{
-  // Insert ISR Code here
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-}
-
-interrupt void USER11_ISR(void)    // User Defined trap 11
-{
-  // Insert ISR Code here
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-}
-
-interrupt void USER12_ISR(void)     // User Defined trap 12
-{
- // Insert ISR Code here
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-
-}
-
-// -----------------------------------------------------------
-// PIE Group 1 - MUXed into CPU INT1
-// -----------------------------------------------------------
-
-// INT1.1
-interrupt void SEQ1INT_ISR(void)   //SEQ1 ADC
-{
-  // Insert ISR Code here
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-
-  asm ("      ESTOP0");
-  for(;;);
-
-}
-
-// INT1.2
-interrupt void SEQ2INT_ISR(void)  //SEQ2 ADC
-{
-
-  // Insert ISR Code here
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-
-  asm("	  ESTOP0");
-  for(;;);
-
-}
-// INT1.3 - Reserved
-
-// INT1.4
-interrupt void  XINT1_ISR(void)
-{
-  // Insert ISR Code here
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-
-}
-
-// INT1.5
-interrupt void  XINT2_ISR(void)
-{
-  // Insert ISR Code here
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-
-}
-
-// INT1.6
-interrupt void  ADCINT_ISR(void)     // ADC
-{
-  // Insert ISR Code here
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-}
-
-// INT1.7
-interrupt void  TINT0_ISR(void)      // CPU-Timer 0
-{
-  // Insert ISR Code here
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-}
-
-
-// INT1.8
-interrupt void  WAKEINT_ISR(void)    // WD, LOW Power
-{
-  // Insert ISR Code here
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-}
-
-
-// -----------------------------------------------------------
-// PIE Group 2 - MUXed into CPU INT2
-// -----------------------------------------------------------
-
-// INT2.1
-interrupt void EPWM1_TZINT_ISR(void)    // EPWM-1
-{
-  // Insert ISR Code here
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP2;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-}
-
-// INT2.2
-interrupt void EPWM2_TZINT_ISR(void)    // EPWM-2
-{
-  // Insert ISR Code here
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP2;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-}
-
-// INT2.3
-interrupt void EPWM3_TZINT_ISR(void)    // EPWM-3
-{
-  // Insert ISR Code here
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP2;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-}
-
-
-// INT2.4
-interrupt void EPWM4_TZINT_ISR(void)    // EPWM-4
-{
-  // Insert ISR Code here
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP2;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-}
-
-
-// INT2.5
-interrupt void EPWM5_TZINT_ISR(void)    // EPWM-5
-{
-  // Insert ISR Code here
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP2;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-}
-
-// INT2.6
-interrupt void EPWM6_TZINT_ISR(void)   // EPWM-6
-{
-  // Insert ISR Code here
-
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP2;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-}
-
-// INT2.7 - Reserved
-// INT2.8 - Reserved
-
-// -----------------------------------------------------------
-// PIE Group 3 - MUXed into CPU INT3
-// -----------------------------------------------------------
-
-// INT 3.1
-interrupt void EPWM1_INT_ISR(void)     // EPWM-1
-{
-  // Insert ISR Code here
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-}
-
-// INT3.2
-interrupt void EPWM2_INT_ISR(void)     // EPWM-2
-{
-  // Insert ISR Code here
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-}
-
-// INT3.3
-interrupt void EPWM3_INT_ISR(void)    // EPWM-3
-{
-  // Insert ISR Code here
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-}
-
-// INT3.4
-interrupt void EPWM4_INT_ISR(void)    // EPWM-4
-{
-  // Insert ISR Code here
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-}
-
-// INT3.5
-interrupt void EPWM5_INT_ISR(void)    // EPWM-5
-{
-  // Insert ISR Code here
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-}
-
-// INT3.6
-interrupt void EPWM6_INT_ISR(void)    // EPWM-6
-{
-  // Insert ISR Code here
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-}
-
-// INT3.7 - Reserved
-// INT3.8 - Reserved
-
-
-// -----------------------------------------------------------
-// PIE Group 4 - MUXed into CPU INT4
-// -----------------------------------------------------------
-
-// INT 4.1
-interrupt void ECAP1_INT_ISR(void)    // ECAP-1
-{
-  // Insert ISR Code here
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP4;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-}
-
-// INT4.2
-interrupt void ECAP2_INT_ISR(void)    // ECAP-2
-{
-  // Insert ISR Code here
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP4;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-}
-
-// INT4.3
-interrupt void ECAP3_INT_ISR(void)    // ECAP-3
-{
-  // Insert ISR Code here
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP4;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-}
-
-// INT4.4
-interrupt void ECAP4_INT_ISR(void)     // ECAP-4
-{
-  // Insert ISR Code here
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP4;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-}
-
-// INT4.5
-interrupt void ECAP5_INT_ISR(void)     // ECAP-5
-{
-  // Insert ISR Code here
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP4;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-}
-// INT4.6
-interrupt void ECAP6_INT_ISR(void)     // ECAP-6
-{
-  // Insert ISR Code here
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP4;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-}
-// INT4.7 - Reserved
-// INT4.8 - Reserved
-
-// -----------------------------------------------------------
-// PIE Group 5 - MUXed into CPU INT5
-// -----------------------------------------------------------
-
-// INT 5.1
-interrupt void EQEP1_INT_ISR(void)    // EQEP-1
-{
-  // Insert ISR Code here
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP5;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-}
-
-// INT5.2
-interrupt void EQEP2_INT_ISR(void)    // EQEP-2
-{
-  // Insert ISR Code here
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP5;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-}
-
-// INT5.3 - Reserved
-// INT5.4 - Reserved
-// INT5.5 - Reserved
-// INT5.6 - Reserved
-// INT5.7 - Reserved
-// INT5.8 - Reserved
-
-// -----------------------------------------------------------
-// PIE Group 6 - MUXed into CPU INT6
-// -----------------------------------------------------------
-
-// INT6.1
-interrupt void SPIRXINTA_ISR(void)    // SPI-A
-{
-  // Insert ISR Code here
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP6;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-   asm ("      ESTOP0");
-   for(;;);
-}
-
-// INT6.2
-interrupt void SPITXINTA_ISR(void)     // SPI-A
-{
-  // Insert ISR Code here
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP6;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-   asm ("      ESTOP0");
-   for(;;);
-}
-
-// INT6.3
-interrupt void MRINTB_ISR(void)     // McBSP-B
-{
-  // Insert ISR Code here
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP6;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-}
-
-// INT6.4
-interrupt void MXINTB_ISR(void)     // McBSP-B
-{
-  // Insert ISR Code here
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP6;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-}
-
-// INT6.5
-interrupt void MRINTA_ISR(void)     // McBSP-A
-{
-  // Insert ISR Code here
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP6;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-   asm ("      ESTOP0");
-   for(;;);
-}
-
-// INT6.6
-interrupt void MXINTA_ISR(void)     // McBSP-A
-{
-  // Insert ISR Code here
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP6;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-   asm ("      ESTOP0");
-   for(;;);
-}
-
-// INT6.7 - Reserved
-// INT6.8 - Reserved
-
-
-
-
-// -----------------------------------------------------------
-// PIE Group 7 - MUXed into CPU INT7
-// -----------------------------------------------------------
-
-// INT7.1
-interrupt void DINTCH1_ISR(void)     // DMA
-{
-  // Insert ISR Code here
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP7;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-   asm ("      ESTOP0");
-   for(;;);
-}
-
-// INT7.2
-interrupt void DINTCH2_ISR(void)     // DMA
-{
-  // Insert ISR Code here
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP7;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-   asm ("      ESTOP0");
-   for(;;);
-}
-
-// INT7.3
-interrupt void DINTCH3_ISR(void)     // DMA
-{
-  // Insert ISR Code here
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP7;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-   asm ("      ESTOP0");
-   for(;;);
-}
-
-// INT7.4
-interrupt void DINTCH4_ISR(void)     // DMA
-{
-  // Insert ISR Code here
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP7;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-   asm ("      ESTOP0");
-   for(;;);
-}
-
-// INT7.5
-interrupt void DINTCH5_ISR(void)     // DMA
-{
-  // Insert ISR Code here
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP7;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-   asm ("      ESTOP0");
-   for(;;);
-}
-
-// INT7.6
-interrupt void DINTCH6_ISR(void)     // DMA
-{
-  // Insert ISR Code here
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP7;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-   asm ("      ESTOP0");
-   for(;;);
-}
-
-// INT7.7 - Reserved
-// INT7.8 - Reserved
-
-// -----------------------------------------------------------
-// PIE Group 8 - MUXed into CPU INT8
-// -----------------------------------------------------------
-
-// INT8.1
-interrupt void I2CINT1A_ISR(void)     // I2C-A
-{
-  // Insert ISR Code here
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP8;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-}
-
-// INT8.2
-interrupt void I2CINT2A_ISR(void)     // I2C-A
-{
-  // Insert ISR Code here
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP8;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-}
-
-// INT8.3 - Reserved
-// INT8.4 - Reserved
-
-// INT8.5
-interrupt void SCIRXINTC_ISR(void)     // SCI-C
-{
-  // Insert ISR Code here
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP8;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-
-}
-
-// INT8.6
-interrupt void SCITXINTC_ISR(void)     // SCI-C
-{
-  // Insert ISR Code here
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP8;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-
-}
-
-// INT8.7 - Reserved
-// INT8.8 - Reserved
-
-
-// -----------------------------------------------------------
-// PIE Group 9 - MUXed into CPU INT9
-// -----------------------------------------------------------
-
-// INT9.1
-interrupt void SCIRXINTA_ISR(void)     // SCI-A
-{
-  // Insert ISR Code here
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP9;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-
-}
-
-// INT9.2
-interrupt void SCITXINTA_ISR(void)     // SCI-A
-{
-  // Insert ISR Code here
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP9;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-
-}
-
-
-// INT9.3
-interrupt void SCIRXINTB_ISR(void)     // SCI-B
-{
-  // Insert ISR Code here
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP9;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-
-}
-
-// INT9.4
-interrupt void SCITXINTB_ISR(void)     // SCI-B
-{
-  // Insert ISR Code here
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP9;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-
-}
-
-// INT9.5
-interrupt void ECAN0INTA_ISR(void)  // eCAN-A
-{
-  // Insert ISR Code here
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP9;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-
-}
-
-// INT9.6
-interrupt void ECAN1INTA_ISR(void)  // eCAN-A
-{
-  // Insert ISR Code here
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP9;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-
-}
-
-// INT9.7
-interrupt void ECAN0INTB_ISR(void)  // eCAN-B
-{
-  // Insert ISR Code here
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP9;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-
-}
-
-// INT9.8
-interrupt void ECAN1INTB_ISR(void)  // eCAN-B
-{
-  // Insert ISR Code here
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP9;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-
-}
-
-// -----------------------------------------------------------
-// PIE Group 10 - MUXed into CPU INT10
-// -----------------------------------------------------------
-
-// INT10.1 - Reserved
-// INT10.2 - Reserved
-// INT10.3 - Reserved
-// INT10.4 - Reserved
-// INT10.5 - Reserved
-// INT10.6 - Reserved
-// INT10.7 - Reserved
-// INT10.8 - Reserved
-
-
-// -----------------------------------------------------------
-// PIE Group 11 - MUXed into CPU INT11
-// -----------------------------------------------------------
-
-// INT11.1 - Reserved
-// INT11.2 - Reserved
-// INT11.3 - Reserved
-// INT11.4 - Reserved
-// INT11.5 - Reserved
-// INT11.6 - Reserved
-// INT11.7 - Reserved
-// INT11.8 - Reserved
-
-// -----------------------------------------------------------
-// PIE Group 12 - MUXed into CPU INT12
-// -----------------------------------------------------------
-
-// INT12.1
-interrupt void XINT3_ISR(void)  // External Interrupt
-{
-  // Insert ISR Code here
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP12;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-
-}
-
-// INT12.2
-interrupt void XINT4_ISR(void)  // External Interrupt
-{
-  // Insert ISR Code here
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP12;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-
-}
-
-// INT12.3
-interrupt void XINT5_ISR(void)  // External Interrupt
-{
-  // Insert ISR Code here
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP12;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-
-}
-// INT12.4
-interrupt void XINT6_ISR(void)  // External Interrupt
-{
-  // Insert ISR Code here
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP12;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-
-}
-
-// INT12.5
-interrupt void XINT7_ISR(void)  // External Interrupt
-{
-  // Insert ISR Code here
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP12;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-
-}
-
-// INT12.6 - Reserved
-// INT12.7
-interrupt void LVF_ISR(void)  // Latched overflow
-{
-  // Insert ISR Code here
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP12;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-
-}
-// INT12.8
-interrupt void LUF_ISR(void)  // Latched underflow
-{
-  // Insert ISR Code here
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-  // PieCtrlRegs.PIEACK.all = PIEACK_GROUP12;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-  asm ("      ESTOP0");
-  for(;;);
-
-}
-
-//---------------------------------------------------------------------------
-// Catch All Default ISRs:
-//
-
-interrupt void PIE_RESERVED(void)  // Reserved space.  For test.
-{
-  asm ("      ESTOP0");
-  for(;;);
-}
-
-interrupt void rsvd_ISR(void)      // For test
-{
-  asm ("      ESTOP0");
-  for(;;);
-}
-
-//===========================================================================
-// End of file.
-//===========================================================================
-
diff --git a/Source/External/v120/DSP2833x_common/source/DSP2833x_DisInt.asm b/Source/External/v120/DSP2833x_common/source/DSP2833x_DisInt.asm
deleted file mode 100644
index 2e8e35c..0000000
--- a/Source/External/v120/DSP2833x_common/source/DSP2833x_DisInt.asm
+++ /dev/null
@@ -1,65 +0,0 @@
-;// TI File $Revision: /main/1 $
-;// Checkin $Date: August 18, 2006   13:46:09 $
-;//###########################################################################
-;//
-;// FILE:  DSP2833x_DisInt.asm	
-;//
-;// TITLE: Disable and Restore INTM and DBGM
-;// 
-;// Function Prototypes:
-;//
-;//      Uint16 DSP28x_DisableInt();
-;// and  void DSP28x_RestoreInt(Uint16 Stat0);
-;//
-;// Usage:
-;//
-;//      DSP28x_DisableInt() sets both the INTM and DBGM
-;//      bits to disable maskable interrupts.  Before doing
-;//      this, the current value of ST1 is stored on the stack
-;//      so that the values can be restored later.  The value
-;//      of ST1 before the masks are set is returned to the
-;//      user in AL.  This is then used to restore their state
-;//      via the DSP28x_RestoreInt(Uint16 ST1) function.
-;//
-;// Example
-;//
-;//   Uint16 StatusReg1    
-;//   StatusReg1 = DSP28x_DisableInt();
-;//
-;//   ... May also want to disable INTM here
-;// 
-;//   ... code here
-;//
-;//   DSP28x_RestoreInt(StatusReg1);
-;//
-;//   ... Restore INTM enable
-;//
-;//###########################################################################
-;// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-;// $Release Date: August 1, 2008 $
-;//###########################################################################
-
-
-
-
-   .def _DSP28x_DisableInt
-   .def _DSP28x_RestoreInt
-
-
-_DSP28x_DisableInt:
-    PUSH  ST1
-    SETC  INTM,DBGM
-    MOV   AL, *--SP
-    LRETR
-
-_DSP28x_RestoreInt:
-    MOV   *SP++, AL
-    POP   ST1
-    LRETR
-
-
-;//===========================================================================
-;// End of file.
-;//===========================================================================
-
-   
diff --git a/Source/External/v120/DSP2833x_common/source/DSP2833x_ECan.c b/Source/External/v120/DSP2833x_common/source/DSP2833x_ECan.c
deleted file mode 100644
index 612ccb1..0000000
--- a/Source/External/v120/DSP2833x_common/source/DSP2833x_ECan.c
+++ /dev/null
@@ -1,404 +0,0 @@
-// TI File $Revision: /main/8 $
-// Checkin $Date: June 25, 2008   15:19:07 $
-//###########################################################################
-//
-// FILE:	DSP2833x_ECan.c
-//
-// TITLE:	DSP2833x Enhanced CAN Initialization & Support Functions.
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-#include "DSP2833x_Device.h"     // DSP2833x Headerfile Include File
-#include "DSP2833x_Examples.h"   // DSP2833x Examples Include File
-
-
-//---------------------------------------------------------------------------
-// InitECan:
-//---------------------------------------------------------------------------
-// This function initializes the eCAN module to a known state.
-//
-void InitECan(void)
-{
-   InitECana();
-#if DSP28_ECANB
-   InitECanb();
-#endif // if DSP28_ECANB
-}
-
-void InitECana(void)		// Initialize eCAN-A module
-{
-/* Create a shadow register structure for the CAN control registers. This is
- needed, since only 32-bit access is allowed to these registers. 16-bit access
- to these registers could potentially corrupt the register contents or return
- false data. This is especially true while writing to/reading from a bit
- (or group of bits) among bits 16 - 31 */
-
-struct ECAN_REGS ECanaShadow;
-
-	EALLOW;		// EALLOW enables access to protected bits
-
-/* Configure eCAN RX and TX pins for CAN operation using eCAN regs*/
-
-    ECanaShadow.CANTIOC.all = ECanaRegs.CANTIOC.all;
-    ECanaShadow.CANTIOC.bit.TXFUNC = 1;
-    ECanaRegs.CANTIOC.all = ECanaShadow.CANTIOC.all;
-
-    ECanaShadow.CANRIOC.all = ECanaRegs.CANRIOC.all;
-    ECanaShadow.CANRIOC.bit.RXFUNC = 1;
-    ECanaRegs.CANRIOC.all = ECanaShadow.CANRIOC.all;
-
-/* Configure eCAN for HECC mode - (reqd to access mailboxes 16 thru 31) */
-									// HECC mode also enables time-stamping feature
-
-	ECanaShadow.CANMC.all = ECanaRegs.CANMC.all;
-	ECanaShadow.CANMC.bit.SCB = 1;
-	ECanaRegs.CANMC.all = ECanaShadow.CANMC.all;
-
-/* Initialize all bits of 'Master Control Field' to zero */
-// Some bits of MSGCTRL register come up in an unknown state. For proper operation,
-// all bits (including reserved bits) of MSGCTRL must be initialized to zero
-
-    ECanaMboxes.MBOX0.MSGCTRL.all = 0x00000000;
-    ECanaMboxes.MBOX1.MSGCTRL.all = 0x00000000;
-    ECanaMboxes.MBOX2.MSGCTRL.all = 0x00000000;
-    ECanaMboxes.MBOX3.MSGCTRL.all = 0x00000000;
-    ECanaMboxes.MBOX4.MSGCTRL.all = 0x00000000;
-    ECanaMboxes.MBOX5.MSGCTRL.all = 0x00000000;
-    ECanaMboxes.MBOX6.MSGCTRL.all = 0x00000000;
-    ECanaMboxes.MBOX7.MSGCTRL.all = 0x00000000;
-    ECanaMboxes.MBOX8.MSGCTRL.all = 0x00000000;
-    ECanaMboxes.MBOX9.MSGCTRL.all = 0x00000000;
-    ECanaMboxes.MBOX10.MSGCTRL.all = 0x00000000;
-    ECanaMboxes.MBOX11.MSGCTRL.all = 0x00000000;
-    ECanaMboxes.MBOX12.MSGCTRL.all = 0x00000000;
-    ECanaMboxes.MBOX13.MSGCTRL.all = 0x00000000;
-    ECanaMboxes.MBOX14.MSGCTRL.all = 0x00000000;
-    ECanaMboxes.MBOX15.MSGCTRL.all = 0x00000000;
-    ECanaMboxes.MBOX16.MSGCTRL.all = 0x00000000;
-    ECanaMboxes.MBOX17.MSGCTRL.all = 0x00000000;
-    ECanaMboxes.MBOX18.MSGCTRL.all = 0x00000000;
-    ECanaMboxes.MBOX19.MSGCTRL.all = 0x00000000;
-    ECanaMboxes.MBOX20.MSGCTRL.all = 0x00000000;
-    ECanaMboxes.MBOX21.MSGCTRL.all = 0x00000000;
-    ECanaMboxes.MBOX22.MSGCTRL.all = 0x00000000;
-    ECanaMboxes.MBOX23.MSGCTRL.all = 0x00000000;
-    ECanaMboxes.MBOX24.MSGCTRL.all = 0x00000000;
-    ECanaMboxes.MBOX25.MSGCTRL.all = 0x00000000;
-    ECanaMboxes.MBOX26.MSGCTRL.all = 0x00000000;
-    ECanaMboxes.MBOX27.MSGCTRL.all = 0x00000000;
-    ECanaMboxes.MBOX28.MSGCTRL.all = 0x00000000;
-    ECanaMboxes.MBOX29.MSGCTRL.all = 0x00000000;
-    ECanaMboxes.MBOX30.MSGCTRL.all = 0x00000000;
-    ECanaMboxes.MBOX31.MSGCTRL.all = 0x00000000;
-
-// TAn, RMPn, GIFn bits are all zero upon reset and are cleared again
-//	as a matter of precaution.
-
-	ECanaRegs.CANTA.all	= 0xFFFFFFFF;	/* Clear all TAn bits */
-
-	ECanaRegs.CANRMP.all = 0xFFFFFFFF;	/* Clear all RMPn bits */
-
-	ECanaRegs.CANGIF0.all = 0xFFFFFFFF;	/* Clear all interrupt flag bits */
-	ECanaRegs.CANGIF1.all = 0xFFFFFFFF;
-
-
-/* Configure bit timing parameters for eCANA*/
-	ECanaShadow.CANMC.all = ECanaRegs.CANMC.all;
-	ECanaShadow.CANMC.bit.CCR = 1 ;            // Set CCR = 1
-    ECanaRegs.CANMC.all = ECanaShadow.CANMC.all;
-
-    ECanaShadow.CANES.all = ECanaRegs.CANES.all;
-
-    do
-	{
-	    ECanaShadow.CANES.all = ECanaRegs.CANES.all;
-    } while(ECanaShadow.CANES.bit.CCE != 1 );  		// Wait for CCE bit to be set..
-
-    ECanaShadow.CANBTC.all = 0;
-
-    #if (CPU_FRQ_150MHZ)                       // CPU_FRQ_150MHz is defined in DSP2833x_Examples.h
-		/* The following block for all 150 MHz SYSCLKOUT (75 MHz CAN clock) - default. Bit rate = 1 Mbps
-		   See Note at End of File */
-			ECanaShadow.CANBTC.bit.BRPREG = 4;
-			ECanaShadow.CANBTC.bit.TSEG2REG = 2;
-			ECanaShadow.CANBTC.bit.TSEG1REG = 10;
-    #endif
-	#if (CPU_FRQ_100MHZ)                       // CPU_FRQ_100MHz is defined in DSP2833x_Examples.h
-	/* The following block is only for 100 MHz SYSCLKOUT (50 MHz CAN clock). Bit rate = 1 Mbps
-	   See Note at End of File */
-	    ECanaShadow.CANBTC.bit.BRPREG = 4;
-		ECanaShadow.CANBTC.bit.TSEG2REG = 1;
-		ECanaShadow.CANBTC.bit.TSEG1REG = 6;
-	#endif
-
-
-    ECanaShadow.CANBTC.bit.SAM = 1;
-    ECanaRegs.CANBTC.all = ECanaShadow.CANBTC.all;
-
-    ECanaShadow.CANMC.all = ECanaRegs.CANMC.all;
-	ECanaShadow.CANMC.bit.CCR = 0 ;            // Set CCR = 0
-    ECanaRegs.CANMC.all = ECanaShadow.CANMC.all;
-
-    ECanaShadow.CANES.all = ECanaRegs.CANES.all;
-
-    do
-    {
-       ECanaShadow.CANES.all = ECanaRegs.CANES.all;
-    } while(ECanaShadow.CANES.bit.CCE != 0 ); 		// Wait for CCE bit to be  cleared..
-
-/* Disable all Mailboxes  */
- 	ECanaRegs.CANME.all = 0;		// Required before writing the MSGIDs
-
-    EDIS;
-}
-
-
-#if (DSP28_ECANB)
-void InitECanb(void)		// Initialize eCAN-B module
-{
-/* Create a shadow register structure for the CAN control registers. This is
- needed, since only 32-bit access is allowed to these registers. 16-bit access
- to these registers could potentially corrupt the register contents or return
- false data. This is especially true while writing to/reading from a bit
- (or group of bits) among bits 16 - 31 */
-
-struct ECAN_REGS ECanbShadow;
-
-   EALLOW;		// EALLOW enables access to protected bits
-
-/* Configure eCAN RX and TX pins for CAN operation using eCAN regs*/
-
-    ECanbShadow.CANTIOC.all = ECanbRegs.CANTIOC.all;
-    ECanbShadow.CANTIOC.bit.TXFUNC = 1;
-    ECanbRegs.CANTIOC.all = ECanbShadow.CANTIOC.all;
-
-    ECanbShadow.CANRIOC.all = ECanbRegs.CANRIOC.all;
-    ECanbShadow.CANRIOC.bit.RXFUNC = 1;
-    ECanbRegs.CANRIOC.all = ECanbShadow.CANRIOC.all;
-
-/* Configure eCAN for HECC mode - (reqd to access mailboxes 16 thru 31) */
-
-	ECanbShadow.CANMC.all = ECanbRegs.CANMC.all;
-	ECanbShadow.CANMC.bit.SCB = 1;
-	ECanbRegs.CANMC.all = ECanbShadow.CANMC.all;
-
-/* Initialize all bits of 'Master Control Field' to zero */
-// Some bits of MSGCTRL register come up in an unknown state. For proper operation,
-// all bits (including reserved bits) of MSGCTRL must be initialized to zero
-
-    ECanbMboxes.MBOX0.MSGCTRL.all = 0x00000000;
-    ECanbMboxes.MBOX1.MSGCTRL.all = 0x00000000;
-    ECanbMboxes.MBOX2.MSGCTRL.all = 0x00000000;
-    ECanbMboxes.MBOX3.MSGCTRL.all = 0x00000000;
-    ECanbMboxes.MBOX4.MSGCTRL.all = 0x00000000;
-    ECanbMboxes.MBOX5.MSGCTRL.all = 0x00000000;
-    ECanbMboxes.MBOX6.MSGCTRL.all = 0x00000000;
-    ECanbMboxes.MBOX7.MSGCTRL.all = 0x00000000;
-    ECanbMboxes.MBOX8.MSGCTRL.all = 0x00000000;
-    ECanbMboxes.MBOX9.MSGCTRL.all = 0x00000000;
-    ECanbMboxes.MBOX10.MSGCTRL.all = 0x00000000;
-    ECanbMboxes.MBOX11.MSGCTRL.all = 0x00000000;
-    ECanbMboxes.MBOX12.MSGCTRL.all = 0x00000000;
-    ECanbMboxes.MBOX13.MSGCTRL.all = 0x00000000;
-    ECanbMboxes.MBOX14.MSGCTRL.all = 0x00000000;
-    ECanbMboxes.MBOX15.MSGCTRL.all = 0x00000000;
-    ECanbMboxes.MBOX16.MSGCTRL.all = 0x00000000;
-    ECanbMboxes.MBOX17.MSGCTRL.all = 0x00000000;
-    ECanbMboxes.MBOX18.MSGCTRL.all = 0x00000000;
-    ECanbMboxes.MBOX19.MSGCTRL.all = 0x00000000;
-    ECanbMboxes.MBOX20.MSGCTRL.all = 0x00000000;
-    ECanbMboxes.MBOX21.MSGCTRL.all = 0x00000000;
-    ECanbMboxes.MBOX22.MSGCTRL.all = 0x00000000;
-    ECanbMboxes.MBOX23.MSGCTRL.all = 0x00000000;
-    ECanbMboxes.MBOX24.MSGCTRL.all = 0x00000000;
-    ECanbMboxes.MBOX25.MSGCTRL.all = 0x00000000;
-    ECanbMboxes.MBOX26.MSGCTRL.all = 0x00000000;
-    ECanbMboxes.MBOX27.MSGCTRL.all = 0x00000000;
-    ECanbMboxes.MBOX28.MSGCTRL.all = 0x00000000;
-    ECanbMboxes.MBOX29.MSGCTRL.all = 0x00000000;
-    ECanbMboxes.MBOX30.MSGCTRL.all = 0x00000000;
-    ECanbMboxes.MBOX31.MSGCTRL.all = 0x00000000;
-
-// TAn, RMPn, GIFn bits are all zero upon reset and are cleared again
-//	as a matter of precaution.
-
-	ECanbRegs.CANTA.all	= 0xFFFFFFFF;	/* Clear all TAn bits */
-
-	ECanbRegs.CANRMP.all = 0xFFFFFFFF;	/* Clear all RMPn bits */
-
-	ECanbRegs.CANGIF0.all = 0xFFFFFFFF;	/* Clear all interrupt flag bits */
-	ECanbRegs.CANGIF1.all = 0xFFFFFFFF;
-
-
-/* Configure bit timing parameters for eCANB*/
-
-	ECanbShadow.CANMC.all = ECanbRegs.CANMC.all;
-	ECanbShadow.CANMC.bit.CCR = 1 ;            // Set CCR = 1
-    ECanbRegs.CANMC.all = ECanbShadow.CANMC.all;
-
-    ECanbShadow.CANES.all = ECanbRegs.CANES.all;
-
-    do
-	{
-	    ECanbShadow.CANES.all = ECanbRegs.CANES.all;
-	} while(ECanbShadow.CANES.bit.CCE != 1 ); 		// Wait for CCE bit to be  cleared..
-
-
-    ECanbShadow.CANBTC.all = 0;
-
-    #if (CPU_FRQ_150MHZ)                       // CPU_FRQ_150MHz is defined in DSP2833x_Examples.h
-	/* The following block for all 150 MHz SYSCLKOUT (75 MHz CAN clock) - default. Bit rate = 1 Mbps
-	   See Note at end of file */
-		ECanbShadow.CANBTC.bit.BRPREG = 4;
-		ECanbShadow.CANBTC.bit.TSEG2REG = 2;
-		ECanbShadow.CANBTC.bit.TSEG1REG = 10;
-	#endif
-	#if (CPU_FRQ_100MHZ)                       // CPU_FRQ_100MHz is defined in DSP2833x_Examples.h
-	/* The following block is only for 100 MHz SYSCLKOUT (50 MHz CAN clock). Bit rate = 1 Mbps
-	   See Note at end of file */
-	    ECanbShadow.CANBTC.bit.BRPREG = 4;
-		ECanbShadow.CANBTC.bit.TSEG2REG = 1;
-		ECanbShadow.CANBTC.bit.TSEG1REG = 6;
-	#endif
-
-    ECanbShadow.CANBTC.bit.SAM = 1;
-    ECanbRegs.CANBTC.all = ECanbShadow.CANBTC.all;
-
-    ECanbShadow.CANMC.all = ECanbRegs.CANMC.all;
-	ECanbShadow.CANMC.bit.CCR = 0 ;            // Set CCR = 0
-    ECanbRegs.CANMC.all = ECanbShadow.CANMC.all;
-
-    ECanbShadow.CANES.all = ECanbRegs.CANES.all;
-
-    do
-    {
-        ECanbShadow.CANES.all = ECanbRegs.CANES.all;
-    } while(ECanbShadow.CANES.bit.CCE != 0 ); 		// Wait for CCE bit to be  cleared..
-
-
-/* Disable all Mailboxes  */
- 	ECanbRegs.CANME.all = 0;		// Required before writing the MSGIDs
-
-    EDIS;
-}
-#endif // if DSP28_ECANB
-
-
-//---------------------------------------------------------------------------
-// Example: InitECanGpio:
-//---------------------------------------------------------------------------
-// This function initializes GPIO pins to function as eCAN pins
-//
-// Each GPIO pin can be configured as a GPIO pin or up to 3 different
-// peripheral functional pins. By default all pins come up as GPIO
-// inputs after reset.
-//
-// Caution:
-// Only one GPIO pin should be enabled for CANTXA/B operation.
-// Only one GPIO pin shoudl be enabled for CANRXA/B operation.
-// Comment out other unwanted lines.
-
-
-void InitECanGpio(void)
-{
-   InitECanaGpio();
-#if (DSP28_ECANB)
-   InitECanbGpio();
-#endif // if DSP28_ECANB
-}
-
-void InitECanaGpio(void)
-{
-   EALLOW;
-
-/* Enable internal pull-up for the selected CAN pins */
-// Pull-ups can be enabled or disabled by the user.
-// This will enable the pullups for the specified pins.
-// Comment out other unwanted lines.
-
-	GpioCtrlRegs.GPAPUD.bit.GPIO30 = 0;	    // Enable pull-up for GPIO30 (CANRXA)
-//	GpioCtrlRegs.GPAPUD.bit.GPIO18 = 0;	    // Enable pull-up for GPIO18 (CANRXA)
-
-	GpioCtrlRegs.GPAPUD.bit.GPIO31 = 0;	    // Enable pull-up for GPIO31 (CANTXA)
-//	GpioCtrlRegs.GPAPUD.bit.GPIO19 = 0;	    // Enable pull-up for GPIO19 (CANTXA)
-
-/* Set qualification for selected CAN pins to asynch only */
-// Inputs are synchronized to SYSCLKOUT by default.
-// This will select asynch (no qualification) for the selected pins.
-
-    GpioCtrlRegs.GPAQSEL2.bit.GPIO30 = 3;   // Asynch qual for GPIO30 (CANRXA)
-//  GpioCtrlRegs.GPAQSEL2.bit.GPIO18 = 3;   // Asynch qual for GPIO18 (CANRXA)
-
-
-/* Configure eCAN-A pins using GPIO regs*/
-// This specifies which of the possible GPIO pins will be eCAN functional pins.
-
-	GpioCtrlRegs.GPAMUX2.bit.GPIO30 = 1;	// Configure GPIO30 for CANRXA operation
-//  GpioCtrlRegs.GPAMUX2.bit.GPIO18 = 3;	// Configure GPIO18 for CANRXA operation
-	GpioCtrlRegs.GPAMUX2.bit.GPIO31 = 1;	// Configure GPIO31 for CANTXA operation
-//  GpioCtrlRegs.GPAMUX2.bit.GPIO19 = 3;	// Configure GPIO19 for CANTXA operation
-
-    EDIS;
-}
-
-#if (DSP28_ECANB)
-void InitECanbGpio(void)
-{
-   EALLOW;
-
-/* Enable internal pull-up for the selected CAN pins */
-// Pull-ups can be enabled or disabled by the user.
-// This will enable the pullups for the specified pins.
-// Comment out other unwanted lines.
-
-	GpioCtrlRegs.GPAPUD.bit.GPIO8 = 0;	  // Enable pull-up for GPIO8  (CANTXB)
-//  GpioCtrlRegs.GPAPUD.bit.GPIO12 = 0;   // Enable pull-up for GPIO12 (CANTXB)
-//  GpioCtrlRegs.GPAPUD.bit.GPIO16 = 0;   // Enable pull-up for GPIO16 (CANTXB)
-//  GpioCtrlRegs.GPAPUD.bit.GPIO20 = 0;   // Enable pull-up for GPIO20 (CANTXB)
-
-	GpioCtrlRegs.GPAPUD.bit.GPIO10 = 0;	  // Enable pull-up for GPIO10 (CANRXB)
-//  GpioCtrlRegs.GPAPUD.bit.GPIO13 = 0;   // Enable pull-up for GPIO13 (CANRXB)
-//  GpioCtrlRegs.GPAPUD.bit.GPIO17 = 0;   // Enable pull-up for GPIO17 (CANRXB)
-//  GpioCtrlRegs.GPAPUD.bit.GPIO21 = 0;   // Enable pull-up for GPIO21 (CANRXB)
-
-/* Set qualification for selected CAN pins to asynch only */
-// Inputs are synchronized to SYSCLKOUT by default.
-// This will select asynch (no qualification) for the selected pins.
-// Comment out other unwanted lines.
-
-    GpioCtrlRegs.GPAQSEL1.bit.GPIO10 = 3; // Asynch qual for GPIO10 (CANRXB)
-//  GpioCtrlRegs.GPAQSEL1.bit.GPIO13 = 3; // Asynch qual for GPIO13 (CANRXB)
-//  GpioCtrlRegs.GPAQSEL2.bit.GPIO17 = 3; // Asynch qual for GPIO17 (CANRXB)
-//  GpioCtrlRegs.GPAQSEL2.bit.GPIO21 = 3; // Asynch qual for GPIO21 (CANRXB)
-
-/* Configure eCAN-B pins using GPIO regs*/
-// This specifies which of the possible GPIO pins will be eCAN functional pins.
-
-	GpioCtrlRegs.GPAMUX1.bit.GPIO8 = 2;   // Configure GPIO8 for CANTXB operation
-//  GpioCtrlRegs.GPAMUX1.bit.GPIO12 = 2;  // Configure GPIO12 for CANTXB operation
-//  GpioCtrlRegs.GPAMUX2.bit.GPIO16 = 2;  // Configure GPIO16 for CANTXB operation
-//  GpioCtrlRegs.GPAMUX2.bit.GPIO20 = 3;  // Configure GPIO20 for CANTXB operation
-
-	GpioCtrlRegs.GPAMUX1.bit.GPIO10 = 2;  // Configure GPIO10 for CANRXB operation
-//  GpioCtrlRegs.GPAMUX1.bit.GPIO13 = 2;  // Configure GPIO13 for CANRXB operation
-//  GpioCtrlRegs.GPAMUX2.bit.GPIO17 = 2;  // Configure GPIO17 for CANRXB operation
-//  GpioCtrlRegs.GPAMUX2.bit.GPIO21 = 3;  // Configure GPIO21 for CANRXB operation
-
-    EDIS;
-}
-#endif // if DSP28_ECANB
-
-/*
-Note: Bit timing parameters must be chosen based on the network parameters such
-as the sampling point desired and the propagation delay of the network.
-The propagation delay is a function of length of the cable, delay introduced by
-the transceivers and opto/galvanic-isolators (if any).
-
-The parameters used in this file must be changed taking into account the above
-mentioned factors in order to arrive at the bit-timing parameters suitable
-for a network.
-
-*/
diff --git a/Source/External/v120/DSP2833x_common/source/DSP2833x_ECap.c b/Source/External/v120/DSP2833x_common/source/DSP2833x_ECap.c
deleted file mode 100644
index cd1d24d..0000000
--- a/Source/External/v120/DSP2833x_common/source/DSP2833x_ECap.c
+++ /dev/null
@@ -1,255 +0,0 @@
-// TI File $Revision: /main/2 $
-// Checkin $Date: March 15, 2007   16:54:36 $
-//###########################################################################
-//
-// FILE:   DSP2833x_ECap.c
-//
-// TITLE:  DSP2833x eCAP Initialization & Support Functions.
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-#include "DSP2833x_Device.h"     // DSP2833x Headerfile Include File
-#include "DSP2833x_Examples.h"   // DSP2833x Examples Include File
-
-//---------------------------------------------------------------------------
-// InitECap:
-//---------------------------------------------------------------------------
-// This function initializes the eCAP(s) to a known state.
-//
-void InitECap(void)
-{
-   // Initialize eCAP1/2/3
-
-   //tbd...
-
-}
-
-//---------------------------------------------------------------------------
-// Example: InitECapGpio:
-//---------------------------------------------------------------------------
-// This function initializes GPIO pins to function as ECAP pins
-//
-// Each GPIO pin can be configured as a GPIO pin or up to 3 different
-// peripheral functional pins. By default all pins come up as GPIO
-// inputs after reset.
-//
-// Caution:
-// For each eCAP peripheral
-// Only one GPIO pin should be enabled for ECAP operation.
-// Comment out other unwanted lines.
-
-void InitECapGpio()
-{
-
-   InitECap1Gpio();
-#if (DSP28_ECAP2)
-   InitECap2Gpio();
-#endif // endif DSP28_ECAP2
-#if (DSP28_ECAP3)
-   InitECap3Gpio();
-#endif // endif DSP28_ECAP3
-#if (DSP28_ECAP4)
-   InitECap4Gpio();
-#endif // endif DSP28_ECAP4
-#if (DSP28_ECAP5)
-   InitECap5Gpio();
-#endif // endif DSP28_ECAP5
-#if (DSP28_ECAP6)
-   InitECap6Gpio();
-#endif // endif DSP28_ECAP6
-}
-
-void InitECap1Gpio(void)
-{
-   EALLOW;
-/* Enable internal pull-up for the selected pins */
-// Pull-ups can be enabled or disabled by the user.
-// This will enable the pullups for the specified pins.
-// Comment out other unwanted lines.
-
-// GpioCtrlRegs.GPAPUD.bit.GPIO5 = 0;      // Enable pull-up on GPIO5 (CAP1)
-   GpioCtrlRegs.GPAPUD.bit.GPIO24 = 0;     // Enable pull-up on GPIO24 (CAP1)
-// GpioCtrlRegs.GPBPUD.bit.GPIO34 = 0;     // Enable pull-up on GPIO34 (CAP1)
-
-
-// Inputs are synchronized to SYSCLKOUT by default.
-// Comment out other unwanted lines.
-
-// GpioCtrlRegs.GPAQSEL1.bit.GPIO5 = 0;    // Synch to SYSCLKOUT GPIO5 (CAP1)
-   GpioCtrlRegs.GPAQSEL2.bit.GPIO24 = 0;   // Synch to SYSCLKOUT GPIO24 (CAP1)
-// GpioCtrlRegs.GPBQSEL1.bit.GPIO34 = 0;   // Synch to SYSCLKOUT GPIO34 (CAP1)
-
-/* Configure eCAP-1 pins using GPIO regs*/
-// This specifies which of the possible GPIO pins will be eCAP1 functional pins.
-// Comment out other unwanted lines.
-
-// GpioCtrlRegs.GPAMUX1.bit.GPIO5 = 3;     // Configure GPIO5 as CAP1
-   GpioCtrlRegs.GPAMUX2.bit.GPIO24 = 1;    // Configure GPIO24 as CAP1
-// GpioCtrlRegs.GPBMUX1.bit.GPIO34 = 1;    // Configure GPIO24 as CAP1
-
-    EDIS;
-}
-
-#if DSP28_ECAP2
-void InitECap2Gpio(void)
-{
-   EALLOW;
-/* Enable internal pull-up for the selected pins */
-// Pull-ups can be enabled or disabled by the user.
-// This will enable the pullups for the specified pins.
-// Comment out other unwanted lines.
-
-   GpioCtrlRegs.GPAPUD.bit.GPIO7 = 0;     // Enable pull-up on GPIO7 (CAP2)
-// GpioCtrlRegs.GPAPUD.bit.GPIO25 = 0;    // Enable pull-up on GPIO25 (CAP2)
-// GpioCtrlRegs.GPBPUD.bit.GPIO37 = 0;    // Enable pull-up on GPIO37 (CAP2)
-
-// Inputs are synchronized to SYSCLKOUT by default.
-// Comment out other unwanted lines.
-
-   GpioCtrlRegs.GPAQSEL1.bit.GPIO7 = 0;    // Synch to SYSCLKOUT GPIO7 (CAP2)
-// GpioCtrlRegs.GPAQSEL2.bit.GPIO25 = 0;   // Synch to SYSCLKOUT GPIO25 (CAP2)
-// GpioCtrlRegs.GPBQSEL1.bit.GPIO37 = 0;   // Synch to SYSCLKOUT GPIO37 (CAP2)
-
-/* Configure eCAP-2 pins using GPIO regs*/
-// This specifies which of the possible GPIO pins will be eCAP2 functional pins.
-// Comment out other unwanted lines.
-
-   GpioCtrlRegs.GPAMUX1.bit.GPIO7 = 3;    // Configure GPIO7 as CAP2
-// GpioCtrlRegs.GPAMUX2.bit.GPIO25 = 1;   // Configure GPIO25 as CAP2
-// GpioCtrlRegs.GPBMUX1.bit.GPIO37 = 3;   // Configure GPIO37 as CAP2
-
-    EDIS;
-}
-#endif // endif DSP28_ECAP2
-
-#if DSP28_ECAP3
-void InitECap3Gpio(void)
-{
-   EALLOW;
-
-/* Enable internal pull-up for the selected pins */
-// Pull-ups can be enabled or disabled by the user.
-// This will enable the pullups for the specified pins.
-// Comment out other unwanted lines.
-
-   GpioCtrlRegs.GPAPUD.bit.GPIO9 = 0;      // Enable pull-up on GPIO9 (CAP3)
-// GpioCtrlRegs.GPAPUD.bit.GPIO26 = 0;     // Enable pull-up on GPIO26 (CAP3)
-
-// Inputs are synchronized to SYSCLKOUT by default.
-// Comment out other unwanted lines.
-
-   GpioCtrlRegs.GPAQSEL1.bit.GPIO9 = 0;    // Synch to SYSCLKOUT GPIO9 (CAP3)
-// GpioCtrlRegs.GPAQSEL2.bit.GPIO26 = 0;   // Synch to SYSCLKOUT GPIO26 (CAP3)
-
-/* Configure eCAP-3 pins using GPIO regs*/
-// This specifies which of the possible GPIO pins will be eCAP3 functional pins.
-// Comment out other unwanted lines.
-
-   GpioCtrlRegs.GPAMUX1.bit.GPIO9 = 3;     // Configure GPIO9 as CAP3
-// GpioCtrlRegs.GPAMUX2.bit.GPIO26 = 1;    // Configure GPIO26 as CAP3
-
-    EDIS;
-}
-#endif // endif DSP28_ECAP3
-
-
-#if DSP28_ECAP4
-void InitECap4Gpio(void)
-{
-   EALLOW;
-
-/* Enable internal pull-up for the selected pins */
-// Pull-ups can be enabled or disabled by the user.
-// This will enable the pullups for the specified pins.
-// Comment out other unwanted lines.
-
-   GpioCtrlRegs.GPAPUD.bit.GPIO11 = 0;   // Enable pull-up on GPIO11 (CAP4)
-// GpioCtrlRegs.GPAPUD.bit.GPIO27 = 0;   // Enable pull-up on GPIO27 (CAP4)
-
-// Inputs are synchronized to SYSCLKOUT by default.
-// Comment out other unwanted lines.
-
-   GpioCtrlRegs.GPAQSEL1.bit.GPIO11 = 0; // Synch to SYSCLKOUT GPIO11 (CAP4)
-// GpioCtrlRegs.GPAQSEL2.bit.GPIO27 = 0; // Synch to SYSCLKOUT GPIO27 (CAP4)
-
-/* Configure eCAP-4 pins using GPIO regs*/
-// This specifies which of the possible GPIO pins will be eCAP4 functional pins.
-// Comment out other unwanted lines.
-
-   GpioCtrlRegs.GPAMUX1.bit.GPIO11 = 3;  // Configure GPIO11 as CAP4
-// GpioCtrlRegs.GPAMUX2.bit.GPIO27 = 1;  // Configure GPIO27 as CAP4
-
-    EDIS;
-}
-#endif // endif DSP28_ECAP4
-
-
-#if DSP28_ECAP5
-void InitECap5Gpio(void)
-{
-   EALLOW;
-
-/* Enable internal pull-up for the selected pins */
-// Pull-ups can be enabled or disabled by the user.
-// This will enable the pullups for the specified pins.
-// Comment out other unwanted lines.
-
-   GpioCtrlRegs.GPAPUD.bit.GPIO3 = 0;     // Enable pull-up on GPIO3 (CAP5)
-// GpioCtrlRegs.GPBPUD.bit.GPIO48 = 0;    // Enable pull-up on GPIO48 (CAP5)
-
-// Inputs are synchronized to SYSCLKOUT by default.
-// Comment out other unwanted lines.
-
-   GpioCtrlRegs.GPAQSEL1.bit.GPIO3 = 0;  // Synch to SYSCLKOUT GPIO3 (CAP5)
-// GpioCtrlRegs.GPBQSEL2.bit.GPIO48 = 0; // Synch to SYSCLKOUT GPIO48 (CAP5)
-
-/* Configure eCAP-5 pins using GPIO regs*/
-// This specifies which of the possible GPIO pins will be eCAP5 functional pins.
-// Comment out other unwanted lines.
-
-   GpioCtrlRegs.GPAMUX1.bit.GPIO3 = 2;   // Configure GPIO3 as CAP5
-// GpioCtrlRegs.GPBMUX2.bit.GPIO48 = 1;  // Configure GPIO48 as CAP5
-
-    EDIS;
-}
-#endif // endif DSP28_ECAP5
-
-
-#if DSP28_ECAP6
-void InitECap6Gpio(void)
-{
-   EALLOW;
-
-/* Enable internal pull-up for the selected pins */
-// Pull-ups can be enabled or disabled by the user.
-// This will enable the pullups for the specified pins.
-// Comment out other unwanted lines.
-
-   GpioCtrlRegs.GPAPUD.bit.GPIO1 = 0;     // Enable pull-up on GPIO1 (CAP6)
-// GpioCtrlRegs.GPBPUD.bit.GPIO49 = 0;    // Enable pull-up on GPIO49 (CAP6)
-
-// Inputs are synchronized to SYSCLKOUT by default.
-// Comment out other unwanted lines.
-
-   GpioCtrlRegs.GPAQSEL1.bit.GPIO1 = 0;  // Synch to SYSCLKOUT GPIO1 (CAP6)
-// GpioCtrlRegs.GPBQSEL2.bit.GPIO49 = 0; // Synch to SYSCLKOUT GPIO49 (CAP6)
-
-/* Configure eCAP-5 pins using GPIO regs*/
-// This specifies which of the possible GPIO pins will be eCAP6 functional pins.
-// Comment out other unwanted lines.
-
-   GpioCtrlRegs.GPAMUX1.bit.GPIO1 = 2;   // Configure GPIO1 as CAP6
-// GpioCtrlRegs.GPBMUX2.bit.GPIO49 = 1;  // Configure GPIO49 as CAP6
-
-    EDIS;
-}
-#endif // endif DSP28_ECAP6
-
-
-
-//===========================================================================
-// End of file.
-//===========================================================================
diff --git a/Source/External/v120/DSP2833x_common/source/DSP2833x_EPwm.c b/Source/External/v120/DSP2833x_common/source/DSP2833x_EPwm.c
deleted file mode 100644
index 64f0e0f..0000000
--- a/Source/External/v120/DSP2833x_common/source/DSP2833x_EPwm.c
+++ /dev/null
@@ -1,316 +0,0 @@
-// TI File $Revision: /main/1 $
-// Checkin $Date: August 18, 2006   13:46:19 $
-//###########################################################################
-//
-// FILE:   DSP2833x_EPwm.c
-//
-// TITLE:  DSP2833x ePWM Initialization & Support Functions.
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-#include "DSP2833x_Device.h"     // DSP2833x Headerfile Include File
-#include "DSP2833x_Examples.h"   // DSP2833x Examples Include File
-
-//---------------------------------------------------------------------------
-// InitEPwm: 
-//---------------------------------------------------------------------------
-// This function initializes the ePWM(s) to a known state.
-//
-void InitEPwm(void)
-{
-   // Initialize ePWM1/2/3/4/5/6
-
-   //tbd...
- 
-}
-
-//---------------------------------------------------------------------------
-// Example: InitEPwmGpio: 
-//---------------------------------------------------------------------------
-// This function initializes GPIO pins to function as ePWM pins
-//
-// Each GPIO pin can be configured as a GPIO pin or up to 3 different
-// peripheral functional pins. By default all pins come up as GPIO
-// inputs after reset.  
-// 
-
-void InitEPwmGpio(void)
-{
-   InitEPwm1Gpio();
-   InitEPwm2Gpio();
-   InitEPwm3Gpio();
-#if DSP28_EPWM4
-   InitEPwm4Gpio();
-#endif // endif DSP28_EPWM4
-#if DSP28_EPWM5    
-   InitEPwm5Gpio();
-#endif // endif DSP28_EPWM5
-#if DSP28_EPWM6
-   InitEPwm6Gpio();
-#endif // endif DSP28_EPWM6 
-}
-
-void InitEPwm1Gpio(void)
-{
-   EALLOW;
-   
-/* Enable internal pull-up for the selected pins */
-// Pull-ups can be enabled or disabled by the user. 
-// This will enable the pullups for the specified pins.
-// Comment out other unwanted lines.
-
-    GpioCtrlRegs.GPAPUD.bit.GPIO0 = 0;    // Enable pull-up on GPIO0 (EPWM1A)
-    GpioCtrlRegs.GPAPUD.bit.GPIO1 = 0;    // Enable pull-up on GPIO1 (EPWM1B)   
-   
-/* Configure ePWM-1 pins using GPIO regs*/
-// This specifies which of the possible GPIO pins will be ePWM1 functional pins.
-// Comment out other unwanted lines.
-
-    GpioCtrlRegs.GPAMUX1.bit.GPIO0 = 1;   // Configure GPIO0 as EPWM1A
-    GpioCtrlRegs.GPAMUX1.bit.GPIO1 = 1;   // Configure GPIO1 as EPWM1B
-   
-    EDIS;
-}
-
-void InitEPwm2Gpio(void)
-{
-   EALLOW;
-	
-/* Enable internal pull-up for the selected pins */
-// Pull-ups can be enabled or disabled by the user. 
-// This will enable the pullups for the specified pins.
-// Comment out other unwanted lines.
-
-    GpioCtrlRegs.GPAPUD.bit.GPIO2 = 0;    // Enable pull-up on GPIO2 (EPWM2A)
-    GpioCtrlRegs.GPAPUD.bit.GPIO3 = 0;    // Enable pull-up on GPIO3 (EPWM3B)
-
-/* Configure ePWM-2 pins using GPIO regs*/
-// This specifies which of the possible GPIO pins will be ePWM2 functional pins.
-// Comment out other unwanted lines.
-
-    GpioCtrlRegs.GPAMUX1.bit.GPIO2 = 1;   // Configure GPIO2 as EPWM2A
-    GpioCtrlRegs.GPAMUX1.bit.GPIO3 = 1;   // Configure GPIO3 as EPWM2B
-   
-    EDIS;
-}
-
-void InitEPwm3Gpio(void)
-{
-   EALLOW;
-   
-/* Enable internal pull-up for the selected pins */
-// Pull-ups can be enabled or disabled by the user. 
-// This will enable the pullups for the specified pins.
-// Comment out other unwanted lines.
-
-    GpioCtrlRegs.GPAPUD.bit.GPIO4 = 0;    // Enable pull-up on GPIO4 (EPWM3A)
-    GpioCtrlRegs.GPAPUD.bit.GPIO5 = 0;    // Enable pull-up on GPIO5 (EPWM3B)
-       
-/* Configure ePWM-3 pins using GPIO regs*/
-// This specifies which of the possible GPIO pins will be ePWM3 functional pins.
-// Comment out other unwanted lines.
-
-    GpioCtrlRegs.GPAMUX1.bit.GPIO4 = 1;   // Configure GPIO4 as EPWM3A
-    GpioCtrlRegs.GPAMUX1.bit.GPIO5 = 1;   // Configure GPIO5 as EPWM3B
-	
-    EDIS;
-}
-
-
-#if DSP28_EPWM4
-void InitEPwm4Gpio(void)
-{
-   EALLOW;
-/* Enable internal pull-up for the selected pins */
-// Pull-ups can be enabled or disabled by the user. 
-// This will enable the pullups for the specified pins.
-// Comment out other unwanted lines.
-
-    GpioCtrlRegs.GPAPUD.bit.GPIO6 = 0;    // Enable pull-up on GPIO6 (EPWM4A)
-    GpioCtrlRegs.GPAPUD.bit.GPIO7 = 0;    // Enable pull-up on GPIO7 (EPWM4B)
-
-/* Configure ePWM-4 pins using GPIO regs*/
-// This specifies which of the possible GPIO pins will be ePWM4 functional pins.
-// Comment out other unwanted lines.
-
-    GpioCtrlRegs.GPAMUX1.bit.GPIO6 = 1;   // Configure GPIO6 as EPWM4A
-    GpioCtrlRegs.GPAMUX1.bit.GPIO7 = 1;   // Configure GPIO7 as EPWM4B
-	
-    EDIS;
-}
-#endif // endif DSP28_EPWM4  
-
-
-#if DSP28_EPWM5
-void InitEPwm5Gpio(void)
-{
-   EALLOW;
-/* Enable internal pull-up for the selected pins */
-// Pull-ups can be enabled or disabled by the user. 
-// This will enable the pullups for the specified pins.
-// Comment out other unwanted lines.
-
-    GpioCtrlRegs.GPAPUD.bit.GPIO8 = 0;    // Enable pull-up on GPIO8 (EPWM5A)
-    GpioCtrlRegs.GPAPUD.bit.GPIO9 = 0;    // Enable pull-up on GPIO9 (EPWM5B)
-
-/* Configure ePWM-5 pins using GPIO regs*/
-// This specifies which of the possible GPIO pins will be ePWM5 functional pins.
-// Comment out other unwanted lines.
-
-    GpioCtrlRegs.GPAMUX1.bit.GPIO8 = 1;   // Configure GPIO8 as EPWM5A
-    GpioCtrlRegs.GPAMUX1.bit.GPIO9 = 1;   // Configure GPIO9 as EPWM5B
-	
-    EDIS;
-}
-#endif // endif DSP28_EPWM5
-
-
-#if DSP28_EPWM6
-void InitEPwm6Gpio(void)
-{
-   EALLOW;
-
-/* Enable internal pull-up for the selected pins */
-// Pull-ups can be enabled or disabled by the user. 
-// This will enable the pullups for the specified pins.
-// Comment out other unwanted lines.
-
-    GpioCtrlRegs.GPAPUD.bit.GPIO10 = 0;    // Enable pull-up on GPIO10 (EPWM6A)
-    GpioCtrlRegs.GPAPUD.bit.GPIO11 = 0;    // Enable pull-up on GPIO11 (EPWM6B)
-
-/* Configure ePWM-6 pins using GPIO regs*/
-// This specifies which of the possible GPIO pins will be ePWM6 functional pins.
-// Comment out other unwanted lines.
-
-    GpioCtrlRegs.GPAMUX1.bit.GPIO10 = 1;   // Configure GPIO10 as EPWM6A
-    GpioCtrlRegs.GPAMUX1.bit.GPIO11 = 1;   // Configure GPIO11 as EPWM6B
-	
-    EDIS;
-}
-#endif // endif DSP28_EPWM6  
-
-//---------------------------------------------------------------------------
-// Example: InitEPwmSyncGpio: 
-//---------------------------------------------------------------------------
-// This function initializes GPIO pins to function as ePWM Synch pins
-//
-
-void InitEPwmSyncGpio(void)
-{
-
-   EALLOW;
-
-/* Configure EPWMSYNCI  */
-   
-/* Enable internal pull-up for the selected pins */
-// Pull-ups can be enabled or disabled by the user. 
-// This will enable the pullups for the specified pins.
-// Comment out other unwanted lines.
-
-   GpioCtrlRegs.GPAPUD.bit.GPIO6 = 0;    // Enable pull-up on GPIO6 (EPWMSYNCI)
-// GpioCtrlRegs.GPBPUD.bit.GPIO32 = 0;   // Enable pull-up on GPIO32 (EPWMSYNCI)    
-
-/* Set qualification for selected pins to asynch only */
-// This will select synch to SYSCLKOUT for the selected pins.
-// Comment out other unwanted lines.
-
-   GpioCtrlRegs.GPAQSEL1.bit.GPIO6 = 0;   // Synch to SYSCLKOUT GPIO6 (EPWMSYNCI)
-// GpioCtrlRegs.GPBQSEL1.bit.GPIO32 = 0;  // Synch to SYSCLKOUT GPIO32 (EPWMSYNCI)    
-
-/* Configure EPwmSync pins using GPIO regs*/
-// This specifies which of the possible GPIO pins will be EPwmSync functional pins.
-// Comment out other unwanted lines.   
-
-   GpioCtrlRegs.GPAMUX1.bit.GPIO6 = 2;    // Enable pull-up on GPIO6 (EPWMSYNCI)
-// GpioCtrlRegs.GPBMUX1.bit.GPIO32 = 2;   // Enable pull-up on GPIO32 (EPWMSYNCI)    
-
-
-
-/* Configure EPWMSYNC0  */
-
-/* Enable internal pull-up for the selected pins */
-// Pull-ups can be enabled or disabled by the user. 
-// This will enable the pullups for the specified pins.
-// Comment out other unwanted lines.
-
-// GpioCtrlRegs.GPAPUD.bit.GPIO6 = 0;    // Enable pull-up on GPIO6 (EPWMSYNC0)
-   GpioCtrlRegs.GPBPUD.bit.GPIO33 = 0;   // Enable pull-up on GPIO33 (EPWMSYNC0)    
-
-// GpioCtrlRegs.GPAMUX1.bit.GPIO6 = 3;    // Enable pull-up on GPIO6 (EPWMSYNC0)
-   GpioCtrlRegs.GPBMUX1.bit.GPIO33 = 2;   // Enable pull-up on GPIO33 (EPWMSYNC0)    
-
-}
-
-
-
-//---------------------------------------------------------------------------
-// Example: InitTzGpio: 
-//---------------------------------------------------------------------------
-// This function initializes GPIO pins to function as Trip Zone (TZ) pins
-//
-// Each GPIO pin can be configured as a GPIO pin or up to 3 different
-// peripheral functional pins. By default all pins come up as GPIO
-// inputs after reset.  
-// 
-
-void InitTzGpio(void)
-{
-   EALLOW;
-   
-/* Enable internal pull-up for the selected pins */
-// Pull-ups can be enabled or disabled by the user. 
-// This will enable the pullups for the specified pins.
-// Comment out other unwanted lines.
-   GpioCtrlRegs.GPAPUD.bit.GPIO12 = 0;    // Enable pull-up on GPIO12 (TZ1)
-   GpioCtrlRegs.GPAPUD.bit.GPIO13 = 0;    // Enable pull-up on GPIO13 (TZ2)
-   GpioCtrlRegs.GPAPUD.bit.GPIO14 = 0;    // Enable pull-up on GPIO14 (TZ3)
-   GpioCtrlRegs.GPAPUD.bit.GPIO15 = 0;    // Enable pull-up on GPIO15 (TZ4)
-
-   GpioCtrlRegs.GPAPUD.bit.GPIO16 = 0;    // Enable pull-up on GPIO16 (TZ5)
-// GpioCtrlRegs.GPAPUD.bit.GPIO28 = 0;    // Enable pull-up on GPIO28 (TZ5)
-
-   GpioCtrlRegs.GPAPUD.bit.GPIO17 = 0;    // Enable pull-up on GPIO17 (TZ6) 
-// GpioCtrlRegs.GPAPUD.bit.GPIO29 = 0;    // Enable pull-up on GPIO29 (TZ6)  
-   
-/* Set qualification for selected pins to asynch only */
-// Inputs are synchronized to SYSCLKOUT by default.  
-// This will select asynch (no qualification) for the selected pins.
-// Comment out other unwanted lines.
-
-   GpioCtrlRegs.GPAQSEL1.bit.GPIO12 = 3;  // Asynch input GPIO12 (TZ1)
-   GpioCtrlRegs.GPAQSEL1.bit.GPIO13 = 3;  // Asynch input GPIO13 (TZ2)
-   GpioCtrlRegs.GPAQSEL1.bit.GPIO14 = 3;  // Asynch input GPIO14 (TZ3)
-   GpioCtrlRegs.GPAQSEL1.bit.GPIO15 = 3;  // Asynch input GPIO15 (TZ4)
-
-   GpioCtrlRegs.GPAQSEL2.bit.GPIO16 = 3;  // Asynch input GPIO16 (TZ5)
-// GpioCtrlRegs.GPAQSEL2.bit.GPIO28 = 3;  // Asynch input GPIO28 (TZ5)
-
-   GpioCtrlRegs.GPAQSEL2.bit.GPIO17 = 3;  // Asynch input GPIO17 (TZ6) 
-// GpioCtrlRegs.GPAQSEL2.bit.GPIO29 = 3;  // Asynch input GPIO29 (TZ6)  
-
-   
-/* Configure TZ pins using GPIO regs*/
-// This specifies which of the possible GPIO pins will be TZ functional pins.
-// Comment out other unwanted lines.   
-   GpioCtrlRegs.GPAMUX1.bit.GPIO12 = 1;  // Configure GPIO12 as TZ1
-   GpioCtrlRegs.GPAMUX1.bit.GPIO13 = 1;  // Configure GPIO13 as TZ2
-   GpioCtrlRegs.GPAMUX1.bit.GPIO14 = 1;  // Configure GPIO14 as TZ3
-   GpioCtrlRegs.GPAMUX1.bit.GPIO15 = 1;  // Configure GPIO15 as TZ4
-
-   GpioCtrlRegs.GPAMUX2.bit.GPIO16 = 3;  // Configure GPIO16 as TZ5
-// GpioCtrlRegs.GPAMUX2.bit.GPIO28 = 3;  // Configure GPIO28 as TZ5
-
-   GpioCtrlRegs.GPAMUX2.bit.GPIO17 = 3;  // Configure GPIO17 as TZ6               
-// GpioCtrlRegs.GPAMUX2.bit.GPIO29 = 3;  // Configure GPIO29 as TZ6  
-
-   EDIS;
-}
-
-
-
-//===========================================================================
-// End of file.
-//===========================================================================
diff --git a/Source/External/v120/DSP2833x_common/source/DSP2833x_EQep.c b/Source/External/v120/DSP2833x_common/source/DSP2833x_EQep.c
deleted file mode 100644
index cb6ad92..0000000
--- a/Source/External/v120/DSP2833x_common/source/DSP2833x_EQep.c
+++ /dev/null
@@ -1,154 +0,0 @@
-// TI File $Revision: /main/3 $
-// Checkin $Date: July 27, 2007   11:55:20 $
-//###########################################################################
-//
-// FILE:   DSP2833x_EQep.c
-//
-// TITLE:  DSP2833x eQEP Initialization & Support Functions.
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-#include "DSP2833x_Device.h"     // DSP2833x Headerfile Include File
-#include "DSP2833x_Examples.h"   // DSP2833x Examples Include File
-
-//---------------------------------------------------------------------------
-// InitEQep:
-//---------------------------------------------------------------------------
-// This function initializes the eQEP(s) to a known state.
-//
-void InitEQep(void)
-{
-   // Initialize eQEP1/2
-
-   //tbd...
-
-}
-
-//---------------------------------------------------------------------------
-// Example: InitEQepGpio:
-//---------------------------------------------------------------------------
-// This function initializes GPIO pins to function as eQEP pins
-//
-// Each GPIO pin can be configured as a GPIO pin or up to 3 different
-// peripheral functional pins. By default all pins come up as GPIO
-// inputs after reset.
-//
-// Caution:
-// For each eQEP peripheral
-// Only one GPIO pin should be enabled for EQEPxA operation.
-// Only one GPIO pin should be enabled for EQEPxB operation.
-// Only one GPIO pin should be enabled for EQEPxS operation.
-// Only one GPIO pin should be enabled for EQEPxI operation.
-// Comment out other unwanted lines.
-
-void InitEQepGpio()
-{
-#if DSP28_EQEP1
-   InitEQep1Gpio();
-#endif  // endif DSP28_EQEP1
-#if DSP28_EQEP2
-   InitEQep2Gpio();
-#endif // endif DSP28_EQEP2
-}
-
-#if DSP28_EQEP1
-void InitEQep1Gpio(void)
-{
-   EALLOW;
-
-/* Enable internal pull-up for the selected pins */
-// Pull-ups can be enabled or disabled by the user.
-// This will enable the pullups for the specified pins.
-// Comment out other unwanted lines.
-
-    GpioCtrlRegs.GPAPUD.bit.GPIO20 = 0;   // Enable pull-up on GPIO20 (EQEP1A)
-    GpioCtrlRegs.GPAPUD.bit.GPIO21 = 0;   // Enable pull-up on GPIO21 (EQEP1B)
-    GpioCtrlRegs.GPAPUD.bit.GPIO22 = 0;   // Enable pull-up on GPIO22 (EQEP1S)
-    GpioCtrlRegs.GPAPUD.bit.GPIO23 = 0;   // Enable pull-up on GPIO23 (EQEP1I)
-
-//    GpioCtrlRegs.GPBPUD.bit.GPIO50 = 0;   // Enable pull-up on GPIO50 (EQEP1A)
-//    GpioCtrlRegs.GPBPUD.bit.GPIO51 = 0;   // Enable pull-up on GPIO51 (EQEP1B)
-//    GpioCtrlRegs.GPBPUD.bit.GPIO52 = 0;   // Enable pull-up on GPIO52 (EQEP1S)
-//    GpioCtrlRegs.GPBPUD.bit.GPIO53 = 0;   // Enable pull-up on GPIO53 (EQEP1I)
-
-
-// Inputs are synchronized to SYSCLKOUT by default.
-// Comment out other unwanted lines.
-
-    GpioCtrlRegs.GPAQSEL2.bit.GPIO20 = 0;   // Sync to SYSCLKOUT GPIO20 (EQEP1A)
-    GpioCtrlRegs.GPAQSEL2.bit.GPIO21 = 0;   // Sync to SYSCLKOUT GPIO21 (EQEP1B)
-    GpioCtrlRegs.GPAQSEL2.bit.GPIO22 = 0;   // Sync to SYSCLKOUT GPIO22 (EQEP1S)
-    GpioCtrlRegs.GPAQSEL2.bit.GPIO23 = 0;   // Sync to SYSCLKOUT GPIO23 (EQEP1I)
-
-//    GpioCtrlRegs.GPBQSEL2.bit.GPIO50 = 0;   // Sync to SYSCLKOUT GPIO50 (EQEP1A)
-//    GpioCtrlRegs.GPBQSEL2.bit.GPIO51 = 0;   // Sync to SYSCLKOUT GPIO51 (EQEP1B)
-//    GpioCtrlRegs.GPBQSEL2.bit.GPIO52 = 0;   // Sync to SYSCLKOUT GPIO52 (EQEP1S)
-//    GpioCtrlRegs.GPBQSEL2.bit.GPIO53 = 0;   // Sync to SYSCLKOUT GPIO53 (EQEP1I)
-
-/* Configure eQEP-1 pins using GPIO regs*/
-// This specifies which of the possible GPIO pins will be eQEP1 functional pins.
-// Comment out other unwanted lines.
-
-    GpioCtrlRegs.GPAMUX2.bit.GPIO20 = 1;   // Configure GPIO20 as EQEP1A
-    GpioCtrlRegs.GPAMUX2.bit.GPIO21 = 1;   // Configure GPIO21 as EQEP1B
-    GpioCtrlRegs.GPAMUX2.bit.GPIO22 = 1;   // Configure GPIO22 as EQEP1S
-    GpioCtrlRegs.GPAMUX2.bit.GPIO23 = 1;   // Configure GPIO23 as EQEP1I
-
-//    GpioCtrlRegs.GPBMUX2.bit.GPIO50 = 1;   // Configure GPIO50 as EQEP1A
-//    GpioCtrlRegs.GPBMUX2.bit.GPIO51 = 1;   // Configure GPIO51 as EQEP1B
-//    GpioCtrlRegs.GPBMUX2.bit.GPIO52 = 1;   // Configure GPIO52 as EQEP1S
-//    GpioCtrlRegs.GPBMUX2.bit.GPIO53 = 1;   // Configure GPIO53 as EQEP1I
-
-
-    EDIS;
-}
-#endif // if DSP28_EQEP1
-
-
-
-#if DSP28_EQEP2
-void InitEQep2Gpio(void)
-{
-   EALLOW;
-
-/* Enable internal pull-up for the selected pins */
-// Pull-ups can be enabled or disabled by the user.
-// This will enable the pullups for the specified pins.
-// Comment out other unwanted lines.
-
-    GpioCtrlRegs.GPAPUD.bit.GPIO24 = 0;    // Enable pull-up on GPIO24 (EQEP2A)
-    GpioCtrlRegs.GPAPUD.bit.GPIO25 = 0;    // Enable pull-up on GPIO25 (EQEP2B)
-    GpioCtrlRegs.GPAPUD.bit.GPIO26 = 0;    // Enable pull-up on GPIO26 (EQEP2I)
-    GpioCtrlRegs.GPAPUD.bit.GPIO27 = 0;    // Enable pull-up on GPIO27 (EQEP2S)
-
-// Inputs are synchronized to SYSCLKOUT by default.
-// Comment out other unwanted lines.
-
-    GpioCtrlRegs.GPAQSEL2.bit.GPIO24 = 0;  // Sync to SYSCLKOUT GPIO24 (EQEP2A)
-    GpioCtrlRegs.GPAQSEL2.bit.GPIO25 = 0;  // Sync to SYSCLKOUT GPIO25 (EQEP2B)
-    GpioCtrlRegs.GPAQSEL2.bit.GPIO26 = 0;  // Sync to SYSCLKOUT GPIO26 (EQEP2I)
-    GpioCtrlRegs.GPAQSEL2.bit.GPIO27 = 0;  // Sync to SYSCLKOUT GPIO27 (EQEP2S)
-
-/* Configure eQEP-2 pins using GPIO regs*/
-// This specifies which of the possible GPIO pins will be eQEP2 functional pins.
-// Comment out other unwanted lines.
-
-    GpioCtrlRegs.GPAMUX2.bit.GPIO24 = 2;   // Configure GPIO24 as EQEP2A
-    GpioCtrlRegs.GPAMUX2.bit.GPIO25 = 2;   // Configure GPIO25 as EQEP2B
-    GpioCtrlRegs.GPAMUX2.bit.GPIO26 = 2;   // Configure GPIO26 as EQEP2I
-    GpioCtrlRegs.GPAMUX2.bit.GPIO27 = 2;   // Configure GPIO27 as EQEP2S
-
-
-    EDIS;
-}
-#endif // endif DSP28_EQEP2
-
-
-
-
-//===========================================================================
-// End of file.
-//===========================================================================
diff --git a/Source/External/v120/DSP2833x_common/source/DSP2833x_Gpio.c b/Source/External/v120/DSP2833x_common/source/DSP2833x_Gpio.c
deleted file mode 100644
index c615f0d..0000000
--- a/Source/External/v120/DSP2833x_common/source/DSP2833x_Gpio.c
+++ /dev/null
@@ -1,69 +0,0 @@
-// TI File $Revision: /main/1 $
-// Checkin $Date: August 18, 2006   13:46:25 $
-//###########################################################################
-//
-// FILE:	DSP2833x_Gpio.c
-//
-// TITLE:	DSP2833x General Purpose I/O Initialization & Support Functions.
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-#include "DSP2833x_Device.h"     // DSP2833x Headerfile Include File
-#include "DSP2833x_Examples.h"   // DSP2833x Examples Include File
-
-//---------------------------------------------------------------------------
-// InitGpio: 
-//---------------------------------------------------------------------------
-// This function initializes the Gpio to a known (default) state.
-//
-// For more details on configuring GPIO's as peripheral functions,
-// refer to the individual peripheral examples and/or GPIO setup example. 
-void InitGpio(void)
-{
-   EALLOW;
-   
-   // Each GPIO pin can be: 
-   // a) a GPIO input/output
-   // b) peripheral function 1
-   // c) peripheral function 2
-   // d) peripheral function 3
-   // By default, all are GPIO Inputs 
-   GpioCtrlRegs.GPAMUX1.all = 0x0000;     // GPIO functionality GPIO0-GPIO15
-   GpioCtrlRegs.GPAMUX2.all = 0x0000;     // GPIO functionality GPIO16-GPIO31
-   GpioCtrlRegs.GPBMUX1.all = 0x0000;     // GPIO functionality GPIO32-GPIO39
-   GpioCtrlRegs.GPBMUX2.all = 0x0000;     // GPIO functionality GPIO48-GPIO63
-   GpioCtrlRegs.GPCMUX1.all = 0x0000;     // GPIO functionality GPIO64-GPIO79
-   GpioCtrlRegs.GPCMUX2.all = 0x0000;     // GPIO functionality GPIO80-GPIO95
-
-   GpioCtrlRegs.GPADIR.all = 0x0000;      // GPIO0-GPIO31 are inputs
-   GpioCtrlRegs.GPBDIR.all = 0x0000;      // GPIO32-GPIO63 are inputs   
-   GpioCtrlRegs.GPCDIR.all = 0x0000;      // GPI064-GPIO95 are inputs
-
-   // Each input can have different qualification
-   // a) input synchronized to SYSCLKOUT
-   // b) input qualified by a sampling window
-   // c) input sent asynchronously (valid for peripheral inputs only)
-   GpioCtrlRegs.GPAQSEL1.all = 0x0000;    // GPIO0-GPIO15 Synch to SYSCLKOUT 
-   GpioCtrlRegs.GPAQSEL2.all = 0x0000;    // GPIO16-GPIO31 Synch to SYSCLKOUT
-   GpioCtrlRegs.GPBQSEL1.all = 0x0000;    // GPIO32-GPIO39 Synch to SYSCLKOUT 
-   GpioCtrlRegs.GPBQSEL2.all = 0x0000;    // GPIO48-GPIO63 Synch to SYSCLKOUT 
-
-   // Pull-ups can be enabled or disabled. 
-   GpioCtrlRegs.GPAPUD.all = 0x0000;      // Pullup's enabled GPIO0-GPIO31
-   GpioCtrlRegs.GPBPUD.all = 0x0000;      // Pullup's enabled GPIO32-GPIO63
-   GpioCtrlRegs.GPCPUD.all = 0x0000;      // Pullup's enabled GPIO64-GPIO79
-
-   //GpioCtrlRegs.GPAPUD.all = 0xFFFF;    // Pullup's disabled GPIO0-GPIO31
-   //GpioCtrlRegs.GPBPUD.all = 0xFFFF;    // Pullup's disabled GPIO32-GPIO34
-   //GpioCtrlRegs.GPCPUD.all = 0xFFFF     // Pullup's disabled GPIO64-GPIO79
-
-   EDIS;
-
-}	
-	
-//===========================================================================
-// End of file.
-//===========================================================================
diff --git a/Source/External/v120/DSP2833x_common/source/DSP2833x_I2C.c b/Source/External/v120/DSP2833x_common/source/DSP2833x_I2C.c
deleted file mode 100644
index fda73d3..0000000
--- a/Source/External/v120/DSP2833x_common/source/DSP2833x_I2C.c
+++ /dev/null
@@ -1,76 +0,0 @@
-// TI File $Revision: /main/1 $
-// Checkin $Date: August 18, 2006   13:46:27 $
-//###########################################################################
-//
-// FILE:	DSP2833x_I2C.c
-//
-// TITLE:	DSP2833x SCI Initialization & Support Functions.
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-#include "DSP2833x_Device.h"     // DSP2833x Headerfile Include File
-#include "DSP2833x_Examples.h"   // DSP2833x Examples Include File
-
-//---------------------------------------------------------------------------
-// InitI2C: 
-//---------------------------------------------------------------------------
-// This function initializes the I2C to a known state.
-//
-void InitI2C(void)
-{
-	// Initialize I2C-A:
-
-	//tbd...
-}	
-
-//---------------------------------------------------------------------------
-// Example: InitI2CGpio: 
-//---------------------------------------------------------------------------
-// This function initializes GPIO pins to function as I2C pins
-//
-// Each GPIO pin can be configured as a GPIO pin or up to 3 different
-// peripheral functional pins. By default all pins come up as GPIO
-// inputs after reset.  
-// 
-// Caution: 
-// Only one GPIO pin should be enabled for SDAA operation.
-// Only one GPIO pin shoudl be enabled for SCLA operation. 
-// Comment out other unwanted lines.
-
-void InitI2CGpio()
-{
-
-   EALLOW;
-/* Enable internal pull-up for the selected pins */
-// Pull-ups can be enabled or disabled disabled by the user.  
-// This will enable the pullups for the specified pins.
-// Comment out other unwanted lines.
-
-	GpioCtrlRegs.GPBPUD.bit.GPIO32 = 0;    // Enable pull-up for GPIO32 (SDAA)
-	GpioCtrlRegs.GPBPUD.bit.GPIO33 = 0;	   // Enable pull-up for GPIO33 (SCLA)
-
-/* Set qualification for selected pins to asynch only */
-// This will select asynch (no qualification) for the selected pins.
-// Comment out other unwanted lines.
-
-	GpioCtrlRegs.GPBQSEL1.bit.GPIO32 = 3;  // Asynch input GPIO32 (SDAA)
-    GpioCtrlRegs.GPBQSEL1.bit.GPIO33 = 3;  // Asynch input GPIO33 (SCLA)
-
-/* Configure SCI pins using GPIO regs*/
-// This specifies which of the possible GPIO pins will be I2C functional pins.
-// Comment out other unwanted lines.
-
-	GpioCtrlRegs.GPBMUX1.bit.GPIO32 = 1;   // Configure GPIO32 for SDAA operation
-	GpioCtrlRegs.GPBMUX1.bit.GPIO33 = 1;   // Configure GPIO33 for SCLA operation
-	
-    EDIS;
-}
-
-
-	
-//===========================================================================
-// End of file.
-//===========================================================================
diff --git a/Source/External/v120/DSP2833x_common/source/DSP2833x_Mcbsp.c b/Source/External/v120/DSP2833x_common/source/DSP2833x_Mcbsp.c
deleted file mode 100644
index 302c330..0000000
--- a/Source/External/v120/DSP2833x_common/source/DSP2833x_Mcbsp.c
+++ /dev/null
@@ -1,349 +0,0 @@
-  // TI File $Revision: /main/16 $
-// Checkin $Date: October 3, 2007   14:50:19 $
-//###########################################################################
-//
-// FILE:	DSP2833x_McBSP.c
-//
-// TITLE:	DSP2833x Device McBSP Initialization & Support Functions.
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-#include "DSP2833x_Device.h"     // DSP2833x Headerfile Include File
-#include "DSP2833x_Examples.h"   // DSP2833x Examples Include File
-
-//---------------------------------------------------------------------------
-// MCBSP_INIT_DELAY determines the amount of CPU cycles in the 2 sample rate
-// generator (SRG) cycles required for the Mcbsp initialization routine.
-// MCBSP_CLKG_DELAY determines the amount of CPU cycles in the 2 clock
-// generator (CLKG) cycles required for the Mcbsp initialization routine.
-// For the functions defined in Mcbsp.c, MCBSP_INIT_DELAY and MCBSP_CLKG_DELAY
-// are based off of either a 150 MHz SYSCLKOUT (default) or a 100 MHz SYSCLKOUT.
-//
-// CPU_FRQ_100MHZ and CPU_FRQ_150MHZ are defined in DSP2833x_Examples.h
-//---------------------------------------------------------------------------
-
-#if CPU_FRQ_150MHZ                                          // For 150 MHz SYSCLKOUT(default)
-  #define CPU_SPD              150E6
-  #define MCBSP_SRG_FREQ       CPU_SPD/4                    // SRG input is LSPCLK (SYSCLKOUT/4) for examples
-#endif
-#if CPU_FRQ_100MHZ                                          // For 100 MHz SYSCLKOUT
-  #define CPU_SPD              100E6
-  #define MCBSP_SRG_FREQ       CPU_SPD/4                    // SRG input is LSPCLK (SYSCLKOUT/4) for examples
-#endif
-
-#define CLKGDV_VAL           1
-#define MCBSP_INIT_DELAY     2*(CPU_SPD/MCBSP_SRG_FREQ)                  // # of CPU cycles in 2 SRG cycles-init delay
-#define MCBSP_CLKG_DELAY     2*(CPU_SPD/(MCBSP_SRG_FREQ/(1+CLKGDV_VAL))) // # of CPU cycles in 2 CLKG cycles-init delay
-//---------------------------------------------------------------------------
-// InitMcbsp:
-//---------------------------------------------------------------------------
-// This function initializes the McBSP to a known state.
-//
-
-void delay_loop(void);		// Delay function used for SRG initialization
-void clkg_delay_loop(void); // Delay function used for CLKG initialization
-
-void InitMcbsp(void)
-{
-	InitMcbspa();
-	#if DSP28_MCBSPB
-	  InitMcbspb();
-	#endif               // end DSP28_MCBSPB
-}
-
-void InitMcbspa(void)
-{
-// McBSP-A register settings
-
-    McbspaRegs.SPCR2.all=0x0000;		// Reset FS generator, sample rate generator & transmitter
-	McbspaRegs.SPCR1.all=0x0000;		// Reset Receiver, Right justify word
-	McbspaRegs.SPCR1.bit.DLB = 1;       // Enable loopback mode for test. Comment out for normal McBSP transfer mode.
-
-
-	McbspaRegs.MFFINT.all=0x0;			// Disable all interrupts
-
-    McbspaRegs.RCR2.all=0x0;			// Single-phase frame, 1 word/frame, No companding	(Receive)
-    McbspaRegs.RCR1.all=0x0;
-
-    McbspaRegs.XCR2.all=0x0;			// Single-phase frame, 1 word/frame, No companding	(Transmit)
-    McbspaRegs.XCR1.all=0x0;
-
-    McbspaRegs.PCR.bit.FSXM = 1;		// FSX generated internally, FSR derived from an external source
-	McbspaRegs.PCR.bit.CLKXM = 1;		// CLKX generated internally, CLKR derived from an external source
-
-    McbspaRegs.SRGR2.bit.CLKSM = 1;		// CLKSM=1 (If SCLKME=0, i/p clock to SRG is LSPCLK)
-	McbspaRegs.SRGR2.bit.FPER = 31;		// FPER = 32 CLKG periods
-
-    McbspaRegs.SRGR1.bit.FWID = 0;              // Frame Width = 1 CLKG period
-    McbspaRegs.SRGR1.bit.CLKGDV = CLKGDV_VAL;	// CLKG frequency = LSPCLK/(CLKGDV+1)
-
-    delay_loop();                // Wait at least 2 SRG clock cycles
-
-    McbspaRegs.SPCR2.bit.GRST=1; // Enable the sample rate generator
-	clkg_delay_loop();           // Wait at least 2 CLKG cycles
-	McbspaRegs.SPCR2.bit.XRST=1; // Release TX from Reset
-	McbspaRegs.SPCR1.bit.RRST=1; // Release RX from Reset
-    McbspaRegs.SPCR2.bit.FRST=1; // Frame Sync Generator reset
-
-}
-
-
-#if (DSP28_MCBSPB)
-void InitMcbspb(void)
-{
-
-// McBSP-B register settings
-
-    McbspbRegs.SPCR2.all=0x0000;		// Reset FS generator, sample rate generator & transmitter
-	McbspbRegs.SPCR1.all=0x0000;		// Reset Receiver, Right justify word
-	McbspbRegs.SPCR1.bit.DLB = 1;       // Enable loopback mode for test. Comment out for normal McBSP transfer mode.
-
-	McbspbRegs.MFFINT.all=0x0;			// Disable all interrupts
-
-    McbspbRegs.RCR2.all=0x0;			// Single-phase frame, 1 word/frame, No companding	(Receive)
-    McbspbRegs.RCR1.all=0x0;
-
-    McbspbRegs.XCR2.all=0x0;			// Single-phase frame, 1 word/frame, No companding	(Transmit)
-    McbspbRegs.XCR1.all=0x0;
-
-    McbspbRegs.SRGR2.bit.CLKSM = 1;		// CLKSM=1 (If SCLKME=0, i/p clock to SRG is LSPCLK)
-	McbspbRegs.SRGR2.bit.FPER = 31;		// FPER = 32 CLKG periods
-
-    McbspbRegs.SRGR1.bit.FWID = 0;              // Frame Width = 1 CLKG period
-    McbspbRegs.SRGR1.bit.CLKGDV = CLKGDV_VAL;	// CLKG frequency = LSPCLK/(CLKGDV+1)
-
-   	McbspbRegs.PCR.bit.FSXM = 1;		// FSX generated internally, FSR derived from an external source
-	McbspbRegs.PCR.bit.CLKXM = 1;		// CLKX generated internally, CLKR derived from an external source
-    delay_loop();                // Wait at least 2 SRG clock cycles
-    McbspbRegs.SPCR2.bit.GRST=1; // Enable the sample rate generator
-	clkg_delay_loop();           // Wait at least 2 CLKG cycles
-	McbspbRegs.SPCR2.bit.XRST=1; // Release TX from Reset
-	McbspbRegs.SPCR1.bit.RRST=1; // Release RX from Reset
-    McbspbRegs.SPCR2.bit.FRST=1; // Frame Sync Generator reset
-
-}
-
-
-#endif // end DSP28_MCBSPB
-
-// McBSP-A Data Lengths
-void InitMcbspa8bit(void)
-{
-    McbspaRegs.RCR1.bit.RWDLEN1=0;     // 8-bit word
-    McbspaRegs.XCR1.bit.XWDLEN1=0;     // 8-bit word
-}
-
-void InitMcbspa12bit(void)
-{
-    McbspaRegs.RCR1.bit.RWDLEN1=1;     // 12-bit word
-    McbspaRegs.XCR1.bit.XWDLEN1=1;     // 12-bit word
-}
-
-void InitMcbspa16bit(void)
-{
-    McbspaRegs.RCR1.bit.RWDLEN1=2;      // 16-bit word
-    McbspaRegs.XCR1.bit.XWDLEN1=2;      // 16-bit word
-}
-
-void InitMcbspa20bit(void)
-{
-    McbspaRegs.RCR1.bit.RWDLEN1=3;     // 20-bit word
-    McbspaRegs.XCR1.bit.XWDLEN1=3;     // 20-bit word
-}
-
-void InitMcbspa24bit(void)
-{
-    McbspaRegs.RCR1.bit.RWDLEN1=4;     // 24-bit word
-    McbspaRegs.XCR1.bit.XWDLEN1=4;     // 24-bit word
-}
-
-void InitMcbspa32bit(void)
-{
-    McbspaRegs.RCR1.bit.RWDLEN1=5;     // 32-bit word
-    McbspaRegs.XCR1.bit.XWDLEN1=5;     // 32-bit word
-}
-
-// McBSP-B Data Lengths
-#if (DSP28_MCBSPB)
-
-void InitMcbspb8bit(void)
-{
-    McbspbRegs.RCR1.bit.RWDLEN1=0;     // 8-bit word
-    McbspbRegs.XCR1.bit.XWDLEN1=0;     // 8-bit word
-}
-
-void InitMcbspb12bit(void)
-{
-    McbspbRegs.RCR1.bit.RWDLEN1=1;     // 12-bit word
-    McbspbRegs.XCR1.bit.XWDLEN1=1;     // 12-bit word
-}
-
-void InitMcbspb16bit(void)
-{
-    McbspbRegs.RCR1.bit.RWDLEN1=2;      // 16-bit word
-    McbspbRegs.XCR1.bit.XWDLEN1=2;      // 16-bit word
-}
-
-void InitMcbspb20bit(void)
-{
-    McbspbRegs.RCR1.bit.RWDLEN1=3;     // 20-bit word
-    McbspbRegs.XCR1.bit.XWDLEN1=3;     // 20-bit word
-}
-
-void InitMcbspb24bit(void)
-{
-    McbspbRegs.RCR1.bit.RWDLEN1=4;     // 24-bit word
-    McbspbRegs.XCR1.bit.XWDLEN1=4;     // 24-bit word
-}
-
-void InitMcbspb32bit(void)
-{
-    McbspbRegs.RCR1.bit.RWDLEN1=5;     // 32-bit word
-    McbspbRegs.XCR1.bit.XWDLEN1=5;     // 32-bit word
-}
-
-#endif //end DSP28_MCBSPB
-
-
-
-void InitMcbspGpio(void)
-{
-	InitMcbspaGpio();
-	#if DSP28_MCBSPB
-	  InitMcbspbGpio();
-	#endif               // end DSP28_MCBSPB
-}
-
-void InitMcbspaGpio(void)
-{
-	EALLOW;
-
-/* Configure McBSP-A pins using GPIO regs*/
-// This specifies which of the possible GPIO pins will be McBSP functional pins.
-// Comment out other unwanted lines.
-
-	GpioCtrlRegs.GPAMUX2.bit.GPIO20 = 2;	// GPIO20 is MDXA pin
-	GpioCtrlRegs.GPAMUX2.bit.GPIO21 = 2;	// GPIO21 is MDRA pin
-    GpioCtrlRegs.GPAMUX2.bit.GPIO22 = 2;	// GPIO22 is MCLKXA pin
-    GpioCtrlRegs.GPAMUX1.bit.GPIO7 = 2;		// GPIO7 is MCLKRA pin (Comment as needed)
-	//GpioCtrlRegs.GPBMUX2.bit.GPIO58 = 1;	// GPIO58 is MCLKRA pin (Comment as needed)
-    GpioCtrlRegs.GPAMUX2.bit.GPIO23 = 2;	// GPIO23 is MFSXA pin
-    GpioCtrlRegs.GPAMUX1.bit.GPIO5 = 2;		// GPIO5 is MFSRA pin (Comment as needed)
-	//GpioCtrlRegs.GPBMUX2.bit.GPIO59 = 1;	// GPIO59 is MFSRA pin (Comment as needed)
-
-/* Enable internal pull-up for the selected pins */
-// Pull-ups can be enabled or disabled by the user.
-// This will enable the pullups for the specified pins.
-// Comment out other unwanted lines.
-
-	GpioCtrlRegs.GPAPUD.bit.GPIO20 = 0;     // Enable pull-up on GPIO20 (MDXA)
-	GpioCtrlRegs.GPAPUD.bit.GPIO21 = 0;     // Enable pull-up on GPIO21 (MDRA)
-	GpioCtrlRegs.GPAPUD.bit.GPIO22 = 0;     // Enable pull-up on GPIO22 (MCLKXA)
-	GpioCtrlRegs.GPAPUD.bit.GPIO7 = 0;      // Enable pull-up on GPIO7 (MCLKRA) (Comment as needed)
-	//GpioCtrlRegs.GPBPUD.bit.GPIO58 = 0;   // Enable pull-up on GPIO58 (MCLKRA) (Comment as needed)
-	GpioCtrlRegs.GPAPUD.bit.GPIO23 = 0;     // Enable pull-up on GPIO23 (MFSXA)
-	GpioCtrlRegs.GPAPUD.bit.GPIO5 = 0;      // Enable pull-up on GPIO5 (MFSRA) (Comment as needed)
-	//GpioCtrlRegs.GPBPUD.bit.GPIO59 = 0;   // Enable pull-up on GPIO59 (MFSRA) (Comment as needed)
-
-/* Set qualification for selected input pins to asynch only */
-// This will select asynch (no qualification) for the selected pins.
-// Comment out other unwanted lines.
-
-
-    GpioCtrlRegs.GPAQSEL2.bit.GPIO21 = 3;   // Asynch input GPIO21 (MDRA)
-    GpioCtrlRegs.GPAQSEL2.bit.GPIO22 = 3;   // Asynch input GPIO22 (MCLKXA)
-    GpioCtrlRegs.GPAQSEL1.bit.GPIO7 = 3;    // Asynch input GPIO7 (MCLKRA) (Comment as needed)
-    //GpioCtrlRegs.GPBQSEL2.bit.GPIO58 = 3; // Asynch input GPIO58(MCLKRA) (Comment as needed)
-    GpioCtrlRegs.GPAQSEL2.bit.GPIO23 = 3;   // Asynch input GPIO23 (MFSXA)
-    GpioCtrlRegs.GPAQSEL1.bit.GPIO5 = 3;    // Asynch input GPIO5 (MFSRA) (Comment as needed)
-    //GpioCtrlRegs.GPBQSEL2.bit.GPIO59 = 3; // Asynch input GPIO59 (MFSRA) (Comment as needed)
-
-	EDIS;
-}
-
-#if DSP28_MCBSPB
-void InitMcbspbGpio(void)
-{
-    EALLOW;
-/* Configure McBSP-A pins using GPIO regs*/
-// This specifies which of the possible GPIO pins will be McBSP functional pins.
-// Comment out other unwanted lines.
-
-	//GpioCtrlRegs.GPAMUX1.bit.GPIO12 = 3;	// GPIO12 is MDXB pin (Comment as needed)
-	GpioCtrlRegs.GPAMUX2.bit.GPIO24 = 3;	// GPIO24 is MDXB pin (Comment as needed)
-	//GpioCtrlRegs.GPAMUX1.bit.GPIO13 = 3;	// GPIO13 is MDRB pin (Comment as needed)
-	GpioCtrlRegs.GPAMUX2.bit.GPIO25 = 3;	// GPIO25 is MDRB pin (Comment as needed)
-	//GpioCtrlRegs.GPAMUX1.bit.GPIO14 = 3;	// GPIO14 is MCLKXB pin (Comment as needed)
-	GpioCtrlRegs.GPAMUX2.bit.GPIO26 = 3;	// GPIO26 is MCLKXB pin (Comment as needed)
-	GpioCtrlRegs.GPAMUX1.bit.GPIO3 = 3;		// GPIO3 is MCLKRB pin (Comment as needed)
-	//GpioCtrlRegs.GPBMUX2.bit.GPIO60 = 1;	// GPIO60 is MCLKRB pin (Comment as needed)
-	//GpioCtrlRegs.GPAMUX1.bit.GPIO15 = 3;	// GPIO15 is MFSXB pin (Comment as needed)
-	GpioCtrlRegs.GPAMUX2.bit.GPIO27 = 3;	// GPIO27 is MFSXB pin (Comment as needed)
-	GpioCtrlRegs.GPAMUX1.bit.GPIO1 = 3;		// GPIO1 is MFSRB pin (Comment as needed)
-	//GpioCtrlRegs.GPBMUX2.bit.GPIO61 = 1;	// GPIO61 is MFSRB pin (Comment as needed)
-
-/* Enable internal pull-up for the selected pins */
-// Pull-ups can be enabled or disabled by the user.
-// This will enable the pullups for the specified pins.
-// Comment out other unwanted lines.
-	GpioCtrlRegs.GPAPUD.bit.GPIO24 = 0;	    // Enable pull-up on GPIO24 (MDXB) (Comment as needed)
-	//GpioCtrlRegs.GPAPUD.bit.GPIO12 = 0;	// Enable pull-up on GPIO12 (MDXB) (Comment as needed)
-	GpioCtrlRegs.GPAPUD.bit.GPIO25 = 0;	    // Enable pull-up on GPIO25 (MDRB) (Comment as needed)
-	//GpioCtrlRegs.GPAPUD.bit.GPIO13 = 0;	// Enable pull-up on GPIO13 (MDRB) (Comment as needed)
-	GpioCtrlRegs.GPAPUD.bit.GPIO26 = 0;	    // Enable pull-up on GPIO26 (MCLKXB) (Comment as needed)
-	//GpioCtrlRegs.GPAPUD.bit.GPIO14 = 0;	// Enable pull-up on GPIO14 (MCLKXB) (Comment as needed)
-	GpioCtrlRegs.GPAPUD.bit.GPIO3 = 0;		// Enable pull-up on GPIO3 (MCLKRB) (Comment as needed)
-	//GpioCtrlRegs.GPBPUD.bit.GPIO60 = 0;	// Enable pull-up on GPIO60 (MCLKRB) (Comment as needed)
-	GpioCtrlRegs.GPAPUD.bit.GPIO27 = 0;	    // Enable pull-up on GPIO27 (MFSXB) (Comment as needed)
-	//GpioCtrlRegs.GPAPUD.bit.GPIO15 = 0;	// Enable pull-up on GPIO15 (MFSXB) (Comment as needed)
-	GpioCtrlRegs.GPAPUD.bit.GPIO1 = 0;		// Enable pull-up on GPIO1 (MFSRB) (Comment as needed)
-	//GpioCtrlRegs.GPBPUD.bit.GPIO61 = 0;	// Enable pull-up on GPIO61 (MFSRB) (Comment as needed)
-
-
-/* Set qualification for selected input pins to asynch only */
-// This will select asynch (no qualification) for the selected pins.
-// Comment out other unwanted lines.
-     GpioCtrlRegs.GPAQSEL2.bit.GPIO25 = 3;   // Asynch input GPIO25 (MDRB) (Comment as needed)
-    //GpioCtrlRegs.GPAQSEL1.bit.GPIO13 = 3; // Asynch input GPIO13 (MDRB) (Comment as needed)
-    GpioCtrlRegs.GPAQSEL2.bit.GPIO26 = 3;   // Asynch input GPIO26(MCLKXB) (Comment as needed)
-    //GpioCtrlRegs.GPAQSEL1.bit.GPIO14 = 3; // Asynch input GPIO14 (MCLKXB) (Comment as needed)
-    GpioCtrlRegs.GPAQSEL1.bit.GPIO3 = 3;    // Asynch input GPIO3 (MCLKRB) (Comment as needed)
-    //GpioCtrlRegs.GPBQSEL2.bit.GPIO60 = 3; // Asynch input GPIO60 (MCLKRB) (Comment as needed)
-    GpioCtrlRegs.GPAQSEL2.bit.GPIO27 = 3;   // Asynch input GPIO27 (MFSXB) (Comment as needed)
-	//GpioCtrlRegs.GPAQSEL1.bit.GPIO15 = 3; // Asynch input GPIO15 (MFSXB) (Comment as needed)
-	GpioCtrlRegs.GPAQSEL1.bit.GPIO1 = 3;    // Asynch input GPIO1 (MFSRB) (Comment as needed)
-	//GpioCtrlRegs.GPBQSEL2.bit.GPIO61 = 3; // Asynch input GPIO61 (MFSRB) (Comment as needed)
-
-
-	EDIS;
-}
-#endif                // end DSP28_MCBSPB
-
-void delay_loop(void)
-{
-    long      i;
-    for (i = 0; i < MCBSP_INIT_DELAY; i++) {} //delay in McBsp init. must be at least 2 SRG cycles
-}
-
-void clkg_delay_loop(void)
-{
-    long      i;
-    for (i = 0; i < MCBSP_CLKG_DELAY; i++) {} //delay in McBsp init. must be at least 2 SRG cycles
-}
-//===========================================================================
-// No more.
-//===========================================================================
-
-
-
-
-
-
-
-
-
-
-
diff --git a/Source/External/v120/DSP2833x_common/source/DSP2833x_MemCopy.c b/Source/External/v120/DSP2833x_common/source/DSP2833x_MemCopy.c
deleted file mode 100644
index f7cba01..0000000
--- a/Source/External/v120/DSP2833x_common/source/DSP2833x_MemCopy.c
+++ /dev/null
@@ -1,45 +0,0 @@
-// TI File $Revision: /main/1 $
-// Checkin $Date: August 18, 2006   13:46:33 $
-//###########################################################################
-//
-// FILE:	DSP2833x_MemCopy.c
-//
-// TITLE:	Memory Copy Utility
-//
-// ASSUMPTIONS:
-//
-//          
-//
-// DESCRIPTION:
-//
-//          This function will copy the specified memory contents from
-//          one location to another. 
-// 
-//          Uint16 *SourceAddr        Pointer to the first word to be moved
-//                                    SourceAddr < SourceEndAddr
-//          Uint16* SourceEndAddr     Pointer to the last word to be moved
-//          Uint16* DestAddr          Pointer to the first destination word
-//
-//          No checks are made for invalid memory locations or that the
-//          end address is > then the first start address.
-// 
-//          
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-#include "DSP2833x_Device.h"
-
-void MemCopy(Uint16 *SourceAddr, Uint16* SourceEndAddr, Uint16* DestAddr)
-{
-    while(SourceAddr < SourceEndAddr)
-    { 
-       *DestAddr++ = *SourceAddr++;
-    }
-    return;
-}
-
-//===========================================================================
-// End of file.
-//===========================================================================
diff --git a/Source/External/v120/DSP2833x_common/source/DSP2833x_Sci.c b/Source/External/v120/DSP2833x_common/source/DSP2833x_Sci.c
deleted file mode 100644
index d0a9e1c..0000000
--- a/Source/External/v120/DSP2833x_common/source/DSP2833x_Sci.c
+++ /dev/null
@@ -1,168 +0,0 @@
-// TI File $Revision: /main/2 $
-// Checkin $Date: March 1, 2007   16:06:07 $
-//###########################################################################
-//
-// FILE:	DSP2833x_Sci.c
-//
-// TITLE:	DSP2833x SCI Initialization & Support Functions.
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-#include "DSP2833x_Device.h"     // DSP2833x Headerfile Include File
-#include "DSP2833x_Examples.h"   // DSP2833x Examples Include File
-
-//---------------------------------------------------------------------------
-// InitSci: 
-//---------------------------------------------------------------------------
-// This function initializes the SCI(s) to a known state.
-//
-void InitSci(void)
-{
-	// Initialize SCI-A:
-
-	//tbd...
- 	
-
-	// Initialize SCI-B:
-
-	//tbd...
-  
-      // Initialize SCI-C:
-
-      //tbd...
-}	
-
-//---------------------------------------------------------------------------
-// Example: InitSciGpio: 
-//---------------------------------------------------------------------------
-// This function initializes GPIO pins to function as SCI pins
-//
-// Each GPIO pin can be configured as a GPIO pin or up to 3 different
-// peripheral functional pins. By default all pins come up as GPIO
-// inputs after reset.  
-// 
-// Caution: 
-// Only one GPIO pin should be enabled for SCITXDA/B operation.
-// Only one GPIO pin shoudl be enabled for SCIRXDA/B operation. 
-// Comment out other unwanted lines.
-
-void InitSciGpio()
-{
-   InitSciaGpio();
-#if DSP28_SCIB   
-   InitScibGpio();
-#endif // if DSP28_SCIB  
-#if DSP28_SCIC
-   InitScicGpio();
-#endif // if DSP28_SCIC
-}
-
-void InitSciaGpio()
-{
-   EALLOW;
-
-/* Enable internal pull-up for the selected pins */
-// Pull-ups can be enabled or disabled disabled by the user.  
-// This will enable the pullups for the specified pins.
-
-	GpioCtrlRegs.GPAPUD.bit.GPIO28 = 0;    // Enable pull-up for GPIO28 (SCIRXDA)
-	GpioCtrlRegs.GPAPUD.bit.GPIO29 = 0;	   // Enable pull-up for GPIO29 (SCITXDA)
-
-/* Set qualification for selected pins to asynch only */
-// Inputs are synchronized to SYSCLKOUT by default.  
-// This will select asynch (no qualification) for the selected pins.
-
-	GpioCtrlRegs.GPAQSEL2.bit.GPIO28 = 3;  // Asynch input GPIO28 (SCIRXDA)
-
-/* Configure SCI-A pins using GPIO regs*/
-// This specifies which of the possible GPIO pins will be SCI functional pins.
-
-	GpioCtrlRegs.GPAMUX2.bit.GPIO28 = 1;   // Configure GPIO28 for SCIRXDA operation
-	GpioCtrlRegs.GPAMUX2.bit.GPIO29 = 1;   // Configure GPIO29 for SCITXDA operation
-	
-    EDIS;
-}
-
-#if DSP28_SCIB 
-void InitScibGpio()
-{
-   EALLOW;
-	
-/* Enable internal pull-up for the selected pins */
-// Pull-ups can be enabled or disabled disabled by the user.  
-// This will enable the pullups for the specified pins.
-// Comment out other unwanted lines.
-
-//  GpioCtrlRegs.GPAPUD.bit.GPIO9 = 0;     // Enable pull-up for GPIO9  (SCITXDB)
-//  GpioCtrlRegs.GPAPUD.bit.GPIO14 = 0;    // Enable pull-up for GPIO14 (SCITXDB)
-	GpioCtrlRegs.GPAPUD.bit.GPIO18 = 0;	   // Enable pull-up for GPIO18 (SCITXDB)
-//  GpioCtrlRegs.GPAPUD.bit.GPIO22 = 0;    // Enable pull-up for GPIO22 (SCITXDB)
-
-	
-//  GpioCtrlRegs.GPAPUD.bit.GPIO11 = 0;    // Enable pull-up for GPIO11 (SCIRXDB)
-//  GpioCtrlRegs.GPAPUD.bit.GPIO15 = 0;    // Enable pull-up for GPIO15 (SCIRXDB)
-    GpioCtrlRegs.GPAPUD.bit.GPIO19 = 0;	   // Enable pull-up for GPIO19 (SCIRXDB)
-//  GpioCtrlRegs.GPAPUD.bit.GPIO23 = 0;    // Enable pull-up for GPIO23 (SCIRXDB)
-
-/* Set qualification for selected pins to asynch only */
-// This will select asynch (no qualification) for the selected pins.
-// Comment out other unwanted lines.
-
-//  GpioCtrlRegs.GPAQSEL1.bit.GPIO11 = 3;  // Asynch input GPIO11 (SCIRXDB)
-//  GpioCtrlRegs.GPAQSEL1.bit.GPIO15 = 3;  // Asynch input GPIO15 (SCIRXDB)
-	GpioCtrlRegs.GPAQSEL2.bit.GPIO19 = 3;  // Asynch input GPIO19 (SCIRXDB)
-//  GpioCtrlRegs.GPAQSEL2.bit.GPIO23 = 3;  // Asynch input GPIO23 (SCIRXDB)
-
-/* Configure SCI-B pins using GPIO regs*/
-// This specifies which of the possible GPIO pins will be SCI functional pins.
-// Comment out other unwanted lines.
-
-//  GpioCtrlRegs.GPAMUX1.bit.GPIO9 = 2;    // Configure GPIO9 for SCITXDB operation
-//  GpioCtrlRegs.GPAMUX1.bit.GPIO14 = 2;   // Configure GPIO14 for SCITXDB operation
-	GpioCtrlRegs.GPAMUX2.bit.GPIO18 = 2;   // Configure GPIO18 for SCITXDB operation
-//  GpioCtrlRegs.GPAMUX2.bit.GPIO22 = 3;   // Configure GPIO22 for SCITXDB operation
-	
-//  GpioCtrlRegs.GPAMUX1.bit.GPIO11 = 2;   // Configure GPIO11 for SCIRXDB operation
-//  GpioCtrlRegs.GPAMUX1.bit.GPIO15 = 2;   // Configure GPIO15 for SCIRXDB operation
-    GpioCtrlRegs.GPAMUX2.bit.GPIO19 = 2;   // Configure GPIO19 for SCIRXDB operation
-//  GpioCtrlRegs.GPAMUX2.bit.GPIO23 = 3;   // Configure GPIO23 for SCIRXDB operation
-	
-    EDIS;
-}
-#endif // if DSP28_SCIB 
-
-#if DSP28_SCIC
-void InitScicGpio()
-{
-   EALLOW;
-
-/* Enable internal pull-up for the selected pins */
-// Pull-ups can be enabled or disabled disabled by the user.  
-// This will enable the pullups for the specified pins.
-
-	GpioCtrlRegs.GPBPUD.bit.GPIO62 = 0;    // Enable pull-up for GPIO62 (SCIRXDC)
-	GpioCtrlRegs.GPBPUD.bit.GPIO63 = 0;	   // Enable pull-up for GPIO63 (SCITXDC)
-
-/* Set qualification for selected pins to asynch only */
-// Inputs are synchronized to SYSCLKOUT by default.  
-// This will select asynch (no qualification) for the selected pins.
-
-	GpioCtrlRegs.GPBQSEL2.bit.GPIO62 = 3;  // Asynch input GPIO62 (SCIRXDC)
-
-/* Configure SCI-C pins using GPIO regs*/
-// This specifies which of the possible GPIO pins will be SCI functional pins.
-
-	GpioCtrlRegs.GPBMUX2.bit.GPIO62 = 1;   // Configure GPIO62 for SCIRXDC operation
-	GpioCtrlRegs.GPBMUX2.bit.GPIO63 = 1;   // Configure GPIO63 for SCITXDC operation
-	
-    EDIS;
-}
-#endif // if DSP28_SCIC 
-
-	
-//===========================================================================
-// End of file.
-//===========================================================================
diff --git a/Source/External/v120/DSP2833x_common/source/DSP2833x_Spi.c b/Source/External/v120/DSP2833x_common/source/DSP2833x_Spi.c
deleted file mode 100644
index 95a7b32..0000000
--- a/Source/External/v120/DSP2833x_common/source/DSP2833x_Spi.c
+++ /dev/null
@@ -1,107 +0,0 @@
-// TI File $Revision: /main/1 $
-// Checkin $Date: August 18, 2006   13:46:44 $
-//###########################################################################
-//
-// FILE:   DSP2833x_Spi.c
-//
-// TITLE:  DSP2833x SPI Initialization & Support Functions.
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-#include "DSP2833x_Device.h"     // DSP2833x Headerfile Include File
-#include "DSP2833x_Examples.h"   // DSP2833x Examples Include File
-
-//---------------------------------------------------------------------------
-// InitSPI: 
-//---------------------------------------------------------------------------
-// This function initializes the SPI(s) to a known state.
-//
-void InitSpi(void)
-{
-   // Initialize SPI-A/B/C/D
-
-   //tbd...
- 
-}
-
-//---------------------------------------------------------------------------
-// Example: InitSpiGpio: 
-//---------------------------------------------------------------------------
-// This function initializes GPIO pins to function as SPI pins
-//
-// Each GPIO pin can be configured as a GPIO pin or up to 3 different
-// peripheral functional pins. By default all pins come up as GPIO
-// inputs after reset.  
-// 
-// Caution: 
-// For each SPI peripheral
-// Only one GPIO pin should be enabled for SPISOMO operation.
-// Only one GPIO pin should be enabled for SPISOMI operation. 
-// Only one GPIO pin should be enabled for SPICLKA operation. 
-// Only one GPIO pin should be enabled for SPISTEA operation. 
-// Comment out other unwanted lines.
-
-void InitSpiGpio()
-{
-
-   InitSpiaGpio();
-}
-
-void InitSpiaGpio()
-{
-
-   EALLOW;
-/* Enable internal pull-up for the selected pins */
-// Pull-ups can be enabled or disabled by the user.  
-// This will enable the pullups for the specified pins.
-// Comment out other unwanted lines.
-
-    GpioCtrlRegs.GPAPUD.bit.GPIO16 = 0;   // Enable pull-up on GPIO16 (SPISIMOA)
-    GpioCtrlRegs.GPAPUD.bit.GPIO17 = 0;   // Enable pull-up on GPIO17 (SPISOMIA)
-    GpioCtrlRegs.GPAPUD.bit.GPIO18 = 0;   // Enable pull-up on GPIO18 (SPICLKA)
-    GpioCtrlRegs.GPAPUD.bit.GPIO19 = 0;   // Enable pull-up on GPIO19 (SPISTEA)
-
-
-//    GpioCtrlRegs.GPBPUD.bit.GPIO54 = 0;   // Enable pull-up on GPIO54 (SPISIMOA)
-//    GpioCtrlRegs.GPBPUD.bit.GPIO55 = 0;   // Enable pull-up on GPIO55 (SPISOMIA)
-//    GpioCtrlRegs.GPBPUD.bit.GPIO56 = 0;   // Enable pull-up on GPIO56 (SPICLKA)
-//    GpioCtrlRegs.GPBPUD.bit.GPIO57 = 0;   // Enable pull-up on GPIO57 (SPISTEA)
-
-/* Set qualification for selected pins to asynch only */
-// This will select asynch (no qualification) for the selected pins.
-// Comment out other unwanted lines.
-
-    GpioCtrlRegs.GPAQSEL2.bit.GPIO16 = 3; // Asynch input GPIO16 (SPISIMOA)
-    GpioCtrlRegs.GPAQSEL2.bit.GPIO17 = 3; // Asynch input GPIO17 (SPISOMIA)
-    GpioCtrlRegs.GPAQSEL2.bit.GPIO18 = 3; // Asynch input GPIO18 (SPICLKA)
-    GpioCtrlRegs.GPAQSEL2.bit.GPIO19 = 3; // Asynch input GPIO19 (SPISTEA)
-
-//    GpioCtrlRegs.GPBQSEL2.bit.GPIO54 = 3; // Asynch input GPIO16 (SPISIMOA)
-//    GpioCtrlRegs.GPBQSEL2.bit.GPIO55 = 3; // Asynch input GPIO17 (SPISOMIA)
-//    GpioCtrlRegs.GPBQSEL2.bit.GPIO56 = 3; // Asynch input GPIO18 (SPICLKA)
-//    GpioCtrlRegs.GPBQSEL2.bit.GPIO57 = 3; // Asynch input GPIO19 (SPISTEA)
-
-    
-/* Configure SPI-A pins using GPIO regs*/
-// This specifies which of the possible GPIO pins will be SPI functional pins.
-// Comment out other unwanted lines.
-
-    GpioCtrlRegs.GPAMUX2.bit.GPIO16 = 1; // Configure GPIO16 as SPISIMOA
-    GpioCtrlRegs.GPAMUX2.bit.GPIO17 = 1; // Configure GPIO17 as SPISOMIA
-    GpioCtrlRegs.GPAMUX2.bit.GPIO18 = 1; // Configure GPIO18 as SPICLKA
-    GpioCtrlRegs.GPAMUX2.bit.GPIO19 = 1; // Configure GPIO19 as SPISTEA
-
-//    GpioCtrlRegs.GPBMUX2.bit.GPIO54 = 1; // Configure GPIO54 as SPISIMOA
-//    GpioCtrlRegs.GPBMUX2.bit.GPIO55 = 1; // Configure GPIO55 as SPISOMIA
-//    GpioCtrlRegs.GPBMUX2.bit.GPIO56 = 1; // Configure GPIO56 as SPICLKA
-//    GpioCtrlRegs.GPBMUX2.bit.GPIO57 = 1; // Configure GPIO57 as SPISTEA
-
-    EDIS;
-}
-
-//===========================================================================
-// End of file.
-//===========================================================================
diff --git a/Source/External/v120/DSP2833x_common/source/DSP2833x_SysCtrl.c b/Source/External/v120/DSP2833x_common/source/DSP2833x_SysCtrl.c
index 30eb665..7d9ea10 100644
--- a/Source/External/v120/DSP2833x_common/source/DSP2833x_SysCtrl.c
+++ b/Source/External/v120/DSP2833x_common/source/DSP2833x_SysCtrl.c
@@ -19,8 +19,8 @@
 #include "DSP2833x_Device.h"     // Headerfile Include File
 #include "DSP2833x_Examples.h"   // Examples Include File
 
-#include "RS485.h"
-#include "message.h"
+//#include "RS485.h"
+//#include "message.h"
 
 // Functions that will be run from RAM need to be assigned to
 // a different section.  This section will then be mapped to a load and
diff --git a/Source/External/v120/DSP2833x_common/source/DSP2833x_Xintf.c b/Source/External/v120/DSP2833x_common/source/DSP2833x_Xintf.c
index c4d178e..0d3619a 100644
--- a/Source/External/v120/DSP2833x_common/source/DSP2833x_Xintf.c
+++ b/Source/External/v120/DSP2833x_common/source/DSP2833x_Xintf.c
@@ -223,19 +223,18 @@ void InitXintf16Gpio()
      GpioCtrlRegs.GPCMUX2.bit.GPIO86 = 3;  // XA14
      GpioCtrlRegs.GPCMUX2.bit.GPIO87 = 3;  // XA15
 
-	 GpioCtrlRegs.GPBMUX1.bit.GPIO35 = 3;  // XRNW
-
-     GpioCtrlRegs.GPBMUX1.bit.GPIO37 = 3;  // XZCS7
-     GpioCtrlRegs.GPBMUX1.bit.GPIO38 = 3;  // XWE0
      GpioCtrlRegs.GPBMUX1.bit.GPIO39 = 3;  // XA16
-/*
-     GpioCtrlRegs.GPAMUX2.bit.GPIO31 = 3;  // XA17
-     GpioCtrlRegs.GPAMUX2.bit.GPIO30 = 3;  // XA18
-     GpioCtrlRegs.GPAMUX2.bit.GPIO29 = 3;  // XA19
-     GpioCtrlRegs.GPBMUX1.bit.GPIO34 = 3;  // XREADY
-     GpioCtrlRegs.GPBMUX1.bit.GPIO36 = 3;  // XZCS0
-     GpioCtrlRegs.GPAMUX2.bit.GPIO28 = 3;  // XZCS6
-*/
+//     GpioCtrlRegs.GPAMUX2.bit.GPIO31 = 3;  // XA17
+//     GpioCtrlRegs.GPAMUX2.bit.GPIO30 = 3;  // XA18
+//     GpioCtrlRegs.GPAMUX2.bit.GPIO29 = 3;  // XA19
+
+//     GpioCtrlRegs.GPBMUX1.bit.GPIO34 = 3;  // XREADY
+	 GpioCtrlRegs.GPBMUX1.bit.GPIO35 = 3;  // XRNW
+     GpioCtrlRegs.GPBMUX1.bit.GPIO38 = 3;  // XWE0
+
+//     GpioCtrlRegs.GPBMUX1.bit.GPIO36 = 3;  // XZCS0
+     GpioCtrlRegs.GPBMUX1.bit.GPIO37 = 3;  // XZCS7
+//     GpioCtrlRegs.GPAMUX2.bit.GPIO28 = 3;  // XZCS6
      EDIS;
 }
 
diff --git a/Source/External/v120/DSP2833x_examples/adc_dma/Example_2833xAdcToDMA.c b/Source/External/v120/DSP2833x_examples/adc_dma/Example_2833xAdcToDMA.c
deleted file mode 100644
index dab0e92..0000000
--- a/Source/External/v120/DSP2833x_examples/adc_dma/Example_2833xAdcToDMA.c
+++ /dev/null
@@ -1,212 +0,0 @@
-//###########################################################################
-//
-// FILE:   Example_2833xAdcToDMA.c
-//
-// TITLE:  DSP2833x ADC To DMA
-// ASSUMPTIONS:
-//
-//    This program requires the DSP2833x header files.
-//
-//    Make sure the CPU clock speed is properly defined in
-//    DSP2833x_Examples.h before compiling this example.
-//
-//    Connect the signals to be converted to channel A0, A1, A2, and A3.
-//
-//    As supplied, this project is configured for "boot to SARAM"
-//    operation.  The 2833x Boot Mode table is shown below.
-//    For information on configuring the boot mode of an eZdsp,
-//    please refer to the documentation included with the eZdsp,
-//
-//       $Boot_Table:
-//
-//         GPIO87   GPIO86     GPIO85   GPIO84
-//          XA15     XA14       XA13     XA12
-//           PU       PU         PU       PU
-//        ==========================================
-//            1        1          1        1    Jump to Flash
-//            1        1          1        0    SCI-A boot
-//            1        1          0        1    SPI-A boot
-//            1        1          0        0    I2C-A boot
-//            1        0          1        1    eCAN-A boot
-//            1        0          1        0    McBSP-A boot
-//            1        0          0        1    Jump to XINTF x16
-//            1        0          0        0    Jump to XINTF x32
-//            0        1          1        1    Jump to OTP
-//            0        1          1        0    Parallel GPIO I/O boot
-//            0        1          0        1    Parallel XINTF boot
-//            0        1          0        0    Jump to SARAM	    <- "boot to SARAM"
-//            0        0          1        1    Branch to check boot mode
-//            0        0          1        0    Boot to flash, bypass ADC cal
-//            0        0          0        1    Boot to SARAM, bypass ADC cal
-//            0        0          0        0    Boot to SCI-A, bypass ADC cal
-//                                              Boot_Table_End$
-//
-//
-// DESCRIPTION:
-//
-// ADC is setup to convert 4 channels for each SOC received, with  total of 10 SOCs.
-// Each SOC initiates 4 conversions.
-// DMA is set up to capture the data on each SEQ1_INT.  DMA will re-sort   
-// the data by channel sequentially, i.e. all channel0 data will be together
-// all channel1 data will be together.
-//
-// Code should stop in local_DINTCH1_ISR when complete
-//
-// Watch Variables:
-//      DMABuf1
-//
-//###########################################################################
-//
-// Original source by: M.P.
-//
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File
-
-// ADC start parameters
-#if (CPU_FRQ_150MHZ)     // Default - 150 MHz SYSCLKOUT
-  #define ADC_MODCLK 0x3 // HSPCLK = SYSCLKOUT/2*ADC_MODCLK2 = 150/(2*3)   = 25.0 MHz
-#endif
-#if (CPU_FRQ_100MHZ)
-  #define ADC_MODCLK 0x2 // HSPCLK = SYSCLKOUT/2*ADC_MODCLK2 = 100/(2*2)   = 25.0 MHz
-#endif
-#define ADC_CKPS   0x1   // ADC module clock = HSPCLK/2*ADC_CKPS   = 25.0MHz/(1*2) = 12.5MHz
-#define ADC_SHCLK  0xf   // S/H width in ADC module periods                        = 16 ADC clocks
-#define AVG        1000  // Average sample limit
-#define ZOFFSET    0x00  // Average Zero offset
-#define BUF_SIZE   40    // Sample buffer size
-
-// Global variable for this example
-Uint16 j=0;
-
-#pragma DATA_SECTION(DMABuf1,"DMARAML4");
-volatile Uint16 DMABuf1[40];
-
-volatile Uint16 *DMADest;
-volatile Uint16 *DMASource;
-interrupt void local_DINTCH1_ISR(void);
-
-void main(void)
-{
-   Uint16 i;
-// Step 1. Initialize System Control:
-// PLL, WatchDog, enable Peripheral Clocks
-// This example function is found in the DSP2833x_SysCtrl.c file.
-   InitSysCtrl();
-
-// Specific clock setting for this example:
-   EALLOW;
-   SysCtrlRegs.HISPCP.all = ADC_MODCLK;	// HSPCLK = SYSCLKOUT/ADC_MODCLK
-   EDIS;
-
-// Step 2. Initialize GPIO:
-// This example function is found in the DSP2833x_Gpio.c file and
-// illustrates how to set the GPIO to it's default state.
-// InitGpio();  // Skipped for this example
-
-// Step 3. Clear all interrupts and initialize PIE vector table:
-// Disable CPU interrupts
-   DINT;
-
-// Initialize the PIE control registers to their default state.
-// The default state is all PIE interrupts disabled and flags
-// are cleared.
-// This function is found in the DSP2833x_PieCtrl.c file.
-   InitPieCtrl();
-
-// Disable CPU interrupts and clear all CPU interrupt flags:
-   IER = 0x0000;
-   IFR = 0x0000;
-
-// Initialize the PIE vector table with pointers to the shell Interrupt
-// Service Routines (ISR).
-// This will populate the entire table, even if the interrupt
-// is not used in this example.  This is useful for debug purposes.
-// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
-// This function is found in DSP2833x_PieVect.c.
-   InitPieVectTable();
-
-// Interrupts that are used in this example are re-mapped to
-// ISR functions found within this file.
-   EALLOW;	// Allow access to EALLOW protected registers
-   PieVectTable.DINTCH1= &local_DINTCH1_ISR;
-   EDIS;   // Disable access to EALLOW protected registers
-      
-   IER = M_INT7 ;	                             //Enable INT7 (7.1 DMA Ch1)
-   EnableInterrupts();
-   
-// Step 4. Initialize all the Device Peripherals:
-// This function is found in DSP2833x_InitPeripherals.c
-// InitPeripherals(); // Not required for this example
-   InitAdc();  // For this example, init the ADC
-
-// Specific ADC setup for this example:
-   AdcRegs.ADCTRL1.bit.ACQ_PS = ADC_SHCLK;
-   AdcRegs.ADCTRL3.bit.ADCCLKPS = ADC_CKPS;
-   AdcRegs.ADCTRL1.bit.SEQ_CASC = 0;        // 0 Non-Cascaded Mode
-   AdcRegs.ADCTRL2.bit.INT_ENA_SEQ1 = 0x1;
-   AdcRegs.ADCTRL2.bit.RST_SEQ1 = 0x1;
-   AdcRegs.ADCCHSELSEQ1.bit.CONV00 = 0x0;
-   AdcRegs.ADCCHSELSEQ1.bit.CONV01 = 0x1;
-   AdcRegs.ADCCHSELSEQ1.bit.CONV02 = 0x2;
-   AdcRegs.ADCCHSELSEQ1.bit.CONV03 = 0x3;
-   AdcRegs.ADCCHSELSEQ2.bit.CONV04 = 0x0;
-   AdcRegs.ADCCHSELSEQ2.bit.CONV05 = 0x1;
-   AdcRegs.ADCCHSELSEQ2.bit.CONV06 = 0x2;
-   AdcRegs.ADCCHSELSEQ2.bit.CONV07 = 0x3;
-   AdcRegs.ADCMAXCONV.bit.MAX_CONV1 = 3;   // Set up ADC to perform 4 conversions for every SOC
-   
-//Step 5. User specific code, enable interrupts:
-  // Initialize DMA 
-	DMAInitialize();
-
-	// Clear Table
-   for (i=0; i<BUF_SIZE; i++)
-   {
-     DMABuf1[i] = 0;
-   }
-
-	
-// Configure DMA Channel
-    DMADest   = &DMABuf1[0];              //Point DMA destination to the beginning of the array
-	DMASource = &AdcMirror.ADCRESULT0;    //Point DMA source to ADC result register base
-	DMACH1AddrConfig(DMADest,DMASource);
-	DMACH1BurstConfig(3,1,10);
-	DMACH1TransferConfig(9,1,0);
-	DMACH1WrapConfig(1,0,0,1);
-	DMACH1ModeConfig(DMA_SEQ1INT,PERINT_ENABLE,ONESHOT_DISABLE,CONT_DISABLE,SYNC_DISABLE,SYNC_SRC,
-	                 OVRFLOW_DISABLE,SIXTEEN_BIT,CHINT_END,CHINT_ENABLE); 
-
- 
-
- 
-
-	StartDMACH1();
-
-   
-
-   // Start SEQ1
-   AdcRegs.ADCTRL2.bit.SOC_SEQ1 = 0x1;
-   for(i=0;i<10;i++){
-    	for(j=0;j<1000;j++){}
-        AdcRegs.ADCTRL2.bit.SOC_SEQ1 = 1;    //Normally ADC will be tied to ePWM, or timed routine
-   }	                                     //For this example will re-start manually                   
-
-}
-
-// INT7.1
-interrupt void local_DINTCH1_ISR(void)     // DMA Channel 1
-{
-  
-  // To receive more interrupts from this PIE group, acknowledge this interrupt 
-   PieCtrlRegs.PIEACK.all = PIEACK_GROUP7;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-   asm ("      ESTOP0");
-   for(;;);
-}
-
-
diff --git a/Source/External/v120/DSP2833x_examples/adc_dma/Example_2833xAdcToDMA.gel b/Source/External/v120/DSP2833x_examples/adc_dma/Example_2833xAdcToDMA.gel
deleted file mode 100644
index 7bc7b69..0000000
--- a/Source/External/v120/DSP2833x_examples/adc_dma/Example_2833xAdcToDMA.gel
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
-// TI File $Revision: /main/1 $
-// Checkin $Date: August 14, 2007   14:20:30 $
-//###########################################################################
-//
-// This .gel file can be used to help load and build the example project.
-// It should be unloaded from Code Composer Studio before loading another 
-// project. 
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-*/
-
-menuitem "DSP2833x ADC SOC Example"
-
-hotmenu Load_and_Build_Project()
-{
-   GEL_ProjectLoad("Example_2833xAdcToDMA.pjt");
-   GEL_ProjectBuild("Example_2833xAdcToDMA.pjt");
-   Setup_WatchWindow();
-}
-
-hotmenu Load_Code()
-{
-   GEL_Load(".\\debug\\Example_2833xAdcToDMA.out");
-   Setup_WatchWindow();
-}
-
-hotmenu Setup_WatchWindow()
-{
-   GEL_WatchReset();
-   GEL_WatchAdd("AdcRegs,x");
-   GEL_WatchAdd("DMABuf1,x");
-}
diff --git a/Source/External/v120/DSP2833x_examples/adc_dma/Example_2833xAdcToDMA.pjt b/Source/External/v120/DSP2833x_examples/adc_dma/Example_2833xAdcToDMA.pjt
deleted file mode 100644
index f9f45bb..0000000
--- a/Source/External/v120/DSP2833x_examples/adc_dma/Example_2833xAdcToDMA.pjt
+++ /dev/null
@@ -1,47 +0,0 @@
-; Code Composer Project File, Version 2.0 (do not modify or remove this line)
-
-[Project Settings]
-ProjectName="DSP28"
-ProjectDir="C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\adc_dma\"
-ProjectType=Executable
-CPUFamily=TMS320C28XX
-Tool="Compiler"
-Tool="CustomBuilder"
-Tool="DspBiosBuilder"
-Tool="Linker"
-Config="Debug"
-Config="Release"
-
-[Source Files]
-Source="..\..\DSP2833x_common\source\DSP2833x_Adc.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_ADC_cal.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CodeStartBranch.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_DefaultIsr.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_DMA.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieVect.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_SysCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_usDelay.asm"
-Source="..\..\DSP2833x_headers\source\DSP2833x_GlobalVariableDefs.c"
-Source="Example_2833xAdcToDMA.c"
-Source="..\..\DSP2833x_common\cmd\28335_RAM_lnk.cmd"
-Source="..\..\DSP2833x_headers\cmd\DSP2833x_Headers_nonBIOS.cmd"
-
-["Compiler" Settings: "Debug"]
-Options=-g -q -pdr -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\adc_dma\Debug" -fs"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\adc_dma\Debug" -i"..\..\DSP2833x_headers\include" -i"..\..\DSP2833x_common\include" -d"_DEBUG" -d"LARGE_MODEL" --float_support=fpu32 -ml -mt -v28
-
-["Compiler" Settings: "Release"]
-Options=-q -o3 -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\adc_dma\Release" -d"LARGE_MODEL" -ml -v28
-
-["DspBiosBuilder" Settings: "Debug"]
-Options=-v28
-
-["DspBiosBuilder" Settings: "Release"]
-Options=-v28
-
-["Linker" Settings: "Debug"]
-Options=-q -c -ecode_start -m".\Debug\Example_2833xAdcToDMA.map" -o".\Debug\Example_2833xAdcToDMA.out" -stack0x380 -w -x -i"..\..\DSP2833x_headers\include" -l"rts2800_fpu32.lib"
-
-["Linker" Settings: "Release"]
-Options=-q -c -o".\Release\Example_2833xAdcToDMA.out" -x
-
diff --git a/Source/External/v120/DSP2833x_examples/adc_seq_ovd_test/Example_2833xAdcSeq_ovdTest.c b/Source/External/v120/DSP2833x_examples/adc_seq_ovd_test/Example_2833xAdcSeq_ovdTest.c
deleted file mode 100644
index 5202d1a..0000000
--- a/Source/External/v120/DSP2833x_examples/adc_seq_ovd_test/Example_2833xAdcSeq_ovdTest.c
+++ /dev/null
@@ -1,266 +0,0 @@
-// TI File $Revision: /main/10 $
-// Checkin $Date: April 21, 2008   15:40:51 $
-//###########################################################################
-//
-// FILE:   Example_2833xAdcSeq_ovdTest.c
-//
-// TITLE:  DSP2833x ADC Seq Override mode Test.
-//
-// ASSUMPTIONS:
-//
-//    This program requires the DSP2833x header files.
-//
-//    Make sure the CPU clock speed is properly defined in
-//    DSP2833x_Examples.h before compiling this example.
-//
-//    Connect the signal to be converted to Channel A0.
-//
-//    As supplied, this project is configured for "boot to SARAM"
-//    operation.  The 2833x Boot Mode table is shown below.
-//    For information on configuring the boot mode of an eZdsp,
-//    please refer to the documentation included with the eZdsp,
-//
-//       $Boot_Table:
-//
-//         GPIO87   GPIO86     GPIO85   GPIO84
-//          XA15     XA14       XA13     XA12
-//           PU       PU         PU       PU
-//        ==========================================
-//            1        1          1        1    Jump to Flash
-//            1        1          1        0    SCI-A boot
-//            1        1          0        1    SPI-A boot
-//            1        1          0        0    I2C-A boot
-//            1        0          1        1    eCAN-A boot
-//            1        0          1        0    McBSP-A boot
-//            1        0          0        1    Jump to XINTF x16
-//            1        0          0        0    Jump to XINTF x32
-//            0        1          1        1    Jump to OTP
-//            0        1          1        0    Parallel GPIO I/O boot
-//            0        1          0        1    Parallel XINTF boot
-//            0        1          0        0    Jump to SARAM	    <- "boot to SARAM"
-//            0        0          1        1    Branch to check boot mode
-//            0        0          1        0    Boot to flash, bypass ADC cal
-//            0        0          0        1    Boot to SARAM, bypass ADC cal
-//            0        0          0        0    Boot to SCI-A, bypass ADC cal
-//                                              Boot_Table_End$
-//
-// DESCRIPTION:
-//
-//    Channel A0 is converted forever and logged in a buffer (SampleTable)
-//    Using sequencer1 in sequencer override mode. Sequencer is Sequential mode
-//    with sample rate of1/(3*40ns) =8.3MHz
-//
-//    Open a memory window to SampletTable to observe the buffer
-//    RUN for a while and stop and see the table contents.
-//
-//       Watch Variables:
-//          SampleTable - Log of converted values.
-//          GPIO34      - Toggles on every ADC sequencer flag
-//
-//###########################################################################
-//
-// Original source by: S.S.
-//
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File
-
-// Determine when the shift to right justify the data takes place
-// Only one of these should be defined as 1.
-// The other two should be defined as 0.
-#define POST_SHIFT   0  // Shift results after the entire sample table is full
-#define INLINE_SHIFT 1  // Shift results as the data is taken from the results regsiter
-#define NO_SHIFT     0  // Do not shift the results
-
-// ADC start parameters
-#if (CPU_FRQ_150MHZ)     // Default - 150 MHz SYSCLKOUT
-  #define ADC_MODCLK 0x3 // HSPCLK = SYSCLKOUT/2*ADC_MODCLK2 = 150/(2*3)   = 25.0 MHz
-#endif
-#if (CPU_FRQ_100MHZ)
-  #define ADC_MODCLK 0x2 // HSPCLK = SYSCLKOUT/2*ADC_MODCLK2 = 100/(2*2)   = 25.0 MHz
-#endif
-#define ADC_CKPS   0x0   // ADC module clock = HSPCLK/1      = 25.5MHz/(1)   = 25.0 MHz
-#define ADC_SHCLK  0x1   // S/H width in ADC module periods                  = 2 ADC cycle
-#define AVG        1000  // Average sample limit
-#define ZOFFSET    0x00  // Average Zero offset
-#define BUF_SIZE   1024  // Sample buffer size
-
-// Global variable for this example
-Uint16 SampleTable[BUF_SIZE];
-
-
-main()
-{
-   Uint16 i;
-   Uint16 array_index;
-
-
-// Step 1. Initialize System Control:
-// PLL, WatchDog, enable Peripheral Clocks
-// This example function is found in the DSP2833x_SysCtrl.c file.
-   InitSysCtrl();
-
-// Specific clock setting for this example:
-   EALLOW;
-   SysCtrlRegs.HISPCP.all = ADC_MODCLK;	// HSPCLK = SYSCLKOUT/ADC_MODCLK
-   EDIS;
-
-// Step 2. Initialize GPIO:
-// This example function is found in the DSP2833x_Gpio.c file and
-// illustrates how to set the GPIO to it's default state.
-// InitGpio();  // Skipped for this example
-// Enable the pin GPIO34 as output
-   EALLOW;
-   GpioCtrlRegs.GPBMUX1.bit.GPIO34 = 0;    // GPIO pin
-   GpioCtrlRegs.GPBDIR.bit.GPIO34 = 1;     // Output pin
-   EDIS;
-
-// Step 3. Clear all interrupts and initialize PIE vector table:
-// Disable CPU interrupts
-   DINT;
-
-// Initialize the PIE control registers to their default state.
-// The default state is all PIE interrupts disabled and flags
-// are cleared.
-// This function is found in the DSP2833x_PieCtrl.c file.
-   InitPieCtrl();
-
-// Disable CPU interrupts and clear all CPU interrupt flags:
-   IER = 0x0000;
-   IFR = 0x0000;
-
-// Initialize the PIE vector table with pointers to the shell Interrupt
-// Service Routines (ISR).
-// This will populate the entire table, even if the interrupt
-// is not used in this example.  This is useful for debug purposes.
-// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
-// This function is found in DSP2833x_PieVect.c.
-   InitPieVectTable();
-
-// Step 4. Initialize all the Device Peripherals:
-// This function is found in DSP2833x_InitPeripherals.c
-// InitPeripherals(); // Not required for this example
-   InitAdc();         // For this example, init the ADC
-
-// Specific ADC setup for this example:
-   AdcRegs.ADCTRL1.bit.ACQ_PS = ADC_SHCLK;  // Sequential mode: Sample rate   = 1/[(2+ACQ_PS)*ADC clock in ns]
-                        //                     = 1/(3*40ns) =8.3MHz (for 150 MHz SYSCLKOUT)
-					    //                     = 1/(3*80ns) =4.17MHz (for 100 MHz SYSCLKOUT)
-					    // If Simultaneous mode enabled: Sample rate = 1/[(3+ACQ_PS)*ADC clock in ns]
-   AdcRegs.ADCTRL3.bit.ADCCLKPS = ADC_CKPS;
-   AdcRegs.ADCTRL1.bit.SEQ_CASC = 1;        // 1  Cascaded mode
-   AdcRegs.ADCCHSELSEQ1.bit.CONV00 = 0x0;
-   AdcRegs.ADCTRL1.bit.CONT_RUN = 1;       // Setup continuous run
-
-   AdcRegs.ADCTRL1.bit.SEQ_OVRD = 1;       // Enable Sequencer override feature
-   AdcRegs.ADCCHSELSEQ1.all = 0x0;         // Initialize all ADC channel selects to A0
-   AdcRegs.ADCCHSELSEQ2.all = 0x0;
-   AdcRegs.ADCCHSELSEQ3.all = 0x0;
-   AdcRegs.ADCCHSELSEQ4.all = 0x0;
-   AdcRegs.ADCMAXCONV.bit.MAX_CONV1 = 0x7;  // convert and store in 8 results registers
-
-
-// Step 5. User specific code, enable interrupts:
-
-
-// Clear SampleTable
-   for (i=0; i<BUF_SIZE; i++)
-   {
-     SampleTable[i] = 0;
-   }
-
-// Start SEQ1
-   AdcRegs.ADCTRL2.all = 0x2000;
-
-   for(;;)
-   {  // Take ADC data and log them in SampleTable array
-
-     // Initalize the array index.  This points to the current
-     // location within the SampleTable
-     array_index = 0;
-
-     for (i=0; i<(BUF_SIZE/16); i++)
-     {
-       // Wait for int1
-       while (AdcRegs.ADCST.bit.INT_SEQ1== 0){}
-       GpioDataRegs.GPBSET.bit.GPIO34 = 1;  // Set GPIO34 for monitoring  -optional
-
-       AdcRegs.ADCST.bit.INT_SEQ1_CLR = 1;
-
-#if INLINE_SHIFT
-       SampleTable[array_index++]= ( (AdcRegs.ADCRESULT0)>>4);
-       SampleTable[array_index++]= ( (AdcRegs.ADCRESULT1)>>4);
-       SampleTable[array_index++]= ( (AdcRegs.ADCRESULT2)>>4);
-       SampleTable[array_index++]= ( (AdcRegs.ADCRESULT3)>>4);
-       SampleTable[array_index++]= ( (AdcRegs.ADCRESULT4)>>4);
-       SampleTable[array_index++]= ( (AdcRegs.ADCRESULT5)>>4);
-       SampleTable[array_index++]= ( (AdcRegs.ADCRESULT6)>>4);
-       SampleTable[array_index++]= ( (AdcRegs.ADCRESULT7)>>4);
-
-#endif //-- INLINE_SHIFT
-
-#if NO_SHIFT || POST_SHIFT
-
-       SampleTable[array_index++]= ( (AdcRegs.ADCRESULT0));
-       SampleTable[array_index++]= ( (AdcRegs.ADCRESULT1));
-       SampleTable[array_index++]= ( (AdcRegs.ADCRESULT2));
-       SampleTable[array_index++]= ( (AdcRegs.ADCRESULT3));
-       SampleTable[array_index++]= ( (AdcRegs.ADCRESULT4));
-       SampleTable[array_index++]= ( (AdcRegs.ADCRESULT5));
-       SampleTable[array_index++]= ( (AdcRegs.ADCRESULT6));
-       SampleTable[array_index++]= ( (AdcRegs.ADCRESULT7));
-
-#endif //-- NO_SHIFT || POST_SHIFT
-
-       while (AdcRegs.ADCST.bit.INT_SEQ1== 0){}
- 	   GpioDataRegs.GPBCLEAR.bit.GPIO34 = 1;  // Clear GPIO34 for monitoring  -optional
-       AdcRegs.ADCST.bit.INT_SEQ1_CLR = 1;
-
-#if INLINE_SHIFT
-
-       SampleTable[array_index++]= ( (AdcRegs.ADCRESULT8)>>4);
-       SampleTable[array_index++]= ( (AdcRegs.ADCRESULT9)>>4);
-       SampleTable[array_index++]= ( (AdcRegs.ADCRESULT10)>>4);
-       SampleTable[array_index++]= ( (AdcRegs.ADCRESULT11)>>4);
-       SampleTable[array_index++]= ( (AdcRegs.ADCRESULT12)>>4);
-       SampleTable[array_index++]= ( (AdcRegs.ADCRESULT13)>>4);
-       SampleTable[array_index++]= ( (AdcRegs.ADCRESULT14)>>4);
-       SampleTable[array_index++]= ( (AdcRegs.ADCRESULT15)>>4);
-
-#endif //-- INLINE_SHIFT
-
-#if NO_SHIFT || POST_SHIFT
-
-       SampleTable[array_index++]= ( (AdcRegs.ADCRESULT8));
-       SampleTable[array_index++]= ( (AdcRegs.ADCRESULT9));
-       SampleTable[array_index++]= ( (AdcRegs.ADCRESULT10));
-       SampleTable[array_index++]= ( (AdcRegs.ADCRESULT11));
-       SampleTable[array_index++]= ( (AdcRegs.ADCRESULT12));
-       SampleTable[array_index++]= ( (AdcRegs.ADCRESULT13));
-       SampleTable[array_index++]= ( (AdcRegs.ADCRESULT14));
-       SampleTable[array_index++]= ( (AdcRegs.ADCRESULT15));
-#endif // -- NO_SHIFT || POST_SHIFT
-
-	}
-
-
-#if POST_SHIFT
-    // For post shifting, shift the ADC results
-    // in the SampleTable buffer after the buffer is full.
-    for (i=0; i<BUF_SIZE; i++)
-    {
-      SampleTable[i] = ((SampleTable[i]) >>4);
-    }
-#endif // -- POST_SHIFT
-
-    GpioDataRegs.GPBCLEAR.bit.GPIO34 = 1;  // Clear GPIO34 for monitoring  -optional
-  }
-}
-
-//===========================================================================
-// No more.
-//===========================================================================
-
-
diff --git a/Source/External/v120/DSP2833x_examples/adc_seq_ovd_test/Example_2833xAdcSeq_ovdTest.gel b/Source/External/v120/DSP2833x_examples/adc_seq_ovd_test/Example_2833xAdcSeq_ovdTest.gel
deleted file mode 100644
index 4bf2af1..0000000
--- a/Source/External/v120/DSP2833x_examples/adc_seq_ovd_test/Example_2833xAdcSeq_ovdTest.gel
+++ /dev/null
@@ -1,39 +0,0 @@
-/*
-// TI File $Revision: /main/5 $
-// Checkin $Date: August 9, 2007   17:11:35 $
-//###########################################################################
-//
-// This .gel file can be used to help load and build the example project.
-// It should be unloaded from Code Composer Studio before loading another 
-// project. 
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-*/
-
-menuitem "DSP2833x ADC Seq_ovd Test"
-
-
-hotmenu Load_and_Build_Project()
-{
-   GEL_ProjectLoad("Example_2833xAdcSeq_ovdTest.pjt");
-   GEL_ProjectBuild("Example_2833xAdcSeq_ovdTest.pjt");
-   Setup_WatchWindow();
-}
-
-hotmenu Load_Code()
-{
-   GEL_Load(".\\debug\\Example_2833xAdcSeq_ovdTest.out");
-   Setup_WatchWindow();
-}
-
-hotmenu Setup_WatchWindow()
-{
-   GEL_WatchReset();
-   GEL_WatchAdd("SampleTable,x");
-   GEL_WatchAdd("AdcRegs,x",);
-}
-
-
diff --git a/Source/External/v120/DSP2833x_examples/adc_seq_ovd_test/Example_2833xAdcSeq_ovdTest.pjt b/Source/External/v120/DSP2833x_examples/adc_seq_ovd_test/Example_2833xAdcSeq_ovdTest.pjt
deleted file mode 100644
index 414d901..0000000
--- a/Source/External/v120/DSP2833x_examples/adc_seq_ovd_test/Example_2833xAdcSeq_ovdTest.pjt
+++ /dev/null
@@ -1,45 +0,0 @@
-; Code Composer Project File, Version 2.0 (do not modify or remove this line)
-
-[Project Settings]
-ProjectName="DSP2833x"
-ProjectDir="C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\adc_seq_ovd_test\"
-ProjectType=Executable
-CPUFamily=TMS320C28XX
-Tool="Compiler"
-Tool="DspBiosBuilder"
-Tool="Linker"
-Config="Debug"
-Config="Release"
-
-[Source Files]
-Source="..\..\DSP2833x_common\source\DSP2833x_Adc.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_ADC_cal.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CodeStartBranch.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_DefaultIsr.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieVect.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_SysCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_usDelay.asm"
-Source="..\..\DSP2833x_headers\source\DSP2833x_GlobalVariableDefs.c"
-Source="Example_2833xAdcSeq_ovdTest.c"
-Source="..\..\DSP2833x_common\cmd\28335_RAM_lnk.cmd"
-Source="..\..\DSP2833x_headers\cmd\DSP2833x_Headers_nonBIOS.cmd"
-
-["Compiler" Settings: "Debug"]
-Options=-g -q -pdr -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\adc_seq_ovd_test\Debug" -fs"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\adc_seq_ovd_test\Debug" -i"..\..\DSP2833x_headers\include" -i"..\..\DSP2833x_common\include" -d"_DEBUG" -d"LARGE_MODEL" --float_support=fpu32 -ml -mt -v28
-
-["Compiler" Settings: "Release"]
-Options=-q -o3 -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\adc_seq_ovd_test\Release" -d"LARGE_MODEL" -ml -v28
-
-["DspBiosBuilder" Settings: "Debug"]
-Options=-v28
-
-["DspBiosBuilder" Settings: "Release"]
-Options=-v28
-
-["Linker" Settings: "Debug"]
-Options=-q -c -ecode_start -m".\Debug\Example_2833xAdcSeq_ovdTest.map" -o".\Debug\Example_2833xAdcSeq_ovdTest.out" -stack0x380 -w -x -i"..\..\DSP2833x_headers\include" -l"rts2800_fpu32.lib"
-
-["Linker" Settings: "Release"]
-Options=-q -c -o".\Release\Example_2833xAdcSeq_ovdTest.out" -x
-
diff --git a/Source/External/v120/DSP2833x_examples/adc_seqmode_test/Example_2833xAdcSeqModeTest.c b/Source/External/v120/DSP2833x_examples/adc_seqmode_test/Example_2833xAdcSeqModeTest.c
deleted file mode 100644
index 70299a6..0000000
--- a/Source/External/v120/DSP2833x_examples/adc_seqmode_test/Example_2833xAdcSeqModeTest.c
+++ /dev/null
@@ -1,164 +0,0 @@
-// TI File $Revision: /main/10 $
-// Checkin $Date: April 21, 2008   15:40:57 $
-//###########################################################################
-//
-// FILE:   Example_2833xAdcSeqModeTest.c
-//
-// TITLE:  DSP2833x ADC Seq Mode Test.
-//
-// ASSUMPTIONS:
-//
-//    This program requires the DSP2833x header files.
-//
-//    Make sure the CPU clock speed is properly defined in
-//    DSP2833x_Examples.h before compiling this example.
-//
-//    Connect the signal to be converted to channel A0.
-//
-//    As supplied, this project is configured for "boot to SARAM"
-//    operation.  The 2833x Boot Mode table is shown below.
-//    For information on configuring the boot mode of an eZdsp,
-//    please refer to the documentation included with the eZdsp,
-//
-//       $Boot_Table:
-//
-//         GPIO87   GPIO86     GPIO85   GPIO84
-//          XA15     XA14       XA13     XA12
-//           PU       PU         PU       PU
-//        ==========================================
-//            1        1          1        1    Jump to Flash
-//            1        1          1        0    SCI-A boot
-//            1        1          0        1    SPI-A boot
-//            1        1          0        0    I2C-A boot
-//            1        0          1        1    eCAN-A boot
-//            1        0          1        0    McBSP-A boot
-//            1        0          0        1    Jump to XINTF x16
-//            1        0          0        0    Jump to XINTF x32
-//            0        1          1        1    Jump to OTP
-//            0        1          1        0    Parallel GPIO I/O boot
-//            0        1          0        1    Parallel XINTF boot
-//            0        1          0        0    Jump to SARAM	    <- "boot to SARAM"
-//            0        0          1        1    Branch to check boot mode
-//            0        0          1        0    Boot to flash, bypass ADC cal
-//            0        0          0        1    Boot to SARAM, bypass ADC cal
-//            0        0          0        0    Boot to SCI-A, bypass ADC cal
-//                                              Boot_Table_End$
-//
-// DESCRIPTION:
-//
-//    Channel A0 is converted forever and logged in a buffer (SampleTable)
-//
-//    Open a memory window to SampleTable to observe the buffer
-//    RUN for a while and stop and see the table contents.
-//
-//       Watch Variables:
-//          SampleTable - Log of converted values.
-//
-//###########################################################################
-//
-// Original source by: S.S.
-//
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File
-
-// ADC start parameters
-#if (CPU_FRQ_150MHZ)     // Default - 150 MHz SYSCLKOUT
-  #define ADC_MODCLK 0x3 // HSPCLK = SYSCLKOUT/2*ADC_MODCLK2 = 150/(2*3)   = 25.0 MHz
-#endif
-#if (CPU_FRQ_100MHZ)
-  #define ADC_MODCLK 0x2 // HSPCLK = SYSCLKOUT/2*ADC_MODCLK2 = 100/(2*2)   = 25.0 MHz
-#endif
-#define ADC_CKPS   0x1   // ADC module clock = HSPCLK/2*ADC_CKPS   = 25.0MHz/(1*2) = 12.5MHz
-#define ADC_SHCLK  0xf   // S/H width in ADC module periods                        = 16 ADC clocks
-#define AVG        1000  // Average sample limit
-#define ZOFFSET    0x00  // Average Zero offset
-#define BUF_SIZE   2048  // Sample buffer size
-
-// Global variable for this example
-Uint16 SampleTable[BUF_SIZE];
-
-main()
-{
-   Uint16 i;
-
-// Step 1. Initialize System Control:
-// PLL, WatchDog, enable Peripheral Clocks
-// This example function is found in the DSP2833x_SysCtrl.c file.
-   InitSysCtrl();
-
-// Specific clock setting for this example:
-   EALLOW;
-   SysCtrlRegs.HISPCP.all = ADC_MODCLK;	// HSPCLK = SYSCLKOUT/ADC_MODCLK
-   EDIS;
-
-// Step 2. Initialize GPIO:
-// This example function is found in the DSP2833x_Gpio.c file and
-// illustrates how to set the GPIO to it's default state.
-// InitGpio();  // Skipped for this example
-
-// Step 3. Clear all interrupts and initialize PIE vector table:
-// Disable CPU interrupts
-   DINT;
-
-// Initialize the PIE control registers to their default state.
-// The default state is all PIE interrupts disabled and flags
-// are cleared.
-// This function is found in the DSP2833x_PieCtrl.c file.
-   InitPieCtrl();
-
-// Disable CPU interrupts and clear all CPU interrupt flags:
-   IER = 0x0000;
-   IFR = 0x0000;
-
-// Initialize the PIE vector table with pointers to the shell Interrupt
-// Service Routines (ISR).
-// This will populate the entire table, even if the interrupt
-// is not used in this example.  This is useful for debug purposes.
-// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
-// This function is found in DSP2833x_PieVect.c.
-   InitPieVectTable();
-
-// Step 4. Initialize all the Device Peripherals:
-// This function is found in DSP2833x_InitPeripherals.c
-// InitPeripherals(); // Not required for this example
-   InitAdc();  // For this example, init the ADC
-
-// Specific ADC setup for this example:
-   AdcRegs.ADCTRL1.bit.ACQ_PS = ADC_SHCLK;
-   AdcRegs.ADCTRL3.bit.ADCCLKPS = ADC_CKPS;
-   AdcRegs.ADCTRL1.bit.SEQ_CASC = 1;        // 1  Cascaded mode
-   AdcRegs.ADCCHSELSEQ1.bit.CONV00 = 0x0;
-   AdcRegs.ADCTRL1.bit.CONT_RUN = 1;       // Setup continuous run
-
-
-// Step 5. User specific code, enable interrupts:
-
-
-// Clear SampleTable
-   for (i=0; i<BUF_SIZE; i++)
-   {
-     SampleTable[i] = 0;
-   }
-
-   // Start SEQ1
-   AdcRegs.ADCTRL2.all = 0x2000;
-
-   // Take ADC data and log the in SampleTable array
-   for(;;)
-   {
-     for (i=0; i<AVG; i++)
-     {
-        while (AdcRegs.ADCST.bit.INT_SEQ1== 0) {} // Wait for interrupt
-        AdcRegs.ADCST.bit.INT_SEQ1_CLR = 1;
-        SampleTable[i] =((AdcRegs.ADCRESULT0>>4) );
-     }
-   }
-}
-
-//===========================================================================
-// No more.
-//===========================================================================
-
diff --git a/Source/External/v120/DSP2833x_examples/adc_seqmode_test/Example_2833xAdcSeqModeTest.gel b/Source/External/v120/DSP2833x_examples/adc_seqmode_test/Example_2833xAdcSeqModeTest.gel
deleted file mode 100644
index 6ea6c86..0000000
--- a/Source/External/v120/DSP2833x_examples/adc_seqmode_test/Example_2833xAdcSeqModeTest.gel
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
-// TI File $Revision: /main/5 $
-// Checkin $Date: August 9, 2007   17:11:47 $
-//###########################################################################
-//
-// This .gel file can be used to help load and build the example project.
-// It should be unloaded from Code Composer Studio before loading another 
-// project. 
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-*/
-
-menuitem "DSP2833x ADC Seq Test"
-
-hotmenu Load_and_Build_Project()
-{
-   GEL_ProjectLoad("Example_2833xAdcSeqModeTest.pjt");
-   GEL_ProjectBuild("Example_2833xAdcSeqModeTest.pjt");
-   Setup_WatchWindow();
-}
-
-hotmenu Load_Code()
-{
-   GEL_Load(".\\debug\\Example_2833xAdcSeqModeTest.out");
-   Setup_WatchWindow();
-}
-
-
-hotmenu Setup_WatchWindow()
-{
-   GEL_WatchReset();
-   GEL_WatchAdd("SampleTable,x");
-   GEL_WatchAdd("AdcRegs,x");
-}
diff --git a/Source/External/v120/DSP2833x_examples/adc_seqmode_test/Example_2833xAdcSeqModeTest.pjt b/Source/External/v120/DSP2833x_examples/adc_seqmode_test/Example_2833xAdcSeqModeTest.pjt
deleted file mode 100644
index 35d0116..0000000
--- a/Source/External/v120/DSP2833x_examples/adc_seqmode_test/Example_2833xAdcSeqModeTest.pjt
+++ /dev/null
@@ -1,45 +0,0 @@
-; Code Composer Project File, Version 2.0 (do not modify or remove this line)
-
-[Project Settings]
-ProjectName="DSP2833x"
-ProjectDir="C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\adc_seqmode_test\"
-ProjectType=Executable
-CPUFamily=TMS320C28XX
-Tool="Compiler"
-Tool="DspBiosBuilder"
-Tool="Linker"
-Config="Debug"
-Config="Release"
-
-[Source Files]
-Source="..\..\DSP2833x_common\source\DSP2833x_Adc.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_ADC_cal.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CodeStartBranch.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_DefaultIsr.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieVect.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_SysCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_usDelay.asm"
-Source="..\..\DSP2833x_headers\source\DSP2833x_GlobalVariableDefs.c"
-Source="Example_2833xAdcSeqModeTest.c"
-Source="..\..\DSP2833x_common\cmd\28335_RAM_lnk.cmd"
-Source="..\..\DSP2833x_headers\cmd\DSP2833x_Headers_nonBIOS.cmd"
-
-["Compiler" Settings: "Debug"]
-Options=-g -q -pdr -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\adc_seqmode_test\Debug" -fs"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\adc_seqmode_test\Debug" -i"..\..\DSP2833x_headers\include" -i"..\..\DSP2833x_common\include" -d"_DEBUG" -d"LARGE_MODEL" --float_support=fpu32 -ml -mt -v28
-
-["Compiler" Settings: "Release"]
-Options=-q -o3 -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\adc_seqmode_test\Release" -d"LARGE_MODEL" -ml -v28
-
-["DspBiosBuilder" Settings: "Debug"]
-Options=-v28
-
-["DspBiosBuilder" Settings: "Release"]
-Options=-v28
-
-["Linker" Settings: "Debug"]
-Options=-q -c -ecode_start -m".\Debug\Example_2833xAdcSeqModeTest.map" -o".\Debug\Example_2833xAdcSeqModeTest.out" -stack0x380 -w -x -i"..\..\DSP2833x_headers\include" -l"rts2800_fpu32.lib"
-
-["Linker" Settings: "Release"]
-Options=-q -c -o".\Release\Example_2833xAdcSeqModeTest.out" -x
-
diff --git a/Source/External/v120/DSP2833x_examples/adc_soc/Example_2833xAdcSoc.c b/Source/External/v120/DSP2833x_examples/adc_soc/Example_2833xAdcSoc.c
deleted file mode 100644
index 6a53322..0000000
--- a/Source/External/v120/DSP2833x_examples/adc_soc/Example_2833xAdcSoc.c
+++ /dev/null
@@ -1,203 +0,0 @@
-// TI File $Revision: /main/11 $
-// Checkin $Date: April 21, 2008   15:41:01 $
-//###########################################################################
-//
-// FILE:   Example_2833xAdc.c
-//
-// TITLE:  DSP2833x ADC Example Program.
-//
-// ASSUMPTIONS:
-//
-//   This program requires the DSP2833x header files.
-//
-//   Make sure the CPU clock speed is properly defined in
-//   DSP2833x_Examples.h before compiling this example.
-//
-//   Connect signals to be converted to A2 and A3.
-//
-//    As supplied, this project is configured for "boot to SARAM"
-//    operation.  The 2833x Boot Mode table is shown below.
-//    For information on configuring the boot mode of an eZdsp,
-//    please refer to the documentation included with the eZdsp,
-//
-//       $Boot_Table:
-//
-//         GPIO87   GPIO86     GPIO85   GPIO84
-//          XA15     XA14       XA13     XA12
-//           PU       PU         PU       PU
-//        ==========================================
-//            1        1          1        1    Jump to Flash
-//            1        1          1        0    SCI-A boot
-//            1        1          0        1    SPI-A boot
-//            1        1          0        0    I2C-A boot
-//            1        0          1        1    eCAN-A boot
-//            1        0          1        0    McBSP-A boot
-//            1        0          0        1    Jump to XINTF x16
-//            1        0          0        0    Jump to XINTF x32
-//            0        1          1        1    Jump to OTP
-//            0        1          1        0    Parallel GPIO I/O boot
-//            0        1          0        1    Parallel XINTF boot
-//            0        1          0        0    Jump to SARAM	    <- "boot to SARAM"
-//            0        0          1        1    Branch to check boot mode
-//            0        0          1        0    Boot to flash, bypass ADC cal
-//            0        0          0        1    Boot to SARAM, bypass ADC cal
-//            0        0          0        0    Boot to SCI-A, bypass ADC cal
-//                                              Boot_Table_End$
-//
-// DESCRIPTION:
-//
-//   This example sets up the PLL in x10/2 mode.
-//
-//   For 150 MHz devices (default)
-//   divides SYSCLKOUT by six to reach a 25.0Mhz HSPCLK
-//   (assuming a 30Mhz XCLKIN).
-//
-//   For 100 MHz devices:
-//   divides SYSCLKOUT by four to reach a 25.0Mhz HSPCLK
-//   (assuming a 20Mhz XCLKIN).
-//
-//   Interrupts are enabled and the ePWM1 is setup to generate a periodic
-//   ADC SOC on SEQ1. Two channels are converted, ADCINA3 and ADCINA2.
-//
-//   Watch Variables:
-//
-//         Voltage1[10]     Last 10 ADCRESULT0 values
-//         Voltage2[10]     Last 10 ADCRESULT1 values
-//         ConversionCount  Current result number 0-9
-//         LoopCount        Idle loop counter
-//
-//
-//###########################################################################
-//
-// Original Author: D.F.
-//
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File
-
-// Prototype statements for functions found within this file.
-interrupt void adc_isr(void);
-
-// Global variables used in this example:
-Uint16 LoopCount;
-Uint16 ConversionCount;
-Uint16 Voltage1[10];
-Uint16 Voltage2[10];
-
-
-main()
-{
-
-// Step 1. Initialize System Control:
-// PLL, WatchDog, enable Peripheral Clocks
-// This example function is found in the DSP2833x_SysCtrl.c file.
-   InitSysCtrl();
-
-
-   EALLOW;
-   #if (CPU_FRQ_150MHZ)     // Default - 150 MHz SYSCLKOUT
-     #define ADC_MODCLK 0x3 // HSPCLK = SYSCLKOUT/2*ADC_MODCLK2 = 150/(2*3)   = 25.0 MHz
-   #endif
-   #if (CPU_FRQ_100MHZ)
-     #define ADC_MODCLK 0x2 // HSPCLK = SYSCLKOUT/2*ADC_MODCLK2 = 100/(2*2)   = 25.0 MHz
-   #endif
-   EDIS;
-
-// Step 2. Initialize GPIO:
-// This example function is found in the DSP2833x_Gpio.c file and
-// illustrates how to set the GPIO to it's default state.
-// InitGpio();  // Skipped for this example
-
-// Step 3. Clear all interrupts and initialize PIE vector table:
-// Disable CPU interrupts
-   DINT;
-
-// Initialize the PIE control registers to their default state.
-// The default state is all PIE interrupts disabled and flags
-// are cleared.
-// This function is found in the DSP2833x_PieCtrl.c file.
-   InitPieCtrl();
-
-// Disable CPU interrupts and clear all CPU interrupt flags:
-   IER = 0x0000;
-   IFR = 0x0000;
-
-// Initialize the PIE vector table with pointers to the shell Interrupt
-// Service Routines (ISR).
-// This will populate the entire table, even if the interrupt
-// is not used in this example.  This is useful for debug purposes.
-// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
-// This function is found in DSP2833x_PieVect.c.
-   InitPieVectTable();
-
-// Interrupts that are used in this example are re-mapped to
-// ISR functions found within this file.
-   EALLOW;  // This is needed to write to EALLOW protected register
-   PieVectTable.ADCINT = &adc_isr;
-   EDIS;    // This is needed to disable write to EALLOW protected registers
-
-// Step 4. Initialize all the Device Peripherals:
-// This function is found in DSP2833x_InitPeripherals.c
-// InitPeripherals(); // Not required for this example
-   InitAdc();  // For this example, init the ADC
-
-// Step 5. User specific code, enable interrupts:
-
-// Enable ADCINT in PIE
-   PieCtrlRegs.PIEIER1.bit.INTx6 = 1;
-   IER |= M_INT1; // Enable CPU Interrupt 1
-   EINT;          // Enable Global interrupt INTM
-   ERTM;          // Enable Global realtime interrupt DBGM
-
-   LoopCount = 0;
-   ConversionCount = 0;
-
-// Configure ADC
-   AdcRegs.ADCMAXCONV.all = 0x0001;       // Setup 2 conv's on SEQ1
-   AdcRegs.ADCCHSELSEQ1.bit.CONV00 = 0x3; // Setup ADCINA3 as 1st SEQ1 conv.
-   AdcRegs.ADCCHSELSEQ1.bit.CONV01 = 0x2; // Setup ADCINA2 as 2nd SEQ1 conv.
-   AdcRegs.ADCTRL2.bit.EPWM_SOCA_SEQ1 = 1;// Enable SOCA from ePWM to start SEQ1
-   AdcRegs.ADCTRL2.bit.INT_ENA_SEQ1 = 1;  // Enable SEQ1 interrupt (every EOS)
-
-// Assumes ePWM1 clock is already enabled in InitSysCtrl();
-   EPwm1Regs.ETSEL.bit.SOCAEN = 1;        // Enable SOC on A group
-   EPwm1Regs.ETSEL.bit.SOCASEL = 4;       // Select SOC from from CPMA on upcount
-   EPwm1Regs.ETPS.bit.SOCAPRD = 1;        // Generate pulse on 1st event
-   EPwm1Regs.CMPA.half.CMPA = 0x0080;	  // Set compare A value
-   EPwm1Regs.TBPRD = 0xFFFF;              // Set period for ePWM1
-   EPwm1Regs.TBCTL.bit.CTRMODE = 0;		  // count up and start
-
-// Wait for ADC interrupt
-   for(;;)
-   {
-      LoopCount++;
-   }
-
-}
-
-
-interrupt void  adc_isr(void)
-{
-
-  Voltage1[ConversionCount] = AdcRegs.ADCRESULT0 >>4;
-  Voltage2[ConversionCount] = AdcRegs.ADCRESULT1 >>4;
-
-  // If 40 conversions have been logged, start over
-  if(ConversionCount == 9)
-  {
-     ConversionCount = 0;
-  }
-  else ConversionCount++;
-
-  // Reinitialize for next ADC sequence
-  AdcRegs.ADCTRL2.bit.RST_SEQ1 = 1;         // Reset SEQ1
-  AdcRegs.ADCST.bit.INT_SEQ1_CLR = 1;       // Clear INT SEQ1 bit
-  PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;   // Acknowledge interrupt to PIE
-
-  return;
-}
-
-
-
diff --git a/Source/External/v120/DSP2833x_examples/adc_soc/Example_2833xAdcSoc.gel b/Source/External/v120/DSP2833x_examples/adc_soc/Example_2833xAdcSoc.gel
deleted file mode 100644
index 2d14fe1..0000000
--- a/Source/External/v120/DSP2833x_examples/adc_soc/Example_2833xAdcSoc.gel
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
-// TI File $Revision: /main/5 $
-// Checkin $Date: August 9, 2007   17:11:59 $
-//###########################################################################
-//
-// This .gel file can be used to help load and build the example project.
-// It should be unloaded from Code Composer Studio before loading another 
-// project. 
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-*/
-
-menuitem "DSP2833x ADC SOC Example"
-
-hotmenu Load_and_Build_Project()
-{
-   GEL_ProjectLoad("Example_2833xAdcSoc.pjt");
-   GEL_ProjectBuild("Example_2833xAdcSoc.pjt");
-   Setup_WatchWindow();
-}
-
-hotmenu Load_Code()
-{
-   GEL_Load(".\\debug\\Example_2833xAdcSoc.out");
-   Setup_WatchWindow();
-}
-
-hotmenu Setup_WatchWindow()
-{
-   GEL_WatchReset();
-   GEL_WatchAdd("Voltage1,x");
-   GEL_WatchAdd("Voltage2,x");
-   GEL_WatchAdd("LoopCount,x");
-   GEL_WatchAdd("ConversionCount,d");
-   GEL_WatchAdd("AdcRegs,x");
-   GEL_WatchAdd("EPwm1Regs,x");
-}
diff --git a/Source/External/v120/DSP2833x_examples/adc_soc/Example_2833xAdcSoc.pjt b/Source/External/v120/DSP2833x_examples/adc_soc/Example_2833xAdcSoc.pjt
deleted file mode 100644
index 0c46c78..0000000
--- a/Source/External/v120/DSP2833x_examples/adc_soc/Example_2833xAdcSoc.pjt
+++ /dev/null
@@ -1,46 +0,0 @@
-; Code Composer Project File, Version 2.0 (do not modify or remove this line)
-
-[Project Settings]
-ProjectName="DSP28"
-ProjectDir="C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\adc_soc\"
-ProjectType=Executable
-CPUFamily=TMS320C28XX
-Tool="Compiler"
-Tool="DspBiosBuilder"
-Tool="Linker"
-Config="Debug"
-Config="Release"
-
-[Source Files]
-Source="..\..\DSP2833x_common\source\DSP2833x_Adc.c"
-
-Source="..\..\DSP2833x_common\source\DSP2833x_ADC_cal.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CodeStartBranch.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_DefaultIsr.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieVect.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_SysCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_usDelay.asm"
-Source="..\..\DSP2833x_headers\source\DSP2833x_GlobalVariableDefs.c"
-Source="Example_2833xAdcSoc.c"
-Source="..\..\DSP2833x_common\cmd\28335_RAM_lnk.cmd"
-Source="..\..\DSP2833x_headers\cmd\DSP2833x_Headers_nonBIOS.cmd"
-
-["Compiler" Settings: "Debug"]
-Options=-g -q -pdr -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\adc_soc\Debug" -fs"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\adc_soc\Debug" -i"..\..\DSP2833x_headers\include" -i"..\..\DSP2833x_common\include" -d"_DEBUG" -d"LARGE_MODEL" --float_support=fpu32 -ml -mt -v28
-
-["Compiler" Settings: "Release"]
-Options=-q -o3 -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\adc_soc\Release" -d"LARGE_MODEL" -ml -v28
-
-["DspBiosBuilder" Settings: "Debug"]
-Options=-v28
-
-["DspBiosBuilder" Settings: "Release"]
-Options=-v28
-
-["Linker" Settings: "Debug"]
-Options=-q -c -ecode_start -m".\Debug\Example_2833xAdcSoc.map" -o".\Debug\Example_2833xAdcSoc.out" -stack0x380 -w -x -i"..\..\DSP2833x_headers\include" -l"rts2800_fpu32.lib"
-
-["Linker" Settings: "Release"]
-Options=-q -c -o".\Release\Example_2833xAdcSoc.out" -x
-
diff --git a/Source/External/v120/DSP2833x_examples/cpu_timer/Example_2833xCpuTimer.c b/Source/External/v120/DSP2833x_examples/cpu_timer/Example_2833xCpuTimer.c
deleted file mode 100644
index a4bfaff..0000000
--- a/Source/External/v120/DSP2833x_examples/cpu_timer/Example_2833xCpuTimer.c
+++ /dev/null
@@ -1,189 +0,0 @@
-// TI File $Revision: /main/14 $
-// Checkin $Date: April 21, 2008   15:41:07 $
-//###########################################################################
-//
-// FILE:    Example_2833xCpuTimer.c
-//
-// TITLE:   DSP2833x Device Getting Started Program.
-//
-// ASSUMPTIONS:
-//
-//    This program requires the DSP2833x header files.
-//
-//    Other then boot mode configuration, no other hardware configuration
-//    is required.
-//
-//
-//    As supplied, this project is configured for "boot to SARAM"
-//    operation.  The 2833x Boot Mode table is shown below.
-//    For information on configuring the boot mode of an eZdsp,
-//    please refer to the documentation included with the eZdsp,
-//
-//       $Boot_Table:
-//
-//         GPIO87   GPIO86     GPIO85   GPIO84
-//          XA15     XA14       XA13     XA12
-//           PU       PU         PU       PU
-//        ==========================================
-//            1        1          1        1    Jump to Flash
-//            1        1          1        0    SCI-A boot
-//            1        1          0        1    SPI-A boot
-//            1        1          0        0    I2C-A boot
-//            1        0          1        1    eCAN-A boot
-//            1        0          1        0    McBSP-A boot
-//            1        0          0        1    Jump to XINTF x16
-//            1        0          0        0    Jump to XINTF x32
-//            0        1          1        1    Jump to OTP
-//            0        1          1        0    Parallel GPIO I/O boot
-//            0        1          0        1    Parallel XINTF boot
-//            0        1          0        0    Jump to SARAM	    <- "boot to SARAM"
-//            0        0          1        1    Branch to check boot mode
-//            0        0          1        0    Boot to flash, bypass ADC cal
-//            0        0          0        1    Boot to SARAM, bypass ADC cal
-//            0        0          0        0    Boot to SCI-A, bypass ADC cal
-//                                              Boot_Table_End$
-//
-// DESCRIPTION:
-//
-//    This example configures CPU Timer0, 1, and 2 and increments
-//    a counter each time the timers assert an interrupt.
-//
-//       Watch Variables:
-//          CpuTimer0.InterruptCount
-//          CpuTimer1.InterruptCount
-//          CpuTimer2.InterruptCount
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-
-#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File
-
-// Prototype statements for functions found within this file.
-interrupt void cpu_timer0_isr(void);
-interrupt void cpu_timer1_isr(void);
-interrupt void cpu_timer2_isr(void);
-
-void main(void)
-{
-
-// Step 1. Initialize System Control:
-// PLL, WatchDog, enable Peripheral Clocks
-// This example function is found in the DSP2833x_SysCtrl.c file.
-   InitSysCtrl();
-
-// Step 2. Initalize GPIO:
-// This example function is found in the DSP2833x_Gpio.c file and
-// illustrates how to set the GPIO to it's default state.
-// InitGpio();  // Skipped for this example
-
-
-// Step 3. Clear all interrupts and initialize PIE vector table:
-// Disable CPU interrupts
-   DINT;
-
-// Initialize the PIE control registers to their default state.
-// The default state is all PIE interrupts disabled and flags
-// are cleared.
-// This function is found in the DSP2833x_PieCtrl.c file.
-   InitPieCtrl();
-
-// Disable CPU interrupts and clear all CPU interrupt flags:
-   IER = 0x0000;
-   IFR = 0x0000;
-
-// Initialize the PIE vector table with pointers to the shell Interrupt
-// Service Routines (ISR).
-// This will populate the entire table, even if the interrupt
-// is not used in this example.  This is useful for debug purposes.
-// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
-// This function is found in DSP2833x_PieVect.c.
-   InitPieVectTable();
-
-// Interrupts that are used in this example are re-mapped to
-// ISR functions found within this file.
-   EALLOW;  // This is needed to write to EALLOW protected registers
-   PieVectTable.TINT0 = &cpu_timer0_isr;
-   PieVectTable.XINT13 = &cpu_timer1_isr;
-   PieVectTable.TINT2 = &cpu_timer2_isr;
-   EDIS;    // This is needed to disable write to EALLOW protected registers
-
-// Step 4. Initialize the Device Peripheral. This function can be
-//         found in DSP2833x_CpuTimers.c
-   InitCpuTimers();   // For this example, only initialize the Cpu Timers
-
-#if (CPU_FRQ_150MHZ)
-// Configure CPU-Timer 0, 1, and 2 to interrupt every second:
-// 150MHz CPU Freq, 1 second Period (in uSeconds)
-
-   ConfigCpuTimer(&CpuTimer0, 150, 1000000);
-   ConfigCpuTimer(&CpuTimer1, 150, 1000000);
-   ConfigCpuTimer(&CpuTimer2, 150, 1000000);
-#endif
-
-#if (CPU_FRQ_100MHZ)
-// Configure CPU-Timer 0, 1, and 2 to interrupt every second:
-// 100MHz CPU Freq, 1 second Period (in uSeconds)
-
-   ConfigCpuTimer(&CpuTimer0, 100, 1000000);
-   ConfigCpuTimer(&CpuTimer1, 100, 1000000);
-   ConfigCpuTimer(&CpuTimer2, 100, 1000000);
-#endif
-// To ensure precise timing, use write-only instructions to write to the entire register. Therefore, if any
-// of the configuration bits are changed in ConfigCpuTimer and InitCpuTimers (in DSP2833x_CpuTimers.h), the
-// below settings must also be updated.
-
-   CpuTimer0Regs.TCR.all = 0x4001; // Use write-only instruction to set TSS bit = 0
-   CpuTimer1Regs.TCR.all = 0x4001; // Use write-only instruction to set TSS bit = 0
-   CpuTimer2Regs.TCR.all = 0x4001; // Use write-only instruction to set TSS bit = 0
-
-// Step 5. User specific code, enable interrupts:
-
-
-// Enable CPU int1 which is connected to CPU-Timer 0, CPU int13
-// which is connected to CPU-Timer 1, and CPU int 14, which is connected
-// to CPU-Timer 2:
-   IER |= M_INT1;
-   IER |= M_INT13;
-   IER |= M_INT14;
-
-// Enable TINT0 in the PIE: Group 1 interrupt 7
-   PieCtrlRegs.PIEIER1.bit.INTx7 = 1;
-
-// Enable global Interrupts and higher priority real-time debug events:
-   EINT;   // Enable Global interrupt INTM
-   ERTM;   // Enable Global realtime interrupt DBGM
-
-// Step 6. IDLE loop. Just sit and loop forever (optional):
-   for(;;);
-
-}
-
-
-interrupt void cpu_timer0_isr(void)
-{
-   CpuTimer0.InterruptCount++;
-
-   // Acknowledge this interrupt to receive more interrupts from group 1
-   PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
-}
-
-interrupt void cpu_timer1_isr(void)
-{
-   CpuTimer1.InterruptCount++;
-   // The CPU acknowledges the interrupt.
-   EDIS;
-}
-
-interrupt void cpu_timer2_isr(void)
-{  EALLOW;
-   CpuTimer2.InterruptCount++;
-   // The CPU acknowledges the interrupt.
-   EDIS;
-}
-
-//===========================================================================
-// No more.
-//===========================================================================
diff --git a/Source/External/v120/DSP2833x_examples/cpu_timer/Example_2833xCpuTimer.gel b/Source/External/v120/DSP2833x_examples/cpu_timer/Example_2833xCpuTimer.gel
deleted file mode 100644
index cd7890d..0000000
--- a/Source/External/v120/DSP2833x_examples/cpu_timer/Example_2833xCpuTimer.gel
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
-// TI File $Revision: /main/6 $
-// Checkin $Date: August 9, 2007   17:12:13 $
-//###########################################################################
-//
-// This .gel file can be used to help load and build the example project.
-// It should be unloaded from Code Composer Studio before loading another 
-// project. 
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-*/
-
-menuitem "DSP2833x CpuTimerExample"
-
-hotmenu Load_and_Build_Project()
-{
-   GEL_ProjectLoad("Example_2833xCpuTimer.pjt");
-   GEL_ProjectBuild("Example_2833xCpuTimer.pjt");
-   Setup_WatchWindow();
-}
-
-hotmenu Load_Code()
-{
-   GEL_Load(".\\debug\\Example_2833xCpuTimer.out");
-   Setup_WatchWindow();
-}
-
-hotmenu Setup_WatchWindow()
-{
-   GEL_WatchReset();
-   GEL_WatchAdd("CpuTimer0.InterruptCount",,"CPU ISR Count");
-   GEL_WatchAdd("CpuTimer0",,"CPU Timer Variables");
-   GEL_WatchAdd("CpuTimer0Regs,x");
-   GEL_WatchAdd("CpuTimer1.InterruptCount",,"CPU ISR Count");
-   GEL_WatchAdd("CpuTimer1",,"CPU Timer Variables");
-   GEL_WatchAdd("CpuTimer1Regs,x");
-   GEL_WatchAdd("CpuTimer2.InterruptCount",,"CPU ISR Count");
-   GEL_WatchAdd("CpuTimer2",,"CPU Timer Variables");
-   GEL_WatchAdd("CpuTimer2Regs,x");
-}
diff --git a/Source/External/v120/DSP2833x_examples/cpu_timer/Example_2833xCpuTimer.pjt b/Source/External/v120/DSP2833x_examples/cpu_timer/Example_2833xCpuTimer.pjt
deleted file mode 100644
index df3939c..0000000
--- a/Source/External/v120/DSP2833x_examples/cpu_timer/Example_2833xCpuTimer.pjt
+++ /dev/null
@@ -1,46 +0,0 @@
-; Code Composer Project File, Version 2.0 (do not modify or remove this line)
-
-[Project Settings]
-ProjectName="DSP2833x"
-ProjectDir="C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\cpu_timer\"
-ProjectType=Executable
-CPUFamily=TMS320C28XX
-Tool="Compiler"
-Tool="CustomBuilder"
-Tool="DspBiosBuilder"
-Tool="Linker"
-Config="Debug"
-Config="Release"
-
-[Source Files]
-Source="..\..\DSP2833x_common\source\DSP2833x_ADC_cal.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CodeStartBranch.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CpuTimers.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_DefaultIsr.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieVect.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_SysCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_usDelay.asm"
-Source="..\..\DSP2833x_headers\source\DSP2833x_GlobalVariableDefs.c"
-Source="Example_2833xCpuTimer.c"
-Source="..\..\DSP2833x_common\cmd\28335_RAM_lnk.cmd"
-Source="..\..\DSP2833x_headers\cmd\DSP2833x_Headers_nonBIOS.cmd"
-
-["Compiler" Settings: "Debug"]
-Options=-g -q -pdr -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\cpu_timer\Debug" -fs"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\cpu_timer\Debug" -i"..\..\DSP2833x_headers\include" -i"..\..\DSP2833x_common\include" -d"_DEBUG" -d"LARGE_MODEL" --float_support=fpu32 -ml -mt -v28
-
-["Compiler" Settings: "Release"]
-Options=-q -o3 -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\cpu_timer\Release" -d"LARGE_MODEL" -ml -v28
-
-["DspBiosBuilder" Settings: "Debug"]
-Options=-v28
-
-["DspBiosBuilder" Settings: "Release"]
-Options=-v28
-
-["Linker" Settings: "Debug"]
-Options=-q -c -ecode_start -m".\Debug\Example_2833xCpuTimer.map" -o".\Debug\Example_2833xCpuTimer.out" -stack0x200 -w -x -i"..\..\DSP2833x_headers\include" -l"rts2800_fpu32.lib"
-
-["Linker" Settings: "Release"]
-Options=-q -c -o".\Release\Example_2833xCpuTimer.out" -x
-
diff --git a/Source/External/v120/DSP2833x_examples/dma_ram_to_ram/Example_2833xDMA_ram_to_ram.c b/Source/External/v120/DSP2833x_examples/dma_ram_to_ram/Example_2833xDMA_ram_to_ram.c
deleted file mode 100644
index ebee46e..0000000
--- a/Source/External/v120/DSP2833x_examples/dma_ram_to_ram/Example_2833xDMA_ram_to_ram.c
+++ /dev/null
@@ -1,189 +0,0 @@
-// TI File $Revision: /main/3 $
-// Checkin $Date: May 12, 2008   14:23:19 $
-//###########################################################################
-//
-// FILE:   Example_2833xDMA_Ram_to_Ram.c
-//
-// TITLE:  DSP2833x DMA Ram to Ram
-// ASSUMPTIONS:
-//
-//    This program requires the DSP2833x header files.
-//
-//    As supplied, this project is configured for "boot to SARAM"
-//    operation.  The 2833x Boot Mode table is shown below.
-//    For information on configuring the boot mode of an eZdsp,
-//    please refer to the documentation included with the eZdsp,
-//
-//       $Boot_Table:
-//
-//         GPIO87   GPIO86     GPIO85   GPIO84
-//          XA15     XA14       XA13     XA12
-//           PU       PU         PU       PU
-//        ==========================================
-//            1        1          1        1    Jump to Flash
-//            1        1          1        0    SCI-A boot
-//            1        1          0        1    SPI-A boot
-//            1        1          0        0    I2C-A boot
-//            1        0          1        1    eCAN-A boot
-//            1        0          1        0    McBSP-A boot
-//            1        0          0        1    Jump to XINTF x16
-//            1        0          0        0    Jump to XINTF x32
-//            0        1          1        1    Jump to OTP
-//            0        1          1        0    Parallel GPIO I/O boot
-//            0        1          0        1    Parallel XINTF boot
-//            0        1          0        0    Jump to SARAM	    <- "boot to SARAM"
-//            0        0          1        1    Branch to check boot mode
-//            0        0          1        0    Boot to flash, bypass ADC cal
-//            0        0          0        1    Boot to SARAM, bypass ADC cal
-//            0        0          0        0    Boot to SCI-A, bypass ADC cal
-//                                              Boot_Table_End$
-//
-//
-// DESCRIPTION:
-//
-// Code will perform a block copy from L5 SARAM to L4 SARAM of 1024 words.  Transfer will be started
-// by Timer0.  Will use 32-bit datasize to decrease the transfer time.
-// Code will end in local_DINTCH1_ISR once the transfer is complete
-//
-// Watch Variables:
-//      DMABuf1
-//      DMABuf2
-//
-//###########################################################################
-//
-// Original source by: M.P.
-//
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File
-
-
-#define BUF_SIZE   1024  // Sample buffer size
-
-
-
-
-// DMA Defines
-#define CH1_TOTAL               DATA_POINTS_PER_CHANNEL
-#define CH1_WORDS_PER_BURST     ADC_CHANNELS_TO_CONVERT
-
-
-
-#pragma DATA_SECTION(DMABuf1,"DMARAML4");
-#pragma DATA_SECTION(DMABuf2,"DMARAML5");
-
-volatile Uint16 DMABuf1[1024];
-volatile Uint16 DMABuf2[1024];
-
-volatile Uint16 *DMADest;
-volatile Uint16 *DMASource;
-
-interrupt void local_DINTCH1_ISR(void);
-
-
-void main(void)
-{
-   Uint16 i;
-// Step 1. Initialize System Control:
-// PLL, WatchDog, enable Peripheral Clocks
-// This example function is found in the DSP2833x_SysCtrl.c file.
-   InitSysCtrl();
-
-
-// Step 2. Initialize GPIO:
-// This example function is found in the DSP2833x_Gpio.c file and
-// illustrates how to set the GPIO to it's default state.
-// InitGpio();  // Skipped for this example
-
-// Step 3. Clear all interrupts and initialize PIE vector table:
-// Disable CPU interrupts
-   DINT;
-
-// Initialize the PIE control registers to their default state.
-// The default state is all PIE interrupts disabled and flags
-// are cleared.
-// This function is found in the DSP2833x_PieCtrl.c file.
-   InitPieCtrl();
-
-// Disable CPU interrupts and clear all CPU interrupt flags:
-   IER = 0x0000;
-   IFR = 0x0000;
-
-// Initialize the PIE vector table with pointers to the shell Interrupt
-// Service Routines (ISR).
-// This will populate the entire table, even if the interrupt
-// is not used in this example.  This is useful for debug purposes.
-// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
-// This function is found in DSP2833x_PieVect.c.
-   InitPieVectTable();
-
-// Interrupts that are used in this example are re-mapped to
-// ISR functions found within this file.
-   EALLOW;	// Allow access to EALLOW protected registers
-   PieVectTable.DINTCH1= &local_DINTCH1_ISR;
-   EDIS;   // Disable access to EALLOW protected registers
-
-   IER = M_INT7 ;	                             //Enable INT7 (7.1 DMA Ch1)
-   EnableInterrupts();
-   CpuTimer0Regs.TCR.bit.TSS  = 1;               //Stop Timer0 for now
-
-
-//Step 5. User specific code, enable interrupts:
-  // Initialize DMA
-	DMAInitialize();
-
-	// Initialize Tables
-   for (i=0; i<BUF_SIZE; i++)
-   {
-     DMABuf1[i] = 0;
-	 DMABuf2[i] = i;
-   }
-
-
-// Configure DMA Channel
-    DMADest   = &DMABuf1[0];
-	DMASource = &DMABuf2[0];
-   	DMACH1AddrConfig(DMADest,DMASource);
-	DMACH1BurstConfig(31,2,2);         //Will set up to use 32-bit datasize, pointers are based on 16-bit words
-	DMACH1TransferConfig(31,2,2);      //so need to increment by 2 to grab the correct location
-	DMACH1WrapConfig(0xFFFF,0,0xFFFF,0);
-	//Use timer0 to start the x-fer.
-	//Since this is a static copy use one shot mode, so only one trigger is needed
-	//Also using 32-bit mode to decrease x-fer time
-    DMACH1ModeConfig(DMA_TINT0,PERINT_ENABLE,ONESHOT_ENABLE,CONT_DISABLE,SYNC_DISABLE,SYNC_SRC,OVRFLOW_DISABLE,THIRTYTWO_BIT,CHINT_END,CHINT_ENABLE);
-
-
-
-
-
-	StartDMACH1();
-
-
-   //Init the timer 0
-
-   CpuTimer0Regs.TIM.half.LSW = 512;    //load low value so we can start the DMA quickly
-   CpuTimer0Regs.TCR.bit.SOFT = 1;      //Allow to free run even if halted
-   CpuTimer0Regs.TCR.bit.FREE = 1;
-   CpuTimer0Regs.TCR.bit.TIE  = 1;      //Enable the timer0 interrupt signal
-   CpuTimer0Regs.TCR.bit.TSS  = 0;      //restart the timer 0
-   for(;;){}
-
-}
-
-// INT7.1
-interrupt void local_DINTCH1_ISR(void)     // DMA Channel 1
-{
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-   PieCtrlRegs.PIEACK.all = PIEACK_GROUP7;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-   asm ("      ESTOP0");
-   for(;;);
-}
-
-
-
diff --git a/Source/External/v120/DSP2833x_examples/dma_ram_to_ram/Example_2833xDMA_ram_to_ram.gel b/Source/External/v120/DSP2833x_examples/dma_ram_to_ram/Example_2833xDMA_ram_to_ram.gel
deleted file mode 100644
index f96f87d..0000000
--- a/Source/External/v120/DSP2833x_examples/dma_ram_to_ram/Example_2833xDMA_ram_to_ram.gel
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
-// TI File $Revision: /main/1 $
-// Checkin $Date: August 14, 2007   16:28:46 $
-//###########################################################################
-//
-// This .gel file can be used to help load and build the example project.
-// It should be unloaded from Code Composer Studio before loading another 
-// project. 
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-*/
-
-menuitem "DSP2833x DMA Ram to Ram Example"
-
-hotmenu Load_and_Build_Project()
-{
-   GEL_ProjectLoad("Example_2833xDMA_ram_to_ram.pjt");
-   GEL_ProjectBuild("Example_2833xDMA_ram_to_ram.pjt");
-   Setup_WatchWindow();
-}
-
-hotmenu Load_Code()
-{
-   GEL_Load(".\\debug\\Example_2833xDMA_ram_to_ram.out");
-   Setup_WatchWindow();
-}
-
-hotmenu Setup_WatchWindow()
-{
-   GEL_WatchReset();
-   GEL_WatchAdd("DMABuf1,x");
-   GEL_WatchAdd("DMABuf2,x");
-}
diff --git a/Source/External/v120/DSP2833x_examples/dma_ram_to_ram/Example_2833xDMA_ram_to_ram.pjt b/Source/External/v120/DSP2833x_examples/dma_ram_to_ram/Example_2833xDMA_ram_to_ram.pjt
deleted file mode 100644
index 56a59da..0000000
--- a/Source/External/v120/DSP2833x_examples/dma_ram_to_ram/Example_2833xDMA_ram_to_ram.pjt
+++ /dev/null
@@ -1,47 +0,0 @@
-; Code Composer Project File, Version 2.0 (do not modify or remove this line)
-
-[Project Settings]
-ProjectName="DSP28"
-ProjectDir="C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\dma_ram_to_ram\"
-ProjectType=Executable
-CPUFamily=TMS320C28XX
-Tool="Compiler"
-Tool="CustomBuilder"
-Tool="DspBiosBuilder"
-Tool="Linker"
-Config="Debug"
-Config="Release"
-
-[Source Files]
-Source="..\..\DSP2833x_common\source\DSP2833x_Adc.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_ADC_cal.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CodeStartBranch.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_DefaultIsr.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_DMA.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieVect.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_SysCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_usDelay.asm"
-Source="..\..\DSP2833x_headers\source\DSP2833x_GlobalVariableDefs.c"
-Source="Example_2833xDMA_ram_to_ram.c"
-Source="..\..\DSP2833x_common\cmd\28335_RAM_lnk.cmd"
-Source="..\..\DSP2833x_headers\cmd\DSP2833x_Headers_nonBIOS.cmd"
-
-["Compiler" Settings: "Debug"]
-Options=-g -q -pdr -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\dma_ram_to_ram\Debug" -fs"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\dma_ram_to_ram\Debug" -i"..\..\DSP2833x_headers\include" -i"..\..\DSP2833x_common\include" -d"_DEBUG" -d"LARGE_MODEL" --float_support=fpu32 -ml -mt -v28
-
-["Compiler" Settings: "Release"]
-Options=-q -o3 -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\dma_ram_to_ram\Release" -d"LARGE_MODEL" -ml -v28
-
-["DspBiosBuilder" Settings: "Debug"]
-Options=-v28
-
-["DspBiosBuilder" Settings: "Release"]
-Options=-v28
-
-["Linker" Settings: "Debug"]
-Options=-q -c -ecode_start -m".\Debug\Example_2833xDMA_ram_to_ram.map" -o".\Debug\Example_2833xDMA_ram_to_ram.out" -stack0x380 -w -x -i"..\..\DSP2833x_headers\include" -l"rts2800_fpu32.lib"
-
-["Linker" Settings: "Release"]
-Options=-q -c -o".\Release\Example_2833xDMA_ram_to_ram.out" -x
-
diff --git a/Source/External/v120/DSP2833x_examples/dma_xintf_to_ram/Example_2833xDMA_xintf_to_ram.c b/Source/External/v120/DSP2833x_examples/dma_xintf_to_ram/Example_2833xDMA_xintf_to_ram.c
deleted file mode 100644
index 45289c4..0000000
--- a/Source/External/v120/DSP2833x_examples/dma_xintf_to_ram/Example_2833xDMA_xintf_to_ram.c
+++ /dev/null
@@ -1,242 +0,0 @@
-// TI File $Revision: /main/3 $
-// Checkin $Date: April 21, 2008   15:44:27 $
-//###########################################################################
-//
-// FILE:   Example_2833xDMA_XINTF_to_Ram.c
-//
-// TITLE:  DSP2833x DMA Ram to Ram
-// ASSUMPTIONS:
-//
-//    This program requires the DSP2833x header files.
-//
-//    As supplied, this project is configured for "boot to SARAM"
-//    operation.  The 2833x Boot Mode table is shown below.
-//    For information on configuring the boot mode of an eZdsp,
-//    please refer to the documentation included with the eZdsp,
-//
-//       $Boot_Table:
-//
-//         GPIO87   GPIO86     GPIO85   GPIO84
-//          XA15     XA14       XA13     XA12
-//           PU       PU         PU       PU
-//        ==========================================
-//            1        1          1        1    Jump to Flash
-//            1        1          1        0    SCI-A boot
-//            1        1          0        1    SPI-A boot
-//            1        1          0        0    I2C-A boot
-//            1        0          1        1    eCAN-A boot
-//            1        0          1        0    McBSP-A boot
-//            1        0          0        1    Jump to XINTF x16
-//            1        0          0        0    Jump to XINTF x32
-//            0        1          1        1    Jump to OTP
-//            0        1          1        0    Parallel GPIO I/O boot
-//            0        1          0        1    Parallel XINTF boot
-//            0        1          0        0    Jump to SARAM	    <- "boot to SARAM"
-//            0        0          1        1    Branch to check boot mode
-//            0        0          1        0    Boot to flash, bypass ADC cal
-//            0        0          0        1    Boot to SARAM, bypass ADC cal
-//            0        0          0        0    Boot to SCI-A, bypass ADC cal
-//                                              Boot_Table_End$
-//
-//
-// DESCRIPTION:
-//
-// Code will perform a block copy of 1024 words from Zone 7 XINTF (DMABuf2)
-// to L4 SARAM (DMABuf1) .
-// Transfer will be started by Timer0.
-// We will use 32-bit DMA datasize.  Note this is independent from the XINTF
-// data width which is x16. Code will end in local_DINTCH1_ISR once the transfer is
-// complete
-//
-// Watch Variables:
-//      DMABuf1
-//      DMABuf2
-//
-//###########################################################################
-//
-// Original source by: M.P.
-//
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File
-
-
-#define BUF_SIZE   1024  // Sample buffer size
-
-
-#pragma DATA_SECTION(DMABuf1,"DMARAML4");
-#pragma DATA_SECTION(DMABuf2,"ZONE7DATA");
-
-volatile Uint16 DMABuf1[BUF_SIZE];
-volatile Uint16 DMABuf2[BUF_SIZE];
-
-volatile Uint16 *DMADest;
-volatile Uint16 *DMASource;
-
-interrupt void local_DINTCH1_ISR(void);
-void init_zone7(void);
-
-
-void main(void)
-{
-   Uint16 i;
-// Step 1. Initialize System Control:
-// PLL, WatchDog, enable Peripheral Clocks
-// This example function is found in the DSP2833x_SysCtrl.c file.
-   InitSysCtrl();
-
-
-// Step 2. Initialize GPIO:
-// This example function is found in the DSP2833x_Gpio.c file and
-// illustrates how to set the GPIO to it's default state.
-// InitGpio();  // Skipped for this example
-
-// Step 3. Clear all interrupts and initialize PIE vector table:
-// Disable CPU interrupts
-   DINT;
-
-// Initialize the PIE control registers to their default state.
-// The default state is all PIE interrupts disabled and flags
-// are cleared.
-// This function is found in the DSP2833x_PieCtrl.c file.
-   InitPieCtrl();
-
-// Disable CPU interrupts and clear all CPU interrupt flags:
-   IER = 0x0000;
-   IFR = 0x0000;
-
-// Initialize the PIE vector table with pointers to the shell Interrupt
-// Service Routines (ISR).
-// This will populate the entire table, even if the interrupt
-// is not used in this example.  This is useful for debug purposes.
-// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
-// This function is found in DSP2833x_PieVect.c.
-   InitPieVectTable();
-
-// Interrupts that are used in this example are re-mapped to
-// ISR functions found within this file.
-   EALLOW;	// Allow access to EALLOW protected registers
-   PieVectTable.DINTCH1= &local_DINTCH1_ISR;
-   EDIS;   // Disable access to EALLOW protected registers
-
-   IER = M_INT7 ;	                             //Enable INT7 (7.1 DMA Ch1)
-   EnableInterrupts();
-   CpuTimer0Regs.TCR.bit.TSS  = 1;               //Stop Timer0 for now
-
-
-//Step 5. User specific code, enable interrupts:
-  // Initialize DMA
-	DMAInitialize();
-    init_zone7();
-
-	// Initialize Tables
-   for (i=0; i<BUF_SIZE; i++)
-   {
-     DMABuf1[i] = 0;
-	 DMABuf2[i] = i;
-   }
-
-
-// Configure DMA Channel
-    DMADest   = &DMABuf1[0];
-	DMASource = &DMABuf2[0];
-   	DMACH1AddrConfig(DMADest,DMASource);
-	DMACH1BurstConfig(31,2,2);         //Will set up to use 32-bit datasize, pointers are based on 16-bit words
-	DMACH1TransferConfig(31,2,2);      //so need to increment by 2 to grab the correct location
-	DMACH1WrapConfig(0xFFFF,0,0xFFFF,0);
-	//Use timer0 to start the x-fer.
-	//Since this is a static copy use one shot mode, so only one trigger is needed
-	//Also using 32-bit mode to decrease x-fer time
-    DMACH1ModeConfig(DMA_TINT0,PERINT_ENABLE,ONESHOT_ENABLE,CONT_DISABLE,SYNC_DISABLE,SYNC_SRC,OVRFLOW_DISABLE,THIRTYTWO_BIT,CHINT_END,CHINT_ENABLE);
-
-
-
-
-
-	StartDMACH1();
-
-
-   //Init the timer 0
-
-   CpuTimer0Regs.TIM.half.LSW = 512;    //load low value so we can start the DMA quickly
-   CpuTimer0Regs.TCR.bit.SOFT = 1;      //Allow to free run even if halted
-   CpuTimer0Regs.TCR.bit.FREE = 1;
-   CpuTimer0Regs.TCR.bit.TIE  = 1;      //Enable the timer0 interrupt signal
-   CpuTimer0Regs.TCR.bit.TSS  = 0;      //restart the timer 0
-   for(;;);
-
-}
-
-// INT7.1
-interrupt void local_DINTCH1_ISR(void)     // DMA Channel 1
-{
-
-  // To receive more interrupts from this PIE group, acknowledge this interrupt
-   PieCtrlRegs.PIEACK.all = PIEACK_GROUP7;
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-   asm ("      ESTOP0");
-   for(;;);
-}
-
-
-// Configure the timing paramaters for Zone 7.
-// Notes:
-//    This function should not be executed from XINTF
-//    Adjust the timing based on the data manual and
-//    external device requirements.
-void init_zone7(void)
-{
-
-    // Make sure the XINTF clock is enabled
-	SysCtrlRegs.PCLKCR3.bit.XINTFENCLK = 1;
-
-	// Configure the GPIO for XINTF with a 16-bit data bus
-	// This function is in DSP2833x_Xintf.c
-	InitXintf16Gpio();
-    EALLOW;
-    // All Zones---------------------------------
-    // Timing for all zones based on XTIMCLK = SYSCLKOUT
-    XintfRegs.XINTCNF2.bit.XTIMCLK = 0;
-    // Buffer up to 3 writes
-    XintfRegs.XINTCNF2.bit.WRBUFF = 3;
-    // XCLKOUT is enabled
-    XintfRegs.XINTCNF2.bit.CLKOFF = 0;
-    // XCLKOUT = XTIMCLK
-    XintfRegs.XINTCNF2.bit.CLKMODE = 0;
-
-    // Zone 7------------------------------------
-    // When using ready, ACTIVE must be 1 or greater
-    // Lead must always be 1 or greater
-    // Zone write timing
-    XintfRegs.XTIMING7.bit.XWRLEAD = 1;
-    XintfRegs.XTIMING7.bit.XWRACTIVE = 2;
-    XintfRegs.XTIMING7.bit.XWRTRAIL = 1;
-    // Zone read timing
-    XintfRegs.XTIMING7.bit.XRDLEAD = 1;
-    XintfRegs.XTIMING7.bit.XRDACTIVE = 3;
-    XintfRegs.XTIMING7.bit.XRDTRAIL = 0;
-
-    // don't double all Zone read/write lead/active/trail timing
-    XintfRegs.XTIMING7.bit.X2TIMING = 0;
-
-    // Zone will not sample XREADY signal
-    XintfRegs.XTIMING7.bit.USEREADY = 0;
-    XintfRegs.XTIMING7.bit.READYMODE = 0;
-
-    // 1,1 = x16 data bus
-    // 0,1 = x32 data bus
-    // other values are reserved
-    XintfRegs.XTIMING7.bit.XSIZE = 3;
-    EDIS;
-
-   //Force a pipeline flush to ensure that the write to
-   //the last register configured occurs before returning.
-   asm(" RPT #7 || NOP");
-}
-
-
-
diff --git a/Source/External/v120/DSP2833x_examples/dma_xintf_to_ram/Example_2833xDMA_xintf_to_ram.gel b/Source/External/v120/DSP2833x_examples/dma_xintf_to_ram/Example_2833xDMA_xintf_to_ram.gel
deleted file mode 100644
index 95bcc9e..0000000
--- a/Source/External/v120/DSP2833x_examples/dma_xintf_to_ram/Example_2833xDMA_xintf_to_ram.gel
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
-// TI File $Revision: /main/1 $
-// Checkin $Date: August 29, 2007   14:07:46 $
-//###########################################################################
-//
-// This .gel file can be used to help load and build the example project.
-// It should be unloaded from Code Composer Studio before loading another 
-// project. 
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-*/
-
-menuitem "DSP2833x DMA XINTF to Ram Example"
-
-hotmenu Load_and_Build_Project()
-{
-   GEL_ProjectLoad("Example_2833xDMA_xintf_to_ram.pjt");
-   GEL_ProjectBuild("Example_2833xDMA_xintf_to_ram.pjt");
-   Setup_WatchWindow();
-}
-
-hotmenu Load_Code()
-{
-   GEL_Load(".\\debug\\Example_2833xDMA_xintf_to_ram.out");
-   Setup_WatchWindow();
-}
-
-hotmenu Setup_WatchWindow()
-{
-   GEL_WatchReset();
-   GEL_WatchAdd("DMABuf1,x");
-   GEL_WatchAdd("DMABuf2,x");
-}
diff --git a/Source/External/v120/DSP2833x_examples/dma_xintf_to_ram/Example_2833xDMA_xintf_to_ram.pjt b/Source/External/v120/DSP2833x_examples/dma_xintf_to_ram/Example_2833xDMA_xintf_to_ram.pjt
deleted file mode 100644
index 07f943a..0000000
--- a/Source/External/v120/DSP2833x_examples/dma_xintf_to_ram/Example_2833xDMA_xintf_to_ram.pjt
+++ /dev/null
@@ -1,48 +0,0 @@
-; Code Composer Project File, Version 2.0 (do not modify or remove this line)
-
-[Project Settings]
-ProjectName="DSP28"
-ProjectDir="C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\dma_xintf_to_ram\"
-ProjectType=Executable
-CPUFamily=TMS320C28XX
-Tool="Compiler"
-Tool="CustomBuilder"
-Tool="DspBiosBuilder"
-Tool="Linker"
-Config="Debug"
-Config="Release"
-
-[Source Files]
-Source="..\..\DSP2833x_common\source\DSP2833x_Adc.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_ADC_cal.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CodeStartBranch.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_DefaultIsr.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_DMA.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieVect.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_SysCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_usDelay.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_Xintf.c"
-Source="..\..\DSP2833x_headers\source\DSP2833x_GlobalVariableDefs.c"
-Source="Example_2833xDMA_xintf_to_ram.c"
-Source="..\..\DSP2833x_common\cmd\28335_RAM_lnk.cmd"
-Source="..\..\DSP2833x_headers\cmd\DSP2833x_Headers_nonBIOS.cmd"
-
-["Compiler" Settings: "Debug"]
-Options=-g -q -pdr -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\dma_xintf_to_ram\Debug" -fs"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\dma_xintf_to_ram\Debug" -i"..\..\DSP2833x_headers\include" -i"..\..\DSP2833x_common\include" -d"_DEBUG" -d"LARGE_MODEL" -ml -mt -v28 --float_support=fpu32
-
-["Compiler" Settings: "Release"]
-Options=-q -o3 -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\dma_xintf_to_ram\Release" -d"LARGE_MODEL" -ml -v28
-
-["DspBiosBuilder" Settings: "Debug"]
-Options=-v28
-
-["DspBiosBuilder" Settings: "Release"]
-Options=-v28
-
-["Linker" Settings: "Debug"]
-Options=-q -c -ecode_start -m".\Debug\Example_2833xDMA_xintf_to_ram.map" -o".\Debug\Example_2833xDMA_xintf_to_ram.out" -stack0x380 -w -x -i"..\..\DSP2833x_headers\include" -l"rts2800_fpu32.lib"
-
-["Linker" Settings: "Release"]
-Options=-q -c -o".\Release\Example_2833xDMA_ram_to_ram.out" -x
-
diff --git a/Source/External/v120/DSP2833x_examples/ecan_a_to_b_xmit/Example_2833xEcanA_to_B_Xmit.c b/Source/External/v120/DSP2833x_examples/ecan_a_to_b_xmit/Example_2833xEcanA_to_B_Xmit.c
deleted file mode 100644
index cb894e9..0000000
--- a/Source/External/v120/DSP2833x_examples/ecan_a_to_b_xmit/Example_2833xEcanA_to_B_Xmit.c
+++ /dev/null
@@ -1,187 +0,0 @@
-// TI File $Revision: /main/9 $
-// Checkin $Date: April 21, 2008   15:41:13 $
-//###########################################################################
-// Filename: Example_28xEcan_A_to_B_Xmit.c
-//
-// Description: eCAN-A To eCAN-B TXLOOP - Transmit loop
-//
-// ASSUMPTIONS:
-//
-//    This program requires the DSP2833x header files.
-//
-//    Both CAN ports of the 2833x DSP need to be connected
-//    to each other (via CAN transceivers)
-//
-//       eCANA is on GPIO31 (CANTXA)  and
-//                   GPIO30 (CANRXA)
-//
-//       eCANB is on GPIO8  (CANTXB)  and
-//                   GPIO10 (CANRXB)
-//
-//    As supplied, this project is configured for "boot to SARAM"
-//    operation.  The 2833x Boot Mode table is shown below.
-//    For information on configuring the boot mode of an eZdsp,
-//    please refer to the documentation included with the eZdsp,
-//
-//       $Boot_Table:
-//
-//         GPIO87   GPIO86     GPIO85   GPIO84
-//          XA15     XA14       XA13     XA12
-//           PU       PU         PU       PU
-//        ==========================================
-//            1        1          1        1    Jump to Flash
-//            1        1          1        0    SCI-A boot
-//            1        1          0        1    SPI-A boot
-//            1        1          0        0    I2C-A boot
-//            1        0          1        1    eCAN-A boot
-//            1        0          1        0    McBSP-A boot
-//            1        0          0        1    Jump to XINTF x16
-//            1        0          0        0    Jump to XINTF x32
-//            0        1          1        1    Jump to OTP
-//            0        1          1        0    Parallel GPIO I/O boot
-//            0        1          0        1    Parallel XINTF boot
-//            0        1          0        0    Jump to SARAM	    <- "boot to SARAM"
-//            0        0          1        1    Branch to check boot mode
-//            0        0          1        0    Boot to flash, bypass ADC cal
-//            0        0          0        1    Boot to SARAM, bypass ADC cal
-//            0        0          0        0    Boot to SCI-A, bypass ADC cal
-//                                              Boot_Table_End$
-//
-// DESCRIPTION:
-//
-//    This example TRANSMITS data to another CAN module using MAILBOX5
-//    This program could either loop forever or transmit "n" # of times,
-//    where "n" is the TXCOUNT value.
-//
-//    This example can be used to check CAN-A and CAN-B. Since CAN-B is
-//    initialized in DSP2833x_ECan.c, it will acknowledge all frames
-//    transmitted by the node on which this code runs. Both CAN ports of
-//    the 2833x DSP need to be connected to each other (via CAN transceivers)
-//
-//###########################################################################
-// Original Author: HJ
-//
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File
-
-#define TXCOUNT  100  // Transmission will take place (TXCOUNT) times..
-
-// Globals for this example
-long      i;
-long 	  loopcount = 0;
-
-
-void main()
-{
-
-/* Create a shadow register structure for the CAN control registers. This is
- needed, since, only 32-bit access is allowed to these registers. 16-bit access
- to these registers could potentially corrupt the register contents. This is
- especially true while writing to a bit (or group of bits) among bits 16 - 31 */
-
-   struct ECAN_REGS ECanaShadow;
-
-// Step 1. Initialize System Control:
-// PLL, WatchDog, enable Peripheral Clocks
-// This example function is found in the DSP2833x_SysCtrl.c file.
-   InitSysCtrl();
-
-// Step 2. Initalize GPIO:
-// This example function is found in the DSP2833x_Gpio.c file and
-// illustrates how to set the GPIO to it's default state.
-// InitGpio();  // Skipped for this example
-
-   // Just initalize eCAN pins for this example
-   // This function is in DSP2833x_ECan.c
-   InitECanGpio();
-
-// Step 3. Clear all interrupts and initialize PIE vector table:
-// Disable CPU interrupts
-   DINT;
-
-// Initialize the PIE control registers to their default state.
-// The default state is all PIE interrupts disabled and flags
-// are cleared.
-// This function is found in the DSP2833x_PieCtrl.c file.
-   InitPieCtrl();
-
-// Disable CPU interrupts and clear all CPU interrupt flags:
-   IER = 0x0000;
-   IFR = 0x0000;
-
-// Initialize the PIE vector table with pointers to the shell Interrupt
-// Service Routines (ISR).
-// This will populate the entire table, even if the interrupt
-// is not used in this example.  This is useful for debug purposes.
-// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
-// This function is found in DSP2833x_PieVect.c.
-   InitPieVectTable();
-
-// Interrupts that are used in this example are re-mapped to
-// ISR functions found within this file.
-
-// No interrupts used in this example.
-
-// Step 4. Initialize all the Device Peripherals:
-// This function is found in DSP2833x_InitPeripherals.c
-// InitPeripherals(); // Not required for this example
-
-   // In this case just initalize eCAN-A and eCAN-B
-   // This function is in DSP2833x_ECan.c
-   InitECan();
-
-// Step 5. User specific code:
-
-/* Write to the MSGID field  */
-
-   ECanaMboxes.MBOX25.MSGID.all = 0x95555555; // Extended Identifier
-
-/* Configure Mailbox under test as a Transmit mailbox */
-
-   ECanaShadow.CANMD.all = ECanaRegs.CANMD.all;
-   ECanaShadow.CANMD.bit.MD25 = 0;
-   ECanaRegs.CANMD.all = ECanaShadow.CANMD.all;
-
-/* Enable Mailbox under test */
-
-   ECanaShadow.CANME.all = ECanaRegs.CANME.all;
-   ECanaShadow.CANME.bit.ME25 = 1;
-   ECanaRegs.CANME.all = ECanaShadow.CANME.all;
-
-/* Write to DLC field in Master Control reg */
-
-   ECanaMboxes.MBOX25.MSGCTRL.bit.DLC = 8;
-
-/* Write to the mailbox RAM field */
-
-   ECanaMboxes.MBOX25.MDL.all = 0x55555555;
-   ECanaMboxes.MBOX25.MDH.all = 0x55555555;
-
-/* Begin transmitting */
-
-
-   for(i=0; i < TXCOUNT; i++)
-   {
-       ECanaShadow.CANTRS.all = 0;
-       ECanaShadow.CANTRS.bit.TRS25 = 1;             // Set TRS for mailbox under test
-       ECanaRegs.CANTRS.all = ECanaShadow.CANTRS.all;
-
-       do
-    	{
-      	ECanaShadow.CANTA.all = ECanaRegs.CANTA.all;
-    	} while(ECanaShadow.CANTA.bit.TA25 == 0 );   // Wait for TA5 bit to be set..
-
-
-       ECanaShadow.CANTA.all = 0;
-       ECanaShadow.CANTA.bit.TA25 = 1;     	         // Clear TA5
-       ECanaRegs.CANTA.all = ECanaShadow.CANTA.all;
-
-       loopcount ++;
-    }
-     asm(" ESTOP0");  // Stop here
-}
-
-
diff --git a/Source/External/v120/DSP2833x_examples/ecan_a_to_b_xmit/Example_2833xEcanA_to_B_Xmit.gel b/Source/External/v120/DSP2833x_examples/ecan_a_to_b_xmit/Example_2833xEcanA_to_B_Xmit.gel
deleted file mode 100644
index 8f5df4e..0000000
--- a/Source/External/v120/DSP2833x_examples/ecan_a_to_b_xmit/Example_2833xEcanA_to_B_Xmit.gel
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
-// TI File $Revision: /main/5 $
-// Checkin $Date: August 9, 2007   17:12:30 $
-//###########################################################################
-//
-// This .gel file can be used to help load and build the example project.
-// It should be unloaded from Code Composer Studio before loading another 
-// project. 
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-*/
-
-menuitem "DSP2833x eCANA to eCANB"
-
-hotmenu Load_and_Build_Project()
-{
-   GEL_ProjectLoad("Example_2833xEcanA_to_B_Xmit.pjt");
-   GEL_ProjectBuild("Example_2833xEcanA_to_B_Xmit.pjt");
-   Setup_WatchWindow();
-}
-
-hotmenu Load_Code()
-{
-   GEL_Load(".\\debug\\Example_2833xEcanA_to_B_Xmit.out");
-   Setup_WatchWindow();
-}
-
-hotmenu Setup_WatchWindow()
-{
-   GEL_WatchReset();
-   GEL_WatchAdd("loopcount",,"");
-   GEL_WatchAdd("ECanaRegs",,"");
-   GEL_WatchAdd("ECanbRegs",,"");
-}
diff --git a/Source/External/v120/DSP2833x_examples/ecan_a_to_b_xmit/Example_2833xEcanA_to_B_Xmit.pjt b/Source/External/v120/DSP2833x_examples/ecan_a_to_b_xmit/Example_2833xEcanA_to_B_Xmit.pjt
deleted file mode 100644
index 81696e4..0000000
--- a/Source/External/v120/DSP2833x_examples/ecan_a_to_b_xmit/Example_2833xEcanA_to_B_Xmit.pjt
+++ /dev/null
@@ -1,45 +0,0 @@
-; Code Composer Project File, Version 2.0 (do not modify or remove this line)
-
-[Project Settings]
-ProjectName="DSP2833x"
-ProjectDir="C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\ecan_a_to_b_xmit\"
-ProjectType=Executable
-CPUFamily=TMS320C28XX
-Tool="Compiler"
-Tool="DspBiosBuilder"
-Tool="Linker"
-Config="Debug"
-Config="Release"
-
-[Source Files]
-Source="..\..\DSP2833x_common\source\DSP2833x_ADC_cal.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CodeStartBranch.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_DefaultIsr.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_ECan.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieVect.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_SysCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_usDelay.asm"
-Source="..\..\DSP2833x_headers\source\DSP2833x_GlobalVariableDefs.c"
-Source="Example_2833xEcanA_to_B_Xmit.c"
-Source="..\..\DSP2833x_common\cmd\28335_RAM_lnk.cmd"
-Source="..\..\DSP2833x_headers\cmd\DSP2833x_Headers_nonBIOS.cmd"
-
-["Compiler" Settings: "Debug"]
-Options=-g -q -pdr -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\ecan_a_to_b_xmit\Debug" -fs"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\ecan_a_to_b_xmit\Debug" -i"..\..\DSP2833x_headers\include" -i"..\..\DSP2833x_common\include" -d"_DEBUG" -d"LARGE_MODEL" --float_support=fpu32 -ml -mt -v28
-
-["Compiler" Settings: "Release"]
-Options=-q -o3 -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\ecan_a_to_b_xmit\Release" -d"LARGE_MODEL" -ml -v28
-
-["DspBiosBuilder" Settings: "Debug"]
-Options=-v28
-
-["DspBiosBuilder" Settings: "Release"]
-Options=-v28
-
-["Linker" Settings: "Debug"]
-Options=-q -c -ecode_start -m".\Debug\Example_2833xECanA_to_B_Xmit.map" -o".\Debug\Example_2833xECanA_to_B_Xmit.out" -stack0x380 -w -x -i"..\..\DSP2833x_headers\include" -l"rts2800_fpu32.lib"
-
-["Linker" Settings: "Release"]
-Options=-q -c -o".\Release\Example_2833xECanBack2Back.out" -x
-
diff --git a/Source/External/v120/DSP2833x_examples/ecan_back2back/Example_2833xECanBack2Back.c b/Source/External/v120/DSP2833x_examples/ecan_back2back/Example_2833xECanBack2Back.c
deleted file mode 100644
index 02a9dd1..0000000
--- a/Source/External/v120/DSP2833x_examples/ecan_back2back/Example_2833xECanBack2Back.c
+++ /dev/null
@@ -1,309 +0,0 @@
-// TI File $Revision: /main/11 $
-// Checkin $Date: April 21, 2008   15:41:18 $
-//###########################################################################
-//
-// FILE:    Example_2833xECanBack2Back.c
-//
-// TITLE:   DSP2833x eCAN Back-to-back transmission and reception in
-//          SELF-TEST mode
-//
-// ASSUMPTIONS:
-//
-//    This program requires the DSP2833x header files.
-//
-//    This progrm uses the peripheral's self test mode.
-//    Other then boot mode configuration, no other hardware configuration
-//    is required.
-//
-//    As supplied, this project is configured for "boot to SARAM"
-//    operation.  The 2833x Boot Mode table is shown below.
-//    For information on configuring the boot mode of an eZdsp,
-//    please refer to the documentation included with the eZdsp,
-//
-//       $Boot_Table:
-//
-//         GPIO87   GPIO86     GPIO85   GPIO84
-//          XA15     XA14       XA13     XA12
-//           PU       PU         PU       PU
-//        ==========================================
-//            1        1          1        1    Jump to Flash
-//            1        1          1        0    SCI-A boot
-//            1        1          0        1    SPI-A boot
-//            1        1          0        0    I2C-A boot
-//            1        0          1        1    eCAN-A boot
-//            1        0          1        0    McBSP-A boot
-//            1        0          0        1    Jump to XINTF x16
-//            1        0          0        0    Jump to XINTF x32
-//            0        1          1        1    Jump to OTP
-//            0        1          1        0    Parallel GPIO I/O boot
-//            0        1          0        1    Parallel XINTF boot
-//            0        1          0        0    Jump to SARAM	    <- "boot to SARAM"
-//            0        0          1        1    Branch to check boot mode
-//            0        0          1        0    Boot to flash, bypass ADC cal
-//            0        0          0        1    Boot to SARAM, bypass ADC cal
-//            0        0          0        0    Boot to SCI-A, bypass ADC cal
-//                                              Boot_Table_End$
-//
-// DESCRIPTION:
-//
-//    This test transmits data back-to-back at high speed without
-//    stopping.
-//    The received data is verified. Any error is flagged.
-//    MBX0 transmits to MBX16, MBX1 transmits to MBX17 and so on....
-//    This program illustrates the use of self-test mode
-//
-//###########################################################################
-// Original Author H.J.
-//
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File
-
-// Prototype statements for functions found within this file.
-void mailbox_check(int32 T1, int32 T2, int32 T3);
-void mailbox_read(int16 i);
-
-// Global variable for this example
-Uint32  ErrorCount;
-Uint32  PassCount;
-Uint32  MessageReceivedCount;
-
-Uint32  TestMbox1 = 0;
-Uint32  TestMbox2 = 0;
-Uint32  TestMbox3 = 0;
-
-void main(void)
-{
-
-    Uint16  j;
-
-// eCAN control registers require read/write access using 32-bits.  Thus we
-// will create a set of shadow registers for this example.  These shadow
-// registers will be used to make sure the access is 32-bits and not 16.
-   struct ECAN_REGS ECanaShadow;
-
-// Step 1. Initialize System Control:
-// PLL, WatchDog, enable Peripheral Clocks
-// This example function is found in the DSP2833x_SysCtrl.c file.
-   InitSysCtrl();
-
-// Step 2. Initalize GPIO:
-// This example function is found in the DSP2833x_Gpio.c file and
-// illustrates how to set the GPIO to it's default state.
-// InitGpio();  // Skipped for this example
-
-// For this example, configure CAN pins using GPIO regs here
-// This function is found in DSP2833x_ECan.c
-   InitECanGpio();
-
-// Step 3. Clear all interrupts and initialize PIE vector table:
-// Disable CPU interrupts
-   DINT;
-
-// Initialize PIE control registers to their default state.
-// The default state is all PIE interrupts disabled and flags
-// are cleared.
-// This function is found in the DSP2833x_PieCtrl.c file.
-   InitPieCtrl();
-
-// Disable CPU interrupts and clear all CPU interrupt flags:
-   IER = 0x0000;
-   IFR = 0x0000;
-
-// Initialize the PIE vector table with pointers to the shell Interrupt
-// Service Routines (ISR).
-// This will populate the entire table, even if the interrupt
-// is not used in this example.  This is useful for debug purposes.
-// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
-// This function is found in DSP2833x_PieVect.c.
-   InitPieVectTable();
-
-// Step 4. Initialize all the Device Peripherals:
-// This function is found in DSP2833x_InitPeripherals.c
-// InitPeripherals(); // Not required for this example
-
-// Step 5. User specific code, enable interrupts:
-
-    MessageReceivedCount = 0;
-    ErrorCount = 0;
-    PassCount = 0;
-
-	InitECana(); // Initialize eCAN-A module
-
-    // Mailboxs can be written to 16-bits or 32-bits at a time
-    // Write to the MSGID field of TRANSMIT mailboxes MBOX0 - 15
-    ECanaMboxes.MBOX0.MSGID.all = 0x9555AAA0;
-    ECanaMboxes.MBOX1.MSGID.all = 0x9555AAA1;
-    ECanaMboxes.MBOX2.MSGID.all = 0x9555AAA2;
-    ECanaMboxes.MBOX3.MSGID.all = 0x9555AAA3;
-    ECanaMboxes.MBOX4.MSGID.all = 0x9555AAA4;
-    ECanaMboxes.MBOX5.MSGID.all = 0x9555AAA5;
-    ECanaMboxes.MBOX6.MSGID.all = 0x9555AAA6;
-    ECanaMboxes.MBOX7.MSGID.all = 0x9555AAA7;
-    ECanaMboxes.MBOX8.MSGID.all = 0x9555AAA8;
-    ECanaMboxes.MBOX9.MSGID.all = 0x9555AAA9;
-    ECanaMboxes.MBOX10.MSGID.all = 0x9555AAAA;
-    ECanaMboxes.MBOX11.MSGID.all = 0x9555AAAB;
-    ECanaMboxes.MBOX12.MSGID.all = 0x9555AAAC;
-    ECanaMboxes.MBOX13.MSGID.all = 0x9555AAAD;
-    ECanaMboxes.MBOX14.MSGID.all = 0x9555AAAE;
-    ECanaMboxes.MBOX15.MSGID.all = 0x9555AAAF;
-
-    // Write to the MSGID field of RECEIVE mailboxes MBOX16 - 31
-    ECanaMboxes.MBOX16.MSGID.all = 0x9555AAA0;
-    ECanaMboxes.MBOX17.MSGID.all = 0x9555AAA1;
-    ECanaMboxes.MBOX18.MSGID.all = 0x9555AAA2;
-    ECanaMboxes.MBOX19.MSGID.all = 0x9555AAA3;
-    ECanaMboxes.MBOX20.MSGID.all = 0x9555AAA4;
-    ECanaMboxes.MBOX21.MSGID.all = 0x9555AAA5;
-    ECanaMboxes.MBOX22.MSGID.all = 0x9555AAA6;
-    ECanaMboxes.MBOX23.MSGID.all = 0x9555AAA7;
-    ECanaMboxes.MBOX24.MSGID.all = 0x9555AAA8;
-    ECanaMboxes.MBOX25.MSGID.all = 0x9555AAA9;
-    ECanaMboxes.MBOX26.MSGID.all = 0x9555AAAA;
-    ECanaMboxes.MBOX27.MSGID.all = 0x9555AAAB;
-    ECanaMboxes.MBOX28.MSGID.all = 0x9555AAAC;
-    ECanaMboxes.MBOX29.MSGID.all = 0x9555AAAD;
-    ECanaMboxes.MBOX30.MSGID.all = 0x9555AAAE;
-    ECanaMboxes.MBOX31.MSGID.all = 0x9555AAAF;
-
-    // Configure Mailboxes 0-15 as Tx, 16-31 as Rx
-    // Since this write is to the entire register (instead of a bit
-    // field) a shadow register is not required.
-    ECanaRegs.CANMD.all = 0xFFFF0000;
-
-    // Enable all Mailboxes */
-    // Since this write is to the entire register (instead of a bit
-    // field) a shadow register is not required.
-    ECanaRegs.CANME.all = 0xFFFFFFFF;
-
-    // Specify that 8 bits will be sent/received
-    ECanaMboxes.MBOX0.MSGCTRL.bit.DLC = 8;
-    ECanaMboxes.MBOX1.MSGCTRL.bit.DLC = 8;
-    ECanaMboxes.MBOX2.MSGCTRL.bit.DLC = 8;
-    ECanaMboxes.MBOX3.MSGCTRL.bit.DLC = 8;
-    ECanaMboxes.MBOX4.MSGCTRL.bit.DLC = 8;
-    ECanaMboxes.MBOX5.MSGCTRL.bit.DLC = 8;
-    ECanaMboxes.MBOX6.MSGCTRL.bit.DLC = 8;
-    ECanaMboxes.MBOX7.MSGCTRL.bit.DLC = 8;
-    ECanaMboxes.MBOX8.MSGCTRL.bit.DLC = 8;
-    ECanaMboxes.MBOX9.MSGCTRL.bit.DLC = 8;
-    ECanaMboxes.MBOX10.MSGCTRL.bit.DLC = 8;
-    ECanaMboxes.MBOX11.MSGCTRL.bit.DLC = 8;
-    ECanaMboxes.MBOX12.MSGCTRL.bit.DLC = 8;
-    ECanaMboxes.MBOX13.MSGCTRL.bit.DLC = 8;
-    ECanaMboxes.MBOX14.MSGCTRL.bit.DLC = 8;
-    ECanaMboxes.MBOX15.MSGCTRL.bit.DLC = 8;
-
-
-    // Write to the mailbox RAM field of MBOX0 - 15
-    ECanaMboxes.MBOX0.MDL.all = 0x9555AAA0;
-    ECanaMboxes.MBOX0.MDH.all = 0x89ABCDEF;
-
-    ECanaMboxes.MBOX1.MDL.all = 0x9555AAA1;
-    ECanaMboxes.MBOX1.MDH.all = 0x89ABCDEF;
-
-    ECanaMboxes.MBOX2.MDL.all = 0x9555AAA2;
-    ECanaMboxes.MBOX2.MDH.all = 0x89ABCDEF;
-
-    ECanaMboxes.MBOX3.MDL.all = 0x9555AAA3;
-    ECanaMboxes.MBOX3.MDH.all = 0x89ABCDEF;
-
-    ECanaMboxes.MBOX4.MDL.all = 0x9555AAA4;
-    ECanaMboxes.MBOX4.MDH.all = 0x89ABCDEF;
-
-    ECanaMboxes.MBOX5.MDL.all = 0x9555AAA5;
-    ECanaMboxes.MBOX5.MDH.all = 0x89ABCDEF;
-
-    ECanaMboxes.MBOX6.MDL.all = 0x9555AAA6;
-    ECanaMboxes.MBOX6.MDH.all = 0x89ABCDEF;
-
-    ECanaMboxes.MBOX7.MDL.all = 0x9555AAA7;
-    ECanaMboxes.MBOX7.MDH.all = 0x89ABCDEF;
-
-    ECanaMboxes.MBOX8.MDL.all = 0x9555AAA8;
-    ECanaMboxes.MBOX8.MDH.all = 0x89ABCDEF;
-
-    ECanaMboxes.MBOX9.MDL.all = 0x9555AAA9;
-    ECanaMboxes.MBOX9.MDH.all = 0x89ABCDEF;
-
-    ECanaMboxes.MBOX10.MDL.all = 0x9555AAAA;
-    ECanaMboxes.MBOX10.MDH.all = 0x89ABCDEF;
-
-    ECanaMboxes.MBOX11.MDL.all = 0x9555AAAB;
-    ECanaMboxes.MBOX11.MDH.all = 0x89ABCDEF;
-
-    ECanaMboxes.MBOX12.MDL.all = 0x9555AAAC;
-    ECanaMboxes.MBOX12.MDH.all = 0x89ABCDEF;
-
-    ECanaMboxes.MBOX13.MDL.all = 0x9555AAAD;
-    ECanaMboxes.MBOX13.MDH.all = 0x89ABCDEF;
-
-    ECanaMboxes.MBOX14.MDL.all = 0x9555AAAE;
-    ECanaMboxes.MBOX14.MDH.all = 0x89ABCDEF;
-
-    ECanaMboxes.MBOX15.MDL.all = 0x9555AAAF;
-    ECanaMboxes.MBOX15.MDH.all = 0x89ABCDEF;
-
-    // Since this write is to the entire register (instead of a bit
-    // field) a shadow register is not required.
-    EALLOW;
-    ECanaRegs.CANMIM.all = 0xFFFFFFFF;
-
-    // Configure the eCAN for self test mode
-    // Enable the enhanced features of the eCAN.
-    EALLOW;
-    ECanaShadow.CANMC.all = ECanaRegs.CANMC.all;
-    ECanaShadow.CANMC.bit.STM = 1;    // Configure CAN for self-test mode
-    ECanaRegs.CANMC.all = ECanaShadow.CANMC.all;
-    EDIS;
-
-    // Begin transmitting
-    for(;;)
-    {
-
-       ECanaRegs.CANTRS.all = 0x0000FFFF;  // Set TRS for all transmit mailboxes
-       while(ECanaRegs.CANTA.all != 0x0000FFFF ) {}  // Wait for all TAn bits to be set..
-       ECanaRegs.CANTA.all = 0x0000FFFF;   // Clear all TAn
-       MessageReceivedCount++;
-
-       //Read from Receive mailboxes and begin checking for data */
-       for(j=0; j<16; j++)         // Read & check 16 mailboxes
-       {
-          mailbox_read(j);         // This func reads the indicated mailbox data
-          mailbox_check(TestMbox1,TestMbox2,TestMbox3); // Checks the received data
-       }
-    }
-}
-
-// This function reads out the contents of the indicated
-// by the Mailbox number (MBXnbr).
-void mailbox_read(int16 MBXnbr)
-{
-   volatile struct MBOX *Mailbox;
-   Mailbox = &ECanaMboxes.MBOX0 + MBXnbr;
-   TestMbox1 = Mailbox->MDL.all; // = 0x9555AAAn (n is the MBX number)
-   TestMbox2 = Mailbox->MDH.all; // = 0x89ABCDEF (a constant)
-   TestMbox3 = Mailbox->MSGID.all;// = 0x9555AAAn (n is the MBX number)
-
-} // MSGID of a rcv MBX is transmitted as the MDL data.
-
-
-void mailbox_check(int32 T1, int32 T2, int32 T3)
-{
-    if((T1 != T3) || ( T2 != 0x89ABCDEF))
-    {
-       ErrorCount++;
-    }
-    else
-    {
-       PassCount++;
-    }
-}
-
-
-//===========================================================================
-// No more.
-//===========================================================================
diff --git a/Source/External/v120/DSP2833x_examples/ecan_back2back/Example_2833xECanBack2Back.gel b/Source/External/v120/DSP2833x_examples/ecan_back2back/Example_2833xECanBack2Back.gel
deleted file mode 100644
index 90f787e..0000000
--- a/Source/External/v120/DSP2833x_examples/ecan_back2back/Example_2833xECanBack2Back.gel
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
-// TI File $Revision: /main/5 $
-// Checkin $Date: August 9, 2007   17:12:48 $
-//###########################################################################
-//
-// This .gel file can be used to help load and build the example project.
-// It should be unloaded from Code Composer Studio before loading another 
-// project. 
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-*/
-
-menuitem "DSP2833x ECanBack2Back"
-
-hotmenu Load_and_Build_Project()
-{
-   GEL_ProjectLoad("Example_2833xECanBack2Back.pjt");
-   GEL_ProjectBuild("Example_2833xECanBack2Back.pjt");
-   Setup_WatchWindow();
-}
-
-hotmenu Load_Code()
-{
-   GEL_Load(".\\debug\\Example_2833xECanBack2Back.out");
-   Setup_WatchWindow();
-}
-
-
-hotmenu Setup_WatchWindow()
-{
-   GEL_WatchReset();
-   GEL_WatchAdd("MessageReceivedCount,x");
-   GEL_WatchAdd("ErrorCount,x");
-   GEL_WatchAdd("PassCount,x");
-   GEL_WatchAdd("ECanaRegs,x");
-}
-
-
-
-
diff --git a/Source/External/v120/DSP2833x_examples/ecan_back2back/Example_2833xECanBack2Back.pjt b/Source/External/v120/DSP2833x_examples/ecan_back2back/Example_2833xECanBack2Back.pjt
deleted file mode 100644
index cbe5cf6..0000000
--- a/Source/External/v120/DSP2833x_examples/ecan_back2back/Example_2833xECanBack2Back.pjt
+++ /dev/null
@@ -1,45 +0,0 @@
-; Code Composer Project File, Version 2.0 (do not modify or remove this line)
-
-[Project Settings]
-ProjectName="DSP2833x"
-ProjectDir="C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\ecan_back2back\"
-ProjectType=Executable
-CPUFamily=TMS320C28XX
-Tool="Compiler"
-Tool="DspBiosBuilder"
-Tool="Linker"
-Config="Debug"
-Config="Release"
-
-[Source Files]
-Source="..\..\DSP2833x_common\source\DSP2833x_ADC_cal.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CodeStartBranch.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_DefaultIsr.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_ECan.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieVect.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_SysCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_usDelay.asm"
-Source="..\..\DSP2833x_headers\source\DSP2833x_GlobalVariableDefs.c"
-Source="Example_2833xECanBack2Back.c"
-Source="..\..\DSP2833x_common\cmd\28335_RAM_lnk.cmd"
-Source="..\..\DSP2833x_headers\cmd\DSP2833x_Headers_nonBIOS.cmd"
-
-["Compiler" Settings: "Debug"]
-Options=-g -q -pdr -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\ecan_back2back\Debug" -fs"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\ecan_back2back\Debug" -i"..\..\DSP2833x_headers\include" -i"..\..\DSP2833x_common\include" -d"_DEBUG" -d"LARGE_MODEL" --float_support=fpu32 -ml -mt -v28
-
-["Compiler" Settings: "Release"]
-Options=-q -o3 -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\ecan_back2back\Release" -d"LARGE_MODEL" -ml -v28
-
-["DspBiosBuilder" Settings: "Debug"]
-Options=-v28
-
-["DspBiosBuilder" Settings: "Release"]
-Options=-v28
-
-["Linker" Settings: "Debug"]
-Options=-q -c -ecode_start -m".\Debug\Example_2833xECanBack2Back.map" -o".\Debug\Example_2833xECanBack2Back.out" -stack0x380 -w -x -i"..\..\DSP2833x_headers\include" -l"rts2800_fpu32.lib"
-
-["Linker" Settings: "Release"]
-Options=-q -c -o".\Release\Example_2833xECanBack2Back.out" -x
-
diff --git a/Source/External/v120/DSP2833x_examples/ecap_apwm/Example_2833xECap_apwm.c b/Source/External/v120/DSP2833x_examples/ecap_apwm/Example_2833xECap_apwm.c
deleted file mode 100644
index 1d1693a..0000000
--- a/Source/External/v120/DSP2833x_examples/ecap_apwm/Example_2833xECap_apwm.c
+++ /dev/null
@@ -1,223 +0,0 @@
-// TI File $Revision: /main/10 $
-// Checkin $Date: April 21, 2008   15:41:24 $
-//###########################################################################
-//
-// FILE:    Example_2833xECap_apwm.c
-//
-// TITLE:   DSP2833x ECAP APWM Example
-//
-// ASSUMPTIONS:
-//
-//    This program requires the DSP2833x header files.
-//
-//    Monitor eCAP1 - eCAP4 pins on a oscilloscope as
-//    described below.
-//
-//       eCAP1 on GPIO24
-//       eCAP2 on GPIO7
-//       eCAP3 on GPIO9
-//       eCAP4 on GPIO11
-//
-//    As supplied, this project is configured for "boot to SARAM"
-//    operation.  The 2833x Boot Mode table is shown below.
-//    For information on configuring the boot mode of an eZdsp,
-//    please refer to the documentation included with the eZdsp,
-//
-//       $Boot_Table:
-//
-//         GPIO87   GPIO86     GPIO85   GPIO84
-//          XA15     XA14       XA13     XA12
-//           PU       PU         PU       PU
-//        ==========================================
-//            1        1          1        1    Jump to Flash
-//            1        1          1        0    SCI-A boot
-//            1        1          0        1    SPI-A boot
-//            1        1          0        0    I2C-A boot
-//            1        0          1        1    eCAN-A boot
-//            1        0          1        0    McBSP-A boot
-//            1        0          0        1    Jump to XINTF x16
-//            1        0          0        0    Jump to XINTF x32
-//            0        1          1        1    Jump to OTP
-//            0        1          1        0    Parallel GPIO I/O boot
-//            0        1          0        1    Parallel XINTF boot
-//            0        1          0        0    Jump to SARAM	    <- "boot to SARAM"
-//            0        0          1        1    Branch to check boot mode
-//            0        0          1        0    Boot to flash, bypass ADC cal
-//            0        0          0        1    Boot to SARAM, bypass ADC cal
-//            0        0          0        0    Boot to SCI-A, bypass ADC cal
-//                                              Boot_Table_End$
-//
-// DESCRIPTION:
-//
-//    This program sets up the eCAP pins in the APWM mode.
-//    This program runs at 150 MHz SYSCLKOUT assuming a 30 MHz
-//    XCLKIN or 100 MHz SYSCLKOUT assuming a 20 MHz XCLKIN.
-//
-//    For 150 MHz devices:
-//
-//    eCAP1 will come out on the GPIO24 pin
-//    This pin is configured to vary between 7.5 Hz and 15 Hz using
-//    the shadow registers to load the next period/compare values
-//
-//    eCAP2 will come out on the GPIO7 pin
-//    this pin is configured as a 7.5 Hz output
-//
-//    eCAP3 will come out on the GPIO9 pin
-//    this pin is configured as a 1.5 Hz output
-//
-//
-//    eCAP4 will come out on the GPIO11 pin
-//    this pin is configured as a 30 kHz output
-//
-//    All frequencies assume a 30 Mhz input clock. The XCLKOUT pin
-//    should show 150Mhz.
-//    --------------------------------------------------------------
-//    For 100 MHz devices:
-//
-//    eCAP1 will come out on the GPIO24 pin
-//    This pin is configured to vary between 5 Hz and 10 Hz using
-//    the shadow registers to load the next period/compare values
-//
-//    eCAP2 will come out on the GPIO7 pin
-//    this pin is configured as a 5 Hz output
-//
-//    eCAP3 will come out on the GPIO9 pin
-//    this pin is configured as a 1 Hz output
-//
-//    eCAP4 will come out on the GPIO11 pin
-//    this pin is configured as a 20kHz output
-//
-//    All frequencies assume a 20 Mhz input clock. The XCLKOUT pin
-//    should show 100Mhz.
-//
-//
-//    Watch Variables:
-//
-//
-//
-//###########################################################################
-// Original Author: D.F.
-//
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File
-
-// Global variables
-Uint16 direction = 0;
-
-void main(void)
-{
-
-// Step 1. Initialize System Control:
-// PLL, WatchDog, enable Peripheral Clocks
-// This example function is found in the DSP2833x_SysCtrl.c file.
-   InitSysCtrl();
-
-// Step 2. Initalize GPIO:
-// This example function is found in the DSP2833x_Gpio.c file and
-// illustrates how to set the GPIO to it's default state.
-// InitGpio();  // Skipped for this example
-
-// Initialize the GPIO pins for eCAP.
-// This function is found in the DSP2833x_ECap.c file
-   InitECapGpio();
-
-// Step 3. Clear all interrupts and initialize PIE vector table:
-// Disable CPU interrupts
-   DINT;
-
-// Initialize the PIE control registers to their default state.
-// The default state is all PIE interrupts disabled and flags
-// are cleared.
-// This function is found in the DSP2833x_PieCtrl.c file.
-   InitPieCtrl();
-
-// Disable CPU interrupts and clear all CPU interrupt flags:
-   IER = 0x0000;
-   IFR = 0x0000;
-
-// Initialize the PIE vector table with pointers to the shell Interrupt
-// Service Routines (ISR).
-// This will populate the entire table, even if the interrupt
-// is not used in this example.  This is useful for debug purposes.
-// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
-// This function is found in DSP2833x_PieVect.c.
-   InitPieVectTable();
-
-// Interrupts that are used in this example are re-mapped to
-// ISR functions found within this file.
-// No interrupts used for this example.
-
-// Step 4. Initialize all the Device Peripherals:
-// This function is found in DSP2833x_InitPeripherals.c
-// InitPeripherals(); // Not required for this example
-
-// Step 5. User specific code
-
-
-   // Setup APWM mode on CAP1, set period and compare registers
-   ECap1Regs.ECCTL2.bit.CAP_APWM = 1;	// Enable APWM mode
-   ECap1Regs.CAP1 = 0x01312D00;			// Set Period value
-   ECap1Regs.CAP2 = 0x00989680;			// Set Compare value
-   ECap1Regs.ECCLR.all = 0x0FF;			// Clear pending interrupts
-   ECap1Regs.ECEINT.bit.CTR_EQ_CMP = 1; // enable Compare Equal Int
-
-   // Setup APWM mode on CAP2, set period and compare registers
-   ECap2Regs.ECCTL2.bit.CAP_APWM = 1;	// Enable APWM mode
-   ECap2Regs.CAP1 = 0x01312D00;			// Set Period value
-   ECap2Regs.CAP2 = 0x00989680;			// Set Compare value
-   ECap2Regs.ECCLR.all = 0x0FF;			// Clear pending interrupts
-   ECap1Regs.ECEINT.bit.CTR_EQ_CMP = 1; // enable Compare Equal Int
-
-   // Setup APWM mode on CAP3, set period and compare registers
-   ECap3Regs.ECCTL2.bit.CAP_APWM = 1;	// Enable APWM mode
-   ECap3Regs.CAP1 = 0x05F5E100;			// Set Period value
-   ECap3Regs.CAP2 = 0x02FAF080;			// Set Compare value
-   ECap3Regs.ECCLR.all = 0x0FF;			// Clear pending interrupts
-   ECap1Regs.ECEINT.bit.CTR_EQ_CMP = 1; // enable Compare Equal Int
-
-   // Setup APWM mode on CAP4, set period and compare registers
-   ECap4Regs.ECCTL2.bit.CAP_APWM = 1;	// Enable APWM mode
-   ECap4Regs.CAP1 = 0x00001388;			// Set Period value
-   ECap4Regs.CAP2 = 0x000009C4;			// Set Compare value
-   ECap4Regs.ECCLR.all = 0x0FF;			// Clear pending interrupts
-   ECap1Regs.ECEINT.bit.CTR_EQ_CMP = 1; // enable Compare Equal Int
-
-   // Start counters
-   ECap1Regs.ECCTL2.bit.TSCTRSTOP = 1;
-   ECap2Regs.ECCTL2.bit.TSCTRSTOP = 1;
-   ECap3Regs.ECCTL2.bit.TSCTRSTOP = 1;
-   ECap4Regs.ECCTL2.bit.TSCTRSTOP = 1;
-
-   for(;;)
-   {
-      // set next duty cycle to 50%
-      ECap1Regs.CAP4 = ECap1Regs.CAP1 >> 1;
-
-      // vary freq between 7.5 Hz and 15 Hz (for 150MHz SYSCLKOUT) 5 Hz and 10 Hz (for 100 MHz SYSCLKOUT)
-      if(ECap1Regs.CAP1 >= 0x01312D00)
-      {
-         direction = 0;
-      } else if (ECap1Regs.CAP1 <= 0x00989680)
-      {
-         direction = 1;
-      }
-
-      if(direction == 0)
-      {
-         ECap1Regs.CAP3 = ECap1Regs.CAP1 - 500000;
-      } else
-      {
-         ECap1Regs.CAP3 = ECap1Regs.CAP1 + 500000;
-      }
-   }
-
-}
-
-
-
-//===========================================================================
-// No more.
-//===========================================================================
diff --git a/Source/External/v120/DSP2833x_examples/ecap_apwm/Example_2833xECap_apwm.gel b/Source/External/v120/DSP2833x_examples/ecap_apwm/Example_2833xECap_apwm.gel
deleted file mode 100644
index 15cb906..0000000
--- a/Source/External/v120/DSP2833x_examples/ecap_apwm/Example_2833xECap_apwm.gel
+++ /dev/null
@@ -1,39 +0,0 @@
-/*
-// TI File $Revision: /main/5 $
-// Checkin $Date: August 9, 2007   17:13:02 $
-//###########################################################################
-//
-// This .gel file can be used to help load and build the example project.
-// It should be unloaded from Code Composer Studio before loading another 
-// project. 
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-*/
-
-menuitem "DSP2833x eCAP Asym PWM"
-
-hotmenu Load_and_Build_Project()
-{
-   GEL_ProjectLoad("Example_2833xECap_apwm.pjt");
-   GEL_ProjectBuild("Example_2833xECap_apwm.pjt");
-   Setup_WatchWindow();
-}
-
-hotmenu Load_Code()
-{
-   GEL_Load(".\\debug\\Example_2833xECap_apwm.out");
-   Setup_WatchWindow();
-}
-
-hotmenu Setup_WatchWindow()
-{
-   GEL_WatchReset();
-   GEL_WatchAdd("ECap1Regs,x");
-}
-
-
-
-
diff --git a/Source/External/v120/DSP2833x_examples/ecap_apwm/Example_2833xECap_apwm.pjt b/Source/External/v120/DSP2833x_examples/ecap_apwm/Example_2833xECap_apwm.pjt
deleted file mode 100644
index d982655..0000000
--- a/Source/External/v120/DSP2833x_examples/ecap_apwm/Example_2833xECap_apwm.pjt
+++ /dev/null
@@ -1,46 +0,0 @@
-; Code Composer Project File, Version 2.0 (do not modify or remove this line)
-
-[Project Settings]
-ProjectName="DSP2833x"
-ProjectDir="C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\ecap_apwm\"
-ProjectType=Executable
-CPUFamily=TMS320C28XX
-Tool="Compiler"
-Tool="DspBiosBuilder"
-Tool="Linker"
-Config="Debug"
-Config="Release"
-
-[Source Files]
-Source="..\..\DSP2833x_common\source\DSP2833x_ADC_cal.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CodeStartBranch.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CpuTimers.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_DefaultIsr.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_ECap.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieVect.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_SysCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_usDelay.asm"
-Source="..\..\DSP2833x_headers\source\DSP2833x_GlobalVariableDefs.c"
-Source="Example_2833xECap_apwm.c"
-Source="..\..\DSP2833x_common\cmd\28335_RAM_lnk.cmd"
-Source="..\..\DSP2833x_headers\cmd\DSP2833x_Headers_nonBIOS.cmd"
-
-["Compiler" Settings: "Debug"]
-Options=-g -q -pdr -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\ecap_apwm\Debug" -fs"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\ecap_apwm\Debug" -i"..\..\DSP2833x_headers\include" -i"..\..\DSP2833x_common\include" -d"_DEBUG" -d"LARGE_MODEL" --float_support=fpu32 -ml -mt -v28
-
-["Compiler" Settings: "Release"]
-Options=-q -o3 -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\ecap_apwm\Release" -d"LARGE_MODEL" -ml -v28
-
-["DspBiosBuilder" Settings: "Debug"]
-Options=-v28
-
-["DspBiosBuilder" Settings: "Release"]
-Options=-v28
-
-["Linker" Settings: "Debug"]
-Options=-q -c -ecode_start -m".\Debug\Example_2833xECap_apwm.map" -o".\Debug\Example_2833xECap_apwm.out" -stack0x380 -w -x -l"rts2800_fpu32.lib"
-
-["Linker" Settings: "Release"]
-Options=-q -c -o".\Release\Example_2833xECap_apwm.out" -x
-
diff --git a/Source/External/v120/DSP2833x_examples/ecap_capture_pwm/Example_2833xECap_Capture_Pwm.c b/Source/External/v120/DSP2833x_examples/ecap_capture_pwm/Example_2833xECap_Capture_Pwm.c
deleted file mode 100644
index 22ecde8..0000000
--- a/Source/External/v120/DSP2833x_examples/ecap_capture_pwm/Example_2833xECap_Capture_Pwm.c
+++ /dev/null
@@ -1,288 +0,0 @@
-// TI File $Revision: /main/8 $
-// Checkin $Date: April 21, 2008   15:41:29 $
-//###########################################################################
-//
-// FILE:    Example_2833xECap_Capture_Pwm.c
-//
-// TITLE:   Capture EPWM3.
-//
-// ASSUMPTIONS:
-//
-//    This program requires the DSP2833x header files.  
-//
-//    Make the following external connection:
-//    EPWM3 on GPIO4 should be connected to ECAP1 on GPIO24.
-//
-//    As supplied, this project is configured for "boot to SARAM" 
-//    operation.  The 2833x Boot Mode table is shown below.  
-//    For information on configuring the boot mode of an eZdsp, 
-//    please refer to the documentation included with the eZdsp,  
-//
-//       $Boot_Table:
-//
-//         GPIO87   GPIO86     GPIO85   GPIO84
-//          XA15     XA14       XA13     XA12
-//           PU       PU         PU       PU
-//        ==========================================
-//            1        1          1        1    Jump to Flash
-//            1        1          1        0    SCI-A boot
-//            1        1          0        1    SPI-A boot
-//            1        1          0        0    I2C-A boot
-//            1        0          1        1    eCAN-A boot
-//            1        0          1        0    McBSP-A boot
-//            1        0          0        1    Jump to XINTF x16
-//            1        0          0        0    Jump to XINTF x32
-//            0        1          1        1    Jump to OTP
-//            0        1          1        0    Parallel GPIO I/O boot
-//            0        1          0        1    Parallel XINTF boot
-//            0        1          0        0    Jump to SARAM	    <- "boot to SARAM"
-//            0        0          1        1    Branch to check boot mode
-//            0        0          1        0    Boot to flash, bypass ADC cal
-//            0        0          0        1    Boot to SARAM, bypass ADC cal
-//            0        0          0        0    Boot to SCI-A, bypass ADC cal
-//                                              Boot_Table_End$
-//
-// DESCRIPTION:
-//
-//    This example configures ePWM3A for:
-//    - Up count
-//    - Period starts at 2 and goes up to 1000
-//    - Toggle output on PRD
-//
-//    eCAP1 is configured to capture the time between rising
-//    and falling edge of the PWM3A output.
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-
-
-#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File
-
-
-// Configure the start/end period for the timer
-#define PWM3_TIMER_MIN     10                    
-#define PWM3_TIMER_MAX     8000
-
-// Prototype statements for functions found within this file.
-interrupt void ecap1_isr(void);
-void InitECapture(void);
-void InitEPwmTimer(void);
-void Fail(void);
-
-// Global variables used in this example
-Uint32  ECap1IntCount;
-Uint32  ECap1PassCount;
-Uint32  EPwm3TimerDirection;
-
-// To keep track of which way the timer value is moving
-#define EPWM_TIMER_UP   1
-#define EPWM_TIMER_DOWN 0
-
-void main(void)
-{
-
-// Step 1. Initialize System Control:
-// PLL, WatchDog, enable Peripheral Clocks
-// This example function is found in the DSP2833x_SysCtrl.c file.
-   InitSysCtrl();
-
-// Step 2. Initalize GPIO: 
-// This example function is found in the DSP2833x_Gpio.c file and
-// illustrates how to set the GPIO to it's default state.
-// InitGpio();  // Skipped for this example  
-   
-   InitEPwm3Gpio();
-   InitECap1Gpio();
-
-// Step 3. Clear all interrupts and initialize PIE vector table:
-// Disable CPU interrupts 
-   DINT;
-
-// Initialize the PIE control registers to their default state.
-// The default state is all PIE interrupts disabled and flags
-// are cleared.  
-// This function is found in the DSP2833x_PieCtrl.c file.
-   InitPieCtrl();
-   
-// Disable CPU interrupts and clear all CPU interrupt flags:
-   IER = 0x0000;
-   IFR = 0x0000;
-
-// Initialize the PIE vector table with pointers to the shell Interrupt 
-// Service Routines (ISR).  
-// This will populate the entire table, even if the interrupt
-// is not used in this example.  This is useful for debug purposes.
-// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
-// This function is found in DSP2833x_PieVect.c.
-   InitPieVectTable();
-
-// Interrupts that are used in this example are re-mapped to
-// ISR functions found within this file.  
-   EALLOW;  // This is needed to write to EALLOW protected registers
-   PieVectTable.ECAP1_INT = &ecap1_isr;
-   EDIS;    // This is needed to disable write to EALLOW protected registers
-
-// Step 4. Initialize all the Device Peripherals:
-// This function is found in DSP2833x_InitPeripherals.c
-// InitPeripherals();  // Not required for this example
-   InitEPwmTimer();    // For this example, only initialize the ePWM Timers
-   InitECapture();
-
-
-// Step 5. User specific code, enable interrupts:
-
-// Initalize counters:   
-   ECap1IntCount = 0;
-   ECap1PassCount = 0;
-   
-// Enable CPU INT4 which is connected to ECAP1-4 INT:
-   IER |= M_INT4;
-
-// Enable eCAP INTn in the PIE: Group 3 interrupt 1-6
-   PieCtrlRegs.PIEIER4.bit.INTx1 = 1;
-
-// Enable global Interrupts and higher priority real-time debug events:
-   EINT;   // Enable Global interrupt INTM
-   ERTM;   // Enable Global realtime interrupt DBGM
-
-// Step 6. IDLE loop. Just sit and loop forever (optional):
-   for(;;)
-   {
-       asm("          NOP");
-   }
-
-} 
-
-
-void InitEPwmTimer()
-{
-
-   EALLOW;
-   SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0;
-   EDIS;
-
-   EPwm3Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP; // Count up
-   EPwm3Regs.TBPRD = PWM3_TIMER_MIN;
-   EPwm3Regs.TBPHS.all = 0x00000000;
-   EPwm3Regs.AQCTLA.bit.PRD = AQ_TOGGLE;      // Toggle on PRD
-   
-   // TBCLK = SYSCLKOUT
-   EPwm3Regs.TBCTL.bit.HSPCLKDIV = 1;
-   EPwm3Regs.TBCTL.bit.CLKDIV = 0;
-
-
-   EPwm3TimerDirection = EPWM_TIMER_UP; 
-   
-   EALLOW;
-   SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1;
-   EDIS;
-
-}
-
-void InitECapture()
-{
-   ECap1Regs.ECEINT.all = 0x0000;             // Disable all capture interrupts
-   ECap1Regs.ECCLR.all = 0xFFFF;              // Clear all CAP interrupt flags
-   ECap1Regs.ECCTL1.bit.CAPLDEN = 0;          // Disable CAP1-CAP4 register loads
-   ECap1Regs.ECCTL2.bit.TSCTRSTOP = 0;        // Make sure the counter is stopped
-   
-   // Configure peripheral registers
-   ECap1Regs.ECCTL2.bit.CONT_ONESHT = 1;      // One-shot
-   ECap1Regs.ECCTL2.bit.STOP_WRAP = 3;        // Stop at 4 events
-   ECap1Regs.ECCTL1.bit.CAP1POL = 1;          // Falling edge
-   ECap1Regs.ECCTL1.bit.CAP2POL = 0;          // Rising edge
-   ECap1Regs.ECCTL1.bit.CAP3POL = 1;          // Falling edge
-   ECap1Regs.ECCTL1.bit.CAP4POL = 0;          // Rising edge
-   ECap1Regs.ECCTL1.bit.CTRRST1 = 1;          // Difference operation         
-   ECap1Regs.ECCTL1.bit.CTRRST2 = 1;          // Difference operation         
-   ECap1Regs.ECCTL1.bit.CTRRST3 = 1;          // Difference operation         
-   ECap1Regs.ECCTL1.bit.CTRRST4 = 1;          // Difference operation         
-   ECap1Regs.ECCTL2.bit.SYNCI_EN = 1;         // Enable sync in
-   ECap1Regs.ECCTL2.bit.SYNCO_SEL = 0;        // Pass through
-   ECap1Regs.ECCTL1.bit.CAPLDEN = 1;          // Enable capture units
-
-
-   ECap1Regs.ECCTL2.bit.TSCTRSTOP = 1;        // Start Counter
-   ECap1Regs.ECCTL2.bit.REARM = 1;            // arm one-shot
-   ECap1Regs.ECCTL1.bit.CAPLDEN = 1;          // Enable CAP1-CAP4 register loads
-   ECap1Regs.ECEINT.bit.CEVT4 = 1;            // 4 events = interrupt
-
-}
-
-
-
-interrupt void ecap1_isr(void)
-{
-
-   // Cap input is syc'ed to SYSCLKOUT so there may be
-   // a +/- 1 cycle variation
-    
-   if(ECap1Regs.CAP2 > EPwm3Regs.TBPRD*2+1 || ECap1Regs.CAP2 < EPwm3Regs.TBPRD*2-1) 
-   {
-       Fail();
-   }
-
-   if(ECap1Regs.CAP3 > EPwm3Regs.TBPRD*2+1 || ECap1Regs.CAP3 < EPwm3Regs.TBPRD*2-1) 
-   {
-       Fail();
-   }
-   
-   if(ECap1Regs.CAP4 > EPwm3Regs.TBPRD*2+1 || ECap1Regs.CAP4 < EPwm3Regs.TBPRD*2-1) 
-   {
-       Fail();
-   }   
-
-
-   ECap1IntCount++;
-
-   if(EPwm3TimerDirection == EPWM_TIMER_UP)
-   {
-        if(EPwm3Regs.TBPRD < PWM3_TIMER_MAX) 
-        {
-           EPwm3Regs.TBPRD++;
-        }
-        else
-        {
-           EPwm3TimerDirection = EPWM_TIMER_DOWN;
-           EPwm3Regs.TBPRD--;
-        }
-   }
-   else
-   {
-        if(EPwm3Regs.TBPRD > PWM3_TIMER_MIN) 
-        {
-           EPwm3Regs.TBPRD--;
-        }
-        else
-        {
-           EPwm3TimerDirection = EPWM_TIMER_UP;
-           EPwm3Regs.TBPRD++;
-        }
-   }   
-
-   ECap1PassCount++;
-
-   ECap1Regs.ECCLR.bit.CEVT4 = 1;
-   ECap1Regs.ECCLR.bit.INT = 1;
-   ECap1Regs.ECCTL2.bit.REARM = 1;
-
-   // Acknowledge this interrupt to receive more interrupts from group 4
-   PieCtrlRegs.PIEACK.all = PIEACK_GROUP4;
-}
-
-
-void Fail()
-{
-    asm("   ESTOP0");
-}
-
-
-
-
-
-//===========================================================================
-// No more.
-//===========================================================================
diff --git a/Source/External/v120/DSP2833x_examples/ecap_capture_pwm/Example_2833xECap_Capture_Pwm.gel b/Source/External/v120/DSP2833x_examples/ecap_capture_pwm/Example_2833xECap_Capture_Pwm.gel
deleted file mode 100644
index aefa65b..0000000
--- a/Source/External/v120/DSP2833x_examples/ecap_capture_pwm/Example_2833xECap_Capture_Pwm.gel
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
-// TI File $Revision: /main/5 $
-// Checkin $Date: August 9, 2007   17:13:13 $
-//###########################################################################
-//
-// This .gel file can be used to help load and build the example project.
-// It should be unloaded from Code Composer Studio before loading another 
-// project. 
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-*/
-
-menuitem "DSP2833x eCAP Capture PWM"
-
-hotmenu Load_and_Build_Project()
-{
-   GEL_ProjectLoad("Example_2833xECap_Capture_Pwm.pjt");
-   GEL_ProjectBuild("Example_2833xECap_Capture_Pwm.pjt");
-   Setup_WatchWindow();
-}
-
-hotmenu Load_Code()
-{
-   GEL_Load(".\\debug\\Example_2833xECap_Capture_Pwm.out");
-   Setup_WatchWindow();
-}
-
-hotmenu Setup_WatchWindow()
-{
-   GEL_WatchReset();
-   GEL_WatchAdd("ECap1IntCount,x");
-   GEL_WatchAdd("ECap1PassCount,x");
-   GEL_WatchAdd("EPwm3Regs.TBPRD,x");
-   GEL_WatchAdd("ECap1Regs.CAP2,x");
-   GEL_WatchAdd("ECap1Regs.CAP3,x");
-   GEL_WatchAdd("ECap1Regs.CAP4,x");
-   GEL_WatchAdd("EPwm3Regs,x");
-   GEL_WatchAdd("ECap1Regs,x");
-}
-
-
-
-
diff --git a/Source/External/v120/DSP2833x_examples/ecap_capture_pwm/Example_2833xECap_Capture_Pwm.pjt b/Source/External/v120/DSP2833x_examples/ecap_capture_pwm/Example_2833xECap_Capture_Pwm.pjt
deleted file mode 100644
index cae4269..0000000
--- a/Source/External/v120/DSP2833x_examples/ecap_capture_pwm/Example_2833xECap_Capture_Pwm.pjt
+++ /dev/null
@@ -1,47 +0,0 @@
-; Code Composer Project File, Version 2.0 (do not modify or remove this line)
-
-[Project Settings]
-ProjectName="DSP2833x"
-ProjectDir="C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\ecap_capture_pwm\"
-ProjectType=Executable
-CPUFamily=TMS320C28XX
-Tool="Compiler"
-Tool="DspBiosBuilder"
-Tool="Linker"
-Config="Debug"
-Config="Release"
-
-[Source Files]
-Source="..\..\DSP2833x_common\source\DSP2833x_ADC_cal.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CodeStartBranch.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CpuTimers.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_DefaultIsr.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_ECap.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_EPwm.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieVect.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_SysCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_usDelay.asm"
-Source="..\..\DSP2833x_headers\source\DSP2833x_GlobalVariableDefs.c"
-Source="Example_2833xECap_Capture_Pwm.c"
-Source="..\..\DSP2833x_common\cmd\28335_RAM_lnk.cmd"
-Source="..\..\DSP2833x_headers\cmd\DSP2833x_Headers_nonBIOS.cmd"
-
-["Compiler" Settings: "Debug"]
-Options=-g -q -pdr -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\ecap_capture_pwm\Debug" -fs"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\ecap_capture_pwm\Debug" -i"..\..\DSP2833x_headers\include" -i"..\..\DSP2833x_common\include" -d"_DEBUG" -d"LARGE_MODEL" --float_support=fpu32 -ml -mt -v28
-
-["Compiler" Settings: "Release"]
-Options=-q -o3 -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\ecap_capture_pwm\Release" -d"LARGE_MODEL" -ml -v28
-
-["DspBiosBuilder" Settings: "Debug"]
-Options=-v28
-
-["DspBiosBuilder" Settings: "Release"]
-Options=-v28
-
-["Linker" Settings: "Debug"]
-Options=-q -c -ecode_start -m".\Debug\Example_2833xECap_Capture_Pwm.map" -o".\Debug\Example_2833xECap_Capture_Pwm.out" -stack0x380 -w -x -i"..\..\DSP2833x_headers\include" -l"rts2800_fpu32.lib"
-
-["Linker" Settings: "Release"]
-Options=-q -c -o".\Release\Example_2833xCpuTimer.out" -x
-
diff --git a/Source/External/v120/DSP2833x_examples/epwm_deadband/Example_2833xEPwmDeadBand.c b/Source/External/v120/DSP2833x_examples/epwm_deadband/Example_2833xEPwmDeadBand.c
deleted file mode 100644
index 8e91544..0000000
--- a/Source/External/v120/DSP2833x_examples/epwm_deadband/Example_2833xEPwmDeadBand.c
+++ /dev/null
@@ -1,457 +0,0 @@
-// TI File $Revision: /main/9 $
-// Checkin $Date: April 21, 2008   15:41:33 $
-//###########################################################################
-//
-// FILE:    Example_2833xEpwmDeadBand.c
-//
-// TITLE:   Check PWM deadband generation
-//
-// ASSUMPTIONS:
-//
-//    This program requires the DSP2833x header files.
-//
-//    Monitor ePWM1 - ePWM3 on an Oscilloscope as described
-//    below.
-//
-//       EPWM1A is on GPIO0
-//       EPWM1B is on GPIO1
-//
-//       EPWM2A is on GPIO2
-//       EPWM2B is on GPIO3
-//
-//       EPWM3A is on GPIO4
-//       EPWM3B is on GPIO5
-//
-//    As supplied, this project is configured for "boot to SARAM"
-//    operation.  The 2833x Boot Mode table is shown below.
-//    For information on configuring the boot mode of an eZdsp,
-//    please refer to the documentation included with the eZdsp,
-//
-//       $Boot_Table:
-//
-//         GPIO87   GPIO86     GPIO85   GPIO84
-//          XA15     XA14       XA13     XA12
-//           PU       PU         PU       PU
-//        ==========================================
-//            1        1          1        1    Jump to Flash
-//            1        1          1        0    SCI-A boot
-//            1        1          0        1    SPI-A boot
-//            1        1          0        0    I2C-A boot
-//            1        0          1        1    eCAN-A boot
-//            1        0          1        0    McBSP-A boot
-//            1        0          0        1    Jump to XINTF x16
-//            1        0          0        0    Jump to XINTF x32
-//            0        1          1        1    Jump to OTP
-//            0        1          1        0    Parallel GPIO I/O boot
-//            0        1          0        1    Parallel XINTF boot
-//            0        1          0        0    Jump to SARAM	    <- "boot to SARAM"
-//            0        0          1        1    Branch to check boot mode
-//            0        0          1        0    Boot to flash, bypass ADC cal
-//            0        0          0        1    Boot to SARAM, bypass ADC cal
-//            0        0          0        0    Boot to SCI-A, bypass ADC cal
-//                                              Boot_Table_End$
-//
-// DESCRIPTION:
-//
-//    This example configures ePWM1, ePWM2 and ePWM3 for:
-//    - Count up/down
-//    - Deadband
-//
-//    3 Examples are included:
-//    * ePWM1: Active low PWMs
-//    * ePWM2: Active low complementary PWMs
-//    * ePWM3: Active high complementary PWMs
-//
-//    Each ePWM is configured to interrupt on the 3rd zero event
-//    when this happens the deadband is modified such that
-//    0 <= DB <= DB_MAX.  That is, the deadband will move up and
-//    down between 0 and the maximum value.
-//
-//
-//    View the EPWM1A/B, EPWM2A/B and EPWM3A/B waveforms
-//    via an oscilloscope
-//
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File
-
-// Prototype statements for functions found within this file.
-void InitEPwm1Example(void);
-void InitEPwm2Example(void);
-void InitEPwm3Example(void);
-interrupt void epwm1_isr(void);
-interrupt void epwm2_isr(void);
-interrupt void epwm3_isr(void);
-
-// Global variables used in this example
-Uint32  EPwm1TimerIntCount;
-Uint32  EPwm2TimerIntCount;
-Uint32  EPwm3TimerIntCount;
-Uint16  EPwm1_DB_Direction;
-Uint16  EPwm2_DB_Direction;
-Uint16  EPwm3_DB_Direction;
-
-// Maximum Dead Band values
-#define EPWM1_MAX_DB   0x03FF
-#define EPWM2_MAX_DB   0x03FF
-#define EPWM3_MAX_DB   0x03FF
-
-#define EPWM1_MIN_DB   0
-#define EPWM2_MIN_DB   0
-#define EPWM3_MIN_DB   0
-
-// To keep track of which way the Dead Band is moving
-#define DB_UP   1
-#define DB_DOWN 0
-
-void main(void)
-{
-// Step 1. Initialize System Control:
-// PLL, WatchDog, enable Peripheral Clocks
-// This example function is found in the DSP2833x_SysCtrl.c file.
-   InitSysCtrl();
-
-// Step 2. Initalize GPIO:
-// This example function is found in the DSP2833x_Gpio.c file and
-// illustrates how to set the GPIO to it's default state.
-// InitGpio();  // Skipped for this example
-
-// For this case just init GPIO pins for ePWM1, ePWM2, ePWM3
-// These functions are in the DSP2833x_EPwm.c file
-   InitEPwm1Gpio();
-   InitEPwm2Gpio();
-   InitEPwm3Gpio();
-
-// Step 3. Clear all interrupts and initialize PIE vector table:
-// Disable CPU interrupts
-   DINT;
-
-// Initialize the PIE control registers to their default state.
-// The default state is all PIE interrupts disabled and flags
-// are cleared.
-// This function is found in the DSP2833x_PieCtrl.c file.
-   InitPieCtrl();
-
-// Disable CPU interrupts and clear all CPU interrupt flags:
-   IER = 0x0000;
-   IFR = 0x0000;
-
-// Initialize the PIE vector table with pointers to the shell Interrupt
-// Service Routines (ISR).
-// This will populate the entire table, even if the interrupt
-// is not used in this example.  This is useful for debug purposes.
-// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
-// This function is found in DSP2833x_PieVect.c.
-   InitPieVectTable();
-
-// Interrupts that are used in this example are re-mapped to
-// ISR functions found within this file.
-   EALLOW;  // This is needed to write to EALLOW protected registers
-   PieVectTable.EPWM1_INT = &epwm1_isr;
-   PieVectTable.EPWM2_INT = &epwm2_isr;
-   PieVectTable.EPWM3_INT = &epwm3_isr;
-   EDIS;    // This is needed to disable write to EALLOW protected registers
-
-// Step 4. Initialize all the Device Peripherals:
-// This function is found in DSP2833x_InitPeripherals.c
-// InitPeripherals();  // Not required for this example
-
-
-   EALLOW;
-   SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0;
-   EDIS;
-
-   InitEPwm1Example();
-   InitEPwm2Example();
-   InitEPwm3Example();
-
-   EALLOW;
-   SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1;
-   EDIS;
-
-// Step 5. User specific code, enable interrupts
-// Initalize counters:
-   EPwm1TimerIntCount = 0;
-   EPwm2TimerIntCount = 0;
-   EPwm3TimerIntCount = 0;
-
-// Enable CPU INT3 which is connected to EPWM1-3 INT:
-   IER |= M_INT3;
-
-// Enable EPWM INTn in the PIE: Group 3 interrupt 1-3
-   PieCtrlRegs.PIEIER3.bit.INTx1 = 1;
-   PieCtrlRegs.PIEIER3.bit.INTx2 = 1;
-   PieCtrlRegs.PIEIER3.bit.INTx3 = 1;
-
-// Enable global Interrupts and higher priority real-time debug events:
-   EINT;   // Enable Global interrupt INTM
-   ERTM;   // Enable Global realtime interrupt DBGM
-
-
-
-// Step 6. IDLE loop. Just sit and loop forever (optional):
-   for(;;)
-   {
-       asm("          NOP");
-   }
-
-}
-
-interrupt void epwm1_isr(void)
-{
-   if(EPwm1_DB_Direction == DB_UP)
-   {
-       if(EPwm1Regs.DBFED < EPWM1_MAX_DB)
-       {
-          EPwm1Regs.DBFED++;
-          EPwm1Regs.DBRED++;
-       }
-       else
-       {
-          EPwm1_DB_Direction = DB_DOWN;
-          EPwm1Regs.DBFED--;
-          EPwm1Regs.DBRED--;
-       }
-   }
-   else
-   {
-       if(EPwm1Regs.DBFED == EPWM1_MIN_DB)
-       {
-          EPwm1_DB_Direction = DB_UP;
-          EPwm1Regs.DBFED++;
-          EPwm1Regs.DBRED++;
-       }
-       else
-       {
-          EPwm1Regs.DBFED--;
-          EPwm1Regs.DBRED--;
-       }
-   }
-   EPwm1TimerIntCount++;
-
-   // Clear INT flag for this timer
-   EPwm1Regs.ETCLR.bit.INT = 1;
-
-   // Acknowledge this interrupt to receive more interrupts from group 3
-   PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
-
-}
-
-interrupt void epwm2_isr(void)
-{
-
-   if(EPwm2_DB_Direction == DB_UP)
-   {
-       if(EPwm2Regs.DBFED < EPWM2_MAX_DB)
-       {
-          EPwm2Regs.DBFED++;
-          EPwm2Regs.DBRED++;
-       }
-       else
-       {
-          EPwm2_DB_Direction = DB_DOWN;
-          EPwm2Regs.DBFED--;
-          EPwm2Regs.DBRED--;
-       }
-   }
-   else
-   {
-       if(EPwm2Regs.DBFED == EPWM2_MIN_DB)
-       {
-          EPwm2_DB_Direction = DB_UP;
-          EPwm2Regs.DBFED++;
-          EPwm2Regs.DBRED++;
-       }
-       else
-       {
-          EPwm2Regs.DBFED--;
-          EPwm2Regs.DBRED--;
-       }
-   }
-
-   EPwm2TimerIntCount++;
-
-   // Clear INT flag for this timer
-   EPwm2Regs.ETCLR.bit.INT = 1;
-
-   // Acknowledge this interrupt to receive more interrupts from group 3
-   PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
-
-}
-
-interrupt void epwm3_isr(void)
-{
-   if(EPwm3_DB_Direction == DB_UP)
-   {
-       if(EPwm3Regs.DBFED < EPWM3_MAX_DB)
-       {
-          EPwm3Regs.DBFED++;
-          EPwm3Regs.DBRED++;
-       }
-       else
-       {
-          EPwm3_DB_Direction = DB_DOWN;
-          EPwm3Regs.DBFED--;
-          EPwm3Regs.DBRED--;
-       }
-   }
-   else
-   {
-       if(EPwm3Regs.DBFED == EPWM3_MIN_DB)
-       {
-          EPwm3_DB_Direction = DB_UP;
-          EPwm3Regs.DBFED++;
-          EPwm3Regs.DBRED++;
-       }
-       else
-       {
-          EPwm3Regs.DBFED--;
-          EPwm3Regs.DBRED--;
-       }
-   }
-
-
-   EPwm3TimerIntCount++;
-
-   // Clear INT flag for this timer
-   EPwm3Regs.ETCLR.bit.INT = 1;
-
-   // Acknowledge this interrupt to receive more interrupts from group 3
-   PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
-
-}
-
-
-
-void InitEPwm1Example()
-{
-
-   EPwm1Regs.TBPRD = 6000;                        // Set timer period
-   EPwm1Regs.TBPHS.half.TBPHS = 0x0000;           // Phase is 0
-   EPwm1Regs.TBCTR = 0x0000;                      // Clear counter
-
-   // Setup TBCLK
-   EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Count up
-   EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE;        // Disable phase loading
-   EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV4;       // Clock ratio to SYSCLKOUT
-   EPwm1Regs.TBCTL.bit.CLKDIV = TB_DIV4;
-
-   EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;    // Load registers every ZERO
-   EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
-   EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
-   EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
-
-   // Setup compare
-   EPwm1Regs.CMPA.half.CMPA = 3000;
-
-   // Set actions
-   EPwm1Regs.AQCTLA.bit.CAU = AQ_SET;             // Set PWM1A on Zero
-   EPwm1Regs.AQCTLA.bit.CAD = AQ_CLEAR;
-
-
-   EPwm1Regs.AQCTLB.bit.CAU = AQ_CLEAR;          // Set PWM1A on Zero
-   EPwm1Regs.AQCTLB.bit.CAD = AQ_SET;
-
-   // Active Low PWMs - Setup Deadband
-   EPwm1Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE;
-   EPwm1Regs.DBCTL.bit.POLSEL = DB_ACTV_LO;
-   EPwm1Regs.DBCTL.bit.IN_MODE = DBA_ALL;
-   EPwm1Regs.DBRED = EPWM1_MIN_DB;
-   EPwm1Regs.DBFED = EPWM1_MIN_DB;
-   EPwm1_DB_Direction = DB_UP;
-
-   // Interrupt where we will change the Deadband
-   EPwm1Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO;     // Select INT on Zero event
-   EPwm1Regs.ETSEL.bit.INTEN = 1;                // Enable INT
-   EPwm1Regs.ETPS.bit.INTPRD = ET_3RD;           // Generate INT on 3rd event
-
-
-}
-
-
-void InitEPwm2Example()
-{
-
-   EPwm2Regs.TBPRD = 6000;                        // Set timer period
-   EPwm2Regs.TBPHS.half.TBPHS = 0x0000;           // Phase is 0
-   EPwm2Regs.TBCTR = 0x0000;                      // Clear counter
-
-   // Setup TBCLK
-   EPwm2Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Count up
-   EPwm2Regs.TBCTL.bit.PHSEN = TB_DISABLE;        // Disable phase loading
-   EPwm2Regs.TBCTL.bit.HSPCLKDIV = TB_DIV4;       // Clock ratio to SYSCLKOUT
-   EPwm2Regs.TBCTL.bit.CLKDIV = TB_DIV4;          // Slow just to observe on the scope
-
-   // Setup compare
-   EPwm2Regs.CMPA.half.CMPA = 3000;
-
-   // Set actions
-   EPwm2Regs.AQCTLA.bit.CAU = AQ_SET;             // Set PWM2A on Zero
-   EPwm2Regs.AQCTLA.bit.CAD = AQ_CLEAR;
-
-
-   EPwm2Regs.AQCTLB.bit.CAU = AQ_CLEAR;           // Set PWM2A on Zero
-   EPwm2Regs.AQCTLB.bit.CAD = AQ_SET;
-
-   // Active Low complementary PWMs - setup the deadband
-   EPwm2Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE;
-   EPwm2Regs.DBCTL.bit.POLSEL = DB_ACTV_LOC;
-   EPwm2Regs.DBCTL.bit.IN_MODE = DBA_ALL;
-   EPwm2Regs.DBRED = EPWM2_MIN_DB;
-   EPwm2Regs.DBFED = EPWM2_MIN_DB;
-   EPwm2_DB_Direction = DB_UP;
-
-   // Interrupt where we will modify the deadband
-   EPwm2Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO;      // Select INT on Zero event
-   EPwm2Regs.ETSEL.bit.INTEN = 1;                 // Enable INT
-   EPwm2Regs.ETPS.bit.INTPRD = ET_3RD;            // Generate INT on 3rd event
-
-}
-
-void InitEPwm3Example()
-{
-
-   EPwm3Regs.TBPRD = 6000;                         // Set timer period
-   EPwm3Regs.TBPHS.half.TBPHS = 0x0000;            // Phase is 0
-   EPwm3Regs.TBCTR = 0x0000;                       // Clear counter
-
-
-   // Setup TBCLK
-   EPwm3Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Count up
-   EPwm3Regs.TBCTL.bit.PHSEN = TB_DISABLE;        // Disable phase loading
-   EPwm3Regs.TBCTL.bit.HSPCLKDIV = TB_DIV4;       // Clock ratio to SYSCLKOUT
-   EPwm3Regs.TBCTL.bit.CLKDIV = TB_DIV4;          // Slow so we can observe on the scope
-
-   // Setup compare
-   EPwm3Regs.CMPA.half.CMPA = 3000;
-
-   // Set actions
-   EPwm3Regs.AQCTLA.bit.CAU = AQ_SET;              // Set PWM3A on Zero
-   EPwm3Regs.AQCTLA.bit.CAD = AQ_CLEAR;
-
-
-   EPwm3Regs.AQCTLB.bit.CAU = AQ_CLEAR;            // Set PWM3A on Zero
-   EPwm3Regs.AQCTLB.bit.CAD = AQ_SET;
-
-   // Active high complementary PWMs - Setup the deadband
-   EPwm3Regs.DBCTL.bit.OUT_MODE = DB_FULL_ENABLE;
-   EPwm3Regs.DBCTL.bit.POLSEL = DB_ACTV_HIC;
-   EPwm3Regs.DBCTL.bit.IN_MODE = DBA_ALL;
-   EPwm3Regs.DBRED = EPWM3_MIN_DB;
-   EPwm3Regs.DBFED = EPWM3_MIN_DB;
-   EPwm3_DB_Direction = DB_UP;
-
-   // Interrupt where we will change the deadband
-   EPwm3Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO;       // Select INT on Zero event
-   EPwm3Regs.ETSEL.bit.INTEN = 1;                  // Enable INT
-   EPwm3Regs.ETPS.bit.INTPRD = ET_3RD;             // Generate INT on 3rd event
-
-}
-
-//===========================================================================
-// No more.
-//===========================================================================
diff --git a/Source/External/v120/DSP2833x_examples/epwm_deadband/Example_2833xEPwmDeadBand.pjt b/Source/External/v120/DSP2833x_examples/epwm_deadband/Example_2833xEPwmDeadBand.pjt
deleted file mode 100644
index 08ffef5..0000000
--- a/Source/External/v120/DSP2833x_examples/epwm_deadband/Example_2833xEPwmDeadBand.pjt
+++ /dev/null
@@ -1,46 +0,0 @@
-; Code Composer Project File, Version 2.0 (do not modify or remove this line)
-
-[Project Settings]
-ProjectName="DSP2833x"
-ProjectDir="C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\epwm_deadband\"
-ProjectType=Executable
-CPUFamily=TMS320C28XX
-Tool="Compiler"
-Tool="DspBiosBuilder"
-Tool="Linker"
-Config="Debug"
-Config="Release"
-
-[Source Files]
-Source="..\..\DSP2833x_common\source\DSP2833x_ADC_cal.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CodeStartBranch.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CpuTimers.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_DefaultIsr.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_EPwm.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieVect.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_SysCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_usDelay.asm"
-Source="..\..\DSP2833x_headers\source\DSP2833x_GlobalVariableDefs.c"
-Source="Example_2833xEPwmDeadBand.c"
-Source="..\..\DSP2833x_common\cmd\28335_RAM_lnk.cmd"
-Source="..\..\DSP2833x_headers\cmd\DSP2833x_Headers_nonBIOS.cmd"
-
-["Compiler" Settings: "Debug"]
-Options=-g -q -pdr -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\epwm_deadband\Debug" -fs"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\epwm_deadband\Debug" -i"..\..\DSP2833x_headers\include" -i"..\..\DSP2833x_common\include" -d"_DEBUG" -d"LARGE_MODEL" --float_support=fpu32 -ml -mt -v28
-
-["Compiler" Settings: "Release"]
-Options=-q -o3 -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\epwm_deadband\Release" -d"LARGE_MODEL" -ml -v28
-
-["DspBiosBuilder" Settings: "Debug"]
-Options=-v28
-
-["DspBiosBuilder" Settings: "Release"]
-Options=-v28
-
-["Linker" Settings: "Debug"]
-Options=-q -c -ecode_start -m".\Debug\Example_2833xEPwmDeadBand.map" -o".\Debug\Example_2833xEPwmDeadBand.out" -stack0x380 -w -x -i"..\..\DSP2833x_headers\include" -l"rts2800_fpu32.lib"
-
-["Linker" Settings: "Release"]
-Options=-q -c -m".\Release\Example_2833xEPwmDeadBand.map" -o".\Release\Example_2833xEPwmDeadBand.out" -x
-
diff --git a/Source/External/v120/DSP2833x_examples/epwm_deadband/Example_2833xEPwmDeadband.gel b/Source/External/v120/DSP2833x_examples/epwm_deadband/Example_2833xEPwmDeadband.gel
deleted file mode 100644
index 4466bd1..0000000
--- a/Source/External/v120/DSP2833x_examples/epwm_deadband/Example_2833xEPwmDeadband.gel
+++ /dev/null
@@ -1,39 +0,0 @@
-/*
-// TI File $Revision: /main/5 $
-// Checkin $Date: August 9, 2007   17:13:25 $
-//###########################################################################
-//
-// This .gel file can be used to help load and build the example project.
-// It should be unloaded from Code Composer Studio before loading another 
-// project. 
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-*/
-
-menuitem "DSP2833x ePWM Deadband"
-
-hotmenu Load_and_Build_Project()
-{
-   GEL_ProjectLoad("Example_2833xEPwmDeadBand.pjt");
-   GEL_ProjectBuild("Example_2833xEPwmDeadBand.pjt");
-   Setup_WatchWindow();
-}
-
-hotmenu Load_Code()
-{
-   GEL_Load(".\\debug\\Example_2833xEPwmDeadBand.out");
-   Setup_WatchWindow();
-}
-
-hotmenu Setup_WatchWindow()
-{
-   GEL_WatchReset();
-   GEL_WatchAdd("EPwm1Regs,x");
-}
-
-
-
-
diff --git a/Source/External/v120/DSP2833x_examples/epwm_dma/DSP2833x_EPWMDM_Headers_BIOS.cmd b/Source/External/v120/DSP2833x_examples/epwm_dma/DSP2833x_EPWMDM_Headers_BIOS.cmd
deleted file mode 100644
index 2a2abf8..0000000
--- a/Source/External/v120/DSP2833x_examples/epwm_dma/DSP2833x_EPWMDM_Headers_BIOS.cmd
+++ /dev/null
@@ -1,183 +0,0 @@
-/*
-// TI File $Revision: /main/1 $
-// Checkin $Date: June 19, 2008   10:23:49 $
-//###########################################################################
-//
-// FILE:    DSP2833x_Headers_BIOS.cmd
-//
-// TITLE:   DSP2833x Peripheral registers linker command file 
-//
-// DESCRIPTION: 
-// 
-//          This file is for use in BIOS applications.
-//
-//          Linker command file to place the peripheral structures 
-//          used within the DSP2833x headerfiles into the correct memory
-//          mapped locations.
-//
-//          This version of the file does not include the PieVectorTable structure.
-//          For non-BIOS applications, please use the DSP2833x_Headers_nonBIOS.cmd 
-//          file which includes the PieVectorTable structure.
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-*/
-
-MEMORY
-{
- PAGE 0:    /* Program Memory */
-
- PAGE 1:    /* Data Memory */
- 
-   DEV_EMU     : origin = 0x000880, length = 0x000180     /* device emulation registers */
-   FLASH_REGS  : origin = 0x000A80, length = 0x000060     /* FLASH registers */
-   CSM         : origin = 0x000AE0, length = 0x000010     /* code security module registers */
-  
-   ADC_MIRROR  : origin = 0x000B00, length = 0x000010     /* ADC Results register mirror */
-
-   XINTF       : origin = 0x000B20, length = 0x000020     /* external interface registers */
-   
-   CPU_TIMER0  : origin = 0x000C00, length = 0x000008     /* CPU Timer0 registers */
-   CPU_TIMER1  : origin = 0x000C08, length = 0x000008     /* CPU Timer0 registers (CPU Timer1 & Timer2 reserved TI use)*/
-   CPU_TIMER2  : origin = 0x000C10, length = 0x000008     /* CPU Timer0 registers (CPU Timer1 & Timer2 reserved TI use)*/
-
-   PIE_CTRL    : origin = 0x000CE0, length = 0x000020     /* PIE control registers */
-
-   DMA         : origin = 0x001000, length = 0x000200     /* DMA registers */
-
-   MCBSPA      : origin = 0x005000, length = 0x000040     /* McBSP-A registers */
-   MCBSPB      : origin = 0x005040, length = 0x000040     /* McBSP-B registers */
-
-   ECANA       : origin = 0x006000, length = 0x000040     /* eCAN-A control and status registers */ 
-   ECANA_LAM   : origin = 0x006040, length = 0x000040     /* eCAN-A local acceptance masks */
-   ECANA_MOTS  : origin = 0x006080, length = 0x000040     /* eCAN-A message object time stamps */
-   ECANA_MOTO  : origin = 0x0060C0, length = 0x000040     /* eCAN-A object time-out registers */
-   ECANA_MBOX  : origin = 0x006100, length = 0x000100     /* eCAN-A mailboxes */
-
-   ECANB       : origin = 0x006200, length = 0x000040     /* eCAN-B control and status registers */ 
-   ECANB_LAM   : origin = 0x006240, length = 0x000040     /* eCAN-B local acceptance masks */
-   ECANB_MOTS  : origin = 0x006280, length = 0x000040     /* eCAN-B message object time stamps */
-   ECANB_MOTO  : origin = 0x0062C0, length = 0x000040     /* eCAN-B object time-out registers */
-   ECANB_MBOX  : origin = 0x006300, length = 0x000100     /* eCAN-B mailboxes */
-
-   EPWM1       : origin = 0x005800, length = 0x000022     /* Enhanced PWM 1 registers */
-   EPWM2       : origin = 0x005840, length = 0x000022     /* Enhanced PWM 2 registers */
-   EPWM3       : origin = 0x005880, length = 0x000022     /* Enhanced PWM 3 registers */
-   EPWM4       : origin = 0x0058C0, length = 0x000022     /* Enhanced PWM 4 registers */
-   EPWM5       : origin = 0x005900, length = 0x000022     /* Enhanced PWM 5 registers */
-   EPWM6       : origin = 0x005940, length = 0x000022     /* Enhanced PWM 6 registers */
-
-   ECAP1       : origin = 0x006A00, length = 0x000020     /* Enhanced Capture 1 registers */
-   ECAP2       : origin = 0x006A20, length = 0x000020     /* Enhanced Capture 2 registers */
-   ECAP3       : origin = 0x006A40, length = 0x000020     /* Enhanced Capture 3 registers */
-   ECAP4       : origin = 0x006A60, length = 0x000020     /* Enhanced Capture 4 registers */         
-   ECAP5       : origin = 0x006A80, length = 0x000020     /* Enhanced Capture 5 registers */         
-   ECAP6       : origin = 0x006AA0, length = 0x000020     /* Enhanced Capture 6 registers */         
- 
-   EQEP1       : origin = 0x006B00, length = 0x000040     /* Enhanced QEP 1 registers */
-   EQEP2       : origin = 0x006B40, length = 0x000040     /* Enhanced QEP 2 registers */   
-
-   GPIOCTRL    : origin = 0x006F80, length = 0x000040     /* GPIO control registers */
-   GPIODAT     : origin = 0x006FC0, length = 0x000020     /* GPIO data registers */
-   GPIOINT     : origin = 0x006FE0, length = 0x000020     /* GPIO interrupt/LPM registers */
-                 
-   SYSTEM      : origin = 0x007010, length = 0x000020     /* System control registers */
-   SPIA        : origin = 0x007040, length = 0x000010     /* SPI-A registers */
-   SCIA        : origin = 0x007050, length = 0x000010     /* SCI-A registers */
-   XINTRUPT    : origin = 0x007070, length = 0x000010     /* external interrupt registers */
-
-   ADC         : origin = 0x007100, length = 0x000020     /* ADC registers */
-
-   SCIB        : origin = 0x007750, length = 0x000010     /* SCI-B registers */
-
-   SCIC        : origin = 0x007770, length = 0x000010     /* SCI-C registers */
-   
-   I2CA        : origin = 0x007900, length = 0x000040     /* I2C-A registers */
-   
-   CSM_PWL     : origin = 0x3F7FF8, length = 0x000008     /* Part of FLASHA.  CSM password locations. */
-
-   PARTID      : origin = 0x380090, length = 0x000001     /* Part ID register location */
-
-}
-
- 
-SECTIONS
-{
-/*** The PIE Vector table is called PIEVECT by DSP/BIOS ***/
-   PieVectTableFile  : > PIEVECT,     PAGE = 1,  TYPE = DSECT
-
-/*** Peripheral Frame 0 Register Structures ***/
-   DevEmuRegsFile    : > DEV_EMU,     PAGE = 1
-   FlashRegsFile     : > FLASH_REGS,  PAGE = 1
-   CsmRegsFile       : > CSM,         PAGE = 1
-   AdcMirrorFile     : > ADC_MIRROR,  PAGE = 1 
-   XintfRegsFile     : > XINTF,       PAGE = 1
-   CpuTimer0RegsFile : > CPU_TIMER0,  PAGE = 1
-   CpuTimer1RegsFile : > CPU_TIMER1,  PAGE = 1
-   CpuTimer2RegsFile : > CPU_TIMER2,  PAGE = 1  
-   PieCtrlRegsFile   : > PIE_CTRL,    PAGE = 1     
-   DmaRegsFile       : > DMA,         PAGE = 1 
-
-/*** Peripheral Frame 3 Register Structures ***/
-   McbspaRegsFile    : > MCBSPA,      PAGE = 1
-   McbspbRegsFile    : > MCBSPB,      PAGE = 1
-
-/*** Peripheral Frame 1 Register Structures ***/
-   ECanaRegsFile     : > ECANA,       PAGE = 1
-   ECanaLAMRegsFile  : > ECANA_LAM    PAGE = 1   
-   ECanaMboxesFile   : > ECANA_MBOX   PAGE = 1
-   ECanaMOTSRegsFile : > ECANA_MOTS   PAGE = 1
-   ECanaMOTORegsFile : > ECANA_MOTO   PAGE = 1
-   
-   ECanbRegsFile     : > ECANB,       PAGE = 1
-   ECanbLAMRegsFile  : > ECANB_LAM    PAGE = 1   
-   ECanbMboxesFile   : > ECANB_MBOX   PAGE = 1
-   ECanbMOTSRegsFile : > ECANB_MOTS   PAGE = 1
-   ECanbMOTORegsFile : > ECANB_MOTO   PAGE = 1
-   
-   EPwm1RegsFile     : > EPWM1        PAGE = 1   
-   EPwm2RegsFile     : > EPWM2        PAGE = 1   
-   EPwm3RegsFile     : > EPWM3        PAGE = 1   
-   EPwm4RegsFile     : > EPWM4        PAGE = 1   
-   EPwm5RegsFile     : > EPWM5        PAGE = 1   
-   EPwm6RegsFile     : > EPWM6        PAGE = 1
-   
-   ECap1RegsFile     : > ECAP1        PAGE = 1   
-   ECap2RegsFile     : > ECAP2        PAGE = 1   
-   ECap3RegsFile     : > ECAP3        PAGE = 1   
-   ECap4RegsFile     : > ECAP4        PAGE = 1
-   ECap5RegsFile     : > ECAP5        PAGE = 1   
-   ECap6RegsFile     : > ECAP6        PAGE = 1
-
-   EQep1RegsFile     : > EQEP1        PAGE = 1   
-   EQep2RegsFile     : > EQEP2        PAGE = 1               
-
-   GpioCtrlRegsFile  : > GPIOCTRL     PAGE = 1
-   GpioDataRegsFile  : > GPIODAT      PAGE = 1
-   GpioIntRegsFile   : > GPIOINT      PAGE = 1
-   
-/*** Peripheral Frame 2 Register Structures ***/
-   SysCtrlRegsFile   : > SYSTEM,      PAGE = 1
-   SpiaRegsFile      : > SPIA,        PAGE = 1
-   SciaRegsFile      : > SCIA,        PAGE = 1
-   XIntruptRegsFile  : > XINTRUPT,    PAGE = 1
-   AdcRegsFile       : > ADC,         PAGE = 1
-   ScibRegsFile      : > SCIB,        PAGE = 1
-   ScicRegsFile      : > SCIC,        PAGE = 1
-   I2caRegsFile      : > I2CA,        PAGE = 1
-               
-/*** Code Security Module Register Structures ***/
-   CsmPwlFile        : > CSM_PWL,     PAGE = 1
-
-/*** Device Part ID Register Structures ***/
-   PartIdRegsFile    : > PARTID,      PAGE = 1   
-}
-
-
-/*
-//===========================================================================
-// End of file.
-//===========================================================================
-*/
diff --git a/Source/External/v120/DSP2833x_examples/epwm_dma/DSP2833x_EPWMDM_Headers_nonBIOS.cmd b/Source/External/v120/DSP2833x_examples/epwm_dma/DSP2833x_EPWMDM_Headers_nonBIOS.cmd
deleted file mode 100644
index c107ade..0000000
--- a/Source/External/v120/DSP2833x_examples/epwm_dma/DSP2833x_EPWMDM_Headers_nonBIOS.cmd
+++ /dev/null
@@ -1,182 +0,0 @@
-/*
-// TI File $Revision: /main/1 $
-// Checkin $Date: June 19, 2008   10:23:45 $
-//###########################################################################
-//
-// FILE:    DSP2833x_Headers_nonBIOS.cmd
-//
-// TITLE:   DSP2833x Peripheral registers linker command file 
-//
-// DESCRIPTION: 
-// 
-//          This file is for use in Non-BIOS applications.
-//
-//          Linker command file to place the peripheral structures 
-//          used within the DSP2833x headerfiles into the correct memory
-//          mapped locations.
-//
-//          This version of the file includes the PieVectorTable structure.
-//          For BIOS applications, please use the DSP2833x_Headers_BIOS.cmd file
-//          which does not include the PieVectorTable structure.
-//
-//###########################################################################
-*/
-
-MEMORY
-{
- PAGE 0:    /* Program Memory */
-
- PAGE 1:    /* Data Memory */
- 
-   DEV_EMU     : origin = 0x000880, length = 0x000180     /* device emulation registers */
-   FLASH_REGS  : origin = 0x000A80, length = 0x000060     /* FLASH registers */
-   CSM         : origin = 0x000AE0, length = 0x000010     /* code security module registers */
-  
-   ADC_MIRROR  : origin = 0x000B00, length = 0x000010     /* ADC Results register mirror */
-
-   XINTF       : origin = 0x000B20, length = 0x000020     /* external interface registers */
-   
-   CPU_TIMER0  : origin = 0x000C00, length = 0x000008     /* CPU Timer0 registers */
-   CPU_TIMER1  : origin = 0x000C08, length = 0x000008     /* CPU Timer0 registers (CPU Timer1 & Timer2 reserved TI use)*/
-   CPU_TIMER2  : origin = 0x000C10, length = 0x000008     /* CPU Timer0 registers (CPU Timer1 & Timer2 reserved TI use)*/
-
-   PIE_CTRL    : origin = 0x000CE0, length = 0x000020     /* PIE control registers */
-   PIE_VECT    : origin = 0x000D00, length = 0x000100     /* PIE Vector Table */
-
-   DMA         : origin = 0x001000, length = 0x000200     /* DMA registers */
-
-   MCBSPA      : origin = 0x005000, length = 0x000040     /* McBSP-A registers */
-   MCBSPB      : origin = 0x005040, length = 0x000040     /* McBSP-B registers */
-
-   ECANA       : origin = 0x006000, length = 0x000040     /* eCAN-A control and status registers */ 
-   ECANA_LAM   : origin = 0x006040, length = 0x000040     /* eCAN-A local acceptance masks */
-   ECANA_MOTS  : origin = 0x006080, length = 0x000040     /* eCAN-A message object time stamps */
-   ECANA_MOTO  : origin = 0x0060C0, length = 0x000040     /* eCAN-A object time-out registers */
-   ECANA_MBOX  : origin = 0x006100, length = 0x000100     /* eCAN-A mailboxes */
-
-   ECANB       : origin = 0x006200, length = 0x000040     /* eCAN-B control and status registers */ 
-   ECANB_LAM   : origin = 0x006240, length = 0x000040     /* eCAN-B local acceptance masks */
-   ECANB_MOTS  : origin = 0x006280, length = 0x000040     /* eCAN-B message object time stamps */
-   ECANB_MOTO  : origin = 0x0062C0, length = 0x000040     /* eCAN-B object time-out registers */
-   ECANB_MBOX  : origin = 0x006300, length = 0x000100     /* eCAN-B mailboxes */
-
-   EPWM1       : origin = 0x005800, length = 0x000022     /* Enhanced PWM 1 registers */
-   EPWM2       : origin = 0x005840, length = 0x000022     /* Enhanced PWM 2 registers */
-   EPWM3       : origin = 0x005880, length = 0x000022     /* Enhanced PWM 3 registers */
-   EPWM4       : origin = 0x0058C0, length = 0x000022     /* Enhanced PWM 4 registers */
-   EPWM5       : origin = 0x005900, length = 0x000022     /* Enhanced PWM 5 registers */
-   EPWM6       : origin = 0x005940, length = 0x000022     /* Enhanced PWM 6 registers */
-
-   ECAP1       : origin = 0x006A00, length = 0x000020     /* Enhanced Capture 1 registers */
-   ECAP2       : origin = 0x006A20, length = 0x000020     /* Enhanced Capture 2 registers */
-   ECAP3       : origin = 0x006A40, length = 0x000020     /* Enhanced Capture 3 registers */
-   ECAP4       : origin = 0x006A60, length = 0x000020     /* Enhanced Capture 4 registers */         
-   ECAP5       : origin = 0x006A80, length = 0x000020     /* Enhanced Capture 5 registers */         
-   ECAP6       : origin = 0x006AA0, length = 0x000020     /* Enhanced Capture 6 registers */         
- 
-   EQEP1       : origin = 0x006B00, length = 0x000040     /* Enhanced QEP 1 registers */
-   EQEP2       : origin = 0x006B40, length = 0x000040     /* Enhanced QEP 2 registers */   
-
-   GPIOCTRL    : origin = 0x006F80, length = 0x000040     /* GPIO control registers */
-   GPIODAT     : origin = 0x006FC0, length = 0x000020     /* GPIO data registers */
-   GPIOINT     : origin = 0x006FE0, length = 0x000020     /* GPIO interrupt/LPM registers */
-                 
-   SYSTEM      : origin = 0x007010, length = 0x000020     /* System control registers */
-   SPIA        : origin = 0x007040, length = 0x000010     /* SPI-A registers */
-   SCIA        : origin = 0x007050, length = 0x000010     /* SCI-A registers */
-   XINTRUPT    : origin = 0x007070, length = 0x000010     /* external interrupt registers */
-
-   ADC         : origin = 0x007100, length = 0x000020     /* ADC registers */
-
-   SCIB        : origin = 0x007750, length = 0x000010     /* SCI-B registers */
-
-   SCIC        : origin = 0x007770, length = 0x000010     /* SCI-C registers */
-   
-   I2CA        : origin = 0x007900, length = 0x000040     /* I2C-A registers */
-   
-   CSM_PWL     : origin = 0x33FFF8, length = 0x000008     /* Part of FLASHA.  CSM password locations. */
-
-   PARTID      : origin = 0x380090, length = 0x000001     /* Part ID register location */
-
-}
-
- 
-SECTIONS
-{
-   PieVectTableFile : > PIE_VECT,   PAGE = 1
-
-/*** Peripheral Frame 0 Register Structures ***/
-   DevEmuRegsFile    : > DEV_EMU,     PAGE = 1
-   FlashRegsFile     : > FLASH_REGS,  PAGE = 1
-   CsmRegsFile       : > CSM,         PAGE = 1
-   AdcMirrorFile     : > ADC_MIRROR,  PAGE = 1 
-   XintfRegsFile     : > XINTF,       PAGE = 1
-   CpuTimer0RegsFile : > CPU_TIMER0,  PAGE = 1
-   CpuTimer1RegsFile : > CPU_TIMER1,  PAGE = 1
-   CpuTimer2RegsFile : > CPU_TIMER2,  PAGE = 1  
-   PieCtrlRegsFile   : > PIE_CTRL,    PAGE = 1     
-   DmaRegsFile       : > DMA,         PAGE = 1 
-
-/*** Peripheral Frame 3 Register Structures ***/
-   McbspaRegsFile    : > MCBSPA,      PAGE = 1
-   McbspbRegsFile    : > MCBSPB,      PAGE = 1
-
-/*** Peripheral Frame 1 Register Structures ***/
-   ECanaRegsFile     : > ECANA,       PAGE = 1
-   ECanaLAMRegsFile  : > ECANA_LAM    PAGE = 1   
-   ECanaMboxesFile   : > ECANA_MBOX   PAGE = 1
-   ECanaMOTSRegsFile : > ECANA_MOTS   PAGE = 1
-   ECanaMOTORegsFile : > ECANA_MOTO   PAGE = 1
-   
-   ECanbRegsFile     : > ECANB,       PAGE = 1
-   ECanbLAMRegsFile  : > ECANB_LAM    PAGE = 1   
-   ECanbMboxesFile   : > ECANB_MBOX   PAGE = 1
-   ECanbMOTSRegsFile : > ECANB_MOTS   PAGE = 1
-   ECanbMOTORegsFile : > ECANB_MOTO   PAGE = 1
-   
-   EPwm1RegsFile     : > EPWM1        PAGE = 1   
-   EPwm2RegsFile     : > EPWM2        PAGE = 1   
-   EPwm3RegsFile     : > EPWM3        PAGE = 1   
-   EPwm4RegsFile     : > EPWM4        PAGE = 1   
-   EPwm5RegsFile     : > EPWM5        PAGE = 1   
-   EPwm6RegsFile     : > EPWM6        PAGE = 1
-   
-   ECap1RegsFile     : > ECAP1        PAGE = 1   
-   ECap2RegsFile     : > ECAP2        PAGE = 1   
-   ECap3RegsFile     : > ECAP3        PAGE = 1   
-   ECap4RegsFile     : > ECAP4        PAGE = 1
-   ECap5RegsFile     : > ECAP5        PAGE = 1   
-   ECap6RegsFile     : > ECAP6        PAGE = 1
-
-   EQep1RegsFile     : > EQEP1        PAGE = 1   
-   EQep2RegsFile     : > EQEP2        PAGE = 1               
-
-   GpioCtrlRegsFile  : > GPIOCTRL     PAGE = 1
-   GpioDataRegsFile  : > GPIODAT      PAGE = 1
-   GpioIntRegsFile   : > GPIOINT      PAGE = 1
-   
-/*** Peripheral Frame 2 Register Structures ***/
-   SysCtrlRegsFile   : > SYSTEM,      PAGE = 1
-   SpiaRegsFile      : > SPIA,        PAGE = 1
-   SciaRegsFile      : > SCIA,        PAGE = 1
-   XIntruptRegsFile  : > XINTRUPT,    PAGE = 1
-   AdcRegsFile       : > ADC,         PAGE = 1
-   ScibRegsFile      : > SCIB,        PAGE = 1
-   ScicRegsFile      : > SCIC,        PAGE = 1
-   I2caRegsFile      : > I2CA,        PAGE = 1
-              
-/*** Code Security Module Register Structures ***/
-   CsmPwlFile        : > CSM_PWL,     PAGE = 1
-
-/*** Device Part ID Register Structures ***/
-   PartIdRegsFile    : > PARTID,      PAGE = 1   
-}
-
-
-
-
-/*
-//===========================================================================
-// End of file.
-//===========================================================================
-*/
diff --git a/Source/External/v120/DSP2833x_examples/epwm_dma/Example_2833xEPwm_DMA.c b/Source/External/v120/DSP2833x_examples/epwm_dma/Example_2833xEPwm_DMA.c
deleted file mode 100644
index 9645539..0000000
--- a/Source/External/v120/DSP2833x_examples/epwm_dma/Example_2833xEPwm_DMA.c
+++ /dev/null
@@ -1,455 +0,0 @@
-//###########################################################################
-//
-// FILE:   Example_2833xEPwm_DMA.c
-//
-// TITLE:   DSP2833x Device DMA interface with ePWM example.
-//
-// ASSUMPTIONS:
-//
-//    This program requires the DSP2833x header files.
-//
-//    As supplied, this project is configured for "boot to SARAM"
-//    operation.  The 2833x Boot Mode table is shown below.
-//    For information on configuring the boot mode of an eZdsp,
-//    please refer to the documentation included with the eZdsp,
-//
-//       $Boot_Table:
-//
-//         GPIO87   GPIO86     GPIO85   GPIO84
-//          XA15     XA14       XA13     XA12
-//           PU       PU         PU       PU
-//        ==========================================
-//            1        1          1        1    Jump to Flash
-//            1        1          1        0    SCI-A boot
-//            1        1          0        1    SPI-A boot
-//            1        1          0        0    I2C-A boot
-//            1        0          1        1    eCAN-A boot
-//            1        0          1        0    McBSP-A boot
-//            1        0          0        1    Jump to XINTF x16
-//            1        0          0        0    Jump to XINTF x32
-//            0        1          1        1    Jump to OTP
-//            0        1          1        0    Parallel GPIO I/O boot
-//            0        1          0        1    Parallel XINTF boot
-//            0        1          0        0    Jump to SARAM	    <- "boot to SARAM"
-//            0        0          1        1    Branch to check boot mode
-//            0        0          1        0    Boot to flash, bypass ADC cal
-//            0        0          0        1    Boot to SARAM, bypass ADC cal
-//            0        0          0        0    Boot to SCI-A, bypass ADC cal
-//                                              Boot_Table_End$
-//
-// DESCRIPTION:
-//
-// This example demonstrates several cases where the DMA is triggered from
-// SOC signals generated by ePWM modules.
-//
-// DMA CH1 setup:
-//   Trigger  = ADCSOCA from ePWM1
-//   Datasize = 16 bits
-//   Source   = VarA
-//   Dest     = EPwm1Regs.TBPRD
-//   Burst    = One word / burst
-//   Transfer = One burst / transfer
-//   CPU int  = every transfer
-//
-// DMA CH2 setup:
-//   Trigger  = ADCSOCB from ePWM2
-//   Datasize = 32 bits
-//   Source   = VarB
-//   Dest     = EPwm1Regs.CMPA.all
-//   Burst    = One 32-bit word / burst
-//   Transfer = One burst / transfer
-//   CPU int  = none
-//
-// DMA CH3 setup:
-//   Trigger  = ADC SEQ1INT
-//   Datasize = 32 bits
-//   Source   = AdcMirror.ADCRESULT[0-5]
-//   Dest     = ADCbuffer
-//   Burst    = Three 32-bit words / burst
-//   Transfer = One burst / transfer
-//   CPU int  = none
-//
-// Watch Variables:
-//
-//    EPwm1Regs.TBPRD
-//    EPwm1Regs.CMPA.all
-//    ADCbuffer
-//    InterruptCount
-//
-//###########################################################################
-
-#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File
-
-
-// Prototype statements for functions found within this file.
-void delay_loop(void);
-void DMAInitialize(void);
-void DMACH1Config(void);
-void DMACH2Config(void);
-void DMACH3Config(void);
-void ConfigAdc(void);
-void config_ePWM1_to_generate_ADCSOCA(void);
-void config_ePWM2_to_generate_ADCSOCB(void);
-interrupt void local_DINTCH1_ISR(void);
-
-
-// Global Variables
-#pragma DATA_SECTION(ADCbuffer,"DMARAML4");
-volatile Uint32 ADCbuffer[3];
-
-Uint16 VarA;
-Uint32 VarB;
-
-volatile Uint16 *MAPCNF = (Uint16 *)0x00702E;
-
-Uint16 InterruptCount;
-
-void main(void)
-{
-   Uint16 i;
-
-// Step 1. Initialize System Control:
-// PLL, WatchDog, enable Peripheral Clocks
-// This example function is found in the DSP2833x_SysCtrl.c file.
-   InitSysCtrl();
-
-// Step 2. Initalize GPIO:
-// This example function is found in the DSP2833x_Gpio.c file and
-// illustrates how to set the GPIO to it's default state.
-// InitGpio();  // Skipped for this example
-
-// For this example use the following configuration:
-
-// Step 3. Clear all interrupts and initialize PIE vector table:
-// Disable CPU interrupts
-   DINT;
-
-// Initialize PIE control registers to their default state.
-// The default state is all PIE interrupts disabled and flags
-// are cleared.
-// This function is found in the DSP2833x_PieCtrl.c file.
-   InitPieCtrl();
-
-// Disable CPU interrupts and clear all CPU interrupt flags:
-   IER = 0x0000;
-   IFR = 0x0000;
-
-// Initialize the PIE vector table with pointers to the shell Interrupt
-// Service Routines (ISR).
-// This will populate the entire table, even if the interrupt
-// is not used in this example.  This is useful for debug purposes.
-// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
-// This function is found in DSP2833x_PieVect.c.
-   InitPieVectTable();
-
-   EALLOW;
-   // Initialize PIE vector for CPU interrupt:
-   PieVectTable.DINTCH1 = &local_DINTCH1_ISR;		// Point to DMA CH1 ISR
-   PieCtrlRegs.PIEIER7.bit.INTx1 = 1;              // Enable DMA CH1 interrupt in PIE
-   EDIS;
-
-// Step 4. Initialize all the Device Peripherals:
-// This function is found in DSP2833x_InitPeripherals.c
-// InitPeripherals(); // Not required for this example
-
-// Step 5. User specific code:
-
-   InterruptCount = 0;
-
-   EALLOW;
-   GpioCtrlRegs.GPADIR.all = 0xFFFFFFFF;    // All outputs
-   SysCtrlRegs.MAPCNF.bit.MAPEPWM = 1;      // Remap ePWMs for DMA access
-   EDIS;
-
-   GpioDataRegs.GPASET.all = 0xFFFFFFFF;
-   delay_loop();
-   GpioDataRegs.GPACLEAR.all = 0x00000002;
-
-   for(i=0; i<3; i++)
-   {
-      ADCbuffer[i] = ((Uint32)i*0x00011000) + 0x00044000;
-   }
-
-   VarA = 75;
-   VarB = 0x652000;
-
-   // Enable and configure clocks to peripherals:
-   EALLOW;
-   SysCtrlRegs.PCLKCR3.bit.DMAENCLK = 1;  // Enable SYSCLK to DMA
-   EDIS;
-
-   DMAInitialize();
-   DMACH1Config();
-   DMACH2Config();
-   DMACH3Config();
-
-   // Enable all interrupts:
-   IER = M_INT7;							// Enable INT7 (7.1 DMA Ch1)
-   EINT;
-
-   InitAdc();
-   ConfigAdc();
-
-   config_ePWM1_to_generate_ADCSOCA();
-   config_ePWM2_to_generate_ADCSOCB();
-
-
-   EALLOW;
-   DmaRegs.CH1.CONTROL.bit.RUN = 1;
-   DmaRegs.CH2.CONTROL.bit.RUN = 1;
-   DmaRegs.CH3.CONTROL.bit.RUN = 1;
-   asm("   NOP");
-   EPwm1Regs.TBCTL.bit.CTRMODE = 0;						// Up count mode
-   EPwm2Regs.TBCTL.bit.CTRMODE = 0;						// Up count mode
-   EDIS;
-
-   for(;;) {}
-
-}
-
-
-//===========================================================================
-// DMA Functions
-//===========================================================================
-
-void DMAInitialize(void)
-{
-	EALLOW;
-
-	// Perform a hard reset on DMA
-	DmaRegs.DMACTRL.bit.HARDRESET = 1;
-
-	// always perform one NOP after a HARDRESET
-	asm("     NOP");
-
-	// Stop DMA on emulation suspend
-	DmaRegs.DEBUGCTRL.bit.FREE = 0;
-
-	EDIS;
-}
-
-
-void DMACH1Config(void)
-{
-	EALLOW;
-	// Configure CH1:
-	//
-	// Reset selected channel via CONTROL Register:
-//	DmaRegs.CH1.CONTROL.bit.SOFTRESET = 1; 			// Perform SOFT reset on channel (clears all counters)
-
-	// Set up MODE Register:
-	DmaRegs.CH1.MODE.bit.PERINTSEL = 18;			// ePWM1 SOCA as peripheral interrupt source
-	DmaRegs.CH1.MODE.bit.PERINTE = 1;       		// Peripheral interrupt enabled
-	DmaRegs.CH1.MODE.bit.ONESHOT = 0;       		// 1 burst per SW interrupt
-	DmaRegs.CH1.MODE.bit.CONTINUOUS = 1;    		// Do not stop after each transfer
-	DmaRegs.CH1.MODE.bit.SYNCE = 0;         		// No sync signal
-	DmaRegs.CH1.MODE.bit.SYNCSEL = 0;       		// No sync signal
-	DmaRegs.CH1.MODE.bit.DATASIZE = 0;				// 16-bit data size transfers
-	DmaRegs.CH1.MODE.bit.CHINTMODE = 0;				// Generate interrupt to CPU at the beg of transfer
-	DmaRegs.CH1.MODE.bit.CHINTE = 1;        		// Channel Interrupt to CPU enabled
-
-	// Set up BURST registers:
-	DmaRegs.CH1.BURST_SIZE.all = 0;					// Number (N-1) of 16-bit words transferred in a burst
-	DmaRegs.CH1.SRC_BURST_STEP = 0;					// Not needed since BURST_SIZE = 0
-	DmaRegs.CH1.DST_BURST_STEP = 0;					// Not needed since BURST_SIZE = 0
-
-	// Set up TRANSFER registers:
-	DmaRegs.CH1.TRANSFER_SIZE = 0;					// Bursts (N-1) per transfer
-	DmaRegs.CH1.SRC_TRANSFER_STEP = 0;				// Not needed since TRANSFER_SIZE = 0
-	DmaRegs.CH1.DST_TRANSFER_STEP = 0;   			// Not needed since TRANSFER_SIZE = 0
-
-	// Set up WRAP registers:
-	DmaRegs.CH1.SRC_WRAP_SIZE = 0xFFFF;				// No source wrap-around
-	DmaRegs.CH1.DST_WRAP_SIZE = 0xFFFF;				// No destination wrap-around
-	DmaRegs.CH1.SRC_WRAP_STEP = 0;
-	DmaRegs.CH1.DST_WRAP_STEP = 0;
-
-	// Set up SOURCE address:
-	DmaRegs.CH1.SRC_ADDR_SHADOW = (Uint32) &VarA;	// Point to variable in RAM
-
-	// Set up DESTINATION address:
-	DmaRegs.CH1.DST_ADDR_SHADOW = (Uint32) &EPwm1Regs.TBPRD;	// Point to ePWM1 TBPRD register remapped for DMA
-																//   need to make sure .cmd file has ePWMs remapped
-	// Clear any spurious flags:
-	DmaRegs.CH1.CONTROL.bit.PERINTCLR = 1;  		// Clear any spurious interrupt flags
-	DmaRegs.CH1.CONTROL.bit.SYNCCLR = 1;    		// Clear any spurious sync flags
-	DmaRegs.CH1.CONTROL.bit.ERRCLR = 1; 			// Clear any spurious sync error flags
-
-	EDIS;
-}
-
-void DMACH2Config(void)
-{
-	EALLOW;
-	// Configure CH2:
-	//
-	// Reset selected channel via CONTROL Register:
-//	DmaRegs.CH2.CONTROL.bit.SOFTRESET = 1; 			// Perform SOFT reset on channel (clears all counters)
-
-	// Set up MODE Register:
-	DmaRegs.CH2.MODE.bit.PERINTSEL = 21;			// ePWM2 SOCB as peripheral interrupt source
-	DmaRegs.CH2.MODE.bit.PERINTE = 1;       		// Peripheral interrupt enabled
-	DmaRegs.CH2.MODE.bit.ONESHOT = 0;       		// 1 burst per SW interrupt
-	DmaRegs.CH2.MODE.bit.CONTINUOUS = 1;    		// Do not stop after each transfer
-	DmaRegs.CH2.MODE.bit.SYNCE = 0;         		// No sync signal
-	DmaRegs.CH2.MODE.bit.SYNCSEL = 0;       		// No sync signal
-	DmaRegs.CH2.MODE.bit.DATASIZE = 1;				// 32-bit data size transfers
-	DmaRegs.CH2.MODE.bit.CHINTMODE = 0;
-	DmaRegs.CH2.MODE.bit.CHINTE = 0;        		// Channel Interrupt to CPU disabled
-
-	// Set up BURST registers:
-	DmaRegs.CH2.BURST_SIZE.all = 1;					// Number (N-1) of 16-bit words transferred in a burst
-	DmaRegs.CH2.SRC_BURST_STEP = 0x0000;			// Not needed since only 1 32-bit move per burst
-	DmaRegs.CH2.DST_BURST_STEP = 0x0000;			// Not needed since only 1 32-bit move per burst
-
-	// Set up TRANSFER registers:
-	DmaRegs.CH2.TRANSFER_SIZE = 0;					// Bursts (N-1) per transfer
-	DmaRegs.CH2.SRC_TRANSFER_STEP = 0;				// Not needed since TRANSFER_SIZE = 0
-	DmaRegs.CH2.DST_TRANSFER_STEP = 0; 				// Not needed since TRANSFER_SIZE = 0
-
-	// Set up WRAP registers:
-	DmaRegs.CH2.SRC_WRAP_SIZE = 0xFFFF;				// No source wrap-around
-	DmaRegs.CH2.DST_WRAP_SIZE = 0xFFFF;				// No destination wrap-around
-	DmaRegs.CH2.SRC_WRAP_STEP = 0;
-	DmaRegs.CH2.DST_WRAP_STEP = 0;
-
-	// Set up SOURCE address:
-	DmaRegs.CH2.SRC_ADDR_SHADOW = (Uint32) &VarB;	// Point to variable in RAM
-
-	// Set up DESTINATION address:
-	DmaRegs.CH2.DST_ADDR_SHADOW = (Uint32) &EPwm1Regs.CMPA.all;	// Point to ePWM1 CMPAHR/CMPA registers
-
-	// Clear any spurious flags:
-	DmaRegs.CH2.CONTROL.bit.PERINTCLR = 1;  		// Clear any spurious interrupt flags
-	DmaRegs.CH2.CONTROL.bit.SYNCCLR = 1;    		// Clear any spurious sync flags
-	DmaRegs.CH2.CONTROL.bit.ERRCLR = 1; 			// Clear any spurious sync error flags
-
-	EDIS;
-}
-
-void DMACH3Config(void)
-{
-	EALLOW;
-	// Configure CH3:
-	//
-
-	// Set up MODE Register:
-	DmaRegs.CH3.MODE.bit.PERINTSEL = 1;				// ADC SEQ1INT as peripheral interrupt source
-	DmaRegs.CH3.MODE.bit.PERINTE = 1;       		// Peripheral interrupt enabled
-	DmaRegs.CH3.MODE.bit.ONESHOT = 0;       		// 1 burst per SW interrupt
-	DmaRegs.CH3.MODE.bit.CONTINUOUS = 1;    		// Do not stop after each transfer
-	DmaRegs.CH3.MODE.bit.SYNCE = 0;         		// No sync signal
-	DmaRegs.CH3.MODE.bit.SYNCSEL = 0;       		// No sync signal
-	DmaRegs.CH3.MODE.bit.DATASIZE = 1;				// 32-bit data size transfers
-	DmaRegs.CH3.MODE.bit.CHINTMODE = 0;
-	DmaRegs.CH3.MODE.bit.CHINTE = 0;        		// Channel Interrupt to CPU disabled
-
-	// Set up BURST registers:
-	DmaRegs.CH3.BURST_SIZE.all = 5;					// Number (N-1) of 16-bit words transferred in a burst
-	DmaRegs.CH3.SRC_BURST_STEP = 2;					// Increment source burst address by 2 (32-bit)
-	DmaRegs.CH3.DST_BURST_STEP = 2;					// Increment destination burst address by 2 (32-bit)
-
-	// Set up TRANSFER registers:
-	DmaRegs.CH3.TRANSFER_SIZE = 0;					// Bursts (N-1) per transfer
-	DmaRegs.CH3.SRC_TRANSFER_STEP = 0;				// Not needed since TRANSFER_SIZE = 0
-	DmaRegs.CH3.DST_TRANSFER_STEP = 0; 				// Not needed since TRANSFER_SIZE = 0
-
-	// Set up WRAP registers:
-	DmaRegs.CH3.SRC_WRAP_SIZE = 0xFFFF;				// No source wrap-around
-	DmaRegs.CH3.DST_WRAP_SIZE = 0xFFFF;				// No destination wrap-around
-	DmaRegs.CH3.SRC_WRAP_STEP = 0;
-	DmaRegs.CH3.DST_WRAP_STEP = 0;
-
-	// Set up SOURCE address:
-	DmaRegs.CH3.SRC_ADDR_SHADOW = (Uint32) &AdcMirror.ADCRESULT0;		// Point to first RESULT reg
-
-	// Set up DESTINATION address:
-	DmaRegs.CH3.DST_ADDR_SHADOW = (Uint32) &ADCbuffer[0];	// Point to beginning of ADCbuffer
-
-	// Clear any spurious flags:
-	DmaRegs.CH3.CONTROL.bit.PERINTCLR = 1;  		// Clear any spurious interrupt flags
-	DmaRegs.CH3.CONTROL.bit.SYNCCLR = 1;    		// Clear any spurious sync flags
-	DmaRegs.CH3.CONTROL.bit.ERRCLR = 1; 			// Clear any spurious sync error flags
-
-	EDIS;
-}
-
-
-
-interrupt void local_DINTCH1_ISR(void)	// DMA INT7.1
-{
-   GpioDataRegs.GPATOGGLE.all = 0x00000001;		// Toggle GPIOA0
-
-   InterruptCount++;
-
-
-   if((DmaRegs.CH1.CONTROL.bit.OVRFLG == 1) || (DmaRegs.CH2.CONTROL.bit.OVRFLG == 1) ||
-      (DmaRegs.CH3.CONTROL.bit.OVRFLG == 1))
-   {
-      asm("     ESTOP0");
-   }
-
-   PieCtrlRegs.PIEACK.bit.ACK7 = 1;				// Clear PIEIFR bit
-}
-
-
-void ConfigAdc(void)
-{
-   AdcRegs.ADCMAXCONV.bit.MAX_CONV1 = 7;
-   AdcRegs.ADCCHSELSEQ1.bit.CONV00 = 0;			// ADCINA0
-   AdcRegs.ADCCHSELSEQ1.bit.CONV01 = 1;			// ADCINA1
-   AdcRegs.ADCCHSELSEQ1.bit.CONV02 = 2;			// ADCINA2
-   AdcRegs.ADCCHSELSEQ1.bit.CONV03 = 3;			// ADCINA3
-   AdcRegs.ADCCHSELSEQ2.bit.CONV04 = 4;			// ADCINA4
-   AdcRegs.ADCCHSELSEQ2.bit.CONV05 = 5;			// ADCINA5
-   AdcRegs.ADCTRL2.bit.EPWM_SOCA_SEQ1 = 1;		// Enable ADC to accept ePWM_SOCA trigger
-   AdcRegs.ADCTRL1.bit.SEQ_CASC = 1;
-   AdcRegs.ADCTRL2.bit.RST_SEQ1 = 1;
-   AdcRegs.ADCST.bit.INT_SEQ1_CLR = 1;			// Clear interrupt flag
-   AdcRegs.ADCTRL2.bit.INT_ENA_SEQ1 = 1;		// Enable SEQ1 interrupt
-}
-
-
-void config_ePWM1_to_generate_ADCSOCA(void)
-{
-	// Configure ePWM1 Timer
-	// Interrupt triggers ADCSOCA
-
-	EALLOW;
-	EPwm1Regs.TBPRD = 74;						// Setup period (one off so DMA transfer will be obvious)
-	EPwm1Regs.CMPA.all = 0x501000;
-	EPwm1Regs.ETSEL.bit.SOCASEL = 2;			// ADCSOCA on TBCTR=TBPRD
-	EPwm1Regs.ETPS.bit.SOCAPRD = 1;				// Generate SOCA on 1st event
-	EPwm1Regs.ETSEL.bit.SOCAEN = 1;				// Enable SOCA generation
-	EPwm1Regs.TBCTL.bit.HSPCLKDIV = 0;			// /1 clock mode
-	EDIS;
-}
-
-
-void config_ePWM2_to_generate_ADCSOCB(void)
-{
-	// Configure ePWM2 Timer
-	// Interrupt triggers ADCSOCB
-
-	EALLOW;
-	EPwm2Regs.TBPRD = 150;						// Setup periodSetup period
-	EPwm2Regs.CMPA.all = 0x200000;
-	EPwm2Regs.ETSEL.bit.SOCBSEL = 2;			// ADCSOCB on TBCTR=TBPRD
-	EPwm2Regs.ETPS.bit.SOCBPRD = 1;				// Generate SOCB on 1st event
-	EPwm2Regs.ETSEL.bit.SOCBEN = 1;				// Enable SOCB generation
-	EPwm2Regs.TBCTL.bit.HSPCLKDIV = 0;			// /1 clock mode
-	EDIS;
-}
-
-
-void delay_loop()
-{
-    short      i;
-    for (i = 0; i < 1000; i++) {}
-}
-
-
-//===========================================================================
-// No more.
-//===========================================================================
-
diff --git a/Source/External/v120/DSP2833x_examples/epwm_dma/Example_2833xEPwm_DMA.gel b/Source/External/v120/DSP2833x_examples/epwm_dma/Example_2833xEPwm_DMA.gel
deleted file mode 100644
index f5ab59c..0000000
--- a/Source/External/v120/DSP2833x_examples/epwm_dma/Example_2833xEPwm_DMA.gel
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
-// TI File $Revision: /main/1 $
-// Checkin $Date: June 19, 2008   10:25:20 $
-//###########################################################################
-//
-// This .gel file can be used to help load and build the example project.
-// It should be unloaded from Code Composer Studio before loading another 
-// project. 
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-*/
-
-menuitem "DSP2833x ePWM DMA"
-
-hotmenu Load_and_Build_Project()
-{
-   GEL_ProjectLoad("Example_2833xEPwm_DMA.pjt");
-   GEL_ProjectBuild("Example_2833xEPwm_DMA.pjt");
-   Setup_WatchWindow();
-}
-
-hotmenu Load_Code()
-{
-   GEL_Load(".\\debug\\Example_2833xEPwm_DMA.out");
-   Setup_WatchWindow();
-}
-
-hotmenu Setup_WatchWindow()
-{
-   GEL_WatchReset();
-   GEL_WatchAdd("EPwm1Regs.TBPRD,x");
-   GEL_WatchAdd("EPwm1Regs.CMPA.all,x");
-   GEL_WatchAdd("ADCbuffer,x");
-   GEL_WatchAdd("InterruptCount,x");   
-   GEL_WatchAdd("EPwm1Regs,x");
-}
-
-
-
-
diff --git a/Source/External/v120/DSP2833x_examples/epwm_dma/Example_2833xEPwm_DMA.pjt b/Source/External/v120/DSP2833x_examples/epwm_dma/Example_2833xEPwm_DMA.pjt
deleted file mode 100644
index 69ca432..0000000
--- a/Source/External/v120/DSP2833x_examples/epwm_dma/Example_2833xEPwm_DMA.pjt
+++ /dev/null
@@ -1,46 +0,0 @@
-; Code Composer Project File, Version 2.0 (do not modify or remove this line)
-
-[Project Settings]
-ProjectName="DSP2833x"
-ProjectDir="C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\epwm_dma\"
-ProjectType=Executable
-CPUFamily=TMS320C28XX
-Tool="Compiler"
-Tool="CustomBuilder"
-Tool="DspBiosBuilder"
-Tool="Linker"
-Config="Debug"
-Config="Release"
-
-[Source Files]
-Source="..\..\DSP2833x_common\source\DSP2833x_Adc.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_ADC_cal.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CodeStartBranch.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_DefaultIsr.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieVect.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_SysCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_usDelay.asm"
-Source="..\..\DSP2833x_headers\source\DSP2833x_GlobalVariableDefs.c"
-Source="Example_2833xEPwm_DMA.c"
-Source="..\..\DSP2833x_common\cmd\28335_RAM_lnk.cmd"
-Source="DSP2833x_EPWMDM_Headers_nonBIOS.cmd"
-
-["Compiler" Settings: "Debug"]
-Options=-g -q -pdr -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\epwm_dma\Debug" -fs"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\epwm_dma\Debug" -i"..\..\DSP2833x_headers\include" -i"..\..\DSP2833x_common\include" -d"_DEBUG" -d"LARGE_MODEL" -ml -mt -v28 --float_support=fpu32
-
-["Compiler" Settings: "Release"]
-Options=-q -o3 -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\epwm_dma\Release" -d"LARGE_MODEL" -ml -v28
-
-["DspBiosBuilder" Settings: "Debug"]
-Options=-v28
-
-["DspBiosBuilder" Settings: "Release"]
-Options=-v28
-
-["Linker" Settings: "Debug"]
-Options=-q -c -ecode_start -m".\Debug\Example_2833xEPwm_DMA.map" -o".\Debug\Example_2833xEPwm_DMA.out" -stack0x380 -w -x -i"..\..\DSP2833x_headers\include" -l"rts2800_fpu32.lib"
-
-["Linker" Settings: "Release"]
-Options=-q -c -m".\Release\Example_2833xEPwm_DMA.map" -o".\Release\Example_2833xEPwm_DMA.out" -x
-
diff --git a/Source/External/v120/DSP2833x_examples/epwm_timer_interrupts/Example_2833xEPwmTimerInt.c b/Source/External/v120/DSP2833x_examples/epwm_timer_interrupts/Example_2833xEPwmTimerInt.c
deleted file mode 100644
index 58927b6..0000000
--- a/Source/External/v120/DSP2833x_examples/epwm_timer_interrupts/Example_2833xEPwmTimerInt.c
+++ /dev/null
@@ -1,360 +0,0 @@
-// TI File $Revision: /main/9 $
-// Checkin $Date: April 21, 2008   15:41:38 $
-//###########################################################################
-//
-// FILE:    Example_2833xEPwmTimerInt.c
-//
-// TITLE:   DSP2833x ePWM Timer Interrupt example.
-//
-// ASSUMPTIONS:
-//
-//    This program requires the DSP2833x header files.
-//
-//    Other then boot mode configuration, no other hardware configuration
-//    is required.
-//
-//    As supplied, this project is configured for "boot to SARAM"
-//    operation.  The 2833x Boot Mode table is shown below.
-//    For information on configuring the boot mode of an eZdsp,
-//    please refer to the documentation included with the eZdsp,
-//
-//       $Boot_Table:
-//
-//         GPIO87   GPIO86     GPIO85   GPIO84
-//          XA15     XA14       XA13     XA12
-//           PU       PU         PU       PU
-//        ==========================================
-//            1        1          1        1    Jump to Flash
-//            1        1          1        0    SCI-A boot
-//            1        1          0        1    SPI-A boot
-//            1        1          0        0    I2C-A boot
-//            1        0          1        1    eCAN-A boot
-//            1        0          1        0    McBSP-A boot
-//            1        0          0        1    Jump to XINTF x16
-//            1        0          0        0    Jump to XINTF x32
-//            0        1          1        1    Jump to OTP
-//            0        1          1        0    Parallel GPIO I/O boot
-//            0        1          0        1    Parallel XINTF boot
-//            0        1          0        0    Jump to SARAM	    <- "boot to SARAM"
-//            0        0          1        1    Branch to check boot mode
-//            0        0          1        0    Boot to flash, bypass ADC cal
-//            0        0          0        1    Boot to SARAM, bypass ADC cal
-//            0        0          0        0    Boot to SCI-A, bypass ADC cal
-//                                              Boot_Table_End$
-//
-// DESCRIPTION:
-//
-//    This example configures the ePWM Timers and increments
-//    a counter each time an interrupt is taken.
-//
-//    As supplied:
-//
-//    All ePWM's are initalized.  Note that not all devices in the 2833x
-//    family have all 6 ePWMs.
-//
-//    All timers have the same period
-//    The timers are started sync'ed
-//    An interrupt is taken on a zero event for each ePWM timer
-//
-//       ePWM1: takes an interrupt every event
-//       ePWM2: takes an interrupt every 2nd event
-//       ePWM3: takes an interrupt every 3rd event
-//       ePWM4-ePWM6: take an interrupt every event
-//
-//    Thus the Interrupt count for ePWM1, ePWM4-ePWM6 should be equal
-//    The interrupt count for ePWM2 should be about half that of ePWM1
-//    and the interrupt count for ePWM3 should be about 1/3 that of ePWM1
-//
-//    Watch Variables:
-//       EPwm1TimerIntCount
-//       EPwm2TimerIntCount
-//       EPwm3TimerIntCount
-//       EPwm4TimerIntCount
-//       EPwm5TimerIntCount
-//       EPwm6TimerIntCount
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-
-#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File
-
-// Configure which ePWM timer interrupts are enabled at the PIE level:
-// 1 = enabled,  0 = disabled
-#define PWM1_INT_ENABLE  1
-#define PWM2_INT_ENABLE  1
-#define PWM3_INT_ENABLE  1
-#define PWM4_INT_ENABLE  1
-#define PWM5_INT_ENABLE  1
-#define PWM6_INT_ENABLE  1
-
-// Configure the period for each timer
-#define PWM1_TIMER_TBPRD   0x1FFF
-#define PWM2_TIMER_TBPRD   0x1FFF
-#define PWM3_TIMER_TBPRD   0x1FFF
-#define PWM4_TIMER_TBPRD   0x1FFF
-#define PWM5_TIMER_TBPRD   0x1FFF
-#define PWM6_TIMER_TBPRD   0x1FFF
-
-
-// Prototype statements for functions found within this file.
-interrupt void epwm1_timer_isr(void);
-interrupt void epwm2_timer_isr(void);
-interrupt void epwm3_timer_isr(void);
-interrupt void epwm4_timer_isr(void);
-interrupt void epwm5_timer_isr(void);
-interrupt void epwm6_timer_isr(void);
-void InitEPwmTimer(void);
-
-// Global variables used in this example
-Uint32  EPwm1TimerIntCount;
-Uint32  EPwm2TimerIntCount;
-Uint32  EPwm3TimerIntCount;
-Uint32  EPwm4TimerIntCount;
-Uint32  EPwm5TimerIntCount;
-Uint32  EPwm6TimerIntCount;
-
-
-void main(void)
-{
-   int i;
-
-// Step 1. Initialize System Control:
-// PLL, WatchDog, enable Peripheral Clocks
-// This example function is found in the DSP2833x_SysCtrl.c file.
-   InitSysCtrl();
-
-// Step 2. Initalize GPIO:
-// This example function is found in the DSP2833x_Gpio.c file and
-// illustrates how to set the GPIO to it's default state.
-// InitGpio();  // Skipped for this example
-
-
-// Step 3. Clear all interrupts and initialize PIE vector table:
-// Disable CPU interrupts
-   DINT;
-
-// Initialize the PIE control registers to their default state.
-// The default state is all PIE interrupts disabled and flags
-// are cleared.
-// This function is found in the DSP2833x_PieCtrl.c file.
-   InitPieCtrl();
-
-// Disable CPU interrupts and clear all CPU interrupt flags:
-   IER = 0x0000;
-   IFR = 0x0000;
-
-// Initialize the PIE vector table with pointers to the shell Interrupt
-// Service Routines (ISR).
-// This will populate the entire table, even if the interrupt
-// is not used in this example.  This is useful for debug purposes.
-// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
-// This function is found in DSP2833x_PieVect.c.
-   InitPieVectTable();
-
-// Interrupts that are used in this example are re-mapped to
-// ISR functions found within this file.
-   EALLOW;  // This is needed to write to EALLOW protected registers
-   PieVectTable.EPWM1_INT = &epwm1_timer_isr;
-   PieVectTable.EPWM2_INT = &epwm2_timer_isr;
-   PieVectTable.EPWM3_INT = &epwm3_timer_isr;
-   PieVectTable.EPWM4_INT = &epwm4_timer_isr;
-   PieVectTable.EPWM5_INT = &epwm5_timer_isr;
-   PieVectTable.EPWM6_INT = &epwm6_timer_isr;
-   EDIS;    // This is needed to disable write to EALLOW protected registers
-
-// Step 4. Initialize all the Device Peripherals:
-// This function is found in DSP2833x_InitPeripherals.c
-// InitPeripherals();  // Not required for this example
-   InitEPwmTimer();    // For this example, only initialize the ePWM Timers
-
-// Step 5. User specific code, enable interrupts:
-
-// Initalize counters:
-   EPwm1TimerIntCount = 0;
-   EPwm2TimerIntCount = 0;
-   EPwm3TimerIntCount = 0;
-   EPwm4TimerIntCount = 0;
-   EPwm5TimerIntCount = 0;
-   EPwm6TimerIntCount = 0;
-
-// Enable CPU INT3 which is connected to EPWM1-6 INT:
-   IER |= M_INT3;
-
-// Enable EPWM INTn in the PIE: Group 3 interrupt 1-6
-   PieCtrlRegs.PIEIER3.bit.INTx1 = PWM1_INT_ENABLE;
-   PieCtrlRegs.PIEIER3.bit.INTx2 = PWM2_INT_ENABLE;
-   PieCtrlRegs.PIEIER3.bit.INTx3 = PWM3_INT_ENABLE;
-   PieCtrlRegs.PIEIER3.bit.INTx4 = PWM4_INT_ENABLE;
-   PieCtrlRegs.PIEIER3.bit.INTx5 = PWM5_INT_ENABLE;
-   PieCtrlRegs.PIEIER3.bit.INTx6 = PWM6_INT_ENABLE;
-
-// Enable global Interrupts and higher priority real-time debug events:
-   EINT;   // Enable Global interrupt INTM
-   ERTM;   // Enable Global realtime interrupt DBGM
-
-// Step 6. IDLE loop. Just sit and loop forever (optional):
-   for(;;)
-   {
-       asm("          NOP");
-       for(i=1;i<=10;i++)
-       {}
-   }
-
-}
-
-
-void InitEPwmTimer()
-{
-
-   EALLOW;
-   SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0;      // Stop all the TB clocks
-   EDIS;
-
-   // Setup Sync
-   EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN;  // Pass through
-   EPwm2Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN;  // Pass through
-   EPwm3Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN;  // Pass through
-   EPwm4Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN;  // Pass through
-   EPwm5Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN;  // Pass through
-   EPwm6Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN;  // Pass through
-
-   // Allow each timer to be sync'ed
-
-   EPwm1Regs.TBCTL.bit.PHSEN = TB_ENABLE;
-   EPwm2Regs.TBCTL.bit.PHSEN = TB_ENABLE;
-   EPwm3Regs.TBCTL.bit.PHSEN = TB_ENABLE;
-   EPwm4Regs.TBCTL.bit.PHSEN = TB_ENABLE;
-   EPwm5Regs.TBCTL.bit.PHSEN = TB_ENABLE;
-   EPwm6Regs.TBCTL.bit.PHSEN = TB_ENABLE;
-
-   EPwm1Regs.TBPHS.half.TBPHS = 100;
-   EPwm2Regs.TBPHS.half.TBPHS = 200;
-   EPwm3Regs.TBPHS.half.TBPHS = 300;
-   EPwm4Regs.TBPHS.half.TBPHS = 400;
-   EPwm5Regs.TBPHS.half.TBPHS = 500;
-   EPwm6Regs.TBPHS.half.TBPHS = 600;
-
-   EPwm1Regs.TBPRD = PWM1_TIMER_TBPRD;
-   EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP;    // Count up
-   EPwm1Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO;     // Select INT on Zero event
-   EPwm1Regs.ETSEL.bit.INTEN = PWM1_INT_ENABLE;  // Enable INT
-   EPwm1Regs.ETPS.bit.INTPRD = ET_1ST;           // Generate INT on 1st event
-
-
-   EPwm2Regs.TBPRD = PWM2_TIMER_TBPRD;
-   EPwm2Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP;     // Count up
-   EPwm2Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO;      // Enable INT on Zero event
-   EPwm2Regs.ETSEL.bit.INTEN = PWM2_INT_ENABLE;   // Enable INT
-   EPwm2Regs.ETPS.bit.INTPRD = ET_2ND;            // Generate INT on 2nd event
-
-
-   EPwm3Regs.TBPRD = PWM3_TIMER_TBPRD;
-   EPwm3Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP;     // Count up
-   EPwm3Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO;      // Enable INT on Zero event
-   EPwm3Regs.ETSEL.bit.INTEN = PWM3_INT_ENABLE;   // Enable INT
-   EPwm3Regs.ETPS.bit.INTPRD = ET_3RD;            // Generate INT on 3rd event
-
-   EPwm4Regs.TBPRD = PWM4_TIMER_TBPRD;
-   EPwm4Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP;     // Count up
-   EPwm4Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO;      // Enable INT on Zero event
-   EPwm4Regs.ETSEL.bit.INTEN = PWM4_INT_ENABLE;   // Enable INT
-   EPwm4Regs.ETPS.bit.INTPRD = ET_1ST;            // Generate INT on 1st event
-
-
-   EPwm5Regs.TBPRD = PWM5_TIMER_TBPRD;
-   EPwm5Regs.TBCTL.bit.CTRMODE= TB_COUNT_UP;      // Count up
-   EPwm5Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO;      // Enable INT on Zero event
-   EPwm5Regs.ETSEL.bit.INTEN = PWM5_INT_ENABLE;   // Enable INT
-   EPwm5Regs.ETPS.bit.INTPRD = ET_1ST;            // Generate INT on 1st event
-
-
-   EPwm6Regs.TBPRD = PWM6_TIMER_TBPRD;
-   EPwm6Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP;     // Count up
-   EPwm6Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO;      // Enable INT on Zero event
-   EPwm6Regs.ETSEL.bit.INTEN = PWM6_INT_ENABLE;   // Enable INT
-   EPwm6Regs.ETPS.bit.INTPRD = ET_1ST;            // Generate INT on 1st event
-
-   EALLOW;
-   SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1;         // Start all the timers synced
-   EDIS;
-
-
-}
-
-
-// Interrupt routines uses in this example:
-interrupt void epwm1_timer_isr(void)
-{
-   EPwm1TimerIntCount++;
-
-   // Clear INT flag for this timer
-   EPwm1Regs.ETCLR.bit.INT = 1;
-
-   // Acknowledge this interrupt to receive more interrupts from group 3
-   PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
-}
-
-interrupt void epwm2_timer_isr(void)
-{
-   EPwm2TimerIntCount++;
-
-   // Clear INT flag for this timer
-   EPwm2Regs.ETCLR.bit.INT = 1;
-
-   // Acknowledge this interrupt to receive more interrupts from group 3
-   PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
-}
-
-interrupt void epwm3_timer_isr(void)
-{
-   EPwm3TimerIntCount++;
-
-   // Clear INT flag for this timer
-   EPwm3Regs.ETCLR.bit.INT = 1;
-
-   // Acknowledge this interrupt to receive more interrupts from group 3
-   PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
-}
-
-interrupt void epwm4_timer_isr(void)
-{
-   EPwm4TimerIntCount++;
-
-   // Clear INT flag for this timer
-   EPwm4Regs.ETCLR.bit.INT = 1;
-
-   // Acknowledge this interrupt to receive more interrupts from group 3
-   PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
-}
-
-interrupt void epwm5_timer_isr(void)
-{
-   EPwm5TimerIntCount++;
-
-   // Clear INT flag for this timer
-   EPwm5Regs.ETCLR.bit.INT = 1;
-
-   // Acknowledge this interrupt to receive more interrupts from group 3
-   PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
-}
-
-interrupt void epwm6_timer_isr(void)
-{
-   EPwm6TimerIntCount++;
-
-   // Clear INT flag for this timer
-   EPwm6Regs.ETCLR.bit.INT = 1;
-
-   // Acknowledge this interrupt to receive more interrupts from group 3
-   PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
-}
-
-
-
-
-//===========================================================================
-// No more.
-//===========================================================================
diff --git a/Source/External/v120/DSP2833x_examples/epwm_timer_interrupts/Example_2833xEPwmTimerInt.gel b/Source/External/v120/DSP2833x_examples/epwm_timer_interrupts/Example_2833xEPwmTimerInt.gel
deleted file mode 100644
index 43d8f17..0000000
--- a/Source/External/v120/DSP2833x_examples/epwm_timer_interrupts/Example_2833xEPwmTimerInt.gel
+++ /dev/null
@@ -1,47 +0,0 @@
-/*
-// TI File $Revision: /main/5 $
-// Checkin $Date: August 9, 2007   17:13:37 $
-//###########################################################################
-//
-// This .gel file can be used to help load and build the example project.
-// It should be unloaded from Code Composer Studio before loading another 
-// project. 
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-*/
-
-menuitem "DSP2833x ePWM Interrupt Example"
-
-hotmenu Load_and_Build_Project()
-{
-   GEL_ProjectLoad("Example_2833xEPwmTimerInt.pjt");
-   GEL_ProjectBuild("Example_2833xEPwmTimerInt.pjt");
-   Setup_WatchWindow();
-}
-
-hotmenu Load_Code()
-{
-   GEL_Load(".\\debug\\Example_2833xEPwmTimerInt.out");
-   Setup_WatchWindow();
-}
-
-
-hotmenu Setup_WatchWindow()
-{
-   GEL_WatchReset();
-   GEL_WatchAdd("EPwm1TimerIntCount",,"PWM1 ISR Count");
-   GEL_WatchAdd("EPwm2TimerIntCount",,"PWM2 ISR Count");
-   GEL_WatchAdd("EPwm3TimerIntCount",,"PWM3 ISR Count");
-   GEL_WatchAdd("EPwm4TimerIntCount",,"PWM4 ISR Count");
-   GEL_WatchAdd("EPwm5TimerIntCount",,"PWM5 ISR Count");
-   GEL_WatchAdd("EPwm6TimerIntCount",,"PWM6 ISR Count");
-   GEL_WatchAdd("EPwm1Regs,x");
-   GEL_WatchAdd("EPwm2Regs,x");
-   GEL_WatchAdd("EPwm3Regs,x");
-   GEL_WatchAdd("EPwm4Regs,x");
-   GEL_WatchAdd("EPwm5Regs,x");
-   GEL_WatchAdd("EPwm6Regs,x");
-}
diff --git a/Source/External/v120/DSP2833x_examples/epwm_timer_interrupts/Example_2833xEPwmTimerInt.pjt b/Source/External/v120/DSP2833x_examples/epwm_timer_interrupts/Example_2833xEPwmTimerInt.pjt
deleted file mode 100644
index 6e0819d..0000000
--- a/Source/External/v120/DSP2833x_examples/epwm_timer_interrupts/Example_2833xEPwmTimerInt.pjt
+++ /dev/null
@@ -1,45 +0,0 @@
-; Code Composer Project File, Version 2.0 (do not modify or remove this line)
-
-[Project Settings]
-ProjectName="DSP2833x"
-ProjectDir="C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\epwm_timer_interrupts\"
-ProjectType=Executable
-CPUFamily=TMS320C28XX
-Tool="Compiler"
-Tool="DspBiosBuilder"
-Tool="Linker"
-Config="Debug"
-Config="Release"
-
-[Source Files]
-Source="..\..\DSP2833x_common\source\DSP2833x_ADC_cal.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CodeStartBranch.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CpuTimers.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_DefaultIsr.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieVect.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_SysCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_usDelay.asm"
-Source="..\..\DSP2833x_headers\source\DSP2833x_GlobalVariableDefs.c"
-Source="Example_2833xEPwmTimerInt.c"
-Source="..\..\DSP2833x_common\cmd\28335_RAM_lnk.cmd"
-Source="..\..\DSP2833x_headers\cmd\DSP2833x_Headers_nonBIOS.cmd"
-
-["Compiler" Settings: "Debug"]
-Options=-g -q -pdr -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\epwm_timer_interrupts\Debug" -fs"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\epwm_timer_interrupts\Debug" -i"..\..\DSP2833x_headers\include" -i"..\..\DSP2833x_common\include" -d"_DEBUG" -d"LARGE_MODEL" --float_support=fpu32 -ml -mt -v28
-
-["Compiler" Settings: "Release"]
-Options=-q -o3 -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\epwm_timer_interrupts\Release" -d"LARGE_MODEL" -ml -v28
-
-["DspBiosBuilder" Settings: "Debug"]
-Options=-v28
-
-["DspBiosBuilder" Settings: "Release"]
-Options=-v28
-
-["Linker" Settings: "Debug"]
-Options=-q -c -ecode_start -m".\Debug\Example_2833xEPwmTimerInt.map" -o".\Debug\Example_2833xEPwmTimerInt.out" -stack0x380 -w -x -i"..\..\DSP2833x_headers\include" -l"rts2800_fpu32.lib"
-
-["Linker" Settings: "Release"]
-Options=-q -c -o".\Release\Example_2833xCpuTimer.out" -x
-
diff --git a/Source/External/v120/DSP2833x_examples/epwm_trip_zone/Example_2833xEPwmTripZone.c b/Source/External/v120/DSP2833x_examples/epwm_trip_zone/Example_2833xEPwmTripZone.c
deleted file mode 100644
index 1415e49..0000000
--- a/Source/External/v120/DSP2833x_examples/epwm_trip_zone/Example_2833xEPwmTripZone.c
+++ /dev/null
@@ -1,305 +0,0 @@
-// TI File $Revision: /main/8 $
-// Checkin $Date: April 21, 2008   15:41:42 $
-//###########################################################################
-//
-// FILE:    Example_2833xEpwmTripZone.c
-//
-// TITLE:   Check PWM Trip Zone Test
-//
-// ASSUMPTIONS:
-//
-//    This program requires the DSP2833x header files.  
-//
-//    Initially tie TZ1 (GPIO12) and TZ2 (GPIO13) high. 
-//
-//    During the test, monitor ePWM1 or ePWM2 outputs 
-//    on a scope Pull TZ1 or TZ2 low to see the effect. 
-//
-//       EPWM1A is on GPIO0
-//       EPWM1B is on GPIO1
-//       EPWM2A is on GPIO2
-//       EPWM2B is on GPIO3
-//
-//    ePWM1 will react as a 1 shot trip
-// 
-//    ePWM2 will react as a cycle by cycle trip and will be
-//    cleared if TZ1 and TZ2 are both pulled back high. 
-//
-//
-//    As supplied, this project is configured for "boot to SARAM" 
-//    operation.  The 2833x Boot Mode table is shown below.  
-//    For information on configuring the boot mode of an eZdsp, 
-//    please refer to the documentation included with the eZdsp,  
-//
-//       $Boot_Table:
-//
-//         GPIO87   GPIO86     GPIO85   GPIO84
-//          XA15     XA14       XA13     XA12
-//           PU       PU         PU       PU
-//        ==========================================
-//            1        1          1        1    Jump to Flash
-//            1        1          1        0    SCI-A boot
-//            1        1          0        1    SPI-A boot
-//            1        1          0        0    I2C-A boot
-//            1        0          1        1    eCAN-A boot
-//            1        0          1        0    McBSP-A boot
-//            1        0          0        1    Jump to XINTF x16
-//            1        0          0        0    Jump to XINTF x32
-//            0        1          1        1    Jump to OTP
-//            0        1          1        0    Parallel GPIO I/O boot
-//            0        1          0        1    Parallel XINTF boot
-//            0        1          0        0    Jump to SARAM	    <- "boot to SARAM"
-//            0        0          1        1    Branch to check boot mode
-//            0        0          1        0    Boot to flash, bypass ADC cal
-//            0        0          0        1    Boot to SARAM, bypass ADC cal
-//            0        0          0        0    Boot to SCI-A, bypass ADC cal
-//                                              Boot_Table_End$
-//
-// DESCRIPTION:
-//
-//    This example configures ePWM1 and ePWM2 
-// 
-//    2 Examples are included:
-//    * ePWM1 has TZ1 and TZ2 as one shot trip sources
-//    * ePWM2 has TZ1 and TZ2 as cycle by cycle trip sources  
-//
-//    Each ePWM is configured to interrupt on the 3rd zero event
-//    when this happens the deadband is modified such that
-//    0 <= DB <= DB_MAX.  That is, the deadband will move up and
-//    down between 0 and the maximum value. 
-//
-//
-//    View the EPWM1A/B, EPWM2A/B waveforms 
-//    via an oscilloscope to see the effect of TZ1 and TZ2
-//
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File
-
-// Prototype statements for functions found within this file.
-void InitEPwm1Example(void);
-void InitEPwm2Example(void);
-interrupt void epwm1_tzint_isr(void);
-interrupt void epwm2_tzint_isr(void);
-
-
-// Global variables used in this example
-Uint32  EPwm1TZIntCount;
-Uint32  EPwm2TZIntCount;
-
-void main(void)
-{
-// Step 1. Initialize System Control:
-// PLL, WatchDog, enable Peripheral Clocks
-// This example function is found in the DSP2833x_SysCtrl.c file.
-   InitSysCtrl();
-
-// Step 2. Initalize GPIO: 
-// This example function is found in the DSP2833x_Gpio.c file and
-// illustrates how to set the GPIO to it's default state.
-// InitGpio();  // Skipped for this example  
-
-// For this case just init GPIO pins for ePWM1, ePWM2, and TZ pins
-   InitEPwm1Gpio();
-   InitEPwm2Gpio();
-   InitTzGpio();
-   
-// Step 3. Clear all interrupts and initialize PIE vector table:
-// Disable CPU interrupts 
-   DINT;
-
-// Initialize the PIE control registers to their default state.
-// The default state is all PIE interrupts disabled and flags
-// are cleared.  
-// This function is found in the DSP2833x_PieCtrl.c file.
-   InitPieCtrl();
-   
-// Disable CPU interrupts and clear all CPU interrupt flags:
-   IER = 0x0000;
-   IFR = 0x0000;
-
-// Initialize the PIE vector table with pointers to the shell Interrupt 
-// Service Routines (ISR).  
-// This will populate the entire table, even if the interrupt
-// is not used in this example.  This is useful for debug purposes.
-// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
-// This function is found in DSP2833x_PieVect.c.
-   InitPieVectTable();
-
-// Interrupts that are used in this example are re-mapped to
-// ISR functions found within this file.  
-   EALLOW;  // This is needed to write to EALLOW protected registers
-   PieVectTable.EPWM1_TZINT = &epwm1_tzint_isr;
-   PieVectTable.EPWM2_TZINT = &epwm2_tzint_isr;
-   EDIS;    // This is needed to disable write to EALLOW protected registers
-
-// Step 4. Initialize all the Device Peripherals:
-// This function is found in DSP2833x_InitPeripherals.c
-// InitPeripherals();  // Not required for this example
-
-
-   EALLOW;
-   SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0;
-   EDIS;
-
-   InitEPwm1Example();    
-   InitEPwm2Example();
-
-   EALLOW;
-   SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1;
-   EDIS;
-   
-// Step 5. User specific code, enable interrupts
-// Initalize counters:   
-   EPwm1TZIntCount = 0;
-   EPwm2TZIntCount = 0;
-   
-// Enable CPU INT3 which is connected to EPWM1-3 INT:
-   IER |= M_INT2;
-
-// Enable EPWM INTn in the PIE: Group 2 interrupt 1-3
-   PieCtrlRegs.PIEIER2.bit.INTx1 = 1;
-   PieCtrlRegs.PIEIER2.bit.INTx2 = 1;
-
-// Enable global Interrupts and higher priority real-time debug events:
-   EINT;   // Enable Global interrupt INTM
-   ERTM;   // Enable Global realtime interrupt DBGM
-
-
-
-// Step 6. IDLE loop. Just sit and loop forever (optional):
-   for(;;)
-   {
-       asm("          NOP");
-   }
-
-} 
-
-interrupt void epwm1_tzint_isr(void)
-{
-   EPwm1TZIntCount++;
-
-// Leave these flags set so we only take this
-// interrupt once
-//
-// EALLOW;
-// EPwm1Regs.TZCLR.bit.OST = 1;
-// EPwm1Regs.TZCLR.bit.INT = 1;
-// EDIS;
-
-   // Acknowledge this interrupt to receive more interrupts from group 2
-   PieCtrlRegs.PIEACK.all = PIEACK_GROUP2;
-
-}
-
-interrupt void epwm2_tzint_isr(void)
-{
-
-   EPwm2TZIntCount++;
-
-// Clear the flags - we will continue to take
-// this interrupt until the TZ pin goes high
-//
-   EALLOW;
-   EPwm2Regs.TZCLR.bit.CBC = 1;   
-   EPwm2Regs.TZCLR.bit.INT = 1;
-   EDIS;
-
-   // Acknowledge this interrupt to receive more interrupts from group 2
-   PieCtrlRegs.PIEACK.all = PIEACK_GROUP2;
-
-}
-
-
-void InitEPwm1Example()
-{
-   // Enable TZ1 and TZ2 as one shot trip sources
-   EALLOW;
-   EPwm1Regs.TZSEL.bit.OSHT1 = 1;
-   EPwm1Regs.TZSEL.bit.OSHT2 = 1;
-   
-   // What do we want the TZ1 and TZ2 to do?
-   EPwm1Regs.TZCTL.bit.TZA = TZ_FORCE_HI;
-   EPwm1Regs.TZCTL.bit.TZB = TZ_FORCE_LO;
-   
-   // Enable TZ interrupt
-   EPwm1Regs.TZEINT.bit.OST = 1;
-   EDIS;
-   
-   EPwm1Regs.TBPRD = 6000;                         // Set timer period
-   EPwm1Regs.TBPHS.half.TBPHS = 0x0000;            // Phase is 0
-   EPwm1Regs.TBCTR = 0x0000;                       // Clear counter
-
-   // Setup TBCLK
-   EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Count up
-   EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE;        // Disable phase loading
-   EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV4;       // Clock ratio to SYSCLKOUT
-   EPwm1Regs.TBCTL.bit.CLKDIV = TB_DIV4;
-
-   EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;    // Load registers every ZERO
-   EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
-   EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
-   EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;   
-
-   // Setup compare 
-   EPwm1Regs.CMPA.half.CMPA = 3000;
-
-   // Set actions
-   EPwm1Regs.AQCTLA.bit.CAU = AQ_SET;             // Set PWM1A on Zero
-   EPwm1Regs.AQCTLA.bit.CAD = AQ_CLEAR;
-   
-
-   EPwm1Regs.AQCTLB.bit.CAU = AQ_CLEAR;          // Set PWM1A on Zero
-   EPwm1Regs.AQCTLB.bit.CAD = AQ_SET;
-
-}
-
-
-void InitEPwm2Example()
-{
-
-   // Enable TZ1 and TZ2 as one cycle-by-cycle trip sources
-   EALLOW;
-   EPwm2Regs.TZSEL.bit.CBC1 = 1;
-   EPwm2Regs.TZSEL.bit.CBC2 = 1;
-   
-   // What do we want the TZ1 and TZ2 to do?
-   EPwm2Regs.TZCTL.bit.TZA = TZ_FORCE_HI;
-   EPwm2Regs.TZCTL.bit.TZB = TZ_FORCE_LO;
-   
-   // Enable TZ interrupt
-   EPwm2Regs.TZEINT.bit.CBC = 1;
-   EDIS;
-
-   EPwm2Regs.TBPRD = 6000;                        // Set timer period
-   EPwm2Regs.TBPHS.half.TBPHS = 0x0000;           // Phase is 0
-   EPwm2Regs.TBCTR = 0x0000;                      // Clear counter
-   
-   // Setup TBCLK
-   EPwm2Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Count up
-   EPwm2Regs.TBCTL.bit.PHSEN = TB_DISABLE;        // Disable phase loading
-   EPwm2Regs.TBCTL.bit.HSPCLKDIV = TB_DIV4;       // Clock ratio to SYSCLKOUT
-   EPwm2Regs.TBCTL.bit.CLKDIV = TB_DIV4;          // Slow just to observe on the scope
-
-   // Setup compare 
-   EPwm2Regs.CMPA.half.CMPA = 3000;
-
-   // Set actions
-   EPwm2Regs.AQCTLA.bit.CAU = AQ_SET;             // Set PWM2A on Zero
-   EPwm2Regs.AQCTLA.bit.CAD = AQ_CLEAR;
-   
-
-   EPwm2Regs.AQCTLB.bit.CAU = AQ_CLEAR;           // Set PWM2A on Zero
-   EPwm2Regs.AQCTLB.bit.CAD = AQ_SET;
-}
-
-
-
-
-//===========================================================================
-// No more.
-//===========================================================================
diff --git a/Source/External/v120/DSP2833x_examples/epwm_trip_zone/Example_2833xEPwmTripZone.gel b/Source/External/v120/DSP2833x_examples/epwm_trip_zone/Example_2833xEPwmTripZone.gel
deleted file mode 100644
index a59442b..0000000
--- a/Source/External/v120/DSP2833x_examples/epwm_trip_zone/Example_2833xEPwmTripZone.gel
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
-// TI File $Revision: /main/5 $
-// Checkin $Date: August 9, 2007   17:13:58 $
-//###########################################################################
-//
-// This .gel file can be used to help load and build the example project.
-// It should be unloaded from Code Composer Studio before loading another 
-// project. 
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-*/
-
-menuitem "DSP2833x ePWM TripZone"
-
-hotmenu Load_and_Build_Project()
-{
-   GEL_ProjectLoad("Example_2833xEPwmTripZone.pjt");
-   GEL_ProjectBuild("Example_2833xEPwmTripZone.pjt");
-   Setup_WatchWindow();
-}
-
-hotmenu Load_Code()
-{
-   GEL_Load(".\\debug\\Example_2833xEPwmTripZone.out");
-   Setup_WatchWindow();
-}
-
-hotmenu Setup_WatchWindow()
-{
-   GEL_WatchReset();
-   GEL_WatchAdd("EPwm1Regs,x");
-   GEL_WatchAdd("EPwm2Regs,x");
-}
-
-
-
-
diff --git a/Source/External/v120/DSP2833x_examples/epwm_trip_zone/Example_2833xEPwmTripZone.pjt b/Source/External/v120/DSP2833x_examples/epwm_trip_zone/Example_2833xEPwmTripZone.pjt
deleted file mode 100644
index 543de56..0000000
--- a/Source/External/v120/DSP2833x_examples/epwm_trip_zone/Example_2833xEPwmTripZone.pjt
+++ /dev/null
@@ -1,46 +0,0 @@
-; Code Composer Project File, Version 2.0 (do not modify or remove this line)
-
-[Project Settings]
-ProjectName="DSP2833x"
-ProjectDir="C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\epwm_trip_zone\"
-ProjectType=Executable
-CPUFamily=TMS320C28XX
-Tool="Compiler"
-Tool="DspBiosBuilder"
-Tool="Linker"
-Config="Debug"
-Config="Release"
-
-[Source Files]
-Source="..\..\DSP2833x_common\source\DSP2833x_ADC_cal.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CodeStartBranch.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CpuTimers.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_DefaultIsr.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_EPwm.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieVect.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_SysCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_usDelay.asm"
-Source="..\..\DSP2833x_headers\source\DSP2833x_GlobalVariableDefs.c"
-Source="Example_2833xEPwmTripZone.c"
-Source="..\..\DSP2833x_common\cmd\28335_RAM_lnk.cmd"
-Source="..\..\DSP2833x_headers\cmd\DSP2833x_Headers_nonBIOS.cmd"
-
-["Compiler" Settings: "Debug"]
-Options=-g -q -pdr -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\epwm_trip_zone\Debug" -fs"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\epwm_trip_zone\Debug" -i"..\..\DSP2833x_headers\include" -i"..\..\DSP2833x_common\include" -d"_DEBUG" -d"LARGE_MODEL" --float_support=fpu32 -ml -mt -v28
-
-["Compiler" Settings: "Release"]
-Options=-q -o3 -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\epwm_trip_zone\Release" -d"LARGE_MODEL" -ml -v28
-
-["DspBiosBuilder" Settings: "Debug"]
-Options=-v28
-
-["DspBiosBuilder" Settings: "Release"]
-Options=-v28
-
-["Linker" Settings: "Debug"]
-Options=-q -c -ecode_start -m".\Debug\Example_2833xEPwmTripZone.map" -o".\Debug\Example_2833xEPwmTripZone.out" -stack0x380 -w -x -i"..\..\DSP2833x_headers\include" -l"rts2800_fpu32.lib"
-
-["Linker" Settings: "Release"]
-Options=-q -c -m".\Release\Example_2833xEPwmDeadBand.map" -o".\Release\Example_2833xEPwmTripZone.out" -x
-
diff --git a/Source/External/v120/DSP2833x_examples/epwm_up_aq/Example_2833xEPwmUpAQ.c b/Source/External/v120/DSP2833x_examples/epwm_up_aq/Example_2833xEPwmUpAQ.c
deleted file mode 100644
index 33b153a..0000000
--- a/Source/External/v120/DSP2833x_examples/epwm_up_aq/Example_2833xEPwmUpAQ.c
+++ /dev/null
@@ -1,490 +0,0 @@
-// TI File $Revision: /main/9 $
-// Checkin $Date: April 21, 2008   15:41:47 $
-//###########################################################################
-//
-// FILE:    Example_2833xEPwm3UpAQ.c
-//
-// TITLE:   Action Qualifier Module Upcount mode.
-//
-// ASSUMPTIONS:
-//
-//     This program requires the DSP2833x header files.
-//
-//     Monitor the ePWM1 - ePWM3 pins on a oscilloscope as
-//     described below.
-//
-//        EPWM1A is on GPIO0
-//        EPWM1B is on GPIO1
-//
-//        EPWM2A is on GPIO2
-//        EPWM2B is on GPIO3
-//
-//        EPWM3A is on GPIO4
-//        EPWM3B is on GPIO5
-//
-//     As supplied, this project is configured for "boot to SARAM"
-//     operation.  The 2833x Boot Mode table is shown below.
-//     For information on configuring the boot mode of an eZdsp,
-//     please refer to the documentation included with the eZdsp,
-//
-//       $Boot_Table:
-//
-//         GPIO87   GPIO86     GPIO85   GPIO84
-//          XA15     XA14       XA13     XA12
-//           PU       PU         PU       PU
-//        ==========================================
-//            1        1          1        1    Jump to Flash
-//            1        1          1        0    SCI-A boot
-//            1        1          0        1    SPI-A boot
-//            1        1          0        0    I2C-A boot
-//            1        0          1        1    eCAN-A boot
-//            1        0          1        0    McBSP-A boot
-//            1        0          0        1    Jump to XINTF x16
-//            1        0          0        0    Jump to XINTF x32
-//            0        1          1        1    Jump to OTP
-//            0        1          1        0    Parallel GPIO I/O boot
-//            0        1          0        1    Parallel XINTF boot
-//            0        1          0        0    Jump to SARAM	    <- "boot to SARAM"
-//            0        0          1        1    Branch to check boot mode
-//            0        0          1        0    Boot to flash, bypass ADC cal
-//            0        0          0        1    Boot to SARAM, bypass ADC cal
-//            0        0          0        0    Boot to SCI-A, bypass ADC cal
-//                                              Boot_Table_End$
-//
-// DESCRIPTION:
-//
-//    This example configures ePWM1, ePWM2, ePWM3 to produce an
-//    waveform with independant modulation on EPWMxA and
-//    EPWMxB.
-//
-//    The compare values CMPA and CMPB are modified within the ePWM's ISR
-//
-//    The TB counter is in upmode for this example.
-//
-//    View the EPWM1A/B, EPWM2A/B and EPWM3A/B waveforms
-//    via an oscilloscope
-//
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-
-#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File
-
-
-typedef struct
-{
-   volatile struct EPWM_REGS *EPwmRegHandle;
-   Uint16 EPwm_CMPA_Direction;
-   Uint16 EPwm_CMPB_Direction;
-   Uint16 EPwmTimerIntCount;
-   Uint16 EPwmMaxCMPA;
-   Uint16 EPwmMinCMPA;
-   Uint16 EPwmMaxCMPB;
-   Uint16 EPwmMinCMPB;
-}EPWM_INFO;
-
-
-// Prototype statements for functions found within this file.
-void InitEPwm1Example(void);
-void InitEPwm2Example(void);
-void InitEPwm3Example(void);
-interrupt void epwm1_isr(void);
-interrupt void epwm2_isr(void);
-interrupt void epwm3_isr(void);
-void update_compare(EPWM_INFO*);
-
-// Global variables used in this example
-EPWM_INFO epwm1_info;
-EPWM_INFO epwm2_info;
-EPWM_INFO epwm3_info;
-
-// Configure the period for each timer
-#define EPWM1_TIMER_TBPRD  2000  // Period register
-#define EPWM1_MAX_CMPA     1950
-#define EPWM1_MIN_CMPA       50
-#define EPWM1_MAX_CMPB     1950
-#define EPWM1_MIN_CMPB       50
-
-#define EPWM2_TIMER_TBPRD  2000  // Period register
-#define EPWM2_MAX_CMPA     1950
-#define EPWM2_MIN_CMPA       50
-#define EPWM2_MAX_CMPB     1950
-#define EPWM2_MIN_CMPB       50
-
-#define EPWM3_TIMER_TBPRD  2000  // Period register
-#define EPWM3_MAX_CMPA      950
-#define EPWM3_MIN_CMPA       50
-#define EPWM3_MAX_CMPB     1950
-#define EPWM3_MIN_CMPB     1050
-
-
-// To keep track of which way the compare value is moving
-#define EPWM_CMP_UP   1
-#define EPWM_CMP_DOWN 0
-
-
-
-void main(void)
-{
-// Step 1. Initialize System Control:
-// PLL, WatchDog, enable Peripheral Clocks
-// This example function is found in the DSP2833x_SysCtrl.c file.
-   InitSysCtrl();
-
-// Step 2. Initalize GPIO:
-// This example function is found in the DSP2833x_Gpio.c file and
-// illustrates how to set the GPIO to it's default state.
-// InitGpio();  // Skipped for this example
-
-// For this case just init GPIO pins for ePWM1, ePWM2, ePWM3
-// These functions are in the DSP2833x_EPwm.c file
-   InitEPwm1Gpio();
-   InitEPwm2Gpio();
-   InitEPwm3Gpio();
-
-
-// Step 3. Clear all interrupts and initialize PIE vector table:
-// Disable CPU interrupts
-   DINT;
-
-// Initialize the PIE control registers to their default state.
-// The default state is all PIE interrupts disabled and flags
-// are cleared.
-// This function is found in the DSP2833x_PieCtrl.c file.
-   InitPieCtrl();
-
-// Disable CPU interrupts and clear all CPU interrupt flags:
-   IER = 0x0000;
-   IFR = 0x0000;
-
-// Initialize the PIE vector table with pointers to the shell Interrupt
-// Service Routines (ISR).
-// This will populate the entire table, even if the interrupt
-// is not used in this example.  This is useful for debug purposes.
-// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
-// This function is found in DSP2833x_PieVect.c.
-   InitPieVectTable();
-
-// Interrupts that are used in this example are re-mapped to
-// ISR functions found within this file.
-   EALLOW;  // This is needed to write to EALLOW protected registers
-   PieVectTable.EPWM1_INT = &epwm1_isr;
-   PieVectTable.EPWM2_INT = &epwm2_isr;
-   PieVectTable.EPWM3_INT = &epwm3_isr;
-   EDIS;    // This is needed to disable write to EALLOW protected registers
-
-// Step 4. Initialize all the Device Peripherals:
-// This function is found in DSP2833x_InitPeripherals.c
-// InitPeripherals();  // Not required for this example
-
-// For this example, only initialize the ePWM
-
-   EALLOW;
-   SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0;
-   EDIS;
-
-   InitEPwm1Example();
-   InitEPwm2Example();
-   InitEPwm3Example();
-
-   EALLOW;
-   SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1;
-   EDIS;
-
-
-// Step 5. User specific code, enable interrupts:
-
-// Enable CPU INT3 which is connected to EPWM1-3 INT:
-   IER |= M_INT3;
-
-// Enable EPWM INTn in the PIE: Group 3 interrupt 1-3
-   PieCtrlRegs.PIEIER3.bit.INTx1 = 1;
-   PieCtrlRegs.PIEIER3.bit.INTx2 = 1;
-   PieCtrlRegs.PIEIER3.bit.INTx3 = 1;
-
-// Enable global Interrupts and higher priority real-time debug events:
-   EINT;   // Enable Global interrupt INTM
-   ERTM;   // Enable Global realtime interrupt DBGM
-
-// Step 6. IDLE loop. Just sit and loop forever (optional):
-   for(;;)
-   {
-       asm("          NOP");
-   }
-
-}
-
-interrupt void epwm1_isr(void)
-{
-   // Update the CMPA and CMPB values
-   update_compare(&epwm1_info);
-
-   // Clear INT flag for this timer
-   EPwm1Regs.ETCLR.bit.INT = 1;
-
-   // Acknowledge this interrupt to receive more interrupts from group 3
-   PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
-}
-
-
-interrupt void epwm2_isr(void)
-{
-
-   // Update the CMPA and CMPB values
-   update_compare(&epwm2_info);
-
-   // Clear INT flag for this timer
-   EPwm2Regs.ETCLR.bit.INT = 1;
-
-   // Acknowledge this interrupt to receive more interrupts from group 3
-   PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
-}
-
-interrupt void epwm3_isr(void)
-{
-
-   // Update the CMPA and CMPB values
-   update_compare(&epwm3_info);
-
-   // Clear INT flag for this timer
-   EPwm3Regs.ETCLR.bit.INT = 1;
-
-   // Acknowledge this interrupt to receive more interrupts from group 3
-   PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
-}
-
-void InitEPwm1Example()
-{
-
-   // Setup TBCLK
-   EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP; // Count up
-   EPwm1Regs.TBPRD = EPWM1_TIMER_TBPRD;       // Set timer period
-   EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE;    // Disable phase loading
-   EPwm1Regs.TBPHS.half.TBPHS = 0x0000;       // Phase is 0
-   EPwm1Regs.TBCTR = 0x0000;                  // Clear counter
-   EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV2;   // Clock ratio to SYSCLKOUT
-   EPwm1Regs.TBCTL.bit.CLKDIV = TB_DIV2;
-
-   // Setup shadow register load on ZERO
-   EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
-   EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
-   EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
-   EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
-
-   // Set Compare values
-   EPwm1Regs.CMPA.half.CMPA = EPWM1_MIN_CMPA;    // Set compare A value
-   EPwm1Regs.CMPB = EPWM1_MIN_CMPB;              // Set Compare B value
-
-   // Set actions
-   EPwm1Regs.AQCTLA.bit.ZRO = AQ_SET;            // Set PWM1A on Zero
-   EPwm1Regs.AQCTLA.bit.CAU = AQ_CLEAR;          // Clear PWM1A on event A, up count
-
-   EPwm1Regs.AQCTLB.bit.ZRO = AQ_SET;            // Set PWM1B on Zero
-   EPwm1Regs.AQCTLB.bit.CBU = AQ_CLEAR;          // Clear PWM1B on event B, up count
-
-   // Interrupt where we will change the Compare Values
-   EPwm1Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO;     // Select INT on Zero event
-   EPwm1Regs.ETSEL.bit.INTEN = 1;                // Enable INT
-   EPwm1Regs.ETPS.bit.INTPRD = ET_3RD;           // Generate INT on 3rd event
-
-   // Information this example uses to keep track
-   // of the direction the CMPA/CMPB values are
-   // moving, the min and max allowed values and
-   // a pointer to the correct ePWM registers
-   epwm1_info.EPwm_CMPA_Direction = EPWM_CMP_UP; // Start by increasing CMPA & CMPB
-   epwm1_info.EPwm_CMPB_Direction = EPWM_CMP_UP;
-   epwm1_info.EPwmTimerIntCount = 0;             // Zero the interrupt counter
-   epwm1_info.EPwmRegHandle = &EPwm1Regs;        // Set the pointer to the ePWM module
-   epwm1_info.EPwmMaxCMPA = EPWM1_MAX_CMPA;      // Setup min/max CMPA/CMPB values
-   epwm1_info.EPwmMinCMPA = EPWM1_MIN_CMPA;
-   epwm1_info.EPwmMaxCMPB = EPWM1_MAX_CMPB;
-   epwm1_info.EPwmMinCMPB = EPWM1_MIN_CMPB;
-
-}
-
-
-void InitEPwm2Example()
-{
-   // Setup TBCLK
-   EPwm2Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP; // Count up
-   EPwm2Regs.TBPRD = EPWM2_TIMER_TBPRD;       // Set timer period
-   EPwm2Regs.TBCTL.bit.PHSEN = TB_DISABLE;    // Disable phase loading
-   EPwm2Regs.TBPHS.half.TBPHS = 0x0000;       // Phase is 0
-   EPwm2Regs.TBCTR = 0x0000;                  // Clear counter
-   EPwm2Regs.TBCTL.bit.HSPCLKDIV = TB_DIV2;   // Clock ratio to SYSCLKOUT
-   EPwm2Regs.TBCTL.bit.CLKDIV = TB_DIV2;
-
-   // Setup shadow register load on ZERO
-   EPwm2Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
-   EPwm2Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
-   EPwm2Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
-   EPwm2Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
-
-   // Set Compare values
-   EPwm2Regs.CMPA.half.CMPA = EPWM2_MIN_CMPA;       // Set compare A value
-   EPwm2Regs.CMPB = EPWM2_MAX_CMPB;                 // Set Compare B value
-
-   // Set actions
-   EPwm2Regs.AQCTLA.bit.PRD = AQ_CLEAR;             // Clear PWM2A on Period
-   EPwm2Regs.AQCTLA.bit.CAU = AQ_SET;               // Set PWM2A on event A, up count
-
-   EPwm2Regs.AQCTLB.bit.PRD = AQ_CLEAR;             // Clear PWM2B on Period
-   EPwm2Regs.AQCTLB.bit.CBU = AQ_SET;               // Set PWM2B on event B, up count
-
-   // Interrupt where we will change the Compare Values
-   EPwm2Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO;        // Select INT on Zero event
-   EPwm2Regs.ETSEL.bit.INTEN = 1;                   // Enable INT
-   EPwm2Regs.ETPS.bit.INTPRD = ET_3RD;              // Generate INT on 3rd event
-
-   // Information this example uses to keep track
-   // of the direction the CMPA/CMPB values are
-   // moving, the min and max allowed values and
-   // a pointer to the correct ePWM registers
-   epwm2_info.EPwm_CMPA_Direction = EPWM_CMP_UP;    // Start by increasing CMPA
-   epwm2_info.EPwm_CMPB_Direction = EPWM_CMP_DOWN;  // and decreasing CMPB
-   epwm2_info.EPwmTimerIntCount = 0;                // Zero the interrupt counter
-   epwm2_info.EPwmRegHandle = &EPwm2Regs;           // Set the pointer to the ePWM module
-   epwm2_info.EPwmMaxCMPA = EPWM2_MAX_CMPA;         // Setup min/max CMPA/CMPB values
-   epwm2_info.EPwmMinCMPA = EPWM2_MIN_CMPA;
-   epwm2_info.EPwmMaxCMPB = EPWM2_MAX_CMPB;
-   epwm2_info.EPwmMinCMPB = EPWM2_MIN_CMPB;
-
-}
-
-
-void InitEPwm3Example(void)
-{
-
-
-   // Setup TBCLK
-   EPwm3Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP; // Count up
-   EPwm3Regs.TBPRD = EPWM3_TIMER_TBPRD;       // Set timer period
-   EPwm3Regs.TBCTL.bit.PHSEN = TB_DISABLE;    // Disable phase loading
-   EPwm3Regs.TBPHS.half.TBPHS = 0x0000;       // Phase is 0
-   EPwm3Regs.TBCTR = 0x0000;                  // Clear counter
-   EPwm3Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1;   // Clock ratio to SYSCLKOUT
-   EPwm3Regs.TBCTL.bit.CLKDIV = TB_DIV1;
-
-   // Setup shadow register load on ZERO
-   EPwm3Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
-   EPwm3Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
-   EPwm3Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
-   EPwm3Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
-
-  // Set Compare values
-   EPwm3Regs.CMPA.half.CMPA = EPWM3_MIN_CMPA; // Set compare A value
-   EPwm3Regs.CMPB = EPWM3_MAX_CMPB;           // Set Compare B value
-
-   // Set Actions
-   EPwm3Regs.AQCTLA.bit.CAU = AQ_SET;         // Set PWM3A on event B, up count
-   EPwm3Regs.AQCTLA.bit.CBU = AQ_CLEAR;       // Clear PWM3A on event B, up count
-
-   EPwm3Regs.AQCTLB.bit.ZRO = AQ_TOGGLE;      // Toggle EPWM3B on Zero
-
-   // Interrupt where we will change the Compare Values
-   EPwm3Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO;     // Select INT on Zero event
-   EPwm3Regs.ETSEL.bit.INTEN = 1;                // Enable INT
-   EPwm3Regs.ETPS.bit.INTPRD = ET_3RD;           // Generate INT on 3rd event
-
-   // Start by increasing the compare A and decreasing compare B
-   epwm3_info.EPwm_CMPA_Direction = EPWM_CMP_UP;
-   epwm3_info.EPwm_CMPB_Direction = EPWM_CMP_DOWN;
-   // Start the cout at 0
-   epwm3_info.EPwmTimerIntCount = 0;
-   epwm3_info.EPwmRegHandle = &EPwm3Regs;
-   epwm3_info.EPwmMaxCMPA = EPWM3_MAX_CMPA;
-   epwm3_info.EPwmMinCMPA = EPWM3_MIN_CMPA;
-   epwm3_info.EPwmMaxCMPB = EPWM3_MAX_CMPB;
-   epwm3_info.EPwmMinCMPB = EPWM3_MIN_CMPB;
-}
-
-
-void update_compare(EPWM_INFO *epwm_info)
-{
-
-
-   // Every 10'th interrupt, change the CMPA/CMPB values
-   if(epwm_info->EPwmTimerIntCount == 10)
-   {
-       epwm_info->EPwmTimerIntCount = 0;
-
-       // If we were increasing CMPA, check to see if
-       // we reached the max value.  If not, increase CMPA
-       // else, change directions and decrease CMPA
-	   if(epwm_info->EPwm_CMPA_Direction == EPWM_CMP_UP)
-	   {
-	       if(epwm_info->EPwmRegHandle->CMPA.half.CMPA < epwm_info->EPwmMaxCMPA)
-	       {
-	          epwm_info->EPwmRegHandle->CMPA.half.CMPA++;
-	       }
-	       else
-	       {
-	          epwm_info->EPwm_CMPA_Direction = EPWM_CMP_DOWN;
-              epwm_info->EPwmRegHandle->CMPA.half.CMPA--;
-	       }
-	   }
-
-	   // If we were decreasing CMPA, check to see if
-       // we reached the min value.  If not, decrease CMPA
-       // else, change directions and increase CMPA
-	   else
-	   {
-	       if(epwm_info->EPwmRegHandle->CMPA.half.CMPA == epwm_info->EPwmMinCMPA)
-	       {
-	          epwm_info->EPwm_CMPA_Direction = EPWM_CMP_UP;
-	          epwm_info->EPwmRegHandle->CMPA.half.CMPA++;
-	       }
-	       else
-	       {
-	          epwm_info->EPwmRegHandle->CMPA.half.CMPA--;
-	       }
-	   }
-
-	   // If we were increasing CMPB, check to see if
-       // we reached the max value.  If not, increase CMPB
-       // else, change directions and decrease CMPB
-	   if(epwm_info->EPwm_CMPB_Direction == EPWM_CMP_UP)
-	   {
-	       if(epwm_info->EPwmRegHandle->CMPB < epwm_info->EPwmMaxCMPB)
-	       {
-	          epwm_info->EPwmRegHandle->CMPB++;
-	       }
-	       else
-	       {
-	          epwm_info->EPwm_CMPB_Direction = EPWM_CMP_DOWN;
-	          epwm_info->EPwmRegHandle->CMPB--;
-	       }
-	   }
-
-	   // If we were decreasing CMPB, check to see if
-       // we reached the min value.  If not, decrease CMPB
-       // else, change directions and increase CMPB
-
-	   else
-	   {
-	       if(epwm_info->EPwmRegHandle->CMPB == epwm_info->EPwmMinCMPB)
-	       {
-	          epwm_info->EPwm_CMPB_Direction = EPWM_CMP_UP;
-	          epwm_info->EPwmRegHandle->CMPB++;
-	       }
-	       else
-	       {
-	          epwm_info->EPwmRegHandle->CMPB--;
-	       }
-	   }
-   }
-   else
-   {
-      epwm_info->EPwmTimerIntCount++;
-   }
-
-   return;
-}
-
-
-//===========================================================================
-// No more.
-//===========================================================================
diff --git a/Source/External/v120/DSP2833x_examples/epwm_up_aq/Example_2833xEPwmUpAQ.gel b/Source/External/v120/DSP2833x_examples/epwm_up_aq/Example_2833xEPwmUpAQ.gel
deleted file mode 100644
index 6ac8e2c..0000000
--- a/Source/External/v120/DSP2833x_examples/epwm_up_aq/Example_2833xEPwmUpAQ.gel
+++ /dev/null
@@ -1,41 +0,0 @@
-/*
-// TI File $Revision: /main/5 $
-// Checkin $Date: August 9, 2007   17:14:13 $
-//###########################################################################
-//
-// This .gel file can be used to help load and build the example project.
-// It should be unloaded from Code Composer Studio before loading another 
-// project. 
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-*/
-
-menuitem "DSP2833x ePWM UP AQ"
-
-hotmenu Load_and_Build_Project()
-{
-   GEL_ProjectLoad("Example_2833xEPwmUpAQ.pjt");
-   GEL_ProjectBuild("Example_2833xEPwmUpAQ.pjt");
-   Setup_WatchWindow();
-}
-
-hotmenu Load_Code()
-{
-   GEL_Load(".\\debug\\Example_2833xEPwmUpAQ.out");
-   Setup_WatchWindow();
-}
-
-hotmenu Setup_WatchWindow()
-{
-   GEL_WatchReset();
-   GEL_WatchAdd("EPwm1Regs,x");
-   GEL_WatchAdd("EPwm2Regs,x");
-   GEL_WatchAdd("EPwm3Regs,x");
-}
-
-
-
-
diff --git a/Source/External/v120/DSP2833x_examples/epwm_up_aq/Example_2833xEPwmUpAQ.pjt b/Source/External/v120/DSP2833x_examples/epwm_up_aq/Example_2833xEPwmUpAQ.pjt
deleted file mode 100644
index 45a227e..0000000
--- a/Source/External/v120/DSP2833x_examples/epwm_up_aq/Example_2833xEPwmUpAQ.pjt
+++ /dev/null
@@ -1,46 +0,0 @@
-; Code Composer Project File, Version 2.0 (do not modify or remove this line)
-
-[Project Settings]
-ProjectName="DSP2833x"
-ProjectDir="C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\epwm_up_aq\"
-ProjectType=Executable
-CPUFamily=TMS320C28XX
-Tool="Compiler"
-Tool="DspBiosBuilder"
-Tool="Linker"
-Config="Debug"
-Config="Release"
-
-[Source Files]
-Source="..\..\DSP2833x_common\source\DSP2833x_ADC_cal.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CodeStartBranch.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CpuTimers.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_DefaultIsr.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_EPwm.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieVect.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_SysCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_usDelay.asm"
-Source="..\..\DSP2833x_headers\source\DSP2833x_GlobalVariableDefs.c"
-Source="Example_2833xEPwmUpAQ.c"
-Source="..\..\DSP2833x_common\cmd\28335_RAM_lnk.cmd"
-Source="..\..\DSP2833x_headers\cmd\DSP2833x_Headers_nonBIOS.cmd"
-
-["Compiler" Settings: "Debug"]
-Options=-g -q -pdr -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\epwm_up_aq\Debug" -fs"C:\tidcs\c28\DSP2833x\006\DSP2833x_examples\epwm_asymmetic_aq\Debug" -i"..\..\DSP2833x_headers\include" -i"..\..\DSP2833x_common\include" -d"_DEBUG" -d"LARGE_MODEL" --float_support=fpu32 -ml -mt -v28
-
-["Compiler" Settings: "Release"]
-Options=-q -o3 -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\epwm_up_aq\Release" -d"LARGE_MODEL" -ml -v28
-
-["DspBiosBuilder" Settings: "Debug"]
-Options=-v28
-
-["DspBiosBuilder" Settings: "Release"]
-Options=-v28
-
-["Linker" Settings: "Debug"]
-Options=-q -c -ecode_start -m".\Debug\Example_2833xEPwmUpAQ.map" -o".\Debug\Example_2833xEPwmUpAQ.out" -stack0x380 -w -x -i"..\..\DSP2833x_headers\include" -l"rts2800_fpu32.lib"
-
-["Linker" Settings: "Release"]
-Options=-q -c -o".\Release\Example_2833xEPwmUpAQ.out" -x
-
diff --git a/Source/External/v120/DSP2833x_examples/epwm_updown_aq/Example_2833xEPwmUpDownAQ.c b/Source/External/v120/DSP2833x_examples/epwm_updown_aq/Example_2833xEPwmUpDownAQ.c
deleted file mode 100644
index 6ccdbb7..0000000
--- a/Source/External/v120/DSP2833x_examples/epwm_updown_aq/Example_2833xEPwmUpDownAQ.c
+++ /dev/null
@@ -1,499 +0,0 @@
-// TI File $Revision: /main/8 $
-// Checkin $Date: April 21, 2008   15:41:53 $
-//###########################################################################
-//
-// FILE:    Example_2833xEPwmUpDownAQ.c
-//
-// TITLE:   Action Qualifier Module - Using up/down count
-//
-// ASSUMPTIONS:
-//
-//    This program requires the DSP2833x header files.  
-//
-//    Monitor ePWM1-ePWM3 pins on an oscilloscope as described
-//    below.
-//
-//       EPWM1A is on GPIO0
-//       EPWM1B is on GPIO1
-//
-//       EPWM2A is on GPIO2
-//       EPWM2B is on GPIO3
-//
-//       EPWM3A is on GPIO4
-//       EPWM3B is on GPIO5
-//
-//    As supplied, this project is configured for "boot to SARAM" 
-//    operation.  The 2833x Boot Mode table is shown below.  
-//    For information on configuring the boot mode of an eZdsp, 
-//    please refer to the documentation included with the eZdsp,  
-//
-//       $Boot_Table:
-//
-//         GPIO87   GPIO86     GPIO85   GPIO84
-//          XA15     XA14       XA13     XA12
-//           PU       PU         PU       PU
-//        ==========================================
-//            1        1          1        1    Jump to Flash
-//            1        1          1        0    SCI-A boot
-//            1        1          0        1    SPI-A boot
-//            1        1          0        0    I2C-A boot
-//            1        0          1        1    eCAN-A boot
-//            1        0          1        0    McBSP-A boot
-//            1        0          0        1    Jump to XINTF x16
-//            1        0          0        0    Jump to XINTF x32
-//            0        1          1        1    Jump to OTP
-//            0        1          1        0    Parallel GPIO I/O boot
-//            0        1          0        1    Parallel XINTF boot
-//            0        1          0        0    Jump to SARAM	    <- "boot to SARAM"
-//            0        0          1        1    Branch to check boot mode
-//            0        0          1        0    Boot to flash, bypass ADC cal
-//            0        0          0        1    Boot to SARAM, bypass ADC cal
-//            0        0          0        0    Boot to SCI-A, bypass ADC cal
-//                                              Boot_Table_End$
-//
-// DESCRIPTION:
-//
-//    This example configures ePWM1, ePWM2, ePWM3 to produce an
-//    waveform with independant modulation on EPWMxA and
-//    EPWMxB.
-//
-//    The compare values CMPA and CMPB are modified within the ePWM's ISR
-//
-//    The TB counter is in up/down count mode for this example. 
-//
-//    View the EPWM1A/B, EPWM2A/B and EPWM3A/B waveforms 
-//    via an oscilloscope
-//
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-
-#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File
-
-typedef struct
-{
-   volatile struct EPWM_REGS *EPwmRegHandle;
-   Uint16 EPwm_CMPA_Direction;
-   Uint16 EPwm_CMPB_Direction;
-   Uint16 EPwmTimerIntCount;
-   Uint16 EPwmMaxCMPA;
-   Uint16 EPwmMinCMPA;
-   Uint16 EPwmMaxCMPB;
-   Uint16 EPwmMinCMPB;   
-}EPWM_INFO;
-
-
-// Prototype statements for functions found within this file.
-void InitEPwm1Example(void);
-void InitEPwm2Example(void);
-void InitEPwm3Example(void);
-interrupt void epwm1_isr(void);
-interrupt void epwm2_isr(void);
-interrupt void epwm3_isr(void);
-void update_compare(EPWM_INFO*);
-
-// Global variables used in this example
-EPWM_INFO epwm1_info;
-EPWM_INFO epwm2_info;
-EPWM_INFO epwm3_info;
-
-// Configure the period for each timer
-#define EPWM1_TIMER_TBPRD  2000  // Period register
-#define EPWM1_MAX_CMPA     1950
-#define EPWM1_MIN_CMPA       50
-#define EPWM1_MAX_CMPB     1950
-#define EPWM1_MIN_CMPB       50
-
-#define EPWM2_TIMER_TBPRD  2000  // Period register
-#define EPWM2_MAX_CMPA     1950      
-#define EPWM2_MIN_CMPA       50      
-#define EPWM2_MAX_CMPB     1950      
-#define EPWM2_MIN_CMPB       50      
-
-#define EPWM3_TIMER_TBPRD  2000  // Period register
-#define EPWM3_MAX_CMPA      950  
-#define EPWM3_MIN_CMPA       50  
-#define EPWM3_MAX_CMPB     1950  
-#define EPWM3_MIN_CMPB     1050  
-
-// To keep track of which way the compare value is moving
-#define EPWM_CMP_UP   1
-#define EPWM_CMP_DOWN 0
-
-void main(void)
-{
-// Step 1. Initialize System Control:
-// PLL, WatchDog, enable Peripheral Clocks
-// This example function is found in the DSP2833x_SysCtrl.c file.
-   InitSysCtrl();
-
-// Step 2. Initalize GPIO: 
-// This example function is found in the DSP2833x_Gpio.c file and
-// illustrates how to set the GPIO to it's default state.
-// InitGpio();  // Skipped for this example  
-
-// For this case just init GPIO pins for ePWM1, ePWM2, ePWM3
-// These functions are in the DSP2833x_EPwm.c file
-   InitEPwm1Gpio();
-   InitEPwm2Gpio();
-   InitEPwm3Gpio();   
-   
-// Step 3. Clear all interrupts and initialize PIE vector table:
-// Disable CPU interrupts 
-   DINT;
-
-// Initialize the PIE control registers to their default state.
-// The default state is all PIE interrupts disabled and flags
-// are cleared.  
-// This function is found in the DSP2833x_PieCtrl.c file.
-   InitPieCtrl();
-   
-// Disable CPU interrupts and clear all CPU interrupt flags:
-   IER = 0x0000;
-   IFR = 0x0000;
-
-// Initialize the PIE vector table with pointers to the shell Interrupt 
-// Service Routines (ISR).  
-// This will populate the entire table, even if the interrupt
-// is not used in this example.  This is useful for debug purposes.
-// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
-// This function is found in DSP2833x_PieVect.c.
-   InitPieVectTable();
-
-// Interrupts that are used in this example are re-mapped to
-// ISR functions found within this file.  
-   EALLOW;  // This is needed to write to EALLOW protected registers
-   PieVectTable.EPWM1_INT = &epwm1_isr;
-   PieVectTable.EPWM2_INT = &epwm2_isr;
-   PieVectTable.EPWM3_INT = &epwm3_isr;      
-   EDIS;    // This is needed to disable write to EALLOW protected registers
-
-// Step 4. Initialize all the Device Peripherals:
-// This function is found in DSP2833x_InitPeripherals.c
-// InitPeripherals();  // Not required for this example
-
-// For this example, only initialize the ePWM
-
-   EALLOW;
-   SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0;
-   EDIS;
-
-   InitEPwm1Example();    
-   InitEPwm2Example();
-   InitEPwm3Example();
-   
-   EALLOW;
-   SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1;
-   EDIS;
-   
-// Step 5. User specific code, enable interrupts:
-
-// Enable CPU INT3 which is connected to EPWM1-3 INT:
-   IER |= M_INT3;
-
-// Enable EPWM INTn in the PIE: Group 3 interrupt 1-3
-   PieCtrlRegs.PIEIER3.bit.INTx1 = 1;
-   PieCtrlRegs.PIEIER3.bit.INTx2 = 1;
-   PieCtrlRegs.PIEIER3.bit.INTx3 = 1;
-
-// Enable global Interrupts and higher priority real-time debug events:
-   EINT;   // Enable Global interrupt INTM
-   ERTM;   // Enable Global realtime interrupt DBGM
-
-// Step 6. IDLE loop. Just sit and loop forever (optional):
-   for(;;)
-   {
-       asm("          NOP");
-   }
-
-} 
-
-
-interrupt void epwm1_isr(void)
-{
-   // Update the CMPA and CMPB values
-   update_compare(&epwm1_info);
-   
-   // Clear INT flag for this timer
-   EPwm1Regs.ETCLR.bit.INT = 1;
-   
-   // Acknowledge this interrupt to receive more interrupts from group 3
-   PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
-}
-
-
-interrupt void epwm2_isr(void)
-{
-
-   // Update the CMPA and CMPB values
-   update_compare(&epwm2_info);
-
-   // Clear INT flag for this timer
-   EPwm2Regs.ETCLR.bit.INT = 1;
-   
-   // Acknowledge this interrupt to receive more interrupts from group 3
-   PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
-}
-
-interrupt void epwm3_isr(void)
-{
-
-   // Update the CMPA and CMPB values
-   update_compare(&epwm3_info);
-
-   // Clear INT flag for this timer
-   EPwm3Regs.ETCLR.bit.INT = 1;
-   
-   // Acknowledge this interrupt to receive more interrupts from group 3
-   PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
-}
-
-
-void InitEPwm1Example()
-{
-
-   // Setup TBCLK
-   EPwm1Regs.TBPRD = EPWM1_TIMER_TBPRD;           // Set timer period 801 TBCLKs
-   EPwm1Regs.TBPHS.half.TBPHS = 0x0000;           // Phase is 0
-   EPwm1Regs.TBCTR = 0x0000;                      // Clear counter
-   
-   // Set Compare values
-   EPwm1Regs.CMPA.half.CMPA = EPWM1_MIN_CMPA;     // Set compare A value
-   EPwm1Regs.CMPB = EPWM1_MAX_CMPB;               // Set Compare B value
-   
-   // Setup counter mode
-   EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Count up
-   EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE;        // Disable phase loading
-   EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1;       // Clock ratio to SYSCLKOUT
-   EPwm1Regs.TBCTL.bit.CLKDIV = TB_DIV1;
-
-   // Setup shadowing
-   EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
-   EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
-   EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;  // Load on Zero
-   EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;   
-
-
-   // Set actions
-   EPwm1Regs.AQCTLA.bit.CAU = AQ_SET;             // Set PWM1A on event A, up count
-   EPwm1Regs.AQCTLA.bit.CAD = AQ_CLEAR;           // Clear PWM1A on event A, down count
-
-   EPwm1Regs.AQCTLB.bit.CBU = AQ_SET;             // Set PWM1B on event B, up count
-   EPwm1Regs.AQCTLB.bit.CBD = AQ_CLEAR;           // Clear PWM1B on event B, down count
-
-   // Interrupt where we will change the Compare Values
-   EPwm1Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO;      // Select INT on Zero event
-   EPwm1Regs.ETSEL.bit.INTEN = 1;                 // Enable INT
-   EPwm1Regs.ETPS.bit.INTPRD = ET_3RD;            // Generate INT on 3rd event   
-
-   // Information this example uses to keep track
-   // of the direction the CMPA/CMPB values are 
-   // moving, the min and max allowed values and
-   // a pointer to the correct ePWM registers
-   epwm1_info.EPwm_CMPA_Direction = EPWM_CMP_UP;   // Start by increasing CMPA & 
-   epwm1_info.EPwm_CMPB_Direction = EPWM_CMP_DOWN; // decreasing CMPB
-   epwm1_info.EPwmTimerIntCount = 0;               // Zero the interrupt counter
-   epwm1_info.EPwmRegHandle = &EPwm1Regs;          // Set the pointer to the ePWM module
-   epwm1_info.EPwmMaxCMPA = EPWM1_MAX_CMPA;        // Setup min/max CMPA/CMPB values
-   epwm1_info.EPwmMinCMPA = EPWM1_MIN_CMPA;       
-   epwm1_info.EPwmMaxCMPB = EPWM1_MAX_CMPB;    
-   epwm1_info.EPwmMinCMPB = EPWM1_MIN_CMPB;       
-   
-}
-
-
-void InitEPwm2Example()
-{
-
-   
-   // Setup TBCLK
-   EPwm2Regs.TBPRD = EPWM2_TIMER_TBPRD;           // Set timer period 801 TBCLKs
-   EPwm2Regs.TBPHS.half.TBPHS = 0x0000;           // Phase is 0
-   EPwm2Regs.TBCTR = 0x0000;                      // Clear counter
-   
-   // Set Compare values
-   EPwm2Regs.CMPA.half.CMPA = EPWM2_MIN_CMPA;     // Set compare A value
-   EPwm2Regs.CMPB = EPWM2_MIN_CMPB;               // Set Compare B value
-   
-   // Setup counter mode
-   EPwm2Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN; // Count up
-   EPwm2Regs.TBCTL.bit.PHSEN = TB_DISABLE;        // Disable phase loading
-   EPwm2Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1;       // Clock ratio to SYSCLKOUT
-   EPwm2Regs.TBCTL.bit.CLKDIV = TB_DIV1;
-
-   // Setup shadowing
-   EPwm2Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
-   EPwm2Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
-   EPwm2Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;  // Load on Zero
-   EPwm2Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;   
-
-
-   // Set actions
-   EPwm2Regs.AQCTLA.bit.CAU = AQ_SET;            // Set PWM2A on event A, up count
-   EPwm2Regs.AQCTLA.bit.CBD = AQ_CLEAR;          // Clear PWM2A on event B, down count
-
-   EPwm2Regs.AQCTLB.bit.ZRO = AQ_CLEAR;          // Clear PWM2B on zero
-   EPwm2Regs.AQCTLB.bit.PRD = AQ_SET  ;          // Set PWM2B on period
-
-   // Interrupt where we will change the Compare Values
-   EPwm2Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO;     // Select INT on Zero event
-   EPwm2Regs.ETSEL.bit.INTEN = 1;                // Enable INT
-   EPwm2Regs.ETPS.bit.INTPRD = ET_3RD;           // Generate INT on 3rd event   
-
-   // Information this example uses to keep track
-   // of the direction the CMPA/CMPB values are 
-   // moving, the min and max allowed values and
-   // a pointer to the correct ePWM registers
-   epwm2_info.EPwm_CMPA_Direction = EPWM_CMP_UP;   // Start by increasing CMPA & 
-   epwm2_info.EPwm_CMPB_Direction = EPWM_CMP_UP;   // increasing CMPB
-   epwm2_info.EPwmTimerIntCount = 0;               // Zero the interrupt counter
-   epwm2_info.EPwmRegHandle = &EPwm2Regs;          // Set the pointer to the ePWM module
-   epwm2_info.EPwmMaxCMPA = EPWM2_MAX_CMPA;        // Setup min/max CMPA/CMPB values
-   epwm2_info.EPwmMinCMPA = EPWM2_MIN_CMPA;       
-   epwm2_info.EPwmMaxCMPB = EPWM2_MAX_CMPB;    
-   epwm2_info.EPwmMinCMPB = EPWM2_MIN_CMPB;      
-   
-}
-
-void InitEPwm3Example(void)
-{
-
-   
-   // Setup TBCLK
-   EPwm3Regs.TBCTL.bit.CTRMODE = TB_COUNT_UPDOWN;// Count up/down
-   EPwm3Regs.TBPRD = EPWM3_TIMER_TBPRD;          // Set timer period
-   EPwm3Regs.TBCTL.bit.PHSEN = TB_DISABLE;       // Disable phase loading
-   EPwm3Regs.TBPHS.half.TBPHS = 0x0000;          // Phase is 0
-   EPwm3Regs.TBCTR = 0x0000;                     // Clear counter
-   EPwm3Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1;      // Clock ratio to SYSCLKOUT
-   EPwm3Regs.TBCTL.bit.CLKDIV = TB_DIV1;
-
-   // Setup shadow register load on ZERO
-   EPwm3Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
-   EPwm3Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
-   EPwm3Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
-   EPwm3Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;   
-
-  // Set Compare values
-   EPwm3Regs.CMPA.half.CMPA = EPWM3_MIN_CMPA;    // Set compare A value
-   EPwm3Regs.CMPB = EPWM3_MAX_CMPB;              // Set Compare B value
-   
-   // Set Actions
-   EPwm3Regs.AQCTLA.bit.PRD = AQ_SET;            // Set PWM3A on period
-   EPwm3Regs.AQCTLA.bit.CBD = AQ_CLEAR;          // Clear PWM3A on event B, down count
-
-   EPwm3Regs.AQCTLB.bit.PRD = AQ_CLEAR;          // Clear PWM3A on period
-   EPwm3Regs.AQCTLB.bit.CAU = AQ_SET;            // Set PWM3A on event A, up count
-
-   // Interrupt where we will change the Compare Values
-   EPwm3Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO;     // Select INT on Zero event
-   EPwm3Regs.ETSEL.bit.INTEN = 1;                // Enable INT
-   EPwm3Regs.ETPS.bit.INTPRD = ET_3RD;           // Generate INT on 3rd event   
-
-   // Information this example uses to keep track
-   // of the direction the CMPA/CMPB values are 
-   // moving, the min and max allowed values and
-   // a pointer to the correct ePWM registers
-   epwm3_info.EPwm_CMPA_Direction = EPWM_CMP_UP;   // Start by increasing CMPA & 
-   epwm3_info.EPwm_CMPB_Direction = EPWM_CMP_DOWN; // decreasing CMPB
-   epwm3_info.EPwmTimerIntCount = 0;               // Zero the interrupt counter
-   epwm3_info.EPwmRegHandle = &EPwm3Regs;          // Set the pointer to the ePWM module
-   epwm3_info.EPwmMaxCMPA = EPWM3_MAX_CMPA;        // Setup min/max CMPA/CMPB values
-   epwm3_info.EPwmMinCMPA = EPWM3_MIN_CMPA;       
-   epwm3_info.EPwmMaxCMPB = EPWM3_MAX_CMPB;    
-   epwm3_info.EPwmMinCMPB = EPWM3_MIN_CMPB;      
-   
-}
-
-
-
-void update_compare(EPWM_INFO *epwm_info)
-{
-   
-
-   // Every 10'th interrupt, change the CMPA/CMPB values
-   if(epwm_info->EPwmTimerIntCount == 10)
-   {
-       epwm_info->EPwmTimerIntCount = 0;
-       
-       // If we were increasing CMPA, check to see if 
-       // we reached the max value.  If not, increase CMPA
-       // else, change directions and decrease CMPA
-	   if(epwm_info->EPwm_CMPA_Direction == EPWM_CMP_UP)
-	   {
-	       if(epwm_info->EPwmRegHandle->CMPA.half.CMPA < epwm_info->EPwmMaxCMPA)
-	       {
-	          epwm_info->EPwmRegHandle->CMPA.half.CMPA++;
-	       }
-	       else
-	       {
-	          epwm_info->EPwm_CMPA_Direction = EPWM_CMP_DOWN;
-              epwm_info->EPwmRegHandle->CMPA.half.CMPA--;
-	       }
-	   }
-	   
-	   // If we were decreasing CMPA, check to see if 
-       // we reached the min value.  If not, decrease CMPA
-       // else, change directions and increase CMPA
-	   else
-	   {
-	       if(epwm_info->EPwmRegHandle->CMPA.half.CMPA == epwm_info->EPwmMinCMPA)
-	       {
-	          epwm_info->EPwm_CMPA_Direction = EPWM_CMP_UP;
-	          epwm_info->EPwmRegHandle->CMPA.half.CMPA++;
-	       }
-	       else
-	       {
-	          epwm_info->EPwmRegHandle->CMPA.half.CMPA--;
-	       }
-	   }
-	
-	   // If we were increasing CMPB, check to see if 
-       // we reached the max value.  If not, increase CMPB
-       // else, change directions and decrease CMPB
-	   if(epwm_info->EPwm_CMPB_Direction == EPWM_CMP_UP)
-	   {
-	       if(epwm_info->EPwmRegHandle->CMPB < epwm_info->EPwmMaxCMPB)
-	       {
-	          epwm_info->EPwmRegHandle->CMPB++;
-	       }
-	       else
-	       {
-	          epwm_info->EPwm_CMPB_Direction = EPWM_CMP_DOWN;
-	          epwm_info->EPwmRegHandle->CMPB--;
-	       }
-	   }
-
-	   // If we were decreasing CMPB, check to see if 
-       // we reached the min value.  If not, decrease CMPB
-       // else, change directions and increase CMPB
-
-	   else
-	   {
-	       if(epwm_info->EPwmRegHandle->CMPB == epwm_info->EPwmMinCMPB)
-	       {
-	          epwm_info->EPwm_CMPB_Direction = EPWM_CMP_UP;
-	          epwm_info->EPwmRegHandle->CMPB++;
-	       }
-	       else
-	       {
-	          epwm_info->EPwmRegHandle->CMPB--;
-	       }
-	   }
-   }
-   else 
-   {
-      epwm_info->EPwmTimerIntCount++;
-   }
-
-   return;
-}
-
-
-
-//===========================================================================
-// No more.
-//===========================================================================
diff --git a/Source/External/v120/DSP2833x_examples/epwm_updown_aq/Example_2833xEPwmUpDownAQ.gel b/Source/External/v120/DSP2833x_examples/epwm_updown_aq/Example_2833xEPwmUpDownAQ.gel
deleted file mode 100644
index 017de80..0000000
--- a/Source/External/v120/DSP2833x_examples/epwm_updown_aq/Example_2833xEPwmUpDownAQ.gel
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
-// TI File $Revision: /main/5 $
-// Checkin $Date: August 9, 2007   17:14:28 $
-//###########################################################################
-//
-// This .gel file can be used to help load and build the example project.
-// It should be unloaded from Code Composer Studio before loading another 
-// project. 
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-*/
-
-menuitem "DSP2833x ePWM UpDown AQ"
-
-hotmenu Load_and_Build_Project()
-{
-   GEL_ProjectLoad("Example_2833xEPwmUpDownAQ.pjt");
-   GEL_ProjectBuild("Example_2833xEPwmUpDownAQ.pjt");
-}
-
-hotmenu Load_Code()
-{
-   GEL_Load(".\\debug\\Example_2833xEPwmUpDownAQ.out");
-   Setup_WatchWindow();
-}
-
-hotmenu Setup_WatchWindow()
-{
-   GEL_WatchReset();
-   GEL_WatchAdd("EPwm1Regs,x");
-   GEL_WatchAdd("EPwm2Regs,x");
-   GEL_WatchAdd("EPwm3Regs,x");
-}
-
-
-
-
diff --git a/Source/External/v120/DSP2833x_examples/epwm_updown_aq/Example_2833xEPwmUpDownAQ.pjt b/Source/External/v120/DSP2833x_examples/epwm_updown_aq/Example_2833xEPwmUpDownAQ.pjt
deleted file mode 100644
index 56449fe..0000000
--- a/Source/External/v120/DSP2833x_examples/epwm_updown_aq/Example_2833xEPwmUpDownAQ.pjt
+++ /dev/null
@@ -1,46 +0,0 @@
-; Code Composer Project File, Version 2.0 (do not modify or remove this line)
-
-[Project Settings]
-ProjectName="DSP2833x"
-ProjectDir="C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\epwm_updown_aq\"
-ProjectType=Executable
-CPUFamily=TMS320C28XX
-Tool="Compiler"
-Tool="DspBiosBuilder"
-Tool="Linker"
-Config="Debug"
-Config="Release"
-
-[Source Files]
-Source="..\..\DSP2833x_common\source\DSP2833x_ADC_cal.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CodeStartBranch.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CpuTimers.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_DefaultIsr.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_EPwm.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieVect.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_SysCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_usDelay.asm"
-Source="..\..\DSP2833x_headers\source\DSP2833x_GlobalVariableDefs.c"
-Source="Example_2833xEPwmUpDownAQ.c"
-Source="..\..\DSP2833x_common\cmd\28335_RAM_lnk.cmd"
-Source="..\..\DSP2833x_headers\cmd\DSP2833x_Headers_nonBIOS.cmd"
-
-["Compiler" Settings: "Debug"]
-Options=-g -q -pdr -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\epwm_updown_aq\Debug" -fs"C:\tidcs\c28\DSP2833x\006\DSP2833x_examples\epwm_Symmetric_aq\Debug" -i"..\..\DSP2833x_headers\include" -i"..\..\DSP2833x_common\include" -d"_DEBUG" -d"LARGE_MODEL" --float_support=fpu32 -ml -mt -v28
-
-["Compiler" Settings: "Release"]
-Options=-q -o3 -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\epwm_updown_aq\Release" -d"LARGE_MODEL" -ml -v28
-
-["DspBiosBuilder" Settings: "Debug"]
-Options=-v28
-
-["DspBiosBuilder" Settings: "Release"]
-Options=-v28
-
-["Linker" Settings: "Debug"]
-Options=-q -c -ecode_start -m".\Debug\Example_2833xEPwmUpDownAQ.map" -o".\Debug\Example_2833xEPwmUpDownAQ.out" -stack0x380 -w -x -i"..\..\DSP2833x_headers\include" -l"rts2800_fpu32.lib"
-
-["Linker" Settings: "Release"]
-Options=-q -c -o".\Release\Example_2833xEPwmUpDownAQ.out" -x
-
diff --git a/Source/External/v120/DSP2833x_examples/eqep_freqcal/Example_2833xEqep_freqcal.c b/Source/External/v120/DSP2833x_examples/eqep_freqcal/Example_2833xEqep_freqcal.c
deleted file mode 100644
index 443b1b7..0000000
--- a/Source/External/v120/DSP2833x_examples/eqep_freqcal/Example_2833xEqep_freqcal.c
+++ /dev/null
@@ -1,178 +0,0 @@
-// TI File $Revision: /main/12 $
-// Checkin $Date: July 10, 2008   11:07:26 $
-//###########################################################################
-//
-// FILE:	Example_2833xEqep_freqcal.c
-//
-// TITLE:	Frequency measurement using EQEP peripheral
-//
-// ASSUMPTIONS:
-//
-//    This program requires the DSP2833x header files.
-//    As supplied, this project is configured for "boot to SARAM" operation.
-//
-//    Test requires the following hardware connections
-//
-//    GPIO20/EQEP1A <- External input - connect to GPIO0/EPWM1A
-//
-//    As supplied, this project is configured for "boot to SARAM"
-//    operation.  The 2833x Boot Mode table is shown below.
-//    For information on configuring the boot mode of an eZdsp,
-//    please refer to the documentation included with the eZdsp,
-//
-//       $Boot_Table:
-//
-//         GPIO87   GPIO86     GPIO85   GPIO84
-//          XA15     XA14       XA13     XA12
-//           PU       PU         PU       PU
-//        ==========================================
-//            1        1          1        1    Jump to Flash
-//            1        1          1        0    SCI-A boot
-//            1        1          0        1    SPI-A boot
-//            1        1          0        0    I2C-A boot
-//            1        0          1        1    eCAN-A boot
-//            1        0          1        0    McBSP-A boot
-//            1        0          0        1    Jump to XINTF x16
-//            1        0          0        0    Jump to XINTF x32
-//            0        1          1        1    Jump to OTP
-//            0        1          1        0    Parallel GPIO I/O boot
-//            0        1          0        1    Parallel XINTF boot
-//            0        1          0        0    Jump to SARAM	    <- "boot to SARAM"
-//            0        0          1        1    Branch to check boot mode
-//            0        0          1        0    Boot to flash, bypass ADC cal
-//            0        0          0        1    Boot to SARAM, bypass ADC cal
-//            0        0          0        0    Boot to SCI-A, bypass ADC cal
-//                                              Boot_Table_End$
-//
-// DESCRIPTION:
-//
-//    This test will provide frequency measurement using capture unit (freqhz_pr)
-//    and unit time out (freqhz_fr). The EPWM1A frequency will be measured by the EQEP.
-//
-//    By default, EPWM1A is configured to generate a frequency of 5 kHz - measured
-//    frequency found in freqhz_pr and freqhz_fr should be 5000.
-//
-//    See DESCRIPTION in Example_freqcal.c for more details on the frequency calculation
-//    performed in this example.
-//
-//    In addition to this file, the following files must be included in this project:
-//    Example_freqcal.c - includes all eQEP functions
-//    Example_EPwmSetup.c - sets up EPWM1A for use with this example
-//    Example_freqcalh - includes initialization values for frequency structure.
-//
-//    * Maximum frequency is configured to 10Khz (BaseFreq)
-//    * Minimum frequency is assumed at 50Hz for capture pre-scalar selection
-//
-//    SPEED_FR: High Frequency Measurement is obtained by counting the external input pulses
-//              for 10ms (unit timer set to 100Hz).
-//
-// 	  SPEED_FR = { (Count Delta)/10ms }
-//
-//
-//    SPEED_PR: Low Frequency Measurement is obtained by measuring time period of input edges.
-//              Time measurement is averaged over 64edges for better results and
-//              capture unit performs the time measurement using pre-scaled SYSCLK
-//
-//              Note that pre-scaler for capture unit clock is selected such that
-//              capture timer does not overflow at the required minimum frequency
-//
-//              This example runs forever until the user stops it.
-//
-//
-//    Watch Variables: freq.freqhz_fr - Frequency measurement using position counter/unit time out
-//                     freq.freqhz_pr - Frequency measurement using capture unit
-//
-//###########################################################################
-// Original Author: SD
-//
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File
-#include "Example_freqcal.h"    // Example specific include file
-
-void EPwmSetup(void);
-interrupt void prdTick(void);
-
-FREQCAL freq=FREQCAL_DEFAULTS;
-
-void main(void)
-{
-
-// Step 1. Initialize System Control:
-// PLL, WatchDog, enable Peripheral Clocks
-// This example function is found in the DSP2833x_SysCtrl.c file.
-   InitSysCtrl();
-
-// Step 2. Initalize GPIO:
-// This example function is found in the DSP2833x_Gpio.c file and
-// illustrates how to set the GPIO to it's default state.
-// InitGpio();  // Skipped for this example
-
-// Only init the GPIO for EQep1 and EPwm1 in this case
-// This function is found in DSP2833x_EQep.c
-   InitEQep1Gpio();
-   InitEPwm1Gpio();
-
-// Step 3. Clear all interrupts and initialize PIE vector table:
-// Disable CPU interrupts
-   DINT;
-
-// Initialize the PIE control registers to their default state.
-// The default state is all PIE interrupts disabled and flags
-// are cleared.
-// This function is found in the DSP2833x_PieCtrl.c file.
-   InitPieCtrl();
-
-// Disable CPU interrupts and clear all CPU interrupt flags:
-   IER = 0x0000;
-   IFR = 0x0000;
-
-// Initialize the PIE vector table with pointers to the shell Interrupt
-// Service Routines (ISR).
-// This will populate the entire table, even if the interrupt
-// is not used in this example.  This is useful for debug purposes.
-// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
-// This function is found in DSP2833x_PieVect.c.
-   InitPieVectTable();
-
-// Interrupts that are used in this example are re-mapped to
-// ISR functions found within this file.
-   EALLOW;  // This is needed to write to EALLOW protected registers
-   PieVectTable.EPWM1_INT= &prdTick;
-   EDIS;    // This is needed to disable write to EALLOW protected registers
-
-// Step 4. Initialize all the Device Peripherals:
-// Example specific ePWM setup.  This function is found
-// in Example_EPwmSetup.c
-   EPwmSetup();
-
-// Step 5. User specific code, enable interrupts:
-// Enable CPU INT1 which is connected to CPU-Timer 0:
-   IER |= M_INT3;
-
-// Enable TINT0 in the PIE: Group 3 interrupt 1
-   PieCtrlRegs.PIEIER3.bit.INTx1 = 1;
-
-// Enable global Interrupts and higher priority real-time debug events:
-   EINT;   // Enable Global interrupt INTM
-   ERTM;   // Enable Global realtime interrupt DBGM
-
-   freq.init(&freq);         // Initializes eQEP for frequency calculation in
-                             // FREQCAL_Init(void)function in Example_EPwmSetup.c
-	for(;;)
-	{
-	}
-
-}
-
-interrupt void prdTick(void) // Interrupts once per ePWM period
-{
-   freq.calc(&freq); // Checks for event and calculates frequency in FREQCAL_Calc(FREQCAL *p)
-                     // function in Example_EPwmSetup.c
-   // Acknowledge this interrupt to receive more interrupts from group 1
-   PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
-   EPwm1Regs.ETCLR.bit.INT=1;
-}
-
diff --git a/Source/External/v120/DSP2833x_examples/eqep_freqcal/Example_2833xEqep_freqcal.gel b/Source/External/v120/DSP2833x_examples/eqep_freqcal/Example_2833xEqep_freqcal.gel
deleted file mode 100644
index e76a9e2..0000000
--- a/Source/External/v120/DSP2833x_examples/eqep_freqcal/Example_2833xEqep_freqcal.gel
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
-// TI File $Revision: /main/6 $
-// Checkin $Date: August 9, 2007   17:14:43 $
-//###########################################################################
-//
-// This .gel file can be used to help load and build the example project.
-// It should be unloaded from Code Composer Studio before loading another 
-// projectn. 
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-*/
-
-menuitem "DSP2833x eQEP Frequency Calc"
-
-hotmenu Load_and_Build_Project()
-{
-   GEL_ProjectLoad("Example_2833xEqep_freqcal.pjt");
-   GEL_ProjectBuild("Example_2833xEqep_freqcal.pjt");
-   Setup_WatchWindow();
-}
-
-hotmenu Load_Code()
-{
-   GEL_Load(".\\debug\\Example_2833xEqep_freqcal.out");
-   Setup_WatchWindow();
-}
-
-hotmenu Setup_WatchWindow()
-{
-   GEL_WatchReset();
-   GEL_WatchAdd("freq.freqhz_fr",,"");
-   GEL_WatchAdd("freq.freqhz_pr",,"");
-   GEL_WatchAdd("EQep1Regs,x");
-}
diff --git a/Source/External/v120/DSP2833x_examples/eqep_freqcal/Example_2833xEqep_freqcal.pjt b/Source/External/v120/DSP2833x_examples/eqep_freqcal/Example_2833xEqep_freqcal.pjt
deleted file mode 100644
index 46676a4..0000000
--- a/Source/External/v120/DSP2833x_examples/eqep_freqcal/Example_2833xEqep_freqcal.pjt
+++ /dev/null
@@ -1,49 +0,0 @@
-; Code Composer Project File, Version 2.0 (do not modify or remove this line)
-
-[Project Settings]
-ProjectName="DSP2833x"
-ProjectDir="C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\eqep_freqcal\"
-ProjectType=Executable
-CPUFamily=TMS320C28XX
-Tool="Compiler"
-Tool="CustomBuilder"
-Tool="DspBiosBuilder"
-Tool="Linker"
-Config="Debug"
-Config="Release"
-
-[Source Files]
-Source="..\..\DSP2833x_common\source\DSP2833x_ADC_cal.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CodeStartBranch.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_DefaultIsr.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_EPwm.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_EQep.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieVect.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_SysCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_usDelay.asm"
-Source="..\..\DSP2833x_headers\source\DSP2833x_GlobalVariableDefs.c"
-Source="..\..\DSP2833x_common\lib\IQmath_fpu32.lib"
-Source="Example_2833xEqep_freqcal.c"
-Source="Example_EPwmSetup.c"
-Source="Example_freqcal.c"
-Source="..\..\DSP2833x_common\cmd\28335_RAM_lnk.cmd"
-Source="..\..\DSP2833x_headers\cmd\DSP2833x_Headers_nonBIOS.cmd"
-
-["Compiler" Settings: "Debug"]
-Options=-g -q -pdr -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\eqep_freqcal\Debug" -fs"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\eqep_freqcal\Debug" -i".." -i"..\..\DSP2833x_headers\include" -i"..\..\DSP2833x_common\include" -i"..\..\DSP2833x_common\lib" -d"_DEBUG" -d"LARGE_MODEL" -ml -mt -v28 --float_support=fpu32
-
-["Compiler" Settings: "Release"]
-Options=-q -o3 -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\eqep_freqcal\Release" -d"LARGE_MODEL" -ml -v28
-
-["DspBiosBuilder" Settings: "Debug"]
-Options=-v28
-
-["DspBiosBuilder" Settings: "Release"]
-Options=-v28
-
-["Linker" Settings: "Debug"]
-Options=-q -c -ecode_start -m".\Debug\Example_2833xEqep_freqcal.map" -o".\Debug\Example_2833xEqep_freqcal.out" -stack0x380 -w -x -i"..\..\DSP2833x_headers\include" -l"rts2800_fpu32.lib"
-
-["Linker" Settings: "Release"]
-Options=-q -c -o".\Release\Example_2833xEqep_freqcal.out" -x
\ No newline at end of file
diff --git a/Source/External/v120/DSP2833x_examples/eqep_freqcal/Example_EPwmSetup.c b/Source/External/v120/DSP2833x_examples/eqep_freqcal/Example_EPwmSetup.c
deleted file mode 100644
index 9f5aa7f..0000000
--- a/Source/External/v120/DSP2833x_examples/eqep_freqcal/Example_EPwmSetup.c
+++ /dev/null
@@ -1,76 +0,0 @@
-// TI File $Revision: /main/10 $
-// Checkin $Date: April 21, 2008   15:42:03 $
-//###########################################################################
-//
-// FILE:	Example_EpwmSetup.c
-//
-// TITLE:	Frequency measurement using EQEP peripheral
-//
-// DESCRIPTION:
-//
-// This file contains source for the ePWM initialization for the
-// freq calculation module
-//
-//###########################################################################
-// Original Author: SD
-//
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File
-#include "Example_freqcal.h"    // Example specific include file
-
-#if (CPU_FRQ_150MHZ)
-  #define CPU_CLK   150e6
-#endif
-#if (CPU_FRQ_100MHZ)
-  #define CPU_CLK   100e6
-#endif
-#define PWM_CLK   5e3                 // If diff freq. desired, change freq here.
-#define SP        CPU_CLK/(2*PWM_CLK)
-#define TBCTLVAL  0x200E              // Up-down cnt, timebase = SYSCLKOUT
-
-
-void EPwmSetup()
-{
-    InitEPwm1Gpio();
-	EPwm1Regs.TBSTS.all=0;
-	EPwm1Regs.TBPHS.half.TBPHS=0;
-	EPwm1Regs.TBCTR=0;
-
-	EPwm1Regs.CMPCTL.all=0x50;        // Immediate mode for CMPA and CMPB
-	EPwm1Regs.CMPA.half.CMPA =SP/2;
-	EPwm1Regs.CMPB=0;
-
-	EPwm1Regs.AQCTLA.all=0x60;        // EPWMxA = 1 when CTR=CMPA and counter inc
-	                                  // EPWMxA = 0 when CTR=CMPA and counter dec
-	EPwm1Regs.AQCTLB.all=0;
-	EPwm1Regs.AQSFRC.all=0;
-	EPwm1Regs.AQCSFRC.all=0;
-
-	EPwm1Regs.DBCTL.all=0xb;          // EPWMxB is inverted
-	EPwm1Regs.DBRED=0;
-	EPwm1Regs.DBFED=0;
-
-	EPwm1Regs.TZSEL.all=0;
-	EPwm1Regs.TZCTL.all=0;
-	EPwm1Regs.TZEINT.all=0;
-	EPwm1Regs.TZFLG.all=0;
-	EPwm1Regs.TZCLR.all=0;
-	EPwm1Regs.TZFRC.all=0;
-
-	EPwm1Regs.ETSEL.all=9;            // Interrupt when TBCTR = 0x0000
-	EPwm1Regs.ETPS.all=1;	          // Interrupt on first event
-	EPwm1Regs.ETFLG.all=0;
-	EPwm1Regs.ETCLR.all=0;
-	EPwm1Regs.ETFRC.all=0;
-
-	EPwm1Regs.PCCTL.all=0;
-
-	EPwm1Regs.TBCTL.all=0x0010+TBCTLVAL;			// Enable Timer
-	EPwm1Regs.TBPRD=SP;
-
-}
-
-
diff --git a/Source/External/v120/DSP2833x_examples/eqep_freqcal/Example_freqcal.c b/Source/External/v120/DSP2833x_examples/eqep_freqcal/Example_freqcal.c
deleted file mode 100644
index 500705e..0000000
--- a/Source/External/v120/DSP2833x_examples/eqep_freqcal/Example_freqcal.c
+++ /dev/null
@@ -1,186 +0,0 @@
-// TI File $Revision: /main/10 $
-// Checkin $Date: April 21, 2008   15:42:07 $
-//###########################################################################
-//
-// FILE:	Example_freqcal.c
-//
-// TITLE:	Frequency measurement using EQEP peripheral
-//
-// DESCRIPTION:
-//
-// This file includes the EQEP initialization and frequency calcuation
-// functions called by Example_2833xEqep_freqcal.c.  The frequency calculation
-// steps performed by FREQCAL_Calc()at  SYSCLKOUT = 150 MHz and 100 MHz are
-// described below:
-//
-// For 150 MHz Operation:
-// ----------------------
-//
-// 1. This program calculates: **freqhz_fr**
-//    freqhz_fr or v = (x2-x1)/T                                                 - Equation 1
-//
-// If max/base freq = 10kHz:   10kHz = (x2-x1)/(2/100Hz)                         - Equation 2
-//                      max (x2-x1) = 200 counts = freqScaler_fr
-//		Note: T = 2/100Hz. 2 is from (x2-x1)/2 - because QPOSCNT counts 2 edges per cycle
-//		                                         (rising and falling)
-//
-// If both sides of Equation 2 are divided by 10 kHz, then:
-//                            1 = (x2-x1)/[10kHz*(2/100Hz)] where [10kHz* (2/100Hz)] = 200
-//							Because (x2-x1) must be <200 (max),
-//						    (x2-x1)/200 < 1 for all frequencies less than max
-//							freq_fr = (x2-x1)/200 or (x2-x1)/[10kHz*(2/100Hz)]    - Equation 3
-//
-// To get back to original velocity equation, Equation 1, multiply Equation 3 by 10 kHz
-//                           freqhz_fr (or velocity) = 10kHz*(x2-x1)/[10kHz*(2/100Hz)]
-//						                           = (x2-x1)/(2/100Hz)           - Final equation
-//
-// 2. min freq = 1 count/(2/100Hz) = 50 Hz
-//
-// 3. **freqhz_pr**
-//    freqhz_pr or v = X/(t2-t1)                                                 - Equation 4
-//
-// If max/base freq = 10kHz:  10kHz = (4/2)/T = 4/2T
-//    where 4 = QCAPCTL [UPPS] (Unit timeout - once every 4 edges)
-//		    2 = divide by 2 because QPOSCNT counts 2 edges per cycle (rising and falling)
-//		    T = time in seconds
-//            = t2-t1/(150MHz/128),  t2-t1= # of QCAPCLK cycles, and
-//		                  1 QCAPCLK cycle = 1/(150MHz/128)
-//										  = QCPRDLAT
-//
-//		        So: 10 kHz = 4(150MHz/128)/2(t2-t1)
-//		             t2-t1 = 4(150MHz/128)/(10kHz*2) = (150MHz/128)/(2*10kHz/4)  - Equation 5
-//		                   = 234 QCAPCLK cycles = maximum (t2-t1) = freqScaler_pr
-//
-// Divide both sides by (t2-t1), and:
-//                   1 = 234/(t2-t1) = [150MHz/128)/(2*10kHz/4)]/(t2-t1)
-//				     Because (t2-t1) must be <234 (max).
-//				     234/(t2-t1) < 1 for all frequencies less than max
-//					 freq_pr = 234/(t2-t1) or [150MHz/128)/(2*10kHz/4)]/(t2-t1)  - Equation 6
-// Now within velocity limits, to get back to original velocity equation, Equation 1,
-// multiply Equation 6 by 10 kHz:
-//                  freqhz_fr (or velocity) = 10kHz*[150MHz/128)/(2*10kHz/4)]/(t2-t1)
-//							                = (105MHz/128)*4/[2(t2-t1)]
-//                                            or 4/[2*(t2-t1)(QCPRDLAT)]        - Final Equation
-//
-//
-// For 100 MHz Operation:
-// ----------------------
-//
-// The same calculations as above are performed, but with 100 MHz
-// instead of 150MHz when calculating freqhz_pr, and at UPPS of 8 instead of 4.
-// The value for freqScaler_pr becomes: (100MHz/128)/(2*10kHz/8) = 313
-// More detailed calculation results can be found in the Example_freqcal.xls
-// spreadsheet included in the example folder.
-//
-//
-// This file contains source for the freq calculation module
-//
-//###########################################################################
-// Original Author: SD
-//
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File
-#include "Example_freqcal.h"    // Example specific include file
-
-void  FREQCAL_Init(void)
-{
-    #if (CPU_FRQ_150MHZ)
-	  EQep1Regs.QUPRD=1500000;			// Unit Timer for 100Hz at 150MHz SYSCLKOUT
-	#endif
-    #if (CPU_FRQ_100MHZ)
-	  EQep1Regs.QUPRD=1000000;			// Unit Timer for 100Hz at 100MHz SYSCLKOUT
-	#endif
-
-	EQep1Regs.QDECCTL.bit.QSRC=2;		// Up count mode (freq. measurement)
-	EQep1Regs.QDECCTL.bit.XCR=0;        // 2x resolution (cnt falling and rising edges)
-
-	EQep1Regs.QEPCTL.bit.FREE_SOFT=2;
-	EQep1Regs.QEPCTL.bit.PCRM=00;		// QPOSCNT reset on index evnt
-	EQep1Regs.QEPCTL.bit.UTE=1; 		// Unit Timer Enable
-	EQep1Regs.QEPCTL.bit.QCLM=1; 		// Latch on unit time out
-	EQep1Regs.QPOSMAX=0xffffffff;
-	EQep1Regs.QEPCTL.bit.QPEN=1; 		// QEP enable
-
-	#if (CPU_FRQ_150MHZ)
-	  EQep1Regs.QCAPCTL.bit.UPPS=2;   	// 1/4 for unit position at 150MHz SYSCLKOUT
-	#endif
-	#if (CPU_FRQ_100MHZ)
-	  EQep1Regs.QCAPCTL.bit.UPPS=3;   	// 1/8 for unit position at 100MHz SYSCLKOUT
-	#endif
-
-	EQep1Regs.QCAPCTL.bit.CCPS=7;		// 1/128 for CAP clock
-	EQep1Regs.QCAPCTL.bit.CEN=1; 		// QEP Capture Enable
-
-}
-
-void FREQCAL_Calc(FREQCAL *p)
-{
-     unsigned long tmp;
-   	 _iq newp,oldp;
-
-
-//**** Freq Calcultation using QEP position counter ****//
-// Check unit Time out-event for speed calculation:
-// Unit Timer is configured for 100Hz in INIT function
-
-// For a more detailed explanation of the calculation, read
-// the description at the top of this file
-
-	if(EQep1Regs.QFLG.bit.UTO==1)                  // Unit Timeout event
-	{
-		/** Differentiator	**/
-	 	newp=EQep1Regs.QPOSLAT;                    // Latched POSCNT value
-		oldp=p->oldpos;
-
-    	if (newp>oldp)
-      		tmp = newp - oldp;                     // x2-x1 in v=(x2-x1)/T equation
-    	else
-      		tmp = (0xFFFFFFFF-oldp)+newp;
-
-		p->freq_fr = _IQdiv(tmp,p->freqScaler_fr); // p->freq_fr = (x2-x1)/(T*10KHz)
-		tmp=p->freq_fr;
-
-		if (tmp>=_IQ(1))          // is freq greater than max freq (10KHz for this example)?
-	 		p->freq_fr = _IQ(1);
-		else
-	 		p->freq_fr = tmp;
-
-		p->freqhz_fr = _IQmpy(p->BaseFreq,p->freq_fr); 	// Q0 = Q0*GLOBAL_Q => _IQXmpy(), X = GLOBAL_Q
-		                                                // p->freqhz_fr = (p->freq_fr)*10kHz = (x2-x1)/T
-
-		// Update position counter
-    	p->oldpos = newp;
-		//=======================================
-
-		EQep1Regs.QCLR.bit.UTO=1;					// Clear interrupt flag
-	}
-
-//**** Freq Calcultation using QEP capture counter ****//
-	if(EQep1Regs.QEPSTS.bit.UPEVNT==1)              // Unit Position Event
-	{
-		if(EQep1Regs.QEPSTS.bit.COEF==0)            // No Capture overflow
-			tmp=(unsigned long)EQep1Regs.QCPRDLAT;
-		else							            // Capture overflow, saturate the result
-			tmp=0xFFFF;
-
-		p->freq_pr = _IQdiv(p->freqScaler_pr,tmp);  // p->freq_pr = X/[(t2-t1)*10KHz]
-		tmp=p->freq_pr;
-
-		if (tmp>_IQ(1))
-	 		p->freq_pr = _IQ(1);
-		else
-	 		p->freq_pr = tmp;
-
-		p->freqhz_pr = _IQmpy(p->BaseFreq,p->freq_pr); 	// Q0 = Q0*GLOBAL_Q => _IQXmpy(), X = GLOBAL_Q
-	                                                    // p->freqhz_pr =( p->freq_pr)*10kHz = X/(t2-t1)
-		EQep1Regs.QEPSTS.all=0x88;					    // Clear Unit position event flag
-												     	// Clear overflow error flag
-	}
-
-
-}
-
-
diff --git a/Source/External/v120/DSP2833x_examples/eqep_freqcal/Example_freqcal.h b/Source/External/v120/DSP2833x_examples/eqep_freqcal/Example_freqcal.h
deleted file mode 100644
index 874e66f..0000000
--- a/Source/External/v120/DSP2833x_examples/eqep_freqcal/Example_freqcal.h
+++ /dev/null
@@ -1,112 +0,0 @@
-// TI File $Revision: /main/6 $
-// Checkin $Date: August 9, 2007   17:14:59 $
-//###########################################################################
-//
-// FILE:	Example_freqcal.h
-//
-// TITLE:	Frequency measurement using EQEP peripheral
-//
-// DESCRIPTION:
-//
-// Header file containing data type and object definitions and
-// initializers.
-//
-//###########################################################################
-// Original Author: SD
-//
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-#ifndef __FREQCAL__
-#define __FREQCAL__
-
-#include "IQmathLib.h"         // Include header for IQmath library
-/*-----------------------------------------------------------------------------
-Define the structure of the FREQCAL Object
------------------------------------------------------------------------------*/
-typedef struct {
-                Uint32 freqScaler_pr;   // Parameter : Scaler converting 1/N cycles to a GLOBAL_Q freq (Q0) - independently with global Q
-                Uint32 freqScaler_fr;   // Parameter : Scaler converting 1/N cycles to a GLOBAL_Q freq (Q0) - independently with global Q
-                Uint32 BaseFreq;        // Parameter : Maximum Freq
-                _iq freq_pr;            // Output :  Freq in per-unit using capture unit
-				int32 freqhz_pr;        // Output: Freq in Hz, measured using Capture unit
-                Uint32 oldpos;
-                _iq freq_fr;            // Output : Freq in per-unit using position counter
-                int32 freqhz_fr; 	    // Output: Freq in Hz, measured using Capture unit
-                void (*init)();     	// Pointer to the init funcion
-                void (*calc)();    		// Pointer to the calc funtion
-                }  FREQCAL;
-
-/*-----------------------------------------------------------------------------
-Define a QEP_handle
------------------------------------------------------------------------------*/
-typedef FREQCAL *FREQCAL_handle;
-
-/*-----------------------------------------------------------------------------
-Default initializer for the FREQCAL Object.
------------------------------------------------------------------------------*/
-
-
-#if (CPU_FRQ_150MHZ)
-  #define FREQCAL_DEFAULTS {\
-		234,200,10000,0,0,\
-		0,0,0,\
-		(void (*)(long))FREQCAL_Init,\
-        (void (*)(long))FREQCAL_Calc }
-#endif
-#if (CPU_FRQ_100MHZ)
-  #define FREQCAL_DEFAULTS {\
-		313,200,10000,0,0,\
-		0,0,0,\
-		(void (*)(long))FREQCAL_Init,\
-        (void (*)(long))FREQCAL_Calc }
-#endif
-
-/*-----------------------------------------------------------------------------
-Prototypes for the functions in Example_freqcal.c
------------------------------------------------------------------------------*/
-void FREQCAL_Init(void);
-void FREQCAL_Calc(FREQCAL_handle);
-
-#endif /*  __FREQCAL__ */
-
-/* Notes:
-
-For 150 MHz Operation:
-----------------------
-1. freqScaler_fr
-   v = (x2-x1)/T                                                                - Equation 1
-
- If max/base freq = 10kHz:   10kHz = (x2-x1)/(2/100Hz)                           - Equation 2
-                      max (x2-x1) = 200 counts = freqScaler_fr
-		Note: T = 2/100Hz. 2 is from (x2-x1)/2 - because QPOSCNT counts 2 edges per cycle
-		                                         (rising and falling)
-   freqhz_fr = 200 default
-
-2. min freq = 1 count/(2/100Hz) = 50 Hz
-
-3. freqScaler_pr
-   v = X/(t2-t1)                                                                - Equation 4
-
- If max/base freq = 10kHz:  10kHz = 8/(2T)
-        where 4 = QCAPCTL [UPPS] (Unit timeout - once every 4 edges)
-		 T = time in seconds = t2-t1/(150MHz/128),  t2-t1= # of QCAPCLK cycles, and
-		                                           1 QCAPCLK cycle = 1/(150MHz/128)
-												 = QCPRDLAT
-		        So: 10 kHz = 4(150MHz/128)/2(t2-t1)
-		             t2-t1 = 4(150MHz/128)/(10kHz*2) = (150MHz/128)/(2*10kHz/4)   - Equation 5
-		                   = 234 seconds = maximum (t2-t1) = freqScaler_pr
-   freqhz_pr = 234 default
-
-
-For 100 MHz Operation:
-----------------------
-
-The same calculations as above are performed, but with 100 MHz
-instead of 150MHz when calculation freqhr_pr, and at UPPS of 8 instead of 4.
-The value for freqScaler_pr becomes: (100MHz/128)/(2*10kHz/8) = 313
-More detailed calculation results can be found in the Example_freqcal.xls
-spreadsheet included in the example folder.
-
-*/
diff --git a/Source/External/v120/DSP2833x_examples/eqep_freqcal/Example_freqcal.xls b/Source/External/v120/DSP2833x_examples/eqep_freqcal/Example_freqcal.xls
deleted file mode 100644
index a7128d2..0000000
Binary files a/Source/External/v120/DSP2833x_examples/eqep_freqcal/Example_freqcal.xls and /dev/null differ
diff --git a/Source/External/v120/DSP2833x_examples/eqep_pos_speed/Example_2833xEqep_pos_speed.c b/Source/External/v120/DSP2833x_examples/eqep_pos_speed/Example_2833xEqep_pos_speed.c
deleted file mode 100644
index 9475939..0000000
--- a/Source/External/v120/DSP2833x_examples/eqep_pos_speed/Example_2833xEqep_pos_speed.c
+++ /dev/null
@@ -1,201 +0,0 @@
-// TI File $Revision: /main/11 $
-// Checkin $Date: July 10, 2008   11:06:28 $
-//###########################################################################
-//
-// FILE:	Example_2833xEqep_pos_speed_.c
-//
-// TITLE:	EQEP Speed and Position measurement
-//
-// ASSUMPTIONS:
-//
-//    This program requires the DSP2833x header files.
-//
-//    Test requires the following hardware connections from EPWM1 and
-//    GPIO pins (simulating QEP sensor) to QEP peripheral
-//
-//       GPIO20/EQEP1A <- GPIO0/EPWM1A (simulates EQEP Phase A signal)
-//       GPIO21/EQEP1B <- GPIO1/EPWM1B (simulates EQEP Phase B signal)
-//       GPIO23/EQEP1I <- GPIO4 (simulates EQEP Index Signal)
-//
-//
-//    As supplied, this project is configured for "boot to SARAM"
-//    operation.  The 2833x Boot Mode table is shown below.
-//    For information on configuring the boot mode of an eZdsp,
-//    please refer to the documentation included with the eZdsp,
-//
-//       $Boot_Table:
-//
-//         GPIO87   GPIO86     GPIO85   GPIO84
-//          XA15     XA14       XA13     XA12
-//           PU       PU         PU       PU
-//        ==========================================
-//            1        1          1        1    Jump to Flash
-//            1        1          1        0    SCI-A boot
-//            1        1          0        1    SPI-A boot
-//            1        1          0        0    I2C-A boot
-//            1        0          1        1    eCAN-A boot
-//            1        0          1        0    McBSP-A boot
-//            1        0          0        1    Jump to XINTF x16
-//            1        0          0        0    Jump to XINTF x32
-//            0        1          1        1    Jump to OTP
-//            0        1          1        0    Parallel GPIO I/O boot
-//            0        1          0        1    Parallel XINTF boot
-//            0        1          0        0    Jump to SARAM	    <- "boot to SARAM"
-//            0        0          1        1    Branch to check boot mode
-//            0        0          1        0    Boot to flash, bypass ADC cal
-//            0        0          0        1    Boot to SARAM, bypass ADC cal
-//            0        0          0        0    Boot to SCI-A, bypass ADC cal
-//                                              Boot_Table_End$
-//
-// DESCRIPTION:
-//
-//    This test will provide position measurement,  speed measurement using the capture unit, and
-//    speed measurement using unit time out. This example uses the IQMath library. It is used
-//    merely to simplify high-precision calculations.
-//
-//    See DESCRIPTION in Example_posspeed.c for more details on the calculations
-//    performed in this example.
-//
-//    In addition to this file, the following files must be included in this project:
-//    Example_posspeed.c - includes all eQEP functions
-//    Example_EPwmSetup.c - sets up EPWM1A and EPWM1B as simulated QA and QB encoder signals
-//    Example_posspeed.h - includes initialization values for pos and speed structure
-//
-//    Notes:
-//    * Maximum speed is configured to 6000rpm(BaseRpm)
-//    * Minimum speed is assumed at 10rpm for capture pre-scalar selection
-//    * Pole pair is configured to 2 (pole_pairs)
-//    * QEP Encoder resolution is configured to 4000counts/revolution (mech_scaler)
-//      which means: 4000/4 = 1000 line/revolution quadrature encoder (simulated by EPWM1)
-//    * EPWM1 (simulating QEP encoder signals) is configured for 5kHz frequency or 300 rpm
-//      (=4*5000 cnts/sec * 60 sec/min)/4000 cnts/rev)
-//    * 300 rpm EPWM1 speed will be measured by EQEP.
-//
-// 	  SPEEDRPM_FR: High Speed Measurement is obtained by counting the QEP input pulses
-//              for 10ms (unit timer set to 100Hz).
-//
-//    SPEEDRPM_FR = { (Position Delta)/10ms } * 60 rpm
-//
-//
-//    SPEEDRPM_PR: Low Speed Measurement is obtained by measuring time period of QEP edges.
-//              Time measurement is averaged over 64edges for better results and
-//              capture unit performs the time measurement using pre-scaled SYSCLK
-//
-//              Note that pre-scaler for capture unit clock is selected such that
-//              capture timer does not overflow at the required minimum RPM speed
-//
-//          Watch Variables: qep_posspeed.SpeedRpm_fr - Speed meas. in rpm using QEP position counter
-//                           qep_posspeed.SpeedRpm_pr - Speed meas. in rpm using capture unit
-//                           qep_posspeed.theta_mech - Motor mechanical angle (Q15)
-//                           qep_posspeed.theta_elec - Motor electrical angle (Q15)
-//
-//###########################################################################
-// Original Author S.D.
-//
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File
-#include "Example_posspeed.h"   // Example specific Include file
-
-void initEpwm();
-interrupt void prdTick(void);
-
-POSSPEED qep_posspeed=POSSPEED_DEFAULTS;
-Uint16 Interrupt_Count = 0;
-
-void main(void)
-{
-
-// Step 1. Initialize System Control:
-// PLL, WatchDog, enable Peripheral Clocks
-// This example function is found in the DSP2833x_SysCtrl.c file.
-   InitSysCtrl();
-// Step 2. Initalize GPIO:
-// This example function is found in the DSP2833x_Gpio.c file and
-// illustrates how to set the GPIO to it's default state.
-// InitGpio();  // Skipped for this example
-
-// For this case only init GPIO for eQEP1 and ePWM1
-// This function is found in DSP2833x_EQep.c
-   InitEQep1Gpio();
-   InitEPwm1Gpio();
-   EALLOW;
-   GpioCtrlRegs.GPADIR.bit.GPIO4 = 1;    // GPIO4 as output simulates Index signal
-   GpioDataRegs.GPACLEAR.bit.GPIO4 = 1;  // Normally low
-   EDIS;
-// Step 3. Clear all interrupts and initialize PIE vector table:
-// Disable CPU interrupts
-   DINT;
-
-// Initialize the PIE control registers to their default state.
-// The default state is all PIE interrupts disabled and flags
-// are cleared.
-// This function is found in the DSP2833x_PieCtrl.c file.
-   InitPieCtrl();
-
-// Disable CPU interrupts and clear all CPU interrupt flags:
-   IER = 0x0000;
-   IFR = 0x0000;
-
-// Initialize the PIE vector table with pointers to the shell Interrupt
-// Service Routines (ISR).
-// This will populate the entire table, even if the interrupt
-// is not used in this example.  This is useful for debug purposes.
-// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
-// This function is found in DSP2833x_PieVect.c.
-   InitPieVectTable();
-
-// Interrupts that are used in this example are re-mapped to
-// ISR functions found within this file.
-   EALLOW;  // This is needed to write to EALLOW protected registers
-   PieVectTable.EPWM1_INT= &prdTick;
-   EDIS;    // This is needed to disable write to EALLOW protected registers
-
-// Step 4. Initialize all the Device Peripherals:
-   initEpwm();  // This function exists in Example_EPwmSetup.c
-
-// Step 5. User specific code, enable interrupts:
-// Enable CPU INT1 which is connected to CPU-Timer 0:
-   IER |= M_INT3;
-
-// Enable TINT0 in the PIE: Group 3 interrupt 1
-   PieCtrlRegs.PIEIER3.bit.INTx1 = 1;
-
-// Enable global Interrupts and higher priority real-time debug events:
-   EINT;   // Enable Global interrupt INTM
-   ERTM;   // Enable Global realtime interrupt DBGM
-
-   qep_posspeed.init(&qep_posspeed);
-
-	for(;;)
-	{
-	}
-
-}
-
-
-interrupt void prdTick(void)                  // EPWM1 Interrupts once every 4 QCLK counts (one period)
-{  Uint16 i;
-   // Position and Speed measurement
-   qep_posspeed.calc(&qep_posspeed);
-
-   // Control loop code for position control & Speed contol
-   Interrupt_Count++;
-   if (Interrupt_Count==1000)                 // Every 1000 interrupts(4000 QCLK counts or 1 rev.)
-   {
-       EALLOW;
-       GpioDataRegs.GPASET.bit.GPIO4 = 1;     // Pulse Index signal  (1 pulse/rev.)
-       for (i=0; i<700; i++){
-       }
-       GpioDataRegs.GPACLEAR.bit.GPIO4 = 1;
-	   Interrupt_Count = 0;                   // Reset count
-	   EDIS;
-   }
-
-   // Acknowledge this interrupt to receive more interrupts from group 1
-   PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
-   EPwm1Regs.ETCLR.bit.INT=1;
-}
-
diff --git a/Source/External/v120/DSP2833x_examples/eqep_pos_speed/Example_2833xEqep_pos_speed.gel b/Source/External/v120/DSP2833x_examples/eqep_pos_speed/Example_2833xEqep_pos_speed.gel
deleted file mode 100644
index eb40b6a..0000000
--- a/Source/External/v120/DSP2833x_examples/eqep_pos_speed/Example_2833xEqep_pos_speed.gel
+++ /dev/null
@@ -1,39 +0,0 @@
-/*
-// TI File $Revision: /main/6 $
-// Checkin $Date: August 9, 2007   17:15:15 $
-//###########################################################################
-//
-// This .gel file can be used to help load and build the example project.
-// It should be unloaded from Code Composer Studio before loading another 
-// project. 
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-*/
-
-menuitem "DSP2833x eQEP Posspeed"
-
-hotmenu Load_and_Build_Project()
-{
-   GEL_ProjectLoad("Example_2833xEqep_pos_speed.pjt");
-   GEL_ProjectBuild("Example_2833xEqep_pos_speed.pjt");
-   Setup_WatchWindow();
-}
-
-hotmenu Load_Code()
-{
-   GEL_Load(".\\debug\\Example_2833xEqep_pos_speed.out");
-   Setup_WatchWindow();
-}
-
-hotmenu Setup_WatchWindow()
-{
-   GEL_WatchReset();
-   GEL_WatchAdd("qep_posspeed.SpeedRpm_fr",,"");
-   GEL_WatchAdd("qep_posspeed.SpeedRpm_pr",,"");
-   GEL_WatchAdd("qep_posspeed.theta_mech",,"");
-   GEL_WatchAdd("qep_posspeed.theta_elec",,"");
-   GEL_WatchAdd("EQep1Regs,x");
-}
diff --git a/Source/External/v120/DSP2833x_examples/eqep_pos_speed/Example_2833xEqep_pos_speed.pjt b/Source/External/v120/DSP2833x_examples/eqep_pos_speed/Example_2833xEqep_pos_speed.pjt
deleted file mode 100644
index 1463168..0000000
--- a/Source/External/v120/DSP2833x_examples/eqep_pos_speed/Example_2833xEqep_pos_speed.pjt
+++ /dev/null
@@ -1,56 +0,0 @@
-; Code Composer Project File, Version 2.0 (do not modify or remove this line)
-
-[Project Settings]
-ProjectName="DSP2833x"
-ProjectDir="C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\eqep_pos_speed\"
-ProjectType=Executable
-CPUFamily=TMS320C28XX
-Tool="Compiler"
-Tool="CustomBuilder"
-Tool="DspBiosBuilder"
-Tool="Linker"
-Config="Debug"
-Config="Release"
-
-[Source Files]
-Source="..\..\DSP2833x_common\source\DSP2833x_ADC_cal.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CodeStartBranch.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_DefaultIsr.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_EPwm.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_EQep.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieVect.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_SysCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_usDelay.asm"
-Source="..\..\DSP2833x_headers\source\DSP2833x_GlobalVariableDefs.c"
-Source="..\..\DSP2833x_common\lib\IQmath_fpu32.lib"
-Source="Example_2833xEqep_pos_speed.c"
-Source="Example_EPwmSetup.c"
-Source="Example_posspeed.c"
-Source="..\..\DSP2833x_common\cmd\28335_RAM_lnk.cmd"
-Source="..\..\DSP2833x_headers\cmd\DSP2833x_Headers_nonBIOS.cmd"
-
-["Compiler" Settings: "Debug"]
-Options=-g -q -pdr -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\eqep_pos_speed\Debug" -fs"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\eqep_pos_speed\Debug" -i".." -i"..\..\DSP2833x_headers\include" -i"..\..\DSP2833x_common\include" -i"..\..\DSP2833x_common\lib" -d"_DEBUG" -d"LARGE_MODEL" -ml -mt -v28 --float_support=fpu32
-
-["Compiler" Settings: "Release"]
-Options=-q -o3 -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\eqep_pos_speed\Release" -d"LARGE_MODEL" -ml -v28
-
-["DspBiosBuilder" Settings: "Debug"]
-Options=-v28
-
-["DspBiosBuilder" Settings: "Release"]
-Options=-v28
-
-["Linker" Settings: "Debug"]
-Options=-q -c -ecode_start -m".\Debug\Example_2833xEqep_pos_speed.map" -o".\Debug\Example_2833xEqep_pos_speed.out" -stack0x380 -w -x -i"..\..\DSP2833x_headers\include" -l"rts2800_fpu32.lib"
-
-["Linker" Settings: "Release"]
-Options=-q -c -o".\Release\Example_2833xEqep_pos_speed.out" -x
-
-["..\..\DSP2833x_common\cmd\28335_RAM_lnk.cmd" Settings: "Debug"]
-LinkOrder=1
-
-["..\..\DSP2833x_common\cmd\28335_RAM_lnk.cmd" Settings: "Release"]
-
-
diff --git a/Source/External/v120/DSP2833x_examples/eqep_pos_speed/Example_EPwmSetup.c b/Source/External/v120/DSP2833x_examples/eqep_pos_speed/Example_EPwmSetup.c
deleted file mode 100644
index 9d4ef5a..0000000
--- a/Source/External/v120/DSP2833x_examples/eqep_pos_speed/Example_EPwmSetup.c
+++ /dev/null
@@ -1,69 +0,0 @@
-// TI File $Revision: /main/9 $
-// Checkin $Date: April 21, 2008   15:42:18 $
-//###########################################################################
-//
-// FILE:	Example_EpwmSetup.c
-//
-// TITLE:	Pos speed measurement using EQEP peripheral
-//
-// DESCRIPTION:
-//
-// This file contains source for the ePWM initialization for the 
-// pos/speed module
-//
-//###########################################################################
-// Original Author: SD
-//
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File
-#include "Example_posspeed.h"   // Example specific Include file
-
-#if (CPU_FRQ_150MHZ)
-  #define CPU_CLK   150e6
-#endif
-#if (CPU_FRQ_100MHZ)
-  #define CPU_CLK   100e6
-#endif
-
-#define PWM_CLK   5e3              // 5kHz (300rpm) EPWM1 frequency. Freq. can be changed here
-#define SP        CPU_CLK/(2*PWM_CLK)
-#define TBCTLVAL  0x200E           // up-down count, timebase=SYSCLKOUT
-
-
-void initEpwm()
-{
-	EPwm1Regs.TBSTS.all=0;
-	EPwm1Regs.TBPHS.half.TBPHS =0;
-	EPwm1Regs.TBCTR=0;
-
-	EPwm1Regs.CMPCTL.all=0x50;     // immediate mode for CMPA and CMPB   
-	EPwm1Regs.CMPA.half.CMPA=SP/2;
-	EPwm1Regs.CMPB=0;
-	
-	EPwm1Regs.AQCTLA.all=0x60;     // CTR=CMPA when inc->EPWM1A=1, when dec->EPWM1A=0
-	EPwm1Regs.AQCTLB.all=0x09;     // CTR=PRD ->EPWM1B=1, CTR=0 ->EPWM1B=0  
-	EPwm1Regs.AQSFRC.all=0;
-	EPwm1Regs.AQCSFRC.all=0;
-	
-	EPwm1Regs.TZSEL.all=0;
-	EPwm1Regs.TZCTL.all=0;
-	EPwm1Regs.TZEINT.all=0;
-	EPwm1Regs.TZFLG.all=0;
-	EPwm1Regs.TZCLR.all=0;
-	EPwm1Regs.TZFRC.all=0;
-
-	EPwm1Regs.ETSEL.all=0x0A;      // Interrupt on PRD 
-	EPwm1Regs.ETPS.all=1;	
-	EPwm1Regs.ETFLG.all=0;
-	EPwm1Regs.ETCLR.all=0;
-	EPwm1Regs.ETFRC.all=0;
-	
-	EPwm1Regs.PCCTL.all=0;
-	
-	EPwm1Regs.TBCTL.all=0x0010+TBCTLVAL; // Enable Timer
-	EPwm1Regs.TBPRD=SP;
-}
-
diff --git a/Source/External/v120/DSP2833x_examples/eqep_pos_speed/Example_posspeed.c b/Source/External/v120/DSP2833x_examples/eqep_pos_speed/Example_posspeed.c
deleted file mode 100644
index 7b25307..0000000
--- a/Source/External/v120/DSP2833x_examples/eqep_pos_speed/Example_posspeed.c
+++ /dev/null
@@ -1,245 +0,0 @@
-// TI File $Revision: /main/9 $
-// Checkin $Date: April 21, 2008   15:42:23 $
-//###########################################################################
-//
-// FILE:	Example_posspeed.c
-//
-// TITLE:	Pos/speed measurement using EQEP peripheral
-//
-// DESCRIPTION:
-//
-// This file includes the EQEP initialization and position and speed calcuation
-// functions called by Example_2833xEqep_posspeed.c.  The position and
-// speed calculation steps performed by POSSPEED_Calc() at  SYSCLKOUT = 150 MHz 
-// and 100 MHz are described in detail below:
-//
-// For 150 MHz Operation:
-// ----------------------
-//
-// 1. This program calculates: **theta_mech**
-//    
-//    theta_mech = QPOSCNT/mech_Scaler = QPOSCNT/4000, where 4000 is the number of
-//                 counts in 1 revolution.(4000/4 = 1000 line/rev. quadrature encoder)
-//
-// 2. This program calculates: **theta_elec**
-//
-//    theta_elec = (# pole pairs) * theta_mech = 2*QPOSCNT/4000 for this example
-//
-// 3. This program calculates: **SpeedRpm_fr**
-//
-//    SpeedRpm_fr = [(x2-x1)/4000]/T                                             - Equation 1
-//    Note (x2-x1) = difference in number of QPOSCNT counts. Dividing (x2-x1) by
-//    4000 gives position relative to Index in one revolution.
-// If base RPM  = 6000 rpm:   6000 rpm = [(x2-x1)/4000]/10ms                     - Equation 2
-//                                     = [(x2-x1)/4000]/(.01s*1 min/60 sec)
-//                                     = [(x2-x1)/4000]/(1/6000) min
-//                         max (x2-x1) = 4000 counts, or 1 revolution in 10 ms
-//
-//
-// If both sides of Equation 2 are divided by 6000 rpm, then:
-//                            1 = [(x2-x1)/4000] rev./[(1/6000) min * 6000rpm] 
-//							Because (x2-x1) must be <4000 (max) for QPOSCNT increment,
-//						    (x2-x1)/4000 < 1 for CW rotation
-//                          And because (x2-x1) must be >-4000 for QPOSCNT decrement,
-//                          (x2-x1)/4000>-1  for CCW rotation
-//						    speed_fr = [(x2-x1)/4000]/[(1/6000) min * 6000rpm]
-//                                   = (x2-x1)/4000                              - Equation 3
-//
-// To convert speed_fr to RPM, multiply Equation 3 by 6000 rpm
-//                           SpeedRpm_fr = 6000rpm *(x2-x1)/4000                 - Final Equation
-//						                          
-//
-// 2. **min rpm ** = selected at 10 rpm based on CCPS prescaler options available (128 is greatest)
-//
-// 3. **SpeedRpm_pr**
-//    SpeedRpm_pr = X/(t2-t1)                                                    - Equation 4
-//    where X = QCAPCTL [UPPS]/4000 rev. (position relative to Index in 1 revolution) 
-// If max/base speed = 6000 rpm:  6000 = (32/4000)/[(t2-t1)/(150MHz/128)]  
-//    where 32 = QCAPCTL [UPPS] (Unit timeout - once every 32 edges)
-//          32/4000 = position in 1 revolution (position as a fraction of 1 revolution)
-//          t2-t1/(150MHz/128),  t2-t1= # of QCAPCLK cycles, and
-//		                  1 QCAPCLK cycle = 1/(150MHz/128)
-//										  = QCPRDLAT
-//
-//		        So: 6000 rpm = [32(150MHz/128)*60s/min]/[4000(t2-t1)]
-//		             t2-t1 = [32(150MHz/128)*60 s/min]/(4000*6000rpm)           - Equation 5 
-//		                   = 94 CAPCLK cycles = maximum (t2-t1) = SpeedScaler
-//
-// Divide both sides by (t2-t1), and:
-//                   1 = 94/(t2-t1) = [32(150MHz/128)*60 s/min]/(4000*6000rpm)]/(t2-t1)
-//				     Because (t2-t1) must be < 94 for QPOSCNT increment:
-//				     94/(t2-t1) < 1 for CW rotation
-//                   And because (t2-t1) must be >-94 for QPOSCNT decrement:
-//				     94/(t2-t1)> -1 for CCW rotation
-//
-//					 speed_pr = 94/(t2-t1) 
-//                      or [32(150MHz/128)*60 s/min]/(4000*6000rpm)]/(t2-t1)  - Equation 6
-//
-// To convert speed_pr to RPM:
-// Multiply Equation 6 by 6000rpm:
-//                  SpeedRpm_fr  = 6000rpm * [32(150MHz/128)*60 s/min]/[4000*6000rpm*(t2-t1)]
-//							                = [32(150MHz/128)*60 s/min]/[4000*(t2-t1)]
-//                                        or [(32/4000)rev * 60 s/min]/[(t2-t1)(QCPRDLAT)]- Final Equation
-//
-//
-// For 100 MHz Operation:
-// ----------------------
-//
-// The same calculations as above are performed, but with 100 MHz
-// instead of 150MHz when calculating SpeedRpm_pr.
-// The value for freqScaler_pr becomes: [32*(100MHz/128)*60s/min]/(4000*6000rpm) = 63
-// More detailed calculation results can be found in the Example_freqcal.xls
-// spreadsheet included in the example folder.
-//
-//
-//
-// This file contains source for the posspeed module
-//
-//###########################################################################
-// Original Author: SD
-//
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File
-#include "Example_posspeed.h"   // Example specific Include file
-
-void  POSSPEED_Init(void)
-{
-
-    #if (CPU_FRQ_150MHZ)
-	  EQep1Regs.QUPRD=1500000;			// Unit Timer for 100Hz at 150 MHz SYSCLKOUT
-	#endif
-    #if (CPU_FRQ_100MHZ)
-	  EQep1Regs.QUPRD=1000000;			// Unit Timer for 100Hz at 100 MHz SYSCLKOUT
-	#endif	
-
-	EQep1Regs.QDECCTL.bit.QSRC=00;		// QEP quadrature count mode
-		
-	EQep1Regs.QEPCTL.bit.FREE_SOFT=2;
-	EQep1Regs.QEPCTL.bit.PCRM=00;		// PCRM=00 mode - QPOSCNT reset on index event
-	EQep1Regs.QEPCTL.bit.UTE=1; 		// Unit Timeout Enable 
-	EQep1Regs.QEPCTL.bit.QCLM=1; 		// Latch on unit time out
-	EQep1Regs.QPOSMAX=0xffffffff;
-	EQep1Regs.QEPCTL.bit.QPEN=1; 		// QEP enable
-		
-	EQep1Regs.QCAPCTL.bit.UPPS=5;   	// 1/32 for unit position
-	EQep1Regs.QCAPCTL.bit.CCPS=7;		// 1/128 for CAP clock
-	EQep1Regs.QCAPCTL.bit.CEN=1; 		// QEP Capture Enable
-	
-
-}
-
-void POSSPEED_Calc(POSSPEED *p)
-{
-     long tmp;
-     unsigned int pos16bval,temp1;
-   	 _iq Tmp1,newp,oldp;
-
-//**** Position calculation - mechanical and electrical motor angle  ****//     
-     p->DirectionQep = EQep1Regs.QEPSTS.bit.QDF;    // Motor direction: 0=CCW/reverse, 1=CW/forward
-
-	 pos16bval=(unsigned int)EQep1Regs.QPOSCNT;     // capture position once per QA/QB period
-     p->theta_raw = pos16bval+ p->cal_angle;        // raw theta = current pos. + ang. offset from QA
-	 
-	 // The following lines calculate p->theta_mech ~= QPOSCNT/mech_scaler [current cnt/(total cnt in 1 rev.)]
-	 // where mech_scaler = 4000 cnts/revolution
-     tmp = (long)((long)p->theta_raw*(long)p->mech_scaler);  	// Q0*Q26 = Q26 
-     tmp &= 0x03FFF000;                                        
-     p->theta_mech = (int)(tmp>>11);         		// Q26 -> Q15 
-     p->theta_mech &= 0x7FFF;                       
-	 
-	 // The following lines calculate p->elec_mech    
-     p->theta_elec = p->pole_pairs*p->theta_mech;  // Q0*Q15 = Q15 
-     p->theta_elec &= 0x7FFF;                      
-
-// Check an index occurrence
-     if (EQep1Regs.QFLG.bit.IEL == 1)                   
-     {  
-    	p->index_sync_flag = 0x00F0;
-    	EQep1Regs.QCLR.bit.IEL=1;					// Clear interrupt flag
-     }
-      
-
-
-//**** High Speed Calcultation using QEP Position counter ****//
-// Check unit Time out-event for speed calculation:
-// Unit Timer is configured for 100Hz in INIT function
-
-	if(EQep1Regs.QFLG.bit.UTO==1)                    // If unit timeout (one 100Hz period)
-	{ 
-		/** Differentiator	**/
-		// The following lines calculate position = (x2-x1)/4000 (position in 1 revolution)
-	 	pos16bval=(unsigned int)EQep1Regs.QPOSLAT;	              // Latched POSCNT value		
-     	tmp = (long)((long)pos16bval*(long)p->mech_scaler);  	  // Q0*Q26 = Q26 
-     	tmp &= 0x03FFF000;
-     	tmp = (int)(tmp>>11);         			                  // Q26 -> Q15 
-     	tmp &= 0x7FFF;
-		newp=_IQ15toIQ(tmp);
-		oldp=p->oldpos;
-
-   		if (p->DirectionQep==0)      				// POSCNT is counting down
-   		{
-    		if (newp>oldp)
-      			Tmp1 = - (_IQ(1) - newp + oldp);    // x2-x1 should be negative
-    		else
-      		Tmp1 = newp -oldp;
-   		}
-   		else if (p->DirectionQep==1)      			// POSCNT is counting up
-   		{
-    		if (newp<oldp)
-      		Tmp1 = _IQ(1) + newp - oldp;
-    		else 
-      		Tmp1 = newp - oldp;                     // x2-x1 should be positive
-   		}
-
-	   	if (Tmp1>_IQ(1))                            
-	     	p->Speed_fr = _IQ(1);
-	   	else if (Tmp1<_IQ(-1))
-	     	p->Speed_fr = _IQ(-1);      
-	   	else
-	     	p->Speed_fr = Tmp1;
-
-		// Update the electrical angle
-    	p->oldpos = newp;
-     
-		// Change motor speed from pu value to rpm value (Q15 -> Q0)
-		// Q0 = Q0*GLOBAL_Q => _IQXmpy(), X = GLOBAL_Q
-   		p->SpeedRpm_fr = _IQmpy(p->BaseRpm,p->Speed_fr);  
-		//=======================================
-		
-		EQep1Regs.QCLR.bit.UTO=1;					// Clear interrupt flag
-	}	
-
-//**** Low-speed computation using QEP capture counter ****//	
-	if(EQep1Regs.QEPSTS.bit.UPEVNT==1)                 // Unit position event
-	{
-		if(EQep1Regs.QEPSTS.bit.COEF==0)               // No Capture overflow
-			temp1=(unsigned long)EQep1Regs.QCPRDLAT;   // temp1 = t2-t1  
-		else							               // Capture overflow, saturate the result
-			temp1=0xFFFF;
-	
-		p->Speed_pr = _IQdiv(p->SpeedScaler,temp1);    // p->Speed_pr = p->SpeedScaler/temp1 
-		Tmp1=p->Speed_pr;
-	
-		if (Tmp1>_IQ(1))
-	 		p->Speed_pr = _IQ(1);   
-		else
-	 		p->Speed_pr = Tmp1;
-
-	    // Convert p->Speed_pr to RPM
-		if (p->DirectionQep==0)                                 // Reverse direction = negative
-			p->SpeedRpm_pr = -_IQmpy(p->BaseRpm,p->Speed_pr); 	// Q0 = Q0*GLOBAL_Q => _IQXmpy(), X = GLOBAL_Q
-		else                                                    // Forward direction = positive
-			p->SpeedRpm_pr = _IQmpy(p->BaseRpm,p->Speed_pr); 	// Q0 = Q0*GLOBAL_Q => _IQXmpy(), X = GLOBAL_Q
-
-	
-		EQep1Regs.QEPSTS.all=0x88;					// Clear Unit position event flag	
-													// Clear overflow error flag
-	}
-
-
-}
-
-
diff --git a/Source/External/v120/DSP2833x_examples/eqep_pos_speed/Example_posspeed.h b/Source/External/v120/DSP2833x_examples/eqep_pos_speed/Example_posspeed.h
deleted file mode 100644
index 14d1761..0000000
--- a/Source/External/v120/DSP2833x_examples/eqep_pos_speed/Example_posspeed.h
+++ /dev/null
@@ -1,85 +0,0 @@
-// TI File $Revision: /main/6 $
-// Checkin $Date: August 9, 2007   17:15:33 $
-//###########################################################################
-//
-// FILE:	Example_posspeed.h
-//
-// TITLE:	Pos/speed measurement using EQEP peripheral
-//
-// DESCRIPTION:
-//
-// Header file containing data type and object definitions and 
-// initializers. 
-//
-//###########################################################################
-// Original Author: SD
-//
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-#ifndef __POSSPEED__
-#define __POSSPEED__
-
-#include "IQmathLib.h"         // Include header for IQmath library
-/*-----------------------------------------------------------------------------
-Define the structure of the POSSPEED Object 
------------------------------------------------------------------------------*/
-typedef struct {int theta_elec;     	// Output: Motor Electrical angle (Q15)  
-                int theta_mech;     	// Output: Motor Mechanical Angle (Q15) 
-                int DirectionQep;      	// Output: Motor rotation direction (Q0) 
-                int QEP_cnt_idx; 	 	// Variable: Encoder counter index (Q0)
-                int theta_raw;     		// Variable: Raw angle from Timer 2 (Q0)            
-                int mech_scaler;    	// Parameter: 0.9999/total count, total count = 4000 (Q26)
-                int pole_pairs;     	// Parameter: Number of pole pairs (Q0) 
-                int cal_angle;     		// Parameter: Raw angular offset between encoder and phase a (Q0) 
-                int index_sync_flag; 	// Output: Index sync status (Q0)                   
-
-                Uint32 SpeedScaler;     // Parameter :  Scaler converting 1/N cycles to a GLOBAL_Q speed (Q0) - independently with global Q
-                _iq Speed_pr;           // Output :  speed in per-unit
-                Uint32 BaseRpm;         // Parameter : Scaler converting GLOBAL_Q speed to rpm (Q0) speed - independently with global Q
-                int32 SpeedRpm_pr;      // Output : speed in r.p.m. (Q0) - independently with global Q                               
-
-                _iq  oldpos;  			// Input: Electrical angle (pu) 
-                _iq Speed_fr;           // Output :  speed in per-unit
-                int32 SpeedRpm_fr;     	// Output : Speed in rpm  (Q0) - independently with global Q
-                void (*init)();     	// Pointer to the init funcion          
-                void (*calc)();    		// Pointer to the calc funtion        
-                }  POSSPEED;
-
-/*-----------------------------------------------------------------------------
-Define a POSSPEED_handle
------------------------------------------------------------------------------*/
-typedef POSSPEED *POSSPEED_handle;
-
-/*-----------------------------------------------------------------------------
-Default initializer for the POSSPEED Object.
------------------------------------------------------------------------------*/
-
-#if (CPU_FRQ_150MHZ)
-  #define POSSPEED_DEFAULTS {0x0, 0x0,0x0,0x0,0x0,16776,2,0,0x0,\
-        94,0,6000,0,\
-        0,0,0,\
-        (void (*)(long))POSSPEED_Init,\
-        (void (*)(long))POSSPEED_Calc }
-#endif
-#if (CPU_FRQ_100MHZ)
-  #define POSSPEED_DEFAULTS {0x0, 0x0,0x0,0x0,0x0,16776,2,0,0x0,\
-        63,0,6000,0,\
-        0,0,0,\
-        (void (*)(long))POSSPEED_Init,\
-        (void (*)(long))POSSPEED_Calc }
-#endif
-
-
-/*-----------------------------------------------------------------------------
-Prototypes for the functions in posspeed.c                                 
------------------------------------------------------------------------------*/
-void POSSPEED_Init(void);                                              
-void POSSPEED_Calc(POSSPEED_handle);
-                
-#endif /*  __POSSPEED__ */
-
-
-
-
diff --git a/Source/External/v120/DSP2833x_examples/eqep_pos_speed/Example_posspeed.xls b/Source/External/v120/DSP2833x_examples/eqep_pos_speed/Example_posspeed.xls
deleted file mode 100644
index 367b4e9..0000000
Binary files a/Source/External/v120/DSP2833x_examples/eqep_pos_speed/Example_posspeed.xls and /dev/null differ
diff --git a/Source/External/v120/DSP2833x_examples/external_interrupt/Example_2833xExternalInterrupt.c b/Source/External/v120/DSP2833x_examples/external_interrupt/Example_2833xExternalInterrupt.c
deleted file mode 100644
index 903a088..0000000
--- a/Source/External/v120/DSP2833x_examples/external_interrupt/Example_2833xExternalInterrupt.c
+++ /dev/null
@@ -1,260 +0,0 @@
-// TI File $Revision: /main/10 $
-// Checkin $Date: May 5, 2008   15:25:49 $
-//###########################################################################
-//
-// FILE:   Example_2833xExternalInterrupt.c
-//
-// TITLE:  DSP2833x External Interrupt test program.
-//
-// ASSUMPTIONS:
-//
-//    This program requires the DSP2833x header files.
-//    As supplied, this project is configured for "boot to SARAM" operation.
-//
-//         Connect GPIO30 to GPIO0.  GPIO0 will be assigned to Xint1
-//         Connect GPIO31 to GPIO1.  GPIO1 will be assigned to XINT2
-//
-//         Monitor GPIO34 with an oscilloscope. GPIO34 will be high outside of the
-//         ISRs and low within each ISR.
-//
-//    As supplied, this project is configured for "boot to SARAM"
-//    operation.  The 2833x Boot Mode table is shown below.
-//    For information on configuring the boot mode of an eZdsp,
-//    please refer to the documentation included with the eZdsp,
-//
-//       $Boot_Table:
-//
-//         GPIO87   GPIO86     GPIO85   GPIO84
-//          XA15     XA14       XA13     XA12
-//           PU       PU         PU       PU
-//        ==========================================
-//            1        1          1        1    Jump to Flash
-//            1        1          1        0    SCI-A boot
-//            1        1          0        1    SPI-A boot
-//            1        1          0        0    I2C-A boot
-//            1        0          1        1    eCAN-A boot
-//            1        0          1        0    McBSP-A boot
-//            1        0          0        1    Jump to XINTF x16
-//            1        0          0        0    Jump to XINTF x32
-//            0        1          1        1    Jump to OTP
-//            0        1          1        0    Parallel GPIO I/O boot
-//            0        1          0        1    Parallel XINTF boot
-//            0        1          0        0    Jump to SARAM	    <- "boot to SARAM"
-//            0        0          1        1    Branch to check boot mode
-//            0        0          1        0    Boot to flash, bypass ADC cal
-//            0        0          0        1    Boot to SARAM, bypass ADC cal
-//            0        0          0        0    Boot to SCI-A, bypass ADC cal
-//                                              Boot_Table_End$
-//
-// DESCRIPTION:
-//
-//    This program sets up GPIO0 as Xint1 and GPIO1 as XINT2.  Two other
-//    GPIO signals are used to trigger the interrupt (GPIO30 triggers
-//    Xint1 and GPIO31 triggers XINT2).  The user is required to
-//    externally connect these signals for the program to work
-//    properly.
-//
-//    Xint1 input is synched to SYSCLKOUT
-//    XINT2 has a long qualification - 6 samples at 510*SYSCLKOUT each.
-//
-//    GPIO34 will go high outside of the interrupts and low within the
-//    interrupts. This signal can be monitored on a scope.
-//
-//    Each interrupt is fired in sequence - Xint1 first and then XINT2
-//
-//
-//    Watch Variables:
-//       Xint1Count for the number of times through Xint1 interrupt
-//       Xint2Count for the number of times through XINT2 interrupt
-//       LoopCount for the number of times through the idle loop
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-
-#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File
-
-// Prototype statements for functions found within this file.
-interrupt void xint1_isr(void);
-interrupt void xint2_isr(void);
-
-// Global variables for this example
-volatile Uint32 Xint1Count;
-volatile Uint32 Xint2Count;
-Uint32 LoopCount;
-
-#define DELAY 35.700L
-
-void main(void)
-{
-   Uint32 TempX1Count;
-   Uint32 TempX2Count;
-
-// Step 1. Initialize System Control:
-// PLL, WatchDog, enable Peripheral Clocks
-// This example function is found in the DSP2833x_SysCtrl.c file.
-   InitSysCtrl();
-
-// Step 2. Initalize GPIO:
-// This example function is found in the DSP2833x_Gpio.c file and
-// illustrates how to set the GPIO to it's default state.
-// InitGpio();  // Skipped for this example
-
-// Step 3. Clear all interrupts and initialize PIE vector table:
-// Disable CPU interrupts
-   DINT;
-
-// Initialize PIE control registers to their default state.
-// The default state is all PIE interrupts disabled and flags
-// are cleared.
-// This function is found in the DSP2833x_PieCtrl.c file.
-   InitPieCtrl();
-
-// Disable CPU interrupts and clear all CPU interrupt flags:
-   IER = 0x0000;
-   IFR = 0x0000;
-
-// Initialize the PIE vector table with pointers to the shell Interrupt
-// Service Routines (ISR).
-// This will populate the entire table, even if the interrupt
-// is not used in this example.  This is useful for debug purposes.
-// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
-// This function is found in DSP2833x_PieVect.c.
-   InitPieVectTable();
-
-// Interrupts that are used in this example are re-mapped to
-// ISR functions found within this file.
-   EALLOW;	// This is needed to write to EALLOW protected registers
-   PieVectTable.XINT1 = &xint1_isr;
-   PieVectTable.XINT2 = &xint2_isr;
-   EDIS;   // This is needed to disable write to EALLOW protected registers
-
-// Step 4. Initialize all the Device Peripherals:
-// This function is found in DSP2833x_InitPeripherals.c
-// InitPeripherals(); // Not required for this example
-
-// Step 5. User specific code, enable interrupts:
-
-// Clear the counters
-   Xint1Count = 0; // Count Xint1 interrupts
-   Xint2Count = 0; // Count XINT2 interrupts
-   LoopCount = 0;  // Count times through idle loop
-
-// Enable Xint1 and XINT2 in the PIE: Group 1 interrupt 4 & 5
-// Enable int1 which is connected to WAKEINT:
-   PieCtrlRegs.PIECTRL.bit.ENPIE = 1;          // Enable the PIE block
-   PieCtrlRegs.PIEIER1.bit.INTx4 = 1;          // Enable PIE Gropu 1 INT4
-   PieCtrlRegs.PIEIER1.bit.INTx5 = 1;          // Enable PIE Gropu 1 INT5
-   IER |= M_INT1;                              // Enable CPU int1
-   EINT;                                       // Enable Global Interrupts
-
-// GPIO30 & GPIO31 are outputs, start GPIO30 high and GPIO31 low
-   EALLOW;
-   GpioDataRegs.GPASET.bit.GPIO30 = 1;         // Load the output latch
-   GpioCtrlRegs.GPAMUX2.bit.GPIO30 = 0;        // GPIO
-   GpioCtrlRegs.GPADIR.bit.GPIO30 = 1;         // output
-
-   GpioDataRegs.GPACLEAR.bit.GPIO31 = 1;       // Load the output latch
-   GpioCtrlRegs.GPAMUX2.bit.GPIO31 = 0;        // GPIO
-   GpioCtrlRegs.GPADIR.bit.GPIO31 = 1;         // output
-   EDIS;
-
-// GPIO0 and GPIO1 are inputs
-   EALLOW;
-   GpioCtrlRegs.GPAMUX1.bit.GPIO0 = 0;         // GPIO
-   GpioCtrlRegs.GPADIR.bit.GPIO0 = 0;          // input
-   GpioCtrlRegs.GPAQSEL1.bit.GPIO0 = 0;        // Xint1 Synch to SYSCLKOUT only
-
-   GpioCtrlRegs.GPAMUX1.bit.GPIO1 = 0;         // GPIO
-   GpioCtrlRegs.GPADIR.bit.GPIO1 = 0;          // input
-   GpioCtrlRegs.GPAQSEL1.bit.GPIO1 = 2;        // XINT2 Qual using 6 samples
-   GpioCtrlRegs.GPACTRL.bit.QUALPRD0 = 0xFF;   // Each sampling window is 510*SYSCLKOUT
-   EDIS;
-
-// GPIO0 is XINT1, GPIO1 is XINT2
-   EALLOW;
-   GpioIntRegs.GPIOXINT1SEL.bit.GPIOSEL = 0;   // Xint1 is GPIO0
-   GpioIntRegs.GPIOXINT2SEL.bit.GPIOSEL = 1;   // XINT2 is GPIO1
-   EDIS;
-
-// Configure XINT1
-   XIntruptRegs.XINT1CR.bit.POLARITY = 0;      // Falling edge interrupt
-   XIntruptRegs.XINT2CR.bit.POLARITY = 1;      // Rising edge interrupt
-
-// Enable XINT1 and XINT2
-   XIntruptRegs.XINT1CR.bit.ENABLE = 1;        // Enable Xint1
-   XIntruptRegs.XINT2CR.bit.ENABLE = 1;        // Enable XINT2
-
-
-// GPIO34 will go low inside each interrupt.  Monitor this on a scope
-   EALLOW;
-   GpioCtrlRegs.GPBMUX1.bit.GPIO34 = 0;        // GPIO
-   GpioCtrlRegs.GPBDIR.bit.GPIO34 = 1;         // output
-   EDIS;
-
-// Step 6. IDLE loop:
-   for(;;)
-   {
-
-      TempX1Count = Xint1Count;
-      TempX2Count = Xint2Count;
-
-      // Trigger both XINT1
-      GpioDataRegs.GPBSET.bit.GPIO34 = 1;   // GPIO34 is high
-      GpioDataRegs.GPACLEAR.bit.GPIO30 = 1; // Lower GPIO30, trigger Xint1
-      while(Xint1Count == TempX1Count) {}
-
-      // Trigger both XINT2
-
-      GpioDataRegs.GPBSET.bit.GPIO34 = 1;   // GPIO34 is high
-      DELAY_US(DELAY);                      // Wait for Qual period
-      GpioDataRegs.GPASET.bit.GPIO31 = 1;   // Raise GPIO31, trigger XINT2
-      while(Xint2Count == TempX2Count) {}
-
-      // Check that the counts were incremented properly and get ready
-      // to start over.
-      if(Xint1Count == TempX1Count+1 && Xint2Count == TempX2Count+1)
-      {
-          LoopCount++;
-          GpioDataRegs.GPASET.bit.GPIO30 = 1;   // raise GPIO30
-          GpioDataRegs.GPACLEAR.bit.GPIO31 = 1; // lower GPIO31
-      }
-      else
-      {
-          asm("      ESTOP0"); // stop here
-      }
-
-   }
-
-
-}
-
-
-// Step 7. Insert all local Interrupt Service Routines (ISRs) and functions here:
-	// If local ISRs are used, reassign vector addresses in vector table as
-    // shown in Step 5
-
-interrupt void xint1_isr(void)
-{
-	GpioDataRegs.GPBCLEAR.all = 0x4;   // GPIO34 is low
-	Xint1Count++;
-
-	// Acknowledge this interrupt to get more from group 1
-	PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
-}
-
-interrupt void xint2_isr(void)
-{
-	GpioDataRegs.GPBCLEAR.all = 0x4;   // GPIO34 is low
-	Xint2Count++;
-
-	// Acknowledge this interrupt to get more from group 1
-	PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
-}
-
-
-//===========================================================================
-// No more.
-//===========================================================================
diff --git a/Source/External/v120/DSP2833x_examples/external_interrupt/Example_2833xExternalInterrupt.gel b/Source/External/v120/DSP2833x_examples/external_interrupt/Example_2833xExternalInterrupt.gel
deleted file mode 100644
index f2542a3..0000000
--- a/Source/External/v120/DSP2833x_examples/external_interrupt/Example_2833xExternalInterrupt.gel
+++ /dev/null
@@ -1,41 +0,0 @@
-/*
-// TI File $Revision: /main/5 $
-// Checkin $Date: August 9, 2007   17:15:49 $
-//###########################################################################
-//
-// This .gel file can be used to help load and build the example project.
-// It should be unloaded from Code Composer Studio before loading another 
-// project. 
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-*/
-
-menuitem "DSP2833x ExternalInterrupt"
-
-hotmenu Load_and_Build_Project()
-{
-   GEL_ProjectLoad("Example_2833xExternalInterrupt.pjt");
-   GEL_ProjectBuild("Example_2833xExternalInterrupt.pjt");
-   Setup_WatchWindow();
-}
-
-hotmenu Load_Code()
-{
-   GEL_Load(".\\debug\\Example_2833xExternalInterrupt.out");
-   Setup_WatchWindow();
-}
-
-hotmenu Setup_WatchWindow()
-{
-   GEL_WatchReset();
-   GEL_WatchAdd("Xint1Count,x");
-   GEL_WatchAdd("Xint2Count,x");
-   GEL_WatchAdd("LoopCount,x");
-   GEL_WatchAdd("XIntruptRegs,x");
-   GEL_WatchAdd("GpioCtrlRegs,x");
-}
-
-
diff --git a/Source/External/v120/DSP2833x_examples/external_interrupt/Example_2833xExternalInterrupt.pjt b/Source/External/v120/DSP2833x_examples/external_interrupt/Example_2833xExternalInterrupt.pjt
deleted file mode 100644
index 0e88e0e..0000000
--- a/Source/External/v120/DSP2833x_examples/external_interrupt/Example_2833xExternalInterrupt.pjt
+++ /dev/null
@@ -1,44 +0,0 @@
-; Code Composer Project File, Version 2.0 (do not modify or remove this line)
-
-[Project Settings]
-ProjectName="DSP2833x"
-ProjectDir="C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\external_interrupt\"
-ProjectType=Executable
-CPUFamily=TMS320C28XX
-Tool="Compiler"
-Tool="DspBiosBuilder"
-Tool="Linker"
-Config="Debug"
-Config="Release"
-
-[Source Files]
-Source="..\..\DSP2833x_common\source\DSP2833x_ADC_cal.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CodeStartBranch.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_DefaultIsr.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieVect.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_SysCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_usDelay.asm"
-Source="..\..\DSP2833x_headers\source\DSP2833x_GlobalVariableDefs.c"
-Source="Example_2833xExternalInterrupt.c"
-Source="..\..\DSP2833x_common\cmd\28335_RAM_lnk.cmd"
-Source="..\..\DSP2833x_headers\cmd\DSP2833x_Headers_nonBIOS.cmd"
-
-["Compiler" Settings: "Debug"]
-Options=-g -q -pdr -as -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\external_interrupt\Debug" -fs"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\external_interrupt\Debug" -i"..\..\DSP2833x_headers\include" -i"..\..\DSP2833x_common\include" -d"_DEBUG" -d"LARGE_MODEL" --float_support=fpu32 -ml -mt -v28
-
-["Compiler" Settings: "Release"]
-Options=-q -o3 -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x\DSP2833x_examples\external_interrupt\Release" -d"LARGE_MODEL" -ml -v28
-
-["DspBiosBuilder" Settings: "Debug"]
-Options=-v28
-
-["DspBiosBuilder" Settings: "Release"]
-Options=-v28
-
-["Linker" Settings: "Debug"]
-Options=-q -c -ecode_start -m".\Debug\Example_2833xExternalInterrupt.map" -o".\Debug\Example_2833xExternalInterrupt.out" -stack0x200 -w -x -l"rts2800_fpu32.lib"
-
-["Linker" Settings: "Release"]
-Options=-q -c -o".\Release\Example_2833xExternalInterrupt.out" -x
-
diff --git a/Source/External/v120/DSP2833x_examples/flash/Example_28332_Flash.gel b/Source/External/v120/DSP2833x_examples/flash/Example_28332_Flash.gel
deleted file mode 100644
index d254c08..0000000
--- a/Source/External/v120/DSP2833x_examples/flash/Example_28332_Flash.gel
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
-// TI File $Revision: /main/5 $
-// Checkin $Date: August 9, 2007   17:15:59 $
-//###########################################################################
-//
-// This .gel file can be used to help load and build the example project.
-// It should be unloaded from Code Composer Studio before loading another 
-// project. 
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-*/
-
-menuitem "DSP28332 Flash Example"
-
-hotmenu Load_and_Build_Project()
-{
-  GEL_ProjectLoad("Example_28332_Flash.pjt");
-  GEL_ProjectBuild("Example_28332_Flash.pjt");
-  Setup_WatchWindow();
-}
-
-hotmenu Load_Symbols()
-{
-  GEL_SymbolLoad(".\\debug\\Example_28332_Flash.out");
-  Setup_WatchWindow();
-}
-
-hotmenu Setup_WatchWindow()
-{
-   GEL_WatchReset();
-   GEL_WatchAdd("EPwm1TimerIntCount,x");
-   GEL_WatchAdd("EPwm2TimerIntCount,x");
-   GEL_WatchAdd("EPwm3TimerIntCount,x");   
-   GEL_WatchAdd("LoopCount,x");
-   GEL_WatchAdd("EPwm1Regs,x");
-   GEL_WatchAdd("EPwm2Regs,x");
-   GEL_WatchAdd("EPwm3Regs,x");
-}
-
-
-
-
diff --git a/Source/External/v120/DSP2833x_examples/flash/Example_28332_Flash.pjt b/Source/External/v120/DSP2833x_examples/flash/Example_28332_Flash.pjt
deleted file mode 100644
index 1d116ed..0000000
--- a/Source/External/v120/DSP2833x_examples/flash/Example_28332_Flash.pjt
+++ /dev/null
@@ -1,46 +0,0 @@
-; Code Composer Project File, Version 2.0 (do not modify or remove this line)
-
-[Project Settings]
-ProjectName="DSP2833x"
-ProjectDir="C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\flash\"
-ProjectType=Executable
-CPUFamily=TMS320C28XX
-Tool="Compiler"
-Tool="DspBiosBuilder"
-Tool="Linker"
-Config="Debug"
-Config="Release"
-
-[Source Files]
-Source="..\..\DSP2833x_common\source\DSP2833x_ADC_cal.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CodeStartBranch.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CSMPasswords.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_DefaultIsr.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_MemCopy.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieVect.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_SysCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_usDelay.asm"
-Source="..\..\DSP2833x_headers\source\DSP2833x_GlobalVariableDefs.c"
-Source="Example_2833xFlash.c"
-Source="..\..\DSP2833x_common\cmd\F28332.cmd"
-Source="..\..\DSP2833x_headers\cmd\DSP2833x_Headers_nonBIOS.cmd"
-
-["Compiler" Settings: "Debug"]
-Options=-g -q -pdr -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\flash\Debug" -fs"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\flash\Debug" -i"..\..\DSP2833x_headers\include" -i"..\..\DSP2833x_common\include" -d"_DEBUG" -d"LARGE_MODEL" --float_support=fpu32 -ml -mt -v28
-
-["Compiler" Settings: "Release"]
-Options=-q -o3 -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\flash\Release" -d"LARGE_MODEL" -ml -v28
-
-["DspBiosBuilder" Settings: "Debug"]
-Options=-v28
-
-["DspBiosBuilder" Settings: "Release"]
-Options=-v28
-
-["Linker" Settings: "Debug"]
-Options=-q -c -ecode_start -m".\Debug\Example_28332_Flash.map" -o".\Debug\Example_28332_Flash.out" -stack0x380 -w -x -i"..\..\DSP2833x_headers\include" -l"rts2800_fpu32.lib"
-
-["Linker" Settings: "Release"]
-Options=-q -c -o".\Release\Example_2833xFlash.out" -x
-
diff --git a/Source/External/v120/DSP2833x_examples/flash/Example_28334_Flash.gel b/Source/External/v120/DSP2833x_examples/flash/Example_28334_Flash.gel
deleted file mode 100644
index df91989..0000000
--- a/Source/External/v120/DSP2833x_examples/flash/Example_28334_Flash.gel
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
-// TI File $Revision: /main/5 $
-// Checkin $Date: August 9, 2007   17:16:06 $
-//###########################################################################
-//
-// This .gel file can be used to help load and build the example project.
-// It should be unloaded from Code Composer Studio before loading another 
-// project. 
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-*/
-
-menuitem "DSP28334 Flash Example"
-
-hotmenu Load_and_Build_Project()
-{
-  GEL_ProjectLoad("Example_28334_Flash.pjt");
-  GEL_ProjectBuild("Example_28334_Flash.pjt");
-  Setup_WatchWindow();
-}
-
-hotmenu Load_Symbols()
-{
-  GEL_SymbolLoad(".\\debug\\Example_28334_Flash.out");
-  Setup_WatchWindow();
-}
-
-hotmenu Setup_WatchWindow()
-{
-   GEL_WatchReset();
-   GEL_WatchAdd("EPwm1TimerIntCount,x");
-   GEL_WatchAdd("EPwm2TimerIntCount,x");
-   GEL_WatchAdd("EPwm3TimerIntCount,x");   
-   GEL_WatchAdd("LoopCount,x");
-   GEL_WatchAdd("EPwm1Regs,x");
-   GEL_WatchAdd("EPwm2Regs,x");
-   GEL_WatchAdd("EPwm3Regs,x");
-}
-
-
-
-
diff --git a/Source/External/v120/DSP2833x_examples/flash/Example_28334_Flash.pjt b/Source/External/v120/DSP2833x_examples/flash/Example_28334_Flash.pjt
deleted file mode 100644
index 74faf44..0000000
--- a/Source/External/v120/DSP2833x_examples/flash/Example_28334_Flash.pjt
+++ /dev/null
@@ -1,46 +0,0 @@
-; Code Composer Project File, Version 2.0 (do not modify or remove this line)
-
-[Project Settings]
-ProjectName="DSP2833x"
-ProjectDir="C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\flash\"
-ProjectType=Executable
-CPUFamily=TMS320C28XX
-Tool="Compiler"
-Tool="DspBiosBuilder"
-Tool="Linker"
-Config="Debug"
-Config="Release"
-
-[Source Files]
-Source="..\..\DSP2833x_common\source\DSP2833x_ADC_cal.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CodeStartBranch.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CSMPasswords.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_DefaultIsr.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_MemCopy.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieVect.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_SysCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_usDelay.asm"
-Source="..\..\DSP2833x_headers\source\DSP2833x_GlobalVariableDefs.c"
-Source="Example_2833xFlash.c"
-Source="..\..\DSP2833x_common\cmd\F28334.cmd"
-Source="..\..\DSP2833x_headers\cmd\DSP2833x_Headers_nonBIOS.cmd"
-
-["Compiler" Settings: "Debug"]
-Options=-g -q -pdr -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\flash\Debug" -fs"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\flash\Debug" -i"..\..\DSP2833x_headers\include" -i"..\..\DSP2833x_common\include" -d"_DEBUG" -d"LARGE_MODEL" --float_support=fpu32 -ml -mt -v28
-
-["Compiler" Settings: "Release"]
-Options=-q -o3 -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\flash\Release" -d"LARGE_MODEL" -ml -v28
-
-["DspBiosBuilder" Settings: "Debug"]
-Options=-v28
-
-["DspBiosBuilder" Settings: "Release"]
-Options=-v28
-
-["Linker" Settings: "Debug"]
-Options=-q -c -ecode_start -m".\Debug\Example_28334_Flash.map" -o".\Debug\Example_28334_Flash.out" -stack0x380 -w -x -i"..\..\DSP2833x_headers\include" -l"rts2800_fpu32.lib"
-
-["Linker" Settings: "Release"]
-Options=-q -c -o".\Release\Example_2833xFlash.out" -x
-
diff --git a/Source/External/v120/DSP2833x_examples/flash/Example_28335_Flash.gel b/Source/External/v120/DSP2833x_examples/flash/Example_28335_Flash.gel
deleted file mode 100644
index daf0d95..0000000
--- a/Source/External/v120/DSP2833x_examples/flash/Example_28335_Flash.gel
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
-// TI File $Revision: /main/5 $
-// Checkin $Date: August 9, 2007   17:16:14 $
-//###########################################################################
-//
-// This .gel file can be used to help load and build the example project.
-// It should be unloaded from Code Composer Studio before loading another 
-// project. 
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-*/
-
-menuitem "DSP28335 Flash Example"
-
-hotmenu Load_and_Build_Project()
-{
-  GEL_ProjectLoad("Example_28335_Flash.pjt");
-  GEL_ProjectBuild("Example_28335_Flash.pjt");
-  Setup_WatchWindow();
-}
-
-hotmenu Load_Symbols()
-{
-  GEL_SymbolLoad(".\\debug\\Example_28335_Flash.out");
-  Setup_WatchWindow();
-}
-
-hotmenu Setup_WatchWindow()
-{
-   GEL_WatchReset();
-   GEL_WatchAdd("EPwm1TimerIntCount,x");
-   GEL_WatchAdd("EPwm2TimerIntCount,x");
-   GEL_WatchAdd("EPwm3TimerIntCount,x");   
-   GEL_WatchAdd("LoopCount,x");
-   GEL_WatchAdd("EPwm1Regs,x");
-   GEL_WatchAdd("EPwm2Regs,x");
-   GEL_WatchAdd("EPwm3Regs,x");
-}
-
-
-
-
diff --git a/Source/External/v120/DSP2833x_examples/flash/Example_28335_Flash.pjt b/Source/External/v120/DSP2833x_examples/flash/Example_28335_Flash.pjt
deleted file mode 100644
index 766eeb9..0000000
--- a/Source/External/v120/DSP2833x_examples/flash/Example_28335_Flash.pjt
+++ /dev/null
@@ -1,46 +0,0 @@
-; Code Composer Project File, Version 2.0 (do not modify or remove this line)
-
-[Project Settings]
-ProjectName="DSP2833x"
-ProjectDir="C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\flash\"
-ProjectType=Executable
-CPUFamily=TMS320C28XX
-Tool="Compiler"
-Tool="DspBiosBuilder"
-Tool="Linker"
-Config="Debug"
-Config="Release"
-
-[Source Files]
-Source="..\..\DSP2833x_common\source\DSP2833x_ADC_cal.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CodeStartBranch.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CSMPasswords.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_DefaultIsr.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_MemCopy.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieVect.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_SysCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_usDelay.asm"
-Source="..\..\DSP2833x_headers\source\DSP2833x_GlobalVariableDefs.c"
-Source="Example_2833xFlash.c"
-Source="..\..\DSP2833x_common\cmd\F28335.cmd"
-Source="..\..\DSP2833x_headers\cmd\DSP2833x_Headers_nonBIOS.cmd"
-
-["Compiler" Settings: "Debug"]
-Options=-g -q -pdr -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\flash\Debug" -fs"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\flash\Debug" -i"..\..\DSP2833x_headers\include" -i"..\..\DSP2833x_common\include" -d"_DEBUG" -d"LARGE_MODEL" --float_support=fpu32 -ml -mt -v28
-
-["Compiler" Settings: "Release"]
-Options=-q -o3 -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\flash\Release" -d"LARGE_MODEL" -ml -v28
-
-["DspBiosBuilder" Settings: "Debug"]
-Options=-v28
-
-["DspBiosBuilder" Settings: "Release"]
-Options=-v28
-
-["Linker" Settings: "Debug"]
-Options=-q -c -ecode_start -m".\Debug\Example_28335_Flash.map" -o".\Debug\Example_28335_Flash.out" -stack0x380 -w -x -i"..\..\DSP2833x_headers\include" -l"rts2800_fpu32.lib"
-
-["Linker" Settings: "Release"]
-Options=-q -c -o".\Release\Example_2833xFlash.out" -x
-
diff --git a/Source/External/v120/DSP2833x_examples/flash/Example_2833xFlash.c b/Source/External/v120/DSP2833x_examples/flash/Example_2833xFlash.c
deleted file mode 100644
index 7e7d4db..0000000
--- a/Source/External/v120/DSP2833x_examples/flash/Example_2833xFlash.c
+++ /dev/null
@@ -1,342 +0,0 @@
-// TI File $Revision: /main/10 $
-// Checkin $Date: April 21, 2008   15:42:33 $
-//###########################################################################
-//
-// FILE:    Example_2833xFlash.c
-//
-// TITLE:   DSP2833x ePWM Timer Interrupt From Flash Example.
-//
-// ASSUMPTIONS:
-//
-//    This program requires the DSP2833x header files.
-//
-//    As supplied, this project is configured for "boot to FLASH"
-//    operation.  The 2833x Boot Mode table is shown below.
-//    For information on configuring the boot mode of an eZdsp,
-//    please refer to the documentation included with the eZdsp,
-//
-//       $Boot_Table:
-//
-//         GPIO87   GPIO86     GPIO85   GPIO84
-//          XA15     XA14       XA13     XA12
-//           PU       PU         PU       PU
-//        ==========================================
-//            1        1          1        1    Jump to Flash <- "boot to Flash"
-//            1        1          1        0    SCI-A boot
-//            1        1          0        1    SPI-A boot
-//            1        1          0        0    I2C-A boot
-//            1        0          1        1    eCAN-A boot
-//            1        0          1        0    McBSP-A boot
-//            1        0          0        1    Jump to XINTF x16
-//            1        0          0        0    Jump to XINTF x32
-//            0        1          1        1    Jump to OTP
-//            0        1          1        0    Parallel GPIO I/O boot
-//            0        1          0        1    Parallel XINTF boot
-//            0        1          0        0    Jump to SARAM
-//            0        0          1        1    Branch to check boot mode
-//            0        0          1        0    Boot to flash, bypass ADC cal
-//            0        0          0        1    Boot to SARAM, bypass ADC cal
-//            0        0          0        0    Boot to SCI-A, bypass ADC cal
-//                                              Boot_Table_End$
-//
-// DESCRIPTION:
-//
-//    This example runs the ePWM interrupt example from flash.
-//
-//    1) Build the project
-//    2) Flash the .out file into the device.
-//    3) Set the hardware jumpers to boot to Flash
-//    4) Use the included GEL file to load the project, symbols
-//       defined within the project and the variables into the watch
-//       window.
-//
-//    Steps that were taken to convert the ePWM example from RAM
-//    to Flash execution:
-//
-//    - Change the linker cmd file to reflect the flash memory map.
-//    - Make sure any initialized sections are mapped to Flash.
-//      In SDFlash utility this can be checked by the View->Coff/Hex
-//      status utility. Any section marked as "load" should be
-//      allocated to Flash.
-//    - Make sure there is a branch instruction from the entry to Flash
-//      at 0x33FFF6 to the beginning of code execution. This example
-//      uses the DSP2833x_CodeStartBranch.asm file to accomplish this.
-//    - Set boot mode Jumpers to "boot to Flash"
-//    - For best performance from the flash, modify the waitstates
-//      and enable the flash pipeline as shown in this example.
-//      Note: any code that manipulates the flash waitstate and pipeline
-//      control must be run from RAM. Thus these functions are located
-//      in their own memory section called ramfuncs.
-//
-//
-//    ePwm1 Interrupt will run from RAM and puts the flash into sleep mode
-//    ePwm2 Interrupt will run from RAM and puts the flash into standby mode
-//    ePWM3 Interrupt will run from FLASH
-//
-//    As supplied:
-//
-//    All timers have the same period
-//    The timers are started sync'ed
-//    An interrupt is taken on a zero event for each ePWM timer
-//
-//       ePWM1: takes an interrupt every event
-//       ePWM2: takes an interrupt every 2nd event
-//       ePWM3: takes an interrupt every 3rd event
-//
-//    Thus the Interrupt count for ePWM1, ePWM4-ePWM6 should be equal
-//    The interrupt count for ePWM2 should be about half that of ePWM1
-//    and the interrupt count for ePWM3 should be about 1/3 that of ePWM1
-//
-//          Watch Variables:
-//                 EPwm1TimerIntCount
-//                 EPwm2TimerIntCount
-//                 EPwm3TimerIntCount
-//
-//                 Toggle GPIO32 while in the background loop.
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-
-#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File
-
-// Configure which ePWM timer interrupts are enabled at the PIE level:
-// 1 = enabled,  0 = disabled
-#define PWM1_INT_ENABLE  1
-#define PWM2_INT_ENABLE  1
-#define PWM3_INT_ENABLE  1
-
-// Configure the period for each timer
-#define PWM1_TIMER_TBPRD   0x1FFF
-#define PWM2_TIMER_TBPRD   0x1FFF
-#define PWM3_TIMER_TBPRD   0x1FFF
-
-// Make this long enough so that we can see an LED toggle
-#define DELAY 1000000L
-
-// Functions that will be run from RAM need to be assigned to
-// a different section.  This section will then be mapped using
-// the linker cmd file.
-#pragma CODE_SECTION(epwm1_timer_isr, "ramfuncs");
-#pragma CODE_SECTION(epwm2_timer_isr, "ramfuncs");
-
-// Prototype statements for functions found within this file.
-interrupt void epwm1_timer_isr(void);
-interrupt void epwm2_timer_isr(void);
-interrupt void epwm3_timer_isr(void);
-void InitEPwmTimer(void);
-
-// Global variables used in this example
-Uint32  EPwm1TimerIntCount;
-Uint32  EPwm2TimerIntCount;
-Uint32  EPwm3TimerIntCount;
-Uint32  LoopCount;
-
-// These are defined by the linker (see F28335.cmd)
-extern Uint16 RamfuncsLoadStart;
-extern Uint16 RamfuncsLoadEnd;
-extern Uint16 RamfuncsRunStart;
-
-void main(void)
-{
-
-// Step 1. Initialize System Control:
-// PLL, WatchDog, enable Peripheral Clocks
-// This example function is found in the DSP2833x_SysCtrl.c file.
-   InitSysCtrl();
-
-// Step 2. Initalize GPIO:
-// This example function is found in the DSP2833x_Gpio.c file and
-// illustrates how to set the GPIO to it's default state.
-// InitGpio();  // Skipped for this example
-
-
-// Step 3. Clear all interrupts and initialize PIE vector table:
-// Disable CPU interrupts
-   DINT;
-
-// Initialize the PIE control registers to their default state.
-// The default state is all PIE interrupts disabled and flags
-// are cleared.
-// This function is found in the DSP2833x_PieCtrl.c file.
-   InitPieCtrl();
-
-// Disable CPU interrupts and clear all CPU interrupt flags:
-   IER = 0x0000;
-   IFR = 0x0000;
-
-// Initialize the PIE vector table with pointers to the shell Interrupt
-// Service Routines (ISR).
-// This will populate the entire table, even if the interrupt
-// is not used in this example.  This is useful for debug purposes.
-// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
-// This function is found in DSP2833x_PieVect.c.
-   InitPieVectTable();
-
-// Interrupts that are used in this example are re-mapped to
-// ISR functions found within this file.
-   EALLOW;  // This is needed to write to EALLOW protected registers
-   PieVectTable.EPWM1_INT = &epwm1_timer_isr;
-   PieVectTable.EPWM2_INT = &epwm2_timer_isr;
-   PieVectTable.EPWM3_INT = &epwm3_timer_isr;
-   EDIS;    // This is needed to disable write to EALLOW protected registers
-
-// Step 4. Initialize all the Device Peripherals:
-// This function is found in DSP2833x_InitPeripherals.c
-// InitPeripherals();  // Not required for this example
-   InitEPwmTimer();    // For this example, only initialize the ePWM Timers
-
-// Step 5. User specific code, enable interrupts:
-
-// Copy time critical code and Flash setup code to RAM
-// This includes the following ISR functions: epwm1_timer_isr(), epwm2_timer_isr()
-// epwm3_timer_isr and and InitFlash();
-// The  RamfuncsLoadStart, RamfuncsLoadEnd, and RamfuncsRunStart
-// symbols are created by the linker. Refer to the F28335.cmd file.
-   MemCopy(&RamfuncsLoadStart, &RamfuncsLoadEnd, &RamfuncsRunStart);
-
-// Call Flash Initialization to setup flash waitstates
-// This function must reside in RAM
-   InitFlash();
-
-// Initalize counters:
-   EPwm1TimerIntCount = 0;
-   EPwm2TimerIntCount = 0;
-   EPwm3TimerIntCount = 0;
-   LoopCount = 0;
-
-// Enable CPU INT3 which is connected to EPWM1-3 INT:
-   IER |= M_INT3;
-
-// Enable EPWM INTn in the PIE: Group 3 interrupt 1-3
-   PieCtrlRegs.PIEIER3.bit.INTx1 = PWM1_INT_ENABLE;
-   PieCtrlRegs.PIEIER3.bit.INTx2 = PWM2_INT_ENABLE;
-   PieCtrlRegs.PIEIER3.bit.INTx3 = PWM3_INT_ENABLE;
-
-// Enable global Interrupts and higher priority real-time debug events:
-   EINT;   // Enable Global interrupt INTM
-   ERTM;   // Enable Global realtime interrupt DBGM
-
-// Step 6. IDLE loop. Just sit and loop forever (optional):
-   EALLOW;
-   GpioCtrlRegs.GPBMUX1.bit.GPIO32 = 0;
-   GpioCtrlRegs.GPBDIR.bit.GPIO32 = 1;
-   EDIS;
-
-   for(;;)
-   {
-       // This loop will be interrupted, so the overall
-       // delay between pin toggles will be longer.
-       DELAY_US(DELAY);
-	   LoopCount++;
-       GpioDataRegs.GPBTOGGLE.bit.GPIO32 = 1;
-   }
-
-}
-
-
-void InitEPwmTimer()
-{
-
-   EALLOW;
-   SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0;      // Stop all the TB clocks
-   EDIS;
-
-   // Setup Sync
-   EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN;  // Pass through
-   EPwm2Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN;  // Pass through
-   EPwm3Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_IN;  // Pass through
-
-   // Allow each timer to be sync'ed
-
-   EPwm1Regs.TBCTL.bit.PHSEN = TB_ENABLE;
-   EPwm2Regs.TBCTL.bit.PHSEN = TB_ENABLE;
-   EPwm3Regs.TBCTL.bit.PHSEN = TB_ENABLE;
-
-   EPwm1Regs.TBPHS.half.TBPHS = 100;
-   EPwm2Regs.TBPHS.half.TBPHS = 200;
-   EPwm3Regs.TBPHS.half.TBPHS = 300;
-
-   EPwm1Regs.TBPRD = PWM1_TIMER_TBPRD;
-   EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP;    // Count up
-   EPwm1Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO;     // Select INT on Zero event
-   EPwm1Regs.ETSEL.bit.INTEN = PWM1_INT_ENABLE;  // Enable INT
-   EPwm1Regs.ETPS.bit.INTPRD = ET_1ST;           // Generate INT on 1st event
-
-
-   EPwm2Regs.TBPRD = PWM2_TIMER_TBPRD;
-   EPwm2Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP;     // Count up
-   EPwm2Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO;      // Enable INT on Zero event
-   EPwm2Regs.ETSEL.bit.INTEN = PWM2_INT_ENABLE;   // Enable INT
-   EPwm2Regs.ETPS.bit.INTPRD = ET_2ND;            // Generate INT on 2nd event
-
-
-   EPwm3Regs.TBPRD = PWM3_TIMER_TBPRD;
-   EPwm3Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP;     // Count up
-   EPwm3Regs.ETSEL.bit.INTSEL = ET_CTR_ZERO;      // Enable INT on Zero event
-   EPwm3Regs.ETSEL.bit.INTEN = PWM3_INT_ENABLE;   // Enable INT
-   EPwm3Regs.ETPS.bit.INTPRD = ET_3RD;            // Generate INT on 3rd event
-
-   EALLOW;
-   SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1;         // Start all the timers synced
-   EDIS;
-
-
-}
-
-// This ISR MUST be executed from RAM as it will put the Flash into Sleep
-// Interrupt routines uses in this example:
-interrupt void epwm1_timer_isr(void)
-{
-
-   // Put the Flash to sleep
-   FlashRegs.FPWR.bit.PWR = FLASH_SLEEP;
-
-   EPwm1TimerIntCount++;
-
-   // Clear INT flag for this timer
-   EPwm1Regs.ETCLR.bit.INT = 1;
-
-   // Acknowledge this interrupt to receive more interrupts from group 3
-   PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
-}
-
-// This ISR MUST be executed from RAM as it will put the Flash into Standby
-interrupt void epwm2_timer_isr(void)
-{
-   EPwm2TimerIntCount++;
-
-    // Put the Flash into standby
-    FlashRegs.FPWR.bit.PWR = FLASH_STANDBY;
-
-   // Clear INT flag for this timer
-   EPwm2Regs.ETCLR.bit.INT = 1;
-
-   // Acknowledge this interrupt to receive more interrupts from group 3
-   PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
-}
-
-interrupt void epwm3_timer_isr(void)
-{
-   Uint16 i;
-
-   EPwm3TimerIntCount++;
-
-    // Short Delay to simulate some ISR Code
-    for(i = 1; i < 0x01FF; i++) {}
-
-   // Clear INT flag for this timer
-   EPwm3Regs.ETCLR.bit.INT = 1;
-
-   // Acknowledge this interrupt to receive more interrupts from group 3
-   PieCtrlRegs.PIEACK.all = PIEACK_GROUP3;
-}
-
-
-
-
-//===========================================================================
-// No more.
-//===========================================================================
diff --git a/Source/External/v120/DSP2833x_examples/fpu/Example_2833xFPU.c b/Source/External/v120/DSP2833x_examples/fpu/Example_2833xFPU.c
deleted file mode 100644
index 66654f2..0000000
--- a/Source/External/v120/DSP2833x_examples/fpu/Example_2833xFPU.c
+++ /dev/null
@@ -1,167 +0,0 @@
-// TI File $Revision: /main/2 $
-// Checkin $Date: April 21, 2008   15:44:31 $
-//###########################################################################
-//
-// FILE:    Example_2833xFPU.c
-//
-// TITLE:   DSP2833x Device Getting Started Program.
-//
-// ASSUMPTIONS:
-//
-//    This program requires the DSP2833x header files.
-//
-//    Other then boot mode configuration, no other hardware configuration
-//    is required.
-//
-//
-//    As supplied, this project is configured for "boot to SARAM"
-//    operation.  The 2833x Boot Mode table is shown below.
-//    For information on configuring the boot mode of an eZdsp,
-//    please refer to the documentation included with the eZdsp,
-//
-//       $Boot_Table:
-//
-//         GPIO87   GPIO86     GPIO85   GPIO84
-//          XA15     XA14       XA13     XA12
-//           PU       PU         PU       PU
-//        ==========================================
-//            1        1          1        1    Jump to Flash
-//            1        1          1        0    SCI-A boot
-//            1        1          0        1    SPI-A boot
-//            1        1          0        0    I2C-A boot
-//            1        0          1        1    eCAN-A boot
-//            1        0          1        0    McBSP-A boot
-//            1        0          0        1    Jump to XINTF x16
-//            1        0          0        0    Jump to XINTF x32
-//            0        1          1        1    Jump to OTP
-//            0        1          1        0    Parallel GPIO I/O boot
-//            0        1          0        1    Parallel XINTF boot
-//            0        1          0        0    Jump to SARAM	    <- "boot to SARAM"
-//            0        0          1        1    Branch to check boot mode
-//            0        0          1        0    Boot to flash, bypass ADC cal
-//            0        0          0        1    Boot to SARAM, bypass ADC cal
-//            0        0          0        0    Boot to SCI-A, bypass ADC cal
-//                                              Boot_Table_End$
-//
-// DESCRIPTION:
-//
-// The code calculates two y=mx+b equations.  The variables are all
-// 32-bit floating-point. 
-//
-// Two projects are supplied:
-//
-// Example_fpu_hardware.pjt (floating-point):
-//
-//    If the Example_2833xFPU_hardware.pjt file is used then the compiler 
-//    will generate floating point instructions to do these calculations.
-//    To compile the project for floating point, the following Build Options were used:
-//    1. Project->Build Options-> Compiler Tab-> Advanced category: 
-//           a. in textbox: compiler options -v28 --float_support=fpu32 are set
-//           b. OR the following is equivalent to "a.": pull-down menu next to 
-//              "Floating Point Support"-> "fpu32" selected.
-//    2. Project->Build Options-> Linker Tab-> Libraries category: 
-//           a. runtime support library used is rts2800_fpu32.lib.
-//    3. Not included in this example: If the project includes any other libraries,
-//       they must also be compiled with floating point instructions.
-//
-// Example_fpu_software.pjt (fixed-point emulates floating-point with software):
-//
-//    If the Example_2833xFPU_software.pjt file is used, then the compiler
-//    will only used fixed point instructions.  This means the runtime 
-//    support library will be used to emulate floating point. 
-//    This will also run on C28x devices without the floating point unit. 
-//    To compile the project for fixed point, the following Build Options were used:
-//    1. Project->Build Options-> Compiler Tab-> Advanced category: 
-//           a. in textbox: compiler option  --float_support=fpu32 is REMOVED
-//                                            -v28 should not be removed
-//           b. OR the following is equivalent to "a.": pull-down menu next to 
-//              "Floating Point Support"-> "None" selected.
-//    2. Project->Build Options-> Linker Tab-> Libraries category: 
-//           a. runtime support library used is rts2800.lib or rts2800_ml.lib.
-//    3. Not included in this example: If the project includes any other libraries,
-//       they must also be compiled with fixed point instructions.
-//
-// Watch Variables:
-//           y1
-//           y2
-//           FPU registers (optional)
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-
-#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File
-
-float y1, y2;
-float m1, m2;
-float x1, x2;
-float b1, b2;
-
-
-void main(void)
-{
-
-// Step 1. Initialize System Control:
-// PLL, WatchDog, enable Peripheral Clocks
-// This example function is found in the DSP2833x_SysCtrl.c file.
-   InitSysCtrl();
-
-// Step 2. Initalize GPIO:
-// This example function is found in the DSP2833x_Gpio.c file and
-// illustrates how to set the GPIO to it's default state.
-// InitGpio();  // Skipped for this example
-
-
-// Step 3. Clear all interrupts and initialize PIE vector table:
-// Disable CPU interrupts
-   DINT;
-
-// Initialize the PIE control registers to their default state.
-// The default state is all PIE interrupts disabled and flags
-// are cleared.
-// This function is found in the DSP2833x_PieCtrl.c file.
-   InitPieCtrl();
-
-// Disable CPU interrupts and clear all CPU interrupt flags:
-   IER = 0x0000;
-   IFR = 0x0000;
-
-// Initialize the PIE vector table with pointers to the shell Interrupt
-// Service Routines (ISR).
-// This will populate the entire table, even if the interrupt
-// is not used in this example.  This is useful for debug purposes.
-// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
-// This function is found in DSP2833x_PieVect.c.
-   InitPieVectTable();
-
-// Interrupts that are used in this example are re-mapped to
-// ISR functions found within this file.
-
-
-// Step 5. User specific code, enable interrupts:
-
-//
-// Calculate two y=mx+b equations.  
-   
-   y1 = 0;
-   y2 = 0;
-   m1 = .5;
-   m2 = .6;
-   x1 = 3.4;
-   x2 = 7.3;
-   b1 = 4.2;
-   b2 = 8.9;
-   
-   y1 = m1*x1 + b1;
-   y2 = m2*x2 + b2;
-
-
-   ESTOP0;  // This is a software breakpoint
-}
-
-
-//===========================================================================
-// No more.
-//===========================================================================
diff --git a/Source/External/v120/DSP2833x_examples/fpu/Example_2833xFPU.gel b/Source/External/v120/DSP2833x_examples/fpu/Example_2833xFPU.gel
deleted file mode 100644
index b6531eb..0000000
--- a/Source/External/v120/DSP2833x_examples/fpu/Example_2833xFPU.gel
+++ /dev/null
@@ -1,50 +0,0 @@
-/*
-// TI File $Revision: /main/1 $
-// Checkin $Date: August 29, 2007   14:07:24 $
-//###########################################################################
-//
-// This .gel file can be used to help load and build the example project.
-// It should be unloaded from Code Composer Studio before loading another 
-// project. 
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-*/
-
-menuitem "DSP2833x FPU Example"
-
-hotmenu Load_and_Build_Fixed_Point_Project()
-{
-   GEL_ProjectLoad("Example_2833xFPU_software.pjt");
-   GEL_ProjectBuild("Example_2833xFPU_software.pjt");
-   Setup_WatchWindow();
-}
-
-hotmenu Load_and_Build_Floating_Point_Project()
-{
-   GEL_ProjectLoad("Example_2833xFPU_hardware.pjt");
-   GEL_ProjectBuild("Example_2833xFPU_hardware.pjt");
-   Setup_WatchWindow();
-}
-
-hotmenu Load_Fixed_Point_Code()
-{
-   GEL_Load(".\\debug\\Example_2833xFPU_software.out");
-   Setup_WatchWindow();
-}
-
-hotmenu Load_Floating_Point_Code()
-{
-   GEL_Load(".\\debug\\Example_2833xFPU_hardware.out");
-   Setup_WatchWindow();
-}
-
-hotmenu Setup_WatchWindow()
-{
-   GEL_WatchReset();
-   GEL_WatchAdd("y1,f");
-   GEL_WatchAdd("y2,f");
-   All_FPU_Single_Precision_Regs();
-}
diff --git a/Source/External/v120/DSP2833x_examples/fpu/Example_2833xFPU_hardware.pjt b/Source/External/v120/DSP2833x_examples/fpu/Example_2833xFPU_hardware.pjt
deleted file mode 100644
index 863f8f7..0000000
--- a/Source/External/v120/DSP2833x_examples/fpu/Example_2833xFPU_hardware.pjt
+++ /dev/null
@@ -1,46 +0,0 @@
-; Code Composer Project File, Version 2.0 (do not modify or remove this line)
-
-[Project Settings]
-ProjectName="DSP2833x"
-ProjectDir="C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\fpu\"
-ProjectType=Executable
-CPUFamily=TMS320C28XX
-Tool="Compiler"
-Tool="CustomBuilder"
-Tool="DspBiosBuilder"
-Tool="Linker"
-Config="Debug"
-Config="Release"
-
-[Source Files]
-Source="..\..\DSP2833x_common\source\DSP2833x_ADC_cal.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CodeStartBranch.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CpuTimers.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_DefaultIsr.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieVect.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_SysCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_usDelay.asm"
-Source="..\..\DSP2833x_headers\source\DSP2833x_GlobalVariableDefs.c"
-Source="Example_2833xFPU.c"
-Source="..\..\DSP2833x_common\cmd\28335_RAM_lnk.cmd"
-Source="..\..\DSP2833x_headers\cmd\DSP2833x_Headers_nonBIOS.cmd"
-
-["Compiler" Settings: "Debug"]
-Options=-g -q -pdr -al -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\fpu\Debug" -fs"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\fpu\Debug" -i"..\..\DSP2833x_headers\include" -i"..\..\DSP2833x_common\include" -d"_DEBUG" -d"LARGE_MODEL" -ml -mt -v28 --float_support=fpu32
-
-["Compiler" Settings: "Release"]
-Options=-q -o3 -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\fpu\Release" -d"LARGE_MODEL" -ml -v28
-
-["DspBiosBuilder" Settings: "Debug"]
-Options=-v28
-
-["DspBiosBuilder" Settings: "Release"]
-Options=-v28
-
-["Linker" Settings: "Debug"]
-Options=-q -c -ecode_start -m".\Debug\Example_2833xFPU_hardware.map" -o".\Debug\Example_2833xFPU_hardware.out" -stack0x200 -w -x -i"..\..\DSP2833x_headers\include" -l"rts2800_fpu32.lib"
-
-["Linker" Settings: "Release"]
-Options=-q -c -o".\Release\Example_2833xFPU_hardware.out" -x
-
diff --git a/Source/External/v120/DSP2833x_examples/fpu/Example_2833xFPU_software.pjt b/Source/External/v120/DSP2833x_examples/fpu/Example_2833xFPU_software.pjt
deleted file mode 100644
index c4cdc70..0000000
--- a/Source/External/v120/DSP2833x_examples/fpu/Example_2833xFPU_software.pjt
+++ /dev/null
@@ -1,46 +0,0 @@
-; Code Composer Project File, Version 2.0 (do not modify or remove this line)
-
-[Project Settings]
-ProjectName="DSP2833x"
-ProjectDir="C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\fpu\"
-ProjectType=Executable
-CPUFamily=TMS320C28XX
-Tool="Compiler"
-Tool="CustomBuilder"
-Tool="DspBiosBuilder"
-Tool="Linker"
-Config="Debug"
-Config="Release"
-
-[Source Files]
-Source="..\..\DSP2833x_common\source\DSP2833x_ADC_cal.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CodeStartBranch.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CpuTimers.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_DefaultIsr.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieVect.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_SysCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_usDelay.asm"
-Source="..\..\DSP2833x_headers\source\DSP2833x_GlobalVariableDefs.c"
-Source="Example_2833xFPU.c"
-Source="..\..\DSP2833x_common\cmd\28335_RAM_lnk.cmd"
-Source="..\..\DSP2833x_headers\cmd\DSP2833x_Headers_nonBIOS.cmd"
-
-["Compiler" Settings: "Debug"]
-Options=-g -q -pdr -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\fpu\Debug" -fs"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\fpu\Debug" -i"..\..\DSP2833x_headers\include" -i"..\..\DSP2833x_common\include" -d"_DEBUG" -d"LARGE_MODEL" -ml -mt -v28 
-
-["Compiler" Settings: "Release"]
-Options=-q -o3 -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\fpu\Release" -d"LARGE_MODEL" -ml -v28
-
-["DspBiosBuilder" Settings: "Debug"]
-Options=-v28
-
-["DspBiosBuilder" Settings: "Release"]
-Options=-v28
-
-["Linker" Settings: "Debug"]
-Options=-q -c -ecode_start -m".\Debug\Example_2833xFPU_software.map" -o".\Debug\Example_2833xFPU_software.out" -stack0x200 -w -x -i"..\..\DSP2833x_headers\include" -l"rts2800_ml.lib"
-
-["Linker" Settings: "Release"]
-Options=-q -c -o".\Release\Example_2833xFPU_software.out" -x
-
diff --git a/Source/External/v120/DSP2833x_examples/gpio_setup/Example_2833xGpioSetup.c b/Source/External/v120/DSP2833x_examples/gpio_setup/Example_2833xGpioSetup.c
deleted file mode 100644
index ff9c488..0000000
--- a/Source/External/v120/DSP2833x_examples/gpio_setup/Example_2833xGpioSetup.c
+++ /dev/null
@@ -1,458 +0,0 @@
-// TI File $Revision: /main/9 $
-// Checkin $Date: April 21, 2008   15:42:38 $
-//###########################################################################
-//
-// FILE:    Example_2833xGpioSetup.c
-//
-// TITLE:   DSP2833x Device GPIO Setup
-//
-// ASSUMPTIONS:
-//
-//    This program requires the DSP2833x header files.
-//
-//    Two different examples are included. Select the example
-//    to execute before compiling using the #define statements
-//    found at the top of the code.
-//
-//    As supplied, this project is configured for "boot to SARAM"
-//    operation.  The 2833x Boot Mode table is shown below.
-//    For information on configuring the boot mode of an eZdsp,
-//    please refer to the documentation included with the eZdsp,
-//
-//       $Boot_Table:
-//
-//         GPIO87   GPIO86     GPIO85   GPIO84
-//          XA15     XA14       XA13     XA12
-//           PU       PU         PU       PU
-//        ==========================================
-//            1        1          1        1    Jump to Flash
-//            1        1          1        0    SCI-A boot
-//            1        1          0        1    SPI-A boot
-//            1        1          0        0    I2C-A boot
-//            1        0          1        1    eCAN-A boot
-//            1        0          1        0    McBSP-A boot
-//            1        0          0        1    Jump to XINTF x16
-//            1        0          0        0    Jump to XINTF x32
-//            0        1          1        1    Jump to OTP
-//            0        1          1        0    Parallel GPIO I/O boot
-//            0        1          0        1    Parallel XINTF boot
-//            0        1          0        0    Jump to SARAM	    <- "boot to SARAM"
-//            0        0          1        1    Branch to check boot mode
-//            0        0          1        0    Boot to flash, bypass ADC cal
-//            0        0          0        1    Boot to SARAM, bypass ADC cal
-//            0        0          0        0    Boot to SCI-A, bypass ADC cal
-//                                              Boot_Table_End$
-//
-// DESCRIPTION:
-//
-//
-//    Configures the 2833x GPIO into two different configurations
-//    This code is verbose to illustrate how the GPIO could be setup.
-//    In a real application, lines of code can be combined for improved
-//    code size and efficency.
-//
-//    This example only sets-up the GPIO.. nothing is actually done with
-//    the pins after setup.
-//
-//    In general:
-//
-//       All pullup resistors are enabled.  For ePWMs this may not be desired.
-//       Input qual for communication ports (eCAN, SPI, SCI, I2C) is asynchronous
-//       Input qual for Trip pins (TZ) is asynchronous
-//       Input qual for eCAP and eQEP signals is synch to SYSCLKOUT
-//       Input qual for some I/O's and interrupts may have a sampling window
-//
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File
-
-// Select the example to compile in.  Only one example should be set as 1
-// the rest should be set as 0.
-
-#define EXAMPLE1 1  // Basic pinout configuration example
-#define EXAMPLE2 0  // Communication pinout example
-
-// Prototype statements for functions found within this file.
-void Gpio_setup1(void);
-void Gpio_setup2(void);
-
-void main(void)
-{
-
-// Step 1. Initialize System Control:
-// PLL, WatchDog, enable Peripheral Clocks
-// This example function is found in the DSP2833x_SysCtrl.c file.
-   InitSysCtrl();
-
-// Step 2. Initalize GPIO:
-// This example function is found in the DSP2833x_Gpio.c file and
-// illustrates how to set the GPIO to it's default state.
-   // InitGpio(); Skipped for this example
-
-// Step 3. Clear all interrupts and initialize PIE vector table:
-// Disable CPU interrupts
-   DINT;
-
-// Initialize PIE control registers to their default state.
-// The default state is all PIE interrupts disabled and flags
-// are cleared.
-// This function is found in the DSP2833x_PieCtrl.c file.
-   InitPieCtrl();
-
-// Disable CPU interrupts and clear all CPU interrupt flags:
-   IER = 0x0000;
-   IFR = 0x0000;
-
-// Initialize the PIE vector table with pointers to the shell Interrupt
-// Service Routines (ISR).
-// This will populate the entire table, even if the interrupt
-// is not used in this example.  This is useful for debug purposes.
-// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
-// This function is found in DSP2833x_PieVect.c.
-   InitPieVectTable();
-
-
-// Step 4. Initialize all the Device Peripherals:
-// This function is found in DSP2833x_InitPeripherals.c
-// InitPeripherals(); // Not required for this example
-
-// Step 5. User specific code:
-
-#if EXAMPLE1
-
-    // This example is a basic pinout
-    Gpio_setup1();
-
-#endif  // - EXAMPLE1
-
-#if EXAMPLE2
-
-    // This example is a communications pinout
-    Gpio_setup2();
-
-#endif
-
-}
-
-
-void Gpio_setup1(void)
-{
-   // Example 1:
-   // Basic Pinout.
-   // This basic pinout includes:
-   // PWM1-3, ECAP1, ECAP2, TZ1-TZ4, SPI-A, EQEP1, SCI-A, I2C
-   // and a number of I/O pins
-
-   // These can be combined into single statements for improved
-   // code efficiency.
-
-   // Enable PWM1-3 on GPIO0-GPIO5
-   EALLOW;
-   GpioCtrlRegs.GPAPUD.bit.GPIO0 = 0;   // Enable pullup on GPIO0
-   GpioCtrlRegs.GPAPUD.bit.GPIO1 = 0;   // Enable pullup on GPIO1
-   GpioCtrlRegs.GPAPUD.bit.GPIO2 = 0;   // Enable pullup on GPIO2
-   GpioCtrlRegs.GPAPUD.bit.GPIO3 = 0;   // Enable pullup on GPIO3
-   GpioCtrlRegs.GPAPUD.bit.GPIO4 = 0;   // Enable pullup on GPIO4
-   GpioCtrlRegs.GPAPUD.bit.GPIO5 = 0;   // Enable pullup on GPIO5
-   GpioCtrlRegs.GPAMUX1.bit.GPIO0 = 1;  // GPIO0 = PWM1A
-   GpioCtrlRegs.GPAMUX1.bit.GPIO1 = 1;  // GPIO1 = PWM1B
-   GpioCtrlRegs.GPAMUX1.bit.GPIO2 = 1;  // GPIO2 = PWM2A
-   GpioCtrlRegs.GPAMUX1.bit.GPIO3 = 1;  // GPIO3 = PWM2B
-   GpioCtrlRegs.GPAMUX1.bit.GPIO4 = 1;  // GPIO4 = PWM3A
-   GpioCtrlRegs.GPAMUX1.bit.GPIO5 = 1;  // GPIO5 = PWM3B
-
-   // Enable an GPIO output on GPIO6, set it high
-   GpioCtrlRegs.GPAPUD.bit.GPIO6 = 0;   // Enable pullup on GPIO6
-   GpioDataRegs.GPASET.bit.GPIO6 = 1;   // Load output latch
-   GpioCtrlRegs.GPAMUX1.bit.GPIO6 = 0;  // GPIO6 = GPIO6
-   GpioCtrlRegs.GPADIR.bit.GPIO6 = 1;   // GPIO6 = output
-
-   // Enable eCAP1 on GPIO7
-   GpioCtrlRegs.GPAPUD.bit.GPIO7 = 0;   // Enable pullup on GPIO7
-   GpioCtrlRegs.GPAQSEL1.bit.GPIO7 = 0; // Synch to SYSCLOUT
-   GpioCtrlRegs.GPAMUX1.bit.GPIO7 = 3;  // GPIO7 = ECAP2
-
-   // Enable GPIO outputs on GPIO8 - GPIO11, set it high
-   GpioCtrlRegs.GPAPUD.bit.GPIO8 = 0;   // Enable pullup on GPIO8
-   GpioDataRegs.GPASET.bit.GPIO8 = 1;   // Load output latch
-   GpioCtrlRegs.GPAMUX1.bit.GPIO8 = 0;  // GPIO8 = GPIO8
-   GpioCtrlRegs.GPADIR.bit.GPIO8 = 1;   // GPIO8 = output
-
-   GpioCtrlRegs.GPAPUD.bit.GPIO9 = 0;   // Enable pullup on GPIO9
-   GpioDataRegs.GPASET.bit.GPIO9 = 1;   // Load output latch
-   GpioCtrlRegs.GPAMUX1.bit.GPIO9 = 0;  // GPIO9 = GPIO9
-   GpioCtrlRegs.GPADIR.bit.GPIO9 = 1;   // GPIO9 = output
-
-   GpioCtrlRegs.GPAPUD.bit.GPIO10 = 0;  // Enable pullup on GPIO10
-   GpioDataRegs.GPASET.bit.GPIO10 = 1;  // Load output latch
-   GpioCtrlRegs.GPAMUX1.bit.GPIO10 = 0; // GPIO10 = GPIO10
-   GpioCtrlRegs.GPADIR.bit.GPIO6 = 1;   // GPIO10 = output
-
-   GpioCtrlRegs.GPAPUD.bit.GPIO11 = 0;  // Enable pullup on GPIO11
-   GpioCtrlRegs.GPAMUX1.bit.GPIO11 = 0; // GPIO11 = GPIO11
-   GpioCtrlRegs.GPADIR.bit.GPIO11 = 1;  // GPIO11 = output
-
-   // Enable Trip Zone inputs on GPIO12 - GPIO15
-   GpioCtrlRegs.GPAPUD.bit.GPIO12 = 0;   // Enable pullup on GPIO12
-   GpioCtrlRegs.GPAPUD.bit.GPIO13 = 0;   // Enable pullup on GPIO13
-   GpioCtrlRegs.GPAPUD.bit.GPIO14 = 0;   // Enable pullup on GPIO14
-   GpioCtrlRegs.GPAPUD.bit.GPIO15 = 0;   // Enable pullup on GPIO15
-   GpioCtrlRegs.GPAQSEL1.bit.GPIO12 = 3; // asynch input
-   GpioCtrlRegs.GPAQSEL1.bit.GPIO13 = 3; // asynch input
-   GpioCtrlRegs.GPAQSEL1.bit.GPIO14 = 3; // asynch input
-   GpioCtrlRegs.GPAQSEL1.bit.GPIO15 = 3; // asynch input
-   GpioCtrlRegs.GPAMUX1.bit.GPIO12 = 1;  // GPIO12 = TZ1
-   GpioCtrlRegs.GPAMUX1.bit.GPIO13 = 1;  // GPIO13 = TZ2
-   GpioCtrlRegs.GPAMUX1.bit.GPIO14 = 1;  // GPIO14 = TZ3
-   GpioCtrlRegs.GPAMUX1.bit.GPIO15 = 1;  // GPIO15 = TZ4
-
-   // Enable SPI-A on GPIO16 - GPIO19
-   GpioCtrlRegs.GPAPUD.bit.GPIO16 = 0;   // Enable pullup on GPIO16
-   GpioCtrlRegs.GPAPUD.bit.GPIO17 = 0;   // Enable pullup on GPIO17
-   GpioCtrlRegs.GPAPUD.bit.GPIO18 = 0;   // Enable pullup on GPIO18
-   GpioCtrlRegs.GPAPUD.bit.GPIO19 = 0;   // Enable pullup on GPIO19
-   GpioCtrlRegs.GPAQSEL2.bit.GPIO16 = 3; // asynch input
-   GpioCtrlRegs.GPAQSEL2.bit.GPIO17 = 3; // asynch input
-   GpioCtrlRegs.GPAQSEL2.bit.GPIO18 = 3; // asynch input
-   GpioCtrlRegs.GPAQSEL2.bit.GPIO19 = 3; // asynch input
-   GpioCtrlRegs.GPAMUX2.bit.GPIO16 = 1;  // GPIO16 = SPICLKA
-   GpioCtrlRegs.GPAMUX2.bit.GPIO17 = 1;  // GPIO17 = SPIS0MIA
-   GpioCtrlRegs.GPAMUX2.bit.GPIO18 = 1;  // GPIO18 = SPICLKA
-   GpioCtrlRegs.GPAMUX2.bit.GPIO19 = 1;  // GPIO19 = SPISTEA
-
-   // Enable EQEP1 on GPIO20 - GPIO23
-   GpioCtrlRegs.GPAPUD.bit.GPIO20 = 0;   // Enable pullup on GPIO20
-   GpioCtrlRegs.GPAPUD.bit.GPIO21 = 0;   // Enable pullup on GPIO21
-   GpioCtrlRegs.GPAPUD.bit.GPIO22 = 0;   // Enable pullup on GPIO22
-   GpioCtrlRegs.GPAPUD.bit.GPIO23 = 0;   // Enable pullup on GPIO23
-   GpioCtrlRegs.GPAQSEL2.bit.GPIO20 = 0; // Synch to SYSCLKOUT
-   GpioCtrlRegs.GPAQSEL2.bit.GPIO21 = 0; // Synch to SYSCLKOUT
-   GpioCtrlRegs.GPAQSEL2.bit.GPIO22 = 0; // Synch to SYSCLKOUT
-   GpioCtrlRegs.GPAQSEL2.bit.GPIO23 = 0; // Synch to SYSCLKOUT
-   GpioCtrlRegs.GPAMUX2.bit.GPIO20 = 1;  // GPIO20 = EQEP1A
-   GpioCtrlRegs.GPAMUX2.bit.GPIO21 = 1;  // GPIO21 = EQEP1B
-   GpioCtrlRegs.GPAMUX2.bit.GPIO22 = 1;  // GPIO22 = EQEP1S
-   GpioCtrlRegs.GPAMUX2.bit.GPIO23 = 1;  // GPIO23 = EQEP1I
-
-   // Enable eCAP1 on GPIO24
-   GpioCtrlRegs.GPAPUD.bit.GPIO24 = 0;   // Enable pullup on GPIO24
-   GpioCtrlRegs.GPAQSEL2.bit.GPIO24 = 0; // Synch to SYSCLKOUT
-   GpioCtrlRegs.GPAMUX2.bit.GPIO24 = 1;  // GPIO24 = ECAP1
-
-   // Set input qualifcation period for GPIO25 & GPIO26
-   GpioCtrlRegs.GPACTRL.bit.QUALPRD3=1;  // Qual period = SYSCLKOUT/2
-   GpioCtrlRegs.GPAQSEL2.bit.GPIO25=2;   // 6 samples
-   GpioCtrlRegs.GPAQSEL2.bit.GPIO26=2;   // 6 samples
-
-   // Make GPIO25 the input source for Xint1
-   GpioCtrlRegs.GPAMUX2.bit.GPIO25 = 0;  // GPIO25 = GPIO25
-   GpioCtrlRegs.GPADIR.bit.GPIO25 = 0;   // GPIO25 = input
-   GpioIntRegs.GPIOXINT1SEL.all = 25;    // Xint1 connected to GPIO25
-
-   // Make GPIO26 the input source for XINT2
-   GpioCtrlRegs.GPAMUX2.bit.GPIO26 = 0;  // GPIO26 = GPIO26
-   GpioCtrlRegs.GPADIR.bit.GPIO26 = 0;   // GPIO26 = input
-   GpioIntRegs.GPIOXINT2SEL.all = 26;    // XINT2 connected to GPIO26
-
-   // Make GPIO27 wakeup from HALT/STANDBY Low Power Modes
-   GpioCtrlRegs.GPAMUX2.bit.GPIO27 = 0; // GPIO27 = GPIO27
-   GpioCtrlRegs.GPADIR.bit.GPIO27 = 0;  // GPIO27 = input
-   GpioIntRegs.GPIOLPMSEL.bit.GPIO27=1; // GPIO27 will wake the device
-   SysCtrlRegs.LPMCR0.bit.QUALSTDBY=2;  // Qualify GPIO27 by 2 OSCCLK
-                                        // cycles before waking the device
-                                        // from STANDBY
-
-   // Enable SCI-A on GPIO28 - GPIO29
-   GpioCtrlRegs.GPAPUD.bit.GPIO28 = 0;   // Enable pullup on GPIO28
-   GpioCtrlRegs.GPAQSEL2.bit.GPIO28 = 3; // Asynch input
-   GpioCtrlRegs.GPAMUX2.bit.GPIO28 = 1;  // GPIO28 = SCIRXDA
-   GpioCtrlRegs.GPAPUD.bit.GPIO29 = 0;   // Enable pullup on GPIO29
-   GpioCtrlRegs.GPAMUX2.bit.GPIO29 = 1;  // GPIO29 = SCITXDA
-
-   // Enable CAN-A on GPIO30 - GPIO31
-   GpioCtrlRegs.GPAPUD.bit.GPIO30 = 0;   // Enable pullup on GPIO30
-   GpioCtrlRegs.GPAMUX2.bit.GPIO30 = 1;  // GPIO30 = CANTXA
-   GpioCtrlRegs.GPAPUD.bit.GPIO31 = 0;   // Enable pullup on GPIO31
-   GpioCtrlRegs.GPAQSEL2.bit.GPIO31 = 3; // Asynch input
-   GpioCtrlRegs.GPAMUX2.bit.GPIO31 = 1;  // GPIO31 = CANRXA
-
-
-   // Enable I2C-A on GPIO32 - GPIO33
-   GpioCtrlRegs.GPBPUD.bit.GPIO32 = 0;   // Enable pullup on GPIO32
-   GpioCtrlRegs.GPBMUX1.bit.GPIO32 = 1;  // GPIO32 = SDAA
-   GpioCtrlRegs.GPBQSEL1.bit.GPIO33 = 3; // Asynch input
-   GpioCtrlRegs.GPBPUD.bit.GPIO33 = 0;   // Enable pullup on GPIO33
-   GpioCtrlRegs.GPBQSEL1.bit.GPIO33 = 3; // Asynch input
-   GpioCtrlRegs.GPBMUX1.bit.GPIO33 = 1;  // GPIO33 = SCLA
-
-   // Make GPIO34 an input
-   GpioCtrlRegs.GPBPUD.bit.GPIO34 = 0;  // Enable pullup on GPIO34
-   GpioCtrlRegs.GPBMUX1.bit.GPIO34 = 0; // GPIO34 = GPIO34
-   GpioCtrlRegs.GPBDIR.bit.GPIO34 = 0;  // GPIO34 = input
-   EDIS;
-}
-
-void Gpio_setup2(void)
-{
-   // Example 1:
-   // Communications Pinout.
-   // This basic communications pinout includes:
-   // PWM1-3, CAP1, CAP2, SPI-A, SPI-B, CAN-A, SCI-A and I2C
-   // and a number of I/O pins
-
-   // Enable PWM1-3 on GPIO0-GPIO5
-   EALLOW;
-   GpioCtrlRegs.GPAPUD.bit.GPIO0 = 0;   // Enable pullup on GPIO0
-   GpioCtrlRegs.GPAPUD.bit.GPIO1 = 0;   // Enable pullup on GPIO1
-   GpioCtrlRegs.GPAPUD.bit.GPIO2 = 0;   // Enable pullup on GPIO2
-   GpioCtrlRegs.GPAPUD.bit.GPIO3 = 0;   // Enable pullup on GPIO3
-   GpioCtrlRegs.GPAPUD.bit.GPIO4 = 0;   // Enable pullup on GPIO4
-   GpioCtrlRegs.GPAPUD.bit.GPIO5 = 0;   // Enable pullup on GPIO5
-   GpioCtrlRegs.GPAMUX1.bit.GPIO0 = 1;  // GPIO0 = PWM1A
-   GpioCtrlRegs.GPAMUX1.bit.GPIO1 = 1;  // GPIO1 = PWM1B
-   GpioCtrlRegs.GPAMUX1.bit.GPIO2 = 1;  // GPIO2 = PWM2A
-   GpioCtrlRegs.GPAMUX1.bit.GPIO3 = 1;  // GPIO3 = PWM2B
-   GpioCtrlRegs.GPAMUX1.bit.GPIO4 = 1;  // GPIO4 = PWM3A
-   GpioCtrlRegs.GPAMUX1.bit.GPIO5 = 1;  // GPIO5 = PWM3B
-
-   // Enable an GPIO output on GPIO6
-   GpioCtrlRegs.GPAPUD.bit.GPIO6 = 0;   // Enable pullup on GPIO6
-   GpioDataRegs.GPASET.bit.GPIO6 = 1;   // Load output latch
-   GpioCtrlRegs.GPAMUX1.bit.GPIO6 = 0;  // GPIO6 = GPIO6
-   GpioCtrlRegs.GPADIR.bit.GPIO6 = 1;   // GPIO6 = output
-
-   // Enable eCAP1 on GPIO7
-   GpioCtrlRegs.GPAPUD.bit.GPIO7 = 0;   // Enable pullup on GPIO7
-   GpioCtrlRegs.GPAQSEL1.bit.GPIO7 = 0; // Synch to SYSCLKOUT
-   GpioCtrlRegs.GPAMUX1.bit.GPIO7 = 3;  // GPIO7 = ECAP2
-
-   // Enable GPIO outputs on GPIO8 - GPIO11
-   GpioCtrlRegs.GPAPUD.bit.GPIO8 = 0;   // Enable pullup on GPIO8
-   GpioDataRegs.GPASET.bit.GPIO8 = 1;   // Load output latch
-   GpioCtrlRegs.GPAMUX1.bit.GPIO8 = 0;  // GPIO8 = GPIO8
-   GpioCtrlRegs.GPADIR.bit.GPIO8 = 1;   // GPIO8 = output
-
-   GpioCtrlRegs.GPAPUD.bit.GPIO9 = 0;   // Enable pullup on GPIO9
-   GpioDataRegs.GPASET.bit.GPIO9 = 1;   // Load output latch
-   GpioCtrlRegs.GPAMUX1.bit.GPIO9 = 0;  // GPIO9 = GPIO9
-   GpioCtrlRegs.GPADIR.bit.GPIO9 = 1;   // GPIO9 = output
-
-   GpioCtrlRegs.GPAPUD.bit.GPIO10 = 0;  // Enable pullup on GPIO10
-   GpioDataRegs.GPASET.bit.GPIO10 = 1;  // Load output latch
-   GpioCtrlRegs.GPAMUX1.bit.GPIO10 = 0; // GPIO10 = GPIO10
-   GpioCtrlRegs.GPADIR.bit.GPIO10 = 1;  // GPIO10 = output
-
-   GpioCtrlRegs.GPAPUD.bit.GPIO11 = 0;  // Enable pullup on GPIO11
-   GpioDataRegs.GPASET.bit.GPIO11 = 1;  // Load output latch
-   GpioCtrlRegs.GPAMUX1.bit.GPIO11 = 0; // GPIO11 = GPIO11
-   GpioCtrlRegs.GPADIR.bit.GPIO11 = 1;  // GPIO11 = output
-
-   // Enable SPI-B on GPIO12 - GPIO15
-   GpioCtrlRegs.GPAPUD.bit.GPIO12 = 0;   // Enable pullup on GPIO12 (SPISIMOB)
-   GpioCtrlRegs.GPAPUD.bit.GPIO12 = 0;   // Enable pullup on GPIO13 (SPISOMIB)
-   GpioCtrlRegs.GPAPUD.bit.GPIO14 = 0;   // Enable pullup on GPIO14 (SPICLKB)
-   GpioCtrlRegs.GPAPUD.bit.GPIO15 = 0;   // Enable pullup on GPIO15 (SPISTEB)
-   GpioCtrlRegs.GPAQSEL1.bit.GPIO12 = 3; // asynch input
-   GpioCtrlRegs.GPAQSEL1.bit.GPIO13 = 3; // asynch input
-   GpioCtrlRegs.GPAQSEL1.bit.GPIO14 = 3; // asynch input
-   GpioCtrlRegs.GPAQSEL1.bit.GPIO15 = 3; // asynch input
-   GpioCtrlRegs.GPAMUX1.bit.GPIO12 = 3;  // GPIO12 = SPISIMOB
-   GpioCtrlRegs.GPAMUX1.bit.GPIO13 = 3;  // GPIO13 = SPISOMIB
-   GpioCtrlRegs.GPAMUX1.bit.GPIO14 = 3;  // GPIO14 = SPICLKB
-   GpioCtrlRegs.GPAMUX1.bit.GPIO15 = 3;  // GPIO15 = SPISTEB
-
-   // Enable SPI-A on GPIO16 - GPIO19
-   GpioCtrlRegs.GPAPUD.bit.GPIO16 = 0;   // Enable pullup on GPIO16 (SPICLKA)
-   GpioCtrlRegs.GPAPUD.bit.GPIO17 = 0;   // Enable pullup on GPIO17 (SPIS0MIA)
-   GpioCtrlRegs.GPAPUD.bit.GPIO18 = 0;   // Enable pullup on GPIO18 (SPICLKA)
-   GpioCtrlRegs.GPAPUD.bit.GPIO19 = 0;   // Enable pullup on GPIO19 (SPISTEA)
-   GpioCtrlRegs.GPAQSEL2.bit.GPIO16 = 3; // asynch input
-   GpioCtrlRegs.GPAQSEL2.bit.GPIO17 = 3; // asynch input
-   GpioCtrlRegs.GPAQSEL2.bit.GPIO18 = 3; // asynch input
-   GpioCtrlRegs.GPAQSEL2.bit.GPIO19 = 3; // asynch input
-   GpioCtrlRegs.GPAMUX2.bit.GPIO16 = 1;  // GPIO16 = SPICLKA
-   GpioCtrlRegs.GPAMUX2.bit.GPIO17 = 1;  // GPIO17 = SPIS0MIA
-   GpioCtrlRegs.GPAMUX2.bit.GPIO18 = 1;  // GPIO18 = SPICLKA
-   GpioCtrlRegs.GPAMUX2.bit.GPIO19 = 1;  // GPIO19 = SPISTEA
-
-   // Enable EQEP1 on GPIO20 - GPIO23
-   GpioCtrlRegs.GPAPUD.bit.GPIO20 = 0;   // Enable pullup on GPIO20 (EQEP1A)
-   GpioCtrlRegs.GPAPUD.bit.GPIO21 = 0;   // Enable pullup on GPIO21 (EQEP1B)
-   GpioCtrlRegs.GPAPUD.bit.GPIO22 = 0;   // Enable pullup on GPIO22 (EQEP1S)
-   GpioCtrlRegs.GPAPUD.bit.GPIO23 = 0;   // Enable pullup on GPIO23 (EQEP1I)
-   GpioCtrlRegs.GPAQSEL2.bit.GPIO20 = 0; // Synch to SYSCLKOUT
-   GpioCtrlRegs.GPAQSEL2.bit.GPIO21 = 0; // Synch to SYSCLKOUT
-   GpioCtrlRegs.GPAQSEL2.bit.GPIO22 = 0; // Synch to SYSCLKOUT
-   GpioCtrlRegs.GPAQSEL2.bit.GPIO23 = 0; // Synch to SYSCLKOUT
-   GpioCtrlRegs.GPAMUX2.bit.GPIO20 = 1;  // GPIO20 = EQEP1A
-   GpioCtrlRegs.GPAMUX2.bit.GPIO21 = 1;  // GPIO21 = EQEP1B
-   GpioCtrlRegs.GPAMUX2.bit.GPIO22 = 1;  // GPIO22 = EQEP1S
-   GpioCtrlRegs.GPAMUX2.bit.GPIO23 = 1;  // GPIO23 = EQEP1I
-
-   // Enable eCAP1 on GPIO24
-   GpioCtrlRegs.GPAPUD.bit.GPIO24 = 0;   // Enable pullup on GPIO24 (ECAP1)
-   GpioCtrlRegs.GPAQSEL2.bit.GPIO24 = 0; // Synch to SYSCLKOUT
-   GpioCtrlRegs.GPAMUX2.bit.GPIO24 = 1;  // GPIO24 = ECAP1
-
-   // Set input qualifcation period for GPIO25 & GPIO26 inputs
-   GpioCtrlRegs.GPACTRL.bit.QUALPRD3=1;  // Qual period = SYSCLKOUT/2
-   GpioCtrlRegs.GPAQSEL2.bit.GPIO25=2;   // 6 samples
-   GpioCtrlRegs.GPAQSEL2.bit.GPIO26=1;   // 3 samples
-
-   // Make GPIO25 the input source for Xint1
-   GpioCtrlRegs.GPAMUX2.bit.GPIO25 = 0; // GPIO25 = GPIO25
-   GpioCtrlRegs.GPADIR.bit.GPIO25 = 0;  // GPIO25 = input
-   GpioIntRegs.GPIOXINT1SEL.all = 25;   // Xint1 connected to GPIO25
-
-   // Make GPIO26 the input source for XINT2
-   GpioCtrlRegs.GPAMUX2.bit.GPIO26 = 0; // GPIO26 = GPIO26
-   GpioCtrlRegs.GPADIR.bit.GPIO26 = 0;  // GPIO26 = input
-   GpioIntRegs.GPIOXINT2SEL.all = 26;   // XINT2 connected to GPIO26
-
-   // Make GPIO27 wakeup from HALT/STANDBY Low Power Modes
-   GpioCtrlRegs.GPAMUX2.bit.GPIO27 = 0; // GPIO27 = GPIO27
-   GpioCtrlRegs.GPADIR.bit.GPIO27 = 0;  // GPIO27 = input
-   GpioIntRegs.GPIOLPMSEL.bit.GPIO27=1; // GPIO27 will wake the device
-   SysCtrlRegs.LPMCR0.bit.QUALSTDBY=2;  // Qualify GPIO27 by 2 OSCCLK
-                                        // cycles before waking the device
-                                        // from STANDBY
-
-   // Enable SCI-A on GPIO28 - GPIO29
-   GpioCtrlRegs.GPAPUD.bit.GPIO28 = 0;   // Enable pullup on GPIO28
-   GpioCtrlRegs.GPAQSEL2.bit.GPIO28 = 3; // asynch input
-   GpioCtrlRegs.GPAMUX2.bit.GPIO28 = 1;  // GPIO28 = SCIRXDA
-   GpioCtrlRegs.GPAPUD.bit.GPIO29 = 0;   // Enable pullup on GPIO29
-   GpioCtrlRegs.GPAMUX2.bit.GPIO29 = 1;  // GPIO29 = SCITXDA
-
-   // Enable CAN-A on GPIO30 - GPIO31
-   GpioCtrlRegs.GPAPUD.bit.GPIO30 = 0;   // Enable pullup on GPIO30
-   GpioCtrlRegs.GPAMUX2.bit.GPIO30 = 1;  // GPIO30 = CANTXA
-   GpioCtrlRegs.GPAPUD.bit.GPIO31 = 0;   // Enable pullup on GPIO31
-   GpioCtrlRegs.GPAQSEL2.bit.GPIO31 = 3; // asynch input
-   GpioCtrlRegs.GPAMUX2.bit.GPIO31 = 1;  // GPIO31 = CANRXA
-
-   // Enable I2C-A on GPIO32 - GPIO33
-   GpioCtrlRegs.GPBPUD.bit.GPIO32 = 0;   // Enable pullup on GPIO32
-   GpioCtrlRegs.GPBPUD.bit.GPIO33 = 0;   // Enable pullup on GPIO33
-   GpioCtrlRegs.GPBQSEL1.bit.GPIO32 = 3; // asynch input
-   GpioCtrlRegs.GPBQSEL1.bit.GPIO32 = 3; // asynch input
-   GpioCtrlRegs.GPBMUX1.bit.GPIO32 = 1;  // GPIO32 = SDAA
-   GpioCtrlRegs.GPBMUX1.bit.GPIO33 = 1;  // GPIO33 = SCLA
-
-   // Make GPIO34 an input
-   GpioCtrlRegs.GPBPUD.bit.GPIO32 = 0;   // Enable pullup on GPIO34
-   GpioCtrlRegs.GPBMUX1.bit.GPIO34 = 0;  // GPIO34 = GPIO34
-   GpioCtrlRegs.GPBDIR.bit.GPIO34 = 0;   // GPIO34 = input
-
-   EDIS;
-}
-
-
-//===========================================================================
-// No more.
-//===========================================================================
-
diff --git a/Source/External/v120/DSP2833x_examples/gpio_setup/Example_2833xGpioSetup.gel b/Source/External/v120/DSP2833x_examples/gpio_setup/Example_2833xGpioSetup.gel
deleted file mode 100644
index 84616d3..0000000
--- a/Source/External/v120/DSP2833x_examples/gpio_setup/Example_2833xGpioSetup.gel
+++ /dev/null
@@ -1,35 +0,0 @@
-/*
-// TI File $Revision: /main/5 $
-// Checkin $Date: August 9, 2007   17:16:35 $
-//###########################################################################
-//
-// This .gel file can be used to help load and build the example project.
-// It should be unloaded from Code Composer Studio before loading another 
-// project. 
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-*/
-
-menuitem "DSP2833x GPIO Setup Example"
-
-hotmenu Load_and_Build_Project()
-{
-   GEL_ProjectLoad("Example_2833xGpioSetup.pjt");
-   GEL_ProjectBuild("Example_2833xGpioSetup.pjt");
-   Setup_WatchWindow();
-}
-
-hotmenu Load_Code()
-{
-   GEL_Load(".\\debug\\Example_2833xGpioSetup.out");
-   Setup_WatchWindow();
-}
-
-hotmenu Setup_WatchWindow()
-{
-   GEL_WatchReset();
-   GEL_WatchAdd(" GpioCtrlRegs,x");
-}
diff --git a/Source/External/v120/DSP2833x_examples/gpio_setup/Example_2833xGpioSetup.pjt b/Source/External/v120/DSP2833x_examples/gpio_setup/Example_2833xGpioSetup.pjt
deleted file mode 100644
index 246125c..0000000
--- a/Source/External/v120/DSP2833x_examples/gpio_setup/Example_2833xGpioSetup.pjt
+++ /dev/null
@@ -1,44 +0,0 @@
-; Code Composer Project File, Version 2.0 (do not modify or remove this line)
-
-[Project Settings]
-ProjectName="DSP2833x"
-ProjectDir="C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\gpio_setup\"
-ProjectType=Executable
-CPUFamily=TMS320C28XX
-Tool="Compiler"
-Tool="DspBiosBuilder"
-Tool="Linker"
-Config="Debug"
-Config="Release"
-
-[Source Files]
-Source="..\..\DSP2833x_common\source\DSP2833x_ADC_cal.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CodeStartBranch.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_DefaultIsr.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieVect.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_SysCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_usDelay.asm"
-Source="..\..\DSP2833x_headers\source\DSP2833x_GlobalVariableDefs.c"
-Source="Example_2833xGpioSetup.c"
-Source="..\..\DSP2833x_common\cmd\28335_RAM_lnk.cmd"
-Source="..\..\DSP2833x_headers\cmd\DSP2833x_Headers_nonBIOS.cmd"
-
-["Compiler" Settings: "Debug"]
-Options=-g -q -pdr -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\gpio_setup\Debug" -fs"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\gpio_setup\Debug" -i"..\..\DSP2833x_headers\include" -i"..\..\DSP2833x_common\include" -d"_DEBUG" -d"LARGE_MODEL" --float_support=fpu32 -ml -mt -v28
-
-["Compiler" Settings: "Release"]
-Options=-q -o3 -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\gpio_setup\Release" -d"LARGE_MODEL" -ml -v28
-
-["DspBiosBuilder" Settings: "Debug"]
-Options=-v28
-
-["DspBiosBuilder" Settings: "Release"]
-Options=-v28
-
-["Linker" Settings: "Debug"]
-Options=-q -c -ecode_start -m".\Debug\Example_2833xGpioSetup.map" -o".\Debug\Example_2833xGpioSetup.out" -stack0x200 -w -x -i"..\..\DSP2833x_headers\include" -l"rts2800_fpu32.lib"
-
-["Linker" Settings: "Release"]
-Options=-q -c -o".\Release\Example_2833xGpioToggle.out" -x
-
diff --git a/Source/External/v120/DSP2833x_examples/gpio_toggle/Example_2833xGpioToggle.c b/Source/External/v120/DSP2833x_examples/gpio_toggle/Example_2833xGpioToggle.c
deleted file mode 100644
index 017a1f7..0000000
--- a/Source/External/v120/DSP2833x_examples/gpio_toggle/Example_2833xGpioToggle.c
+++ /dev/null
@@ -1,245 +0,0 @@
-// TI File $Revision: /main/8 $
-// Checkin $Date: April 21, 2008   15:42:43 $
-//###########################################################################
-//
-// FILE:    Example_2833xGpioToggle.c
-//
-// TITLE:   DSP2833x Device GPIO toggle test program. 
-//
-// ASSUMPTIONS:
-//
-//    This program requires the DSP2833x header files.  
-//
-//    ALL OF THE I/O'S TOGGLE IN THIS PROGRAM.  MAKE SURE
-//    THIS WILL NOT DAMAGE YOUR HARDWARE BEFORE RUNNING THIS
-//    EXAMPLE.
-//
-//    Monitor desired pins on an oscilloscope.
-//
-//    As supplied, this project is configured for "boot to SARAM" 
-//    operation.  The 2833x Boot Mode table is shown below.  
-//    For information on configuring the boot mode of an eZdsp, 
-//    please refer to the documentation included with the eZdsp,  
-//
-//       $Boot_Table:
-//
-//         GPIO87   GPIO86     GPIO85   GPIO84
-//          XA15     XA14       XA13     XA12
-//           PU       PU         PU       PU
-//        ==========================================
-//            1        1          1        1    Jump to Flash
-//            1        1          1        0    SCI-A boot
-//            1        1          0        1    SPI-A boot
-//            1        1          0        0    I2C-A boot
-//            1        0          1        1    eCAN-A boot
-//            1        0          1        0    McBSP-A boot
-//            1        0          0        1    Jump to XINTF x16
-//            1        0          0        0    Jump to XINTF x32
-//            0        1          1        1    Jump to OTP
-//            0        1          1        0    Parallel GPIO I/O boot
-//            0        1          0        1    Parallel XINTF boot
-//            0        1          0        0    Jump to SARAM	    <- "boot to SARAM"
-//            0        0          1        1    Branch to check boot mode
-//            0        0          1        0    Boot to flash, bypass ADC cal
-//            0        0          0        1    Boot to SARAM, bypass ADC cal
-//            0        0          0        0    Boot to SCI-A, bypass ADC cal
-//                                              Boot_Table_End$
-//
-// DESCRIPTION:
-//
-//     Three different examples are included. Select the example 
-//     (data, set/clear or toggle) to execute before compiling using
-//     the #define statements found at the top of the code.   
-//
-//
-//     Toggle all of the GPIO PORT pins 
-//        
-//    The pins can be observed using Oscilloscope.  
-// 
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File
-
-// Select the example to compile in.  Only one example should be set as 1
-// the rest should be set as 0.
-#define EXAMPLE1 1  // Use DATA registers to toggle I/O's
-#define EXAMPLE2 0  // Use SET/CLEAR registers to toggle I/O's
-#define EXAMPLE3 0  // Use TOGGLE registers to toggle I/O's
-
-
-// Prototype statements for functions found within this file.
-void delay_loop(void);
-void Gpio_select(void);
-void Gpio_example1(void);
-void Gpio_example2(void);
-void Gpio_example3(void);
-
-void main(void)
-{
-
-// Step 1. Initialize System Control:
-// PLL, WatchDog, enable Peripheral Clocks
-// This example function is found in the DSP2833x_SysCtrl.c file.
-   InitSysCtrl();
-   
-// Step 2. Initalize GPIO: 
-// This example function is found in the DSP2833x_Gpio.c file and
-// illustrates how to set the GPIO to it's default state.
-// InitGpio();  // Skipped for this example
- 
-// For this example use the following configuration:
-   Gpio_select();	  
-
-// Step 3. Clear all interrupts and initialize PIE vector table:
-// Disable CPU interrupts 
-   DINT;
-
-// Initialize PIE control registers to their default state.
-// The default state is all PIE interrupts disabled and flags
-// are cleared.  
-// This function is found in the DSP2833x_PieCtrl.c file.
-   InitPieCtrl();
-
-// Disable CPU interrupts and clear all CPU interrupt flags:
-   IER = 0x0000;
-   IFR = 0x0000;
-
-// Initialize the PIE vector table with pointers to the shell Interrupt 
-// Service Routines (ISR).  
-// This will populate the entire table, even if the interrupt
-// is not used in this example.  This is useful for debug purposes.
-// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
-// This function is found in DSP2833x_PieVect.c.
-   InitPieVectTable();
-
-	
-// Step 4. Initialize all the Device Peripherals:
-// This function is found in DSP2833x_InitPeripherals.c
-// InitPeripherals(); // Not required for this example
-	
-// Step 5. User specific code:
-	
-#if EXAMPLE1
-
-    // This example uses DATA registers to toggle I/O's
-    Gpio_example1();
-
-#endif  // - EXAMPLE1
-
-#if EXAMPLE2
-
-    // This example uses SET/CLEAR registers to toggle I/O's
-    Gpio_example2();
-    
-#endif
-
-#if EXAMPLE3
-
-    // This example uses TOGGLE registers to toggle I/O's
-    Gpio_example3();
-    
-#endif
-
-} 	
-
-void delay_loop()
-{
-    short      i;
-    for (i = 0; i < 1000; i++) {}
-}
-
-
-void Gpio_example1(void)
-{ 
-   // Example 1:
-   // Toggle I/Os using DATA registers
-
-   for(;;)
-   {   
-       GpioDataRegs.GPADAT.all    =0xAAAAAAAA;
-       GpioDataRegs.GPBDAT.all    =0x0000000A;   			  
-       
-       delay_loop();
-
-       GpioDataRegs.GPADAT.all    =0x55555555; 
-       GpioDataRegs.GPBDAT.all    =0x00000005; 
-    
-       delay_loop();	
-    }
-}
-
-void Gpio_example2(void)
-{ 
-   // Example 2:
-   // Toggle I/Os using SET/CLEAR registers
-   for(;;)
-   {    
-   
-       GpioDataRegs.GPASET.all    =0xAAAAAAAA;
-       GpioDataRegs.GPACLEAR.all  =0x55555555;
-       
-       GpioDataRegs.GPBSET.all    =0x0000000A;   			  
-       GpioDataRegs.GPBCLEAR.all  =0x00000005;   			  
-              
-       delay_loop();
-
-       GpioDataRegs.GPACLEAR.all    =0xAAAAAAAA;
-       GpioDataRegs.GPASET.all      =0x55555555;
-       
-       GpioDataRegs.GPBCLEAR.all    =0x0000000A;   			  
-       GpioDataRegs.GPBSET.all      =0x00000005;   			  
-    
-       delay_loop();	
-   
-    }
-}
-
-void Gpio_example3(void)
-{ 
-   // Example 2:
-   // Toggle I/Os using TOGGLE registers
-
-   // Set pins to a known state
-   
-      GpioDataRegs.GPASET.all    =0xAAAAAAAA;
-      GpioDataRegs.GPACLEAR.all  =0x55555555;
-       
-      GpioDataRegs.GPBSET.all    =0x0000000A;   			  
-      GpioDataRegs.GPBCLEAR.all  =0x00000005;   			     
-
-   // Use TOGGLE registers to flip the state of
-   // the pins. 
-   // Any bit set to a 1 will flip state (toggle)
-   // Any bit set to a 0 will not toggle.   
-
-   for(;;)
-   {    
-      GpioDataRegs.GPATOGGLE.all =0xFFFFFFFF;
-      GpioDataRegs.GPBTOGGLE.all =0x0000000F;   			  
-      delay_loop();
-    }
-}
-
-
-
-void Gpio_select(void)
-{
-
-   
-    EALLOW;
-	GpioCtrlRegs.GPAMUX1.all = 0x00000000;  // All GPIO
-	GpioCtrlRegs.GPAMUX2.all = 0x00000000;  // All GPIO
-	GpioCtrlRegs.GPAMUX1.all = 0x00000000;  // All GPIO
-    GpioCtrlRegs.GPADIR.all = 0xFFFFFFFF;   // All outputs
-    GpioCtrlRegs.GPBDIR.all = 0x0000000F;   // All outputs
-    EDIS;
-     
-}     
-//===========================================================================
-// No more.
-//===========================================================================
-
diff --git a/Source/External/v120/DSP2833x_examples/gpio_toggle/Example_2833xGpioToggle.gel b/Source/External/v120/DSP2833x_examples/gpio_toggle/Example_2833xGpioToggle.gel
deleted file mode 100644
index 5e49d74..0000000
--- a/Source/External/v120/DSP2833x_examples/gpio_toggle/Example_2833xGpioToggle.gel
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
-// TI File $Revision: /main/5 $
-// Checkin $Date: August 9, 2007   17:16:50 $
-//###########################################################################
-//
-// This .gel file can be used to help load and build the example project.
-// It should be unloaded from Code Composer Studio before loading another 
-// project. 
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-*/
-
-menuitem "DSP2833x GPIO Toggle Test"
-
-hotmenu Load_and_Build_Project()
-{
-   GEL_ProjectLoad("Example_2833xGpioToggle.pjt");
-   GEL_ProjectBuild("Example_2833xGpioToggle.pjt");
-   Setup_WatchWindow();
-}
-
-hotmenu Load_Code()
-{
-   GEL_Load(".\\debug\\Example_2833xGpioToggle.out");
-   Setup_WatchWindow();
-}
-
-hotmenu Setup_WatchWindow()
-{
-   GEL_WatchReset();
-   GEL_WatchAdd("GpioDataRegs,x");
-   GEL_WatchAdd("GpioCtrlRegs,x");
-}
diff --git a/Source/External/v120/DSP2833x_examples/gpio_toggle/Example_2833xGpioToggle.pjt b/Source/External/v120/DSP2833x_examples/gpio_toggle/Example_2833xGpioToggle.pjt
deleted file mode 100644
index ae80e72..0000000
--- a/Source/External/v120/DSP2833x_examples/gpio_toggle/Example_2833xGpioToggle.pjt
+++ /dev/null
@@ -1,44 +0,0 @@
-; Code Composer Project File, Version 2.0 (do not modify or remove this line)
-
-[Project Settings]
-ProjectName="DSP2833x"
-ProjectDir="C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\gpio_toggle\"
-ProjectType=Executable
-CPUFamily=TMS320C28XX
-Tool="Compiler"
-Tool="DspBiosBuilder"
-Tool="Linker"
-Config="Debug"
-Config="Release"
-
-[Source Files]
-Source="..\..\DSP2833x_common\source\DSP2833x_ADC_cal.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CodeStartBranch.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_DefaultIsr.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieVect.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_SysCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_usDelay.asm"
-Source="..\..\DSP2833x_headers\source\DSP2833x_GlobalVariableDefs.c"
-Source="Example_2833xGpioToggle.c"
-Source="..\..\DSP2833x_common\cmd\28335_RAM_lnk.cmd"
-Source="..\..\DSP2833x_headers\cmd\DSP2833x_Headers_nonBIOS.cmd"
-
-["Compiler" Settings: "Debug"]
-Options=-g -q -pdr -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\gpio_toggle\Debug" -fs"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\gpio_toggle\Debug" -i"..\..\DSP2833x_headers\include" -i"..\..\DSP2833x_common\include" -d"_DEBUG" -d"LARGE_MODEL" --float_support=fpu32 -ml -mt -v28
-
-["Compiler" Settings: "Release"]
-Options=-q -o3 -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\gpio_toggle\Release" -d"LARGE_MODEL" -ml -v28
-
-["DspBiosBuilder" Settings: "Debug"]
-Options=-v28
-
-["DspBiosBuilder" Settings: "Release"]
-Options=-v28
-
-["Linker" Settings: "Debug"]
-Options=-q -c -ecode_start -m".\Debug\Example_2833xGpioToggle.map" -o".\Debug\Example_2833xGpioToggle.out" -stack0x200 -w -x -i"..\..\DSP2833x_headers\include" -l"rts2800_fpu32.lib"
-
-["Linker" Settings: "Release"]
-Options=-q -c -o".\Release\Example_2833xGpioToggle.out" -x
-
diff --git a/Source/External/v120/DSP2833x_examples/hrpwm/Example_2833xHRPWM.c b/Source/External/v120/DSP2833x_examples/hrpwm/Example_2833xHRPWM.c
deleted file mode 100644
index 66c2b43..0000000
--- a/Source/External/v120/DSP2833x_examples/hrpwm/Example_2833xHRPWM.c
+++ /dev/null
@@ -1,376 +0,0 @@
-// TI File $Revision: /main/14 $
-// Checkin $Date: May 5, 2008   15:25:53 $
-//###########################################################################
-//
-// FILE:	Example_2833xHRPWM.c
-//
-// TITLE:	DSP2833x Device HRPWM example
-//
-// ASSUMPTIONS:
-//
-//
-//    This program requires the DSP2833x header files.
-//
-//    Monitor ePWM1-ePWM4 pins on an oscilloscope as described
-//    below.
-//
-//       EPWM1A is on GPIO0
-//       EPWM1B is on GPIO1
-//
-//       EPWM2A is on GPIO2
-//       EPWM2B is on GPIO3
-//
-//       EPWM3A is on GPIO4
-//       EPWM3B is on GPIO5
-//
-//    As supplied, this project is configured for "boot to SARAM"
-//    operation.  The 2833x Boot Mode table is shown below.
-//    For information on configuring the boot mode of an eZdsp,
-//    please refer to the documentation included with the eZdsp,
-//
-//       $Boot_Table:
-//
-//         GPIO87   GPIO86     GPIO85   GPIO84
-//          XA15     XA14       XA13     XA12
-//           PU       PU         PU       PU
-//        ==========================================
-//            1        1          1        1    Jump to Flash
-//            1        1          1        0    SCI-A boot
-//            1        1          0        1    SPI-A boot
-//            1        1          0        0    I2C-A boot
-//            1        0          1        1    eCAN-A boot
-//            1        0          1        0    McBSP-A boot
-//            1        0          0        1    Jump to XINTF x16
-//            1        0          0        0    Jump to XINTF x32
-//            0        1          1        1    Jump to OTP
-//            0        1          1        0    Parallel GPIO I/O boot
-//            0        1          0        1    Parallel XINTF boot
-//            0        1          0        0    Jump to SARAM	    <- "boot to SARAM"
-//            0        0          1        1    Branch to check boot mode
-//            0        0          1        0    Boot to flash, bypass ADC cal
-//            0        0          0        1    Boot to SARAM, bypass ADC cal
-//            0        0          0        0    Boot to SCI-A, bypass ADC cal
-//                                              Boot_Table_End$
-//
-// DESCRIPTION:
-//
-//       This example modifies the MEP control registers to show edge displacement
-//       due to the HRPWM control extension of the respective ePWM module
-//       All ePWM1A,2A,3A,4A channels (GPIO0, GPIO2, GPIO4, GPIO6) will have fine edge movement
-//       due to HRPWM logic
-//
-//            1. 15MHz PWM (for 150 MHz SYSCLKOUT) or 10MHz PWM (for 100MHz SYSCLKOUT),
-//                 ePWM1A toggle low/high with MEP control on rising edge
-//               15MHz PWM (for 150 MHz SYSCLKOUT) or 10MHz PWM (for 100MHz SYSCLKOUT),
-//                 ePWM1B toggle low/high with NO HRPWM control
-//
-//            2. 7.5MHz PWM (for 150 MHz SYSCLKOUT) or 5MHz PWM (for 100MHz SYSCLKOUT),
-//                  ePWM2A toggle low/high with MEP control on rising edge
-//               7.5MHz PWM (for 150 MHz SYSCLKOUT) or 5MHz PWM (for 100MHz SYSCLKOUT),
-//                  ePWM2B toggle low/high with NO HRPWM control
-//
-//            3. 15MHz PWM (for 150 MHz SYSCLKOUT) or 10MHz PWM (for 100MHz SYSCLKOUT),
-//                 ePWM3A toggle as high/low with MEP control on falling edge
-//               15MHz PWM (for 150 MHz SYSCLKOUT) or 10MHz PWM (for 100MHz SYSCLKOUT),
-//                 ePWM3B toggle low/high with NO HRPWM control
-//
-//            4. 7.5MHz PWM (for 150 MHz SYSCLKOUT) or 5MHz PWM (for 100MHz SYSCLKOUT),
-//                  ePWM4A toggle as high/low with MEP control on falling edge
-//               7.5MHz PWM (for 150 MHz SYSCLKOUT) or 5MHz PWM (for 100MHz SYSCLKOUT),
-//                  ePWM4B toggle low/high with NO HRPWM control
-//
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File
-#include "DSP2833x_EPwm_defines.h" 	// useful defines for initialization
-
-
-// Declare your function prototypes here
-//---------------------------------------------------------------
-
-void HRPWM1_Config(int);
-void HRPWM2_Config(int);
-void HRPWM3_Config(int);
-void HRPWM4_Config(int);
-
-// General System nets - Useful for debug
-Uint16 i,j,	DutyFine, n,update;
-
-Uint32 temp;
-
-void main(void)
-{
-
-// Step 1. Initialize System Control:
-// PLL, WatchDog, enable Peripheral Clocks
-// This example function is found in the DSP2833x_SysCtrl.c file.
-   InitSysCtrl();
-
-// Step 2. Initalize GPIO:
-// This example function is found in the DSP2833x_Gpio.c file and
-// illustrates how to set the GPIO to it's default state.
-// InitGpio();  // Skipped for this example
-// For this case, just init GPIO for ePWM1-ePWM4
-
-// For this case just init GPIO pins for ePWM1, ePWM2, ePWM3, ePWM4
-// These functions are in the DSP2833x_EPwm.c file
-   InitEPwm1Gpio();
-   InitEPwm2Gpio();
-   InitEPwm3Gpio();
-   InitEPwm4Gpio();
-
-// Step 3. Clear all interrupts and initialize PIE vector table:
-// Disable CPU interrupts
-   DINT;
-
-// Initialize the PIE control registers to their default state.
-// The default state is all PIE interrupts disabled and flags
-// are cleared.
-// This function is found in the DSP2833x_PieCtrl.c file.
-   InitPieCtrl();
-
-// Disable CPU interrupts and clear all CPU interrupt flags:
-   IER = 0x0000;
-   IFR = 0x0000;
-
-// Initialize the PIE vector table with pointers to the shell Interrupt
-// Service Routines (ISR).
-// This will populate the entire table, even if the interrupt
-// is not used in this example.  This is useful for debug purposes.
-// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
-// This function is found in DSP2833x_PieVect.c.
-   InitPieVectTable();
-
-// Step 4. Initialize all the Device Peripherals:
-// This function is found in DSP2833x_InitPeripherals.c
-// InitPeripherals();  // Not required for this example
-
-// For this example, only initialize the ePWM
-// Step 5. User specific code, enable interrupts:
-
-   update =1;
-   DutyFine =0;
-
-   EALLOW;
-   SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0;
-   EDIS;
-
-//  Some useful Period vs Frequency values
-//  SYSCLKOUT =     150MHz         100 MHz
-//  -----------------------------------------
-//	Period	        Frequency      Frequency
-//	1000			150 kHz		   100 KHz
-//	800				187 kHz		   125 KHz
-//	600				250 kHz		   167 KHz
-//	500				300 kHz		   200 KHz
-//	250				600 kHz		   400 KHz
-//	200				750 kHz		   500 KHz
-//	100				1.5 MHz		   1.0 MHz
-//	50				3.0 MHz		   2.0 MHz
-//	25				6.0 MHz		   4.0 MHz
-//	20				7.5 MHz		   5.0 MHz
-//	12				12.5 MHz	   8.33 MHz
-//	10				15.0 MHz	   10.0 MHz
-//	9				16.7 MHz	   11.1 MHz
-//	8				18.8 MHz	   12.5 MHz
-//	7				21.4 MHz	   14.3 MHz
-//	6				25.0 MHz	   16.7 MHz
-//	5				30.0 MHz	   20.0 MHz
-
-//====================================================================
-// ePWM and HRPWM register initializaition
-//====================================================================
-   HRPWM1_Config(10);	    // ePWM1 target, 15 MHz PWM (SYSCLK=150MHz) or 10 MHz PWM (SYSCLK=100MHz)
-   HRPWM2_Config(20);	    // ePWM2 target, 7.5 MHz PWM (SYSCLK=150MHz) or 5 MHz PWM (SYSCLK=100MHz)
-   HRPWM3_Config(10);	    // ePWM3 target, 15 MHz PWM (SYSCLK=150MHz) or 10 MHz PWM (SYSCLK=100MHz)
-   HRPWM4_Config(20);	    // ePWM4 target, 7.5 MHz PWM (SYSCLK=150MHz) or 5 MHz PWM (SYSCLK=100MHz)
-
-   EALLOW;
-   SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1;
-   EDIS;
-
-   while (update ==1)
-
-	{
-
-        for(DutyFine =1; DutyFine <256 ;DutyFine ++)
-        {
-
-        // Example, write to the HRPWM extension of CMPA
-        EPwm1Regs.CMPA.half.CMPAHR = DutyFine << 8;     // Left shift by 8 to write into MSB bits
-        EPwm2Regs.CMPA.half.CMPAHR = DutyFine << 8;     // Left shift by 8 to write into MSB bits
-
-        // Example, 32-bit write to CMPA:CMPAHR
-        EPwm3Regs.CMPA.all = ((Uint32)EPwm3Regs.CMPA.half.CMPA << 16) + (DutyFine << 8);
-        EPwm4Regs.CMPA.all = ((Uint32)EPwm4Regs.CMPA.half.CMPA << 16) + (DutyFine << 8);
-
-		for (i=0;i<10000;i++){}                         // Dummy delay between MEP changes
-		}
-	}
-
-}
-
-
-void HRPWM1_Config(period)
-{
-// ePWM1 register configuration with HRPWM
-// ePWM1A toggle low/high with MEP control on Rising edge
-
-	EPwm1Regs.TBCTL.bit.PRDLD = TB_IMMEDIATE;	        // set Immediate load
-	EPwm1Regs.TBPRD = period-1;		                    // PWM frequency = 1 / period
-	EPwm1Regs.CMPA.half.CMPA = period / 2;	            // set duty 50% initially
-    EPwm1Regs.CMPA.half.CMPAHR = (1 << 8);              // initialize HRPWM extension
-	EPwm1Regs.CMPB = period / 2;	                    // set duty 50% initially
-	EPwm1Regs.TBPHS.all = 0;
-	EPwm1Regs.TBCTR = 0;
-
-	EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP;
-	EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE;		       // EPWM1 is the Master
-	EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_DISABLE;
-	EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1;
-	EPwm1Regs.TBCTL.bit.CLKDIV = TB_DIV1;
-
-	EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
-	EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
-	EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
-	EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
-
-	EPwm1Regs.AQCTLA.bit.ZRO = AQ_CLEAR;               // PWM toggle low/high
-	EPwm1Regs.AQCTLA.bit.CAU = AQ_SET;
-	EPwm1Regs.AQCTLB.bit.ZRO = AQ_CLEAR;
-	EPwm1Regs.AQCTLB.bit.CBU = AQ_SET;
-
-	EALLOW;
-	EPwm1Regs.HRCNFG.all = 0x0;
-	EPwm1Regs.HRCNFG.bit.EDGMODE = HR_REP;				//MEP control on Rising edge
-	EPwm1Regs.HRCNFG.bit.CTLMODE = HR_CMP;
-	EPwm1Regs.HRCNFG.bit.HRLOAD  = HR_CTR_ZERO;
-	EDIS;
-}
-
-void HRPWM2_Config(period)
-{
-// ePWM2 register configuration with HRPWM
-// ePWM2A toggle low/high with MEP control on Rising edge
-
-	EPwm2Regs.TBCTL.bit.PRDLD = TB_IMMEDIATE;	        // set Immediate load
-	EPwm2Regs.TBPRD = period-1;		                    // PWM frequency = 1 / period
-	EPwm2Regs.CMPA.half.CMPA = period / 2;	            // set duty 50% initially
-    EPwm2Regs.CMPA.half.CMPAHR = (1 << 8);              // initialize HRPWM extension
-	EPwm2Regs.CMPB = period / 2;	                    // set duty 50% initially
-	EPwm2Regs.TBPHS.all = 0;
-	EPwm2Regs.TBCTR = 0;
-
-	EPwm2Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP;
-	EPwm2Regs.TBCTL.bit.PHSEN = TB_DISABLE;		         // ePWM2 is the Master
-	EPwm2Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_DISABLE;
-	EPwm2Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1;
-	EPwm2Regs.TBCTL.bit.CLKDIV = TB_DIV1;
-
-	EPwm2Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
-	EPwm2Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
-	EPwm2Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
-	EPwm2Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
-
-	EPwm2Regs.AQCTLA.bit.ZRO = AQ_CLEAR;                  // PWM toggle low/high
-	EPwm2Regs.AQCTLA.bit.CAU = AQ_SET;
-	EPwm2Regs.AQCTLB.bit.ZRO = AQ_CLEAR;
-	EPwm2Regs.AQCTLB.bit.CBU = AQ_SET;
-
-	EALLOW;
-	EPwm2Regs.HRCNFG.all = 0x0;
-	EPwm2Regs.HRCNFG.bit.EDGMODE = HR_REP;                //MEP control on Rising edge
-	EPwm2Regs.HRCNFG.bit.CTLMODE = HR_CMP;
-	EPwm2Regs.HRCNFG.bit.HRLOAD  = HR_CTR_ZERO;
-
-	EDIS;
-
-}
-void HRPWM3_Config(period)
-{
-// ePWM3 register configuration with HRPWM
-// ePWM3A toggle high/low with MEP control on falling edge
-
-	EPwm3Regs.TBCTL.bit.PRDLD = TB_IMMEDIATE;	        // set Immediate load
-	EPwm3Regs.TBPRD = period-1;		                    // PWM frequency = 1 / period
-	EPwm3Regs.CMPA.half.CMPA = period / 2;	            // set duty 50% initially
-	EPwm3Regs.CMPA.half.CMPAHR = (1 << 8);              // initialize HRPWM extension
-	EPwm3Regs.CMPB = period / 2;	                    // set duty 50% initially
-	EPwm3Regs.TBPHS.all = 0;
-	EPwm3Regs.TBCTR = 0;
-
-	EPwm3Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP;
-	EPwm3Regs.TBCTL.bit.PHSEN = TB_DISABLE;		        // ePWM3 is the Master
-	EPwm3Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_DISABLE;
-	EPwm3Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1;
-	EPwm3Regs.TBCTL.bit.CLKDIV = TB_DIV1;
-
-	EPwm3Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
-	EPwm3Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
-	EPwm3Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
-	EPwm3Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
-
-	EPwm3Regs.AQCTLA.bit.ZRO = AQ_SET;                  // PWM toggle high/low
-	EPwm3Regs.AQCTLA.bit.CAU = AQ_CLEAR;
-	EPwm3Regs.AQCTLB.bit.ZRO = AQ_SET;
-	EPwm3Regs.AQCTLB.bit.CBU = AQ_CLEAR;
-
-	EALLOW;
-	EPwm3Regs.HRCNFG.all = 0x0;
-	EPwm3Regs.HRCNFG.bit.EDGMODE = HR_FEP;               //MEP control on falling edge
-	EPwm3Regs.HRCNFG.bit.CTLMODE = HR_CMP;
-	EPwm3Regs.HRCNFG.bit.HRLOAD  = HR_CTR_ZERO;
-	EDIS;
-}
-
-void HRPWM4_Config(period)
-{
-// ePWM4 register configuration with HRPWM
-// ePWM4A toggle high/low with MEP control on falling edge
-
-	EPwm4Regs.TBCTL.bit.PRDLD = TB_IMMEDIATE;	        // set Immediate load
-	EPwm4Regs.TBPRD = period-1;		                    // PWM frequency = 1 / period
-	EPwm4Regs.CMPA.half.CMPA = period / 2;              // set duty 50% initially
-	EPwm4Regs.CMPA.half.CMPAHR = (1 << 8);              // initialize HRPWM extension
-	EPwm4Regs.CMPB = period / 2;	                    // set duty 50% initially
-	EPwm4Regs.TBPHS.all = 0;
-	EPwm4Regs.TBCTR = 0;
-
-	EPwm4Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP;
-	EPwm4Regs.TBCTL.bit.PHSEN = TB_DISABLE;		        // ePWM4 is the Master
-	EPwm4Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_DISABLE;
-	EPwm4Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1;
-	EPwm4Regs.TBCTL.bit.CLKDIV = TB_DIV1;
-
-	EPwm4Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
-	EPwm4Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
-	EPwm4Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
-	EPwm4Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
-
-	EPwm4Regs.AQCTLA.bit.ZRO = AQ_SET;                  // PWM toggle high/low
-	EPwm4Regs.AQCTLA.bit.CAU = AQ_CLEAR;
-	EPwm4Regs.AQCTLB.bit.ZRO = AQ_SET;
-	EPwm4Regs.AQCTLB.bit.CBU = AQ_CLEAR;
-
-	EALLOW;
-	EPwm4Regs.HRCNFG.all = 0x0;
-	EPwm4Regs.HRCNFG.bit.EDGMODE = HR_FEP;              // MEP control on falling edge
-	EPwm4Regs.HRCNFG.bit.CTLMODE = HR_CMP;
-	EPwm4Regs.HRCNFG.bit.HRLOAD  = HR_CTR_ZERO;
-	EDIS;
-}
-
-
-
-
-
-
-
-
-
-
-
diff --git a/Source/External/v120/DSP2833x_examples/hrpwm/Example_2833xHRPWM.gel b/Source/External/v120/DSP2833x_examples/hrpwm/Example_2833xHRPWM.gel
deleted file mode 100644
index 5ccf383..0000000
--- a/Source/External/v120/DSP2833x_examples/hrpwm/Example_2833xHRPWM.gel
+++ /dev/null
@@ -1,42 +0,0 @@
-/*
-// TI File $Revision: /main/5 $
-// Checkin $Date: August 9, 2007   17:17:09 $
-//###########################################################################
-//
-// This .gel file can be used to help load and build the example project.
-// It should be unloaded from Code Composer Studio before loading another 
-// project. 
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-*/
-
-menuitem "DSP2833x HRPWM"
-
-hotmenu Load_and_Build_Project()
-{
-   GEL_ProjectLoad("Example_2833xHRPWM.pjt");
-   GEL_ProjectBuild("Example_2833xHRPWM.pjt");
-   Setup_WatchWindow();
-}
-
-hotmenu Load_Code()
-{
-   GEL_Load(".\\debug\\Example_2833xHRPWM.out");
-   Setup_WatchWindow();
-}
-
-
-hotmenu Setup_WatchWindow()
-{
-   GEL_WatchReset();
-   GEL_WatchAdd("DutyFine,x");
-   GEL_WatchAdd("update,x");
-   GEL_WatchAdd("EPwm1Regs,x");
-   GEL_WatchAdd("EPwm2Regs,x");
-   GEL_WatchAdd("EPwm3Regs,x");
-   GEL_WatchAdd("EPwm4Regs,x");
-
-}
diff --git a/Source/External/v120/DSP2833x_examples/hrpwm/Example_2833xHRPWM.pjt b/Source/External/v120/DSP2833x_examples/hrpwm/Example_2833xHRPWM.pjt
deleted file mode 100644
index b92acda..0000000
--- a/Source/External/v120/DSP2833x_examples/hrpwm/Example_2833xHRPWM.pjt
+++ /dev/null
@@ -1,51 +0,0 @@
-; Code Composer Project File, Version 2.0 (do not modify or remove this line)
-
-[Project Settings]
-ProjectName="DSP2833x"
-ProjectDir="C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\hrpwm\"
-ProjectType=Executable
-CPUFamily=TMS320C28XX
-Tool="Compiler"
-Tool="DspBiosBuilder"
-Tool="Linker"
-Config="Debug"
-Config="Release"
-
-[Source Files]
-Source="..\..\DSP2833x_common\source\DSP2833x_ADC_cal.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CodeStartBranch.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_DefaultIsr.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_EPwm.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieVect.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_SysCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_usDelay.asm"
-Source="..\..\DSP2833x_headers\source\DSP2833x_GlobalVariableDefs.c"
-Source="Example_2833xHRPWM.c"
-Source="..\..\DSP2833x_common\cmd\28335_RAM_lnk.cmd"
-Source="..\..\DSP2833x_headers\cmd\DSP2833x_Headers_nonBIOS.cmd"
-
-["Compiler" Settings: "Debug"]
-Options=-g -k -q -al -as -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\hrpwm\Debug" -fs"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\hrpwm\Debug" -i"..\..\DSP2833x_headers\include" -i"..\..\DSP2833x_common\include" -d"_DEBUG" -d"LARGE_MODEL" --float_support=fpu32 -ml -mt -v28
-
-["Compiler" Settings: "Release"]
-Options=-q -o3 -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\hrpwm\Release" -d"LARGE_MODEL" -ml -v28
-
-["DspBiosBuilder" Settings: "Debug"]
-Options=-v28
-
-["DspBiosBuilder" Settings: "Release"]
-Options=-v28
-
-["Linker" Settings: "Debug"]
-Options=-q -cr -ecode_start -m".\Debug\Example_2833xHRPWM.map" -o".\Debug\Example_2833xHRPWM.out" -stack0x380 -w -x -i"..\..\DSP2833x_headers\include" -l"rts2800_fpu32.lib"
-
-["Linker" Settings: "Release"]
-Options=-q -c -o".\Release\Example_2833xHRPWM.out" -x
-
-["..\..\DSP2833x_headers\source\DSP2833x_GlobalVariableDefs.c" Settings: "Debug"]
-LinkOrder=1
-
-["..\..\DSP2833x_headers\cmd\DSP2833x_Headers_nonBIOS.cmd" Settings: "Debug"]
-LinkOrder=2
-
diff --git a/Source/External/v120/DSP2833x_examples/hrpwm_sfo/Example_2833xHRPWM_SFO.c b/Source/External/v120/DSP2833x_examples/hrpwm_sfo/Example_2833xHRPWM_SFO.c
deleted file mode 100644
index 9e092f6..0000000
--- a/Source/External/v120/DSP2833x_examples/hrpwm_sfo/Example_2833xHRPWM_SFO.c
+++ /dev/null
@@ -1,546 +0,0 @@
-// TI File $Revision: /main/15 $
-// Checkin $Date: May 5, 2008   15:25:56 $
-//###########################################################################
-//
-// FILE:	Example_2833xHRPWM_SFO.c
-//
-// TITLE:	DSP2833x Device HRPWM example
-//
-// ASSUMPTIONS:
-//
-//
-//    This program requires the DSP2833x header files, which include the
-//    SFO_TI_Build_fpu.lib (or SFO_TI_Build.lib for fixed-point) and SFO.h
-//    files required by this example.
-//
-//    !!NOTE!!
-//    By default, this example project is configured for floating-point math. All
-//    included libraries must be pre-compiled for floating-point math.
-//
-//    Therefore, SFO_TI_Build_fpu.lib (compiled for floating-point) is included in the
-//    project instead of the SFO_TI_Build.lib (compiled for fixed-point).
-//
-//    To convert the example for fixed-point math, follow the instructions in sfo_readme.txt
-//    in the /doc directory of the header files and peripheral examples package.
-//
-//
-//    Monitor ePWM1-ePWM4 pins on an oscilloscope as described
-//    below.
-//
-//       EPWM1A is on GPIO0
-//       EPWM2A is on GPIO2
-//       EPWM3A is on GPIO4
-//		 EPWM4A is on GPIO6
-//
-//    As supplied, this project is configured for "boot to SARAM"
-//    operation.  The 2833x Boot Mode table is shown below.
-//    For information on configuring the boot mode of an eZdsp,
-//    please refer to the documentation included with the eZdsp,
-//
-//       $Boot_Table:
-//
-//         GPIO87   GPIO86     GPIO85   GPIO84
-//          XA15     XA14       XA13     XA12
-//           PU       PU         PU       PU
-//        ==========================================
-//            1        1          1        1    Jump to Flash
-//            1        1          1        0    SCI-A boot
-//            1        1          0        1    SPI-A boot
-//            1        1          0        0    I2C-A boot
-//            1        0          1        1    eCAN-A boot
-//            1        0          1        0    McBSP-A boot
-//            1        0          0        1    Jump to XINTF x16
-//            1        0          0        0    Jump to XINTF x32
-//            0        1          1        1    Jump to OTP
-//            0        1          1        0    Parallel GPIO I/O boot
-//            0        1          0        1    Parallel XINTF boot
-//            0        1          0        0    Jump to SARAM	    <- "boot to SARAM"
-//            0        0          1        1    Branch to check boot mode
-//            0        0          1        0    Boot to flash, bypass ADC cal
-//            0        0          0        1    Boot to SARAM, bypass ADC cal
-//            0        0          0        0    Boot to SCI-A, bypass ADC cal
-//                                              Boot_Table_End$
-//
-// DESCRIPTION:
-//
-//       This example modifies the MEP control registers to show edge displacement
-//       due to the HRPWM control extension of the respective ePWM module.
-//
-//       This example calls the following TI's MEP Scale Factor Optimizer (SFO)
-//       software library functions:
-//
-//       void SFO_MepEn(int i);
-//            initialize MEP_Scalefactor[i] dynamically when HRPWM is in use.
-//
-//       void SFO_MepDis(int i);
-//            initialize MEP_Scalefactor[i] when HRPWM is not used
-//
-//       Where MEP_ScaleFactor[5] is a global array variable used by the SFO library
-//
-//       This example is intended to explain the HRPWM capabilities. The code can be
-//       optimized for code efficiency. Refer to TI's Digital power application
-//       examples and TI Digital Power Supply software libraries for details.
-//
-//       All ePWM1A,2A,3A,4A channels (GPIO0, GPIO2, GPIO4, GPIO6) will have fine
-//       edge movement due to the HRPWM logic
-//
-//            1. 5MHz PWM (SYSCLK=150MHz) or 3.33MHz PWM (SYSCLK=100MHz), ePWM1A toggle low/high with MEP control on falling edge
-//
-//            2. 5MHz PWM (SYSCLK=150MHz) or 3.33MHz PWM (SYSCLK=100MHz) ePWM2A toggle low/high with MEP control on falling edge
-//
-//            3. 5MHz PWM (SYSCLK=150MHz) or 3.33MHz PWM (SYSCLK=100MHz) ePWM3A toggle high/low with MEP control on falling edge
-//
-//            4. 5MHz PWM (SYSCLK=150MHz) or 3.33MHz PWM (SYSCLK=100MHz) ePWM4A toggle high/low with MEP control on falling edge
-//
-//	To load and run this example:
-//            1. Run this example at 150MHz SYSCLKOUT (or 100 MHz SYSCLKOUT for 100 MHz devices)
-//            2. Load the Example_2833xHRPWM_SFO.gel and observe variables in the watch window
-//            3. Activate Real time mode
-//            4. Run the code
-//            5. Watch ePWM1A-4A waveforms on a Oscillosope
-//            6. In the watch window:
-//               Set the variable UpdateFine = 1  to observe the ePWMxA output
-//               with HRPWM capabilites (default)
-//               Observe the duty cycle of the waveform changes in fine MEP steps
-//            7. In the watch window:
-//               Change the variable UpdateFine to 0, to observe the
-//               ePWMxA output without HRPWM capabilites
-//               Observe the duty cycle of the waveform changes in coarse steps of 10nsec.
-//
-//
-//  Watch Variables:
-//               UpdateFine
-//               MEP_ScaleFactor
-//               EPwm1Regs.CMPA.all
-//               EPwm2Regs.CMPA.all
-//               EPwm3Regs.CMPA.all
-//               EPwm4Regs.CMPA.all
-//
-//
-// IMPORTANT NOTE!!!!!
-//
-// THE SFO.H FUNCTIONS INCLUDED WITH THIS EXAMPLE ONLY SUPPORTS EPWM1-EPWM4. FOR
-// SUPPORT FOR MORE THAN 4 EPWMS, USE SFO_V5.H WITH THE SFO_TI_BUILD_V5.LIB LIBRARY.
-// SEE THE HRPWM REFERENCE GUIDE (SPRU924) FOR USAGE INFORMATION AND DIFFERENCES
-// BETWEEN VERSIONS.
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-
-#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File
-#include "DSP2833x_EPwm_defines.h" 	// useful defines for initialization
-#include "SFO.h"					// SFO library headerfile
-
-// Declare your function prototypes here
-//---------------------------------------------------------------
-void HRPWM1_Config(int);
-void HRPWM2_Config(int);
-void HRPWM3_Config(int);
-void HRPWM4_Config(int);
-
-
-// General System nets - Useful for debug
-Uint16 j,duty, DutyFine, n, UpdateFine;
-volatile int i;
-Uint32 temp;
-
-// Global array used by the SFO library
-int16 MEP_ScaleFactor[5];
-
-
-volatile struct EPWM_REGS *ePWM[] =
- 			 { &EPwm1Regs,	&EPwm1Regs,	&EPwm2Regs,	&EPwm3Regs,	&EPwm4Regs,	&EPwm5Regs,	&EPwm6Regs};
-
-
-void main(void)
-{
-
-// Step 1. Initialize System Control:
-// PLL, WatchDog, enable Peripheral Clocks
-// This example function is found in the DSP2833x_SysCtrl.c file.
-   InitSysCtrl();
-
-// Step 2. Initalize GPIO:
-// This example function is found in the DSP2833x_Gpio.c file and
-// illustrates how to set the GPIO to it's default state.
-// InitGpio();  // Skipped for this example
-// For this case, just init GPIO for ePWM1-ePWM4
-
-// For this case just init GPIO pins for ePWM1, ePWM2, ePWM3, ePWM4
-// These functions are in the DSP2833x_EPwm.c file
-   InitEPwm1Gpio();
-   InitEPwm2Gpio();
-   InitEPwm3Gpio();
-   InitEPwm4Gpio();
-
-// Step 3. Clear all interrupts and initialize PIE vector table:
-// Disable CPU interrupts
-   DINT;
-
-// Initialize the PIE control registers to their default state.
-// The default state is all PIE interrupts disabled and flags
-// are cleared.
-// This function is found in the DSP2833x_PieCtrl.c file.
-   InitPieCtrl();
-
-// Disable CPU interrupts and clear all CPU interrupt flags:
-   IER = 0x0000;
-   IFR = 0x0000;
-
-// Initialize the PIE vector table with pointers to the shell Interrupt
-// Service Routines (ISR).
-// This will populate the entire table, even if the interrupt
-// is not used in this example.  This is useful for debug purposes.
-// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
-// This function is found in DSP2833x_PieVect.c.
-   InitPieVectTable();
-
-// Step 4. Initialize all the Device Peripherals:
-// This function is found in DSP2833x_InitPeripherals.c
-// InitPeripherals();  // Not required for this example
-
-// For this example, only initialize the ePWM
-// Step 5. User specific code, enable interrupts:
-
-   UpdateFine = 1;
-   DutyFine   = 0;
-
-   EALLOW;
-   SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0;
-   EDIS;
-
-//  MEP_ScaleFactor variables iitialization for SFO library functions
-    MEP_ScaleFactor[0] = 0;											//Common Variables for SFO functions
-	MEP_ScaleFactor[1] = 0;											//SFO for HRPWM1
-	MEP_ScaleFactor[2] = 0;											//SFO for HRPWM2
-	MEP_ScaleFactor[3] = 0;											//SFO for HRPWM3
-	MEP_ScaleFactor[4] = 0;											//SFO for HRPWM4
-
-// 	MEP_ScaleFactor variables initialized using function SFO_MepDis
-	while ( MEP_ScaleFactor[1] == 0 ) SFO_MepDis(1);				//SFO for HRPWM1
-	while ( MEP_ScaleFactor[2] == 0 ) SFO_MepDis(2);				//SFO for HRPWM2
-	while ( MEP_ScaleFactor[3] == 0 ) SFO_MepDis(3);				//SFO for HRPWM3
-	while ( MEP_ScaleFactor[4] == 0 ) SFO_MepDis(4);				//SFO for HRPWM4
-
-// 	Initialize a common seed variable MEP_ScaleFactor[0] required for all SFO functions
-	MEP_ScaleFactor[0] = MEP_ScaleFactor[1];                        //Common Variable for SFO library functions
-
-///  Some useful Period vs Frequency values
-//  SYSCLKOUT =     150MHz         100 MHz
-//  -----------------------------------------
-//	Period	        Frequency      Frequency
-//	1000			150 kHz		   100 KHz
-//	800				187 kHz		   125 KHz
-//	600				250 kHz		   167 KHz
-//	500				300 kHz		   200 KHz
-//	250				600 kHz		   400 KHz
-//	200				750 kHz		   500 KHz
-//	100				1.5 MHz		   1.0 MHz
-//	50				3.0 MHz		   2.0 MHz
-//  30              5.0 MHz        3.33 MHz
-//	25				6.0 MHz		   4.0 MHz
-//	20				7.5 MHz		   5.0 MHz
-//	12				12.5 MHz	   8.33 MHz
-//	10				15.0 MHz	   10.0 MHz
-//	9				16.7 MHz	   11.1 MHz
-//	8				18.8 MHz	   12.5 MHz
-//	7				21.4 MHz	   14.3 MHz
-//	6				25.0 MHz	   16.7 MHz
-//	5				30.0 MHz	   20.0 MHz
-
-//====================================================================
-// ePWM and HRPWM register initializaition
-//====================================================================
-   HRPWM1_Config(30);	    // ePWM1 target, 5 MHz PWM (SYSCLK=150MHz) or 3.33 MHz PWM (SYSCLK=100MHz)
-   HRPWM2_Config(30);	    // ePWM2 target, 5 MHz PWM (SYSCLK=150MHz) or 3.33 MHz PWM (SYSCLK=100MHz)
-   HRPWM3_Config(30);	    // ePWM3 target, 5 MHz PWM (SYSCLK=150MHz) or 3.33 MHz PWM (SYSCLK=100MHz)
-   HRPWM4_Config(30);	    // ePWM4 target, 5 MHz PWM (SYSCLK=150MHz) or 3.33 MHz PWM (SYSCLK=100MHz)
-
-   EALLOW;
-   SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1;
-
-   EDIS;
-
-   for(;;)
-   {
-     	// Sweep DutyFine as a Q15 number from 0.2 - 0.999
-		for(DutyFine = 0x2300; DutyFine < 0x7000; DutyFine++)
-		{
-		// Variables
-			int16 CMPA_reg_val, CMPAHR_reg_val;
-			int32 temp;
-
-			if(UpdateFine)
-			{
-			/*
-			// CMPA_reg_val is calculated as a Q0.
-			// Since DutyFine is a Q15 number, and the period is Q0
-			// the product is Q15. So to store as a Q0, we shift right
-			// 15 bits.
-
-			CMPA_reg_val = ((long)DutyFine * EPwm1Regs.TBPRD)>>15;
-
-			// This next step is to obtain the remainder which was
-			// truncated during our 15 bit shift above.
-			// compute the whole value, and then subtract CMPA_reg_val
-			// shifted LEFT 15 bits:
-			temp = ((long)DutyFine * EPwm1Regs.TBPRD) ;
-			temp = temp - ((long)CMPA_reg_val<<15);
-
-			// This obtains the MEP count in digits, from
-			// 0,1, .... MEP_Scalefactor. Once again since this is Q15
-			// convert to Q0 by shifting:
-			CMPAHR_reg_val = (temp*MEP_ScaleFactor[1])>>15;
-
-			// Now the lower 8 bits contain the MEP count.
-			// Since the MEP count needs to be in the upper 8 bits of
-			// the 16 bit CMPAHR register, shift left by 8.
-			CMPAHR_reg_val = CMPAHR_reg_val << 8;
-
-			// Add the offset and rounding
-			CMPAHR_reg_val += 0x0180;
-
-			// Write the values to the registers as one 32-bit or two 16-bits
-			EPwm1Regs.CMPA.half.CMPA = CMPA_reg_val;
-			EPwm1Regs.CMPA.half.CMPAHR = CMPAHR_reg_val;
-			*/
-
-			// All the above operations may be condensed into
-			// the following form:
-			// EPWM1 calculations
-
-            CMPA_reg_val = ((long)DutyFine * EPwm1Regs.TBPRD)>>15;
-            temp = ((long)DutyFine * EPwm1Regs.TBPRD) ;
-			temp = temp - ((long)CMPA_reg_val<<15);
-			CMPAHR_reg_val = (temp*MEP_ScaleFactor[1])>>15;
-			CMPAHR_reg_val = CMPAHR_reg_val << 8;
-			CMPAHR_reg_val += 0x0180;
-
-			// Example for a 32 bit write to CMPA:CMPAHR
-			EPwm1Regs.CMPA.all = ((long)CMPA_reg_val)<<16 | CMPAHR_reg_val;
-
-
- 			// EPWM2 calculations
-            CMPA_reg_val = ((long)DutyFine * EPwm2Regs.TBPRD)>>15;
-            temp = ((long)DutyFine * EPwm2Regs.TBPRD) ;
-			temp = temp - ((long)CMPA_reg_val<<15);
-			CMPAHR_reg_val = (temp*MEP_ScaleFactor[2])>>15;
-			CMPAHR_reg_val = CMPAHR_reg_val << 8;
-			CMPAHR_reg_val += 0x0180;
-			// Example as a 16 bit write to CMPA and then a 16-bit write to CMPAHR
-			EPwm2Regs.CMPA.half.CMPA = CMPA_reg_val;
-			EPwm2Regs.CMPA.half.CMPAHR = CMPAHR_reg_val;
-
- 			// EPWM3 calculations
-            CMPA_reg_val = ((long)DutyFine * EPwm3Regs.TBPRD)>>15;
-            temp = ((long)DutyFine * EPwm3Regs.TBPRD) ;
-			temp = temp - ((long)CMPA_reg_val<<15);
-			CMPAHR_reg_val = (temp*MEP_ScaleFactor[3])>>15;
-			CMPAHR_reg_val = CMPAHR_reg_val << 8;
-			CMPAHR_reg_val += 0x0180;
-			EPwm3Regs.CMPA.half.CMPA = CMPA_reg_val;
-			EPwm3Regs.CMPA.half.CMPAHR = CMPAHR_reg_val;
-
-     		// EPWM4 calculations
-            CMPA_reg_val = ((long)DutyFine * EPwm4Regs.TBPRD)>>15;
-            temp = ((long)DutyFine * EPwm4Regs.TBPRD) ;
-			temp = temp - ((long)CMPA_reg_val<<15);
-			CMPAHR_reg_val = (temp*MEP_ScaleFactor[4])>>15;
-			CMPAHR_reg_val = CMPAHR_reg_val << 8;
-			CMPAHR_reg_val += 0x0180;
-			EPwm4Regs.CMPA.half.CMPA = CMPA_reg_val;
-			EPwm4Regs.CMPA.half.CMPAHR = CMPAHR_reg_val;
-
-			}
-			else
-			{
-			// CMPA_reg_val is calculated as a Q0.
-			// Since DutyFine is a Q15 number, and the period is Q0
-			// the product is Q15. So to store as a Q0, we shift right
-			// 15 bits.
-
-			 EPwm1Regs.CMPA.half.CMPA = ((long)DutyFine * EPwm1Regs.TBPRD>>15);
-			 EPwm2Regs.CMPA.half.CMPA = ((long)DutyFine * EPwm2Regs.TBPRD)>>15;
-			 EPwm3Regs.CMPA.half.CMPA = ((long)DutyFine * EPwm3Regs.TBPRD)>>15;
-			 EPwm4Regs.CMPA.half.CMPA = ((long)DutyFine * EPwm4Regs.TBPRD)>>15;
-
-			}
-
-
-		for (i=0;i<300;i++)
-          {
-	   // Call the scale factor optimizer lib
-		SFO_MepEn(1);
-		SFO_MepEn(2);
-		SFO_MepEn(3);
-		SFO_MepEn(4);
-
-		  }
-
-
-		}
-
-    }
-
-}
-
-
-void HRPWM1_Config(period)
-{
-// ePWM1 register configuration with HRPWM
-// ePWM1A toggle low/high with MEP control on Rising edge
-
-	EPwm1Regs.TBCTL.bit.PRDLD = TB_IMMEDIATE;	        // set Immediate load
-	EPwm1Regs.TBPRD = period-1;		                    // PWM frequency = 1 / period
-	EPwm1Regs.CMPA.half.CMPA = period / 2;              // set duty 50% initially
-    EPwm1Regs.CMPA.half.CMPAHR = (1 << 8);              // initialize HRPWM extension
-	EPwm1Regs.CMPB = period / 2;	                    // set duty 50% initially
-	EPwm1Regs.TBPHS.all = 0;
-	EPwm1Regs.TBCTR = 0;
-
-	EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP;
-	EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE;		       // EPWM1 is the Master
-	EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_DISABLE;
-	EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1;
-	EPwm1Regs.TBCTL.bit.CLKDIV = TB_DIV1;
-	EPwm1Regs.TBCTL.bit.FREE_SOFT = 11;
-
-	EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
-	EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
-	EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
-	EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
-
-
-	EPwm1Regs.AQCTLA.bit.ZRO = AQ_SET;               // PWM toggle high/low
-	EPwm1Regs.AQCTLA.bit.CAU = AQ_CLEAR;
-	EPwm1Regs.AQCTLB.bit.ZRO = AQ_SET;
-	EPwm1Regs.AQCTLB.bit.CBU = AQ_CLEAR;
-
-
-
-	EALLOW;
-	EPwm1Regs.HRCNFG.all = 0x0;
-	EPwm1Regs.HRCNFG.bit.EDGMODE = HR_FEP;				//MEP control on falling edge
-	EPwm1Regs.HRCNFG.bit.CTLMODE = HR_CMP;
-	EPwm1Regs.HRCNFG.bit.HRLOAD  = HR_CTR_ZERO;
-	EDIS;
-}
-
-void HRPWM2_Config(period)
-{
-// ePWM2 register configuration with HRPWM
-// ePWM2A toggle low/high with MEP control on Rising edge
-
-	EPwm2Regs.TBCTL.bit.PRDLD = TB_IMMEDIATE;	        // set Immediate load
-	EPwm2Regs.TBPRD = period-1;		                    // PWM frequency = 1 / period
-	EPwm2Regs.CMPA.half.CMPA = period / 2;              // set duty 50% initially
-    EPwm1Regs.CMPA.half.CMPAHR = (1 << 8);              // initialize HRPWM extension
-	EPwm2Regs.CMPB = period / 2;	                    // set duty 50% initially
-	EPwm2Regs.TBPHS.all = 0;
-	EPwm2Regs.TBCTR = 0;
-
-	EPwm2Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP;
-	EPwm2Regs.TBCTL.bit.PHSEN = TB_DISABLE;		         // ePWM2 is the Master
-	EPwm2Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_DISABLE;
-	EPwm2Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1;
-	EPwm2Regs.TBCTL.bit.CLKDIV = TB_DIV1;
-    EPwm2Regs.TBCTL.bit.FREE_SOFT = 11;
-
-	EPwm2Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
-	EPwm2Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
-	EPwm2Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
-	EPwm2Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
-
-	EPwm2Regs.AQCTLA.bit.ZRO = AQ_SET;                  // PWM toggle high/low
-	EPwm2Regs.AQCTLA.bit.CAU = AQ_CLEAR;
-	EPwm2Regs.AQCTLB.bit.ZRO = AQ_SET;
-	EPwm2Regs.AQCTLB.bit.CBU = AQ_CLEAR;
-
-	EALLOW;
-	EPwm2Regs.HRCNFG.all = 0x0;
-	EPwm2Regs.HRCNFG.bit.EDGMODE = HR_FEP;                //MEP control on falling edge
-	EPwm2Regs.HRCNFG.bit.CTLMODE = HR_CMP;
-	EPwm2Regs.HRCNFG.bit.HRLOAD  = HR_CTR_ZERO;
-
-	EDIS;
-
-}
-void HRPWM3_Config(period)
-{
-// ePWM3 register configuration with HRPWM
-// ePWM3A toggle high/low with MEP control on falling edge
-
-	EPwm3Regs.TBCTL.bit.PRDLD = TB_IMMEDIATE;	        // set Immediate load
-	EPwm3Regs.TBPRD = period-1;		                    // PWM frequency = 1 / period
-	EPwm3Regs.CMPA.half.CMPA = period / 2;              // set duty 50% initially
-	EPwm3Regs.CMPA.half.CMPAHR = (1 << 8);              // initialize HRPWM extension
-	EPwm3Regs.TBPHS.all = 0;
-	EPwm3Regs.TBCTR = 0;
-
-	EPwm3Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP;
-	EPwm3Regs.TBCTL.bit.PHSEN = TB_DISABLE;		        // ePWM3 is the Master
-	EPwm3Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_DISABLE;
-	EPwm3Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1;
-	EPwm3Regs.TBCTL.bit.CLKDIV = TB_DIV1;
-	EPwm3Regs.TBCTL.bit.FREE_SOFT = 11;
-
-	EPwm3Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
-	EPwm3Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
-	EPwm3Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
-	EPwm3Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
-
-	EPwm3Regs.AQCTLA.bit.ZRO = AQ_SET;                  // PWM toggle high/low
-	EPwm3Regs.AQCTLA.bit.CAU = AQ_CLEAR;
-	EPwm3Regs.AQCTLB.bit.ZRO = AQ_SET;
-	EPwm3Regs.AQCTLB.bit.CBU = AQ_CLEAR;
-
-	EALLOW;
-	EPwm3Regs.HRCNFG.all = 0x0;
-	EPwm3Regs.HRCNFG.bit.EDGMODE = HR_FEP;               //MEP control on falling edge
-	EPwm3Regs.HRCNFG.bit.CTLMODE = HR_CMP;
-	EPwm3Regs.HRCNFG.bit.HRLOAD  = HR_CTR_ZERO;
-	EDIS;
-}
-
-void HRPWM4_Config(period)
-{
-// ePWM4 register configuration with HRPWM
-// ePWM4A toggle high/low with MEP control on falling edge
-
-	EPwm4Regs.TBCTL.bit.PRDLD = TB_IMMEDIATE;	        // set Immediate load
-	EPwm4Regs.TBPRD = period-1;		                    // PWM frequency = 1 / period
-	EPwm4Regs.CMPA.half.CMPA = period / 2;              // set duty 50% initially
-	EPwm4Regs.CMPA.half.CMPAHR = (1 << 8);              // initialize HRPWM extension
-	EPwm4Regs.CMPB = period / 2;	                    // set duty 50% initially
-	EPwm4Regs.TBPHS.all = 0;
-	EPwm4Regs.TBCTR = 0;
-
-	EPwm4Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP;
-	EPwm4Regs.TBCTL.bit.PHSEN = TB_DISABLE;		        // ePWM4 is the Master
-	EPwm4Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_DISABLE;
-	EPwm4Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1;
-	EPwm4Regs.TBCTL.bit.CLKDIV = TB_DIV1;
-	EPwm4Regs.TBCTL.bit.FREE_SOFT = 11;
-
-	EPwm4Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
-	EPwm4Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
-	EPwm4Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
-	EPwm4Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
-
-	EPwm4Regs.AQCTLA.bit.ZRO = AQ_SET;                  // PWM toggle high/low
-	EPwm4Regs.AQCTLA.bit.CAU = AQ_CLEAR;
-	EPwm4Regs.AQCTLB.bit.ZRO = AQ_SET;
-	EPwm4Regs.AQCTLB.bit.CBU = AQ_CLEAR;
-
-	EALLOW;
-	EPwm4Regs.HRCNFG.all = 0x0;
-	EPwm4Regs.HRCNFG.bit.EDGMODE = HR_FEP;              //MEP control on falling edge
-	EPwm4Regs.HRCNFG.bit.CTLMODE = HR_CMP;
-	EPwm4Regs.HRCNFG.bit.HRLOAD  = HR_CTR_ZERO;
-	EDIS;
-}
-
-// No more
diff --git a/Source/External/v120/DSP2833x_examples/hrpwm_sfo/Example_2833xHRPWM_SFO.gel b/Source/External/v120/DSP2833x_examples/hrpwm_sfo/Example_2833xHRPWM_SFO.gel
deleted file mode 100644
index 520f385..0000000
--- a/Source/External/v120/DSP2833x_examples/hrpwm_sfo/Example_2833xHRPWM_SFO.gel
+++ /dev/null
@@ -1,54 +0,0 @@
-/*
-// TI File $Revision: /main/5 $
-// Checkin $Date: August 9, 2007   17:17:23 $
-//###########################################################################
-//
-// This .gel file can be used to help load and build the example project.
-// It should be unloaded from Code Composer Studio before loading another 
-// project. 
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-//###########################################################################
-// Test Description: Run this GEL on F28335 or F2801.
-// The Watch window should give a Scale factor value of 67-70 for the HRPWM 
-// modules in the device. F28335/6 will have four entries. F2801 will have three
-//###########################################################################
-*/
-
-menuitem "DSP2833x HRPWM SFO"
-
-hotmenu Load_and_Build_Project()
-{
-   GEL_ProjectLoad("Example_2833xHRPWM_SFO.pjt");
-   GEL_ProjectBuild("Example_2833xHRPWM_SFO.pjt");
-   Setup_WatchWindow();
-}
-
-hotmenu Load_Code()
-{
-   GEL_Load(".\\debug\\Example_2833xHRPWM_SFO.out");
-   Setup_WatchWindow();
-}
-
-hotmenu Setup_WatchWindow()
-{
-
-   GEL_WatchReset();
-   GEL_WatchAdd("UpdateFine");
-   GEL_WatchAdd("EPwm1Regs.CMPA.all");
-   GEL_WatchAdd("EPwm2Regs.CMPA.all");
-   GEL_WatchAdd("EPwm3Regs.CMPA.all");
-   GEL_WatchAdd("EPwm4Regs.CMPA.all");
-   GEL_WatchAdd("MEP_ScaleFactor[1]");
-   GEL_WatchAdd("MEP_ScaleFactor[2]");
-   GEL_WatchAdd("MEP_ScaleFactor[3]");
-   GEL_WatchAdd("MEP_ScaleFactor[4]");
-   GEL_WatchAdd("EPwm1Regs,x");
-   GEL_WatchAdd("EPwm2Regs,x");
-   GEL_WatchAdd("EPwm3Regs,x");
-   GEL_WatchAdd("EPwm4Regs,x");
-}
diff --git a/Source/External/v120/DSP2833x_examples/hrpwm_sfo/Example_2833xHRPWM_SFO.pjt b/Source/External/v120/DSP2833x_examples/hrpwm_sfo/Example_2833xHRPWM_SFO.pjt
deleted file mode 100644
index ba907e6..0000000
--- a/Source/External/v120/DSP2833x_examples/hrpwm_sfo/Example_2833xHRPWM_SFO.pjt
+++ /dev/null
@@ -1,59 +0,0 @@
-; Code Composer Project File, Version 2.0 (do not modify or remove this line)
-
-[Project Settings]
-ProjectName="DSP2833x"
-ProjectDir="C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\hrpwm_sfo\"
-ProjectType=Executable
-CPUFamily=TMS320C28XX
-Tool="Compiler"
-Tool="CustomBuilder"
-Tool="DspBiosBuilder"
-Tool="Linker"
-Config="Debug"
-Config="Release"
-
-[Source Files]
-Source="..\..\DSP2833x_common\lib\SFO_TI_Build_fpu.lib"
-Source="..\..\DSP2833x_common\source\DSP2833x_ADC_cal.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CodeStartBranch.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_DefaultIsr.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_EPwm.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieVect.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_SysCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_usDelay.asm"
-Source="..\..\DSP2833x_headers\source\DSP2833x_GlobalVariableDefs.c"
-Source="Example_2833xHRPWM_SFO.c"
-Source="..\..\DSP2833x_common\cmd\28335_RAM_lnk.cmd"
-Source="..\..\DSP2833x_headers\cmd\DSP2833x_Headers_nonBIOS.cmd"
-
-["Compiler" Settings: "Debug"]
-Options=-g -k -q -pdr -pdv -al -as -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\hrpwm_sfo\Debug" -fs"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\hrpwm_sfo\Debug" -i"..\..\DSP2833x_headers\include" -i"..\..\DSP2833x_common\include" -d"_DEBUG" -d"LARGE_MODEL" -ml -mt -v28 --float_support=fpu32
-
-["Compiler" Settings: "Release"]
-Options=-q -o3 -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\hrpwm_sfo\Release" -d"LARGE_MODEL" -ml -v28
-
-["DspBiosBuilder" Settings: "Debug"]
-Options=-v28
-
-["DspBiosBuilder" Settings: "Release"]
-Options=-v28
-
-["Linker" Settings: "Debug"]
-Options=-q -c -ecode_start -m".\Debug\Example_2833xHRPWM_SFO.map" -o".\Debug\Example_2833xHRPWM_SFO.out" -stack0x380 -w -x -i"..\..\DSP2833x_headers\include" -l"rts2800_fpu32.lib"
-
-["Linker" Settings: "Release"]
-Options=-q -c -o".\Release\Example_2833xHRPWM_SFO.out" -x
-
-["..\..\DSP2833x_headers\source\DSP2833x_GlobalVariableDefs.c" Settings: "Debug"]
-LinkOrder=1
-
-["..\..\DSP2833x_common\cmd\28335_RAM_lnk.cmd" Settings: "Debug"]
-LinkOrder=1
-
-["..\..\DSP2833x_common\cmd\28335_RAM_lnk.cmd" Settings: "Release"]
-LinkOrder=1
-
-["..\..\DSP2833x_headers\cmd\DSP2833x_Headers_nonBIOS.cmd" Settings: "Debug"]
-LinkOrder=2
-
diff --git a/Source/External/v120/DSP2833x_examples/hrpwm_sfo_v5/Example_2833xHRPWM_SFO_V5.c b/Source/External/v120/DSP2833x_examples/hrpwm_sfo_v5/Example_2833xHRPWM_SFO_V5.c
deleted file mode 100644
index 6635f1c..0000000
--- a/Source/External/v120/DSP2833x_examples/hrpwm_sfo_v5/Example_2833xHRPWM_SFO_V5.c
+++ /dev/null
@@ -1,477 +0,0 @@
-// TI File $Revision: /main/14 $
-// Checkin $Date: June 23, 2008   08:58:36 $
-//###########################################################################
-//
-// FILE:	Example_2833xHRPWM_SFO_V5.c
-//
-// TITLE:	DSP2833x Device HRPWM SFO V5 example
-//
-// ASSUMPTIONS:
-//
-//
-//    This program requires the DSP2833x header files, which include
-//    the following files required for this example:
-//    SFO_V5.h and SFO_TI_Build_V5B_fpu.lib (or SFO_TI_Build_V5B.lib for fixed point)
-//
-//
-//    !!NOTE!!
-//    By default, this example project is configured for floating-point math. All included libraries
-//    must be pre-compiled for floating-point math.
-//
-//    Therefore, SFO_TI_Build_V5B_fpu.lib (compiled for floating-point) is included in the
-//    project instead of the SFO_TI_Build_V5B.lib (compiled for fixed-point).
-//
-//    To convert the example for fixed-point math, follow the instructions in sfo_readme.txt
-//    in the /doc directory of the header files and peripheral examples package.
-//
-//
-//    Monitor the following pins on an oscilloscope:
-//        ePWM1A (GPIO0)
-//        ePWM2A (GPIO2)
-//        ePWM3A (GPIO4)
-//        ePWM4A (GPIO6)
-//        ePWM5A (GPIO8)
-//        ePWM6A (GPIO10)
-//
-//
-//    As supplied, this project is configured for "boot to SARAM"
-//    operation.  The 2833x Boot Mode table is shown below.
-//    For information on configuring the boot mode of an eZdsp,
-//    please refer to the documentation included with the eZdsp,
-//
-//       $Boot_Table:
-//
-//         GPIO87   GPIO86     GPIO85   GPIO84
-//          XA15     XA14       XA13     XA12
-//           PU       PU         PU       PU
-//        ==========================================
-//            1        1          1        1    Jump to Flash
-//            1        1          1        0    SCI-A boot
-//            1        1          0        1    SPI-A boot
-//            1        1          0        0    I2C-A boot
-//            1        0          1        1    eCAN-A boot
-//            1        0          1        0    McBSP-A boot
-//            1        0          0        1    Jump to XINTF x16
-//            1        0          0        0    Jump to XINTF x32
-//            0        1          1        1    Jump to OTP
-//            0        1          1        0    Parallel GPIO I/O boot
-//            0        1          0        1    Parallel XINTF boot
-//            0        1          0        0    Jump to SARAM	    <- "boot to SARAM"
-//            0        0          1        1    Branch to check boot mode
-//            0        0          1        0    Boot to flash, bypass ADC cal
-//            0        0          0        1    Boot to SARAM, bypass ADC cal
-//            0        0          0        0    Boot to SCI-A, bypass ADC cal
-//                                              Boot_Table_End$
-//
-// DESCRIPTION:
-//
-//       This example modifies the MEP control registers to show edge displacement
-//       due to the HRPWM control extension of the respective ePWM module.
-//
-//       This example calls the following TI's MEP Scale Factor Optimizer (SFO)
-//       software library V5 functions:
-//
-//
-//       int SFO_MepEn_V5(int i);
-//            updates MEP_ScaleFactor[i] dynamically when HRPWM is in use.
-//            - returns 1 when complete for the specified channel
-//            - returns 0 if not complete for the specified channel
-//            - returns 2 if there is a scale factor out-of-range error
-//              (MEP_ScaleFactor[n] differs from seed MEP_ScaleFactor[0]
-//               by more than +/-15). To remedy this:
-//                      1. Check your software to make sure MepEn completes for
-//                         1 channel before calling MepEn for another channel.
-//                      2. Re-run MepDis and re-seed MEP_ScaleFactor[0]. Then
-//                         try again.
-//                      3. If reason is known and acceptable, treat return of "2"
-//                         like a return of "1", indicating calibration complete.
-//
-//       int SFO_MepDis_V5(int i);
-//            updates MEP_ScaleFactor[i] when HRPWM is not used
-//            - returns 1 when complete for the specified channel
-//            - returns 0 if not complete for the specified channel
-//
-//       MEP_ScaleFactor[PWM_CH] is a global array variable used by the SFO library
-//
-//       =======================================================================
-//       NOTE: For more information on using the SFO software library, see the
-//       High-Resolution Pulse Width Modulator (HRPWM) Reference Guide (spru924)
-//       =======================================================================
-//
-//       This example is intended to explain the HRPWM capabilities. The code can be
-//       optimized for code efficiency. Refer to TI's Digital power application
-//       examples and TI Digital Power Supply software libraries for details.
-//
-//       All ePWM1A-6A channels will have fine
-//       edge movement due to the HRPWM logic
-//
-//            5MHz PWM (for 150 MHz SYSCLKOUT), ePWMxA toggle high/low with MEP control on rising edge
-//            3.33MHz PWM (for 100 MHz SYSCLKOUT), ePWMxA toggle high/low with MEP control on rising edge
-//
-//	To load and run this example:
-//            1. **!!IMPORTANT!!** - in SFO_V5.h, set PWM_CH to the max number of
-//               HRPWM channels plus one. For example, for the F28335, the
-//               maximum number of HRPWM channels is 6. 6+1=7, so set
-//               #define PWM_CH 7 in SFO_V5.h. (Default is 7)
-//            2. Run this example at 150/100MHz SYSCLKOUT
-//            3. Load the Example_2833xHRPWM_SFO.gel and observe variables in the watch window
-//            4. Activate Real time mode
-//            5. Run the code
-//            6. Watch ePWM1-6 waveforms on a Oscillosope
-//            7. In the watch window:
-//               Set the variable UpdateFine = 1  to observe the ePWMxA output
-//               with HRPWM capabilites (default)
-//               Observe the duty cycle of the waveform changes in fine MEP steps
-//            8. In the watch window:
-//               Change the variable UpdateFine to 0, to observe the
-//               ePWMxA output without HRPWM capabilites
-//               Observe the duty cycle of the waveform changes in coarse steps of 10nsec.
-//
-//  Watch Variables:
-//               UpdateFine
-//               MEP_ScaleFactor
-//               EPwm1Regs.CMPA.all
-//               EPwm2Regs.CMPA.all
-//               EPwm3Regs.CMPA.all
-//               EPwm4Regs.CMPA.all
-//               EPwm5Regs.CMPA.all
-//               EPwm6Regs.CMPA.all
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File
-#include "DSP2833x_EPwm_defines.h" 	// useful defines for initialization
-#include "SFO_V5.h"                 // SFO V5 library headerfile - required to use SFO library functions
-
-// **!!IMPORTANT!!**
-// UPDATE NUMBER OF HRPWM CHANNELS + 1  USED IN SFO_V5.H
-// i.e. #define PWM_CH	   // F28335 has a maximum of 6 HRPWM channels (7=6+1)
-
-// Declare your function prototypes here
-//---------------------------------------------------------------
-void HRPWM_Config(int);
-void error (void);
-
-// General System nets - Useful for debug
-Uint16 UpdateFine, DutyFine, status, nMepChannel;
-
-//====================================================================
-// The following declarations are required in order to use the SFO
-// library functions:
-//
-int MEP_ScaleFactor[PWM_CH]; // Global array used by the SFO library
-                             // For n HRPWM channels + 1 for MEP_ScaleFactor[0]
-
-// Array of pointers to EPwm register structures:
-// *ePWM[0] is defined as dummy value not used in the example
-volatile struct EPWM_REGS *ePWM[PWM_CH] =
- 			 {  &EPwm1Regs, &EPwm1Regs, &EPwm2Regs,	&EPwm3Regs,
- 			    &EPwm4Regs,	&EPwm5Regs,	&EPwm6Regs};
-//====================================================================
-
-void main(void)
-{
-    // Local variables
-    int i;
-    Uint32 temp;
-    int16 CMPA_reg_val, CMPAHR_reg_val;
-
-
-// Step 1. Initialize System Control:
-// PLL, WatchDog, enable Peripheral Clocks
-// This example function is found in the DSP2833x_SysCtrl.c file.
-   InitSysCtrl();
-
-// Step 2. Initalize GPIO:
-// This example function is found in the DSP2833x_Gpio.c file and
-// illustrates how to set the GPIO to it's default state.
-// InitGpio();  // Skipped for this example
-
-
-// For this case just init GPIO pins for ePWM1-ePWM6
-// This function is in the DSP2833x_EPwm.c file
-   InitEPwmGpio();
-
-// Step 3. Clear all interrupts and initialize PIE vector table:
-// Disable CPU interrupts
-   DINT;
-
-// Initialize the PIE control registers to their default state.
-// The default state is all PIE interrupts disabled and flags
-// are cleared.
-// This function is found in the DSP2833x_PieCtrl.c file.
-   InitPieCtrl();
-
-// Disable CPU interrupts and clear all CPU interrupt flags:
-   IER = 0x0000;
-   IFR = 0x0000;
-
-// Initialize the PIE vector table with pointers to the shell Interrupt
-// Service Routines (ISR).
-// This will populate the entire table, even if the interrupt
-// is not used in this example.  This is useful for debug purposes.
-// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
-// This function is found in DSP2833x_PieVect.c.
-   InitPieVectTable();
-
-// Step 4. Initialize all the Device Peripherals:
-// This function is found in DSP2833x_InitPeripherals.c
-// InitPeripherals();  // Not required for this example
-
-// For this example, only initialize the ePWM
-// Step 5. User specific code, enable interrupts:
-
-   UpdateFine = 1;
-   DutyFine   = 0;
-   nMepChannel=1;   // HRPWM diagnostics start on ePWM channel 1
-
-   EALLOW;
-   SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0;
-   EDIS;
-
-//  MEP_ScaleFactor variables intialization for SFO library functions
-    for(i=0;i<PWM_CH;i++)
-    {
-        MEP_ScaleFactor[i] =0;
-    }
-
-
-//  MEP_ScaleFactor variables intialization using SFO_MepDis_V5 library function.
-   EALLOW;
-   for(i=1;i<PWM_CH;i++)
-   {
-
-	    (*ePWM[i]).HRCNFG.bit.EDGMODE = 1;            // Enable HRPWM logic for channel prior to calibration
-	    while ( SFO_MepDis_V5(i) == SFO_INCOMPLETE ); //returns "0" when cal. incomplete for channel
-   }
-   EDIS;
-
-// 	Initialize a common seed variable MEP_ScaleFactor[0] required for all SFO functions
-    MEP_ScaleFactor[0] = MEP_ScaleFactor[1];
-
-//  Some useful Period vs Frequency values
-//  SYSCLKOUT =     150MHz         100 MHz
-//  -----------------------------------------
-//	Period	        Frequency      Frequency
-//	1000			150 kHz		   100 KHz
-//	800				187 kHz		   125 KHz
-//	600				250 kHz		   167 KHz
-//	500				300 kHz		   200 KHz
-//	250				600 kHz		   400 KHz
-//	200				750 kHz		   500 KHz
-//	100				1.5 MHz		   1.0 MHz
-//	50				3.0 MHz		   2.0 MHz
-//	25				6.0 MHz		   4.0 MHz
-//	20				7.5 MHz		   5.0 MHz
-//	12				12.5 MHz	   8.33 MHz
-//	10				15.0 MHz	   10.0 MHz
-//	9				16.7 MHz	   11.1 MHz
-//	8				18.8 MHz	   12.5 MHz
-//	7				21.4 MHz	   14.3 MHz
-//	6				25.0 MHz	   16.7 MHz
-//	5				30.0 MHz	   20.0 MHz
-
-
-
-//====================================================================
-// ePWM and HRPWM register initialization
-//====================================================================
-
-   HRPWM_Config(30);	    // ePWMx target, 5 MHz PWM (150MHz SYSCLKOUT)/3.33 MHz PWM (100MHz SYSCLKOUT)
-
-   EALLOW;
-   SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1;
-   EDIS;
-
-   for(;;)
-   {
-     	// Sweep DutyFine as a Q15 number from 0.2 - 0.999
-		for(DutyFine = 0x2300; DutyFine < 0x7000; DutyFine++)
-		{
-
-			if(UpdateFine)
-			{
-			/*
-			// CMPA_reg_val is calculated as a Q0.
-			// Since DutyFine is a Q15 number, and the period is Q0
-			// the product is Q15. So to store as a Q0, we shift right
-			// 15 bits.
-
-			CMPA_reg_val = ((long)DutyFine * EPwm1Regs.TBPRD)>>15;
-
-			// This next step is to obtain the remainder which was
-			// truncated during our 15 bit shift above.
-			// compute the whole value, and then subtract CMPA_reg_val
-			// shifted LEFT 15 bits:
-			temp = ((long)DutyFine * EPwm1Regs.TBPRD) ;
-			temp = temp - ((long)CMPA_reg_val<<15);
-
-			// This obtains the MEP count in digits, from
-			// 0,1, .... MEP_Scalefactor. Once again since this is Q15
-			// convert to Q0 by shifting:
-			CMPAHR_reg_val = (temp*MEP_ScaleFactor[1])>>15;
-
-			// Now the lower 8 bits contain the MEP count.
-			// Since the MEP count needs to be in the upper 8 bits of
-			// the 16 bit CMPAHR register, shift left by 8.
-			CMPAHR_reg_val = CMPAHR_reg_val << 8;
-
-			// Add the offset and rounding
-			CMPAHR_reg_val += 0x0180;
-
-			// Write the values to the registers as one 32-bit or two 16-bits
-			EPwm1Regs.CMPA.half.CMPA = CMPA_reg_val;
-			EPwm1Regs.CMPA.half.CMPAHR = CMPAHR_reg_val;
-			*/
-
-			// All the above operations may be condensed into
-			// the following form for each channel:
-
-			// EPWM calculations where EPwm1Regs are accessed
-			// by (*ePWM[1]), EPwm2Regs are accessed by (*ePWM[2]),
-			// etc.:
-
-                for(i=1;i<PWM_CH;i++)
-                {
-                    CMPA_reg_val = ((long)DutyFine * (*ePWM[i]).TBPRD)>>15;
-                    temp = ((long)DutyFine * (*ePWM[i]).TBPRD) ;
-			        temp = temp - ((long)CMPA_reg_val<<15);
-			        CMPAHR_reg_val = (temp*MEP_ScaleFactor[i])>>15;
-			        CMPAHR_reg_val = CMPAHR_reg_val << 8;
-		     	    CMPAHR_reg_val += 0x0180;
-
-			       // Example for a 32 bit write to CMPA:CMPAHR
-		         	(*ePWM[i]).CMPA.all = ((long)CMPA_reg_val)<<16 | CMPAHR_reg_val;
-                 }
-
-			}
-			else
-			{
-			// CMPA_reg_val is calculated as a Q0.
-			// Since DutyFine is a Q15 number, and the period is Q0
-			// the product is Q15. So to store as a Q0, we shift right
-			// 15 bits.
-
-			    for(i=1;i<PWM_CH;i++)
-			    {
-			     (*ePWM[i]).CMPA.half.CMPA = ((long)DutyFine * (*ePWM[i]).TBPRD>>15);
-                }
-			}
-
-
-// Call the scale factor optimizer lib function SFO_MepEn_V5()
-// periodically to track for any changes due to temp/voltage.
-// SFO_MepEn_V5 Calibration must be finished on one channel (return 1) before
-// moving on to the next channel.
-//
-// *NOTE*: In this example, SFO_MepEn_V5 is called 700 times in a loop. For example
-//         purposes, this allows the CMPAHR and CMPA registers to change in such
-//         a way that when watching in "Continuous Refresh" mode, the user
-//         can see the CMPAHR register increment in fine steps to a certain point
-//         before the CMPA register increments in a coarse step. Normally,
-//         SFO_MepEn_V5 can be called once every so often in the background for
-//         a slow update with no for-loop.
-
-            for (i=0; i<700; i++)                   // Call SFO_MepEn_V5 700 times.
-            {
-			    status = SFO_MepEn_V5(nMepChannel);
-                if (status == SFO_COMPLETE)         // Once SFO_MepEn_V5 complete (returns 1)-
-	                nMepChannel++;                  // move on to next channel
-	            else if (status == SFO_OUTRANGE_ERROR) // If MEP_ScaleFactor[nMepChannel] differs
-	            {                                      // from seed Mep_ScaleFactor[0] by more than
-	                error();                           // +/-15, status = 2 (out of range error)
-	            }
-	            if(nMepChannel==PWM_CH)
-                    nMepChannel =1;        // Once max channels reached, loop back to channel 1
-            }
-
-	    } // end DutyFine for loop
-
-    }     // end infinite for loop
-
-}         // end SFO_MepEn_V5
-
-//=============================================================
-// FUNCTION:    HRPWM_Config
-// DESCRIPTION: Configures all ePWM channels and sets up HRPWM
-//              on ePWMxA channels
-//
-// PARAMETERS:  period - desired PWM period in TBCLK counts
-// RETURN:      N/A
-//=============================================================
-
-void HRPWM_Config(period)
-{
-Uint16 j;
-// ePWM channel register configuration with HRPWM
-// ePWMxA toggle low/high with MEP control on Rising edge
-   for (j=1;j<PWM_CH;j++)
-   {
-	(*ePWM[j]).TBCTL.bit.PRDLD = TB_IMMEDIATE;	        // set Immediate load
-	(*ePWM[j]).TBPRD = period-1;		                // PWM frequency = 1 / period
-	(*ePWM[j]).CMPA.half.CMPA = period / 2;             // set duty 50% initially
-    (*ePWM[j]).CMPA.half.CMPAHR = (1 << 8);             // initialize HRPWM extension
-	(*ePWM[j]).CMPB = period / 2;	                    // set duty 50% initially
-	(*ePWM[j]).TBPHS.all = 0;
-	(*ePWM[j]).TBCTR = 0;
-
-	(*ePWM[j]).TBCTL.bit.CTRMODE = TB_COUNT_UP;
-	(*ePWM[j]).TBCTL.bit.PHSEN = TB_DISABLE;
-	(*ePWM[j]).TBCTL.bit.SYNCOSEL = TB_SYNC_DISABLE;
-	(*ePWM[j]).TBCTL.bit.HSPCLKDIV = TB_DIV1;
-	(*ePWM[j]).TBCTL.bit.CLKDIV = TB_DIV1;
-	(*ePWM[j]).TBCTL.bit.FREE_SOFT = 11;
-
-	(*ePWM[j]).CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
-	(*ePWM[j]).CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
-	(*ePWM[j]).CMPCTL.bit.SHDWAMODE = CC_SHADOW;
-	(*ePWM[j]).CMPCTL.bit.SHDWBMODE = CC_SHADOW;
-
-
-	(*ePWM[j]).AQCTLA.bit.ZRO = AQ_SET;               // PWM toggle high/low
-	(*ePWM[j]).AQCTLA.bit.CAU = AQ_CLEAR;
-	(*ePWM[j]).AQCTLB.bit.ZRO = AQ_SET;
-	(*ePWM[j]).AQCTLB.bit.CBU = AQ_CLEAR;
-
-	EALLOW;
-	(*ePWM[j]).HRCNFG.all = 0x0;
-	(*ePWM[j]).HRCNFG.bit.EDGMODE = HR_FEP;			 // MEP control on falling edge
-	(*ePWM[j]).HRCNFG.bit.CTLMODE = HR_CMP;
-	(*ePWM[j]).HRCNFG.bit.HRLOAD  = HR_CTR_ZERO;
-	EDIS;
-	}
-}
-
-
-//=============================================================
-// FUNCTION:    error
-// DESCRIPTION: An error occurs when the MEP_ScaleFactor [n]
-//              calculated from SFO_MEPEn_V5 differs by > +/- 15
-//              from the Seed Value in MEP_ScaleFactor[0].
-//              SFO_MepEn_V5 returned a "2" (SFO_OUTRANGE_ERROR).
-//              The user should:
-//              (1) Re-run SFO_MepDis_V5 to re-calibrate
-//                  an appropriate seed value.
-//              (2) Ensure the code is not calling Mep_En_V5
-//                  on a different channel when it is currently
-//                  still running on a channel. (Repetitively
-//                  call Mep_En_V5 on current channel until an
-//                  SFO_COMPLETE ( i.e. 1) is returned.
-//              (3) If the out-of-range condition is acceptable
-//                  for the application, ignore the "2" and
-//                  treat it as a "1" or SFO_COMPLETE.
-//
-// PARAMETERS:  N/A
-// RETURN:      N/A
-//=============================================================
-
-void error (void)
-{
-   ESTOP0;  // Error - MEP_ScaleFactor out of range of Seed - rerun MepDis calibration.
-}
-
-
-// No more
-
diff --git a/Source/External/v120/DSP2833x_examples/hrpwm_sfo_v5/Example_2833xHRPWM_SFO_V5.gel b/Source/External/v120/DSP2833x_examples/hrpwm_sfo_v5/Example_2833xHRPWM_SFO_V5.gel
deleted file mode 100644
index d76daae..0000000
--- a/Source/External/v120/DSP2833x_examples/hrpwm_sfo_v5/Example_2833xHRPWM_SFO_V5.gel
+++ /dev/null
@@ -1,58 +0,0 @@
-/*
-// TI File $Revision: /main/5 $
-// Checkin $Date: August 9, 2007   17:25:04 $
-//###########################################################################
-//
-// This .gel file can be used to help load and build the example project.
-// It should be unloaded from Code Composer Studio before loading another 
-// project. 
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-//###########################################################################
-// Test Description: Run this GEL on F28334
-// The Watch window should give a Scale factor value of 67-70 for the HRPWM 
-// modules in the device. F28335 will have a maximum of 6 entries + 1 for 
-// MEP_ScaleFactor[0].
-//###########################################################################
-*/
-
-menuitem "DSP2833x HRPWM SFO V5"
-
-hotmenu Load_and_Build_Project()
-{
-   GEL_ProjectLoad("Example_2833xHRPWM_SFO_V5.pjt");
-   GEL_ProjectBuild("Example_2833xHRPWM_SFO_V5.pjt");
-   Setup_WatchWindow();
-}
-
-hotmenu Load_Code()
-{
-   GEL_Load(".\\debug\\Example_2833xHRPWM_SFO_V5.out");
-   Setup_WatchWindow();
-}
-
-hotmenu Setup_WatchWindow()
-{
-
-   GEL_WatchReset();
-   GEL_WatchAdd("UpdateFine");
-   GEL_WatchAdd("EPwm1Regs.CMPA.all");
-   GEL_WatchAdd("EPwm2Regs.CMPA.all");
-   GEL_WatchAdd("EPwm3Regs.CMPA.all");
-   GEL_WatchAdd("EPwm4Regs.CMPA.all");
-   GEL_WatchAdd("EPwm5Regs.CMPA.all");
-   GEL_WatchAdd("EPwm6Regs.CMPA.all");
-   GEL_WatchAdd("MEP_ScaleFactor");
-   GEL_WatchAdd("EPwm1Regs,x");
-   GEL_WatchAdd("EPwm2Regs,x");
-   GEL_WatchAdd("EPwm3Regs,x");
-   GEL_WatchAdd("EPwm4Regs,x");
-   GEL_WatchAdd("EPwm5Regs,x");
-   GEL_WatchAdd("EPwm6Regs,x");
-   
-   
-}
diff --git a/Source/External/v120/DSP2833x_examples/hrpwm_sfo_v5/Example_2833xHRPWM_SFO_V5.pjt b/Source/External/v120/DSP2833x_examples/hrpwm_sfo_v5/Example_2833xHRPWM_SFO_V5.pjt
deleted file mode 100644
index 45731df..0000000
--- a/Source/External/v120/DSP2833x_examples/hrpwm_sfo_v5/Example_2833xHRPWM_SFO_V5.pjt
+++ /dev/null
@@ -1,53 +0,0 @@
-; Code Composer Project File, Version 2.0 (do not modify or remove this line)
-
-[Project Settings]
-ProjectName="DSP2833x"
-ProjectDir="C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\hrpwm_sfo_v5\"
-ProjectType=Executable
-CPUFamily=TMS320C28XX
-Tool="Compiler"
-Tool="CustomBuilder"
-Tool="DspBiosBuilder"
-Tool="Linker"
-Config="Debug"
-Config="Release"
-
-[Source Files]
-Source="..\..\DSP2833x_common\lib\SFO_TI_Build_V5B_fpu.lib"
-Source="..\..\DSP2833x_common\source\DSP2833x_ADC_cal.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CodeStartBranch.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_DefaultIsr.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_EPwm.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieVect.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_SysCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_usDelay.asm"
-Source="..\..\DSP2833x_headers\source\DSP2833x_GlobalVariableDefs.c"
-Source="Example_2833xHRPWM_SFO_V5.c"
-Source="..\..\DSP2833x_common\cmd\28335_RAM_lnk.cmd"
-Source="..\..\DSP2833x_headers\cmd\DSP2833x_Headers_nonBIOS.cmd"
-
-["Compiler" Settings: "Debug"]
-Options=-g -q -pdr -pdv -as -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\hrpwm_sfo_v5\Debug" -i"..\..\DSP2833x_headers\include" -i"..\..\DSP2833x_common\include" -d"_DEBUG" -d"LARGE_MODEL" --float_support=fpu32 -ml -mt -v28
-
-["Compiler" Settings: "Release"]
-Options=-q -o3 -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\hrpwm_sfo_v5\Release" -d"LARGE_MODEL" -ml -v28
-
-["DspBiosBuilder" Settings: "Debug"]
-Options=-v28
-
-["DspBiosBuilder" Settings: "Release"]
-Options=-v28
-
-["Linker" Settings: "Debug"]
-Options=-q -c -ecode_start -m".\Debug\Example_2833xHRPWM_SFO_V5.map" -o".\Debug\Example_2833xHRPWM_SFO_V5.out" -stack0x380 -w -x -i"..\..\DSP2833x_headers\include" -l"rts2800_fpu32.lib"
-
-["Linker" Settings: "Release"]
-Options=-q -c -o".\Release\Example_2833xHRPWM_SFO_V5.out" -x
-
-["..\..\DSP2833x_headers\source\DSP2833x_GlobalVariableDefs.c" Settings: "Debug"]
-LinkOrder=1
-
-["..\..\DSP2833x_headers\cmd\DSP2833x_Headers_nonBIOS.cmd" Settings: "Debug"]
-LinkOrder=2
-
diff --git a/Source/External/v120/DSP2833x_examples/hrpwm_slider/Example_2833xHRPWM_slider.c b/Source/External/v120/DSP2833x_examples/hrpwm_slider/Example_2833xHRPWM_slider.c
deleted file mode 100644
index ba2dd87..0000000
--- a/Source/External/v120/DSP2833x_examples/hrpwm_slider/Example_2833xHRPWM_slider.c
+++ /dev/null
@@ -1,381 +0,0 @@
-// TI File $Revision: /main/13 $
-// Checkin $Date: May 5, 2008   15:26:01 $
-//###########################################################################
-//
-// FILE:	Example_2833xHRPWM_slider.c
-//
-// TITLE:	DSP2833x Device HRPWM with Slider example
-//
-// ASSUMPTIONS:
-//
-//
-//    This program requires the DSP2833x header files.
-//
-//    Monitor ePWM1-ePWM4 pins on an oscilloscope as described
-//    below.
-//
-//       EPWM1A is on GPIO0
-//       EPWM1B is on GPIO1
-//
-//       EPWM2A is on GPIO2
-//       EPWM2B is on GPIO3
-//
-//       EPWM3A is on GPIO4
-//       EPWM3B is on GPIO5
-//
-//    As supplied, this project is configured for "boot to SARAM"
-//    operation.  The 2833x Boot Mode table is shown below.
-//    For information on configuring the boot mode of an eZdsp,
-//    please refer to the documentation included with the eZdsp,
-//
-//       $Boot_Table:
-//
-//         GPIO87   GPIO86     GPIO85   GPIO84
-//          XA15     XA14       XA13     XA12
-//           PU       PU         PU       PU
-//        ==========================================
-//            1        1          1        1    Jump to Flash
-//            1        1          1        0    SCI-A boot
-//            1        1          0        1    SPI-A boot
-//            1        1          0        0    I2C-A boot
-//            1        0          1        1    eCAN-A boot
-//            1        0          1        0    McBSP-A boot
-//            1        0          0        1    Jump to XINTF x16
-//            1        0          0        0    Jump to XINTF x32
-//            0        1          1        1    Jump to OTP
-//            0        1          1        0    Parallel GPIO I/O boot
-//            0        1          0        1    Parallel XINTF boot
-//            0        1          0        0    Jump to SARAM	    <- "boot to SARAM"
-//            0        0          1        1    Branch to check boot mode
-//            0        0          1        0    Boot to flash, bypass ADC cal
-//            0        0          0        1    Boot to SARAM, bypass ADC cal
-//            0        0          0        0    Boot to SCI-A, bypass ADC cal
-//                                              Boot_Table_End$
-//
-// DESCRIPTION:
-//
-//
-//            This example modifies the MEP control registers to show edge displacement
-//            due to HRPWM control blocks of the respective ePWM module, ePWM1A, 2A, 3A,
-//            and 4A channels (GPIO0, GPIO2, GPIO4, and GPIO6) will have fine edge movement
-//            due to HRPWM logic. Load the Example_2833xHRPWM_slider.gel file.
-//            Select the HRPWM FineDutySlider  from the GEL menu. A FineDuty slider
-//            graphics will show up in CCS.
-//            Load the program and run. Use the Slider to and observe the epwm edge displacement
-//            for each slider step change. This explains the MEP control on the ePWMxA channels
-//
-//            1. 15MHz PWM (for 150 MHz SYSCLKOUT) or 10MHz PWM (for 100MHz SYSCLKOUT),
-//                 ePWM1A toggle low/high with MEP control on rising edge
-//               15MHz PWM (for 150 MHz SYSCLKOUT) or 10MHz PWM (for 100MHz SYSCLKOUT),
-//                 ePWM1B toggle low/high with NO HRPWM control
-//
-//            2. 7.5MHz PWM (for 150 MHz SYSCLKOUT) or 5MHz PWM (for 100MHz SYSCLKOUT),
-//                  ePWM2A toggle low/high with MEP control on rising edge
-//               7.5MHz PWM (for 150 MHz SYSCLKOUT) or 5MHz PWM (for 100MHz SYSCLKOUT),
-//                  ePWM2B toggle low/high with NO HRPWM control
-//
-//            3. 15MHz PWM (for 150 MHz SYSCLKOUT) or 10MHz PWM (for 100MHz SYSCLKOUT),
-//                 ePWM3A toggle as high/low with MEP control on falling edge
-//               15MHz PWM (for 150 MHz SYSCLKOUT) or 10MHz PWM (for 100MHz SYSCLKOUT),
-//                 ePWM3B toggle low/high with NO HRPWM control
-//
-//            4. 7.5MHz PWM (for 150 MHz SYSCLKOUT) or 5MHz PWM (for 100MHz SYSCLKOUT),
-//                  ePWM4A toggle as high/low with MEP control on falling edge
-//               7.5MHz PWM (for 150 MHz SYSCLKOUT) or 5MHz PWM (for 100MHz SYSCLKOUT),
-//                  ePWM4B toggle low/high with NO HRPWM control
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File
-#include "DSP2833x_EPwm_defines.h" 	// useful defines for initialization
-
-
-// Declare your function prototypes here
-//---------------------------------------------------------------
-
-void HRPWM1_Config(int);
-void HRPWM2_Config(int);
-void HRPWM3_Config(int);
-void HRPWM4_Config(int);
-
-// General System nets - Useful for debug
-Uint16 i,j,	duty, DutyFine, n,update;
-
-Uint32 temp;
-
-void main(void)
-{
-
-// Step 1. Initialize System Control:
-// PLL, WatchDog, enable Peripheral Clocks
-// This example function is found in the DSP2833x_SysCtrl.c file.
-   InitSysCtrl();
-
-// Step 2. Initalize GPIO:
-// This example function is found in the DSP2833x_Gpio.c file and
-// illustrates how to set the GPIO to it's default state.
-// InitGpio();  // Skipped for this example
-// For this case, just init GPIO for ePWM1-ePWM4
-
-// For this case just init GPIO pins for ePWM1, ePWM2, ePWM3, ePWM4
-// These functions are in the DSP2833x_EPwm.c file
-   InitEPwm1Gpio();
-   InitEPwm2Gpio();
-   InitEPwm3Gpio();
-   InitEPwm4Gpio();
-
-// Step 3. Clear all interrupts and initialize PIE vector table:
-// Disable CPU interrupts
-   DINT;
-
-// Initialize the PIE control registers to their default state.
-// The default state is all PIE interrupts disabled and flags
-// are cleared.
-// This function is found in the DSP2833x_PieCtrl.c file.
-   InitPieCtrl();
-
-// Disable CPU interrupts and clear all CPU interrupt flags:
-   IER = 0x0000;
-   IFR = 0x0000;
-
-// Initialize the PIE vector table with pointers to the shell Interrupt
-// Service Routines (ISR).
-// This will populate the entire table, even if the interrupt
-// is not used in this example.  This is useful for debug purposes.
-// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
-// This function is found in DSP2833x_PieVect.c.
-   InitPieVectTable();
-
-// Step 4. Initialize all the Device Peripherals:
-// This function is found in DSP2833x_InitPeripherals.c
-// InitPeripherals();  // Not required for this example
-
-// For this example, only initialize the ePWM
-// Step 5. User specific code, enable interrupts:
-
-   update =1;
-   DutyFine =0;
-
-   EALLOW;
-   SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 0;
-   EDIS;
-
-//  Some useful Period vs Frequency values
-//  SYSCLKOUT =     150MHz         100 MHz
-//  -----------------------------------------
-//	Period	        Frequency      Frequency
-//	1000			150 kHz		   100 KHz
-//	800				187 kHz		   125 KHz
-//	600				250 kHz		   167 KHz
-//	500				300 kHz		   200 KHz
-//	250				600 kHz		   400 KHz
-//	200				750 kHz		   500 KHz
-//	100				1.5 MHz		   1.0 MHz
-//	50				3.0 MHz		   2.0 MHz
-//	25				6.0 MHz		   4.0 MHz
-//	20				7.5 MHz		   5.0 MHz
-//	12				12.5 MHz	   8.33 MHz
-//	10				15.0 MHz	   10.0 MHz
-//	9				16.7 MHz	   11.1 MHz
-//	8				18.8 MHz	   12.5 MHz
-//	7				21.4 MHz	   14.3 MHz
-//	6				25.0 MHz	   16.7 MHz
-//	5				30.0 MHz	   20.0 MHz
-
-//====================================================================
-// ePWM and HRPWM register initializaition
-//====================================================================
-   HRPWM1_Config(10);	    // ePWM1 target, 15 MHz PWM (SYSCLK=150MHz) or  10 MHz PWM (SYSCLK=100MHz)
-   HRPWM2_Config(20);	    // ePWM2 target, 7.5 MHz PWM (SYSCLK=150MHz) or 5 MHz PWM (SYSCLK=100MHz)
-   HRPWM3_Config(10);	    // ePWM3 target, 15 MHz PWM (SYSCLK=150MHz) or 10 MHz PWM (SYSCLK=100MHz)
-   HRPWM4_Config(20);	    // ePWM4 target, 7.5 MHz PWM (SYSCLK=150MHz) or 5 MHz PWM (SYSCLK=100MHz)
-
-
-   EALLOW;
-   SysCtrlRegs.PCLKCR0.bit.TBCLKSYNC = 1;
-   EDIS;
-
-   while (update ==1)
-
-	{
-
-//        for(DutyFine =1; DutyFine <256 ;DutyFine ++)
-        {
-
-        // Example, write to the HRPWM extension of CMPA
-        EPwm1Regs.CMPA.half.CMPAHR = DutyFine << 8;     // Left shift by 8 to write into MSB bits
-        EPwm2Regs.CMPA.half.CMPAHR = DutyFine << 8;     // Left shift by 8 to write into MSB bits
-
-        // Example, 32-bit write to CMPA:CMPAHR
-        EPwm3Regs.CMPA.all = ((Uint32)EPwm3Regs.CMPA.half.CMPA << 16) + (DutyFine << 8);
-        EPwm4Regs.CMPA.all = ((Uint32)EPwm4Regs.CMPA.half.CMPA << 16) + (DutyFine << 8);
-
-//		for (i=0;i<10000;i++){}                         // Dummy delay between MEP changes
-		}
-	}
-
-}
-
-
-void HRPWM1_Config(period)
-{
-// ePWM1 register configuration with HRPWM
-// ePWM1A toggle low/high with MEP control on Rising edge
-
-	EPwm1Regs.TBCTL.bit.PRDLD = TB_IMMEDIATE;	        // set Immediate load
-	EPwm1Regs.TBPRD = period - 1;		                // PWM frequency = 1 / period
-	EPwm1Regs.CMPA.half.CMPA = period / 2;              // set duty 50% initially
-    EPwm1Regs.CMPA.half.CMPAHR = (1 << 8);              // initialize HRPWM extension
-	EPwm1Regs.CMPB = period / 2;	                    // set duty 50% initially
-	EPwm1Regs.TBPHS.all = 0;
-	EPwm1Regs.TBCTR = 0;
-
-	EPwm1Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP;
-	EPwm1Regs.TBCTL.bit.PHSEN = TB_DISABLE;		       // EPWM1 is the Master
-	EPwm1Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_DISABLE;
-	EPwm1Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1;
-	EPwm1Regs.TBCTL.bit.CLKDIV = TB_DIV1;
-
-	EPwm1Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
-	EPwm1Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
-	EPwm1Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
-	EPwm1Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
-
-	EPwm1Regs.AQCTLA.bit.ZRO = AQ_CLEAR;               // PWM toggle low/high
-	EPwm1Regs.AQCTLA.bit.CAU = AQ_SET;
-	EPwm1Regs.AQCTLB.bit.ZRO = AQ_CLEAR;
-	EPwm1Regs.AQCTLB.bit.CBU = AQ_SET;
-
-	EALLOW;
-	EPwm1Regs.HRCNFG.all = 0x0;
-	EPwm1Regs.HRCNFG.bit.EDGMODE = HR_REP;				//MEP control on Rising edge
-	EPwm1Regs.HRCNFG.bit.CTLMODE = HR_CMP;
-	EPwm1Regs.HRCNFG.bit.HRLOAD  = HR_CTR_ZERO;
-	EDIS;
-}
-
-void HRPWM2_Config(period)
-{
-// ePWM2 register configuration with HRPWM
-// ePWM2A toggle low/high with MEP control on Rising edge
-
-	EPwm2Regs.TBCTL.bit.PRDLD = TB_IMMEDIATE;	        // set Immediate load
-	EPwm2Regs.TBPRD = period - 1;		                // PWM frequency = 1 / period
-	EPwm2Regs.CMPA.half.CMPA = period / 2;              // set duty 50% initially
-    EPwm1Regs.CMPA.half.CMPAHR = (1 << 8);              // initialize HRPWM extension
-	EPwm2Regs.CMPB = period / 2;	                    // set duty 50% initially
-	EPwm2Regs.TBPHS.all = 0;
-	EPwm2Regs.TBCTR = 0;
-
-	EPwm2Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP;
-	EPwm2Regs.TBCTL.bit.PHSEN = TB_DISABLE;		         // ePWM2 is the Master
-	EPwm2Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_DISABLE;
-	EPwm2Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1;
-	EPwm2Regs.TBCTL.bit.CLKDIV = TB_DIV1;
-
-	EPwm2Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
-	EPwm2Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
-	EPwm2Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
-	EPwm2Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
-
-	EPwm2Regs.AQCTLA.bit.ZRO = AQ_CLEAR;                  // PWM toggle low/high
-	EPwm2Regs.AQCTLA.bit.CAU = AQ_SET;
-	EPwm2Regs.AQCTLB.bit.ZRO = AQ_CLEAR;
-	EPwm2Regs.AQCTLB.bit.CBU = AQ_SET;
-
-	EALLOW;
-	EPwm2Regs.HRCNFG.all = 0x0;
-	EPwm2Regs.HRCNFG.bit.EDGMODE = HR_REP;                //MEP control on Rising edge
-	EPwm2Regs.HRCNFG.bit.CTLMODE = HR_CMP;
-	EPwm2Regs.HRCNFG.bit.HRLOAD  = HR_CTR_ZERO;
-
-	EDIS;
-
-}
-void HRPWM3_Config(period)
-{
-// ePWM3 register configuration with HRPWM
-// ePWM3A toggle high/low with MEP control on falling edge
-
-	EPwm3Regs.TBCTL.bit.PRDLD = TB_IMMEDIATE;	        // set Immediate load
-	EPwm3Regs.TBPRD = period - 1;		                // PWM frequency = 1 / period
-	EPwm3Regs.CMPA.half.CMPA = period / 2;              // set duty 50% initially
-	EPwm3Regs.CMPA.half.CMPAHR = (1 << 8);              // initialize HRPWM extension
-	EPwm3Regs.CMPB = period / 2;	                    // set duty 50% initially
-	EPwm3Regs.TBPHS.all = 0;
-	EPwm3Regs.TBCTR = 0;
-
-	EPwm3Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP;
-	EPwm3Regs.TBCTL.bit.PHSEN = TB_DISABLE;		        // ePWM3 is the Master
-	EPwm3Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_DISABLE;
-	EPwm3Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1;
-	EPwm3Regs.TBCTL.bit.CLKDIV = TB_DIV1;
-
-	EPwm3Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
-	EPwm3Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
-	EPwm3Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
-	EPwm3Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
-
-	EPwm3Regs.AQCTLA.bit.ZRO = AQ_SET;                  // PWM toggle high/low
-	EPwm3Regs.AQCTLA.bit.CAU = AQ_CLEAR;
-	EPwm3Regs.AQCTLB.bit.ZRO = AQ_SET;
-	EPwm3Regs.AQCTLB.bit.CBU = AQ_CLEAR;
-
-	EALLOW;
-	EPwm3Regs.HRCNFG.all = 0x0;
-	EPwm3Regs.HRCNFG.bit.EDGMODE = HR_FEP;               //MEP control on falling edge
-	EPwm3Regs.HRCNFG.bit.CTLMODE = HR_CMP;
-	EPwm3Regs.HRCNFG.bit.HRLOAD  = HR_CTR_ZERO;
-	EDIS;
-}
-
-void HRPWM4_Config(period)
-{
-// ePWM4 register configuration with HRPWM
-// ePWM4A toggle high/low with MEP control on falling edge
-
-	EPwm4Regs.TBCTL.bit.PRDLD = TB_IMMEDIATE;	        // set Immediate load
-	EPwm4Regs.TBPRD = period - 1;		                // PWM frequency = 1 / period
-	EPwm4Regs.CMPA.half.CMPA = period / 2;              // set duty 50% initially
-	EPwm4Regs.CMPA.half.CMPAHR = (1 << 8);              // initialize HRPWM extension
-	EPwm4Regs.CMPB = period / 2;	                    // set duty 50% initially
-	EPwm4Regs.TBPHS.all = 0;
-	EPwm4Regs.TBCTR = 0;
-
-	EPwm4Regs.TBCTL.bit.CTRMODE = TB_COUNT_UP;
-	EPwm4Regs.TBCTL.bit.PHSEN = TB_DISABLE;		        // ePWM4 is the Master
-	EPwm4Regs.TBCTL.bit.SYNCOSEL = TB_SYNC_DISABLE;
-	EPwm4Regs.TBCTL.bit.HSPCLKDIV = TB_DIV1;
-	EPwm4Regs.TBCTL.bit.CLKDIV = TB_DIV1;
-
-	EPwm4Regs.CMPCTL.bit.LOADAMODE = CC_CTR_ZERO;
-	EPwm4Regs.CMPCTL.bit.LOADBMODE = CC_CTR_ZERO;
-	EPwm4Regs.CMPCTL.bit.SHDWAMODE = CC_SHADOW;
-	EPwm4Regs.CMPCTL.bit.SHDWBMODE = CC_SHADOW;
-
-	EPwm4Regs.AQCTLA.bit.ZRO = AQ_SET;                  // PWM toggle high/low
-	EPwm4Regs.AQCTLA.bit.CAU = AQ_CLEAR;
-	EPwm4Regs.AQCTLB.bit.ZRO = AQ_SET;
-	EPwm4Regs.AQCTLB.bit.CBU = AQ_CLEAR;
-
-	EALLOW;
-	EPwm4Regs.HRCNFG.all = 0x0;
-	EPwm4Regs.HRCNFG.bit.EDGMODE = HR_FEP;              //MEP control on falling edge
-	EPwm4Regs.HRCNFG.bit.CTLMODE = HR_CMP;
-	EPwm4Regs.HRCNFG.bit.HRLOAD  = HR_CTR_ZERO;
-	EDIS;
-}
-
-
-
-
-
-
-
-
-
-
-
diff --git a/Source/External/v120/DSP2833x_examples/hrpwm_slider/Example_2833xHRPWM_slider.gel b/Source/External/v120/DSP2833x_examples/hrpwm_slider/Example_2833xHRPWM_slider.gel
deleted file mode 100644
index 0c5556a..0000000
--- a/Source/External/v120/DSP2833x_examples/hrpwm_slider/Example_2833xHRPWM_slider.gel
+++ /dev/null
@@ -1,51 +0,0 @@
-/*
-// TI File $Revision: /main/5 $
-// Checkin $Date: August 9, 2007   17:17:42 $
-//###########################################################################
-//
-// This .gel file can be used to help load and build the example project.
-// It should be unloaded from Code Composer Studio before loading another 
-// project. 
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-*/
-
-menuitem "DSP2833x HRPWM Slider"
-
-hotmenu Load_and_Build_Project()
-{
-   GEL_ProjectLoad("Example_2833xHRPWM_slider.pjt");
-   GEL_ProjectBuild("Example_2833xHRPWM_slider.pjt");
-   Setup_WatchWindow();
-}
-
-hotmenu Load_Code()
-{
-   GEL_Load(".\\debug\\Example_2833xHRPWM_slider.out");
-   Setup_WatchWindow();
-}
-
-hotmenu Setup_WatchWindow()
-{
-
-   GEL_WatchReset();
-   GEL_WatchAdd("DutyFine");
-   GEL_WatchAdd("EPwm1Regs.CMPA.all");
-   GEL_WatchAdd("EPwm2Regs.CMPA.all");
-   GEL_WatchAdd("EPwm3Regs.CMPA.all");
-   GEL_WatchAdd("EPwm4Regs.CMPA.all");
-   GEL_WatchAdd("EPwm1Regs,x");
-   GEL_WatchAdd("EPwm2Regs,x");
-   GEL_WatchAdd("EPwm3Regs,x");
-   GEL_WatchAdd("EPwm4Regs,x");
-}
-
-menuitem "DSP2833x HRPWM FineDutySlider"  
-slider FineDutySlider(1, 255, 1, 1, finedutyvalue)
-{
-
-	DutyFine = finedutyvalue;
-}
diff --git a/Source/External/v120/DSP2833x_examples/hrpwm_slider/Example_2833xHRPWM_slider.pjt b/Source/External/v120/DSP2833x_examples/hrpwm_slider/Example_2833xHRPWM_slider.pjt
deleted file mode 100644
index dc610c8..0000000
--- a/Source/External/v120/DSP2833x_examples/hrpwm_slider/Example_2833xHRPWM_slider.pjt
+++ /dev/null
@@ -1,51 +0,0 @@
-; Code Composer Project File, Version 2.0 (do not modify or remove this line)
-
-[Project Settings]
-ProjectName="DSP2833x"
-ProjectDir="C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\hrpwm_slider\"
-ProjectType=Executable
-CPUFamily=TMS320C28XX
-Tool="Compiler"
-Tool="DspBiosBuilder"
-Tool="Linker"
-Config="Debug"
-Config="Release"
-
-[Source Files]
-Source="..\..\DSP2833x_common\source\DSP2833x_ADC_cal.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CodeStartBranch.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_DefaultIsr.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_EPwm.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieVect.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_SysCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_usDelay.asm"
-Source="..\..\DSP2833x_headers\source\DSP2833x_GlobalVariableDefs.c"
-Source="Example_2833xHRPWM_slider.c"
-Source="..\..\DSP2833x_common\cmd\28335_RAM_lnk.cmd"
-Source="..\..\DSP2833x_headers\cmd\DSP2833x_Headers_nonBIOS.cmd"
-
-["Compiler" Settings: "Debug"]
-Options=-g -k -q -al -as -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\hrpwm_slider\Debug" -fs"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\hrpwm_slider\Debug" -i"..\..\DSP2833x_headers\include" -i"..\..\DSP2833x_common\include" -d"_DEBUG" -d"LARGE_MODEL" --float_support=fpu32 -ml -mt -v28
-
-["Compiler" Settings: "Release"]
-Options=-q -o3 -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\hrpwm_slider\Release" -d"LARGE_MODEL" -ml -v28
-
-["DspBiosBuilder" Settings: "Debug"]
-Options=-v28
-
-["DspBiosBuilder" Settings: "Release"]
-Options=-v28
-
-["Linker" Settings: "Debug"]
-Options=-q -cr -ecode_start -m".\Debug\Example_2833xHRPWM_slider.map" -o".\Debug\Example_2833xHRPWM_slider.out" -stack0x380 -w -x -i"..\..\DSP2833x_headers\include" -l"rts2800_fpu32.lib"
-
-["Linker" Settings: "Release"]
-Options=-q -c -o".\Release\Example_2833xHRPWM_slider" -x
-
-["..\..\DSP2833x_headers\source\DSP2833x_GlobalVariableDefs.c" Settings: "Debug"]
-LinkOrder=1
-
-["..\..\DSP2833x_headers\cmd\DSP2833x_Headers_nonBIOS.cmd" Settings: "Debug"]
-LinkOrder=2
-
diff --git a/Source/External/v120/DSP2833x_examples/i2c_eeprom/Example_2833xI2C_eeprom.c b/Source/External/v120/DSP2833x_examples/i2c_eeprom/Example_2833xI2C_eeprom.c
deleted file mode 100644
index d602c08..0000000
--- a/Source/External/v120/DSP2833x_examples/i2c_eeprom/Example_2833xI2C_eeprom.c
+++ /dev/null
@@ -1,473 +0,0 @@
-// TI File $Revision: /main/10 $
-// Checkin $Date: April 21, 2008   15:43:02 $
-//###########################################################################
-//
-// FILE:    Example_2833xI2c_eeprom.c
-//
-// TITLE:   DSP2833x I2C EEPROM Example
-//
-// ASSUMPTIONS:
-//
-//    This program requires the DSP2833x header files.
-//
-//    This program requires an external I2C EEPROM connected to
-//    the I2C bus at address 0x50.
-//
-//    As supplied, this project is configured for "boot to SARAM"
-//    operation.  The 2833x Boot Mode table is shown below.
-//    For information on configuring the boot mode of an eZdsp,
-//    please refer to the documentation included with the eZdsp,
-//
-//       $Boot_Table:
-//
-//         GPIO87   GPIO86     GPIO85   GPIO84
-//          XA15     XA14       XA13     XA12
-//           PU       PU         PU       PU
-//        ==========================================
-//            1        1          1        1    Jump to Flash
-//            1        1          1        0    SCI-A boot
-//            1        1          0        1    SPI-A boot
-//            1        1          0        0    I2C-A boot
-//            1        0          1        1    eCAN-A boot
-//            1        0          1        0    McBSP-A boot
-//            1        0          0        1    Jump to XINTF x16
-//            1        0          0        0    Jump to XINTF x32
-//            0        1          1        1    Jump to OTP
-//            0        1          1        0    Parallel GPIO I/O boot
-//            0        1          0        1    Parallel XINTF boot
-//            0        1          0        0    Jump to SARAM	    <- "boot to SARAM"
-//            0        0          1        1    Branch to check boot mode
-//            0        0          1        0    Boot to flash, bypass ADC cal
-//            0        0          0        1    Boot to SARAM, bypass ADC cal
-//            0        0          0        0    Boot to SCI-A, bypass ADC cal
-//                                              Boot_Table_End$
-//
-// DESCRIPTION:
-//
-//    This program will write 1-14 words to EEPROM and read them back.
-//    The data written and the EEPROM address written to are contained
-//    in the message structure, I2cMsgOut1. The data read back will be
-//    contained in the message structure I2cMsgIn1.
-//
-//    This program will work with the on-board I2C EEPROM supplied on
-//    the F2833x eZdsp.
-//
-//
-//###########################################################################
-// Original Author: D.F.
-//
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-
-#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File
-
-// Note: I2C Macros used in this example can be found in the
-// DSP2833x_I2C_defines.h file
-
-// Prototype statements for functions found within this file.
-void   I2CA_Init(void);
-Uint16 I2CA_WriteData(struct I2CMSG *msg);
-Uint16 I2CA_ReadData(struct I2CMSG *msg);
-interrupt void i2c_int1a_isr(void);
-void pass(void);
-void fail(void);
-
-#define I2C_SLAVE_ADDR        0x50
-#define I2C_NUMBYTES          4
-#define I2C_EEPROM_HIGH_ADDR  0x00
-#define I2C_EEPROM_LOW_ADDR   0x30
-
-// Global variables
-// Two bytes will be used for the outgoing address,
-// thus only setup 14 bytes maximum
-struct I2CMSG I2cMsgOut1={I2C_MSGSTAT_SEND_WITHSTOP,
-                          I2C_SLAVE_ADDR,
-                          I2C_NUMBYTES,
-                          I2C_EEPROM_HIGH_ADDR,
-                          I2C_EEPROM_LOW_ADDR,
-                          0x12,                   // Msg Byte 1
-                          0x34,                   // Msg Byte 2
-                          0x56,                   // Msg Byte 3
-                          0x78,                   // Msg Byte 4
-                          0x9A,                   // Msg Byte 5
-                          0xBC,                   // Msg Byte 6
-                          0xDE,                   // Msg Byte 7
-                          0xF0,                   // Msg Byte 8
-                          0x11,                   // Msg Byte 9
-                          0x10,                   // Msg Byte 10
-                          0x11,                   // Msg Byte 11
-                          0x12,                   // Msg Byte 12
-                          0x13,                   // Msg Byte 13
-                          0x12};                  // Msg Byte 14
-
-
-struct I2CMSG I2cMsgIn1={ I2C_MSGSTAT_SEND_NOSTOP,
-                          I2C_SLAVE_ADDR,
-                          I2C_NUMBYTES,
-                          I2C_EEPROM_HIGH_ADDR,
-                          I2C_EEPROM_LOW_ADDR};
-
-struct I2CMSG *CurrentMsgPtr;				// Used in interrupts
-Uint16 PassCount;
-Uint16 FailCount;
-
-void main(void)
-{
-   Uint16 Error;
-   Uint16 i;
-
-   CurrentMsgPtr = &I2cMsgOut1;
-
-// Step 1. Initialize System Control:
-// PLL, WatchDog, enable Peripheral Clocks
-// This example function is found in the DSP2833x_SysCtrl.c file.
-   InitSysCtrl();
-
-
-// Step 2. Initalize GPIO:
-// This example function is found in the DSP2833x_Gpio.c file and
-// illustrates how to set the GPIO to it's default state.
-// InitGpio();
-// Setup only the GP I/O only for I2C functionality
-   InitI2CGpio();
-
-// Step 3. Clear all interrupts and initialize PIE vector table:
-// Disable CPU interrupts
-   DINT;
-
-// Initialize PIE control registers to their default state.
-// The default state is all PIE interrupts disabled and flags
-// are cleared.
-// This function is found in the DSP2833x_PieCtrl.c file.
-   InitPieCtrl();
-
-// Disable CPU interrupts and clear all CPU interrupt flags:
-   IER = 0x0000;
-   IFR = 0x0000;
-
-// Initialize the PIE vector table with pointers to the shell Interrupt
-// Service Routines (ISR).
-// This will populate the entire table, even if the interrupt
-// is not used in this example.  This is useful for debug purposes.
-// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
-// This function is found in DSP2833x_PieVect.c.
-   InitPieVectTable();
-
-// Interrupts that are used in this example are re-mapped to
-// ISR functions found within this file.
-   EALLOW;	// This is needed to write to EALLOW protected registers
-   PieVectTable.I2CINT1A = &i2c_int1a_isr;
-   EDIS;   // This is needed to disable write to EALLOW protected registers
-
-// Step 4. Initialize all the Device Peripherals:
-// This function is found in DSP2833x_InitPeripherals.c
-// InitPeripherals(); // Not required for this example
-   I2CA_Init();
-
-// Step 5. User specific code
-
-   // Clear Counters
-   PassCount = 0;
-   FailCount = 0;
-
-   // Clear incoming message buffer
-   for (i = 0; i < I2C_MAX_BUFFER_SIZE; i++)
-   {
-       I2cMsgIn1.MsgBuffer[i] = 0x0000;
-   }
-
-// Enable interrupts required for this example
-
-// Enable I2C interrupt 1 in the PIE: Group 8 interrupt 1
-   PieCtrlRegs.PIEIER8.bit.INTx1 = 1;
-
-// Enable CPU INT8 which is connected to PIE group 8
-   IER |= M_INT8;
-   EINT;
-
-   // Application loop
-   for(;;)
-   {
-      //////////////////////////////////
-      // Write data to EEPROM section //
-      //////////////////////////////////
-
-      // Check the outgoing message to see if it should be sent.
-      // In this example it is initialized to send with a stop bit.
-      if(I2cMsgOut1.MsgStatus == I2C_MSGSTAT_SEND_WITHSTOP)
-      {
-         Error = I2CA_WriteData(&I2cMsgOut1);
-         // If communication is correctly initiated, set msg status to busy
-         // and update CurrentMsgPtr for the interrupt service routine.
-         // Otherwise, do nothing and try again next loop. Once message is
-         // initiated, the I2C interrupts will handle the rest. Search for
-         // ICINTR1A_ISR in the i2c_eeprom_isr.c file.
-         if (Error == I2C_SUCCESS)
-         {
-            CurrentMsgPtr = &I2cMsgOut1;
-            I2cMsgOut1.MsgStatus = I2C_MSGSTAT_WRITE_BUSY;
-         }
-      }  // end of write section
-
-      ///////////////////////////////////
-      // Read data from EEPROM section //
-      ///////////////////////////////////
-
-      // Check outgoing message status. Bypass read section if status is
-      // not inactive.
-      if (I2cMsgOut1.MsgStatus == I2C_MSGSTAT_INACTIVE)
-      {
-         // Check incoming message status.
-         if(I2cMsgIn1.MsgStatus == I2C_MSGSTAT_SEND_NOSTOP)
-         {
-            // EEPROM address setup portion
-            while(I2CA_ReadData(&I2cMsgIn1) != I2C_SUCCESS)
-            {
-               // Maybe setup an attempt counter to break an infinite while
-               // loop. The EEPROM will send back a NACK while it is performing
-               // a write operation. Even though the write communique is
-               // complete at this point, the EEPROM could still be busy
-               // programming the data. Therefore, multiple attempts are
-               // necessary.
-            }
-            // Update current message pointer and message status
-            CurrentMsgPtr = &I2cMsgIn1;
-            I2cMsgIn1.MsgStatus = I2C_MSGSTAT_SEND_NOSTOP_BUSY;
-         }
-
-         // Once message has progressed past setting up the internal address
-         // of the EEPROM, send a restart to read the data bytes from the
-         // EEPROM. Complete the communique with a stop bit. MsgStatus is
-         // updated in the interrupt service routine.
-         else if(I2cMsgIn1.MsgStatus == I2C_MSGSTAT_RESTART)
-         {
-            // Read data portion
-            while(I2CA_ReadData(&I2cMsgIn1) != I2C_SUCCESS)
-            {
-               // Maybe setup an attempt counter to break an infinite while
-               // loop.
-            }
-            // Update current message pointer and message status
-            CurrentMsgPtr = &I2cMsgIn1;
-            I2cMsgIn1.MsgStatus = I2C_MSGSTAT_READ_BUSY;
-         }
-      }  // end of read section
-
-   }   // end of for(;;)
-}   // end of main
-
-
-void I2CA_Init(void)
-{
-   // Initialize I2C
-   I2caRegs.I2CSAR = 0x0050;		// Slave address - EEPROM control code
-
-   #if (CPU_FRQ_150MHZ)             // Default - For 150MHz SYSCLKOUT
-        I2caRegs.I2CPSC.all = 14;   // Prescaler - need 7-12 Mhz on module clk (150/15 = 10MHz)
-   #endif
-   #if (CPU_FRQ_100MHZ)             // For 100 MHz SYSCLKOUT
-     I2caRegs.I2CPSC.all = 9;	    // Prescaler - need 7-12 Mhz on module clk (100/10 = 10MHz)
-   #endif
-
-   I2caRegs.I2CCLKL = 10;			// NOTE: must be non zero
-   I2caRegs.I2CCLKH = 5;			// NOTE: must be non zero
-   I2caRegs.I2CIER.all = 0x24;		// Enable SCD & ARDY interrupts
-
-   I2caRegs.I2CMDR.all = 0x0020;	// Take I2C out of reset
-   									// Stop I2C when suspended
-
-   I2caRegs.I2CFFTX.all = 0x6000;	// Enable FIFO mode and TXFIFO
-   I2caRegs.I2CFFRX.all = 0x2040;	// Enable RXFIFO, clear RXFFINT,
-
-   return;
-}
-
-
-Uint16 I2CA_WriteData(struct I2CMSG *msg)
-{
-   Uint16 i;
-
-   // Wait until the STP bit is cleared from any previous master communication.
-   // Clearing of this bit by the module is delayed until after the SCD bit is
-   // set. If this bit is not checked prior to initiating a new message, the
-   // I2C could get confused.
-   if (I2caRegs.I2CMDR.bit.STP == 1)
-   {
-      return I2C_STP_NOT_READY_ERROR;
-   }
-
-   // Setup slave address
-   I2caRegs.I2CSAR = msg->SlaveAddress;
-
-   // Check if bus busy
-   if (I2caRegs.I2CSTR.bit.BB == 1)
-   {
-      return I2C_BUS_BUSY_ERROR;
-   }
-
-   // Setup number of bytes to send
-   // MsgBuffer + Address
-   I2caRegs.I2CCNT = msg->NumOfBytes+2;
-
-   // Setup data to send
-   I2caRegs.I2CDXR = msg->MemoryHighAddr;
-   I2caRegs.I2CDXR = msg->MemoryLowAddr;
-// for (i=0; i<msg->NumOfBytes-2; i++)
-   for (i=0; i<msg->NumOfBytes; i++)
-
-   {
-      I2caRegs.I2CDXR = *(msg->MsgBuffer+i);
-   }
-
-   // Send start as master transmitter
-   I2caRegs.I2CMDR.all = 0x6E20;
-
-   return I2C_SUCCESS;
-}
-
-
-Uint16 I2CA_ReadData(struct I2CMSG *msg)
-{
-   // Wait until the STP bit is cleared from any previous master communication.
-   // Clearing of this bit by the module is delayed until after the SCD bit is
-   // set. If this bit is not checked prior to initiating a new message, the
-   // I2C could get confused.
-   if (I2caRegs.I2CMDR.bit.STP == 1)
-   {
-      return I2C_STP_NOT_READY_ERROR;
-   }
-
-   I2caRegs.I2CSAR = msg->SlaveAddress;
-
-   if(msg->MsgStatus == I2C_MSGSTAT_SEND_NOSTOP)
-   {
-      // Check if bus busy
-      if (I2caRegs.I2CSTR.bit.BB == 1)
-      {
-         return I2C_BUS_BUSY_ERROR;
-      }
-      I2caRegs.I2CCNT = 2;
-      I2caRegs.I2CDXR = msg->MemoryHighAddr;
-      I2caRegs.I2CDXR = msg->MemoryLowAddr;
-      I2caRegs.I2CMDR.all = 0x2620;			// Send data to setup EEPROM address
-   }
-   else if(msg->MsgStatus == I2C_MSGSTAT_RESTART)
-   {
-      I2caRegs.I2CCNT = msg->NumOfBytes;	// Setup how many bytes to expect
-      I2caRegs.I2CMDR.all = 0x2C20;			// Send restart as master receiver
-   }
-
-   return I2C_SUCCESS;
-}
-
-interrupt void i2c_int1a_isr(void)     // I2C-A
-{
-   Uint16 IntSource, i;
-
-   // Read interrupt source
-   IntSource = I2caRegs.I2CISRC.all;
-
-   // Interrupt source = stop condition detected
-   if(IntSource == I2C_SCD_ISRC)
-   {
-      // If completed message was writing data, reset msg to inactive state
-      if (CurrentMsgPtr->MsgStatus == I2C_MSGSTAT_WRITE_BUSY)
-      {
-         CurrentMsgPtr->MsgStatus = I2C_MSGSTAT_INACTIVE;
-      }
-      else
-      {
-         // If a message receives a NACK during the address setup portion of the
-         // EEPROM read, the code further below included in the register access ready
-         // interrupt source code will generate a stop condition. After the stop
-         // condition is received (here), set the message status to try again.
-         // User may want to limit the number of retries before generating an error.
-         if(CurrentMsgPtr->MsgStatus == I2C_MSGSTAT_SEND_NOSTOP_BUSY)
-         {
-            CurrentMsgPtr->MsgStatus = I2C_MSGSTAT_SEND_NOSTOP;
-         }
-         // If completed message was reading EEPROM data, reset msg to inactive state
-         // and read data from FIFO.
-         else if (CurrentMsgPtr->MsgStatus == I2C_MSGSTAT_READ_BUSY)
-         {
-            CurrentMsgPtr->MsgStatus = I2C_MSGSTAT_INACTIVE;
-            for(i=0; i < I2C_NUMBYTES; i++)
-            {
-              CurrentMsgPtr->MsgBuffer[i] = I2caRegs.I2CDRR;
-            }
-         {
-         // Check recieved data
-         for(i=0; i < I2C_NUMBYTES; i++)
-         {
-            if(I2cMsgIn1.MsgBuffer[i] == I2cMsgOut1.MsgBuffer[i])
-            {
-                PassCount++;
-            }
-            else
-            {
-                FailCount++;
-            }
-         }
-         if(PassCount == I2C_NUMBYTES)
-         {
-            pass();
-         }
-         else
-         {
-            fail();
-         }
-
-
-      }
-
-    }
-      }
-   }  // end of stop condition detected
-
-   // Interrupt source = Register Access Ready
-   // This interrupt is used to determine when the EEPROM address setup portion of the
-   // read data communication is complete. Since no stop bit is commanded, this flag
-   // tells us when the message has been sent instead of the SCD flag. If a NACK is
-   // received, clear the NACK bit and command a stop. Otherwise, move on to the read
-   // data portion of the communication.
-   else if(IntSource == I2C_ARDY_ISRC)
-   {
-      if(I2caRegs.I2CSTR.bit.NACK == 1)
-      {
-         I2caRegs.I2CMDR.bit.STP = 1;
-         I2caRegs.I2CSTR.all = I2C_CLR_NACK_BIT;
-      }
-      else if(CurrentMsgPtr->MsgStatus == I2C_MSGSTAT_SEND_NOSTOP_BUSY)
-      {
-         CurrentMsgPtr->MsgStatus = I2C_MSGSTAT_RESTART;
-      }
-   }  // end of register access ready
-
-   else
-   {
-      // Generate some error due to invalid interrupt source
-      asm("   ESTOP0");
-   }
-
-   // Enable future I2C (PIE Group 8) interrupts
-   PieCtrlRegs.PIEACK.all = PIEACK_GROUP8;
-}
-
-void pass()
-{
-    asm("   ESTOP0");
-    for(;;);
-}
-
-void fail()
-{
-    asm("   ESTOP0");
-    for(;;);
-}
-
-
-//===========================================================================
-// No more.
-//===========================================================================
diff --git a/Source/External/v120/DSP2833x_examples/i2c_eeprom/Example_2833xI2C_eeprom.gel b/Source/External/v120/DSP2833x_examples/i2c_eeprom/Example_2833xI2C_eeprom.gel
deleted file mode 100644
index 3a11875..0000000
--- a/Source/External/v120/DSP2833x_examples/i2c_eeprom/Example_2833xI2C_eeprom.gel
+++ /dev/null
@@ -1,39 +0,0 @@
-/*
-// TI File $Revision: /main/5 $
-// Checkin $Date: August 9, 2007   17:18:05 $
-//###########################################################################
-//
-// This .gel file can be used to help load and build the example project.
-// It should be unloaded from Code Composer Studio before loading another 
-// project. 
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-*/
-
-menuitem "DSP2833x I2C EEPROM Example"
-
-hotmenu Load_and_Build_Project()
-{
-   GEL_ProjectLoad("Example_2833xI2C_eeprom.pjt");
-   GEL_ProjectBuild("Example_2833xI2C_eeprom.pjt");
-   Setup_WatchWindow();
-}
-
-hotmenu Load_Code()
-{
-   GEL_Load(".\\debug\\Example_2833xI2C_eeprom.out");
-   Setup_WatchWindow();
-}
-
-hotmenu Setup_WatchWindow()
-{
-   GEL_WatchReset();
-   GEL_WatchAdd("PassCount",,"Correct Bytes");
-   GEL_WatchAdd("FailCount",,"Incorrect Bytes");
-   GEL_WatchAdd("I2cMsgIn1.MsgBuffer",,"Input Buffer");
-   GEL_WatchAdd("I2cMsgOut1.MsgBuffer",,"Output Buffer");
-   GEL_WatchAdd("I2caRegs,x");
-}
diff --git a/Source/External/v120/DSP2833x_examples/i2c_eeprom/Example_2833xI2C_eeprom.pjt b/Source/External/v120/DSP2833x_examples/i2c_eeprom/Example_2833xI2C_eeprom.pjt
deleted file mode 100644
index 06c13e7..0000000
--- a/Source/External/v120/DSP2833x_examples/i2c_eeprom/Example_2833xI2C_eeprom.pjt
+++ /dev/null
@@ -1,46 +0,0 @@
-; Code Composer Project File, Version 2.0 (do not modify or remove this line)
-
-[Project Settings]
-ProjectName="DSP2833x"
-ProjectDir="C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\i2c_eeprom\"
-ProjectType=Executable
-CPUFamily=TMS320C28XX
-Tool="Compiler"
-Tool="DspBiosBuilder"
-Tool="Linker"
-Config="Debug"
-Config="Release"
-
-[Source Files]
-Source="..\..\DSP2833x_common\source\DSP2833x_ADC_cal.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CodeStartBranch.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CpuTimers.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_DefaultIsr.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_I2C.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieVect.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_SysCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_usDelay.asm"
-Source="..\..\DSP2833x_headers\source\DSP2833x_GlobalVariableDefs.c"
-Source="Example_2833xI2C_eeprom.c"
-Source="..\..\DSP2833x_common\cmd\28335_RAM_lnk.cmd"
-Source="..\..\DSP2833x_headers\cmd\DSP2833x_Headers_nonBIOS.cmd"
-
-["Compiler" Settings: "Debug"]
-Options=-g -q -pdr -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\i2c_eeprom\Debug" -fs"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\i2c_eeprom\Debug" -i"..\..\DSP2833x_headers\include" -i"..\..\DSP2833x_common\include" -d"_DEBUG" -d"LARGE_MODEL" --float_support=fpu32 -ml -mt -v28
-
-["Compiler" Settings: "Release"]
-Options=-q -o3 -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\i2c_eeprom\Release" -d"LARGE_MODEL" -ml -v28
-
-["DspBiosBuilder" Settings: "Debug"]
-Options=-v28
-
-["DspBiosBuilder" Settings: "Release"]
-Options=-v28
-
-["Linker" Settings: "Debug"]
-Options=-q -c -ecode_start -m".\Debug\Example_2833xI2C_eeprom.map" -o".\Debug\Example_2833xI2C_eeprom.out" -stack0x380 -w -x -i"..\..\DSP2833x_headers\include" -l"rts2800_fpu32.lib"
-
-["Linker" Settings: "Release"]
-Options=-q -c -o".\Release\Example_2833xI2C_eeprom.out" -x
-
diff --git a/Source/External/v120/DSP2833x_examples/lpm_haltwake/Example_2833xHaltWake.c b/Source/External/v120/DSP2833x_examples/lpm_haltwake/Example_2833xHaltWake.c
deleted file mode 100644
index dd70f78..0000000
--- a/Source/External/v120/DSP2833x_examples/lpm_haltwake/Example_2833xHaltWake.c
+++ /dev/null
@@ -1,167 +0,0 @@
-// TI File $Revision: /main/13 $
-// Checkin $Date: June 19, 2008   17:08:02 $
-//###########################################################################
-//
-// FILE:    Example_2833xHaltWake.c
-//
-// TITLE:   Device Halt Mode and Wakeup Program.
-//
-// ASSUMPTIONS:
-//
-//    This program requires the DSP2833x header files.
-//
-//    GPIO0 is configured as the LPM wakeup pin to trigger a
-//    WAKEINT interrupt upon detection of a low pulse.
-//    Initially, pull GPIO0 high externally. To wake device
-//    from halt mode, pull GPIO0 low for at least the crystal
-//    startup time + 2 OSCLKS, then pull it high again.
-//
-//    To observe when device wakes from HALT mode, monitor
-//    GPIO1 with an oscilloscope (set to 1 in WAKEINT ISR)
-//
-//    As supplied, this project is configured for "boot to SARAM"
-//    operation.  The 2833x Boot Mode table is shown below.
-//    For information on configuring the boot mode of an eZdsp,
-//    please refer to the documentation included with the eZdsp,
-//
-//       $Boot_Table:
-//
-//         GPIO87   GPIO86     GPIO85   GPIO84
-//          XA15     XA14       XA13     XA12
-//           PU       PU         PU       PU
-//        ==========================================
-//            1        1          1        1    Jump to Flash
-//            1        1          1        0    SCI-A boot
-//            1        1          0        1    SPI-A boot
-//            1        1          0        0    I2C-A boot
-//            1        0          1        1    eCAN-A boot
-//            1        0          1        0    McBSP-A boot
-//            1        0          0        1    Jump to XINTF x16
-//            1        0          0        0    Jump to XINTF x32
-//            0        1          1        1    Jump to OTP
-//            0        1          1        0    Parallel GPIO I/O boot
-//            0        1          0        1    Parallel XINTF boot
-//            0        1          0        0    Jump to SARAM	    <- "boot to SARAM"
-//            0        0          1        1    Branch to check boot mode
-//            0        0          1        0    Boot to flash, bypass ADC cal
-//            0        0          0        1    Boot to SARAM, bypass ADC cal
-//            0        0          0        0    Boot to SCI-A, bypass ADC cal
-//                                              Boot_Table_End$
-//
-// DESCRIPTION:
-//
-//    This example puts the device into HALT mode. If the lowest
-//    possible current consumption in HALT mode is desired, the
-//    JTAG connector must be removed from the device board while
-//    the device is in HALT mode.
-//
-//    The example then wakes up the device from HALT using GPIO0.
-//    GPIO0 wakes the device from HALT mode when a low pulse
-//    (signal goes high->low->high)is detected on the pin.
-//    This pin must be pulsed by an external agent for wakeup.
-//
-//    As soon as GPIO0 goes high again after the pulse, the device
-//    should wake up, and GPIO1 can be observed to toggle.
-//
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File
-
-// Prototype statements for functions found within this file.
-
-interrupt void WAKE_ISR(void);  	// ISR for WAKEINT
-
-void main()
-
-{
-
-   asm("  EALLOW");
-
-// Step 1. Initialize System Control:
-// PLL, WatchDog, enable Peripheral Clocks
-// This example function is found in the DSP2833x_SysCtrl.c file.
-   InitSysCtrl();
-
-// Step 2. Initalize GPIO:
-// This example function is found in the DSP2833x_Gpio.c file and
-// illustrates how to set the GPIO to it's default state.
-// InitGpio();  // Skipped for this example
-//  Enable all pull-ups
-    EALLOW;
-	GpioCtrlRegs.GPAPUD.all = 0;
-	GpioCtrlRegs.GPBPUD.all = 0;
-	GpioCtrlRegs.GPADIR.bit.GPIO1 = 1;	    // GPIO1 set in the ISR to indicate device woken up.
-    GpioIntRegs.GPIOLPMSEL.bit.GPIO0 = 1;	// Choose GPIO0 pin for wakeup
-	EDIS;
-
-/// Step 3. Clear all interrupts and initialize PIE vector table:
-// Disable CPU interrupts
-   DINT;
-
-// Initialize the PIE control registers to their default state.
-// The default state is all PIE interrupts disabled and flags
-// are cleared.
-// This function is found in the DSP2833x_PieCtrl.c file.
-   InitPieCtrl();
-
-// Disable CPU interrupts and clear all CPU interrupt flags:
-   IER = 0x0000;
-   IFR = 0x0000;
-
-// Initialize the PIE vector table with pointers to the shell Interrupt
-// Service Routines (ISR).
-// This will populate the entire table, even if the interrupt
-// is not used in this example.  This is useful for debug purposes.
-// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
-// This function is found in DSP2833x_PieVect.c.
-   InitPieVectTable();
-
-
-// Interrupts that are used in this example are re-mapped to
-// ISR functions found within this file.
-   EALLOW;  // This is needed to write to EALLOW protected registers
-   PieVectTable.WAKEINT = &WAKE_ISR;
-   EDIS;
-
-// Step 4. Initialize all the Device Peripherals:
-// Not applicable for this example.
-
-// Step 5. User specific code, enable interrupts:
-
-// Enable CPU INT1 which is connected to WakeInt:
-   IER |= M_INT1;
-
-// Enable WAKEINT in the PIE: Group 1 interrupt 8
-   PieCtrlRegs.PIEIER1.bit.INTx8 = 1;
-   PieCtrlRegs.PIEACK.bit.ACK1 = 1;
-// Enable global Interrupts:
-   EINT;   // Enable Global interrupt INTM
-
-// Write the LPM code value
-    EALLOW;
-	if (SysCtrlRegs.PLLSTS.bit.MCLKSTS != 1) // Only enter low power mode when PLL is not in limp mode.
-	{
-      SysCtrlRegs.LPMCR0.bit.LPM = 0x0002;   // LPM mode = Halt
-    }
-    EDIS;
-// Force device into HALT
-
-	asm(" IDLE");                           // Device waits in IDLE until falling edge on GPIO0/XNMI pin
-	                                        // wakes device from halt mode.
-	for(;;){}								// Loop here after wake-up.
-
-}
-
-/* ----------------------------------------------- */
-/* ISR for WAKEINT - Will be executed when         */
-/* low pulse triggered on GPIO0 pin                */
-/* ------------------------------------------------*/
-interrupt void WAKE_ISR(void)
-{
-   GpioDataRegs.GPATOGGLE.bit.GPIO1 = 1;	// Toggle GPIO1 in the ISR - monitored with oscilloscope
-   PieCtrlRegs.PIEACK.bit.ACK1 = 1;
-}
diff --git a/Source/External/v120/DSP2833x_examples/lpm_haltwake/Example_2833xHaltWake.gel b/Source/External/v120/DSP2833x_examples/lpm_haltwake/Example_2833xHaltWake.gel
deleted file mode 100644
index 584ec59..0000000
--- a/Source/External/v120/DSP2833x_examples/lpm_haltwake/Example_2833xHaltWake.gel
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
-// TI File $Revision: /main/5 $
-// Checkin $Date: August 9, 2007   17:24:32 $
-//###########################################################################
-//
-// This .gel file can be used to help load and build the example project.
-// It should be unloaded from Code Composer Studio before loading another 
-// project. 
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-*/
-
-menuitem "DSP2833x Low Power Halt Mode Wakeup Example"
-
-hotmenu Load_and_Build_Project()
-{
-   GEL_ProjectLoad("Example_2833xHaltWake.pjt");
-   GEL_ProjectBuild("Example_2833xHaltWake.pjt");
-
-}
-
-hotmenu Load_Code()
-{
-   GEL_Load(".\\debug\\Example_2833xHaltWake.out");
-
-}
diff --git a/Source/External/v120/DSP2833x_examples/lpm_haltwake/Example_2833xHaltWake.pjt b/Source/External/v120/DSP2833x_examples/lpm_haltwake/Example_2833xHaltWake.pjt
deleted file mode 100644
index 266e087..0000000
--- a/Source/External/v120/DSP2833x_examples/lpm_haltwake/Example_2833xHaltWake.pjt
+++ /dev/null
@@ -1,46 +0,0 @@
-; Code Composer Project File, Version 2.0 (do not modify or remove this line)
-
-[Project Settings]
-ProjectName="DSP2833x"
-ProjectDir="C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\lpm_haltwake\"
-ProjectType=Executable
-CPUFamily=TMS320C28XX
-Tool="Compiler"
-Tool="CustomBuilder"
-Tool="DspBiosBuilder"
-Tool="Linker"
-Config="Debug"
-Config="Release"
-
-[Source Files]
-Source="..\..\DSP2833x_common\source\DSP2833x_ADC_cal.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CodeStartBranch.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CpuTimers.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_DefaultIsr.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieVect.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_SysCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_usDelay.asm"
-Source="..\..\DSP2833x_headers\source\DSP2833x_GlobalVariableDefs.c"
-Source="Example_2833xHaltWake.c"
-Source="..\..\DSP2833x_common\cmd\28335_RAM_lnk.cmd"
-Source="..\..\DSP2833x_headers\cmd\DSP2833x_Headers_nonBIOS.cmd"
-
-["Compiler" Settings: "Debug"]
-Options=-g -q -pdr -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\lpm_haltwake\Debug" -fs"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\lpm_haltwake\Debug" -i"..\..\DSP2833x_headers\include" -i"..\..\DSP2833x_common\include" -d"_DEBUG" -d"LARGE_MODEL" --float_support=fpu32 -ml -mt -v28
-
-["Compiler" Settings: "Release"]
-Options=-q -o3 -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\lpm_haltwake\Release" -d"LARGE_MODEL" -ml -v28
-
-["DspBiosBuilder" Settings: "Debug"]
-Options=-v28
-
-["DspBiosBuilder" Settings: "Release"]
-Options=-v28
-
-["Linker" Settings: "Debug"]
-Options=-q -c -ecode_start -m".\Debug\Example_2833xHaltWake.map" -o".\Debug\Example_2833xHaltWake.out" -stack0x200 -w -x -i"..\..\DSP2833x_headers\include" -l"rts2800_fpu32.lib"
-
-["Linker" Settings: "Release"]
-Options=-q -c -o".\Release\Example_2833xHaltWake.out" -x
-
diff --git a/Source/External/v120/DSP2833x_examples/lpm_idlewake/Example_2833xIdleWake.c b/Source/External/v120/DSP2833x_examples/lpm_idlewake/Example_2833xIdleWake.c
deleted file mode 100644
index f9167ce..0000000
--- a/Source/External/v120/DSP2833x_examples/lpm_idlewake/Example_2833xIdleWake.c
+++ /dev/null
@@ -1,175 +0,0 @@
-// TI File $Revision: /main/10 $
-// Checkin $Date: May 12, 2008   14:23:32 $
-//###########################################################################
-//
-// FILE:    Example_2833xIdleWake.c
-//
-// TITLE:   Device Idle Mode and Wakeup Program.
-//
-// ASSUMPTIONS:
-//
-//    This program requires the DSP2833x header files.
-//
-//    GPIO0 is configured as an XINT1 pin to trigger a
-//    XINT1 interrupt upon detection of a falling edge.
-//    Initially, pull GPIO0 high externally. To wake device
-//    from idle mode by triggering an XINT1 interrupt,
-//    pull GPIO0 low (falling edge)
-//
-//    To observe when device wakes from IDLE mode, monitor
-//    GPIO1 with an oscilloscope (set to 1 in XINT1 ISR)
-//
-//    As supplied, this project is configured for "boot to SARAM"
-//    operation.  The 2833x Boot Mode table is shown below.
-//    For information on configuring the boot mode of an eZdsp,
-//    please refer to the documentation included with the eZdsp,
-//
-//       $Boot_Table:
-//
-//         GPIO87   GPIO86     GPIO85   GPIO84
-//          XA15     XA14       XA13     XA12
-//           PU       PU         PU       PU
-//        ==========================================
-//            1        1          1        1    Jump to Flash
-//            1        1          1        0    SCI-A boot
-//            1        1          0        1    SPI-A boot
-//            1        1          0        0    I2C-A boot
-//            1        0          1        1    eCAN-A boot
-//            1        0          1        0    McBSP-A boot
-//            1        0          0        1    Jump to XINTF x16
-//            1        0          0        0    Jump to XINTF x32
-//            0        1          1        1    Jump to OTP
-//            0        1          1        0    Parallel GPIO I/O boot
-//            0        1          0        1    Parallel XINTF boot
-//            0        1          0        0    Jump to SARAM	    <- "boot to SARAM"
-//            0        0          1        1    Branch to check boot mode
-//            0        0          1        0    Boot to flash, bypass ADC cal
-//            0        0          0        1    Boot to SARAM, bypass ADC cal
-//            0        0          0        0    Boot to SCI-A, bypass ADC cal
-//                                              Boot_Table_End$
-//
-// DESCRIPTION:
-//
-//    This example puts the device into IDLE mode.
-//
-//    The example then wakes up the device from IDLE using XINT1
-//    which triggers on a falling edge from GPIO0.
-//    This pin must be pulled from high to low by an external agent for
-//    wakeup.
-//
-//    To observe the device wakeup from IDLE mode, monitor GPIO1 with
-//    an oscilloscope, which goes high in the XINT_1_ISR.
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File
-
-// Prototype statements for functions found within this file.
-interrupt void XINT_1_ISR(void);  	// ISR
-
-void main()
-
-{
-// Step 1. Initialize System Control:
-// PLL, WatchDog, enable Peripheral Clocks
-// This example function is found in the DSP2833x_SysCtrl.c file.
-   InitSysCtrl();
-
-// Step 2. Initalize GPIO:
-// This example function is found in the DSP2833x_Gpio.c file and
-// illustrates how to set the GPIO to it's default state.
-// InitGpio();  // Skipped for this example
-
-    EALLOW;
-	GpioCtrlRegs.GPAPUD.all = 0;                    // Enable all Pull-ups
-	GpioCtrlRegs.GPBPUD.all = 0;
-	GpioIntRegs.GPIOXINT1SEL.bit.GPIOSEL = 0;		// Choose GPIO0 as the XINT1 pin.
-	GpioCtrlRegs.GPADIR.all = 0xFFFFFFFE;	        // All pins are outputs except 0
-	GpioDataRegs.GPADAT.all = 0x00000000;	        // All I/O pins are driven low
-    EDIS;
-
-    XIntruptRegs.XINT1CR.bit.ENABLE = 1; 	        // Enable XINT1 pin
-	XIntruptRegs.XINT1CR.bit.POLARITY = 0;	        // Interrupt triggers on falling edge
-
-// Step 3. Clear all interrupts and initialize PIE vector table:
-// Disable CPU interrupts
-   DINT;
-
-// Initialize the PIE control registers to their default state.
-// The default state is all PIE interrupts disabled and flags
-// are cleared.
-// This function is found in the DSP2833x_PieCtrl.c file.
-   InitPieCtrl();
-
-// Disable CPU interrupts and clear all CPU interrupt flags:
-   IER = 0x0000;
-   IFR = 0x0000;
-
-// Initialize the PIE vector table with pointers to the shell Interrupt
-// Service Routines (ISR).
-// This will populate the entire table, even if the interrupt
-// is not used in this example.  This is useful for debug purposes.
-// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
-// This function is found in DSP2833x_PieVect.c.
-   InitPieVectTable();
-
-// Interrupts that are used in this example are re-mapped to
-// ISR functions found within this file.
-   EALLOW;  // This is needed to write to EALLOW protected registers
-   PieVectTable.XINT1 = &XINT_1_ISR;
-   EDIS;
-
-// Step 4. Initialize all the Device Peripherals:
-// Not applicable for this example.
-
-// Step 5. User specific code, enable interrupts:
-
-// Enable CPU INT1 which is connected to WakeInt:
-   IER |= M_INT1;
-
-// Enable XINT1 in the PIE: Group 1 interrupt 4
-   PieCtrlRegs.PIEIER1.bit.INTx4 = 1;
-   PieCtrlRegs.PIEACK.bit.ACK1 = 1;
-
-// Enable global Interrupts:
-   EINT;   // Enable Global interrupt INTM
-
-// Write the LPM code value
-  EALLOW;
-  if (SysCtrlRegs.PLLSTS.bit.MCLKSTS != 1) // Only enter Idle mode when PLL is not in limp mode.
-  {
-     SysCtrlRegs.LPMCR0.bit.LPM = 0x0000;  // LPM mode = Idle
-  }
-  EDIS;
-  asm(" IDLE");                            // Device waits in IDLE until XINT1 interrupts
-  for(;;){}
-}
-
-
-interrupt void XINT_1_ISR(void)
-{
-   GpioDataRegs.GPASET.bit.GPIO1 = 1;	// GPIO1 is driven high upon exiting IDLE.
-   PieCtrlRegs.PIEACK.bit.ACK1 = 1;
-   EINT;
-   return;
-}
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
diff --git a/Source/External/v120/DSP2833x_examples/lpm_idlewake/Example_2833xIdleWake.gel b/Source/External/v120/DSP2833x_examples/lpm_idlewake/Example_2833xIdleWake.gel
deleted file mode 100644
index 97129a8..0000000
--- a/Source/External/v120/DSP2833x_examples/lpm_idlewake/Example_2833xIdleWake.gel
+++ /dev/null
@@ -1,28 +0,0 @@
-/*
-// TI File $Revision: /main/5 $
-// Checkin $Date: August 9, 2007   17:24:43 $
-//###########################################################################
-//
-// This .gel file can be used to help load and build the example project.
-// It should be unloaded from Code Composer Studio before loading another 
-// project. 
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-*/
-
-menuitem "DSP2833x Low Power Idle Mode Wakeup Example"
-
-hotmenu Load_and_Build_Project()
-{
-   GEL_ProjectLoad("Example_2833xIdleWake.pjt");
-   GEL_ProjectBuild("Example_2833xIdleWake.pjt");
-}
-
-hotmenu Load_Code()
-{
-   GEL_Load(".\\debug\\Example_2833xIdleWake.out");
-
-}
diff --git a/Source/External/v120/DSP2833x_examples/lpm_idlewake/Example_2833xIdleWake.pjt b/Source/External/v120/DSP2833x_examples/lpm_idlewake/Example_2833xIdleWake.pjt
deleted file mode 100644
index 88e5a28..0000000
--- a/Source/External/v120/DSP2833x_examples/lpm_idlewake/Example_2833xIdleWake.pjt
+++ /dev/null
@@ -1,46 +0,0 @@
-; Code Composer Project File, Version 2.0 (do not modify or remove this line)
-
-[Project Settings]
-ProjectName="DSP2833x"
-ProjectDir="C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\lpm_idlewake\"
-ProjectType=Executable
-CPUFamily=TMS320C28XX
-Tool="Compiler"
-Tool="CustomBuilder"
-Tool="DspBiosBuilder"
-Tool="Linker"
-Config="Debug"
-Config="Release"
-
-[Source Files]
-Source="..\..\DSP2833x_common\source\DSP2833x_ADC_cal.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CodeStartBranch.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CpuTimers.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_DefaultIsr.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieVect.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_SysCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_usDelay.asm"
-Source="..\..\DSP2833x_headers\source\DSP2833x_GlobalVariableDefs.c"
-Source="Example_2833xIdleWake.c"
-Source="..\..\DSP2833x_common\cmd\28335_RAM_lnk.cmd"
-Source="..\..\DSP2833x_headers\cmd\DSP2833x_Headers_nonBIOS.cmd"
-
-["Compiler" Settings: "Debug"]
-Options=-g -q -pdr -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\lpm_idlewake\Debug" -fs"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\lpm_idlewake\Debug" -i"..\..\DSP2833x_headers\include" -i"..\..\DSP2833x_common\include" -d"_DEBUG" -d"LARGE_MODEL" --float_support=fpu32 -ml -mt -v28
-
-["Compiler" Settings: "Release"]
-Options=-q -o3 -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\lpm_idlewake\Release" -d"LARGE_MODEL" -ml -v28
-
-["DspBiosBuilder" Settings: "Debug"]
-Options=-v28
-
-["DspBiosBuilder" Settings: "Release"]
-Options=-v28
-
-["Linker" Settings: "Debug"]
-Options=-q -c -ecode_start -m".\Debug\Example_2833xIdleWake.map" -o".\Debug\Example_2833xIdleWake.out" -stack0x200 -w -x -i"..\..\DSP2833x_headers\include" -l"rts2800_fpu32.lib"
-
-["Linker" Settings: "Release"]
-Options=-q -c -o".\Release\Example_2833xIdleWake.out" -x
-
diff --git a/Source/External/v120/DSP2833x_examples/lpm_standbywake/Example_2833xStandbyWake.c b/Source/External/v120/DSP2833x_examples/lpm_standbywake/Example_2833xStandbyWake.c
deleted file mode 100644
index 2a30112..0000000
--- a/Source/External/v120/DSP2833x_examples/lpm_standbywake/Example_2833xStandbyWake.c
+++ /dev/null
@@ -1,169 +0,0 @@
-// TI File $Revision: /main/11 $
-// Checkin $Date: June 19, 2008   17:08:04 $
-//###########################################################################
-//
-// FILE:    Example_2833xStandbyWake.c
-//
-// TITLE:   Device Standby Mode and Wakeup Program.
-//
-// ASSUMPTIONS:
-//
-//    This program requires the DSP2833x header files.
-//
-//    GPIO0 is configured as the LPM wakeup pin to trigger a
-//    WAKEINT interrupt upon detection of a low pulse.
-//    Initially, pull GPIO0 high externally. To wake device
-//    from standby mode, pull GPIO0 low for at least (2+QUALSTDBY)
-//    OSCLKS, then pull it high again.
-//
-//    To observe when device wakes from STANDBY mode, monitor
-//    GPIO1 with an oscilloscope (set to 1 in WAKEINT ISR)
-//
-//    As supplied, this project is configured for "boot to SARAM"
-//    operation.  The 2833x Boot Mode table is shown below.
-//    For information on configuring the boot mode of an eZdsp,
-//    please refer to the documentation included with the eZdsp,
-//
-//       $Boot_Table:
-//
-//         GPIO87   GPIO86     GPIO85   GPIO84
-//          XA15     XA14       XA13     XA12
-//           PU       PU         PU       PU
-//        ==========================================
-//            1        1          1        1    Jump to Flash
-//            1        1          1        0    SCI-A boot
-//            1        1          0        1    SPI-A boot
-//            1        1          0        0    I2C-A boot
-//            1        0          1        1    eCAN-A boot
-//            1        0          1        0    McBSP-A boot
-//            1        0          0        1    Jump to XINTF x16
-//            1        0          0        0    Jump to XINTF x32
-//            0        1          1        1    Jump to OTP
-//            0        1          1        0    Parallel GPIO I/O boot
-//            0        1          0        1    Parallel XINTF boot
-//            0        1          0        0    Jump to SARAM	    <- "boot to SARAM"
-//            0        0          1        1    Branch to check boot mode
-//            0        0          1        0    Boot to flash, bypass ADC cal
-//            0        0          0        1    Boot to SARAM, bypass ADC cal
-//            0        0          0        0    Boot to SCI-A, bypass ADC cal
-//                                              Boot_Table_End$
-//
-// DESCRIPTION:
-//
-//    This example puts the device into STANDBY mode. If the lowest
-//    possible current consumption in STANDBY mode is desired, the
-//    JTAG connector must be removed from the device board while
-//    the device is in STANDBY mode.
-//
-//    The example then wakes up the device from STANDBY using GPIO0.
-//    GPIO0 wakes the device from STANDBY mode when a low pulse
-//    (signal goes high->low->high)is detected on the pin.
-//    This pin must be pulsed by an external agent for wakeup.
-//
-//    As soon as GPIO0 goes high again after the pulse, the device
-//    should wake up, and GPIO1 can be observed to toggle.
-//
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File
-
-// Prototype statements for functions found within this file.
-
-interrupt void WAKE_ISR(void);  	// ISR for WAKEINT
-
-void main()
-
-{
-
-// Step 1. Initialize System Control:
-// PLL, WatchDog, enable Peripheral Clocks
-// This example function is found in the DSP2833x_SysCtrl.c file.
-   InitSysCtrl();
-
-// Step 2. Initalize GPIO:
-// This example function is found in the DSP2833x_Gpio.c file and
-// illustrates how to set the GPIO to it's default state.
-// InitGpio();  // Skipped for this example
-
-    EALLOW;
-	GpioCtrlRegs.GPAPUD.all = 0;            // Enable all Pull-ups
-	GpioCtrlRegs.GPBPUD.all = 0;
-	GpioCtrlRegs.GPADIR.bit.GPIO1 = 1;	    // GPIO1 set in the ISR to indicate device woken up.
-    GpioIntRegs.GPIOLPMSEL.bit.GPIO0 = 1;	// Choose GPIO0 pin for wakeup
-	EDIS;
-
-// Step 3. Clear all interrupts and initialize PIE vector table:
-// Disable CPU interrupts
-   DINT;
-
-// Initialize the PIE control registers to their default state.
-// The default state is all PIE interrupts disabled and flags
-// are cleared.
-// This function is found in the DSP2833x_PieCtrl.c file.
-   InitPieCtrl();
-
-// Disable CPU interrupts and clear all CPU interrupt flags:
-   IER = 0x0000;
-   IFR = 0x0000;
-
-// Initialize the PIE vector table with pointers to the shell Interrupt
-// Service Routines (ISR).
-// This will populate the entire table, even if the interrupt
-// is not used in this example.  This is useful for debug purposes.
-// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
-// This function is found in DSP2833x_PieVect.c.
-   InitPieVectTable();
-
-
-// Interrupts that are used in this example are re-mapped to
-// ISR functions found within this file.
-   EALLOW;  // This is needed to write to EALLOW protected registers
-   PieVectTable.WAKEINT = &WAKE_ISR;
-   EDIS;
-
-// Step 4. Initialize all the Device Peripherals:
-// Not applicable for this example.
-
-// Step 5. User specific code, enable interrupts:
-
-// Enable CPU INT1 which is connected to WakeInt:
-   IER |= M_INT1;
-
-// Enable WAKEINT in the PIE: Group 1 interrupt 8
-   PieCtrlRegs.PIEIER1.bit.INTx8 = 1;
-   PieCtrlRegs.PIEACK.bit.ACK1 = 1;
-// Enable global Interrupts:
-   EINT;   // Enable Global interrupt INTM
-
-// Choose qualification cycles in LPMCR0 register
-	SysCtrlRegs.LPMCR0.bit.QUALSTDBY = 0;	// The wakeup signal should be (2+QUALSTDBY) OSCCLKs wide.
-
-// Write the LPM code value
-    EALLOW;
-	if (SysCtrlRegs.PLLSTS.bit.MCLKSTS != 1) // Only enter Standby mode when PLL is not in limp mode.
-	{
-      SysCtrlRegs.LPMCR0.bit.LPM = 0x0001;   // LPM mode = Standby
-    }
-    EDIS;
-// Force device into STANDBY
-
-	asm(" IDLE");                           // Device waits in IDLE until falling edge on GPIO0/XNMI pin
-	                                        // wakes device from Standby mode.
-	for(;;){}								// Loop here after wake-up.
-
-}
-
-/* ----------------------------------------------- */
-/* ISR for WAKEINT - Will be executed when         */
-/* low pulse triggered on GPIO0 pin                */
-/* ------------------------------------------------*/
-interrupt void WAKE_ISR(void)
-{
-   GpioDataRegs.GPATOGGLE.bit.GPIO1 = 1;	// Toggle GPIO1 in the ISR - monitored with oscilloscope
-   PieCtrlRegs.PIEACK.bit.ACK1 = 1;
-
-}
diff --git a/Source/External/v120/DSP2833x_examples/lpm_standbywake/Example_2833xStandbyWake.gel b/Source/External/v120/DSP2833x_examples/lpm_standbywake/Example_2833xStandbyWake.gel
deleted file mode 100644
index cfec4cc..0000000
--- a/Source/External/v120/DSP2833x_examples/lpm_standbywake/Example_2833xStandbyWake.gel
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
-// TI File $Revision: /main/5 $
-// Checkin $Date: August 9, 2007   17:24:54 $
-//###########################################################################
-//
-// This .gel file can be used to help load and build the example project.
-// It should be unloaded from Code Composer Studio before loading another 
-// project. 
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-*/
-
-menuitem "DSP2833x Low Power Standby Mode Wakeup Example"
-
-hotmenu Load_and_Build_Project()
-{
-   GEL_ProjectLoad("Example_2833xStandbyWake.pjt");
-   GEL_ProjectBuild("Example_2833xStandbyWake.pjt");
-
-}
-
-hotmenu Load_Code()
-{
-   GEL_Load(".\\debug\\Example_2833xStandbyWake.out");
-
-}
diff --git a/Source/External/v120/DSP2833x_examples/lpm_standbywake/Example_2833xStandbyWake.pjt b/Source/External/v120/DSP2833x_examples/lpm_standbywake/Example_2833xStandbyWake.pjt
deleted file mode 100644
index 7ed3469..0000000
--- a/Source/External/v120/DSP2833x_examples/lpm_standbywake/Example_2833xStandbyWake.pjt
+++ /dev/null
@@ -1,45 +0,0 @@
-; Code Composer Project File, Version 2.0 (do not modify or remove this line)
-
-[Project Settings]
-ProjectName="DSP2833x"
-ProjectDir="C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\lpm_standbywake\"
-ProjectType=Executable
-CPUFamily=TMS320C28XX
-Tool="Compiler"
-Tool="DspBiosBuilder"
-Tool="Linker"
-Config="Debug"
-Config="Release"
-
-[Source Files]
-Source="..\..\DSP2833x_common\source\DSP2833x_ADC_cal.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CodeStartBranch.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CpuTimers.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_DefaultIsr.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieVect.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_SysCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_usDelay.asm"
-Source="..\..\DSP2833x_headers\source\DSP2833x_GlobalVariableDefs.c"
-Source="Example_2833xStandbyWake.c"
-Source="..\..\DSP2833x_common\cmd\28335_RAM_lnk.cmd"
-Source="..\..\DSP2833x_headers\cmd\DSP2833x_Headers_nonBIOS.cmd"
-
-["Compiler" Settings: "Debug"]
-Options=-g -q -pdr -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\lpm_standbywake\Debug" -fs"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\lpm_standbywake\Debug" -i"..\..\DSP2833x_headers\include" -i"..\..\DSP2833x_common\include" -d"_DEBUG" -d"LARGE_MODEL" --float_support=fpu32 -ml -mt -v28
-
-["Compiler" Settings: "Release"]
-Options=-q -o3 -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\lpm_standbywake\Release" -d"LARGE_MODEL" -ml -v28
-
-["DspBiosBuilder" Settings: "Debug"]
-Options=-v28
-
-["DspBiosBuilder" Settings: "Release"]
-Options=-v28
-
-["Linker" Settings: "Debug"]
-Options=-q -c -ecode_start -m".\Debug\Example_2833xStandbyWake.map" -o".\Debug\Example_2833xStandbyWake.out" -stack0x200 -w -x -i"..\..\DSP2833x_headers\include" -l"rts2800_fpu32.lib"
-
-["Linker" Settings: "Release"]
-Options=-q -c -o".\Release\Example_2833xStandbyWake.out" -x
-
diff --git a/Source/External/v120/DSP2833x_examples/mcbsp_loopback/Example_2833xMcBSP_DLB.c b/Source/External/v120/DSP2833x_examples/mcbsp_loopback/Example_2833xMcBSP_DLB.c
deleted file mode 100644
index 84f748e..0000000
--- a/Source/External/v120/DSP2833x_examples/mcbsp_loopback/Example_2833xMcBSP_DLB.c
+++ /dev/null
@@ -1,244 +0,0 @@
-//###########################################################################
-//
-// FILE:	Example_2833xMCBSP_FFDLB.c
-//
-// TITLE:	DSP2833x Device McBSP Digital Loop Back program.
-//
-// ASSUMPTIONS:
-//
-//    This program requires the DSP2833x header files.
-//    As supplied, this project is configured for "boot to SARAM"
-//    operation.  The 2833x Boot Mode table is shown below.
-//    For information on configuring the boot mode of an eZdsp,
-//    please refer to the documentation included with the eZdsp,
-//
-//       $Boot_Table:
-//
-//         GPIO87   GPIO86     GPIO85   GPIO84
-//          XA15     XA14       XA13     XA12
-//           PU       PU         PU       PU
-//        ==========================================
-//            1        1          1        1    Jump to Flash
-//            1        1          1        0    SCI-A boot
-//            1        1          0        1    SPI-A boot
-//            1        1          0        0    I2C-A boot
-//            1        0          1        1    eCAN-A boot
-//            1        0          1        0    McBSP-A boot
-//            1        0          0        1    Jump to XINTF x16
-//            1        0          0        0    Jump to XINTF x32
-//            0        1          1        1    Jump to OTP
-//            0        1          1        0    Parallel GPIO I/O boot
-//            0        1          0        1    Parallel XINTF boot
-//            0        1          0        0    Jump to SARAM	    <- "boot to SARAM"
-//            0        0          1        1    Branch to check boot mode
-//            0        0          1        0    Boot to flash, bypass ADC cal
-//            0        0          0        1    Boot to SARAM, bypass ADC cal
-//            0        0          0        0    Boot to SCI-A, bypass ADC cal
-//                                              Boot_Table_End$
-//
-// DESCRIPTION:
-//
-//          Digital loopback tests for the McBSP peripheral.
-//
-//          Three different serial word sizes can be tested.
-//
-//          Before compiling this project:
-//          * Select the serial word size (8/16/32) by using
-//            the #define statements at the beginning of the code.
-//
-
-//
-//          This example does not use interrupts.  Instead, a polling
-//          method is used to check the receive data.  The incoming
-//          data is checked for accuracy.  If an error is found the error()
-//          function is called and execution stops.
-//
-//          This program will execute until terminated by the user.
-//
-//    Watch Variables:
-//          sdata1
-//          sdata2
-//          rdata1
-//          rdata2
-//          rdata1_point
-//          rdata2_point
-//
-//###########################################################################
-//
-// Original Author: S.S.
-//
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-
-#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File
-
-// Choose a word size.  Uncomment one of the following lines
-#define WORD_SIZE    8    // Run a loopback test in 8-bit mode
-//#define WORD_SIZE 16      // Run a loopback test in 16-bit mode
-//#define WORD_SIZE 32        // Run a loopback test in 32-bit mode
-
-
-// Prototype statements for functions found within this file.
-void mcbsp_xmit(int a, int b);
-void error(void);
-
-// Global data for this example
-Uint16 sdata1 = 0x000;    // Sent Data
-Uint16 rdata1 = 0x000;    // Recieved Data
-
-Uint16 sdata2 = 0x000;    // Sent Data
-Uint16 rdata2 = 0x000;    // Recieved Data
-
-Uint16 rdata1_point;
-Uint16 rdata2_point;
-
-
-void main(void)
-{
-   Uint16 datasize;
-
-// Step 1. Initialize System Control:
-// PLL, WatchDog, enable Peripheral Clocks
-// This example function is found in the DSP2833x_SysCtrl.c file.
-   InitSysCtrl();
-
-// Step 2. Initalize GPIO:
-// This example function is found in the DSP2833x_Gpio.c file and
-// illustrates how to set the GPIO to it's default state.
-// InitGpio();  // Skipped for this example
-// For this example, only enable the GPIO for McBSP-A
-   InitMcbspaGpio();
-
-// Step 3. Clear all interrupts and initialize PIE vector table:
-// Disable CPU interrupts
-   DINT;
-
-// Initialize PIE control registers to their default state.
-// The default state is all PIE interrupts disabled and flags
-// are cleared.
-// This function is found in the DSP2833x_PieCtrl.c file.
-   InitPieCtrl();
-
-// Disable CPU interrupts and clear all CPU interrupt flags:
-   IER = 0x0000;
-   IFR = 0x0000;
-
-// Initialize the PIE vector table with pointers to the shell Interrupt
-// Service Routines (ISR).
-// This will populate the entire table, even if the interrupt
-// is not used in this example.  This is useful for debug purposes.
-// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
-// This function is found in DSP2833x_PieVect.c.
-   InitPieVectTable();
-
-// Step 4. Initialize all the Device Peripherals:
-// This function is found in DSP2833x_InitPeripherals.c
-// InitPeripherals();     // Not required for this example
-
-   datasize = WORD_SIZE;
-   InitMcbspa();          // Initalize the Mcbsp-A in loopback test mode
-
-// Step 5. User specific code, enable interrupts:
-
-      if(datasize == 8)             // Run a loopback test in 8-bit mode
-      {
-          InitMcbspa8bit();
-          sdata2 = 0x0000;           // value is a don't care for 8-bit mode
-          sdata1 = 0x0000;           // 8-bit value to send
-		  rdata2_point = 0x0000;     // value is a don't care for 8-bit mode
-          rdata1_point = sdata1;
-          for(;;)
-          {
-              mcbsp_xmit(sdata1,sdata2);
-              sdata1++;
-              sdata1 = sdata1 & 0x00FF;                     // Keep it to 8-bits
-
-              while(McbspaRegs.SPCR1.bit.RRDY == 0 ) { }    // Check for receive
-              rdata1 = McbspaRegs.DRR1.all;                 // read DRR1
-              if(rdata1 != rdata1_point) error();
-              rdata1_point++;
-              rdata1_point = rdata1_point & 0x00FF;         // Keep it to 8-bits
-
-               asm("    nop");                                   // Good place for a breakpoint
-                                                                 // Check: rdatax_point = sdatax
-                                                                 //        rdata1 = sdata1 - 1
-          }
-       }
-
-
-      else if(datasize == 16)            // Run a loopback test in 16-bit mode
-      {
-          InitMcbspa16bit();
-          sdata2 = 0x0000;           // value is a don't care for 16-bit mode
-          sdata1 = 0x0000;           // 16-bit value to send
-		  rdata2_point = 0x0000;     // value is a don't care for 16-bit mode
-          rdata1_point = sdata1;
-          for(;;)
-          {
-              mcbsp_xmit(sdata1,sdata2);
-              sdata1++;
-
-              while(McbspaRegs.SPCR1.bit.RRDY == 0 ) { }     // Check for receive
-              rdata1 = McbspaRegs.DRR1.all;                  // read DRR1
-              if(rdata1 != rdata1_point) error();
-              rdata1_point++;
-
-               asm("    nop");                                   // Good place for a breakpoint
-                                                                 // Check: rdatax_point = sdatax
-                                                                 //        rdata1 = sdata1 - 1
-          }
-       }
-
-
-      else if(datasize == 32)            // Run a loopback test in 16-bit mode
-      {
-          InitMcbspa32bit();
-          sdata1 = 0x0000;
-          sdata2 = 0xFFFF;
-          rdata1_point = sdata1;
-          rdata2_point = sdata2;
-          for(;;)
-          {
-              mcbsp_xmit(sdata1,sdata2);
-              sdata1++;
-              sdata2--;
-
-              while(McbspaRegs.SPCR1.bit.RRDY == 0 ) { }  // Check for receive
-              rdata2 = McbspaRegs.DRR2.all;
-              rdata1 = McbspaRegs.DRR1.all;
-              if(rdata1 != rdata1_point) error();
-              if(rdata2 != rdata2_point) error();
-              rdata1_point++;
-              rdata2_point--;
-
-              asm("    nop");                             // Good place for a breakpoint
-                                                          // Check: rdatax_point = sdatax
-                                                          //        rdata1 = sdata1 - 1
-														  //        rdata2 = sdata2 + 1
-           }
-       }
-}
-
-
-
-// Some Useful local functions
-
-void error(void)
-{
-    asm("     ESTOP0");  // test failed!! Stop!
-    for (;;);
-}
-
-void mcbsp_xmit(int a, int b)
-{
-    McbspaRegs.DXR2.all=b;
-    McbspaRegs.DXR1.all=a;
-}
-
-//===========================================================================
-// No more.
-//===========================================================================
-
-
diff --git a/Source/External/v120/DSP2833x_examples/mcbsp_loopback/Example_2833xMcBSP_DLB.gel b/Source/External/v120/DSP2833x_examples/mcbsp_loopback/Example_2833xMcBSP_DLB.gel
deleted file mode 100644
index 52976d1..0000000
--- a/Source/External/v120/DSP2833x_examples/mcbsp_loopback/Example_2833xMcBSP_DLB.gel
+++ /dev/null
@@ -1,27 +0,0 @@
-menuitem "DSP2833x McBSP loopback"
-
-hotmenu Load_and_Build_Project()
-{
-   GEL_ProjectLoad("Example_2833xMcBSP_DLB.pjt");
-   GEL_ProjectBuild("Example_2833xMcBSP_DLB.pjt");
-   Setup_WatchWindow();
-}
-
-
-hotmenu Load_Code()
-{
-   GEL_Load(".\\debug\\Example_2833xMcBSP_DLB.out");
-   Setup_WatchWindow();
-}
-
-Setup_WatchWindow()
-{
-   GEL_WatchReset();
-   GEL_WatchAdd("sdata1,x");
-   GEL_WatchAdd("rdata1,x");
-   GEL_WatchAdd("sdata2,x");
-   GEL_WatchAdd("rdata2,x");
-}
-
-
-
diff --git a/Source/External/v120/DSP2833x_examples/mcbsp_loopback/Example_2833xMcBSP_DLB.pjt b/Source/External/v120/DSP2833x_examples/mcbsp_loopback/Example_2833xMcBSP_DLB.pjt
deleted file mode 100644
index aa6cf7a..0000000
--- a/Source/External/v120/DSP2833x_examples/mcbsp_loopback/Example_2833xMcBSP_DLB.pjt
+++ /dev/null
@@ -1,45 +0,0 @@
-; Code Composer Project File, Version 2.0 (do not modify or remove this line)
-
-[Project Settings]
-ProjectName="DSP2833x"
-ProjectDir="C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\mcbsp_loopback\"
-ProjectType=Executable
-CPUFamily=TMS320C28XX
-Tool="Compiler"
-Tool="DspBiosBuilder"
-Tool="Linker"
-Config="Debug"
-Config="Release"
-
-[Source Files]
-Source="..\..\DSP2833x_common\source\DSP2833x_ADC_cal.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CodeStartBranch.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_DefaultIsr.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_McBSP.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieVect.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_SysCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_usDelay.asm"
-Source="..\..\DSP2833x_headers\source\DSP2833x_GlobalVariableDefs.c"
-Source="Example_2833xMcBSP_DLB.c"
-Source="..\..\DSP2833x_common\cmd\28335_RAM_lnk.cmd"
-Source="..\..\DSP2833x_headers\cmd\DSP2833x_Headers_nonBIOS.cmd"
-
-["Compiler" Settings: "Debug"]
-Options=-g -q -pdr -as -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\mcbsp_loopback\Debug" -fs"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\mcbsp_loopback\Debug" -i"..\..\DSP2833x_headers\include" -i"..\..\DSP2833x_common\include" -d"_DEBUG" -d"LARGE_MODEL" --float_support=fpu32 -ml -mt -v28
-
-["Compiler" Settings: "Release"]
-Options=-q -o3 -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\mcbsp_loopback\Release" -d"LARGE_MODEL" -ml -v28
-
-["DspBiosBuilder" Settings: "Debug"]
-Options=-v28
-
-["DspBiosBuilder" Settings: "Release"]
-Options=-v28
-
-["Linker" Settings: "Debug"]
-Options=-q -c -m".\Debug\Example_2833xMcBSP_DLB.map" -o".\Debug\Example_2833xMcBSP_DLB.out" -stack0x380 -w -x -i"..\..\DSP2833x_headers\include" -l"rts2800_fpu32.lib"
-
-["Linker" Settings: "Release"]
-Options=-q -c -o".\Release\Example_2833xMcBSP_DLB.out" -x
-
diff --git a/Source/External/v120/DSP2833x_examples/mcbsp_loopback_dma/Example_2833xMcBSP_DLB_DMA.c b/Source/External/v120/DSP2833x_examples/mcbsp_loopback_dma/Example_2833xMcBSP_DLB_DMA.c
deleted file mode 100644
index 345e7d6..0000000
--- a/Source/External/v120/DSP2833x_examples/mcbsp_loopback_dma/Example_2833xMcBSP_DLB_DMA.c
+++ /dev/null
@@ -1,403 +0,0 @@
-//###########################################################################
-//
-// FILE:   Example_2833xMCBSP_DLB_DMA.c
-//
-// TITLE:  DSP2833x Device McBSP Digital Loop Back  with DMA program
-//
-// ASSUMPTIONS:
-//
-//    This program requires the DSP2833x header files.
-//    As supplied, this project is configured for "boot to SARAM"
-//    operation.  The 2833x Boot Mode table is shown below.
-//    For information on configuring the boot mode of an eZdsp,
-//    please refer to the documentation included with the eZdsp,
-//
-//       $Boot_Table:
-//
-//         GPIO87   GPIO86     GPIO85   GPIO84
-//          XA15     XA14       XA13     XA12
-//           PU       PU         PU       PU
-//        ==========================================
-//            1        1          1        1    Jump to Flash
-//            1        1          1        0    SCI-A boot
-//            1        1          0        1    SPI-A boot
-//            1        1          0        0    I2C-A boot
-//            1        0          1        1    eCAN-A boot
-//            1        0          1        0    McBSP-A boot
-//            1        0          0        1    Jump to XINTF x16
-//            1        0          0        0    Jump to XINTF x32
-//            0        1          1        1    Jump to OTP
-//            0        1          1        0    Parallel GPIO I/O boot
-//            0        1          0        1    Parallel XINTF boot
-//            0        1          0        0    Jump to SARAM	    <- "boot to SARAM"
-//            0        0          1        1    Branch to check boot mode
-//            0        0          1        0    Boot to flash, bypass ADC cal
-//            0        0          0        1    Boot to SARAM, bypass ADC cal
-//            0        0          0        0    Boot to SCI-A, bypass ADC cal
-//                                              Boot_Table_End$
-//
-// DESCRIPTION:
-//
-// This program is a McBSP example that uses the internal loopback of
-// the peripheral and utilizes the DMA to transfer data from one buffer
-// to the McBSP, and then from the McBSP to another buffer.
-//
-// Initially, sdata[] is filled with values from 0x0000- 0x007F.  The DMA
-// moves the values in sdata[] one by one to the DXRx registers of the McBSP.
-// These values are transmitted and subsequently received by the McBSP.
-// Then, the DMA moves each data value to rdata[] as it is received by the McBSP.
-//
-// Three different serial word sizes can be tested.
-//
-//          Before compiling this project:
-//          * Select the serial word size (8/16/32) by using
-//            the #define statements at the beginning of the code.
-//
-// The program loops forever after all values have been transferred to sdata.
-// It is up to the user to stop the program.
-//
-//
-// By default for the McBSP examples, the McBSP sample rate generator (SRG) input
-// clock frequency is LSPCLK (150E6/4 or 100E6/4) assuming SYSCLKOUT = 150 MHz or
-// 100 MHz respectively.  If while testing, the SRG input frequency
-// is changed, the #define MCBSP_SRG_FREQ  (150E6/4 or 100E6/4) in the Mcbsp.c file must
-// also be updated accordingly.  This define is used to determine the Mcbsp initialization
-// delay after the SRG is enabled, which must be at least 2 SRG clock cycles.
-//
-//   Watch Variables:
-//                sdata
-//                rdata
-//
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-
-#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File
-
-// Choose a word size.  Uncomment one of the following lines
-#define WORD_SIZE  8      // Run a loopback test in 8-bit mode
-//#define WORD_SIZE 16      // Run a loopback test in 16-bit mode
-//#define WORD_SIZE 32      // Run a loopback test in 32-bit mode
-
-// Prototype statements for functions found within this file.
-
-interrupt void local_D_INTCH1_ISR(void);
-interrupt void local_D_INTCH2_ISR(void);
-void mcbsp_init_dlb(void);
-void init_dma(void);
-void init_dma_32(void);
-void start_dma(void);
-void error(void);
-
-
-// Place sdata and rdata buffers in DMA-accessible RAM (L4 for this example)
-#pragma DATA_SECTION(sdata, "DMARAML4")
-#pragma DATA_SECTION(rdata, "DMARAML4")
-Uint16 sdata[128];    // Sent Data
-Uint16 rdata[128];    // Recieved Data
-Uint16 data_size;     // Word Length variable
-
-void main(void)
-{
-   Uint16 i;
-// Step 1. Initialize System Control:
-// PLL, WatchDog, enable Peripheral Clocks
-// This example function is found in the DSP2833x_SysCtrl.c file.
-   InitSysCtrl();
-
-// Step 2. Initalize GPIO:
-// This example function is found in the DSP2833x_Gpio.c file and
-// illustrates how to set the GPIO to it's default state.
-// InitGpio();  // Skipped for this example
-// Setup only the GP I/O only for McBSP-A functionality
-   InitMcbspaGpio();
-
-// Step 3. Clear all interrupts and initialize PIE vector table:
-// Disable CPU interrupts
-   DINT;
-
-// Initialize PIE control registers to their default state.
-// The default state is all PIE interrupts disabled and flags
-// are cleared.
-// This function is found in the DSP2833x_PieCtrl.c file.
-   InitPieCtrl();
-
-// Disable CPU interrupts and clear all CPU interrupt flags:
-   IER = 0x0000;
-   IFR = 0x0000;
-
-// Initialize the PIE vector table with pointers to the shell Interrupt
-// Service Routines (ISR).
-// This will populate the entire table, even if the interrupt
-// is not used in this example.  This is useful for debug purposes.
-// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
-// This function is found in DSP2833x_PieVect.c.
-   InitPieVectTable();
-
-// Interrupts that are used in this example are re-mapped to
-// ISR functions found within this file.
-   EALLOW;	// Allow access to EALLOW protected registers
-   PieVectTable.DINTCH1= &local_D_INTCH1_ISR;
-   PieVectTable.DINTCH2= &local_D_INTCH2_ISR;
-   EDIS;   // Disable access to EALLOW protected registers
-
-
-// Step 4. Initialize all the Device Peripherals:
-// This function is found in DSP2833x_InitPeripherals.c
-// InitPeripherals(); // Not required for this example
-
-// Step 5. User specific code, enable interrupts:
-   data_size = WORD_SIZE;
-   for (i=0; i<128; i++)
-   {
-       sdata[i] = i;      // Fill sdata with values between 0 and 0x007F
-	   rdata[i] = 0;      // Initialize rdata to all 0x0000.
-   }
-   if (data_size == 32)
-   {
-     init_dma_32();     // DMA Initialization for 32-bit transfers
-   }  else
-   {
-     init_dma();       // 1. When using DMA, initialize DMA with peripheral interrupts first.
-   }
-   start_dma();
-   mcbsp_init_dlb();   // 2.  Then initialize and release peripheral (McBSP) from Reset.
-
-
-// Enable interrupts required for this example
-   PieCtrlRegs.PIECTRL.bit.ENPIE = 1;   // Enable the PIE block
-   PieCtrlRegs.PIEIER6.bit.INTx5=1;     // Enable PIE Group 6, INT 5
-   PieCtrlRegs.PIEIER6.bit.INTx6=1;     // Enable PIE Group 6, INT 6
-   PieCtrlRegs.PIEIER7.bit.INTx1 = 1;	// Enable PIE Group 7, INT 1 (DMA CH1)
-   PieCtrlRegs.PIEIER7.bit.INTx2 = 1;	// Enable PIE Group 7, INT 2 (DMA CH2)
-
-   IER=0x60;                            // Enable CPU INT groups 6 and 7
-   EINT;                                // Enable Global Interrupts
-
-// Step 6. IDLE loop. Just sit and loop forever (optional):
-   for(;;);
-
-}
-
-
-// Step 7. Insert all local Interrupt Service Routines (ISRs) and functions here:
-
-
-void error(void)
-{
-    asm("     ESTOP0"); // Test failed!! Stop!
-    for (;;);
-}
-
-void mcbsp_init_dlb()
-{
-
-    McbspaRegs.SPCR2.all=0x0000;		// Reset FS generator, sample rate generator & transmitter
-	McbspaRegs.SPCR1.all=0x0000;		// Reset Receiver, Right justify word
-	McbspaRegs.SPCR1.bit.DLB = 1;       // Enable DLB mode. Comment out for non-DLB mode.
-
-	McbspaRegs.MFFINT.all=0x0;			// Disable all interrupts
-
-    McbspaRegs.RCR2.all=0x0;			// Single-phase frame, 1 word/frame, No companding	(Receive)
-    McbspaRegs.RCR1.all=0x0;
-
-    McbspaRegs.XCR2.all=0x0;			// Single-phase frame, 1 word/frame, No companding	(Transmit)
-    McbspaRegs.XCR1.all=0x0;
-
-    McbspaRegs.SRGR2.bit.CLKSM = 1;		// CLKSM=1 (If SCLKME=0, i/p clock to SRG is LSPCLK)
-	McbspaRegs.SRGR2.bit.FPER = 31;		// FPER = 32 CLKG periods
-
-    McbspaRegs.SRGR1.bit.FWID = 0;      // Frame Width = 1 CLKG period
-    McbspaRegs.SRGR1.bit.CLKGDV = 0;	// CLKG frequency = LSPCLK/(CLKGDV+1)
-
-    McbspaRegs.PCR.bit.FSXM = 1;		// FSX generated internally, FSR derived from an external source
-	McbspaRegs.PCR.bit.CLKXM = 1;		// CLKX generated internally, CLKR derived from an external source
-
-
-
-    //*************** Initialize McBSP Data Length
-    if(data_size == 8)             // Run a loopback test in 8-bit mode
-    {
-      InitMcbspa8bit();
-    }
-    if(data_size == 16)            // Run a loopback test in 16-bit mode
-    {
-      InitMcbspa16bit();
-    }
-    if(data_size == 32)            // Run a loopback test in 32-bit mode
-    {
-      InitMcbspa32bit();
-    }
-
-    //************* Enable Sample rate generator
-    McbspaRegs.SPCR2.bit.GRST=1; // Enable the sample rate generator
-    delay_loop();                // Wait at least 2 SRG clock cycles
-    McbspaRegs.SPCR2.bit.XRST=1; // Release TX from Reset
-    McbspaRegs.SPCR1.bit.RRST=1; // Release RX from Reset
-    McbspaRegs.SPCR2.bit.FRST=1; // Frame Sync Generator reset
-}
-
-// DMA Initialization for data size <= 16-bit
-
-void init_dma()
-{
-  EALLOW;
-  DmaRegs.DMACTRL.bit.HARDRESET = 1;
-  asm(" NOP");						   // Only 1 NOP needed per Design
-  DmaRegs.CH1.MODE.bit.CHINTE = 0;
-  // Channel 1, McBSPA transmit
-  DmaRegs.CH1.BURST_SIZE.all = 0;		// 1 word/burst
-  DmaRegs.CH1.SRC_BURST_STEP = 0;		// no effect when using 1 word/burst
-  DmaRegs.CH1.DST_BURST_STEP = 0;		// no effect when using 1 word/burst
-  DmaRegs.CH1.TRANSFER_SIZE = 127;		// Interrupt every frame (127 bursts/transfer)
-  DmaRegs.CH1.SRC_TRANSFER_STEP = 1;	// Move to next word in buffer after each word in a burst
-  DmaRegs.CH1.DST_TRANSFER_STEP = 0;	// Don't move destination address
-  DmaRegs.CH1.SRC_ADDR_SHADOW = (Uint32) &sdata[0];			// Start address = buffer
-  DmaRegs.CH1.SRC_BEG_ADDR_SHADOW = (Uint32) &sdata[0];		// Not needed unless using wrap function
-  DmaRegs.CH1.DST_ADDR_SHADOW = (Uint32) &McbspaRegs.DXR1.all;		// Start address = McBSPA DXR
-  DmaRegs.CH1.DST_BEG_ADDR_SHADOW = (Uint32) &McbspaRegs.DXR1.all;	// Not needed unless using wrap function
-  DmaRegs.CH1.CONTROL.bit.PERINTCLR = 1;	// Clear peripheral interrupt event flag
-  DmaRegs.CH1.CONTROL.bit.SYNCCLR = 1;		// Clear sync flag
-  DmaRegs.CH1.CONTROL.bit.ERRCLR = 1;	// Clear sync error flag
-  DmaRegs.CH1.DST_WRAP_SIZE = 0xFFFF;		// Put to maximum - don't want destination wrap
-  DmaRegs.CH1.SRC_WRAP_SIZE = 0xFFFF;		// Put to maximum - don't want source wrap
-  DmaRegs.CH1.MODE.bit.SYNCE = 0;         		// No sync signal
-  DmaRegs.CH1.MODE.bit.SYNCSEL = 0;       		// No sync signal
-  DmaRegs.CH1.MODE.bit.CHINTE = 1;			// Enable channel interrupt
-  DmaRegs.CH1.MODE.bit.CHINTMODE = 1;		// Interrupt at end of transfer
-  DmaRegs.CH1.MODE.bit.PERINTE = 1;			// Enable peripheral interrupt event
-  DmaRegs.CH1.MODE.bit.PERINTSEL = DMA_MXEVTA;		// Peripheral interrupt select = McBSP MXSYNCA
-  DmaRegs.CH1.CONTROL.bit.PERINTCLR = 1;  		// Clear any spurious interrupt flags
-
-  // Channel 2, McBSPA Receive
-  DmaRegs.CH2.MODE.bit.CHINTE = 0;
-  DmaRegs.CH2.BURST_SIZE.all = 0;		// 1 word/burst
-  DmaRegs.CH2.SRC_BURST_STEP = 0;		// no effect when using 1 word/burst
-  DmaRegs.CH2.DST_BURST_STEP = 0;		// no effect when using 1 word/burst
-  DmaRegs.CH2.TRANSFER_SIZE = 127;		// Interrupt every 127 bursts/transfer
-  DmaRegs.CH2.SRC_TRANSFER_STEP = 0;	// Don't move source address
-  DmaRegs.CH2.DST_TRANSFER_STEP = 1;	// Move to next word in buffer after each word in a burst
-  DmaRegs.CH2.SRC_ADDR_SHADOW = (Uint32) &McbspaRegs.DRR1.all;			// Start address = McBSPA DRR
-  DmaRegs.CH2.SRC_BEG_ADDR_SHADOW = (Uint32) &McbspaRegs.DRR1.all;		// Not needed unless using wrap function
-  DmaRegs.CH2.DST_ADDR_SHADOW = (Uint32) &rdata[0];		// Start address = Receive buffer (for McBSP-A)
-  DmaRegs.CH2.DST_BEG_ADDR_SHADOW = (Uint32) &rdata[0];	// Not needed unless using wrap function
-  DmaRegs.CH2.CONTROL.bit.PERINTCLR = 1;	// Clear peripheral interrupt event flag
-  DmaRegs.CH2.CONTROL.bit.SYNCCLR = 1;		// Clear sync flag
-  DmaRegs.CH2.CONTROL.bit.ERRCLR = 1;	// Clear sync error flag
-  DmaRegs.CH2.DST_WRAP_SIZE = 0xFFFF;		// Put to maximum - don't want destination wrap
-  DmaRegs.CH2.SRC_WRAP_SIZE = 0xFFFF;		// Put to maximum - don't want source wrap
-  DmaRegs.CH2.MODE.bit.CHINTE = 1;			// Enable channel interrupt
-  DmaRegs.CH2.MODE.bit.CHINTMODE = 1;		// Interrupt at end of transfer
-  DmaRegs.CH2.MODE.bit.PERINTE = 1;			// Enable peripheral interrupt event
-  DmaRegs.CH2.MODE.bit.PERINTSEL = DMA_MREVTA;  // Peripheral interrupt select = McBSP MRSYNCA
-  DmaRegs.CH2.CONTROL.bit.PERINTCLR = 1;  		// Clear any spurious interrupt flags
-  EDIS;
-}
-
-// DMA Initialization for data size > 16-bit and <= 32-bit.
-
-void init_dma_32()
-{
-  EALLOW;
-  DmaRegs.DMACTRL.bit.HARDRESET = 1;
-  asm(" NOP");						   // Only 1 NOP needed per Design
-
-  // Channel 1, McBSPA transmit
-  DmaRegs.CH1.BURST_SIZE.all = 1;		// 2 word/burst
-  DmaRegs.CH1.SRC_BURST_STEP = 1;		// increment 1 16-bit addr. btwn words
-  DmaRegs.CH1.DST_BURST_STEP = 1;		// increment 1 16-bit addr. btwn words
-  DmaRegs.CH1.TRANSFER_SIZE = 63;		// Interrupt every 63 bursts/transfer
-  DmaRegs.CH1.SRC_TRANSFER_STEP = 1;	// Move to next word in buffer after each word in a burst
-  DmaRegs.CH1.DST_TRANSFER_STEP = 0xFFFF;	// Go back to DXR2
-  DmaRegs.CH1.SRC_ADDR_SHADOW = (Uint32) &sdata[0];	// Start address = buffer
-  DmaRegs.CH1.SRC_BEG_ADDR_SHADOW = (Uint32) &sdata[0];		    // Not needed unless using wrap function
-  DmaRegs.CH1.DST_ADDR_SHADOW = (Uint32) &McbspaRegs.DXR2.all;		// Start address = McBSPA DXR2
-  DmaRegs.CH1.DST_BEG_ADDR_SHADOW = (Uint32) &McbspaRegs.DXR2.all;	// Not needed unless using wrap function
-  DmaRegs.CH1.CONTROL.bit.SYNCCLR = 1;		// Clear sync flag
-  DmaRegs.CH1.CONTROL.bit.ERRCLR = 1;	// Clear sync error flag
-  DmaRegs.CH1.DST_WRAP_SIZE = 0xFFFF;		// Put to maximum - don't want destination wrap
-  DmaRegs.CH1.SRC_WRAP_SIZE = 0xFFFF;		// Put to maximum - don't want source wrap
-  DmaRegs.CH1.MODE.bit.SYNCE = 0;         		// No sync signal
-  DmaRegs.CH1.MODE.bit.SYNCSEL = 0;       		// No sync signal
-  DmaRegs.CH1.MODE.bit.CHINTE = 1;			// Enable channel interrupt
-  DmaRegs.CH1.MODE.bit.CHINTMODE = 1;		// Interrupt at end of transfer
-  DmaRegs.CH1.MODE.bit.PERINTE = 1;			// Enable peripheral interrupt event
-  DmaRegs.CH1.MODE.bit.PERINTSEL = DMA_MXEVTA;		// Peripheral interrupt select = McBSP MXSYNCA
-  DmaRegs.CH1.CONTROL.bit.PERINTCLR = 1;  		// Clear any spurious interrupt flags
-
-  // Channel 2, McBSPA Receive
-  DmaRegs.CH2.BURST_SIZE.all = 1;		// 2 words/burst
-  DmaRegs.CH2.SRC_BURST_STEP = 1;		// Increment 1 16-bit addr. btwn words
-  DmaRegs.CH2.DST_BURST_STEP = 1;	    // Increment 1 16-bit addr. btwn words
-  DmaRegs.CH2.TRANSFER_SIZE = 63;		// Interrupt every 63 bursts/transfer
-  DmaRegs.CH2.SRC_TRANSFER_STEP = 0xFFFF;	// Decrement  back to DRR2
-  DmaRegs.CH2.DST_TRANSFER_STEP = 1;	// Move to next word in buffer after each word in a burst
-  DmaRegs.CH2.SRC_ADDR_SHADOW = (Uint32) &McbspaRegs.DRR2.all;			// Start address = McBSPA DRR
-  DmaRegs.CH2.SRC_BEG_ADDR_SHADOW = (Uint32) &McbspaRegs.DRR2.all;		// Not needed unless using wrap function
-  DmaRegs.CH2.DST_ADDR_SHADOW = (Uint32) &rdata[0];		// Start address = Receive buffer (for McBSP-A)
-  DmaRegs.CH2.DST_BEG_ADDR_SHADOW = (Uint32) &rdata[0];	// Not needed unless using wrap function
-  DmaRegs.CH2.CONTROL.bit.SYNCCLR = 1;		// Clear sync flag
-  DmaRegs.CH2.CONTROL.bit.ERRCLR = 1;	// Clear sync error flag
-  DmaRegs.CH2.DST_WRAP_SIZE = 0xFFFF;		// Put to maximum - don't want destination wrap
-  DmaRegs.CH2.SRC_WRAP_SIZE = 0xFFFF;		// Put to maximum - don't want source wrap
-  DmaRegs.CH2.MODE.bit.CHINTE = 1;			// Enable channel interrupt
-  DmaRegs.CH2.MODE.bit.CHINTMODE = 1;		// Interrupt at end of transfer
-  DmaRegs.CH2.MODE.bit.PERINTE = 1;			// Enable peripheral interrupt event
-  DmaRegs.CH2.MODE.bit.PERINTSEL = DMA_MREVTA;	// Peripheral interrupt select = McBSP MRSYNCA
-  DmaRegs.CH2.CONTROL.bit.PERINTCLR = 1;  		// Clear any spurious interrupt flags
-  EDIS;
-}
-void start_dma (void)
-{
-  EALLOW;
-  DmaRegs.CH1.CONTROL.bit.RUN = 1;	         // Start DMA Transmit from McBSP-A
-  DmaRegs.CH2.CONTROL.bit.RUN = 1;           // Start DMA Receive from McBSP-A
-
-  EDIS;
-}
-// INT7.1
-interrupt void local_D_INTCH1_ISR(void)		// DMA Ch1
-{
-   	EALLOW;									// NEED TO EXECUTE EALLOW INSIDE ISR !!!
-	DmaRegs.CH1.CONTROL.bit.RUN=0;		    // Re-enable DMA CH1. Should be done every transfer
-   	PieCtrlRegs.PIEACK.all = PIEACK_GROUP7; // To receive more interrupts from this PIE group, acknowledge this interrupt
-
-    EDIS;
-	return;
-}
-
-// INT7.2
-interrupt void local_D_INTCH2_ISR(void)		// DMA Ch2
-{
-    Uint16 i;
-    EALLOW;									// NEED TO EXECUTE EALLOW INSIDE ISR !!!
-	DmaRegs.CH2.CONTROL.bit.RUN = 0;		// Re-enable DMA CH2. Should be done every transfer
-    PieCtrlRegs.PIEACK.all = PIEACK_GROUP7; // To receive more interrupts from this PIE group, acknowledge this interrupt
-    for (i=0; i<128; i++)
-		{
-		if(data_size == 8)
-        {
-          if( (rdata[i]&0x00FF) !=(sdata[i]&0x00FF)) error( ); // Check for correct received data
-        }
-        else if (data_size == 16)
-		{
-		  if (rdata[i] != sdata[i])  error();  // STOP if there is an error !!
-        }
-		else if (data_size == 32)
-		{
-		  if ((rdata[i])!=(sdata[i])) error ();
-		}
-   }
-	 EDIS;
-	 return;
-
-}
-
-//===========================================================================
-// No more.
-//===========================================================================
-
-
diff --git a/Source/External/v120/DSP2833x_examples/mcbsp_loopback_dma/Example_2833xMcBSP_DLB_DMA.gel b/Source/External/v120/DSP2833x_examples/mcbsp_loopback_dma/Example_2833xMcBSP_DLB_DMA.gel
deleted file mode 100644
index 1c54abc..0000000
--- a/Source/External/v120/DSP2833x_examples/mcbsp_loopback_dma/Example_2833xMcBSP_DLB_DMA.gel
+++ /dev/null
@@ -1,22 +0,0 @@
-menuitem "DSP2833x McBSP DMA"
-
-hotmenu Load_and_Build_Project()
-{
-   GEL_ProjectLoad("Example_2833xMcBSP_DLB_DMA.pjt");
-   GEL_ProjectBuild("Example_2833xMcBSP_DLB_DMA.pjt");
-   Setup_WatchWindow();
-}
-
-hotmenu Load_Code()
-{
-  GEL_Load(".\\debug\\Example_2833xMcBSP_DLB_DMA.out");
-  Setup_WatchWindow();
-}
-hotmenu Setup_WatchWindow()
-{
-   GEL_WatchReset();
-   GEL_WatchAdd("rdata,x");
-   GEL_WatchAdd("sdata,x");
-}
-
-
diff --git a/Source/External/v120/DSP2833x_examples/mcbsp_loopback_dma/Example_2833xMcBSP_DLB_DMA.pjt b/Source/External/v120/DSP2833x_examples/mcbsp_loopback_dma/Example_2833xMcBSP_DLB_DMA.pjt
deleted file mode 100644
index 4194aa8..0000000
--- a/Source/External/v120/DSP2833x_examples/mcbsp_loopback_dma/Example_2833xMcBSP_DLB_DMA.pjt
+++ /dev/null
@@ -1,52 +0,0 @@
-; Code Composer Project File, Version 2.0 (do not modify or remove this line)
-
-[Project Settings]
-ProjectName="DSP2833x"
-ProjectDir="C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\mcbsp_loopback_dma\"
-ProjectType=Executable
-CPUFamily=TMS320C28XX
-Tool="Compiler"
-Tool="CustomBuilder"
-Tool="DspBiosBuilder"
-Tool="Linker"
-Config="Debug"
-Config="Release"
-
-[Source Files]
-Source="..\..\DSP2833x_common\source\DSP2833x_ADC_cal.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CodeStartBranch.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_DefaultIsr.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_McBSP.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieVect.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_SysCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_usDelay.asm"
-Source="..\..\DSP2833x_headers\source\DSP2833x_GlobalVariableDefs.c"
-Source="Example_2833xMcBSP_DLB_DMA.c"
-Source="..\..\DSP2833x_common\cmd\28335_RAM_lnk.cmd"
-Source="..\..\DSP2833x_headers\cmd\DSP2833x_Headers_nonBIOS.cmd"
-
-["Compiler" Settings: "Debug"]
-Options=-g -q -pdr -as -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\mcbsp_loopback_dma\Debug" -fs"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\mcbsp_loopback_dma\Debug" -i"..\..\DSP2833x_headers\include" -i"..\..\DSP2833x_common\include" -d"_DEBUG" -d"LARGE_MODEL" --float_support=fpu32 -ml -mt -v28
-
-["Compiler" Settings: "Release"]
-Options=-q -o3 -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\mcbsp_loopback_dma\Release" -d"LARGE_MODEL" -ml -v28
-
-["DspBiosBuilder" Settings: "Debug"]
-Options=-v28
-
-["DspBiosBuilder" Settings: "Release"]
-Options=-v28
-
-["Linker" Settings: "Debug"]
-Options=-q -c -m".\Debug\Example_2833xMcBSP_DLB_DMA.map" -o".\Debug\Example_2833xMcBSP_DLB_DMA.out" -stack0x380 -w -x -i"..\..\DSP2833x_headers\include" -l"rts2800_fpu32.lib"
-
-["Linker" Settings: "Release"]
-Options=-q -c -o".\Release\Example_2833xMcBSP_DLB_DMA.out" -x
-
-["..\..\DSP2833x_common\cmd\28335_RAM_lnk.cmd" Settings: "Debug"]
-LinkOrder=1
-
-["..\..\DSP2833x_common\cmd\28335_RAM_lnk.cmd" Settings: "Release"]
-LinkOrder=1
-
diff --git a/Source/External/v120/DSP2833x_examples/mcbsp_loopback_interrupts/Example_2833xMcBSP_DLB_int.c b/Source/External/v120/DSP2833x_examples/mcbsp_loopback_interrupts/Example_2833xMcBSP_DLB_int.c
deleted file mode 100644
index 9f0a646..0000000
--- a/Source/External/v120/DSP2833x_examples/mcbsp_loopback_interrupts/Example_2833xMcBSP_DLB_int.c
+++ /dev/null
@@ -1,221 +0,0 @@
-//###########################################################################
-//
-// FILE:   Example_2833xMCBSP_FFDLB_int.c
-//
-// TITLE:  DSP2833x Device McBSP Digital Loop Back porgram
-//
-// ASSUMPTIONS:
-//
-//    This program requires the DSP2833x header files.
-//    As supplied, this project is configured for "boot to SARAM"
-//    operation.  The 2833x Boot Mode table is shown below.
-//    For information on configuring the boot mode of an eZdsp,
-//    please refer to the documentation included with the eZdsp,
-//
-//       $Boot_Table:
-//
-//         GPIO87   GPIO86     GPIO85   GPIO84
-//          XA15     XA14       XA13     XA12
-//           PU       PU         PU       PU
-//        ==========================================
-//            1        1          1        1    Jump to Flash
-//            1        1          1        0    SCI-A boot
-//            1        1          0        1    SPI-A boot
-//            1        1          0        0    I2C-A boot
-//            1        0          1        1    eCAN-A boot
-//            1        0          1        0    McBSP-A boot
-//            1        0          0        1    Jump to XINTF x16
-//            1        0          0        0    Jump to XINTF x32
-//            0        1          1        1    Jump to OTP
-//            0        1          1        0    Parallel GPIO I/O boot
-//            0        1          0        1    Parallel XINTF boot
-//            0        1          0        0    Jump to SARAM	    <- "boot to SARAM"
-//            0        0          1        1    Branch to check boot mode
-//            0        0          1        0    Boot to flash, bypass ADC cal
-//            0        0          0        1    Boot to SARAM, bypass ADC cal
-//            0        0          0        0    Boot to SCI-A, bypass ADC cal
-//                                              Boot_Table_End$
-//
-// DESCRIPTION:
-//
-// This program is a McBSP example that uses the internal loopback of
-// the peripheral.  Both Rx and Tx interrupts are enabled.
-//
-// Incrementing values from 0x0000 to 0x00FF are being sent and received.
-//
-// This pattern is repeated forever.
-//
-// By default for the McBSP examples, the McBSP sample rate generator (SRG) input
-// clock frequency is LSPCLK (150E6/4 or 100E6/4) assuming SYSCLKOUT = 150 MHz or
-// 100 MHz respectively.  If while testing, the SRG input frequency
-// is changed, the #define MCBSP_SRG_FREQ  (150E6/4 or 100E6/4) in the Mcbsp.c file must
-// also be updated accordingly.  This define is used to determine the Mcbsp initialization
-// delay after the SRG is enabled, which must be at least 2 SRG clock cycles.
-//
-//   Watch Variables:
-//                sdata
-//                rdata
-//                rdata_point
-//
-//###########################################################################
-//
-// Original Source by S.D.
-//
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-
-
-#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File
-
-// Prototype statements for functions found within this file.
-
-interrupt void Mcbsp_TxINTA_ISR(void);
-interrupt void Mcbsp_RxINTA_ISR(void);
-void mcbsp_init_dlb(void);
-void error(void);
-
-// Global data variables used for this example
-Uint16 sdata;    // Sent Data
-Uint16 rdata;    // Recieved Data
-Uint16 rdata_point; // Keep track of where we
-                    // are in the data stream
-
-
-void main(void)
-{
-// Step 1. Initialize System Control:
-// PLL, WatchDog, enable Peripheral Clocks
-// This example function is found in the DSP2833x_SysCtrl.c file.
-   InitSysCtrl();
-
-// Step 2. Initalize GPIO:
-// This example function is found in the DSP2833x_Gpio.c file and
-// illustrates how to set the GPIO to it's default state.
-// InitGpio();  // Skipped for this example
-// Setup only the GP I/O only for McBSP-A functionality
-   InitMcbspaGpio();
-
-// Step 3. Clear all interrupts and initialize PIE vector table:
-// Disable CPU interrupts
-   DINT;
-
-// Initialize PIE control registers to their default state.
-// The default state is all PIE interrupts disabled and flags
-// are cleared.
-// This function is found in the DSP2833x_PieCtrl.c file.
-   InitPieCtrl();
-
-// Disable CPU interrupts and clear all CPU interrupt flags:
-   IER = 0x0000;
-   IFR = 0x0000;
-
-// Initialize the PIE vector table with pointers to the shell Interrupt
-// Service Routines (ISR).
-// This will populate the entire table, even if the interrupt
-// is not used in this example.  This is useful for debug purposes.
-// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
-// This function is found in DSP2833x_PieVect.c.
-   InitPieVectTable();
-
-// Interrupts that are used in this example are re-mapped to
-// ISR functions found within this file.
-   EALLOW;	// Allow access to EALLOW protected registers
-   PieVectTable.MRINTA= &Mcbsp_RxINTA_ISR;
-   PieVectTable.MXINTA= &Mcbsp_TxINTA_ISR;
-   EDIS;   // Disable access to EALLOW protected registers
-
-// Step 4. Initialize all the Device Peripherals:
-// This function is found in DSP2833x_InitPeripherals.c
-// InitPeripherals(); // Not required for this example
-   mcbsp_init_dlb();      // For this example, only initialize the Mcbsp
-
-
-// Step 5. User specific code, enable interrupts:
-
-   sdata = 0;
-   rdata_point = sdata;
-
-// Enable interrupts required for this example
-   PieCtrlRegs.PIECTRL.bit.ENPIE = 1;   // Enable the PIE block
-   PieCtrlRegs.PIEIER6.bit.INTx5=1;     // Enable PIE Group 6, INT 5
-   PieCtrlRegs.PIEIER6.bit.INTx6=1;     // Enable PIE Group 6, INT 6
-   IER=0x20;                            // Enable CPU INT6
-   EINT;                                // Enable Global Interrupts
-
-// Step 6. IDLE loop. Just sit and loop forever (optional):
-   for(;;);
-
-}
-
-
-// Step 7. Insert all local Interrupt Service Routines (ISRs) and functions here:
-
-
-void error(void)
-{
-    asm("     ESTOP0"); // Test failed!! Stop!
-    for (;;);
-}
-
-void mcbsp_init_dlb()
-{
-
-//*************** RESET MCBSP
-   McbspaRegs.SPCR2.bit.FRST=0; // Frame Sync generator reset
-   McbspaRegs.SPCR2.bit.GRST=0; // Sample Rate generator Reset
-   McbspaRegs.SPCR2.bit.XRST=0; // Transmitter reset
-   McbspaRegs.SPCR1.bit.RRST=0; // Receiver reset
-
-//*************** Initialize McBSP Registers
-// McBSP register settings for Digital loop back
-   McbspaRegs.SPCR2.all=0x0000; // XRST =0
-   McbspaRegs.SPCR1.all=0x8000; // RRST =0, DLB enabled
-   McbspaRegs.RCR2.all=0x0001;  // RDATDLY = 1
-   McbspaRegs.RCR1.all=0x0;
-   McbspaRegs.XCR2.all=0x0001;  // XDATDLY = 1
-   McbspaRegs.XCR1.all=0x0;
-
-   McbspaRegs.SRGR2.all=0x3140;
-   McbspaRegs.SRGR1.all=0x010f;
-   McbspaRegs.MCR2.all=0x0;
-   McbspaRegs.MCR1.all=0x0;
-   McbspaRegs.PCR.all=0x0A00;
-
-   McbspaRegs.MFFINT.bit.XINT = 1; // Enable Transmit Interrupts
-   McbspaRegs.MFFINT.bit.RINT = 1; // Enable Receive Interrupts
-
-//************* Enable Sample rate generator
-   McbspaRegs.SPCR2.bit.GRST=1;
-   delay_loop();                   // Wait at least 2 SRG clock cycles
-
-//************ Enable TX/RX unit
-   McbspaRegs.SPCR2.bit.XRST=1;
-   McbspaRegs.SPCR1.bit.RRST=1;
-
-//************ Frame Sync generator reset
-   McbspaRegs.SPCR2.bit.FRST=1;
-}
-
-interrupt void Mcbsp_TxINTA_ISR(void)
-{
-    McbspaRegs.DXR1.all= sdata;
-    sdata = (sdata+1)& 0x00FF ;
-    // To receive more interrupts from this PIE group, acknowledge this interrupt
-    PieCtrlRegs.PIEACK.all = PIEACK_GROUP6;
-}
-
-interrupt void Mcbsp_RxINTA_ISR(void)
-{
-    rdata=McbspaRegs.DRR1.all;
-    if (rdata != ( (rdata_point) & 0x00FF) ) error();
-    rdata_point = (rdata_point+1) & 0x00FF;
-    // To receive more interrupts from this PIE group, acknowledge this interrupt
-    PieCtrlRegs.PIEACK.all = PIEACK_GROUP6;
-}
-
-//===========================================================================
-// No more.
-//===========================================================================
-
diff --git a/Source/External/v120/DSP2833x_examples/mcbsp_loopback_interrupts/Example_2833xMcBSP_DLB_int.gel b/Source/External/v120/DSP2833x_examples/mcbsp_loopback_interrupts/Example_2833xMcBSP_DLB_int.gel
deleted file mode 100644
index b3cd28b..0000000
--- a/Source/External/v120/DSP2833x_examples/mcbsp_loopback_interrupts/Example_2833xMcBSP_DLB_int.gel
+++ /dev/null
@@ -1,27 +0,0 @@
-menuitem "DSP2833x McBSP Int"
-
-hotmenu Load_and_Build_Project()
-{
-   GEL_ProjectLoad("Example_2833xMcBSP_DLB_int.pjt");
-   GEL_ProjectBuild("Example_2833xMcBSP_DLB_int.pjt");
-   Setup_WatchWindow();
-}
-
-
-
-hotmenu Load_Code()
-{
-   GEL_Load(".\\debug\\Example_2833xMcBSP_DLB_int.out");
-   Setup_WatchWindow();
-}
-
-Setup_WatchWindow()
-{
-   GEL_WatchReset();
-   GEL_WatchAdd("sdata,x");
-   GEL_WatchAdd("rdata,x");
-   GEL_WatchAdd("rdata_point,x");      
-}
-
-
-
diff --git a/Source/External/v120/DSP2833x_examples/mcbsp_loopback_interrupts/Example_2833xMcBSP_DLB_int.pjt b/Source/External/v120/DSP2833x_examples/mcbsp_loopback_interrupts/Example_2833xMcBSP_DLB_int.pjt
deleted file mode 100644
index 1f8f3a6..0000000
--- a/Source/External/v120/DSP2833x_examples/mcbsp_loopback_interrupts/Example_2833xMcBSP_DLB_int.pjt
+++ /dev/null
@@ -1,45 +0,0 @@
-; Code Composer Project File, Version 2.0 (do not modify or remove this line)
-
-[Project Settings]
-ProjectName="DSP2833x"
-ProjectDir="C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\mcbsp_loopback_interrupts\"
-ProjectType=Executable
-CPUFamily=TMS320C28XX
-Tool="Compiler"
-Tool="DspBiosBuilder"
-Tool="Linker"
-Config="Debug"
-Config="Release"
-
-[Source Files]
-Source="..\..\DSP2833x_common\source\DSP2833x_ADC_cal.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CodeStartBranch.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_DefaultIsr.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_McBSP.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieVect.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_SysCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_usDelay.asm"
-Source="..\..\DSP2833x_headers\source\DSP2833x_GlobalVariableDefs.c"
-Source="Example_2833xMcBSP_DLB_int.c"
-Source="..\..\DSP2833x_common\cmd\28335_RAM_lnk.cmd"
-Source="..\..\DSP2833x_headers\cmd\DSP2833x_Headers_nonBIOS.cmd"
-
-["Compiler" Settings: "Debug"]
-Options=-g -q -pdr -as -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\mcbsp_loopback_interrupts\Debug" -fs"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\mcbsp_loopback_interrupts\Debug" -i"..\..\DSP2833x_headers\include" -i"..\..\DSP2833x_common\include" -d"_DEBUG" -d"LARGE_MODEL" --float_support=fpu32 -ml -mt -v28
-
-["Compiler" Settings: "Release"]
-Options=-q -o3 -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\mcbsp_loopback_interrupts\Release" -d"LARGE_MODEL" -ml -v28
-
-["DspBiosBuilder" Settings: "Debug"]
-Options=-v28
-
-["DspBiosBuilder" Settings: "Release"]
-Options=-v28
-
-["Linker" Settings: "Debug"]
-Options=-q -c -m".\Debug\Example_2833xMcBSP_DLB_int.map" -o".\Debug\Example_2833xMcBSP_DLB_int.out" -stack0x380 -w -x -i"..\..\DSP2833x_headers\include" -l"rts2800_fpu32.lib"
-
-["Linker" Settings: "Release"]
-Options=-q -c -o".\Release\Example_2833xMcBSP_DLB.out" -x
-
diff --git a/Source/External/v120/DSP2833x_examples/mcbsp_spi_loopback/Example_2833xMcBSP_SPI_DLB.c b/Source/External/v120/DSP2833x_examples/mcbsp_spi_loopback/Example_2833xMcBSP_SPI_DLB.c
deleted file mode 100644
index 46f35d8..0000000
--- a/Source/External/v120/DSP2833x_examples/mcbsp_spi_loopback/Example_2833xMcBSP_SPI_DLB.c
+++ /dev/null
@@ -1,208 +0,0 @@
-//###########################################################################
-//
-// FILE:	Example_2833xMCBSP_SPIX.c
-//
-// TITLE:	DSP28133x Device McBSP using SPI mode
-//
-// ASSUMPTIONS:
-//
-//    This program requires the DSP2833x header files.
-//    As supplied, this project is configured for "boot to SARAM"
-//    operation.  The 2833x Boot Mode table is shown below.
-//    For information on configuring the boot mode of an eZdsp,
-//    please refer to the documentation included with the eZdsp,
-//
-//       $Boot_Table:
-//
-//         GPIO87   GPIO86     GPIO85   GPIO84
-//          XA15     XA14       XA13     XA12
-//           PU       PU         PU       PU
-//        ==========================================
-//            1        1          1        1    Jump to Flash
-//            1        1          1        0    SCI-A boot
-//            1        1          0        1    SPI-A boot
-//            1        1          0        0    I2C-A boot
-//            1        0          1        1    eCAN-A boot
-//            1        0          1        0    McBSP-A boot
-//            1        0          0        1    Jump to XINTF x16
-//            1        0          0        0    Jump to XINTF x32
-//            0        1          1        1    Jump to OTP
-//            0        1          1        0    Parallel GPIO I/O boot
-//            0        1          0        1    Parallel XINTF boot
-//            0        1          0        0    Jump to SARAM	    <- "boot to SARAM"
-//            0        0          1        1    Branch to check boot mode
-//            0        0          1        0    Boot to flash, bypass ADC cal
-//            0        0          0        1    Boot to SARAM, bypass ADC cal
-//            0        0          0        0    Boot to SCI-A, bypass ADC cal
-//                                              Boot_Table_End$
-//
-// DESCRIPTION:
-//
-// SPI master mode transfer of 32-bit word size with digital loopback enabled.
-//
-//           McBSP Signals      SPI equivalent
-//           -------------------------------------
-//           MCLKX              SPICLK  (master)
-//           MFSX               SPISTE  (master)
-//           MDX                SPISIMO
-//           MCLKR              SPICLK  (slave - not used for this example)
-//           MFSR               SPISTE  (slave - not used for this example)
-//           MDR                SPISOMI (not used for this example)
-//
-// This program will execute and transmit words until terminated by the user.
-//
-// By default for the McBSP examples, the McBSP sample rate generator (SRG) input
-// clock frequency is LSPCLK (150E6/4 or 100E6/4) assuming SYSCLKOUT = 150 MHz or
-// 100 MHz respectively.  If while testing, the SRG input frequency
-// is changed, the #define MCBSP_SRG_FREQ  (CPU_SPD/4) in the Mcbsp.c file must
-// also be updated accordingly.  This define is used to determine the Mcbsp initialization
-// delay after the SRG is enabled, which must be at least 2 SRG clock cycles.
-//
-//          Watch Variables:
-//                sdata1
-//                sdata2
-//                rdata1
-//                rdata2
-//
-//
-//###########################################################################
-//
-// Original Author: S.S.
-//
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File
-
-// Prototype statements for functions found within this file.
-
-void init_mcbsp_spi(void);
-void mcbsp_xmit(int a, int b);
-void error(void);
-
-// Global data for this example
-Uint16 sdata1 = 0x000;    // Sent Data
-Uint16 rdata1 = 0x000;    // Recieved Data
-
-Uint16 sdata2 = 0x000;    // Sent Data
-Uint16 rdata2 = 0x000;    // Recieved Data
-
-
-void main(void)
-{
-
-//   Uint16 i;
-
-
-// Step 1. Initialize System Control:
-// PLL, WatchDog, enable Peripheral Clocks
-// This example function is found in the DSP2833x_SysCtrl.c file.
-   InitSysCtrl();
-
-// Step 2. Initalize GPIO:
-// This example function is found in the DSP2833x_Gpio.c file and
-// illustrates how to set the GPIO to it's default state.
-// InitGpio();  // Skipped for this example
-// For this example, only enable the GPIO for McBSP-A
-   InitMcbspaGpio();
-
-// Step 3. Clear all interrupts and initialize PIE vector table:
-// Disable CPU interrupts
-   DINT;
-
-// Initialize PIE control registers to their default state.
-// The default state is all PIE interrupts disabled and flags
-// are cleared.
-// This function is found in the DSP2833x_PieCtrl.c file.
-   InitPieCtrl();
-
-// Disable CPU interrupts and clear all CPU interrupt flags:
-   IER = 0x0000;
-   IFR = 0x0000;
-
-// Initialize the PIE vector table with pointers to the shell Interrupt
-// Service Routines (ISR).
-// This will populate the entire table, even if the interrupt
-// is not used in this example.  This is useful for debug purposes.
-// The shell ISR routines are found in DSP281x_DefaultIsr.c.
-// This function is found in DSP2833x_PieVect.c.
-   InitPieVectTable();
-
-// Step 4. Initialize all the Device Peripherals:
-// This function is found in DSP2833x_InitPeripherals.c
-// InitPeripherals();     // Not required for this example
-
-
-// Step 5. User specific code,
-
-          init_mcbsp_spi();
-          sdata1 = 0x55aa;
-          sdata2 = 0xaa55;
-// Main loop to transfer 32-bit words through MCBSP in SPI mode periodically
-          for(;;)
-          {
-               mcbsp_xmit(sdata1,sdata2);
-               while( McbspaRegs.SPCR1.bit.RRDY == 0 ) {}         // Master waits until RX data is ready
-		       rdata2 = McbspaRegs.DRR2.all;                      // Read DRR2 first.
-               rdata1 = McbspaRegs.DRR1.all;                      // Then read DRR1 to complete receiving of data
-               if((rdata2 != sdata2)&&(rdata1 != sdata1)) error( ); // Check that correct data is received.
-               delay_loop();
-			   sdata1^=0xFFFF;
-			   sdata2^=0xFFFF;
-               asm("    nop");                                    // Good place for a breakpoint
-
-           }
-}
-
-
-
-// Some Useful local functions
-
-void error(void)
-{
-    asm("     ESTOP0");  // test failed!! Stop!
-    for (;;);
-}
-
-
-
-
-void init_mcbsp_spi()
-{
-     // McBSP-A register settings
-    McbspaRegs.SPCR2.all=0x0000;		 // Reset FS generator, sample rate generator & transmitter
-	McbspaRegs.SPCR1.all=0x0000;		 // Reset Receiver, Right justify word, Digital loopback dis.
-    McbspaRegs.PCR.all=0x0F08;           //(CLKXM=CLKRM=FSXM=FSRM= 1, FSXP = 1)
-    McbspaRegs.SPCR1.bit.DLB = 1;
-    McbspaRegs.SPCR1.bit.CLKSTP = 2;     // Together with CLKXP/CLKRP determines clocking scheme
-	McbspaRegs.PCR.bit.CLKXP = 0;		 // CPOL = 0, CPHA = 0 rising edge no delay
-	McbspaRegs.PCR.bit.CLKRP = 0;
-    McbspaRegs.RCR2.bit.RDATDLY=01;      // FSX setup time 1 in master mode. 0 for slave mode (Receive)
-    McbspaRegs.XCR2.bit.XDATDLY=01;      // FSX setup time 1 in master mode. 0 for slave mode (Transmit)
-
-	McbspaRegs.RCR1.bit.RWDLEN1=5;     // 32-bit word
-    McbspaRegs.XCR1.bit.XWDLEN1=5;     // 32-bit word
-
-    McbspaRegs.SRGR2.all=0x2000; 	 	 // CLKSM=1, FPER = 1 CLKG periods
-    McbspaRegs.SRGR1.all= 0x000F;	     // Frame Width = 1 CLKG period, CLKGDV=16
-
-    McbspaRegs.SPCR2.bit.GRST=1;         // Enable the sample rate generator
-	delay_loop();                        // Wait at least 2 SRG clock cycles
-	McbspaRegs.SPCR2.bit.XRST=1;         // Release TX from Reset
-	McbspaRegs.SPCR1.bit.RRST=1;         // Release RX from Reset
-    McbspaRegs.SPCR2.bit.FRST=1;         // Frame Sync Generator reset
-}
-
-void mcbsp_xmit(int a, int b)
-{
-    McbspaRegs.DXR2.all=b;
-    McbspaRegs.DXR1.all=a;
-}
-
-
-
-//===========================================================================
-// No more.
-//===========================================================================
-
diff --git a/Source/External/v120/DSP2833x_examples/mcbsp_spi_loopback/Example_2833xMcBSP_SPI_DLB.gel b/Source/External/v120/DSP2833x_examples/mcbsp_spi_loopback/Example_2833xMcBSP_SPI_DLB.gel
deleted file mode 100644
index f0a701d..0000000
--- a/Source/External/v120/DSP2833x_examples/mcbsp_spi_loopback/Example_2833xMcBSP_SPI_DLB.gel
+++ /dev/null
@@ -1,28 +0,0 @@
-menuitem "DSP2833x McBSP SPI DLB"
-
-hotmenu Load_and_Build_Project()
-{
-   GEL_ProjectLoad("Example_2833xMcBSP_SPI_DLB.pjt");
-   GEL_ProjectBuild("Example_2833xMcBSP_SPI_DLB.pjt");
-   Setup_WatchWindow();
-}
-
-
-
-hotmenu Load_Code()
-{
-   GEL_Load(".\\debug\\Example_2833xMcBSP_SPI_DLB.out");
-   Setup_WatchWindow();
-}
-
-Setup_WatchWindow()
-{
-   GEL_WatchReset();
-   GEL_WatchAdd("sdata1,x");
-   GEL_WatchAdd("rdata1,x");
-   GEL_WatchAdd("sdata2,x");   
-   GEL_WatchAdd("rdata2,x"); 
-}
-
-
-
diff --git a/Source/External/v120/DSP2833x_examples/mcbsp_spi_loopback/Example_2833xMcBSP_SPI_DLB.pjt b/Source/External/v120/DSP2833x_examples/mcbsp_spi_loopback/Example_2833xMcBSP_SPI_DLB.pjt
deleted file mode 100644
index 2f8e650..0000000
--- a/Source/External/v120/DSP2833x_examples/mcbsp_spi_loopback/Example_2833xMcBSP_SPI_DLB.pjt
+++ /dev/null
@@ -1,45 +0,0 @@
-; Code Composer Project File, Version 2.0 (do not modify or remove this line)
-
-[Project Settings]
-ProjectName="DSP2833x"
-ProjectDir="C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\mcbsp_spi_loopback\"
-ProjectType=Executable
-CPUFamily=TMS320C28XX
-Tool="Compiler"
-Tool="DspBiosBuilder"
-Tool="Linker"
-Config="Debug"
-Config="Release"
-
-[Source Files]
-Source="..\..\DSP2833x_common\source\DSP2833x_ADC_cal.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CodeStartBranch.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_DefaultIsr.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_McBSP.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieVect.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_SysCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_usDelay.asm"
-Source="..\..\DSP2833x_headers\source\DSP2833x_GlobalVariableDefs.c"
-Source="Example_2833xMcBSP_SPI_DLB.c"
-Source="..\..\DSP2833x_common\cmd\28335_RAM_lnk.cmd"
-Source="..\..\DSP2833x_headers\cmd\DSP2833x_Headers_nonBIOS.cmd"
-
-["Compiler" Settings: "Debug"]
-Options=-g -q -pdr -as -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\mcbsp_spi_loopback\Debug" -fs"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\mcbsp_spi_loopback\Debug" -i"..\..\DSP2833x_headers\include" -i"..\..\DSP2833x_common\include" -d"_DEBUG" -d"LARGE_MODEL" --float_support=fpu32 -ml -mt -v28
-
-["Compiler" Settings: "Release"]
-Options=-q -o3 -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\mcbsp_spi_loopback\Release" -d"LARGE_MODEL" -ml -v28
-
-["DspBiosBuilder" Settings: "Debug"]
-Options=-v28
-
-["DspBiosBuilder" Settings: "Release"]
-Options=-v28
-
-["Linker" Settings: "Debug"]
-Options=-q -c -m".\Debug\Example_2833xMcBSP_DLB_int.map" -o".\Debug\Example_2833xMcBSP_SPI_DLB.out" -stack0x380 -w -x -i"..\..\DSP2833x_headers\include" -l"rts2800_fpu32.lib"
-
-["Linker" Settings: "Release"]
-Options=-q -c -o".\Release\Example_2833xMcBSP_SPI_DLB.out" -x
-
diff --git a/Source/External/v120/DSP2833x_examples/sci_autobaud/Example_2833xSci_Autobaud.c b/Source/External/v120/DSP2833x_examples/sci_autobaud/Example_2833xSci_Autobaud.c
deleted file mode 100644
index 6d93eff..0000000
--- a/Source/External/v120/DSP2833x_examples/sci_autobaud/Example_2833xSci_Autobaud.c
+++ /dev/null
@@ -1,390 +0,0 @@
-// TI File $Revision: /main/11 $
-// Checkin $Date: April 21, 2008   15:43:14 $
-//###########################################################################
-//
-// FILE:	Example_2833xSci_Autobaud_.c
-//
-// TITLE:	DSP2833x SCI Autobaud detect example
-//
-// ASSUMPTIONS:
-//
-//    This program requires the DSP2833x header files.
-//
-//    Test requires the following hardware connections:
-//
-//          GPIO29/SCITXDA <-> GPIO19/SCIRXDB
-//          GPIO28/SCIRXDA <-> GPIO18/SCITXDB
-//
-//
-//    As supplied, this project is configured for "boot to SARAM"
-//    operation.  The 2833x Boot Mode table is shown below.
-//    For information on configuring the boot mode of an eZdsp,
-//    please refer to the documentation included with the eZdsp,
-//
-//       $Boot_Table:
-//
-//         GPIO87   GPIO86     GPIO85   GPIO84
-//          XA15     XA14       XA13     XA12
-//           PU       PU         PU       PU
-//        ==========================================
-//            1        1          1        1    Jump to Flash
-//            1        1          1        0    SCI-A boot
-//            1        1          0        1    SPI-A boot
-//            1        1          0        0    I2C-A boot
-//            1        0          1        1    eCAN-A boot
-//            1        0          1        0    McBSP-A boot
-//            1        0          0        1    Jump to XINTF x16
-//            1        0          0        0    Jump to XINTF x32
-//            0        1          1        1    Jump to OTP
-//            0        1          1        0    Parallel GPIO I/O boot
-//            0        1          0        1    Parallel XINTF boot
-//            0        1          0        0    Jump to SARAM	    <- "boot to SARAM"
-//            0        0          1        1    Branch to check boot mode
-//            0        0          1        0    Boot to flash, bypass ADC cal
-//            0        0          0        1    Boot to SARAM, bypass ADC cal
-//            0        0          0        0    Boot to SCI-A, bypass ADC cal
-//                                              Boot_Table_End$
-//
-//
-//    This test will perform autobaud lock at a variety of baud rates, including
-//    very high baud rates.
-//
-//    For this test to properly run, connect the SCI-A pins to the
-//    SCI-B pins without going through a transciever.
-//
-//    At higher baud rates, the slew rate of the incoming data bits can be
-//    affected by transceiver and connector performance. This slew rate may
-//    limit reliable autobaud detection at higher baud rates.
-//
-//    SCIA: Slave, autobaud locks, receives characters and
-//          echos them back to the host.  Uses the RX interrupt
-//          to receive characters.
-//
-//    SCIB: Host, known baud rate, sends characters to the slave
-//          and checks that they are echoed back.
-//
-// DESCRIPTION:
-//
-//    Internal Loopback test for ever through SCIA using interrupts,
-//	  FIFOs are disabled.
-//
-//    Watch Variables: BRRVal - current BRR value used for SCIB
-//                     ReceivedAChar - character received by SCIA
-//                     ReceivedBChar - character received by SCIB
-//                     SendChar      - character being sent by SCIB
-//                     SciaRegs.SCILBAUD - SCIA baud registers - set
-//                     SciaRegs.SCIHBAUD   by autobaud lock
-//
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-
-#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File
-
-#define BAUDSTEP 100            // Amount BRR will be incremented between each
-                                // autobaud lock
-
-// Prototype statements for functions found within this file.
-void scia_init(void);
-void scib_init(void);
-void scia_xmit(int a);
-void scib_xmit(int a);
-void scia_AutobaudLock(void);
-void error();
-interrupt void rxaint_isr(void);
-
-
-// Global counts used in this example
-Uint16 LoopCount;
-//Uint16 xmitCount;
-Uint16 ReceivedCount;
-Uint16 ErrorCount;
-Uint16 SendChar;
-Uint16 ReceivedAChar;   // scia received character
-Uint16 ReceivedBChar;   // scib received character
-Uint16 BRRVal;
-Uint16 Buff[10] = {0x55, 0xAA, 0xF0, 0x0F, 0x00, 0xFF, 0xF5, 0x5F, 0xA5, 0x5A};
-
-void main(void)
-{
-   Uint16 i;
-
-// Step 1. Initialize System Control:
-// PLL, WatchDog, enable Peripheral Clocks
-// This example function is found in the DSP2833x_SysCtrl.c file.
-   InitSysCtrl();
-
-// Step 2. Initalize GPIO:
-// This example function is found in the DSP2833x_Gpio.c file and
-// illustrates how to set the GPIO to it's default state.
-// InitGpio();  // Skipped for this example
-
-   InitSciGpio();
-
-// Initialize PIE control registers to their default state.
-// The default state is all PIE interrupts disabled and flags
-// are cleared.
-// This function is found in the DSP2833x_PieCtrl.c file.
-   InitPieCtrl();
-
-// Disable CPU interrupts and clear all CPU interrupt flags:
-   IER = 0x0000;
-   IFR = 0x0000;
-
-// Initialize the PIE vector table with pointers to the shell Interrupt
-// Service Routines (ISR).
-// This will populate the entire table, even if the interrupt
-// is not used in this example.  This is useful for debug purposes.
-// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
-// This function is found in DSP2833x_PieVect.c.
-   InitPieVectTable();
-
-// Interrupts that are used in this example are re-mapped to
-// ISR functions found within this file.
-   EALLOW;	    // This is needed to write to EALLOW protected registers
-   PieVectTable.SCIRXINTA = &rxaint_isr;
-   EDIS;       // This is needed to disable write to EALLOW protected register
-
-// Step 4. Initialize all the Device Peripherals:
-// This function is found in DSP2833x_InitPeripherals.c
-// InitPeripherals(); // Not required for this example
-   scia_init();       // Initalize SCIA
-   scib_init();       // Initalize SCIB
-
-// Step 5. User specific code, enable interrupts:
-
-   LoopCount = 0;
-   ErrorCount = 0;
-
-// Enable interrupts
-   PieCtrlRegs.PIEIER9.all = 0x0001; // Enable all SCIA RXINT interrupt
-   IER |= 0x0100;			         // enable PIEIER9, and INT9
-   EINT;
-
-    // Start with BRR = 1, work through each baud rate setting
-    // incrementing BRR by BAUDSTEP
-    for (BRRVal = 0x0000; BRRVal < (Uint32)0xFFFF; BRRVal+=BAUDSTEP)
-    {
-
-        // SCIB has a known baud rate.  SCIA will autobaud to match
-	    ScibRegs.SCIHBAUD = (BRRVal >> 8);
-	    ScibRegs.SCILBAUD = (BRRVal);
-
-	    // Initiate an autobaud lock with scia.  Check
-	    // returned character against baud lock character 'A'
-	    scia_AutobaudLock();
-	    while(ScibRegs.SCIRXST.bit.RXRDY != 1) { }
-	    ReceivedBChar = 0;
-	    ReceivedBChar =  ScibRegs.SCIRXBUF.bit.RXDT;
-	    if(ReceivedBChar != 'A')
-	    {
-	        error(0);
-	    }
-
-	    // Send/echoback characters
-	    // 55 AA F0 0F 00 FF F5 5F A5 5A
-	    for(i= 0; i<=9; i++)
-	    {
-	      SendChar = Buff[i];
-	      scib_xmit(SendChar);			    // Initiate interrupts and xmit data in isr
-	      // Wait to get the character back and check
-	      // against the sent character.
-	      while(ScibRegs.SCIRXST.bit.RXRDY != 1)
-	      {
-	          asm("   NOP");
-	      }
-	      ReceivedBChar = 0;
-	      ReceivedBChar =  ScibRegs.SCIRXBUF.bit.RXDT;
-	      if(ReceivedBChar != SendChar) error(1);
-	    }
-
-    } // Repeat for next BRR setting
-
-    // Stop here, no more
-    for(;;)
-    {
-       asm("    NOP");
-    }
-
-
-}
-
-
-/* --------------------------------------------------- */
-/* ISR for PIE INT9.1                                  */
-/* Connected to RXAINT  SCI-A                          */
-/* ----------------------------------------------------*/
-
-interrupt void rxaint_isr(void)     // SCI-A
-{
-  // Insert ISR Code here
-
-   PieCtrlRegs.PIEACK.all = PIEACK_GROUP9;
-
-   // If autobaud detected, we must clear CDC
-   if(SciaRegs.SCIFFCT.bit.ABD == 1)
-   {
-      SciaRegs.SCIFFCT.bit.ABDCLR = 1;
-      SciaRegs.SCIFFCT.bit.CDC = 0;
-      // Check received character - should be 'A'
-      ReceivedAChar = 0;
-      ReceivedAChar = SciaRegs.SCIRXBUF.all;
-      if(ReceivedAChar != 'A')
-      {
-         error(2);
-      }
-      else scia_xmit(ReceivedAChar);
-   }
-
-   // This was not autobaud detect
-   else
-   {
-      // Check received character against sendchar
-      ReceivedAChar = 0;
-      ReceivedAChar = SciaRegs.SCIRXBUF.all;
-      if(ReceivedAChar != SendChar)
-      {
-         error(3);
-      }
-      else scia_xmit(ReceivedAChar);
-   }
-
-   SciaRegs.SCIFFRX.bit.RXFFINTCLR = 1;	// clear Receive interrupt flag
-   ReceivedCount++;
-}
-
-
-void error()
-{
-      ErrorCount++;
-      asm("     ESTOP0");  	       // Uncomment to stop the test here
-      for (;;);
-
-}
-
-// SCIA  8-bit word, baud rate 0x000F, default, 1 STOP bit, no parity
-void scia_init()
-{
-    // Note: Clocks were turned on to the SCIA peripheral
-    // in the InitSysCtrl() function
-
-    // Reset FIFO's
-    SciaRegs.SCIFFTX.all=0x8000;
-
-    SciaRegs.SCICCR.all =0x0007;   // 1 stop bit,  No loopback
-                                   // No parity,8 char bits,
-                                   // async mode, idle-line protocol
-    SciaRegs.SCICTL1.all =0x0003;  // enable TX, RX, internal SCICLK,
-                                   // Disable RX ERR, SLEEP, TXWAKE
-    SciaRegs.SCICTL2.all =0x0003;
-    SciaRegs.SCICTL2.bit.RXBKINTENA =1;
-    SciaRegs.SCICTL1.all =0x0023;     // Relinquish SCI from Reset
-
-
-}
-
-// SCIB  8-bit word, baud rate 0x000F, default, 1 STOP bit, no parity
-
-void scib_init()
-{
-    // Reset FIFO's
-    ScibRegs.SCIFFTX.all=0x8000;
-
-    // 1 stop bit, No parity, 8-bit character
-    // No loopback
-    ScibRegs.SCICCR.all = 0x0007;
-
-    // Enable TX, RX, Use internal SCICLK
-    ScibRegs.SCICTL1.all = 0x0003;
-
-    // Disable RxErr, Sleep, TX Wake,
-    // Diable Rx Interrupt, Tx Interrupt
-    ScibRegs.SCICTL2.all = 0x0000;
-
-    // Relinquish SCI-A from reset
-    ScibRegs.SCICTL1.all = 0x0023;
-
-    return;
-}
-
-
-
-
-// Transmit a character from the SCI-A'
-void scia_xmit(int a)
-{
-    SciaRegs.SCITXBUF=a;
-}
-
-// Transmit a character from the SCI-B'
-void scib_xmit(int a)
-{
-    ScibRegs.SCITXBUF=a;
-}
-
-
-//------------------------------------------------
-// Perform autobaud lock with the host.
-// Note that if autobaud never occurs
-// the program will hang in this routine as there
-// is no timeout mechanism included.
-//------------------------------------------------
-
-void scia_AutobaudLock()
-{
-
-    SciaRegs.SCICTL1.bit.SWRESET = 0;
-    SciaRegs.SCICTL1.bit.SWRESET = 1;
-
-    // Must prime baud register with >= 1
-    SciaRegs.SCIHBAUD = 0;
-    SciaRegs.SCILBAUD = 1;
-
-    // Prepare for autobaud detection
-    // Make sure the ABD bit is clear by writing a 1 to ABDCLR
-    // Set the CDC bit to enable autobaud detection
-    SciaRegs.SCIFFCT.bit.ABDCLR = 1;
-    SciaRegs.SCIFFCT.bit.CDC = 1;
-
-    // Wait until we correctly read an
-    // 'A' or 'a' and lock
-	//
-	// As long as Autobaud calibration is enabled (CDC = 1),
-	// SCI-B (host) will continue transmitting 'A'. This will
-	// continue until interrupted by the SCI-A RX ISR, where
-	// SCI-A RXBUF receives 'A', autobaud-locks (ABDCLR=1
-	// CDC=0),and returns an 'A' back to the host. Then control
-	// is returned to this loop and the loop is exited.
-	//
-	// NOTE: ABD will become set sometime between
-	//       scib_xmit and the DELAY_US loop, and
-	//       the SCI-A RX ISR will be triggered.
-    //       Upon returning and reaching the if-statement,
-	//       ABD will have been cleared again by the ISR.
-
-    while(SciaRegs.SCIFFCT.bit.CDC== 1)
-    {
-       // Note the lower the baud rate the longer
-       // this delay has to be to allow the other end
-       // to echo back a character (about 4 characters long)
-       // Make this really long since we are going through all
-       // the baud rates.
-       DELAY_US(280000L);
-
-       if(SciaRegs.SCIFFCT.bit.CDC == 1)
-           scib_xmit('A');  // host transmits 'A'
-
-   }
-
-    return;
-}
-
-
-
-//===========================================================================
-// No more.
-//===========================================================================
-
diff --git a/Source/External/v120/DSP2833x_examples/sci_autobaud/Example_2833xSci_Autobaud.gel b/Source/External/v120/DSP2833x_examples/sci_autobaud/Example_2833xSci_Autobaud.gel
deleted file mode 100644
index 20a2117..0000000
--- a/Source/External/v120/DSP2833x_examples/sci_autobaud/Example_2833xSci_Autobaud.gel
+++ /dev/null
@@ -1,48 +0,0 @@
-/*
-// TI File $Revision: /main/6 $
-// Checkin $Date: August 15, 2007   09:42:26 $
-//###########################################################################
-//
-// This .gel file can be used to help load and build the example project.
-// It should be unloaded from Code Composer Studio before loading another 
-// project. 
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-*/
-
-menuitem "DSP2833x SCI Autobaud"
-
-
-hotmenu Load_and_Build_Project()
-{
-   GEL_ProjectLoad("Example_2833xSci_Autobaud.pjt");
-   GEL_ProjectBuild("Example_2833xSci_Autobaud.pjt");
-   Setup_WatchWindow();
-}
-
-hotmenu Load_Code()
-{
-   GEL_Load(".\\debug\\Example_2833xSci_Autobaud.out");
-   Setup_WatchWindow();
-}
-
-hotmenu Setup_WatchWindow()
-{
-   GEL_WatchReset();
-   GEL_WatchAdd("BRRVal,x");
-   GEL_WatchAdd("ReceivedAChar,x");
-   GEL_WatchAdd("ReceivedBChar,x");
-   GEL_WatchAdd("ReceivedCount,x");  
-   GEL_WatchAdd("SendChar,x");   
-   GEL_WatchAdd("SciaRegs.SCIHBAUD,x");
-   GEL_WatchAdd("SciaRegs.SCILBAUD,x");
-   GEL_WatchAdd("ScibRegs.SCIHBAUD,x");
-   GEL_WatchAdd("ScibRegs.SCILBAUD,x");
-   GEL_WatchAdd("SciaRegs,x");
-   GEL_WatchAdd("ScibRegs,x");
-}
-
-
diff --git a/Source/External/v120/DSP2833x_examples/sci_autobaud/Example_2833xSci_Autobaud.pjt b/Source/External/v120/DSP2833x_examples/sci_autobaud/Example_2833xSci_Autobaud.pjt
deleted file mode 100644
index d4ef177..0000000
--- a/Source/External/v120/DSP2833x_examples/sci_autobaud/Example_2833xSci_Autobaud.pjt
+++ /dev/null
@@ -1,45 +0,0 @@
-; Code Composer Project File, Version 2.0 (do not modify or remove this line)
-
-[Project Settings]
-ProjectName="DSP2833x"
-ProjectDir="C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\sci_autobaud\"
-ProjectType=Executable
-CPUFamily=TMS320C28XX
-Tool="Compiler"
-Tool="DspBiosBuilder"
-Tool="Linker"
-Config="Debug"
-Config="Release"
-
-[Source Files]
-Source="..\..\DSP2833x_common\source\DSP2833x_ADC_cal.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CodeStartBranch.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_DefaultIsr.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieVect.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_Sci.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_SysCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_usDelay.asm"
-Source="..\..\DSP2833x_headers\source\DSP2833x_GlobalVariableDefs.c"
-Source="Example_2833xSci_Autobaud.c"
-Source="..\..\DSP2833x_common\cmd\28335_RAM_lnk.cmd"
-Source="..\..\DSP2833x_headers\cmd\DSP2833x_Headers_nonBIOS.cmd"
-
-["Compiler" Settings: "Debug"]
-Options=-g -q -pdr -as -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\sci_autobaud\Debug" -fs"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\sci_autobaud\Debug" -i"..\..\DSP2833x_headers\include" -i"..\..\DSP2833x_common\include" -d"_DEBUG" -d"LARGE_MODEL" --float_support=fpu32 -ml -mt -v28
-
-["Compiler" Settings: "Release"]
-Options=-q -o3 -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\sci_autobaud\Release" -d"LARGE_MODEL" -ml -v28
-
-["DspBiosBuilder" Settings: "Debug"]
-Options=-v28
-
-["DspBiosBuilder" Settings: "Release"]
-Options=-v28
-
-["Linker" Settings: "Debug"]
-Options=-q -c -ecode_start -m".\Debug\Example_2833xSci_Autobaud.map" -o".\Debug\Example_2833xSci_Autobaud.out" -stack0x380 -w -x -i"..\..\DSP2833x_headers\include" -l"rts2800_fpu32.lib"
-
-["Linker" Settings: "Release"]
-Options=-q -c -o".\Release\Example_2833xSci_Autobaud.out" -x
-
diff --git a/Source/External/v120/DSP2833x_examples/sci_echoback/Example_2833xSci_Echoback.c b/Source/External/v120/DSP2833x_examples/sci_echoback/Example_2833xSci_Echoback.c
deleted file mode 100644
index 4fe5cf7..0000000
--- a/Source/External/v120/DSP2833x_examples/sci_echoback/Example_2833xSci_Echoback.c
+++ /dev/null
@@ -1,236 +0,0 @@
-// TI File $Revision: /main/9 $
-// Checkin $Date: April 21, 2008   15:43:19 $
-//###########################################################################
-//
-// FILE:    Example_2833xSci_Echoback.c
-//
-// TITLE:   DSP2833x Device SCI Echoback.
-//
-// ASSUMPTIONS:
-//
-//    This program requires the DSP2833x header files.
-//    As supplied, this project is configured for "boot to SARAM" operation.
-//
-//    Connect the SCI-A port to a PC via a transciever and cable.
-//    The PC application 'hypterterminal' can be used to view the data
-//    from the SCI and to send information to the SCI.  Characters recieved
-//    by the SCI port are sent back to the host.
-//
-//    As supplied, this project is configured for "boot to SARAM"
-//    operation.  The 2833x Boot Mode table is shown below.
-//    For information on configuring the boot mode of an eZdsp,
-//    please refer to the documentation included with the eZdsp,
-//
-//       $Boot_Table:
-//
-//         GPIO87   GPIO86     GPIO85   GPIO84
-//          XA15     XA14       XA13     XA12
-//           PU       PU         PU       PU
-//        ==========================================
-//            1        1          1        1    Jump to Flash
-//            1        1          1        0    SCI-A boot
-//            1        1          0        1    SPI-A boot
-//            1        1          0        0    I2C-A boot
-//            1        0          1        1    eCAN-A boot
-//            1        0          1        0    McBSP-A boot
-//            1        0          0        1    Jump to XINTF x16
-//            1        0          0        0    Jump to XINTF x32
-//            0        1          1        1    Jump to OTP
-//            0        1          1        0    Parallel GPIO I/O boot
-//            0        1          0        1    Parallel XINTF boot
-//            0        1          0        0    Jump to SARAM	    <- "boot to SARAM"
-//            0        0          1        1    Branch to check boot mode
-//            0        0          1        0    Boot to flash, bypass ADC cal
-//            0        0          0        1    Boot to SARAM, bypass ADC cal
-//            0        0          0        0    Boot to SCI-A, bypass ADC cal
-//                                              Boot_Table_End$
-//
-// DESCRIPTION:
-//
-//
-//    This test recieves and echo-backs data through the SCI-A port.
-//
-//    1) Configure hyperterminal:
-//       Use the included hyperterminal configuration file SCI_96.ht.
-//       To load this configuration in hyperterminal: file->open
-//       and then select the SCI_96.ht file.
-//    2) Check the COM port.
-//       The configuration file is currently setup for COM1.
-//       If this is not correct, disconnect Call->Disconnect
-//       Open the File-Properties dialog and select the correct COM port.
-//    3) Connect hyperterminal Call->Call
-//       and then start the 2833x SCI echoback program execution.
-//    4) The program will print out a greeting and then ask you to
-//       enter a character which it will echo back to hyperterminal.
-//
-//    As is, the program configures SCI-A for 9600 baud with
-//    SYSCLKOUT = 150MHz and LSPCLK = 37.5 MHz
-//    SYSCLKOUT = 100MHz and LSPCLK = 25.0 Mhz
-//
-//
-//    Watch Variables:
-//       LoopCount for the number of characters sent
-//       ErrorCount
-//
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File
-
-// Prototype statements for functions found within this file.
-void scia_echoback_init(void);
-void scia_fifo_init(void);
-void scia_xmit(int a);
-void scia_msg(char *msg);
-
-// Global counts used in this example
-Uint16 LoopCount;
-Uint16 ErrorCount;
-
-void main(void)
-{
-
-    Uint16 ReceivedChar;
-    char *msg;
-
-// Step 1. Initialize System Control:
-// PLL, WatchDog, enable Peripheral Clocks
-// This example function is found in the DSP2833x_SysCtrl.c file.
-   InitSysCtrl();
-
-// Step 2. Initalize GPIO:
-// This example function is found in the DSP2833x_Gpio.c file and
-// illustrates how to set the GPIO to it's default state.
-   // InitGpio(); Skipped for this example
-
-// For this example, only init the pins for the SCI-A port.
-// This function is found in the DSP2833x_Sci.c file.
-   InitSciaGpio();
-
-// Step 3. Clear all interrupts and initialize PIE vector table:
-// Disable CPU interrupts
-   DINT;
-
-// Initialize PIE control registers to their default state.
-// The default state is all PIE interrupts disabled and flags
-// are cleared.
-// This function is found in the DSP2833x_PieCtrl.c file.
-   InitPieCtrl();
-
-// Disable CPU interrupts and clear all CPU interrupt flags:
-   IER = 0x0000;
-   IFR = 0x0000;
-
-// Initialize the PIE vector table with pointers to the shell Interrupt
-// Service Routines (ISR).
-// This will populate the entire table, even if the interrupt
-// is not used in this example.  This is useful for debug purposes.
-// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
-// This function is found in DSP2833x_PieVect.c.
-   InitPieVectTable();
-
-// Step 4. Initialize all the Device Peripherals:
-// This function is found in DSP2833x_InitPeripherals.c
-// InitPeripherals(); // Not required for this example
-
-// Step 5. User specific code:
-
-    LoopCount = 0;
-    ErrorCount = 0;
-
-    scia_fifo_init();	   // Initialize the SCI FIFO
-    scia_echoback_init();  // Initalize SCI for echoback
-
-    msg = "\r\n\n\nHello World!\0";
-    scia_msg(msg);
-
-    msg = "\r\nYou will enter a character, and the DSP will echo it back! \n\0";
-    scia_msg(msg);
-
-	for(;;)
-    {
-       msg = "\r\nEnter a character: \0";
-       scia_msg(msg);
-
-       // Wait for inc character
-       while(SciaRegs.SCIFFRX.bit.RXFFST !=1) { } // wait for XRDY =1 for empty state
-
-       // Get character
-       ReceivedChar = SciaRegs.SCIRXBUF.all;
-
-       // Echo character back
-       msg = "  You sent: \0";
-       scia_msg(msg);
-       scia_xmit(ReceivedChar);
-
-       LoopCount++;
-    }
-
-}
-
-
-// Test 1,SCIA  DLB, 8-bit word, baud rate 0x000F, default, 1 STOP bit, no parity
-void scia_echoback_init()
-{
-    // Note: Clocks were turned on to the SCIA peripheral
-    // in the InitSysCtrl() function
-
- 	SciaRegs.SCICCR.all =0x0007;   // 1 stop bit,  No loopback
-                                   // No parity,8 char bits,
-                                   // async mode, idle-line protocol
-	SciaRegs.SCICTL1.all =0x0003;  // enable TX, RX, internal SCICLK,
-                                   // Disable RX ERR, SLEEP, TXWAKE
-	SciaRegs.SCICTL2.all =0x0003;
-	SciaRegs.SCICTL2.bit.TXINTENA =1;
-	SciaRegs.SCICTL2.bit.RXBKINTENA =1;
-	#if (CPU_FRQ_150MHZ)
-	      SciaRegs.SCIHBAUD    =0x0001;  // 9600 baud @LSPCLK = 37.5MHz.
-	      SciaRegs.SCILBAUD    =0x00E7;
-	#endif
-	#if (CPU_FRQ_100MHZ)
-      SciaRegs.SCIHBAUD    =0x0001;  // 9600 baud @LSPCLK = 20MHz.
-      SciaRegs.SCILBAUD    =0x0044;
-	#endif
-	SciaRegs.SCICTL1.all =0x0023;  // Relinquish SCI from Reset
-}
-
-// Transmit a character from the SCI
-void scia_xmit(int a)
-{
-    while (SciaRegs.SCIFFTX.bit.TXFFST != 0) {}
-    SciaRegs.SCITXBUF=a;
-
-}
-
-void scia_msg(char * msg)
-{
-    int i;
-    i = 0;
-    while(msg[i] != '\0')
-    {
-        scia_xmit(msg[i]);
-        i++;
-    }
-}
-
-// Initalize the SCI FIFO
-void scia_fifo_init()
-{
-    SciaRegs.SCIFFTX.all=0xE040;
-    SciaRegs.SCIFFRX.all=0x204f;
-    SciaRegs.SCIFFCT.all=0x0;
-
-}
-
-
-
-
-
-
-//===========================================================================
-// No more.
-//===========================================================================
-
diff --git a/Source/External/v120/DSP2833x_examples/sci_echoback/Example_2833xSci_Echoback.gel b/Source/External/v120/DSP2833x_examples/sci_echoback/Example_2833xSci_Echoback.gel
deleted file mode 100644
index 33e7cb5..0000000
--- a/Source/External/v120/DSP2833x_examples/sci_echoback/Example_2833xSci_Echoback.gel
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
-// TI File $Revision: /main/5 $
-// Checkin $Date: August 9, 2007   17:20:59 $
-//###########################################################################
-//
-// This .gel file can be used to help load and build the example project.
-// It should be unloaded from Code Composer Studio before loading another 
-// project. 
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-*/
-
-menuitem "DSP2833x SCI Echoback"
-
-
-hotmenu Load_and_Build_Project()
-{
-   GEL_ProjectLoad("Example_2833xSci_Echoback.pjt");
-   GEL_ProjectBuild("Example_2833xSci_Echoback.pjt");
-   Setup_WatchWindow();
-}
-
-hotmenu Load_Code()
-{
-   GEL_Load(".\\debug\\Example_2833xSci_Echoback.out");
-   Setup_WatchWindow();
-}
-
-hotmenu Setup_WatchWindow()
-{
-   GEL_WatchReset();
-   GEL_WatchAdd("LoopCount,x");
-   GEL_WatchAdd("ErrorCount,x");
-   GEL_WatchAdd("SciaRegs,x");
-}
-
-
diff --git a/Source/External/v120/DSP2833x_examples/sci_echoback/Example_2833xSci_Echoback.pjt b/Source/External/v120/DSP2833x_examples/sci_echoback/Example_2833xSci_Echoback.pjt
deleted file mode 100644
index 89b00df..0000000
--- a/Source/External/v120/DSP2833x_examples/sci_echoback/Example_2833xSci_Echoback.pjt
+++ /dev/null
@@ -1,45 +0,0 @@
-; Code Composer Project File, Version 2.0 (do not modify or remove this line)
-
-[Project Settings]
-ProjectName="DSP2833x"
-ProjectDir="C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\sci_echoback\"
-ProjectType=Executable
-CPUFamily=TMS320C28XX
-Tool="Compiler"
-Tool="DspBiosBuilder"
-Tool="Linker"
-Config="Debug"
-Config="Release"
-
-[Source Files]
-Source="..\..\DSP2833x_common\source\DSP2833x_ADC_cal.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CodeStartBranch.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_DefaultIsr.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieVect.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_Sci.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_SysCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_usDelay.asm"
-Source="..\..\DSP2833x_headers\source\DSP2833x_GlobalVariableDefs.c"
-Source="Example_2833xSci_Echoback.c"
-Source="..\..\DSP2833x_common\cmd\28335_RAM_lnk.cmd"
-Source="..\..\DSP2833x_headers\cmd\DSP2833x_Headers_nonBIOS.cmd"
-
-["Compiler" Settings: "Debug"]
-Options=-g -q -pdr -as -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\sci_echoback\Debug" -fs"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\sci_echoback\Debug" -i"..\..\DSP2833x_headers\include" -i"..\..\DSP2833x_common\include" -d"_DEBUG" -d"LARGE_MODEL" --float_support=fpu32 -ml -mt -v28
-
-["Compiler" Settings: "Release"]
-Options=-q -o3 -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\sci_echoback\Release" -d"LARGE_MODEL" -ml -v28
-
-["DspBiosBuilder" Settings: "Debug"]
-Options=-v28
-
-["DspBiosBuilder" Settings: "Release"]
-Options=-v28
-
-["Linker" Settings: "Debug"]
-Options=-q -c -ecode_start -m".\Debug\Example_2833xSci_echoback.map" -o".\Debug\Example_2833xSci_echoback.out" -stack0x380 -w -x -i"..\..\DSP2833x_headers\include" -l"rts2800_fpu32.lib"
-
-["Linker" Settings: "Release"]
-Options=-q -c -o".\Release\Example_2833xSci_echoback.out" -x
-
diff --git a/Source/External/v120/DSP2833x_examples/sci_echoback/SCI_96.ht b/Source/External/v120/DSP2833x_examples/sci_echoback/SCI_96.ht
deleted file mode 100644
index 9c7ebe3..0000000
Binary files a/Source/External/v120/DSP2833x_examples/sci_echoback/SCI_96.ht and /dev/null differ
diff --git a/Source/External/v120/DSP2833x_examples/scia_loopback/Example_2833xScia_FFDLB.c b/Source/External/v120/DSP2833x_examples/scia_loopback/Example_2833xScia_FFDLB.c
deleted file mode 100644
index 61f1fb9..0000000
--- a/Source/External/v120/DSP2833x_examples/scia_loopback/Example_2833xScia_FFDLB.c
+++ /dev/null
@@ -1,217 +0,0 @@
-// TI File $Revision: /main/11 $
-// Checkin $Date: May 12, 2008   14:24:12 $
-//###########################################################################
-//
-// FILE:    Example_2833xSci_FFDLB.c
-//
-// TITLE:   DSP2833x Device SCI FIFO Digital Loop Back Test.
-//
-// ASSUMPTIONS:
-//
-//    This program requires the DSP2833x header files.
-//
-//    This program uses the internal loop back test mode of the peripheral.
-//    Other then boot mode pin configuration, no other hardware configuration
-//    is required.
-//
-//    As supplied, this project is configured for "boot to SARAM"
-//    operation.  The 2833x Boot Mode table is shown below.
-//    For information on configuring the boot mode of an eZdsp,
-//    please refer to the documentation included with the eZdsp,
-//
-//       $Boot_Table:
-//
-//         GPIO87   GPIO86     GPIO85   GPIO84
-//          XA15     XA14       XA13     XA12
-//           PU       PU         PU       PU
-//        ==========================================
-//            1        1          1        1    Jump to Flash
-//            1        1          1        0    SCI-A boot
-//            1        1          0        1    SPI-A boot
-//            1        1          0        0    I2C-A boot
-//            1        0          1        1    eCAN-A boot
-//            1        0          1        0    McBSP-A boot
-//            1        0          0        1    Jump to XINTF x16
-//            1        0          0        0    Jump to XINTF x32
-//            0        1          1        1    Jump to OTP
-//            0        1          1        0    Parallel GPIO I/O boot
-//            0        1          0        1    Parallel XINTF boot
-//            0        1          0        0    Jump to SARAM	    <- "boot to SARAM"
-//            0        0          1        1    Branch to check boot mode
-//            0        0          1        0    Boot to flash, bypass ADC cal
-//            0        0          0        1    Boot to SARAM, bypass ADC cal
-//            0        0          0        0    Boot to SCI-A, bypass ADC cal
-//                                              Boot_Table_End$
-//
-// DESCRIPTION:
-//
-//    This test uses the loopback test mode of the SCI module to send
-//    characters starting with 0x00 through 0xFF.  The test will send
-//    a character and then check the receive buffer for a correct match.
-//
-//          Watch Variables:
-//                LoopCount      Number of characters sent
-//                ErrorCount     Number of errors detected
-//                SendChar       Character sent
-//                ReceivedChar   Character recieved
-//
-//
-//###########################################################################
-//
-// Original Author: S.S.
-//
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-
-#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File
-
-// Prototype statements for functions found within this file.
-void scia_loopback_init(void);
-void scia_fifo_init(void);
-void scia_xmit(int a);
-void error();
-interrupt void scia_rx_isr(void);
-interrupt void scia_tx_isr(void);
-
-// Global counts used in this example
-Uint16 LoopCount;
-Uint16 ErrorCount;
-
-void main(void)
-{
-    Uint16 SendChar;
-    Uint16 ReceivedChar;
-
-// Step 1. Initialize System Control registers, PLL, WatchDog, Clocks to default state:
-// This function is found in the DSP2833x_SysCtrl.c file.
-	InitSysCtrl();
-
-// Step 2. Select GPIO for the device or for the specific application:
-// This function is found in the DSP2833x_Gpio.c file.
-// InitGpio(); skip this as this is example selects the I/O
-// for SCI-A in this file itself
-   InitSciGpio();
-
-// Step 3. Initialize PIE vector table:
-// The PIE vector table is initialized with pointers to shell Interrupt
-// Service Routines (ISR).  The shell routines are found in DSP2833x_DefaultIsr.c.
-// Insert user specific ISR code in the appropriate shell ISR routine in
-// the DSP28_DefaultIsr.c file.
-
-// Disable and clear all CPU interrupts:
-	DINT;
-	IER = 0x0000;
-	IFR = 0x0000;
-
-      // Initialize Pie Control Registers To Default State:
-      // This function is found in the DSP2833x_PieCtrl.c file.
-	  // InitPieCtrl();  PIE is not used for this example
-
-      // Initialize the PIE Vector Table To a Known State:
-      // This function is found in DSP2833x_PieVect.c.
-      // This function populates the PIE vector table with pointers
-      // to the shell ISR functions found in DSP2833x_DefaultIsr.c.
-	  InitPieVectTable();
-
-      // Enable CPU and PIE interrupts
-      // This example function is found in the DSP2833x_PieCtrl.c file.
-      EnableInterrupts();
-
-// Step 4. Initialize all the Device Peripherals to a known state:
-// This function is found in DSP2833x_InitPeripherals.c
-// InitPeripherals(); skip this for SCI tests
-
-// Step 5. User specific functions, Reassign vectors (optional), Enable Interrupts:
-
-    LoopCount = 0;
-    ErrorCount = 0;
-
-    scia_fifo_init();	   // Initialize the SCI FIFO
-    scia_loopback_init();  // Initalize SCI for digital loop back
-
-    // Note: Autobaud lock is not required for this example
-
-    // Send a character starting with 0
-    SendChar = 0;
-
-// Step 6. Send Characters forever starting with 0x00 and going through
-// 0xFF.  After sending each, check the recieve buffer for the correct value
-
-	for(;;)
-    {
-       scia_xmit(SendChar);
-       while(SciaRegs.SCIFFRX.bit.RXFFST !=1) { } // wait for RRDY/RXFFST =1 for 1 data available in FIFO
-
-       // Check received character
-       ReceivedChar = SciaRegs.SCIRXBUF.all;
-       if(ReceivedChar != SendChar) error();
-
-       // Move to the next character and repeat the test
-       SendChar++;
-       // Limit the character to 8-bits
-       SendChar &= 0x00FF;
-       LoopCount++;
-    }
-
-}
-
-
-// Step 7. Insert all local Interrupt Service Routines (ISRs) and functions here:
-
-void error()
-{
-
-      ErrorCount++;
-//    asm("     ESTOP0");  // Uncomment to stop the test here
-//    for (;;);
-
-}
-
-// Test 1,SCIA  DLB, 8-bit word, baud rate 0x000F, default, 1 STOP bit, no parity
-void scia_loopback_init()
-{
-    // Note: Clocks were turned on to the SCIA peripheral
-    // in the InitSysCtrl() function
-
- 	SciaRegs.SCICCR.all =0x0007;   // 1 stop bit,  No loopback
-                                   // No parity,8 char bits,
-                                   // async mode, idle-line protocol
-	SciaRegs.SCICTL1.all =0x0003;  // enable TX, RX, internal SCICLK,
-                                   // Disable RX ERR, SLEEP, TXWAKE
-	SciaRegs.SCICTL2.all =0x0003;
-	SciaRegs.SCICTL2.bit.TXINTENA =1;
-	SciaRegs.SCICTL2.bit.RXBKINTENA =1;
-    SciaRegs.SCIHBAUD    =0x0000;
-    SciaRegs.SCILBAUD    =0x000F;
-	SciaRegs.SCICCR.bit.LOOPBKENA =1; // Enable loop back
-	SciaRegs.SCICTL1.all =0x0023;     // Relinquish SCI from Reset
-}
-
-// Transmit a character from the SCI'
-void scia_xmit(int a)
-{
-    SciaRegs.SCITXBUF=a;
-}
-
-// Initalize the SCI FIFO
-void scia_fifo_init()
-{
-    SciaRegs.SCIFFTX.all=0xE040;
-    SciaRegs.SCIFFRX.all=0x204f;
-    SciaRegs.SCIFFCT.all=0x0;
-
-}
-
-
-
-
-
-
-//===========================================================================
-// No more.
-//===========================================================================
-
-
-
diff --git a/Source/External/v120/DSP2833x_examples/scia_loopback/Example_2833xScia_FFDLB.gel b/Source/External/v120/DSP2833x_examples/scia_loopback/Example_2833xScia_FFDLB.gel
deleted file mode 100644
index 541354f..0000000
--- a/Source/External/v120/DSP2833x_examples/scia_loopback/Example_2833xScia_FFDLB.gel
+++ /dev/null
@@ -1,42 +0,0 @@
-/*
-// TI File $Revision: /main/5 $
-// Checkin $Date: August 9, 2007   17:21:46 $
-//###########################################################################
-//
-// This .gel file can be used to help load and build the example project.
-// It should be unloaded from Code Composer Studio before loading another 
-// project. 
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-*/
-
-menuitem "DSP2833x SCI-A loopback"
-
-
-hotmenu Load_and_Build_Project()
-{
-   GEL_ProjectLoad("Example_2833xScia_FFDLB.pjt");
-   GEL_ProjectBuild("Example_2833xScia_FFDLB.pjt");
-   Setup_WatchWindow();
-}
-
-hotmenu Load_Code()
-{
-   GEL_Load(".\\debug\\Example_2833xScia_FFDLB.out");
-   Setup_WatchWindow();
-}
-
-hotmenu Setup_WatchWindow()
-{
-   GEL_WatchReset();
-   GEL_WatchAdd("LoopCount,x");
-   GEL_WatchAdd("ErrorCount,x");
-   GEL_WatchAdd("SendChar,x");
-   GEL_WatchAdd("ReceivedChar,x");  
-   GEL_WatchAdd("SciaRegs"); 
-}
-
-
diff --git a/Source/External/v120/DSP2833x_examples/scia_loopback/Example_2833xScia_FFDLB.pjt b/Source/External/v120/DSP2833x_examples/scia_loopback/Example_2833xScia_FFDLB.pjt
deleted file mode 100644
index 1f2db50..0000000
--- a/Source/External/v120/DSP2833x_examples/scia_loopback/Example_2833xScia_FFDLB.pjt
+++ /dev/null
@@ -1,45 +0,0 @@
-; Code Composer Project File, Version 2.0 (do not modify or remove this line)
-
-[Project Settings]
-ProjectName="DSP2833x"
-ProjectDir="C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\scia_loopback\"
-ProjectType=Executable
-CPUFamily=TMS320C28XX
-Tool="Compiler"
-Tool="DspBiosBuilder"
-Tool="Linker"
-Config="Debug"
-Config="Release"
-
-[Source Files]
-Source="..\..\DSP2833x_common\source\DSP2833x_ADC_cal.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CodeStartBranch.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_DefaultIsr.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieVect.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_Sci.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_SysCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_usDelay.asm"
-Source="..\..\DSP2833x_headers\source\DSP2833x_GlobalVariableDefs.c"
-Source="Example_2833xScia_FFDLB.c"
-Source="..\..\DSP2833x_common\cmd\28335_RAM_lnk.cmd"
-Source="..\..\DSP2833x_headers\cmd\DSP2833x_Headers_nonBIOS.cmd"
-
-["Compiler" Settings: "Debug"]
-Options=-g -q -pdr -as -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\scia_loopback\Debug" -fs"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\scia_loopback\Debug" -i"..\..\DSP2833x_headers\include" -i"..\..\DSP2833x_common\include" -d"_DEBUG" -d"LARGE_MODEL" --float_support=fpu32 -ml -mt -v28
-
-["Compiler" Settings: "Release"]
-Options=-q -o3 -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\scia_loopback\Release" -d"LARGE_MODEL" -ml -v28
-
-["DspBiosBuilder" Settings: "Debug"]
-Options=-v28
-
-["DspBiosBuilder" Settings: "Release"]
-Options=-v28
-
-["Linker" Settings: "Debug"]
-Options=-q -c -ecode_start -m".\Debug\Example_2833xScia_FFDLB.map" -o".\Debug\Example_2833xScia_FFDLB.out" -stack0X200 -w -x -i"..\..\DSP2833x_headers\include" -l"rts2800_fpu32.lib"
-
-["Linker" Settings: "Release"]
-Options=-q -c -o".\Release\Example_2833xSci_FFDLB.out" -x
-
diff --git a/Source/External/v120/DSP2833x_examples/scia_loopback_interrupts/Example_2833xSci_FFDLB_int.c b/Source/External/v120/DSP2833x_examples/scia_loopback_interrupts/Example_2833xSci_FFDLB_int.c
deleted file mode 100644
index eb1680b..0000000
--- a/Source/External/v120/DSP2833x_examples/scia_loopback_interrupts/Example_2833xSci_FFDLB_int.c
+++ /dev/null
@@ -1,329 +0,0 @@
-// TI File $Revision: /main/10 $
-// Checkin $Date: April 21, 2008   15:43:28 $
-//###########################################################################
-//
-// FILE:   Example_2833xSci_FFDLB_int.c
-//
-// TITLE:  DSP2833x Device SCI Digital Loop Back porgram.
-//
-//
-// ASSUMPTIONS:
-//
-//    This program requires the DSP2833x header files.
-//
-//    This program uses the internal loop back test mode of the peripheral.
-//    Other then boot mode pin configuration, no other hardware configuration
-//    is required.
-//
-//    As supplied, this project is configured for "boot to SARAM"
-//    operation.  The 2833x Boot Mode table is shown below.
-//    For information on configuring the boot mode of an eZdsp,
-//    please refer to the documentation included with the eZdsp,
-//
-//       $Boot_Table:
-//
-//         GPIO87   GPIO86     GPIO85   GPIO84
-//          XA15     XA14       XA13     XA12
-//           PU       PU         PU       PU
-//        ==========================================
-//            1        1          1        1    Jump to Flash
-//            1        1          1        0    SCI-A boot
-//            1        1          0        1    SPI-A boot
-//            1        1          0        0    I2C-A boot
-//            1        0          1        1    eCAN-A boot
-//            1        0          1        0    McBSP-A boot
-//            1        0          0        1    Jump to XINTF x16
-//            1        0          0        0    Jump to XINTF x32
-//            0        1          1        1    Jump to OTP
-//            0        1          1        0    Parallel GPIO I/O boot
-//            0        1          0        1    Parallel XINTF boot
-//            0        1          0        0    Jump to SARAM	    <- "boot to SARAM"
-//            0        0          1        1    Branch to check boot mode
-//            0        0          1        0    Boot to flash, bypass ADC cal
-//            0        0          0        1    Boot to SARAM, bypass ADC cal
-//            0        0          0        0    Boot to SCI-A, bypass ADC cal
-//                                              Boot_Table_End$
-//
-// DESCRIPTION:
-//
-//    This program is a SCI example that uses the internal loopback of
-//    the peripheral.  Both interrupts and the SCI FIFOs are used.
-//
-//    A stream of data is sent and then compared to the recieved stream.
-//
-//    The SCI-A sent data looks like this:
-//    00 01 02 03 04 05 06 07
-//    01 02 03 04 05 06 07 08
-//    02 03 04 05 06 07 08 09
-//    ....
-//    FE FF 00 01 02 03 04 05
-//    FF 00 01 02 03 04 05 06
-//    etc..
-//
-//
-//    The SCI-B sent data looks like this:
-//    FF FE FD FC FB FA F9 F8
-//    FE FD FC FB FA F9 F8 F7
-//    FD FC FB FA F9 F8 F7 F6
-//    ....
-//    01 00 FF FE FD FC FB FA
-//    00 FF FE FD FC FB FA F9
-//    etc..
-//
-//    Both patterns are repeated forever.
-//
-//    Watch Variables:
-//
-//       SCI-A           SCI-B
-//       ----------------------
-//       sdataA          sdataB           Data being sent
-//       rdataA          rdataB           Data received
-//       rdata_pointA    rdata_pointB     Keep track of where we are in the datastream
-//                                        This is used to check the incoming data
-//###########################################################################
-// Original Source by S.D.
-//
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-
-
-#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File
-
-#define CPU_FREQ 	 150E6
-#define LSPCLK_FREQ  CPU_FREQ/4
-#define SCI_FREQ 	 100E3
-#define SCI_PRD 	 (LSPCLK_FREQ/(SCI_FREQ*8))-1
-
-// Prototype statements for functions found within this file.
-interrupt void sciaTxFifoIsr(void);
-interrupt void sciaRxFifoIsr(void);
-interrupt void scibTxFifoIsr(void);
-interrupt void scibRxFifoIsr(void);
-void scia_fifo_init(void);
-void scib_fifo_init(void);
-void error(void);
-
-// Global variables
-Uint16 sdataA[8];    // Send data for SCI-A
-Uint16 sdataB[8];    // Send data for SCI-B
-Uint16 rdataA[8];    // Received data for SCI-A
-Uint16 rdataB[8];    // Received data for SCI-A
-Uint16 rdata_pointA; // Used for checking the received data
-Uint16 rdata_pointB;
-
-
-void main(void)
-{
-   Uint16 i;
-
-// Step 1. Initialize System Control:
-// PLL, WatchDog, enable Peripheral Clocks
-// This example function is found in the DSP2833x_SysCtrl.c file.
-   InitSysCtrl();
-
-// Step 2. Initalize GPIO:
-// This example function is found in the DSP2833x_Gpio.c file and
-// illustrates how to set the GPIO to it's default state.
-// InitGpio();
-// Setup only the GP I/O only for SCI-A and SCI-B functionality
-// This function is found in DSP2833x_Sci.c
-   InitSciGpio();
-
-// Step 3. Clear all interrupts and initialize PIE vector table:
-// Disable CPU interrupts
-   DINT;
-
-// Initialize PIE control registers to their default state.
-// The default state is all PIE interrupts disabled and flags
-// are cleared.
-// This function is found in the DSP2833x_PieCtrl.c file.
-   InitPieCtrl();
-
-// Disable CPU interrupts and clear all CPU interrupt flags:
-   IER = 0x0000;
-   IFR = 0x0000;
-
-// Initialize the PIE vector table with pointers to the shell Interrupt
-// Service Routines (ISR).
-// This will populate the entire table, even if the interrupt
-// is not used in this example.  This is useful for debug purposes.
-// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
-// This function is found in DSP2833x_PieVect.c.
-   InitPieVectTable();
-
-// Interrupts that are used in this example are re-mapped to
-// ISR functions found within this file.
-   EALLOW;	// This is needed to write to EALLOW protected registers
-   PieVectTable.SCIRXINTA = &sciaRxFifoIsr;
-   PieVectTable.SCITXINTA = &sciaTxFifoIsr;
-   PieVectTable.SCIRXINTB = &scibRxFifoIsr;
-   PieVectTable.SCITXINTB = &scibTxFifoIsr;
-   EDIS;   // This is needed to disable write to EALLOW protected registers
-
-
-// Step 4. Initialize all the Device Peripherals:
-// This function is found in DSP2833x_InitPeripherals.c
-// InitPeripherals(); // Not required for this example
-   scia_fifo_init();  // Init SCI-A
-   scib_fifo_init();  // Init SCI-B
-
-// Step 5. User specific code, enable interrupts:
-
-// Init send data.  After each transmission this data
-// will be updated for the next transmission
-   for(i = 0; i<8; i++)
-   {
-      sdataA[i] = i;
-   }
-
-   for(i = 0; i<8; i++)
-   {
-      sdataB[i] = 0xFF - i;
-   }
-
-   rdata_pointA = sdataA[0];
-   rdata_pointB = sdataB[0];
-
-// Enable interrupts required for this example
-   PieCtrlRegs.PIECTRL.bit.ENPIE = 1;   // Enable the PIE block
-   PieCtrlRegs.PIEIER9.bit.INTx1=1;     // PIE Group 9, int1
-   PieCtrlRegs.PIEIER9.bit.INTx2=1;     // PIE Group 9, INT2
-   PieCtrlRegs.PIEIER9.bit.INTx3=1;     // PIE Group 9, INT3
-   PieCtrlRegs.PIEIER9.bit.INTx4=1;     // PIE Group 9, INT4
-   IER = 0x100;	// Enable CPU INT
-   EINT;
-
-// Step 6. IDLE loop. Just sit and loop forever (optional):
-	for(;;);
-
-}
-
-void error(void)
-{
-    asm("     ESTOP0"); // Test failed!! Stop!
-    for (;;);
-}
-
-
-interrupt void sciaTxFifoIsr(void)
-{
-    Uint16 i;
-    for(i=0; i< 8; i++)
-    {
- 	   SciaRegs.SCITXBUF=sdataA[i];     // Send data
-	}
-
-    for(i=0; i< 8; i++)                 //Increment send data for next cycle
-    {
- 	   sdataA[i] = (sdataA[i]+1) & 0x00FF;
-	}
-
-	SciaRegs.SCIFFTX.bit.TXFFINTCLR=1;	// Clear SCI Interrupt flag
-	PieCtrlRegs.PIEACK.all|=0x100;      // Issue PIE ACK
-}
-
-interrupt void sciaRxFifoIsr(void)
-{
-    Uint16 i;
-	for(i=0;i<8;i++)
-	{
-	   rdataA[i]=SciaRegs.SCIRXBUF.all;	 // Read data
-	}
-	for(i=0;i<8;i++)                     // Check received data
-	{
-	   if(rdataA[i] != ( (rdata_pointA+i) & 0x00FF) ) error();
-	}
-	rdata_pointA = (rdata_pointA+1) & 0x00FF;
-
-	SciaRegs.SCIFFRX.bit.RXFFOVRCLR=1;   // Clear Overflow flag
-	SciaRegs.SCIFFRX.bit.RXFFINTCLR=1;   // Clear Interrupt flag
-
-	PieCtrlRegs.PIEACK.all|=0x100;       // Issue PIE ack
-}
-
-void scia_fifo_init()
-{
-   SciaRegs.SCICCR.all =0x0007;   // 1 stop bit,  No loopback
-                                  // No parity,8 char bits,
-                                  // async mode, idle-line protocol
-   SciaRegs.SCICTL1.all =0x0003;  // enable TX, RX, internal SCICLK,
-                                  // Disable RX ERR, SLEEP, TXWAKE
-   SciaRegs.SCICTL2.bit.TXINTENA =1;
-   SciaRegs.SCICTL2.bit.RXBKINTENA =1;
-   SciaRegs.SCIHBAUD = 0x0000;
-   SciaRegs.SCILBAUD = SCI_PRD;
-   SciaRegs.SCICCR.bit.LOOPBKENA =1; // Enable loop back
-   SciaRegs.SCIFFTX.all=0xC028;
-   SciaRegs.SCIFFRX.all=0x0028;
-   SciaRegs.SCIFFCT.all=0x00;
-
-   SciaRegs.SCICTL1.all =0x0023;     // Relinquish SCI from Reset
-   SciaRegs.SCIFFTX.bit.TXFIFOXRESET=1;
-   SciaRegs.SCIFFRX.bit.RXFIFORESET=1;
-
-
-}
-
-interrupt void scibTxFifoIsr(void)
-{
-    Uint16 i;
-    for(i=0; i< 8; i++)
-    {
- 	   ScibRegs.SCITXBUF=sdataB[i];     // Send data
-	}
-
-    for(i=0; i< 8; i++)                 //Increment send data for next cycle
-    {
- 	   sdataB[i] = (sdataB[i]-1) & 0x00FF;
-	}
-
-	ScibRegs.SCIFFTX.bit.TXFFINTCLR=1;  // Clear Interrupt flag
-	PieCtrlRegs.PIEACK.all|=0x100;      // Issue PIE ACK
-}
-
-interrupt void scibRxFifoIsr(void)
-{
-    Uint16 i;
-	for(i=0;i<8;i++)
-	{
-	   rdataB[i]=ScibRegs.SCIRXBUF.all;	 // Read data
-	}
-	for(i=0;i<8;i++)                     // Check received data
-	{
-	   if(rdataB[i] != ( (rdata_pointB-i) & 0x00FF) ) error();
-	}
-	rdata_pointB = (rdata_pointB-1) & 0x00FF;
-
-	ScibRegs.SCIFFRX.bit.RXFFOVRCLR=1;  // Clear Overflow flag
-	ScibRegs.SCIFFRX.bit.RXFFINTCLR=1; 	// Clear Interrupt flag
-	PieCtrlRegs.PIEACK.all|=0x100;  	// Issue PIE ack
-}
-
-void scib_fifo_init()
-{
-   ScibRegs.SCICCR.all =0x0007;    // 1 stop bit,  No loopback
-                                   // No parity,8 char bits,
-                                   // async mode, idle-line protocol
-   ScibRegs.SCICTL1.all =0x0003;   // enable TX, RX, internal SCICLK,
-                                   // Disable RX ERR, SLEEP, TXWAKE
-   ScibRegs.SCICTL2.bit.TXINTENA =1;
-   ScibRegs.SCICTL2.bit.RXBKINTENA =1;
-   ScibRegs.SCIHBAUD    =0x0000;
-   ScibRegs.SCILBAUD    =SCI_PRD;
-   ScibRegs.SCICCR.bit.LOOPBKENA =1; // Enable loop back
-   ScibRegs.SCIFFTX.all=0xC028;
-   ScibRegs.SCIFFRX.all=0x0028;
-   ScibRegs.SCIFFCT.all=0x00;
-
-   ScibRegs.SCICTL1.all =0x0023;     // Relinquish SCI from Reset
-   ScibRegs.SCIFFTX.bit.TXFIFOXRESET=1;
-   ScibRegs.SCIFFRX.bit.RXFIFORESET=1;
-
-}
-
-//===========================================================================
-// No more.
-//===========================================================================
-
diff --git a/Source/External/v120/DSP2833x_examples/scia_loopback_interrupts/Example_2833xSci_FFDLB_int.gel b/Source/External/v120/DSP2833x_examples/scia_loopback_interrupts/Example_2833xSci_FFDLB_int.gel
deleted file mode 100644
index 617b3e6..0000000
--- a/Source/External/v120/DSP2833x_examples/scia_loopback_interrupts/Example_2833xSci_FFDLB_int.gel
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
-// TI File $Revision: /main/5 $
-// Checkin $Date: August 9, 2007   17:21:58 $
-//###########################################################################
-//
-// This .gel file can be used to help load and build the example project.
-// It should be unloaded from Code Composer Studio before loading another 
-// project. 
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-*/
-
-menuitem "DSP2833x SCI Int"
-
-hotmenu Load_and_Build_Project()
-{
-   GEL_ProjectLoad("Example_2833xSci_FFDLB_int.pjt");
-   GEL_ProjectBuild("Example_2833xSci_FFDLB_int.pjt");
-   Setup_WatchWindow(); 
-}
-
-hotmenu Load_Code()
-{
-   GEL_WatchReset();
-   GEL_Load(".\\debug\\Example_2833xSci_FFDLB_int.out");
-   Setup_WatchWindow();
-}
-
-
-hotmenu Setup_WatchWindow()
-{
-   GEL_WatchReset();
-   GEL_WatchAdd("sdataA,x");
-   GEL_WatchAdd("rdataA,x");
-   GEL_WatchAdd("rdata_pointA,x");
-   GEL_WatchAdd("sdataB,x");
-   GEL_WatchAdd("rdataB,x");
-   GEL_WatchAdd("rdata_pointB,x");
-   GEL_WatchAdd("SciaRegs,x");
-}
-
-
diff --git a/Source/External/v120/DSP2833x_examples/scia_loopback_interrupts/Example_2833xSci_FFDLB_int.pjt b/Source/External/v120/DSP2833x_examples/scia_loopback_interrupts/Example_2833xSci_FFDLB_int.pjt
deleted file mode 100644
index 9fce8bd..0000000
--- a/Source/External/v120/DSP2833x_examples/scia_loopback_interrupts/Example_2833xSci_FFDLB_int.pjt
+++ /dev/null
@@ -1,45 +0,0 @@
-; Code Composer Project File, Version 2.0 (do not modify or remove this line)
-
-[Project Settings]
-ProjectName="DSP2833x"
-ProjectDir="C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\scia_loopback_interrupts\"
-ProjectType=Executable
-CPUFamily=TMS320C28XX
-Tool="Compiler"
-Tool="DspBiosBuilder"
-Tool="Linker"
-Config="Debug"
-Config="Release"
-
-[Source Files]
-Source="..\..\DSP2833x_common\source\DSP2833x_ADC_cal.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CodeStartBranch.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_DefaultIsr.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieVect.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_Sci.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_SysCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_usDelay.asm"
-Source="..\..\DSP2833x_headers\source\DSP2833x_GlobalVariableDefs.c"
-Source="Example_2833xSci_FFDLB_int.c"
-Source="..\..\DSP2833x_common\cmd\28335_RAM_lnk.cmd"
-Source="..\..\DSP2833x_headers\cmd\DSP2833x_Headers_nonBIOS.cmd"
-
-["Compiler" Settings: "Debug"]
-Options=-g -q -pdr -as -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\scia_loopback_interrupts\Debug" -fs"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\scia_loopback_interrupts\Debug" -i"..\..\DSP2833x_headers\include" -i"..\..\DSP2833x_common\include" -d"_DEBUG" -d"LARGE_MODEL" --float_support=fpu32 -ml -mt -v28
-
-["Compiler" Settings: "Release"]
-Options=-q -o3 -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\scia_loopback_interrupts\Release" -d"LARGE_MODEL" -ml -v28
-
-["DspBiosBuilder" Settings: "Debug"]
-Options=-v28
-
-["DspBiosBuilder" Settings: "Release"]
-Options=-v28
-
-["Linker" Settings: "Debug"]
-Options=-q -c -ecode_start -m".\Debug\Example_2833xSci_FFDLB_int.map" -o".\Debug\Example_2833xSci_FFDLB_int.out" -stack0x200 -w -x -i"..\..\DSP2833x_headers\include" -l"rts2800_fpu32.lib"
-
-["Linker" Settings: "Release"]
-Options=-q -c -o".\Release\Example_2833xSpi_FFDLB.out" -x
-
diff --git a/Source/External/v120/DSP2833x_examples/spi_loopback/Example_2833xSpi_FFDLB.c b/Source/External/v120/DSP2833x_examples/spi_loopback/Example_2833xSpi_FFDLB.c
deleted file mode 100644
index 8a28e12..0000000
--- a/Source/External/v120/DSP2833x_examples/spi_loopback/Example_2833xSpi_FFDLB.c
+++ /dev/null
@@ -1,184 +0,0 @@
-// TI File $Revision: /main/9 $
-// Checkin $Date: April 21, 2008   15:43:32 $
-//###########################################################################
-//
-// FILE:   Example_2833xSpi_FFDLB.c
-//
-// TITLE:  DSP2833x Device Spi Digital Loop Back program. 
-//
-// ASSUMPTIONS:
-//
-//    This program requires the DSP2833x header files. 
-// 
-//    This program uses the internal loop back test mode of the peripheral. 
-//    Other then boot mode pin configuration, no other hardware configuration
-//    is required. 
-//
-//    As supplied, this project is configured for "boot to SARAM" 
-//    operation.  The 2833x Boot Mode table is shown below.  
-//    For information on configuring the boot mode of an eZdsp, 
-//    please refer to the documentation included with the eZdsp,  
-//
-//       $Boot_Table:
-//
-//         GPIO87   GPIO86     GPIO85   GPIO84
-//          XA15     XA14       XA13     XA12
-//           PU       PU         PU       PU
-//        ==========================================
-//            1        1          1        1    Jump to Flash
-//            1        1          1        0    SCI-A boot
-//            1        1          0        1    SPI-A boot
-//            1        1          0        0    I2C-A boot
-//            1        0          1        1    eCAN-A boot
-//            1        0          1        0    McBSP-A boot
-//            1        0          0        1    Jump to XINTF x16
-//            1        0          0        0    Jump to XINTF x32
-//            0        1          1        1    Jump to OTP
-//            0        1          1        0    Parallel GPIO I/O boot
-//            0        1          0        1    Parallel XINTF boot
-//            0        1          0        0    Jump to SARAM	    <- "boot to SARAM"
-//            0        0          1        1    Branch to check boot mode
-//            0        0          1        0    Boot to flash, bypass ADC cal
-//            0        0          0        1    Boot to SARAM, bypass ADC cal
-//            0        0          0        0    Boot to SCI-A, bypass ADC cal
-//                                              Boot_Table_End$
-//
-// DESCRIPTION:
-//
-//    This program is a SPI example that uses the internal loopback of
-//    the peripheral.  Interrupts are not used.
-//
-//    A stream of data is sent and then compared to the recieved stream.
-//  
-//    The sent data looks like this:
-//    0000 0001 0002 0003 0004 0005 0006 0007 .... FFFE FFFF
-//
-//    This pattern is repeated forever.  
-//
-//          Watch Variables:         
-//                sdata - sent data
-//                rdata - received data
-//		
-////###########################################################################		
-// Original Author: S.S.
-//
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-
-#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File
-
-// Prototype statements for functions found within this file.
-// interrupt void ISRTimer2(void);
-void delay_loop(void);
-void spi_xmit(Uint16 a);
-void spi_fifo_init(void);
-void spi_init(void);
-void error(void);
-
-void main(void)
-{
-   Uint16 sdata;  // send data
-   Uint16 rdata;  // received data
-   
-// Step 1. Initialize System Control:
-// PLL, WatchDog, enable Peripheral Clocks
-// This example function is found in the DSP2833x_SysCtrl.c file.
-   InitSysCtrl();
-
-// Step 2. Initalize GPIO: 
-// This example function is found in the DSP2833x_Gpio.c file and
-// illustrates how to set the GPIO to it's default state.
-// InitGpio();  // Skipped for this example  
-// Setup only the GP I/O only for SPI-A functionality
-// This function is found in DSP2833x_Spi.c
-   InitSpiaGpio();
-
-// Step 3. Clear all interrupts and initialize PIE vector table:
-// Disable CPU interrupts 
-   DINT;
-
-// Initialize PIE control registers to their default state.
-// The default state is all PIE interrupts disabled and flags
-// are cleared.  
-// This function is found in the DSP2833x_PieCtrl.c file.
-   InitPieCtrl();
-
-// Disable CPU interrupts and clear all CPU interrupt flags:
-   IER = 0x0000;
-   IFR = 0x0000;
-   
-// Initialize the PIE vector table with pointers to the shell Interrupt 
-// Service Routines (ISR).  
-// This will populate the entire table, even if the interrupt
-// is not used in this example.  This is useful for debug purposes.
-// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
-// This function is found in DSP2833x_PieVect.c.
-   InitPieVectTable();
-	
-// Step 4. Initialize all the Device Peripherals:
-// This function is found in DSP2833x_InitPeripherals.c
-// InitPeripherals(); // Not required for this example
-   spi_fifo_init();	  // Initialize the Spi FIFO
-   spi_init();		  // init SPI
-
-// Step 5. User specific code:
-// Interrupts are not used in this example. 
-   sdata = 0x0000;							
-   for(;;)
-   {    
-     // Transmit data
-     spi_xmit(sdata);
-     // Wait until data is received
-     while(SpiaRegs.SPIFFRX.bit.RXFFST !=1) { } 			
-     // Check against sent data
-     rdata = SpiaRegs.SPIRXBUF;				
-     if(rdata != sdata) error();
-     sdata++;
-   }
-} 	
-
-
-// Step 7. Insert all local Interrupt Service Routines (ISRs) and functions here:	
-
-void delay_loop()
-{
-    long      i;
-    for (i = 0; i < 1000000; i++) {}
-}
-
-
-void error(void)
-{
-    asm("     ESTOP0");						// Test failed!! Stop!
-    for (;;);
-}
-
-void spi_init()
-{    
-	SpiaRegs.SPICCR.all =0x000F;	             // Reset on, rising edge, 16-bit char bits  
-	SpiaRegs.SPICTL.all =0x0006;    		     // Enable master mode, normal phase,
-                                                 // enable talk, and SPI int disabled.
-	SpiaRegs.SPIBRR =0x007F;									
-    SpiaRegs.SPICCR.all =0x009F;		         // Relinquish SPI from Reset   
-    SpiaRegs.SPIPRI.bit.FREE = 1;                // Set so breakpoints don't disturb xmission
-}
-
-void spi_xmit(Uint16 a)
-{
-    SpiaRegs.SPITXBUF=a;
-}    
-
-void spi_fifo_init()										
-{
-// Initialize SPI FIFO registers
-    SpiaRegs.SPIFFTX.all=0xE040;
-    SpiaRegs.SPIFFRX.all=0x204f;
-    SpiaRegs.SPIFFCT.all=0x0;
-}  
-
-//===========================================================================
-// No more.
-//===========================================================================
-
diff --git a/Source/External/v120/DSP2833x_examples/spi_loopback/Example_2833xSpi_FFDLB.gel b/Source/External/v120/DSP2833x_examples/spi_loopback/Example_2833xSpi_FFDLB.gel
deleted file mode 100644
index 3ba33a3..0000000
--- a/Source/External/v120/DSP2833x_examples/spi_loopback/Example_2833xSpi_FFDLB.gel
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
-// TI File $Revision: /main/5 $
-// Checkin $Date: August 9, 2007   17:22:51 $
-//###########################################################################
-//
-// This .gel file can be used to help load and build the example project.
-// It should be unloaded from Code Composer Studio before loading another 
-// project. 
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-*/
-
-menuitem "DSP2833x SPI loopback"
-
-
-hotmenu Load_and_Build_Project()
-{
-   GEL_ProjectLoad("Example_2833xSpi_FFDLB.pjt");
-   GEL_ProjectBuild("Example_2833xSpi_FFDLB.pjt");
-   Setup_WatchWindow();
-}
-
-hotmenu Load_Code()
-{
-   GEL_Load(".\\debug\\Example_2833xSpi_FFDLB.out");
-   Setup_WatchWindow();
-}
-
-hotmenu Setup_WatchWindow()
-{
-   GEL_WatchReset();
-   GEL_WatchAdd("sdata,x");   
-   GEL_WatchAdd("rdata,x");
-   GEL_WatchAdd("SpiaRegs,x");
-}
-
-
diff --git a/Source/External/v120/DSP2833x_examples/spi_loopback/Example_2833xSpi_FFDLB.pjt b/Source/External/v120/DSP2833x_examples/spi_loopback/Example_2833xSpi_FFDLB.pjt
deleted file mode 100644
index e88dc66..0000000
--- a/Source/External/v120/DSP2833x_examples/spi_loopback/Example_2833xSpi_FFDLB.pjt
+++ /dev/null
@@ -1,45 +0,0 @@
-; Code Composer Project File, Version 2.0 (do not modify or remove this line)
-
-[Project Settings]
-ProjectName="DSP2833x"
-ProjectDir="C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\spi_loopback\"
-ProjectType=Executable
-CPUFamily=TMS320C28XX
-Tool="Compiler"
-Tool="DspBiosBuilder"
-Tool="Linker"
-Config="Debug"
-Config="Release"
-
-[Source Files]
-Source="..\..\DSP2833x_common\source\DSP2833x_ADC_cal.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CodeStartBranch.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_DefaultIsr.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieVect.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_Spi.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_SysCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_usDelay.asm"
-Source="..\..\DSP2833x_headers\source\DSP2833x_GlobalVariableDefs.c"
-Source="Example_2833xSpi_FFDLB.c"
-Source="..\..\DSP2833x_common\cmd\28335_RAM_lnk.cmd"
-Source="..\..\DSP2833x_headers\cmd\DSP2833x_Headers_nonBIOS.cmd"
-
-["Compiler" Settings: "Debug"]
-Options=-g -q -pdr -as -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\spi_loopback\Debug" -fs"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\spi_loopback\Debug" -i"..\..\DSP2833x_headers\include" -i"..\..\DSP2833x_common\include" -d"_DEBUG" -d"LARGE_MODEL" --float_support=fpu32 -ml -mt -v28
-
-["Compiler" Settings: "Release"]
-Options=-q -o3 -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\spi_loopback\Release" -d"LARGE_MODEL" -ml -v28
-
-["DspBiosBuilder" Settings: "Debug"]
-Options=-v28
-
-["DspBiosBuilder" Settings: "Release"]
-Options=-v28
-
-["Linker" Settings: "Debug"]
-Options=-q -c -ecode_start -m".\Debug\Example_2833xSpi_FFDLB.map" -o".\Debug\Example_2833xSpi_FFDLB.out" -stack0x380 -w -x -i"..\..\DSP2833x_headers\include" -l"rts2800_fpu32.lib"
-
-["Linker" Settings: "Release"]
-Options=-q -c -o".\Release\Example_2833xSpi_FFDLB.out" -x
-
diff --git a/Source/External/v120/DSP2833x_examples/spi_loopback_interrupts/Example_2833xSpi_FFDLB_int.c b/Source/External/v120/DSP2833x_examples/spi_loopback_interrupts/Example_2833xSpi_FFDLB_int.c
deleted file mode 100644
index 625b618..0000000
--- a/Source/External/v120/DSP2833x_examples/spi_loopback_interrupts/Example_2833xSpi_FFDLB_int.c
+++ /dev/null
@@ -1,238 +0,0 @@
-// TI File $Revision: /main/9 $
-// Checkin $Date: April 21, 2008   15:43:36 $
-//###########################################################################
-//
-// FILE:   Example_2833xSpi_FFDLB_int.c
-//
-// TITLE:  DSP2833x Device Spi Digital Loop Back with Interrupts Example.
-//
-// ASSUMPTIONS:
-//
-//    This program requires the DSP2833x header files.
-//
-//    This program uses the internal loop back test mode of the peripheral.
-//    Other then boot mode pin configuration, no other hardware configuration
-//    is required.
-//
-//    As supplied, this project is configured for "boot to SARAM"
-//    operation.  The 2833x Boot Mode table is shown below.
-//    For information on configuring the boot mode of an eZdsp,
-//    please refer to the documentation included with the eZdsp,
-//
-//       $Boot_Table:
-//
-//         GPIO87   GPIO86     GPIO85   GPIO84
-//          XA15     XA14       XA13     XA12
-//           PU       PU         PU       PU
-//        ==========================================
-//            1        1          1        1    Jump to Flash
-//            1        1          1        0    SCI-A boot
-//            1        1          0        1    SPI-A boot
-//            1        1          0        0    I2C-A boot
-//            1        0          1        1    eCAN-A boot
-//            1        0          1        0    McBSP-A boot
-//            1        0          0        1    Jump to XINTF x16
-//            1        0          0        0    Jump to XINTF x32
-//            0        1          1        1    Jump to OTP
-//            0        1          1        0    Parallel GPIO I/O boot
-//            0        1          0        1    Parallel XINTF boot
-//            0        1          0        0    Jump to SARAM	    <- "boot to SARAM"
-//            0        0          1        1    Branch to check boot mode
-//            0        0          1        0    Boot to flash, bypass ADC cal
-//            0        0          0        1    Boot to SARAM, bypass ADC cal
-//            0        0          0        0    Boot to SCI-A, bypass ADC cal
-//                                              Boot_Table_End$
-//
-// DESCRIPTION:
-//
-//    This program is a SPI-A example that uses the internal loopback of
-//    the peripheral.  Both interrupts and the SPI FIFOs are used.
-//
-//    A stream of data is sent and then compared to the recieved stream.
-//
-//    The sent data looks like this:
-//    0000 0001 0002 0003 0004 0005 0006 0007
-//    0001 0002 0003 0004 0005 0006 0007 0008
-//    0002 0003 0004 0005 0006 0007 0008 0009
-//    ....
-//    FFFE FFFF 0000 0001 0002 0003 0004 0005
-//    FFFF 0000 0001 0002 0003 0004 0005 0006
-//     etc..
-//
-//    This pattern is repeated forever.
-//
-//
-// Watch Variables:
-//     sdata[8]    - Data to send
-//     rdata[8]    - Received data
-//     rdata_point - Used to keep track of the last position in
-//                   the receive stream for error checking
-//###########################################################################
-//
-// Original Source by S.D.
-//
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File
-
-// Prototype statements for functions found within this file.
-// interrupt void ISRTimer2(void);
-interrupt void spiTxFifoIsr(void);
-interrupt void spiRxFifoIsr(void);
-void delay_loop(void);
-void spi_fifo_init(void);
-void error();
-
-Uint16 sdata[8];     // Send data buffer
-Uint16 rdata[8];     // Receive data buffer
-Uint16 rdata_point;  // Keep track of where we are
-                     // in the data stream to check received data
-
-void main(void)
-{
-   Uint16 i;
-
-// Step 1. Initialize System Control:
-// PLL, WatchDog, enable Peripheral Clocks
-// This example function is found in the DSP2833x_SysCtrl.c file.
-   InitSysCtrl();
-
-// Step 2. Initalize GPIO:
-// This example function is found in the DSP2833x_Gpio.c file and
-// illustrates how to set the GPIO to it's default state.
-// InitGpio();  // Skipped for this example
-// Setup only the GP I/O only for SPI-A functionality
-   InitSpiaGpio();
-
-// Step 3. Initialize PIE vector table:
-// Disable and clear all CPU interrupts
-   DINT;
-   IER = 0x0000;
-   IFR = 0x0000;
-
-// Initialize PIE control registers to their default state:
-// This function is found in the DSP2833x_PieCtrl.c file.
-   InitPieCtrl();
-
-// Initialize the PIE vector table with pointers to the shell Interrupt
-// Service Routines (ISR).
-// This will populate the entire table, even if the interrupt
-// is not used in this example.  This is useful for debug purposes.
-// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
-// This function is found in DSP2833x_PieVect.c.
-   InitPieVectTable();
-
-// Interrupts that are used in this example are re-mapped to
-// ISR functions found within this file.
-   EALLOW;	// This is needed to write to EALLOW protected registers
-   PieVectTable.SPIRXINTA = &spiRxFifoIsr;
-   PieVectTable.SPITXINTA = &spiTxFifoIsr;
-   EDIS;   // This is needed to disable write to EALLOW protected registers
-
-
-// Step 4. Initialize all the Device Peripherals:
-// This function is found in DSP2833x_InitPeripherals.c
-// InitPeripherals(); // Not required for this example
-   spi_fifo_init();	  // Initialize the SPI only
-
-
-// Step 5. User specific code, enable interrupts:
-
-// Initalize the send data buffer
-   for(i=0; i<8; i++)
-   {
-      sdata[i] = i;
-   }
-   rdata_point = 0;
-
-// Enable interrupts required for this example
-   PieCtrlRegs.PIECTRL.bit.ENPIE = 1;   // Enable the PIE block
-   PieCtrlRegs.PIEIER6.bit.INTx1=1;     // Enable PIE Group 6, INT 1
-   PieCtrlRegs.PIEIER6.bit.INTx2=1;     // Enable PIE Group 6, INT 2
-   IER=0x20;                            // Enable CPU INT6
-   EINT;                                // Enable Global Interrupts
-
-// Step 6. IDLE loop. Just sit and loop forever (optional):
-	for(;;);
-
-}
-
-
-// Some Useful local functions
-void delay_loop()
-{
-    long      i;
-    for (i = 0; i < 1000000; i++) {}
-}
-
-
-void error(void)
-{
-    asm("     ESTOP0");	 //Test failed!! Stop!
-    for (;;);
-}
-
-
-void spi_fifo_init()
-{
-// Initialize SPI FIFO registers
-   SpiaRegs.SPICCR.bit.SPISWRESET=0; // Reset SPI
-
-   SpiaRegs.SPICCR.all=0x001F;       //16-bit character, Loopback mode
-   SpiaRegs.SPICTL.all=0x0017;       //Interrupt enabled, Master/Slave XMIT enabled
-   SpiaRegs.SPISTS.all=0x0000;
-   SpiaRegs.SPIBRR=0x0063;           // Baud rate
-   SpiaRegs.SPIFFTX.all=0xC028;      // Enable FIFO's, set TX FIFO level to 8
-   SpiaRegs.SPIFFRX.all=0x0028;      // Set RX FIFO level to 8
-   SpiaRegs.SPIFFCT.all=0x00;
-   SpiaRegs.SPIPRI.all=0x0010;
-
-   SpiaRegs.SPICCR.bit.SPISWRESET=1;  // Enable SPI
-
-   SpiaRegs.SPIFFTX.bit.TXFIFO=1;
-   SpiaRegs.SPIFFRX.bit.RXFIFORESET=1;
-}
-
-interrupt void spiTxFifoIsr(void)
-{
- 	Uint16 i;
-    for(i=0;i<8;i++)
-    {
- 	   SpiaRegs.SPITXBUF=sdata[i];      // Send data
-    }
-
-    for(i=0;i<8;i++)                    // Increment data for next cycle
-    {
- 	   sdata[i]++;
-    }
-
-
-    SpiaRegs.SPIFFTX.bit.TXFFINTCLR=1;  // Clear Interrupt flag
-	PieCtrlRegs.PIEACK.all|=0x20;  		// Issue PIE ACK
-}
-
-interrupt void spiRxFifoIsr(void)
-{
-    Uint16 i;
-    for(i=0;i<8;i++)
-    {
-	    rdata[i]=SpiaRegs.SPIRXBUF;		// Read data
-	}
-	for(i=0;i<8;i++)                    // Check received data
-	{
-	    if(rdata[i] != rdata_point+i) error();
-	}
-	rdata_point++;
-	SpiaRegs.SPIFFRX.bit.RXFFOVFCLR=1;  // Clear Overflow flag
-	SpiaRegs.SPIFFRX.bit.RXFFINTCLR=1; 	// Clear Interrupt flag
-	PieCtrlRegs.PIEACK.all|=0x20;       // Issue PIE ack
-}
-
-
-
-//===========================================================================
-// No more.
-//===========================================================================
-
diff --git a/Source/External/v120/DSP2833x_examples/spi_loopback_interrupts/Example_2833xSpi_FFDLB_int.gel b/Source/External/v120/DSP2833x_examples/spi_loopback_interrupts/Example_2833xSpi_FFDLB_int.gel
deleted file mode 100644
index b0204c9..0000000
--- a/Source/External/v120/DSP2833x_examples/spi_loopback_interrupts/Example_2833xSpi_FFDLB_int.gel
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
-// TI File $Revision: /main/5 $
-// Checkin $Date: August 9, 2007   17:23:39 $
-//###########################################################################
-//
-// This .gel file can be used to help load and build the example project.
-// It should be unloaded from Code Composer Studio before loading another 
-// project. 
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-*/
-
-menuitem "DSP2833x SPI Int"
-
-hotmenu Load_and_Build_Project()
-{
-   GEL_ProjectLoad("Example_2833xSpi_FFDLB_int.pjt");
-   GEL_ProjectBuild("Example_2833xSpi_FFDLB_int.pjt");
-   Setup_WatchWindow();
-}
-
-hotmenu Load_Code()
-{
-   GEL_Load(".\\debug\\Example_2833xSpi_FFDLB_int.out");
-   Setup_WatchWindow();
-}
-
-hotmenu Setup_WatchWindow()
-{
-   GEL_WatchReset();
-   GEL_WatchAdd("sdata,x");
-   GEL_WatchAdd("rdata,x");
-   GEL_WatchAdd("rdata_point,x");
-   GEL_WatchAdd("SpiaRegs,x");
-}
-
-
diff --git a/Source/External/v120/DSP2833x_examples/spi_loopback_interrupts/Example_2833xSpi_FFDLB_int.pjt b/Source/External/v120/DSP2833x_examples/spi_loopback_interrupts/Example_2833xSpi_FFDLB_int.pjt
deleted file mode 100644
index 10b6b8e..0000000
--- a/Source/External/v120/DSP2833x_examples/spi_loopback_interrupts/Example_2833xSpi_FFDLB_int.pjt
+++ /dev/null
@@ -1,45 +0,0 @@
-; Code Composer Project File, Version 2.0 (do not modify or remove this line)
-
-[Project Settings]
-ProjectName="DSP2833x"
-ProjectDir="C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\spi_loopback_interrupts\"
-ProjectType=Executable
-CPUFamily=TMS320C28XX
-Tool="Compiler"
-Tool="DspBiosBuilder"
-Tool="Linker"
-Config="Debug"
-Config="Release"
-
-[Source Files]
-Source="..\..\DSP2833x_common\source\DSP2833x_ADC_cal.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CodeStartBranch.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_DefaultIsr.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieVect.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_Spi.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_SysCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_usDelay.asm"
-Source="..\..\DSP2833x_headers\source\DSP2833x_GlobalVariableDefs.c"
-Source="Example_2833xSpi_FFDLB_int.c"
-Source="..\..\DSP2833x_common\cmd\28335_RAM_lnk.cmd"
-Source="..\..\DSP2833x_headers\cmd\DSP2833x_Headers_nonBIOS.cmd"
-
-["Compiler" Settings: "Debug"]
-Options=-g -q -pdr -as -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\spi_loopback_interrupts\Debug" -fs"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\spi_loopback_interrupts\Debug" -i"..\..\DSP2833x_headers\include" -i"..\..\DSP2833x_common\include" -d"_DEBUG" -d"LARGE_MODEL" --float_support=fpu32 -ml -mt -v28
-
-["Compiler" Settings: "Release"]
-Options=-q -o3 -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\spi_loopback_interrupts\Release" -d"LARGE_MODEL" -ml -v28
-
-["DspBiosBuilder" Settings: "Debug"]
-Options=-v28
-
-["DspBiosBuilder" Settings: "Release"]
-Options=-v28
-
-["Linker" Settings: "Debug"]
-Options=-q -c -ecode_start -m".\Debug\Example_2833xSpi_FFDLB_int.map" -o".\Debug\Example_2833xSpi_FFDLB_int.out" -stack0x380 -w -x -i"..\..\DSP2833x_headers\include" -l"rts2800_fpu32.lib"
-
-["Linker" Settings: "Release"]
-Options=-q -c -o".\Release\Example_2833xSpi_FFDLB_int.out" -x
-
diff --git a/Source/External/v120/DSP2833x_examples/sw_prioritized_interrupts/Example_2833xSWPrioritizedDefaultIsr.c b/Source/External/v120/DSP2833x_examples/sw_prioritized_interrupts/Example_2833xSWPrioritizedDefaultIsr.c
deleted file mode 100644
index b039033..0000000
--- a/Source/External/v120/DSP2833x_examples/sw_prioritized_interrupts/Example_2833xSWPrioritizedDefaultIsr.c
+++ /dev/null
@@ -1,1879 +0,0 @@
-// TI File $Revision: /main/10 $
-// Checkin $Date: April 21, 2008   15:43:40 $
-//###########################################################################
-//
-// FILE:    Example_2833xSWPrioritizedDefaultIsr.c
-//
-// TITLE:   DSP2833x Device Default Software Prioritized Interrupt Service Routines.
-//
-//          This file is based on the standard DSP2833x_SWPrioritizedDefaultIsr.c
-//          The ISR routines have been modified slightly to provide a trace
-//          mechanism used for this example
-//
-//###########################################################################
-//
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-
-#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File
-#include "DSP2833x_SWPrioritizedIsrLevels.h"
-
-// Defined in the Example_28xSWPrioritizedInterrupts.c file
-// for this example only
-extern Uint16 ISRTrace[50];
-extern Uint16 ISRTraceIndex;
-
-// Used for ISR delays
-Uint16 i;
-
-
-// Connected to INT13 of CPU (use MINT13 mask):
-// Note CPU-Timer1 is reserved for TI use, however XINT13
-// ISR can be used by the user.
-#if (INT13PL != 0)
-interrupt void INT13_ISR(void)     // INT13 or CPU-Timer1
-{
-	 IER |= MINT13;                 // Set "global" priority
-	 EINT;
-
-  // Insert ISR Code here
-
-  // Next two lines for debug only to halt the processor here
-  // Remove after inserting ISR Code
-     asm ("      ESTOP0");
-     for(;;);
-}
-#endif
-
-// Connected to INT14 of CPU (use MINT14 mask):
-#if (INT14PL != 0)
-interrupt void INT14_ISR(void)     // CPU-Timer2
-{
-   IER |= MINT14;                  // Set "global" priority
-   EINT;
-
-   // Insert ISR Code here.......
-
-   // Next two lines for debug only to halt the processor here
-   // Remove after inserting ISR Code
-   asm ("      ESTOP0");
-   for(;;);
-}
-#endif
-
-// Connected to int15 of CPU (use MINT15 mask):
-#if (INT15PL != 0)
-interrupt void DATALOG_ISR(void)   // Datalogging interrupt
-{
-	IER |= MINT15;                 // Set "global" priority
-	EINT;
-
-  	// Insert ISR Code here.......
-
-    // Next two lines for debug only to halt the processor here
-    // Remove after inserting ISR Code
-    asm ("      ESTOP0");
-    for(;;);
-}
-#endif
-
-// Connected to int16 of CPU (use MINT16 mask):
-#if (INT16PL != 0)
-interrupt void RTOSINT_ISR(void)   // RTOS interrupt
-{
-	IER |= MINT16;                 // Set "global" priority
-	EINT;
-
-  	// Insert ISR Code here.......
-
-    // Next two lines for debug only to halt the processor here
-    // Remove after inserting ISR Code
-    asm ("      ESTOP0");
-    for(;;);
-}
-#endif
-
-// Connected to EMUINT of CPU (non-maskable):
-interrupt void EMUINT_ISR(void)    // Emulation interrupt
-{
-	EINT;
-
-  	// Insert ISR Code here.......
-
-    // Next two lines for debug only to halt the processor here
-    // Remove after inserting ISR Code
-    asm ("      ESTOP0");
-    for(;;);
-}
-
-
-// Connected to NMI of CPU (non-maskable):
-interrupt void NMI_ISR(void)      // Non-maskable interrupt
-{
-	EINT;
-
-  	// Insert ISR Code here.......
-
-    // Next two lines for debug only to halt the processor here
-    // Remove after inserting ISR Code
-    asm ("      ESTOP0");
-    for(;;);
-}
-
-// Connected to ITRAP of CPU (non-maskable):
-interrupt void ILLEGAL_ISR(void)   // Illegal operation TRAP
-{
-	EINT;
-
-  	// Insert ISR Code here.......
-
-    // Next two lines for debug only to halt the processor here
-    // Remove after inserting ISR Code
-    asm ("      ESTOP0");
-    for(;;);
-}
-
-// Connected to USER1 of CPU (non-maskable):
-interrupt void USER1_ISR(void)     // User Defined trap 1
-{
-	EINT;
-
-  	// Insert ISR Code here.......
-
-    // Next two lines for debug only to halt the processor here
-    // Remove after inserting ISR Code
-    asm ("      ESTOP0");
-    for(;;);
-}
-
-// Connected to USER2 of CPU (non-maskable):
-interrupt void USER2_ISR(void)     // User Defined trap 2
-{
-	EINT;
-
-  	// Insert ISR Code here.......
-
-    // Next two lines for debug only to halt the processor here
-    // Remove after inserting ISR Code
-    asm ("      ESTOP0");
-    for(;;);
-}
-
-// Connected to USER3 of CPU (non-maskable):
-interrupt void USER3_ISR(void)     // User Defined trap 3
-{
-	EINT;
-
-  	// Insert ISR Code here.......
-
-    // Next two lines for debug only to halt the processor here
-    // Remove after inserting ISR Code
-    asm ("      ESTOP0");
-    for(;;);
-}
-
-// Connected to USER4 of CPU (non-maskable):
-interrupt void USER4_ISR(void)     // User Defined trap 4
-{
-	EINT;
-
-  	// Insert ISR Code here.......
-
-    // Next two lines for debug only to halt the processor here
-    // Remove after inserting ISR Code
-    asm ("      ESTOP0");
-    for(;;);
-}
-
-// Connected to USER5 of CPU (non-maskable):
-interrupt void USER5_ISR(void)     // User Defined trap 5
-{
-	EINT;
-
-  	// Insert ISR Code here.......
-
-    // Next two lines for debug only to halt the processor here
-    // Remove after inserting ISR Code
-    asm ("      ESTOP0");
-    for(;;);
-}
-
-// Connected to USER6 of CPU (non-maskable):
-interrupt void USER6_ISR(void)     // User Defined trap 6
-{
-	EINT;
-
-  	// Insert ISR Code here.......
-
-    // Next two lines for debug only to halt the processor here
-    // Remove after inserting ISR Code
-    asm ("      ESTOP0");
-    for(;;);
-}
-
-// Connected to USER7 of CPU (non-maskable):
-interrupt void USER7_ISR(void)     // User Defined trap 7
-{
-	EINT;
-
-  	// Insert ISR Code here.......
-
-    // Next two lines for debug only to halt the processor here
-    // Remove after inserting ISR Code
-    asm ("      ESTOP0");
-    for(;;);
-}
-
-// Connected to USER8 of CPU (non-maskable):
-interrupt void USER8_ISR(void)     // User Defined trap 8
-{
-	EINT;
-
-  	// Insert ISR Code here.......
-
-    // Next two lines for debug only to halt the processor here
-    // Remove after inserting ISR Code
-    asm ("      ESTOP0");
-    for(;;);
-}
-
-// Connected to USER9 of CPU (non-maskable):
-interrupt void USER9_ISR(void)     // User Defined trap 9
-{
-	EINT;
-
-  	// Insert ISR Code here.......
-
-    // Next two lines for debug only to halt the processor here
-    // Remove after inserting ISR Code
-    asm ("      ESTOP0");
-    for(;;);
-}
-
-// Connected to USER10 of CPU (non-maskable):
-interrupt void USER10_ISR(void)    // User Defined trap 10
-{
-	EINT;
-
-  	// Insert ISR Code here.......
-
-    // Next two lines for debug only to halt the processor here
-    // Remove after inserting ISR Code
-    asm ("      ESTOP0");
-    for(;;);
-}
-
-// Connected to USER11 of CPU (non-maskable):
-interrupt void USER11_ISR(void)    // User Defined trap 11
-{
-	EINT;
-
-  	// Insert ISR Code here.......
-
-    // Next two lines for debug only to halt the processor here
-    // Remove after inserting ISR Code
-    asm ("      ESTOP0");
-    for(;;);
-}
-
-// Connected to USER12 of CPU (non-maskable):
-interrupt void USER12_ISR(void)     // User Defined trap 12
-{
-	EINT;
-
-  	// Insert ISR Code here.......
-
-    // Next two lines for debug only to halt the processor here
-    // Remove after inserting ISR Code
-    asm ("      ESTOP0");
-    for(;;);
-}
-
-
-// -----------------------------------------------------------
-// PIE Group 1 - MUXed into CPU INT1
-// -----------------------------------------------------------
-
-// Connected to PIEIER1_1 (use MINT1 and MG11 masks):
-#if (G11PL != 0)
-interrupt void SEQ1INT_ISR( void )     // ADC
-{
-	// Set interrupt priority:
-	volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER1.all;
-	IER |= M_INT1;
-	IER	&= MINT1;	  	               // Set "global" priority
-	PieCtrlRegs.PIEIER1.all &= MG11;   // Set "group"  priority
-	PieCtrlRegs.PIEACK.all = 0xFFFF;   // Enable PIE interrupts
-	EINT;
-
-  	// Insert ISR Code here.......
-    for(i = 1; i <= 10; i++) {}
-
-	// Restore registers saved:
-	DINT;
-	PieCtrlRegs.PIEIER1.all = TempPIEIER;
-
-    //  Add ISR to Trace
-    ISRTrace[ISRTraceIndex] = 0x0011;
-    ISRTraceIndex++;
-
-}
-#endif
-
-// Connected to PIEIER1_2 (use MINT1 and MG12 masks):
-#if (G12PL != 0)
-interrupt void SEQ2INT_ISR( void )    // ADC
-{
-	// Set interrupt priority:
-	volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER1.all;
-	IER |= M_INT1;
-	IER	&= MINT1;	  	               // Set "global" priority
-	PieCtrlRegs.PIEIER1.all &= MG12;   // Set "group"  priority
-	PieCtrlRegs.PIEACK.all = 0xFFFF;   // Enable PIE interrupts
-	EINT;
-
-  	// Insert ISR Code here.......
-    for(i = 1; i <= 10; i++) {}
-
-	// Restore registers saved:
-	DINT;
-	PieCtrlRegs.PIEIER1.all = TempPIEIER;
-
-    //  Add ISR to Trace
-    ISRTrace[ISRTraceIndex] = 0x0012;
-    ISRTraceIndex++;
-
-}
-#endif
-
-
-// Connected to PIEIER1_4 (use MINT1 and MG14 masks):
-#if (G14PL != 0)
-interrupt void  XINT1_ISR(void)
-{
-	// Set interrupt priority:
-	volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER1.all;
-	IER |= M_INT1;
-	IER	&= MINT1;	  	               // Set "global" priority
-	PieCtrlRegs.PIEIER1.all &= MG14;   // Set "group"  priority
-	PieCtrlRegs.PIEACK.all = 0xFFFF;   // Enable PIE interrupts
-	EINT;
-
-  	// Insert ISR Code here.......
-
-      asm("      NOP");
-
-	// Restore registers saved:
-	DINT;
-	PieCtrlRegs.PIEIER1.all = TempPIEIER;
-
-    //  Add ISR to Trace
-    ISRTrace[ISRTraceIndex] = 0x0014;
-    ISRTraceIndex++;
-}
-#endif
-
-// Connected to PIEIER1_5 (use MINT1 and MG15 masks):
-#if (G15PL != 0)
-interrupt void  XINT2_ISR(void)
-{
-	// Set interrupt priority:
-	volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER1.all;
-	IER |= M_INT1;
-	IER	&= MINT1;	  	               // Set "global" priority
-	PieCtrlRegs.PIEIER1.all &= MG15;   // Set "group"  priority
-	PieCtrlRegs.PIEACK.all = 0xFFFF;   // Enable PIE interrupts
-	EINT;
-
-  	// Insert ISR Code here.......
-    for(i = 1; i <= 10; i++) {}
-
-	// Restore registers saved:
-	DINT;
-	PieCtrlRegs.PIEIER1.all = TempPIEIER;
-
-    //  Add ISR to Trace
-    ISRTrace[ISRTraceIndex] = 0x0015;
-    ISRTraceIndex++;
-}
-#endif
-
-
-// Connected to PIEIER1_6 (use MINT1 and MG16 masks):
-#if (G16PL != 0)
-interrupt void  ADCINT_ISR(void)     // ADC
-{
-	// Set interrupt priority:
-	volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER1.all;
-	IER |= M_INT1;
-	IER	&= MINT1;                      // Set "global" priority
-	PieCtrlRegs.PIEIER1.all &= MG16;   // Set "group"  priority
-	PieCtrlRegs.PIEACK.all = 0xFFFF;   // Enable PIE interrupts
-	EINT;
-
-  	// Insert ISR Code here.......
-   for(i = 1; i <= 10; i++) {}
-
-	// Restore registers saved:
-	DINT;
-	PieCtrlRegs.PIEIER1.all = TempPIEIER;
-
-    //  Add ISR to Trace
-    ISRTrace[ISRTraceIndex] = 0x0016;
-    ISRTraceIndex++;
-
-}
-#endif
-
-// Connected to PIEIER1_7 (use MINT1 and MG17 masks):
-#if (G17PL != 0)
-interrupt void  TINT0_ISR(void)      // CPU-Timer 0
-{
-	// Set interrupt priority:
-	volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER1.all;
-	IER |= M_INT1;
-	IER	&= MINT1;	  	               // Set "global" priority
-	PieCtrlRegs.PIEIER1.all &= MG17;   // Set "group"  priority
-	PieCtrlRegs.PIEACK.all = 0xFFFF;   // Enable PIE interrupts
-	EINT;
-
-  	// Insert ISR Code here.......
-    for(i = 1; i <= 10; i++) {}
-
-	// Restore registers saved:
-	DINT;
-	PieCtrlRegs.PIEIER1.all = TempPIEIER;
-
-    //  Add ISR to Trace
-    ISRTrace[ISRTraceIndex] = 0x0017;
-    ISRTraceIndex++;
-}
-#endif
-
-// Connected to PIEIER1_8 (use MINT1 and MG18 masks):
-#if (G18PL != 0)
-interrupt void  WAKEINT_ISR(void)      // WD/LPM
-{
-	// Set interrupt priority:
-	volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER1.all;
-	IER |= M_INT1;
-	IER	&= MINT1;	  	               // Set "global" priority
-	PieCtrlRegs.PIEIER1.all &= MG18;   // Set "group"  priority
-	PieCtrlRegs.PIEACK.all = 0xFFFF;   // Enable PIE interrupts
-	EINT;
-
-  	// Insert ISR Code here.......
-    for(i = 1; i <= 10; i++) {}
-
-	// Restore registers saved:
-	DINT;
-	PieCtrlRegs.PIEIER1.all = TempPIEIER;
-
-    //  Add ISR to Trace
-    ISRTrace[ISRTraceIndex] = 0x0018;
-    ISRTraceIndex++;
-}
-#endif
-
-
-// -----------------------------------------------------------
-// PIE Group 2 - MUXed into CPU INT2
-// -----------------------------------------------------------
-
-// Connected to PIEIER2_1 (use MINT2 and MG21 masks):
-#if (G21PL != 0)
-interrupt void EPWM1_TZINT_ISR(void)    // ePWM1 Trip Zone
-{
-	// Set interrupt priority:
-	volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER2.all;
-	IER |= M_INT2;
-	IER	&= MINT2;	  	               // Set "global" priority
-	PieCtrlRegs.PIEIER2.all &= MG21;   // Set "group"  priority
-	PieCtrlRegs.PIEACK.all = 0xFFFF;   // Enable PIE interrupts
-	EINT;
-
-  	// Insert ISR Code here.......
-    for(i = 1; i <= 10; i++) {}
-
-	// Restore registers saved:
-	DINT;
-	PieCtrlRegs.PIEIER2.all = TempPIEIER;
-
-    //Add ISR to Trace
-    ISRTrace[ISRTraceIndex] = 0x0021;
-    ISRTraceIndex++;
-}
-#endif
-
-// Connected to PIEIER2_2 (use MINT2 and MG22 masks):
-#if (G22PL != 0)
-interrupt void EPWM2_TZINT_ISR(void)    // ePWM2 Trip Zone
-{
-	// Set interrupt priority:
-	volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER2.all;
-	IER |= M_INT2;
-	IER	&= MINT2;	  	               // Set "global" priority
-	PieCtrlRegs.PIEIER2.all &= MG22;   // Set "group"  priority
-	PieCtrlRegs.PIEACK.all = 0xFFFF;   // Enable PIE interrupts
-	EINT;
-
-  	// Insert ISR Code here.......
-    for(i = 1; i <= 10; i++) {}
-
-	// Restore registers saved:
-	DINT;
-	PieCtrlRegs.PIEIER2.all = TempPIEIER;
-
-    //  Add ISR to Trace
-    ISRTrace[ISRTraceIndex] = 0x0022;
-    ISRTraceIndex++;
-
-}
-#endif
-
-// Connected to PIEIER2_3 (use MINT2 and MG23 masks):
-#if (G23PL != 0)
-interrupt void EPWM3_TZINT_ISR(void)    // ePWM3 Trip Zone
-{
-	// Set interrupt priority:
-	volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER2.all;
-	IER |= M_INT2;
-	IER	&= MINT2;	  	               // Set "global" priority
-	PieCtrlRegs.PIEIER2.all &= MG23;   // Set "group"  priority
-	PieCtrlRegs.PIEACK.all = 0xFFFF;   // Enable PIE interrupts
-	EINT;
-
-  	// Insert ISR Code here.......
-    for(i = 1; i <= 10; i++) {}
-
-	// Restore registers saved:
-	DINT;
-	PieCtrlRegs.PIEIER2.all = TempPIEIER;
-
-    //  Add ISR to Trace
-    ISRTrace[ISRTraceIndex] = 0x0023;
-    ISRTraceIndex++;
-
-}
-#endif
-
-// Connected to PIEIER2_4 (use MINT2 and MG24 masks):
-#if (G24PL != 0)
-interrupt void EPWM4_TZINT_ISR(void)    // ePWM4 Trip Zone
-{
-	// Set interrupt priority:
-	volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER2.all;
-	IER |= M_INT2;
-	IER	&= MINT2;	  	                // Set "global" priority
-	PieCtrlRegs.PIEIER2.all &= MG24;    // Set "group"  priority
-	PieCtrlRegs.PIEACK.all = 0xFFFF;    // Enable PIE interrupts
-	EINT;
-
-  	// Insert ISR Code here.......
-    for(i = 1; i <= 10; i++) {}
-
-	// Restore registers saved:
-	DINT;
-	PieCtrlRegs.PIEIER2.all = TempPIEIER;
-
-    //  Add ISR to Trace
-    ISRTrace[ISRTraceIndex] = 0x0024;
-    ISRTraceIndex++;
-
-}
-#endif
-
-// Connected to PIEIER2_5 (use MINT2 and MG25 masks):
-#if (G25PL != 0)
-interrupt void EPWM5_TZINT_ISR(void)    // ePWM5 Trip Zone
-{
-	// Set interrupt priority:
-	volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER2.all;
-	IER |= M_INT2;
-	IER	&= MINT2;	  	                // Set "global" priority
-	PieCtrlRegs.PIEIER2.all &= MG25;    // Set "group"  priority
-	PieCtrlRegs.PIEACK.all = 0xFFFF;    // Enable PIE interrupts
-	EINT;
-
-  	// Insert ISR Code here.......
-    for(i = 1; i <= 10; i++) {}
-
-	// Restore registers saved:
-	DINT;
-	PieCtrlRegs.PIEIER2.all = TempPIEIER;
-
-    //  Add ISR to Trace
-    ISRTrace[ISRTraceIndex] = 0x0025;
-    ISRTraceIndex++;
-
-}
-#endif
-
-// Connected to PIEIER2_6 (use MINT2 and MG26 masks):
-#if (G26PL != 0)
-interrupt void EPWM6_TZINT_ISR(void)    // ePWM6 Trip Zone
-{
-	// Set interrupt priority:
-	volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER2.all;
-	IER |= M_INT2;
-	IER	&= MINT2;	  	                // Set "global" priority
-	PieCtrlRegs.PIEIER2.all &= MG26;    // Set "group"  priority
-	PieCtrlRegs.PIEACK.all = 0xFFFF;    // Enable PIE interrupts
-	EINT;
-
-  	// Insert ISR Code here.......
-    for(i = 1; i <= 10; i++) {}
-
-	// Restore registers saved:
-	DINT;
-	PieCtrlRegs.PIEIER2.all = TempPIEIER;
-
-    //  Add ISR to Trace
-    ISRTrace[ISRTraceIndex] = 0x0026;
-    ISRTraceIndex++;
-
-}
-#endif
-
-
-// -----------------------------------------------------------
-// PIE Group 3 - MUXed into CPU INT3
-// -----------------------------------------------------------
-
-
-// Connected to PIEIER3_1 (use MINT3 and MG31 masks):
-#if (G31PL != 0)
-interrupt void EPWM1_INT_ISR(void)     // ePWM1 Interrupt
-{
-	// Set interrupt priority:
-	volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER3.all;
-	IER |= M_INT3;
-	IER	&= MINT3;	  	               // Set "global" priority
-	PieCtrlRegs.PIEIER3.all &= MG31;   // Set "group"  priority
-	PieCtrlRegs.PIEACK.all = 0xFFFF;   // Enable PIE interrupts
-	EINT;
-
-  	// Insert ISR Code here.......
-    for(i = 1; i <= 10; i++) {}
-
-	// Restore registers saved:
-	DINT;
-	PieCtrlRegs.PIEIER3.all = TempPIEIER;
-
-    //  Add ISR to Trace
-    ISRTrace[ISRTraceIndex] = 0x0031;
-    ISRTraceIndex++;
-}
-#endif
-
-// Connected to PIEIER3_2 (use MINT3 and MG32 masks):
-#if (G32PL != 0)
-interrupt void EPWM2_INT_ISR(void)     // ePWM2 Interrupt
-{
-	// Set interrupt priority:
-	volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER3.all;
-	IER |= M_INT3;
-	IER	&= MINT3;	  	               // Set "global" priority
-	PieCtrlRegs.PIEIER3.all &= MG32;   // Set "group"  priority
-	PieCtrlRegs.PIEACK.all = 0xFFFF;   // Enable PIE interrupts
-	EINT;
-
-  	// Insert ISR Code here.......
-    for(i = 1; i <= 10; i++) {}
-
-	// Restore registers saved:
-	DINT;
-	PieCtrlRegs.PIEIER3.all = TempPIEIER;
-
-    //  Add ISR to Trace
-    ISRTrace[ISRTraceIndex] = 0x0032;
-    ISRTraceIndex++;
-
-}
-#endif
-
-// Connected to PIEIER3_3 (use MINT3 and MG33 masks):
-#if (G33PL != 0)
-interrupt void EPWM3_INT_ISR(void)     // ePWM3 Interrupt
-{
-	// Set interrupt priority:
-	volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER3.all;
-	IER |= M_INT3;
-	IER	&= MINT3;	  	                // Set "global" priority
-	PieCtrlRegs.PIEIER3.all &= MG33;   // Set "group"  priority
-	PieCtrlRegs.PIEACK.all = 0xFFFF;   // Enable PIE interrupts
-	EINT;
-
-  	// Insert ISR Code here.......
-    for(i = 1; i <= 10; i++) {}
-
-	// Restore registers saved:
-	DINT;
-	PieCtrlRegs.PIEIER3.all = TempPIEIER;
-
-    //  Add ISR to Trace
-    ISRTrace[ISRTraceIndex] = 0x0033;
-    ISRTraceIndex++;
-
-}
-#endif
-
-// Connected to PIEIER3_4 (use MINT3 and MG34 masks):
-#if (G34PL != 0)
-interrupt void EPWM4_INT_ISR(void)     // ePWM4 Interrupt
-{
-	// Set interrupt priority:
-	volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER3.all;
-	IER |= M_INT3;
-	IER	&= MINT3;	  	               // Set "global" priority
-	PieCtrlRegs.PIEIER3.all &= MG34;   // Set "group"  priority
-	PieCtrlRegs.PIEACK.all = 0xFFFF;   // Enable PIE interrupts
-	EINT;
-
-  	// Insert ISR Code here.......
-    for(i = 1; i <= 10; i++) {}
-
-	// Restore registers saved:
-	DINT;
-	PieCtrlRegs.PIEIER3.all = TempPIEIER;
-
-    //  Add ISR to Trace
-    ISRTrace[ISRTraceIndex] = 0x0034;
-    ISRTraceIndex++;
-
-}
-#endif
-
-// Connected to PIEIER3_5 (use MINT3 and MG35 masks):
-#if (G35PL != 0)
-interrupt void EPWM5_INT_ISR(void)     // ePWM5 Interrupt
-{
-	// Set interrupt priority:
-	volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER3.all;
-	IER |= M_INT3;
-	IER	&= MINT3;	  	               // Set "global" priority
-	PieCtrlRegs.PIEIER3.all &= MG35;   // Set "group"  priority
-	PieCtrlRegs.PIEACK.all = 0xFFFF;   // Enable PIE interrupts
-	EINT;
-
-  	// Insert ISR Code here.......
-    for(i = 1; i <= 10; i++) {}
-
-	// Restore registers saved:
-	DINT;
-	PieCtrlRegs.PIEIER3.all = TempPIEIER;
-
-    //  Add ISR to Trace
-    ISRTrace[ISRTraceIndex] = 0x0035;
-    ISRTraceIndex++;
-
-}
-#endif
-
-// Connected to PIEIER3_6 (use MINT3 and MG36 masks):
-#if (G36PL != 0)
-interrupt void EPWM6_INT_ISR(void)     // ePWM6 Interrupt
-{
-	// Set interrupt priority:
-	volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER3.all;
-	IER |= M_INT3;
-	IER	&= MINT3;	  	               // Set "global" priority
-	PieCtrlRegs.PIEIER3.all &= MG36;   // Set "group"  priority
-	PieCtrlRegs.PIEACK.all = 0xFFFF;   // Enable PIE interrupts
-	EINT;
-
-  	// Insert ISR Code here.......
-    for(i = 1; i <= 10; i++) {}
-
-	// Restore registers saved:
-	DINT;
-	PieCtrlRegs.PIEIER3.all = TempPIEIER;
-
-    //  Add ISR to Trace
-    ISRTrace[ISRTraceIndex] = 0x0036;
-    ISRTraceIndex++;
-
-}
-#endif
-
-
-// -----------------------------------------------------------
-// PIE Group 4 - MUXed into CPU INT4
-// -----------------------------------------------------------
-
-
-// Connected to PIEIER4_1 (use MINT4 and MG41 masks):
-#if (G41PL != 0)
-interrupt void ECAP1_INT_ISR(void)     // eCAP1 Interrupt
-{
-	// Set interrupt priority:
-	volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER4.all;
-	IER |= M_INT4;
-	IER	&= MINT4;	  	               // Set "global" priority
-	PieCtrlRegs.PIEIER4.all &= MG41;   // Set "group"  priority
-	PieCtrlRegs.PIEACK.all = 0xFFFF;   // Enable PIE interrupts
-	EINT;
-
-  	// Insert ISR Code here.......
-    for(i = 1; i <= 10; i++) {}
-
-	// Restore registers saved:
-	DINT;
-	PieCtrlRegs.PIEIER4.all = TempPIEIER;
-
-    //  Add ISR to Trace
-    ISRTrace[ISRTraceIndex] = 0x0041;
-    ISRTraceIndex++;
-
-}
-#endif
-
-// Connected to PIEIER4_2 (use MINT4 and MG42 masks):
-#if (G42PL != 0)
-interrupt void ECAP2_INT_ISR(void)     // eCAP2 Interrupt
-{
-	// Set interrupt priority:
-	volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER4.all;
-	IER |= M_INT4;
-	IER	&= MINT4;	  	               // Set "global" priority
-	PieCtrlRegs.PIEIER4.all &= MG42;   // Set "group"  priority
-	PieCtrlRegs.PIEACK.all = 0xFFFF;   // Enable PIE interrupts
-	EINT;
-
-  	// Insert ISR Code here.......
-    for(i = 1; i <= 10; i++) {}
-
-	// Restore registers saved:
-	DINT;
-	PieCtrlRegs.PIEIER4.all = TempPIEIER;
-
-    //  Add ISR to Trace
-    ISRTrace[ISRTraceIndex] = 0x0042;
-    ISRTraceIndex++;
-
-}
-#endif
-
-// Connected to PIEIER4_3 (use MINT4 and MG43 masks):
-#if (G43PL != 0)
-interrupt void ECAP3_INT_ISR(void)     // eCAP3 Interrupt
-{
-	// Set interrupt priority:
-	volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER4.all;
-	IER |= M_INT4;
-	IER	&= MINT4;	  	               // Set "global" priority
-	PieCtrlRegs.PIEIER4.all &= MG43;   // Set "group"  priority
-	PieCtrlRegs.PIEACK.all = 0xFFFF;   // Enable PIE interrupts
-	EINT;
-
-  	// Insert ISR Code here.......
-   for(i = 1; i <= 10; i++) {}
-
-	// Restore registers saved:
-	DINT;
-	PieCtrlRegs.PIEIER4.all = TempPIEIER;
-
-    //  Add ISR to Trace
-    ISRTrace[ISRTraceIndex] = 0x0043;
-    ISRTraceIndex++;
-
-}
-#endif
-
-// Connected to PIEIER4_4 (use MINT4 and MG44 masks):
-#if (G44PL != 0)
-interrupt void ECAP4_INT_ISR(void)     // eCAP4 Interrupt
-{
-	// Set interrupt priority:
-	volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER4.all;
-	IER |= M_INT4;
-	IER	&= MINT4;	  	               // Set "global" priority
-	PieCtrlRegs.PIEIER4.all &= MG44;   // Set "group"  priority
-	PieCtrlRegs.PIEACK.all = 0xFFFF;   // Enable PIE interrupts
-	EINT;
-
-  	// Insert ISR Code here.......
-    for(i = 1; i <= 10; i++) {}
-
-	// Restore registers saved:
-	DINT;
-	PieCtrlRegs.PIEIER4.all = TempPIEIER;
-
-    //  Add ISR to Trace
-    ISRTrace[ISRTraceIndex] = 0x0044;
-    ISRTraceIndex++;
-
-}
-#endif
-
-// Connected to PIEIER4_5 (use MINT4 and MG45 masks):
-#if (G44PL != 0)
-interrupt void ECAP5_INT_ISR(void)     // eCAP5 Interrupt
-{
-	// Set interrupt priority:
-	volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER4.all;
-	IER |= M_INT4;
-	IER	&= MINT4;	  	               // Set "global" priority
-	PieCtrlRegs.PIEIER4.all &= MG45;   // Set "group"  priority
-	PieCtrlRegs.PIEACK.all = 0xFFFF;   // Enable PIE interrupts
-	EINT;
-
-  	// Insert ISR Code here.......
-    for(i = 1; i <= 10; i++) {}
-
-	// Restore registers saved:
-	DINT;
-	PieCtrlRegs.PIEIER4.all = TempPIEIER;
-
-    //  Add ISR to Trace
-    ISRTrace[ISRTraceIndex] = 0x0045;
-    ISRTraceIndex++;
-
-}
-#endif
-
-// Connected to PIEIER4_6 (use MINT4 and MG46 masks):
-#if (G44PL != 0)
-interrupt void ECAP6_INT_ISR(void)     // eCAP6 Interrupt
-{
-	// Set interrupt priority:
-	volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER4.all;
-	IER |= M_INT4;
-	IER	&= MINT4;	  	               // Set "global" priority
-	PieCtrlRegs.PIEIER4.all &= MG46;   // Set "group"  priority
-	PieCtrlRegs.PIEACK.all = 0xFFFF;   // Enable PIE interrupts
-	EINT;
-
-  	// Insert ISR Code here.......
-    for(i = 1; i <= 10; i++) {}
-
-	// Restore registers saved:
-	DINT;
-	PieCtrlRegs.PIEIER4.all = TempPIEIER;
-
-    //  Add ISR to Trace
-    ISRTrace[ISRTraceIndex] = 0x0046;
-    ISRTraceIndex++;
-
-}
-#endif
-// -----------------------------------------------------------
-// PIE Group 5 - MUXed into CPU INT5
-// -----------------------------------------------------------
-
-// Connected to PIEIER5_1 (use MINT5 and MG51 masks):
-#if (G51PL != 0)
-interrupt void EQEP1_INT_ISR(void)     // eQEP1 Interrupt
-{
-	// Set interrupt priority:
-	volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER5.all;
-	IER |= M_INT5;
-	IER	&= MINT5;	  	               // Set "global" priority
-	PieCtrlRegs.PIEIER5.all &= MG51;   // Set "group"  priority
-	PieCtrlRegs.PIEACK.all = 0xFFFF;   // Enable PIE interrupts
-	EINT;
-
-  	// Insert ISR Code here.......
-    for(i = 1; i <= 10; i++) {}
-
-	// Restore registers saved:
-	DINT;
-	PieCtrlRegs.PIEIER5.all = TempPIEIER;
-
-    //  Add ISR to Trace
-    ISRTrace[ISRTraceIndex] = 0x0051;
-    ISRTraceIndex++;
-
-}
-#endif
-
-// Connected to PIEIER5_2 (use MINT5 and MG52 masks):
-#if (G52PL != 0)
-interrupt void EQEP2_INT_ISR(void)     // eQEP2 Interrupt
-{
-	// Set interrupt priority:
-	volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER5.all;
-	IER |= M_INT5;
-	IER	&= MINT5;	  	                // Set "global" priority
-	PieCtrlRegs.PIEIER5.all &= MG52;   // Set "group"  priority
-	PieCtrlRegs.PIEACK.all = 0xFFFF;   // Enable PIE interrupts
-	EINT;
-
-  	// Insert ISR Code here.......
-    for(i = 1; i <= 10; i++) {}
-
-	// Restore registers saved:
-	DINT;
-	PieCtrlRegs.PIEIER5.all = TempPIEIER;
-
-    //  Add ISR to Trace
-    ISRTrace[ISRTraceIndex] = 0x0052;
-    ISRTraceIndex++;
-
-}
-#endif
-
-// -----------------------------------------------------------
-// PIE Group 6 - MUXed into CPU INT6
-// -----------------------------------------------------------
-
-// Connected to PIEIER6_1 (use MINT6 and MG61 masks):
-#if (G61PL != 0)
-interrupt void SPIRXINTA_ISR(void)    // SPI-A
-{
-	// Set interrupt priority:
-	volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER6.all;
-	IER |= M_INT6;
-	IER	&= MINT6;	  	               // Set "global" priority
-	PieCtrlRegs.PIEIER6.all &= MG61;   // Set "group"  priority
-	PieCtrlRegs.PIEACK.all = 0xFFFF;   // Enable PIE interrupts
-	EINT;
-
-  	// Insert ISR Code here.......
-    for(i = 1; i <= 10; i++) {}
-
-	// Restore registers saved:
-	DINT;
-	PieCtrlRegs.PIEIER6.all = TempPIEIER;
-
-    //  Add ISR to Trace
-    ISRTrace[ISRTraceIndex] = 0x0061;
-    ISRTraceIndex++;
-
-}
-#endif
-
-// Connected to PIEIER6_2 (use MINT6 and MG62 masks):
-#if (G62PL != 0)
-interrupt void SPITXINTA_ISR(void)     // SPI-A
-{
-	// Set interrupt priority:
-	volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER6.all;
-	IER |= M_INT6;
-	IER	&= MINT6;	  	               // Set "global" priority
-	PieCtrlRegs.PIEIER6.all &= MG62;   // Set "group"  priority
-	PieCtrlRegs.PIEACK.all = 0xFFFF;   // Enable PIE interrupts
-	EINT;
-
-  	// Insert ISR Code here.......
-    for(i = 1; i <= 10; i++) {}
-
-	// Restore registers saved:
-	DINT;
-	PieCtrlRegs.PIEIER6.all = TempPIEIER;
-
-    //  Add ISR to Trace
-    ISRTrace[ISRTraceIndex] = 0x0062;
-    ISRTraceIndex++;
-
-}
-#endif
-
-// Connected to PIEIER6_3 (use MINT6 and MG63 masks):
-#if (G63PL != 0)
-interrupt void MRINTB_ISR(void)    // McBSP-B
-{
-	// Set interrupt priority:
-	volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER6.all;
-	IER |= M_INT6;
-	IER	&= MINT6;	  	               // Set "global" priority
-	PieCtrlRegs.PIEIER6.all &= MG63;   // Set "group"  priority
-	PieCtrlRegs.PIEACK.all = 0xFFFF;   // Enable PIE interrupts
-	EINT;
-
-  	// Insert ISR Code here.......
-   for(i = 1; i <= 10; i++) {}
-
-	// Restore registers saved:
-	DINT;
-	PieCtrlRegs.PIEIER6.all = TempPIEIER;
-
-    //  Add ISR to Trace
-    ISRTrace[ISRTraceIndex] = 0x0063;
-    ISRTraceIndex++;
-
-}
-#endif
-
-// Connected to PIEIER6_4 (use MINT6 and MG64 masks):
-#if (G64PL != 0)
-interrupt void MXINTB_ISR(void)     // McBSP-B
-{
-	// Set interrupt priority:
-	volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER6.all;
-	IER |= M_INT6;
-	IER	&= MINT6;	  	               // Set "global" priority
-	PieCtrlRegs.PIEIER6.all &= MG64;   // Set "group"  priority
-	PieCtrlRegs.PIEACK.all = 0xFFFF;   // Enable PIE interrupts
-	EINT;
-
-  	// Insert ISR Code here.......
-    for(i = 1; i <= 10; i++) {}
-
-	// Restore registers saved:
-	DINT;
-	PieCtrlRegs.PIEIER6.all = TempPIEIER;
-
-    //  Add ISR to Trace
-    ISRTrace[ISRTraceIndex] = 0x0064;
-    ISRTraceIndex++;
-
-}
-#endif
-
-
-
-// Connected to PIEIER6_5 (use MINT6 and MG65 masks):
-#if (G65PL != 0)
-interrupt void MRINTA_ISR(void)     // McBSP-A
-{
-	// Set interrupt priority:
-	volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER6.all;
-	IER |= M_INT6;
-	IER	&= MINT6;	  	               // Set "global" priority
-	PieCtrlRegs.PIEIER6.all &= MG65;   // Set "group"  priority
-	PieCtrlRegs.PIEACK.all = 0xFFFF;   // Enable PIE interrupts
-	EINT;
-
-  	// Insert ISR Code here.......
-    for(i = 1; i <= 10; i++) {}
-
-	// Restore registers saved:
-	DINT;
-	PieCtrlRegs.PIEIER6.all = TempPIEIER;
-
-    //  Add ISR to Trace
-    ISRTrace[ISRTraceIndex] = 0x0065;
-    ISRTraceIndex++;
-
-}
-#endif
-
-// Connected to PIEIER6_6 (use MINT6 and MG66 masks):
-#if (G66PL != 0)
-interrupt void MXINTA_ISR(void)     // McBSP-A
-{
-	// Set interrupt priority:
-	volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER6.all;
-	IER |= M_INT6;
-	IER	&= MINT6;	  	               // Set "global" priority
-	PieCtrlRegs.PIEIER6.all &= MG66;   // Set "group"  priority
-	PieCtrlRegs.PIEACK.all = 0xFFFF;   // Enable PIE interrupts
-	EINT;
-
-  	// Insert ISR Code here.......
-    for(i = 1; i <= 10; i++) {}
-
-	// Restore registers saved:
-	DINT;
-	PieCtrlRegs.PIEIER6.all = TempPIEIER;
-
-    //  Add ISR to Trace
-    ISRTrace[ISRTraceIndex] = 0x0066;
-    ISRTraceIndex++;
-
-}
-#endif
-
-// -----------------------------------------------------------
-// PIE Group 7 - MUXed into CPU INT7
-// -----------------------------------------------------------
-
-// Connected to PIEIER7_1 (use MINT7 and MG71 masks):
-#if (G71PL != 0)
-interrupt void DINTCH1_ISR(void)    // DMA-Channel 1
-{
-	// Set interrupt priority:
-	volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER7.all;
-	IER |= M_INT7;
-	IER	&= MINT7;	  	               // Set "global" priority
-	PieCtrlRegs.PIEIER7.all &= MG71;   // Set "group"  priority
-	PieCtrlRegs.PIEACK.all = 0xFFFF;   // Enable PIE interrupts
-	EINT;
-
-  	// Insert ISR Code here.......
-    for(i = 1; i <= 10; i++) {}
-
-	// Restore registers saved:
-	DINT;
-	PieCtrlRegs.PIEIER7.all = TempPIEIER;
-
-    //  Add ISR to Trace
-    ISRTrace[ISRTraceIndex] = 0x0071;
-    ISRTraceIndex++;
-
-}
-#endif
-
-// Connected to PIEIER7_2 (use MINT7 and MG72 masks):
-#if (G72PL != 0)
-interrupt void DINTCH2_ISR(void)     // DMA-Channel 2
-{
-	// Set interrupt priority:
-	volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER7.all;
-	IER |= M_INT7;
-	IER	&= MINT7;	  	               // Set "global" priority
-	PieCtrlRegs.PIEIER7.all &= MG72;   // Set "group"  priority
-	PieCtrlRegs.PIEACK.all = 0xFFFF;   // Enable PIE interrupts
-	EINT;
-
-  	// Insert ISR Code here.......
-    for(i = 1; i <= 10; i++) {}
-
-	// Restore registers saved:
-	DINT;
-	PieCtrlRegs.PIEIER7.all = TempPIEIER;
-
-    //  Add ISR to Trace
-    ISRTrace[ISRTraceIndex] = 0x0072;
-    ISRTraceIndex++;
-
-}
-#endif
-
-// Connected to PIEIER7_3 (use MINT7 and MG73 masks):
-#if (G73PL != 0)
-interrupt void DINTCH3_ISR(void)    // DMA-Channel 3
-{
-	// Set interrupt priority:
-	volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER7.all;
-	IER |= M_INT7;
-	IER	&= MINT7;	  	               // Set "global" priority
-	PieCtrlRegs.PIEIER7.all &= MG73;   // Set "group"  priority
-	PieCtrlRegs.PIEACK.all = 0xFFFF;   // Enable PIE interrupts
-	EINT;
-
-  	// Insert ISR Code here.......
-   for(i = 1; i <= 10; i++) {}
-
-	// Restore registers saved:
-	DINT;
-	PieCtrlRegs.PIEIER7.all = TempPIEIER;
-
-    //  Add ISR to Trace
-    ISRTrace[ISRTraceIndex] = 0x0073;
-    ISRTraceIndex++;
-
-}
-#endif
-
-// Connected to PIEIER7_4 (use MINT7 and MG74 masks):
-#if (G74PL != 0)
-interrupt void DINTCH4_ISR(void)     // DMA-Channel 4
-{
-	// Set interrupt priority:
-	volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER7.all;
-	IER |= M_INT7;
-	IER	&= MINT7;	  	               // Set "global" priority
-	PieCtrlRegs.PIEIER7.all &= MG74;   // Set "group"  priority
-	PieCtrlRegs.PIEACK.all = 0xFFFF;   // Enable PIE interrupts
-	EINT;
-
-  	// Insert ISR Code here.......
-    for(i = 1; i <= 10; i++) {}
-
-	// Restore registers saved:
-	DINT;
-	PieCtrlRegs.PIEIER7.all = TempPIEIER;
-
-    //  Add ISR to Trace
-    ISRTrace[ISRTraceIndex] = 0x0074;
-    ISRTraceIndex++;
-
-}
-#endif
-
-// Connected to PIEIER7_5 (use MINT7 and MG75 masks):
-#if (G75PL != 0)
-interrupt void DINTCH5_ISR(void)     // DMA-Channel 5
-{
-	// Set interrupt priority:
-	volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER7.all;
-	IER |= M_INT7;
-	IER	&= MINT7;	  	               // Set "global" priority
-	PieCtrlRegs.PIEIER7.all &= MG75;   // Set "group"  priority
-	PieCtrlRegs.PIEACK.all = 0xFFFF;   // Enable PIE interrupts
-	EINT;
-
-  	// Insert ISR Code here.......
-    for(i = 1; i <= 10; i++) {}
-
-	// Restore registers saved:
-	DINT;
-	PieCtrlRegs.PIEIER7.all = TempPIEIER;
-
-    //  Add ISR to Trace
-    ISRTrace[ISRTraceIndex] = 0x0075;
-    ISRTraceIndex++;
-
-}
-#endif
-
-// Connected to PIEIER7_6 (use MINT7 and MG76 masks):
-#if (G76PL != 0)
-interrupt void DINTCH6_ISR(void)     // DMA-Channel 6
-{
-	// Set interrupt priority:
-	volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER7.all;
-	IER |= M_INT7;
-	IER	&= MINT7;	  	               // Set "global" priority
-	PieCtrlRegs.PIEIER7.all &= MG76;   // Set "group"  priority
-	PieCtrlRegs.PIEACK.all = 0xFFFF;   // Enable PIE interrupts
-	EINT;
-
-  	// Insert ISR Code here.......
-    for(i = 1; i <= 10; i++) {}
-
-	// Restore registers saved:
-	DINT;
-	PieCtrlRegs.PIEIER7.all = TempPIEIER;
-
-    //  Add ISR to Trace
-    ISRTrace[ISRTraceIndex] = 0x0076;
-    ISRTraceIndex++;
-
-}
-#endif
-
-
-// -----------------------------------------------------------
-// PIE Group 8 - MUXed into CPU INT8
-// -----------------------------------------------------------
-
-// Connected to PIEIER8_1 (use MINT8 and MG81 masks):
-#if (G81PL != 0)
-interrupt void I2CINT1A_ISR(void)    // I2C-A
-{
-	// Set interrupt priority:
-	volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER8.all;
-	IER |= M_INT8;
-	IER	&= MINT8;	  	               // Set "global" priority
-	PieCtrlRegs.PIEIER8.all &= MG81;   // Set "group"  priority
-	PieCtrlRegs.PIEACK.all = 0xFFFF;   // Enable PIE interrupts
-	EINT;
-
-  	// Insert ISR Code here.......
-    for(i = 1; i <= 10; i++) {}
-
-	// Restore registers saved:
-	DINT;
-	PieCtrlRegs.PIEIER8.all = TempPIEIER;
-
-    //  Add ISR to Trace
-    ISRTrace[ISRTraceIndex] = 0x0081;
-    ISRTraceIndex++;
-
-}
-#endif
-
-// Connected to PIEIER8_2 (use MINT8 and MG82 masks):
-#if (G82PL != 0)
-interrupt void I2CINT2A_ISR(void)     // I2C-A
-{
-	// Set interrupt priority:
-	volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER8.all;
-	IER |= M_INT8;
-	IER	&= MINT8;	  	               // Set "global" priority
-	PieCtrlRegs.PIEIER8.all &= MG82;   // Set "group"  priority
-	PieCtrlRegs.PIEACK.all = 0xFFFF;   // Enable PIE interrupts
-	EINT;
-
-  	// Insert ISR Code here.......
-    for(i = 1; i <= 10; i++) {}
-
-	// Restore registers saved:
-	DINT;
-	PieCtrlRegs.PIEIER8.all = TempPIEIER;
-
-    //  Add ISR to Trace
-    ISRTrace[ISRTraceIndex] = 0x0082;
-    ISRTraceIndex++;
-
-}
-#endif
-
-// Connected to PIEIER8_5 (use MINT8 and MG85 masks):
-#if (G85PL != 0)
-interrupt void SCIRXINTC_ISR(void)     // SCI-C
-{
-	// Set interrupt priority:
-	volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER8.all;
-	IER |= M_INT8;
-	IER	&= MINT8;	  	               // Set "global" priority
-	PieCtrlRegs.PIEIER8.all &= MG85;   // Set "group"  priority
-	PieCtrlRegs.PIEACK.all = 0xFFFF;   // Enable PIE interrupts
-	EINT;
-
-  	// Insert ISR Code here.......
-    for(i = 1; i <= 10; i++) {}
-
-	// Restore registers saved:
-	DINT;
-	PieCtrlRegs.PIEIER8.all = TempPIEIER;
-
-    //  Add ISR to Trace
-    ISRTrace[ISRTraceIndex] = 0x0085;
-    ISRTraceIndex++;
-
-}
-#endif
-
-// Connected to PIEIER8_6 (use MINT8 and MG86 masks):
-#if (G86PL != 0)
-interrupt void SCITXINTC_ISR(void)     // SCI-C
-{
-	// Set interrupt priority:
-	volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER8.all;
-	IER |= M_INT8;
-	IER	&= MINT8;	  	               // Set "global" priority
-	PieCtrlRegs.PIEIER8.all &= MG86;   // Set "group"  priority
-	PieCtrlRegs.PIEACK.all = 0xFFFF;   // Enable PIE interrupts
-	EINT;
-
-  	// Insert ISR Code here.......
-    for(i = 1; i <= 10; i++) {}
-
-	// Restore registers saved:
-	DINT;
-	PieCtrlRegs.PIEIER8.all = TempPIEIER;
-
-    //  Add ISR to Trace
-    ISRTrace[ISRTraceIndex] = 0x0086;
-    ISRTraceIndex++;
-
-}
-#endif
-
-// -----------------------------------------------------------
-// PIE Group 9 - MUXed into CPU INT9
-// -----------------------------------------------------------
-
-// Connected to PIEIER9_1 (use MINT9 and MG91 masks):
-#if (G91PL != 0)
-interrupt void SCIRXINTA_ISR(void)     // SCI-A
-{
-	// Set interrupt priority:
-	volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER9.all;
-	IER |= M_INT9;
-	IER	&= MINT9;	  	                // Set "global" priority
-	PieCtrlRegs.PIEIER9.all &= MG91;   // Set "group"  priority
-	PieCtrlRegs.PIEACK.all = 0xFFFF;   // Enable PIE interrupts
-	EINT;
-
-  	// Insert ISR Code here.......
-    for(i = 1; i <= 10; i++) {}
-
-	// Restore registers saved:
-	DINT;
-	PieCtrlRegs.PIEIER9.all = TempPIEIER;
-
-    //  Add ISR to Trace
-    ISRTrace[ISRTraceIndex] = 0x0091;
-    ISRTraceIndex++;
-
-}
-#endif
-
-// Connected to PIEIER9_2 (use MINT9 and MG92 masks):
-#if (G92PL != 0)
-interrupt void SCITXINTA_ISR(void)     // SCI-A
-{
-	// Set interrupt priority:
-	volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER9.all;
-	IER |= M_INT9;
-	IER	&= MINT9;	  	               // Set "global" priority
-	PieCtrlRegs.PIEIER9.all &= MG92;   // Set "group"  priority
-	PieCtrlRegs.PIEACK.all = 0xFFFF;   // Enable PIE interrupts
-	EINT;
-
-  	// Insert ISR Code here.......
-    for(i = 1; i <= 10; i++) {}
-
-	// Restore registers saved:
-	DINT;
-	PieCtrlRegs.PIEIER9.all = TempPIEIER;
-
-    //  Add ISR to Trace
-    ISRTrace[ISRTraceIndex] = 0x0092;
-    ISRTraceIndex++;
-
-}
-#endif
-
-
-// Connected to PIEIER9_3 (use MINT9 and MG93 masks):
-#if (G93PL != 0)
-interrupt void SCIRXINTB_ISR(void)     // SCI-B
-{
-	// Set interrupt priority:
-	volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER9.all;
-	IER |= M_INT9;
-	IER	&= MINT9;	  	               // Set "global" priority
-	PieCtrlRegs.PIEIER9.all &= MG93;   // Set "group"  priority
-	PieCtrlRegs.PIEACK.all = 0xFFFF;   // Enable PIE interrupts
-	EINT;
-
-  	// Insert ISR Code here.......
-    for(i = 1; i <= 10; i++) {}
-
-	// Restore registers saved:
-	DINT;
-	PieCtrlRegs.PIEIER9.all = TempPIEIER;
-
-    //  Add ISR to Trace
-    ISRTrace[ISRTraceIndex] = 0x0093;
-    ISRTraceIndex++;
-
-}
-#endif
-
-// Connected to PIEIER9_4 (use MINT9 and MG94 masks):
-#if (G94PL != 0)
-interrupt void SCITXINTB_ISR(void)     // SCI-B
-{
-	// Set interrupt priority:
-	volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER9.all;
-	IER |= M_INT9;
-	IER	&= MINT9;	  	               // Set "global" priority
-	PieCtrlRegs.PIEIER9.all &= MG94;   // Set "group"  priority
-	PieCtrlRegs.PIEACK.all = 0xFFFF;   // Enable PIE interrupts
-	EINT;
-
-  	// Insert ISR Code here.......
-    for(i = 1; i <= 10; i++) {}
-
-	// Restore registers saved:
-	DINT;
-	PieCtrlRegs.PIEIER9.all = TempPIEIER;
-
-    //  Add ISR to Trace
-    ISRTrace[ISRTraceIndex] = 0x0094;
-    ISRTraceIndex++;
-
-}
-#endif
-
-// Connected to PIEIER9_5 (use MINT9 and MG95 masks):
-#if (G95PL != 0)
-interrupt void ECAN0INTA_ISR(void)    // eCAN-A
-{
-	// Set interrupt priority:
-	volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER9.all;
-	IER |= M_INT9;
-	IER	&= MINT9;	  	               // Set "global" priority
-	PieCtrlRegs.PIEIER9.all &= MG95;   // Set "group"  priority
-	PieCtrlRegs.PIEACK.all = 0xFFFF;   // Enable PIE interrupts
-	EINT;
-
-  	// Insert ISR Code here.......
-    for(i = 1; i <= 10; i++) {}
-
-	// Restore registers saved:
-	DINT;
-	PieCtrlRegs.PIEIER9.all = TempPIEIER;
-
-    //  Add ISR to Trace
-    ISRTrace[ISRTraceIndex] = 0x0095;
-    ISRTraceIndex++;
-
-}
-#endif
-
-// Connected to PIEIER9_6 (use MINT9 and MG96 masks):
-#if (G96PL != 0)
-interrupt void ECAN1INTA_ISR(void)     // eCAN-A
-{
-	// Set interrupt priority:
-	volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER9.all;
-	IER |= M_INT9;
-	IER	&= MINT9;	  	               // Set "global" priority
-	PieCtrlRegs.PIEIER9.all &= MG96;   // Set "group"  priority
-	PieCtrlRegs.PIEACK.all = 0xFFFF;   // Enable PIE interrupts
-	EINT;
-
-  	// Insert ISR Code here.......
-    for(i = 1; i <= 10; i++) {}
-
-	// Restore registers saved:
-	DINT;
-	PieCtrlRegs.PIEIER9.all = TempPIEIER;
-
-    //  Add ISR to Trace
-    ISRTrace[ISRTraceIndex] = 0x0096;
-    ISRTraceIndex++;
-
-}
-#endif
-
-// Connected to PIEIER9_7 (use MINT9 and MG97 masks):
-#if (G97PL != 0)
-interrupt void ECAN0INTB_ISR(void)    // eCAN-B
-{
-	// Set interrupt priority:
-	volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER9.all;
-	IER |= M_INT9;
-	IER	&= MINT9;	  	               // Set "global" priority
-	PieCtrlRegs.PIEIER9.all &= MG97;   // Set "group"  priority
-	PieCtrlRegs.PIEACK.all = 0xFFFF;   // Enable PIE interrupts
-	EINT;
-
-  	// Insert ISR Code here.......
-    for(i = 1; i <= 10; i++) {}
-
-	// Restore registers saved:
-	DINT;
-	PieCtrlRegs.PIEIER9.all = TempPIEIER;
-
-    //  Add ISR to Trace
-    ISRTrace[ISRTraceIndex] = 0x0097;
-    ISRTraceIndex++;
-
-}
-#endif
-
-// Connected to PIEIER9_8 (use MINT9 and MG98 masks):
-#if (G98PL != 0)
-interrupt void ECAN1INTB_ISR(void)     // eCAN-B
-{
-	// Set interrupt priority:
-	volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER9.all;
-	IER |= M_INT9;
-	IER	&= MINT9;	  	               // Set "global" priority
-	PieCtrlRegs.PIEIER9.all &= MG98;   // Set "group"  priority
-	PieCtrlRegs.PIEACK.all = 0xFFFF;   // Enable PIE interrupts
-	EINT;
-
-  	// Insert ISR Code here.......
-    for(i = 1; i <= 10; i++) {}
-
-	// Restore registers saved:
-	DINT;
-	PieCtrlRegs.PIEIER9.all = TempPIEIER;
-
-    //  Add ISR to Trace
-    ISRTrace[ISRTraceIndex] = 0x0098;
-    ISRTraceIndex++;
-
-}
-#endif
-
-// -----------------------------------------------------------
-// PIE Group 10 - MUXed into CPU int10
-// -----------------------------------------------------------
-// -----------------------------------------------------------
-// PIE Group 11 - MUXed into CPU int11
-// -----------------------------------------------------------
-// -----------------------------------------------------------
-// PIE Group 12 - MUXed into CPU int12
-// -----------------------------------------------------------
-
-// Connected to PIEIER12_1 (use MINT12 and MG121 masks):
-#if (G121PL != 0)
-interrupt void XINT3_ISR(void)     // External Interrupt
-{
-	// Set interrupt priority:
-	volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER12.all;
-	IER |= M_INT12;
-	IER	&= MINT12;	  	                // Set "global" priority
-	PieCtrlRegs.PIEIER12.all &= MG121; // Set "group"  priority
-	PieCtrlRegs.PIEACK.all = 0xFFFF;   // Enable PIE interrupts
-	EINT;
-
-  	// Insert ISR Code here.......
-    for(i = 1; i <= 10; i++) {}
-
-	// Restore registers saved:
-	DINT;
-	PieCtrlRegs.PIEIER12.all = TempPIEIER;
-
-    //  Add ISR to Trace
-    ISRTrace[ISRTraceIndex] = 0x0121;
-    ISRTraceIndex++;
-
-}
-#endif
-
-// Connected to PIEIER12_2 (use MINT12 and MG122 masks):
-#if (G122PL != 0)
-interrupt void XINT4_ISR(void)     // External Interrupt
-{
-	// Set interrupt priority:
-	volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER12.all;
-	IER |= M_INT12;
-	IER	&= MINT12;	  	               // Set "global" priority
-	PieCtrlRegs.PIEIER12.all &= MG122; // Set "group"  priority
-	PieCtrlRegs.PIEACK.all = 0xFFFF;   // Enable PIE interrupts
-	EINT;
-
-  	// Insert ISR Code here.......
-    for(i = 1; i <= 10; i++) {}
-
-	// Restore registers saved:
-	DINT;
-	PieCtrlRegs.PIEIER12.all = TempPIEIER;
-
-    //  Add ISR to Trace
-    ISRTrace[ISRTraceIndex] = 0x0122;
-    ISRTraceIndex++;
-
-}
-#endif
-
-
-// Connected to PIEIER12_3 (use MINT12 and MG123 masks):
-#if (G123PL != 0)
-interrupt void XINT5_ISR(void)     // External Interrupt
-{
-	// Set interrupt priority:
-	volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER12.all;
-	IER |= M_INT12;
-	IER	&= MINT12;	  	               // Set "global" priority
-	PieCtrlRegs.PIEIER12.all &= MG123; // Set "group"  priority
-	PieCtrlRegs.PIEACK.all = 0xFFFF;   // Enable PIE interrupts
-	EINT;
-
-  	// Insert ISR Code here.......
-    for(i = 1; i <= 10; i++) {}
-
-	// Restore registers saved:
-	DINT;
-	PieCtrlRegs.PIEIER12.all = TempPIEIER;
-
-    //  Add ISR to Trace
-    ISRTrace[ISRTraceIndex] = 0x0123;
-    ISRTraceIndex++;
-
-}
-#endif
-
-// Connected to PIEIER12_4 (use MINT12 and MG124 masks):
-#if (G124PL != 0)
-interrupt void XINT6_ISR(void)     // External Interrupt
-{
-	// Set interrupt priority:
-	volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER12.all;
-	IER |= M_INT12;
-	IER	&= MINT12;	  	               // Set "global" priority
-	PieCtrlRegs.PIEIER12.all &= MG124; // Set "group"  priority
-	PieCtrlRegs.PIEACK.all = 0xFFFF;   // Enable PIE interrupts
-	EINT;
-
-  	// Insert ISR Code here.......
-    for(i = 1; i <= 10; i++) {}
-
-	// Restore registers saved:
-	DINT;
-	PieCtrlRegs.PIEIER12.all = TempPIEIER;
-
-    //  Add ISR to Trace
-    ISRTrace[ISRTraceIndex] = 0x0124;
-    ISRTraceIndex++;
-
-}
-#endif
-
-// Connected to PIEIER12_5 (use MINT12 and MG125 masks):
-#if (G125PL != 0)
-interrupt void XINT7_ISR(void)    // External Interrupt
-{
-	// Set interrupt priority:
-	volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER12.all;
-	IER |= M_INT12;
-	IER	&= MINT12;	  	               // Set "global" priority
-	PieCtrlRegs.PIEIER12.all &= MG125; // Set "group"  priority
-	PieCtrlRegs.PIEACK.all = 0xFFFF;   // Enable PIE interrupts
-	EINT;
-
-  	// Insert ISR Code here.......
-    for(i = 1; i <= 10; i++) {}
-
-	// Restore registers saved:
-	DINT;
-	PieCtrlRegs.PIEIER12.all = TempPIEIER;
-
-    //  Add ISR to Trace
-    ISRTrace[ISRTraceIndex] = 0x0125;
-    ISRTraceIndex++;
-
-}
-#endif
-
-// Connected to PIEIER12_7 (use MINT12 and MG127 masks):
-#if (G127PL != 0)
-interrupt void LVF_ISR(void)    // FPA32
-{
-	// Set interrupt priority:
-	volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER12.all;
-	IER |= M_INT12;
-	IER	&= MINT12;	  	               // Set "global" priority
-	PieCtrlRegs.PIEIER12.all &= MG127; // Set "group"  priority
-	PieCtrlRegs.PIEACK.all = 0xFFFF;   // Enable PIE interrupts
-	EINT;
-
-  	// Insert ISR Code here.......
-    for(i = 1; i <= 10; i++) {}
-
-	// Restore registers saved:
-	DINT;
-	PieCtrlRegs.PIEIER12.all = TempPIEIER;
-
-    //  Add ISR to Trace
-    ISRTrace[ISRTraceIndex] = 0x0127;
-    ISRTraceIndex++;
-
-}
-#endif
-
-// Connected to PIEIER12_8 (use MINT12 and MG128 masks):
-#if (G128PL != 0)
-interrupt void LUF_ISR(void)     // FPA32
-{
-	// Set interrupt priority:
-	volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER12.all;
-	IER |= M_INT12;
-	IER	&= MINT12;	  	               // Set "global" priority
-	PieCtrlRegs.PIEIER12.all &= MG128; // Set "group"  priority
-	PieCtrlRegs.PIEACK.all = 0xFFFF;   // Enable PIE interrupts
-	EINT;
-
-  	// Insert ISR Code here.......
-    for(i = 1; i <= 10; i++) {}
-
-	// Restore registers saved:
-	DINT;
-	PieCtrlRegs.PIEIER12.all = TempPIEIER;
-
-    //  Add ISR to Trace
-    ISRTrace[ISRTraceIndex] = 0x0128;
-    ISRTraceIndex++;
-
-}
-#endif
-
-//---------------------------------------------------------------------------
-// Catch All Default ISRs:
-//
-
-interrupt void PIE_RESERVED(void)  // Reserved space.  For test.
-{
-  asm ("      ESTOP0");
-  for(;;);
-}
-
-interrupt void INT_NOTUSED_ISR(void)  // Reserved space.  For test.
-{
-  asm ("      ESTOP0");
-  for(;;);
-}
-
-interrupt void rsvd_ISR(void)      // For test
-{
-  asm ("      ESTOP0");
-  for(;;);
-}
-
-//===========================================================================
-// No more.
-//===========================================================================
diff --git a/Source/External/v120/DSP2833x_examples/sw_prioritized_interrupts/Example_2833xSWPrioritizedInterrupts.c b/Source/External/v120/DSP2833x_examples/sw_prioritized_interrupts/Example_2833xSWPrioritizedInterrupts.c
deleted file mode 100644
index b78de16..0000000
--- a/Source/External/v120/DSP2833x_examples/sw_prioritized_interrupts/Example_2833xSWPrioritizedInterrupts.c
+++ /dev/null
@@ -1,597 +0,0 @@
-// TI File $Revision: /main/10 $
-// Checkin $Date: April 21, 2008   15:43:45 $
-//###########################################################################
-//
-// FILE:   Example_2833xSWPrioritizedInterrupts.c
-//
-// TITLE:  DSP2833x Software Prioritized Interrupt Example.
-//
-// ASSUMPTIONS:
-//
-//    This program requires the DSP2833x header files.
-//
-//    As supplied, this project is configured for "boot to SARAM"
-//    operation.  The 2833x Boot Mode table is shown below.
-//    For information on configuring the boot mode of an eZdsp,
-//    please refer to the documentation included with the eZdsp,
-//
-//       $Boot_Table:
-//
-//         GPIO87   GPIO86     GPIO85   GPIO84
-//          XA15     XA14       XA13     XA12
-//           PU       PU         PU       PU
-//        ==========================================
-//            1        1          1        1    Jump to Flash
-//            1        1          1        0    SCI-A boot
-//            1        1          0        1    SPI-A boot
-//            1        1          0        0    I2C-A boot
-//            1        0          1        1    eCAN-A boot
-//            1        0          1        0    McBSP-A boot
-//            1        0          0        1    Jump to XINTF x16
-//            1        0          0        0    Jump to XINTF x32
-//            0        1          1        1    Jump to OTP
-//            0        1          1        0    Parallel GPIO I/O boot
-//            0        1          0        1    Parallel XINTF boot
-//            0        1          0        0    Jump to SARAM	    <- "boot to SARAM"
-//            0        0          1        1    Branch to check boot mode
-//            0        0          1        0    Boot to flash, bypass ADC cal
-//            0        0          0        1    Boot to SARAM, bypass ADC cal
-//            0        0          0        0    Boot to SCI-A, bypass ADC cal
-//                                              Boot_Table_End$
-//
-// DESCRIPTION:
-//
-//    For most applications, the hardware prioritization of the
-//    the PIE module is sufficient.  For applications that need custom
-//    prioritization, this example illustrates an example of
-//    how this can be done through software.
-//
-//    For more information on F2833x interrupt priorities, refer to the
-//    Example_2833xISRPriorities.pdf file included with the DSP2833x/doc directory.
-//
-//    This program simulates interrupt conflicts by writing to the
-//    PIEIFR registers.  This will simulate multiple interrupts coming into
-//    the PIE block at the same time.
-//
-//    The interrupt service routine routines are software prioritized
-//    by the table found in the DSP2833x_SWPrioritizedIsrLevels.h file.
-//
-//       1) Before compiling you must set the Global and Group interrupt priorities
-//          in the DSP2833x_SWPrioritizedIsrLevels.h file.
-//
-//       2) Then select which test you want to run with the #define TEST directive
-//          at the top of this file (select a test between 1 and 10)
-//
-//       3) Compile the code, load, and run
-//
-//       4) At the end of each test there is a hard coded breakpoint (ESTOP0).  When code
-//          stops at the breakpoint, examine the ISRTrace buffer to see the order
-//          in which the ISR's completed.    All PIE interrupts will add to the
-//          ISRTrace.
-//
-//          The ISRTrace will consist of a list of hex values as shown:
-//
-//              0x00wx    <- PIE Group w interrup x finished first
-//              0x00yz    <- PIE Group y interrupt z finished next
-//
-//       5) If desired, set a new set of Global and Group interrupt priorites
-//          and repeat the test to see the change.
-//
-//
-//       Watch Variables:
-//                ISRTrace[50]           Trace of ISR's in the order they complete
-//                                       After each test, examine this buffer
-//                                       to determine if the ISR's completed in
-//                                       the order desired.
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File
-#include "DSP2833x_SWPrioritizedIsrLevels.h"
-
-#define TEST 1 // Select a test number: 1 through 10
-
-// Define which interrupts are used in the PIE for each group.
-#define ISRS_GROUP1  (M_INT1|M_INT2|M_INT4|M_INT5|M_INT6|M_INT7|M_INT8)
-#define ISRS_GROUP2  (M_INT1|M_INT2|M_INT3|M_INT4|M_INT5|M_INT6)
-#define ISRS_GROUP3  (M_INT1|M_INT2|M_INT3|M_INT4|M_INT5|M_INT6)
-#define ISRS_GROUP4  (M_INT1|M_INT2|M_INT3|M_INT4|M_INT5|M_INT6)
-#define ISRS_GROUP5  (M_INT1|M_INT2)
-#define ISRS_GROUP6  (M_INT1|M_INT2|M_INT3|M_INT4|M_INT5|M_INT6)
-#define ISRS_GROUP7  (M_INT1|M_INT2|M_INT3|M_INT4|M_INT5|M_INT6)
-#define ISRS_GROUP8  (M_INT1|M_INT2|M_INT5|M_INT6)
-#define ISRS_GROUP9  (M_INT1|M_INT2|M_INT3|M_INT4|M_INT5|M_INT6|M_INT7|M_INT8)
-#define ISRS_GROUP12 (M_INT1|M_INT2|M_INT3|M_INT4|M_INT5|M_INT7|M_INT8)
-
-
-// This array will be used as a trace to check the order that the
-// interrupts were serviced
-Uint16  ISRTrace[50];
-Uint16  ISRTraceIndex;  // used to update an element in the trace buffer
-
-void main(void)
-{
-   Uint16 i;
-
-// Step 1. Initialize System Control:
-// PLL, WatchDog, enable Peripheral Clocks
-// This example function is found in the DSP2833x_SysCtrl.c file.
-   InitSysCtrl();
-
-// Step 2. Initalize GPIO:
-// This example function is found in the DSP2833x_Gpio.c file and
-// illustrates how to set the GPIO to it's default state.
-// InitGpio();  // Skipped for this example
-
-
-// Step 3. Clear all interrupts and initialize PIE vector table:
-// Disable CPU interrupts
-   DINT;
-
-// Initialize PIE control registers to their default state.
-// The default state is all PIE interrupts disabled and flags
-// are cleared.
-// This function is found in the DSP2833x_PieCtrl.c file.
-   InitPieCtrl();
-
-// Disable CPU interrupts and clear all CPU interrupt flags:
-   IER = 0x0000;
-   IFR = 0x0000;
-
-// Initialize the PIE vector table with pointers to the shell Interrupt
-// Service Routines (ISR).
-// This will populate the entire table, even if the interrupt
-// is not used in this example.  This is useful for debug purposes.
-// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
-// This function is found in DSP2833x_PieVect.c.
-   InitPieVectTable();
-
-// Step 4. Initialize all the Device Peripherals:
-// This function is found in DSP2833x_InitPeripherals.c
-// InitPeripherals(); // Not required for this example
-
-// Step 5. User specific code, enable interrupts:
-
-#if (TEST==1)
-//     Force all group 1 interrupts at once by writing to the PIEIFR1 register
-
-       // Prepare for the test:
-	   // Disable interrupts
-	   // Clear the trace buffer, PIE Control Register, CPU IER and IFR registers
-	   DINT;
-	   for(i = 0; i < 50; i++) ISRTrace[i] = 0;
-	   ISRTraceIndex = 0;
-       InitPieCtrl();
-       IER = 0;
-       IFR &= 0;
-
-       // Enable the PIE block
-       PieCtrlRegs.PIECTRL.bit.ENPIE = 1;
-
-       // Enable PIE group 1 interrupt 1-8
-       PieCtrlRegs.PIEIER1.all = 0x00FF;
-
-       // Make sure PIEACK for group 1 is clear (default after reset)
-       PieCtrlRegs.PIEACK.all = M_INT1;
-
-       // Enable CPU INT1
-       IER |= M_INT1;
-
-       // Force all valid interrupts for Group 1
-       PieCtrlRegs.PIEIFR1.all = ISRS_GROUP1;
-
-       // Enable global Interrupts CPU level:
-	   EINT;   // Enable Global interrupt INTM
-
-	   // Wait for all Group 1 interrupts to be serviced
-	   while(PieCtrlRegs.PIEIFR1.all != 0x0000 ){}
-
-       // Stop here and check the ISRTrace to determine which order the
-       // ISR Routines completed.  The order is dependant on the priority
-       // assigned in the DSP2833x_SWPrioritizedIsrLevels.h file
-       //
-       // The ISRTrace will contain a list of values corresponding to the
-       // interrupts serviced in the order they were serviced.
-	   // For example if the ISRTrace looks like this
-	   //        0x0014     ISR Group 1 interrupt 4
-	   //        0x0017     ISR Group 1 interrupt 7
-	   //        0x0016     ISR Group 1 interrupt 6
-	   //        0x0015     ISR Group 1 interrupt 5
-	   //        0x0018     ISR Group 1 interrupt 8
-	   //        0x0012     ISR Group 1 interrupt 2
-	   //        0x0011     ISR Group 1 interrupt 1
-	   //        0x0000     end of trace
-	   asm("        ESTOP0");
-#endif
-#if (TEST == 2)
-// CASE 2:
-//     Force all group 2 interrupts at once by writing to the PIEIFR2 register
-
-       // Prepare for the test:
-	   // Disable interrupts
-	   // Clear the trace buffer, PIE Control Register, CPU IER and IFR registers
-	   DINT;
-	   for(i = 0; i < 50; i++) ISRTrace[i] = 0;
-	   ISRTraceIndex = 0;
-       InitPieCtrl();
-       IER = 0;
-       IFR &= 0;
-
-       // Enable the PIE block
-       PieCtrlRegs.PIECTRL.bit.ENPIE = 1;
-
-       // Enable PIE group 2 interrupts 1-8
-       PieCtrlRegs.PIEIER2.all = 0x00FF;
-
-       // Enable CPU INT2
-       IER |= (M_INT2);
-
-	   // Make sure PIEACK for group 2 is clear (default after reset)
-       PieCtrlRegs.PIEACK.all = M_INT2;
-
-       // Force all valid interrupts for Group 2
-       PieCtrlRegs.PIEIFR2.all = ISRS_GROUP2;
-
-	   // Enable Global interrupts
-	   EINT;
-
-
-	   // Wait for all group 2 interrupts to be serviced
-	   while(PieCtrlRegs.PIEIFR2.all != 0x0000 ){}
-
-       // Stop here and check the order the ISR's were serviced in the
-       // ISRTrace
-	   asm("        ESTOP0");
-
-#endif
-#if (TEST == 3)
-// CASE 3:
-//     Force all group 3 interrupts at once by writing to the PIEIFR3 register
-
-       // Prepare for the test:
-	   // Disable interrupts
-	   // Clear the trace buffer, PIE Control Register, CPU IER and IFR registers
-	   DINT;
-	   for(i = 0; i < 50; i++) ISRTrace[i] = 0;
-	   ISRTraceIndex = 0;
-       InitPieCtrl();
-       IER = 0;
-       IFR &= 0;
-
-       // Enable the PIE block
-       PieCtrlRegs.PIECTRL.bit.ENPIE = 1;
-
-       // Enable PIE group 3 interrupts 1-8
-       PieCtrlRegs.PIEIER3.all = 0x00FF;
-
-	   // Make sure PIEACK for group 3 is clear (default after reset)
-       PieCtrlRegs.PIEACK.all = M_INT3;
-
-       // Enable CPU INT3
-       IER |= (M_INT3);
-
-       // Force all valid interrupts for Group 3
-       PieCtrlRegs.PIEIFR3.all = ISRS_GROUP3;
-
-	   // Enable Global interrupts
-	   EINT;
-
-	   // Wait for all group 3 interrupts to be serviced
-	   while(PieCtrlRegs.PIEIFR3.all != 0x0000 ){}
-
-       // Stop here and check the order the ISR's were serviced in the
-       // ISRTrace
-	   asm("        ESTOP0");
-#endif
-#if (TEST == 4)
-// CASE 4:
-//     Force all group 4 interrupts at once by writing to the PIEIFR4 register
-
-       // Prepare for the test:
-	   // Disable interrupts
-	   // Clear the trace buffer, PIE Control Register, CPU IER and IFR registers
-	   DINT;
-	   for(i = 0; i < 50; i++) ISRTrace[i] = 0;
-	   ISRTraceIndex = 0;
-       InitPieCtrl();
-       IER = 0;
-       IFR &= 0;
-
-       // Enable the PIE block
-       PieCtrlRegs.PIECTRL.bit.ENPIE = 1;
-
-       // Enable PIE group 4 interrupts 1-8
-       PieCtrlRegs.PIEIER4.all = 0x00FF;
-
-	   // Make sure PIEACK for group 3 is clear (default after reset)
-       PieCtrlRegs.PIEACK.all = M_INT4;
-
-       // Enable CPU INT4
-       IER |= (M_INT4);
-
-       // Force all valid interrupts for Group 4
-       PieCtrlRegs.PIEIFR4.all = ISRS_GROUP4;
-
-	   // Enable Global interrupts
-	   EINT;
-
-	   // Wait for all group 4 interrupts to be serviced
-	   while(PieCtrlRegs.PIEIFR4.all != 0x0000 ){}
-
-       // Stop here and check the order the ISR's were serviced in the
-       // ISRTrace
-	   asm("        ESTOP0");
-#endif
-#if (TEST == 5)
-// CASE 5:
-//     Force all group 5 interrupts at once by writing to the PIEIFR5 register
-
-       // Prepare for the test:
-	   // Disable interrupts
-	   // Clear the trace buffer, PIE Control Register, CPU IER and IFR registers
-	   DINT;
-	   for(i = 0; i < 50; i++) ISRTrace[i] = 0;
-	   ISRTraceIndex = 0;
-       InitPieCtrl();
-       IER = 0;
-       IFR &= 0;
-
-       // Enable the PIE block
-       PieCtrlRegs.PIECTRL.bit.ENPIE = 1;
-
-       // Enable PIE group 5 interrupts 1-8
-       PieCtrlRegs.PIEIER5.all = 0x00FF;
-
-	   // Make sure PIEACK for group 5 is clear (default after reset)
-       PieCtrlRegs.PIEACK.all = M_INT5;
-
-       // Enable CPU INT5
-       IER |= (M_INT5);
-
-       // Force all valid interrupts for Group 5
-       PieCtrlRegs.PIEIFR5.all = ISRS_GROUP5;
-
-	   // Enable Global interrupts
-	   EINT;
-
-	   // Wait for all group 5 interrupts to be serviced
-	   while(PieCtrlRegs.PIEIFR5.all != 0x0000 ){}
-
-       // Stop here and check the order the ISR's were serviced in the
-       // ISRTrace
-	   asm("        ESTOP0");
-#endif
-#if (TEST == 6)
-
-// CASE 6:
-//     Force all group 6 interrupts at once by writing to the PIEIFR6 register
-
-       // Prepare for the test:
-	   // Disable interrupts
-	   // Clear the trace buffer, PIE Control Register, CPU IER and IFR registers
-	   DINT;
-	   for(i = 0; i < 50; i++) ISRTrace[i] = 0;
-	   ISRTraceIndex = 0;
-       InitPieCtrl();
-       IER = 0;
-       IFR &= 0;
-
-       // Enable the PIE block
-       PieCtrlRegs.PIECTRL.bit.ENPIE = 1;
-
-       // Enable PIE group 6 interrupts 1-8
-       PieCtrlRegs.PIEIER6.all = 0x00FF;
-
-	   // Make sure PIEACK for group 6 is clear (default after reset)
-       PieCtrlRegs.PIEACK.all = M_INT6;
-
-       // Enable CPU INT6
-       IER |= (M_INT6);
-
-       // Force all valid interrupts for Group 6
-       PieCtrlRegs.PIEIFR6.all = ISRS_GROUP6;
-
-	   // Enable Global interrupts
-	   EINT;
-
-
-	   // Wait for all group 6 interrupts to be serviced
-	   while(PieCtrlRegs.PIEIFR6.all != 0x0000 ){}
-
-       // Stop here and check the order the ISR's were serviced in the
-       // ISRTrace
-	   asm("        ESTOP0");
-
-#endif
-#if (TEST == 7)
-// CASE 7:
-//     Force all group 9 interrupts at once by writing to the PIEIFR4 register
-
-       // Prepare for the test:
-	   // Disable interrupts
-	   // Clear the trace buffer, PIE Control Register, CPU IER and IFR registers
-	   DINT;
-	   for(i = 0; i < 50; i++) ISRTrace[i] = 0;
-	   ISRTraceIndex = 0;
-       InitPieCtrl();
-       IER = 0;
-       IFR &= 0;
-
-       // Enable the PIE block
-       PieCtrlRegs.PIECTRL.bit.ENPIE = 1;
-
-       // Enable PIE group 9 interrupts 1-8
-       PieCtrlRegs.PIEIER9.all = 0x00FF;
-
-	   // Make sure PIEACK for group 9 is clear (default after reset)
-       PieCtrlRegs.PIEACK.all = M_INT9;
-
-       // Enable CPU INT9
-       IER |= (M_INT9);
-
-       // Force all valid interrupts for Group 9
-       PieCtrlRegs.PIEIFR9.all = ISRS_GROUP9;
-
-	   // Enable Global interrupts
-	   EINT;
-
-	   // Wait for all group 9 interrupts to be serviced
-	   while(PieCtrlRegs.PIEIFR9.all != 0x0000 ){}
-
-       // Stop here and check the order the ISR's were serviced in the
-       // ISRTrace
-	   asm("        ESTOP0");
-
-#endif
-#if (TEST == 8)
-// CASE 8:
-//     Force all group 1 and group 2 interrupts at once
-
-       // Setup next test - fire interrupts from Group 1 and Group 2
-
-       // Prepare for the test:
-	   // Disable interrupts
-	   // Clear the trace buffer, PIE Control Register, CPU IER and IFR registers
-	   DINT;
-	   for(i = 0; i < 50; i++) ISRTrace[i] = 0;
-	   ISRTraceIndex = 0;
-       InitPieCtrl();
-       IER = 0;
-       IFR &= 0;
-
-       // Enable the PIE block
-       PieCtrlRegs.PIECTRL.bit.ENPIE = 1;
-
-       // Enable PIE group 1 and group 2 interrupts 1-8
-       PieCtrlRegs.PIEIER1.all = 0x00FF;
-       PieCtrlRegs.PIEIER2.all = 0x00FF;
-
-	   // Make sure PIEACK for group 1 & 2 are clear (default after reset)
-       PieCtrlRegs.PIEACK.all = (M_INT3 | M_INT2);
-
-       // Enable CPU INT1 and INT2
-       IER |= (M_INT1|M_INT2);
-
-       // Force all valid interrupts for Group 1 and from Group 2
-       PieCtrlRegs.PIEIFR1.all = ISRS_GROUP1;
-       PieCtrlRegs.PIEIFR2.all = ISRS_GROUP2;
-
-	   // Enable Global interrupts
-	   EINT;
-
-	   // Wait for all group 1 and group 2 interrupts to be serviced
-	   while(PieCtrlRegs.PIEIFR1.all != 0x0000
-	      || PieCtrlRegs.PIEIFR2.all != 0x0000 ){}
-
-	   // Check the ISRTrace to determine which order the ISR Routines completed
-	   asm("        ESTOP0");
-
-#endif
-#if (TEST == 9)
-// CASE 9:
-//     Force all group 1 and group 2 and group 3 interrupts at once
-
-       // Prepare for the test:
-	   // Disable interrupts
-	   // Clear the trace buffer, PIE Control Register, CPU IER and IFR registers
-	   DINT;
-	   for(i = 0; i < 50; i++) ISRTrace[i] = 0;
-	   ISRTraceIndex = 0;
-       InitPieCtrl();
-       IER = 0;
-       IFR &= 0;
-
-       // Enable the PIE block
-       PieCtrlRegs.PIECTRL.bit.ENPIE = 1;
-
-       // Enable PIE group 1, 2 and 3 interrupts 1-8
-       PieCtrlRegs.PIEIER1.all = 0x00FF;
-       PieCtrlRegs.PIEIER2.all = 0x00FF;
-       PieCtrlRegs.PIEIER3.all = 0x00FF;
-
-	   // Make sure PIEACK for group 1, 2 & 3 are clear (default after reset)
-       PieCtrlRegs.PIEACK.all = (M_INT3|M_INT2|M_INT3);
-
-       // Enable CPU INT1, INT2 & INT3
-       IER |= (M_INT1|M_INT2|M_INT3);
-
-       // Force all valid interrupts for Group1, 2 and 3
-       PieCtrlRegs.PIEIFR1.all = ISRS_GROUP1;
-       PieCtrlRegs.PIEIFR2.all = ISRS_GROUP2;
-       PieCtrlRegs.PIEIFR3.all = ISRS_GROUP3;
-
-	   // Enable Global interrupts
-	   EINT;
-
-	   // Wait for all group 1 and group 2 and group 3 interrupts to be serviced
-	   while(PieCtrlRegs.PIEIFR1.all != 0x0000
-	      || PieCtrlRegs.PIEIFR2.all != 0x0000
-	      || PieCtrlRegs.PIEIFR3.all != 0x0000 ) {}
-
-	   // Check the ISRTrace to determine which order the ISR Routines completed
-	   asm("        ESTOP0");
-
-#endif
-#if (TEST == 10)
-// CASE 10:
-//     Force all used PIE interrupts at once
-
-       // Prepare for the test:
-	   // Disable interrupts
-	   // Clear the trace buffer, PIE Control Register, CPU IER and IFR registers
-	   DINT;
-	   for(i = 0; i < 50; i++) ISRTrace[i] = 0;
-	   ISRTraceIndex = 0;
-       InitPieCtrl();
-       IER = 0;
-       IFR &= 0;
-
-       // Enable the PIE block
-       PieCtrlRegs.PIECTRL.bit.ENPIE = 1;
-
-       // Enable all PIE group interrupts 1-8
-       PieCtrlRegs.PIEIER1.all = 0x00FF;
-       PieCtrlRegs.PIEIER2.all = 0x00FF;
-       PieCtrlRegs.PIEIER3.all = 0x00FF;
-       PieCtrlRegs.PIEIER4.all = 0x00FF;
-       PieCtrlRegs.PIEIER5.all = 0x00FF;
-       PieCtrlRegs.PIEIER6.all = 0x00FF;
-       PieCtrlRegs.PIEIER9.all = 0x00FF;
-
-	   // Make sure PIEACK for group 1, 2, 3, 4, 5, 6 and 9 are clear (default after reset)
-       PieCtrlRegs.PIEACK.all = (M_INT1|M_INT2|M_INT3|M_INT4|M_INT5|M_INT6|M_INT9);
-
-       // Enable CPU INT1, INT2, INT3, INT4, INT5, INT6 and INT9
-       IER |= (M_INT1|M_INT2|M_INT3|M_INT4|M_INT5|M_INT6|M_INT9);
-
-       // Force all valid interrupts for all PIE groups
-       PieCtrlRegs.PIEIFR1.all = ISRS_GROUP1;
-       PieCtrlRegs.PIEIFR2.all = ISRS_GROUP2;
-       PieCtrlRegs.PIEIFR3.all = ISRS_GROUP3;
-       PieCtrlRegs.PIEIFR4.all = ISRS_GROUP4;
-       PieCtrlRegs.PIEIFR5.all = ISRS_GROUP5;
-       PieCtrlRegs.PIEIFR6.all = ISRS_GROUP6;
-       PieCtrlRegs.PIEIFR9.all = ISRS_GROUP9;
-
-	   // Enable Global interrupts - CPU level
-	   EINT;
-
-	   // Wait for all group interrupts to be serviced
-	   while(PieCtrlRegs.PIEIFR1.all != 0x0000
-	      || PieCtrlRegs.PIEIFR2.all != 0x0000
-	      || PieCtrlRegs.PIEIFR3.all != 0x0000
-          || PieCtrlRegs.PIEIFR4.all != 0x0000
-	      || PieCtrlRegs.PIEIFR5.all != 0x0000
-	      || PieCtrlRegs.PIEIFR6.all != 0x0000
-	      || PieCtrlRegs.PIEIFR9.all != 0x0000 ) {}
-
-	   // Check the ISRTrace to determine which order the ISR Routines completed
-	   asm("        ESTOP0");
-#endif
-}
-//===========================================================================
-// No more.
-//===========================================================================
diff --git a/Source/External/v120/DSP2833x_examples/sw_prioritized_interrupts/Example_2833xSWPrioritizedInterrupts.gel b/Source/External/v120/DSP2833x_examples/sw_prioritized_interrupts/Example_2833xSWPrioritizedInterrupts.gel
deleted file mode 100644
index b801e86..0000000
--- a/Source/External/v120/DSP2833x_examples/sw_prioritized_interrupts/Example_2833xSWPrioritizedInterrupts.gel
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
-// TI File $Revision: /main/5 $
-// Checkin $Date: August 9, 2007   17:23:56 $
-//###########################################################################
-//
-// This .gel file can be used to help load and build the example project.
-// It should be unloaded from Code Composer Studio before loading another 
-// project. 
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-*/
-
-menuitem "DSP2833x Software Prioritized Interrupts"
-
-hotmenu Load_and_Build_Project()
-{
-   GEL_ProjectLoad("Example_2833xSWPrioritizedInterrupts.pjt");
-   GEL_ProjectBuild("Example_2833xSWPrioritizedInterrupts.pjt");
-   Setup_WatchWindow();
-}
-
-hotmenu Load_Code()
-{
-   GEL_Load(".\\debug\\Example_2833xSWPrioritizedInterrupts.out");
-   Setup_WatchWindow();
-}
-
-hotmenu Setup_WatchWindow()
-{
-   GEL_WatchReset();
-   GEL_WatchAdd("ISRTrace,x");
-   GEL_WatchAdd("TempPIEIER,x");
-   GEL_WatchAdd("PieCtrlRegs,x");
-}
diff --git a/Source/External/v120/DSP2833x_examples/sw_prioritized_interrupts/Example_2833xSWPrioritizedInterrupts.pjt b/Source/External/v120/DSP2833x_examples/sw_prioritized_interrupts/Example_2833xSWPrioritizedInterrupts.pjt
deleted file mode 100644
index d20e72c..0000000
--- a/Source/External/v120/DSP2833x_examples/sw_prioritized_interrupts/Example_2833xSWPrioritizedInterrupts.pjt
+++ /dev/null
@@ -1,44 +0,0 @@
-; Code Composer Project File, Version 2.0 (do not modify or remove this line)
-
-[Project Settings]
-ProjectName="DSP2833x"
-ProjectDir="C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\sw_prioritized_interrupts\"
-ProjectType=Executable
-CPUFamily=TMS320C28XX
-Tool="Compiler"
-Tool="DspBiosBuilder"
-Tool="Linker"
-Config="Debug"
-Config="Release"
-
-[Source Files]
-Source="..\..\DSP2833x_common\source\DSP2833x_ADC_cal.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CodeStartBranch.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_SWPrioritizedPieVect.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_SysCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_usDelay.asm"
-Source="..\..\DSP2833x_headers\source\DSP2833x_GlobalVariableDefs.c"
-Source="Example_2833xSWPrioritizedDefaultIsr.c"
-Source="Example_2833xSWPrioritizedInterrupts.c"
-Source="..\..\DSP2833x_common\cmd\28335_RAM_lnk.cmd"
-Source="..\..\DSP2833x_headers\cmd\DSP2833x_Headers_nonBIOS.cmd"
-
-["Compiler" Settings: "Debug"]
-Options=-g -q -pdr -o2 -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\sw_prioritized_interrupts\Debug" -fs"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\sw_prioritized_interrupts\Debug" -i"..\..\DSP2833x_headers\include" -i"..\..\DSP2833x_common\include" -d"_DEBUG" -d"LARGE_MODEL" --float_support=fpu32 -ml -mt -v28
-
-["Compiler" Settings: "Release"]
-Options=-q -o3 -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\sw_prioritized_interrupts\Release" -d"LARGE_MODEL" -ml -v28
-
-["DspBiosBuilder" Settings: "Debug"]
-Options=-v28
-
-["DspBiosBuilder" Settings: "Release"]
-Options=-v28
-
-["Linker" Settings: "Debug"]
-Options=-q -c -m".\Debug\Example_2833xSWPrioritizedInterrupts.map" -o".\Debug\Example_2833xSWPrioritizedInterrupts.out" -stack0x380 -w -x -i"..\..\DSP2833x_headers\include" -l"rts2800_fpu32.lib"
-
-["Linker" Settings: "Release"]
-Options=-q -c -o".\Release\Example_2833xSWPrioritizedInterrupts.out" -x
-
diff --git a/Source/External/v120/DSP2833x_examples/timed_led_blink/Example_2833xLEDBlink.c b/Source/External/v120/DSP2833x_examples/timed_led_blink/Example_2833xLEDBlink.c
deleted file mode 100644
index 8b80d5c..0000000
--- a/Source/External/v120/DSP2833x_examples/timed_led_blink/Example_2833xLEDBlink.c
+++ /dev/null
@@ -1,161 +0,0 @@
-// TI File $Revision: /main/2 $
-// Checkin $Date: April 21, 2008   15:44:40 $
-//###########################################################################
-//
-// FILE:    Example_2833xLedBlink.c
-//
-// TITLE:   DSP2833x eZdsp LED Blink Getting Started Program.
-//
-// ASSUMPTIONS:
-//
-//    This program requires the DSP2833x header files.
-//
-//
-//    As supplied, this project is configured for "boot to SARAM"
-//    operation.  The 2833x Boot Mode table is shown below.
-//    For information on configuring the boot mode of an eZdsp,
-//    please refer to the documentation included with the eZdsp,
-//
-//       $Boot_Table:
-//
-//         GPIO87   GPIO86     GPIO85   GPIO84
-//          XA15     XA14       XA13     XA12
-//           PU       PU         PU       PU
-//        ==========================================
-//            1        1          1        1    Jump to Flash
-//            1        1          1        0    SCI-A boot
-//            1        1          0        1    SPI-A boot
-//            1        1          0        0    I2C-A boot
-//            1        0          1        1    eCAN-A boot
-//            1        0          1        0    McBSP-A boot
-//            1        0          0        1    Jump to XINTF x16
-//            1        0          0        0    Jump to XINTF x32
-//            0        1          1        1    Jump to OTP
-//            0        1          1        0    Parallel GPIO I/O boot
-//            0        1          0        1    Parallel XINTF boot
-//            0        1          0        0    Jump to SARAM	    <- "boot to SARAM"
-//            0        0          1        1    Branch to check boot mode
-//            0        0          1        0    Boot to flash, bypass ADC cal
-//            0        0          0        1    Boot to SARAM, bypass ADC cal
-//            0        0          0        0    Boot to SCI-A, bypass ADC cal
-//                                              Boot_Table_End$
-//
-// DESCRIPTION:
-//
-//    This example configures CPU Timer0 for a 500 msec period, and toggles the GPIO32
-//    LED on the 2833x eZdsp once per interrupt. For testing purposes, this example
-//    also increments a counter each time the timer asserts an interrupt.
-//
-//       Watch Variables:
-//          CpuTimer0.InterruptCount
-//
-//       Monitor the GPIO32 LED blink on (for 500 msec) and off (for 500 msec) on the 2833x eZdsp.
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-
-#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File
-
-// Prototype statements for functions found within this file.
-interrupt void cpu_timer0_isr(void);
-
-void main(void)
-{
-
-// Step 1. Initialize System Control:
-// PLL, WatchDog, enable Peripheral Clocks
-// This example function is found in the DSP2833x_SysCtrl.c file.
-   InitSysCtrl();
-
-// Step 2. Initalize GPIO:
-// This example function is found in the DSP2833x_Gpio.c file and
-// illustrates how to set the GPIO to it's default state.
-// InitGpio();  // Skipped for this example
-
-
-// Step 3. Clear all interrupts and initialize PIE vector table:
-// Disable CPU interrupts
-   DINT;
-
-// Initialize the PIE control registers to their default state.
-// The default state is all PIE interrupts disabled and flags
-// are cleared.
-// This function is found in the DSP2833x_PieCtrl.c file.
-   InitPieCtrl();
-
-// Disable CPU interrupts and clear all CPU interrupt flags:
-   IER = 0x0000;
-   IFR = 0x0000;
-
-// Initialize the PIE vector table with pointers to the shell Interrupt
-// Service Routines (ISR).
-// This will populate the entire table, even if the interrupt
-// is not used in this example.  This is useful for debug purposes.
-// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
-// This function is found in DSP2833x_PieVect.c.
-   InitPieVectTable();
-
-// Interrupts that are used in this example are re-mapped to
-// ISR functions found within this file.
-   EALLOW;  // This is needed to write to EALLOW protected registers
-   PieVectTable.TINT0 = &cpu_timer0_isr;
-   EDIS;    // This is needed to disable write to EALLOW protected registers
-
-// Step 4. Initialize the Device Peripheral. This function can be
-//         found in DSP2833x_CpuTimers.c
-   InitCpuTimers();   // For this example, only initialize the Cpu Timers
-#if (CPU_FRQ_150MHZ)
-// Configure CPU-Timer 0 to interrupt every 500 milliseconds:
-// 150MHz CPU Freq, 50 millisecond Period (in uSeconds)
-   ConfigCpuTimer(&CpuTimer0, 150, 500000);
-#endif
-#if (CPU_FRQ_100MHZ)
-// Configure CPU-Timer 0 to interrupt every 500 milliseconds:
-// 100MHz CPU Freq, 50 millisecond Period (in uSeconds)
-   ConfigCpuTimer(&CpuTimer0, 100, 500000);
-#endif
-
-// To ensure precise timing, use write-only instructions to write to the entire register. Therefore, if any
-// of the configuration bits are changed in ConfigCpuTimer and InitCpuTimers (in DSP2833x_CpuTimers.h), the
-// below settings must also be updated.
-
-   CpuTimer0Regs.TCR.all = 0x4001; // Use write-only instruction to set TSS bit = 0
-
-// Step 5. User specific code, enable interrupts:
-
-// Configure GPIO32 as a GPIO output pin
-   EALLOW;
-   GpioCtrlRegs.GPBMUX1.bit.GPIO32 = 0;
-   GpioCtrlRegs.GPBDIR.bit.GPIO32 = 1;
-   EDIS;
-
-// Enable CPU INT1 which is connected to CPU-Timer 0:
-   IER |= M_INT1;
-
-// Enable TINT0 in the PIE: Group 1 interrupt 7
-   PieCtrlRegs.PIEIER1.bit.INTx7 = 1;
-
-// Enable global Interrupts and higher priority real-time debug events:
-   EINT;   // Enable Global interrupt INTM
-   ERTM;   // Enable Global realtime interrupt DBGM
-
-// Step 6. IDLE loop. Just sit and loop forever (optional):
-   for(;;);
-}
-
-
-interrupt void cpu_timer0_isr(void)
-{
-   CpuTimer0.InterruptCount++;
-   GpioDataRegs.GPBTOGGLE.bit.GPIO32 = 1; // Toggle GPIO32 once per 500 milliseconds
-   // Acknowledge this interrupt to receive more interrupts from group 1
-   PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
-}
-
-
-//===========================================================================
-// No more.
-//===========================================================================
diff --git a/Source/External/v120/DSP2833x_examples/timed_led_blink/Example_2833xLEDBlink.gel b/Source/External/v120/DSP2833x_examples/timed_led_blink/Example_2833xLEDBlink.gel
deleted file mode 100644
index 96f17f2..0000000
--- a/Source/External/v120/DSP2833x_examples/timed_led_blink/Example_2833xLEDBlink.gel
+++ /dev/null
@@ -1,38 +0,0 @@
-/*
-// TI File $Revision: /main/1 $
-// Checkin $Date: September 21, 2007   09:00:23 $
-//###########################################################################
-//
-// This .gel file can be used to help load and build the example project.
-// It should be unloaded from Code Composer Studio before loading another 
-// project. 
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-*/
-
-menuitem "DSP2833x CpuTimerExample"
-
-hotmenu Load_and_Build_Project()
-{
-   GEL_ProjectLoad("Example_2833xLEDBlink.pjt");
-   GEL_ProjectBuild("Example_2833xLEDBlink.pjt");
-   Setup_WatchWindow();
-}
-
-hotmenu Load_Code()
-{
-   GEL_Load(".\\debug\\Example_2833xLEDBlink.out");
-   Setup_WatchWindow();
-}
-
-hotmenu Setup_WatchWindow()
-{
-   GEL_WatchReset();
-   GEL_WatchAdd("CpuTimer0.InterruptCount",,"CPU ISR Count");
-   GEL_WatchAdd("CpuTimer0",,"CPU Timer Variables");
-   GEL_WatchAdd("CpuTimer0Regs,x");
-  
-}
diff --git a/Source/External/v120/DSP2833x_examples/timed_led_blink/Example_2833xLEDBlink.pjt b/Source/External/v120/DSP2833x_examples/timed_led_blink/Example_2833xLEDBlink.pjt
deleted file mode 100644
index 8e75e9e..0000000
--- a/Source/External/v120/DSP2833x_examples/timed_led_blink/Example_2833xLEDBlink.pjt
+++ /dev/null
@@ -1,46 +0,0 @@
-; Code Composer Project File, Version 2.0 (do not modify or remove this line)
-
-[Project Settings]
-ProjectName="DSP2833x"
-ProjectDir="C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\timed_led_blink\"
-ProjectType=Executable
-CPUFamily=TMS320C28XX
-Tool="Compiler"
-Tool="CustomBuilder"
-Tool="DspBiosBuilder"
-Tool="Linker"
-Config="Debug"
-Config="Release"
-
-[Source Files]
-Source="..\..\DSP2833x_common\source\DSP2833x_ADC_cal.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CodeStartBranch.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CpuTimers.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_DefaultIsr.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieVect.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_SysCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_usDelay.asm"
-Source="..\..\DSP2833x_headers\source\DSP2833x_GlobalVariableDefs.c"
-Source="Example_2833xLEDBlink.c"
-Source="..\..\DSP2833x_common\cmd\28335_RAM_lnk.cmd"
-Source="..\..\DSP2833x_headers\cmd\DSP2833x_Headers_nonBIOS.cmd"
-
-["Compiler" Settings: "Debug"]
-Options=-g -q -pdr -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\timed_led_blink\Debug" -fs"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\timed_led_blink\Debug" -i"..\..\DSP2833x_headers\include" -i"..\..\DSP2833x_common\include" -d"_DEBUG" -d"LARGE_MODEL" --float_support=fpu32 -ml -mt -v28
-
-["Compiler" Settings: "Release"]
-Options=-q -o3 -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\timed_led_blink\Release" -d"LARGE_MODEL" -ml -v28
-
-["DspBiosBuilder" Settings: "Debug"]
-Options=-v28
-
-["DspBiosBuilder" Settings: "Release"]
-Options=-v28
-
-["Linker" Settings: "Debug"]
-Options=-q -c -ecode_start -m".\Debug\Example_2833xLEDBlink.map" -o".\Debug\Example_2833xLEDBlink.out" -stack0x200 -w -x -i"..\..\DSP2833x_headers\include" -l"rts2800_fpu32.lib"
-
-["Linker" Settings: "Release"]
-Options=-q -c -o".\Release\Example_2833xLEDBlink.out" -x
-
diff --git a/Source/External/v120/DSP2833x_examples/watchdog/Example_2833xWatchdog.c b/Source/External/v120/DSP2833x_examples/watchdog/Example_2833xWatchdog.c
deleted file mode 100644
index d424eb5..0000000
--- a/Source/External/v120/DSP2833x_examples/watchdog/Example_2833xWatchdog.c
+++ /dev/null
@@ -1,176 +0,0 @@
-// TI File $Revision: /main/9 $
-// Checkin $Date: April 21, 2008   15:43:50 $
-//###########################################################################
-//
-// FILE:   Example_2833xWatchdog.c
-//
-// TITLE:  DSP2833x Watchdog interrupt test program.
-//
-// ASSUMPTIONS:
-//
-//    This program requires the DSP2833x header files.  
-//
-//    As supplied, this project is configured for "boot to SARAM" 
-//    operation.  The 2833x Boot Mode table is shown below.  
-//    For information on configuring the boot mode of an eZdsp, 
-//    please refer to the documentation included with the eZdsp,  
-//
-//       $Boot_Table:
-//
-//         GPIO87   GPIO86     GPIO85   GPIO84
-//          XA15     XA14       XA13     XA12
-//           PU       PU         PU       PU
-//        ==========================================
-//            1        1          1        1    Jump to Flash
-//            1        1          1        0    SCI-A boot
-//            1        1          0        1    SPI-A boot
-//            1        1          0        0    I2C-A boot
-//            1        0          1        1    eCAN-A boot
-//            1        0          1        0    McBSP-A boot
-//            1        0          0        1    Jump to XINTF x16
-//            1        0          0        0    Jump to XINTF x32
-//            0        1          1        1    Jump to OTP
-//            0        1          1        0    Parallel GPIO I/O boot
-//            0        1          0        1    Parallel XINTF boot
-//            0        1          0        0    Jump to SARAM	    <- "boot to SARAM"
-//            0        0          1        1    Branch to check boot mode
-//            0        0          1        0    Boot to flash, bypass ADC cal
-//            0        0          0        1    Boot to SARAM, bypass ADC cal
-//            0        0          0        0    Boot to SCI-A, bypass ADC cal
-//                                              Boot_Table_End$
-//
-// DESCRIPTION:
-//
-//   This program exercises the watchdog.  
-//
-//   First the watchdog is connected to the WAKEINT interrupt of the
-//   PIE block.  The code is then put into an infinite loop.
-// 
-//   The user can select to feed the watchdog key register or not
-//   by commenting one line of code in the infinite loop.
-//
-//   If the watchdog key register is fed by the ServiceDog function 
-//   then the WAKEINT interrupt is not taken.  If the key register 
-//   is not fed by the ServiceDog function then WAKEINT will be taken.  
-//
-//      Watch Variables:
-//         LoopCount for the number of times through the infinite loop
-//         WakeCount for the number of times through WAKEINT
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-
-#include "DSP2833x_Device.h"     // Headerfile Include File
-#include "DSP2833x_Examples.h"   // Examples Include File
-
-// Prototype statements for functions found within this file.
-interrupt void wakeint_isr(void);
-
-// Global variables for this example
-Uint32 WakeCount;
-Uint32 LoopCount;
-
-void main(void)
-{
-
-// Step 1. Initialize System Control:
-// PLL, WatchDog, enable Peripheral Clocks
-// This example function is found in the DSP2833x_SysCtrl.c file.
-   InitSysCtrl();
-   
-// Step 2. Initalize GPIO: 
-// This example function is found in the DSP2833x_Gpio.c file and
-// illustrates how to set the GPIO to it's default state.
-// InitGpio();  // Skipped for this example  
-
-// Step 3. Clear all interrupts and initialize PIE vector table:
-// Disable CPU interrupts 
-   DINT;
-
-// Initialize PIE control registers to their default state.
-// The default state is all PIE interrupts disabled and flags
-// are cleared.  
-// This function is found in the DSP2833x_PieCtrl.c file.
-   InitPieCtrl();
-
-// Disable CPU interrupts and clear all CPU interrupt flags:
-   IER = 0x0000;
-   IFR = 0x0000;
-
-// Initialize the PIE vector table with pointers to the shell Interrupt 
-// Service Routines (ISR).  
-// This will populate the entire table, even if the interrupt
-// is not used in this example.  This is useful for debug purposes.
-// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
-// This function is found in DSP2833x_PieVect.c.
-   InitPieVectTable();
-
-// Interrupts that are used in this example are re-mapped to
-// ISR functions found within this file.  
-   EALLOW;	// This is needed to write to EALLOW protected registers
-   PieVectTable.WAKEINT = &wakeint_isr;
-   EDIS;   // This is needed to disable write to EALLOW protected registers
-	
-// Step 4. Initialize all the Device Peripherals:
-// This function is found in DSP2833x_InitPeripherals.c
-// InitPeripherals(); // Not required for this example
- 
-// Step 5. User specific code, enable interrupts:
-
-// Clear the counters
-   WakeCount = 0; // Count interrupts
-   LoopCount = 0; // Count times through idle loop
-
-// Connect the watchdog to the WAKEINT interrupt of the PIE
-// Write to the whole SCSR register to avoid clearing WDOVERRIDE bit
-   EALLOW;
-   SysCtrlRegs.SCSR = BIT1;
-   EDIS;
-
-// Enable WAKEINT in the PIE: Group 1 interrupt 8
-// Enable INT1 which is connected to WAKEINT:
-   PieCtrlRegs.PIECTRL.bit.ENPIE = 1;   // Enable the PIE block
-   PieCtrlRegs.PIEIER1.bit.INTx8 = 1;   // Enable PIE Gropu 1 INT8
-   IER |= M_INT1;                       // Enable CPU int1
-   EINT;                                // Enable Global Interrupts
-
-// Reset the watchdog counter
-   ServiceDog();
-      
-// Enable the watchdog
-   EALLOW;
-   SysCtrlRegs.WDCR = 0x0028;   
-   EDIS;
-   
-// Step 6. IDLE loop. Just sit and loop forever (optional):	
-   for(;;)
-   {
-      LoopCount++;
-	    
-      // Uncomment ServiceDog to just loop here
-      // Comment ServiceDog to take the WAKEINT instead
-      // ServiceDog();
-   }
-	
-
-} 	
-
-
-// Step 7. Insert all local Interrupt Service Routines (ISRs) and functions here:	
-// If local ISRs are used, reassign vector addresses in vector table as
-// shown in Step 5
-
-interrupt void wakeint_isr(void)
-{
-	WakeCount++;
-	
-	// Acknowledge this interrupt to get more from group 1
-	PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
-}
-
-//===========================================================================
-// No more.
-//===========================================================================
diff --git a/Source/External/v120/DSP2833x_examples/watchdog/Example_2833xWatchdog.gel b/Source/External/v120/DSP2833x_examples/watchdog/Example_2833xWatchdog.gel
deleted file mode 100644
index 1f8e577..0000000
--- a/Source/External/v120/DSP2833x_examples/watchdog/Example_2833xWatchdog.gel
+++ /dev/null
@@ -1,41 +0,0 @@
-/*
-// TI File $Revision: /main/5 $
-// Checkin $Date: August 9, 2007   17:24:09 $
-//###########################################################################
-//
-// This .gel file can be used to help load and build the example project.
-// It should be unloaded from Code Composer Studio before loading another 
-// project. 
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-*/
-
-menuitem "DSP2833x Watchdog"
-
-hotmenu Load_and_Build_Project()
-{
-   GEL_ProjectLoad("Example_2833xWatchdog.pjt");
-   GEL_ProjectBuild("Example_2833xWatchdog.pjt");
-   Setup_WatchWindow();
-}
-
-hotmenu Load_Code()
-{
-   GEL_Load(".\\debug\\Example_2833xWatchdog.out");
-   Setup_WatchWindow();
-}
-
-hotmenu Setup_WatchWindow()
-{
-   GEL_WatchReset();
-   GEL_WatchAdd("LoopCount,x");
-   GEL_WatchAdd("WakeCount,x");
-   GEL_WatchAdd("SysCtrlRegs.SCSR,x");
-   GEL_WatchAdd("SysCtrlRegs.WDCR,x");
-   GEL_WatchAdd("SysCtrlRegs,x");
-}
-
-
diff --git a/Source/External/v120/DSP2833x_examples/watchdog/Example_2833xWatchdog.pjt b/Source/External/v120/DSP2833x_examples/watchdog/Example_2833xWatchdog.pjt
deleted file mode 100644
index e72a9a3..0000000
--- a/Source/External/v120/DSP2833x_examples/watchdog/Example_2833xWatchdog.pjt
+++ /dev/null
@@ -1,44 +0,0 @@
-; Code Composer Project File, Version 2.0 (do not modify or remove this line)
-
-[Project Settings]
-ProjectName="DSP2833x"
-ProjectDir="C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\watchdog\"
-ProjectType=Executable
-CPUFamily=TMS320C28XX
-Tool="Compiler"
-Tool="DspBiosBuilder"
-Tool="Linker"
-Config="Debug"
-Config="Release"
-
-[Source Files]
-Source="..\..\DSP2833x_common\source\DSP2833x_ADC_cal.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CodeStartBranch.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_DefaultIsr.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieVect.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_SysCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_usDelay.asm"
-Source="..\..\DSP2833x_headers\source\DSP2833x_GlobalVariableDefs.c"
-Source="Example_2833xWatchdog.c"
-Source="..\..\DSP2833x_common\cmd\28335_RAM_lnk.cmd"
-Source="..\..\DSP2833x_headers\cmd\DSP2833x_Headers_nonBIOS.cmd"
-
-["Compiler" Settings: "Debug"]
-Options=-g -q -pdr -as -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\watchdog\Debug" -fs"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\watchdog\Debug" -i"..\..\DSP2833x_headers\include" -i"..\..\DSP2833x_common\include" -d"_DEBUG" -d"LARGE_MODEL" --float_support=fpu32 -ml -mt -v28
-
-["Compiler" Settings: "Release"]
-Options=-q -o3 -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\watchdog\Release" -d"LARGE_MODEL" -ml -v28
-
-["DspBiosBuilder" Settings: "Debug"]
-Options=-v28
-
-["DspBiosBuilder" Settings: "Release"]
-Options=-v28
-
-["Linker" Settings: "Debug"]
-Options=-q -c -ecode_start -m".\Debug\Example_2833xWatchdog.map" -o".\Debug\Example_2833xWatchdog.out" -stack0x200 -w -x -l"rts2800_fpu32.lib"
-
-["Linker" Settings: "Release"]
-Options=-q -c -o".\Release\Example_2833xWatchdog.out" -x
-
diff --git a/Source/External/v120/DSP2833x_examples/xintf_run_from/28335_RAM_xintf_lnk.cmd b/Source/External/v120/DSP2833x_examples/xintf_run_from/28335_RAM_xintf_lnk.cmd
deleted file mode 100644
index 8d7dc3c..0000000
--- a/Source/External/v120/DSP2833x_examples/xintf_run_from/28335_RAM_xintf_lnk.cmd
+++ /dev/null
@@ -1,167 +0,0 @@
-/*
-// TI File $Revision: /main/1 $
-// Checkin $Date: August 29, 2007   14:08:00 $
-//###########################################################################
-//
-// FILE:    28335_RAM_xintf_lnk.cmd
-//
-// TITLE:   Linker Command File For 28335 examples that run out of RAM
-//
-//          This ONLY includes all SARAM blocks on the 28335 device.
-//          This does not include flash or OTP. 
-//
-//          Keep in mind that L0 and L1 are protected by the code
-//          security module.
-//
-//          What this means is in most cases you will want to move to 
-//          another memory map file which has more memory defined.  
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-*/
-
-/* ======================================================
-// For Code Composer Studio V2.2 and later
-// ---------------------------------------
-// In addition to this memory linker command file, 
-// add the header linker command file directly to the project. 
-// The header linker command file is required to link the
-// peripheral structures to the proper locations within 
-// the memory map.
-//
-// The header linker files are found in <base>\DSP2833x_Headers\cmd
-//   
-// For BIOS applications add:      DSP2833x_Headers_BIOS.cmd
-// For nonBIOS applications add:   DSP2833x_Headers_nonBIOS.cmd    
-========================================================= */
-
-/* ======================================================
-// For Code Composer Studio prior to V2.2
-// --------------------------------------
-// 1) Use one of the following -l statements to include the 
-// header linker command file in the project. The header linker
-// file is required to link the peripheral structures to the proper 
-// locations within the memory map                                    */
-
-/* Uncomment this line to include file only for non-BIOS applications */
-/* -l DSP2833x_Headers_nonBIOS.cmd */
-
-/* Uncomment this line to include file only for BIOS applications */
-/* -l DSP2833x_Headers_BIOS.cmd */
-
-/* 2) In your project add the path to <base>\DSP2833x_headers\cmd to the
-   library search path under project->build options, linker tab, 
-   library search path (-i).
-/*========================================================= */
-
-/* Define the memory block start/length for the F28335  
-   PAGE 0 will be used to organize program sections
-   PAGE 1 will be used to organize data sections
-
-   Notes: 
-         Memory blocks on F28335 are uniform (ie same
-         physical memory) in both PAGE 0 and PAGE 1.  
-         That is the same memory region should not be
-         defined for both PAGE 0 and PAGE 1.
-         Doing so will result in corruption of program 
-         and/or data. 
-         
-         L0/L1/L2 and L3 memory blocks are mirrored - that is
-         they can be accessed in high memory or low memory.
-         For simplicity only one instance is used in this
-         linker file. 
-         
-         Contiguous SARAM memory blocks can be combined 
-         if required to create a larger memory block. 
-*/
-
-
-MEMORY
-{
-PAGE 0 :
-   /* BEGIN is used for the "boot to SARAM" bootloader mode      */
-   /* BOOT_RSVD is used by the boot ROM for stack.               */
-   /* This section is only reserved to keep the BOOT ROM from    */
-   /* corrupting this area during the debug process              */
-   
-   BEGIN      : origin = 0x000000, length = 0x000002     /* Boot to M0 will go here                      */
-   BOOT_RSVD  : origin = 0x000002, length = 0x00004E     /* Part of M0, BOOT rom will use this for stack */               
-   RAMM0      : origin = 0x000050, length = 0x0003B0
-
-   RAML0      : origin = 0x008000, length = 0x001000    
-   RAML1      : origin = 0x009000, length = 0x001000    
-   RAML2      : origin = 0x00A000, length = 0x001000    
-   RAML3      : origin = 0x00B000, length = 0x001000 
-   ZONE7A     : origin = 0x200000, length = 0x00FC00     /* XINTF zone 7 - program space */ 
-   CSM_RSVD   : origin = 0x33FF80, length = 0x000076     /* Part of FLASHA.  Program with all 0x0000 when CSM is in use. */
-   CSM_PWL    : origin = 0x33FFF8, length = 0x000008     /* Part of FLASHA.  CSM password locations in FLASHA            */
-   ADC_CAL    : origin = 0x380080, length = 0x000009
-   RESET      : origin = 0x3FFFC0, length = 0x000002
-   IQTABLES   : origin = 0x3FE000, length = 0x000b50
-   IQTABLES2  : origin = 0x3FEB50, length = 0x00008c
-   FPUTABLES  : origin = 0x3FEBDC, length = 0x0006A0
-   BOOTROM    : origin = 0x3FF27C, length = 0x000D44               
-
-         
-PAGE 1 : 
-   RAMM1      : origin = 0x000400, length = 0x000400     /* on-chip RAM block M1 */
-   RAML4      : origin = 0x00C000, length = 0x001000    
-   RAML5      : origin = 0x00D000, length = 0x001000    
-   RAML6      : origin = 0x00E000, length = 0x001000    
-   RAML7      : origin = 0x00F000, length = 0x001000 
-   ZONE7B     : origin = 0x20FC00, length = 0x000400     /* XINTF zone 7 - data space */
-}
- 
- 
-SECTIONS
-{
-   /* Setup for "boot to SARAM" mode: 
-      The codestart section (found in DSP28_CodeStartBranch.asm)
-      re-directs execution to the start of user code.  */
-   codestart        : > BEGIN,     PAGE = 0
-   ramfuncs         : > RAML0,     PAGE = 0  
-   .text            : > RAML1,     PAGE = 0
-   .cinit           : > RAML0,     PAGE = 0
-   .pinit           : > RAML0,     PAGE = 0
-   .switch          : > RAML0,     PAGE = 0
-
-   xintffuncs       : LOAD = RAML1, 
-                      RUN = ZONE7A, 
-                      LOAD_START(_XintffuncsLoadStart),
-                      LOAD_END(_XintffuncsLoadEnd),
-                      RUN_START(_XintffuncsRunStart),
-                      PAGE = 0
-   
-   .stack           : > RAMM1,     PAGE = 1
-   .ebss            : > RAML4,     PAGE = 1
-   .econst          : > RAML5,     PAGE = 1      
-   .esysmem         : > RAMM1,     PAGE = 1
-
-   IQmath           : > RAML1,     PAGE = 0
-   IQmathTables     : > IQTABLES,  PAGE = 0, TYPE = NOLOAD 
-   IQmathTables2    : > IQTABLES2, PAGE = 0, TYPE = NOLOAD 
-   FPUmathTables    : > FPUTABLES, PAGE = 0, TYPE = NOLOAD 
-      
-   DMARAML4         : > RAML4,     PAGE = 1
-   DMARAML5         : > RAML5,     PAGE = 1
-   DMARAML6         : > RAML6,     PAGE = 1
-   DMARAML7         : > RAML7,     PAGE = 1
-   
-   ZONE7DATA        : > ZONE7B,    PAGE = 1  
-
-   .reset           : > RESET,     PAGE = 0, TYPE = DSECT /* not used                    */
-   csm_rsvd         : > CSM_RSVD   PAGE = 0, TYPE = DSECT /* not used for SARAM examples */
-   csmpasswds       : > CSM_PWL    PAGE = 0, TYPE = DSECT /* not used for SARAM examples */
-   
-   /* Allocate ADC_cal function (pre-programmed by factory into TI reserved memory) */
-   .adc_cal     : load = ADC_CAL,   PAGE = 0, TYPE = NOLOAD
-     
-}
-
-/*
-//===========================================================================
-// End of file.
-//===========================================================================
-*/
diff --git a/Source/External/v120/DSP2833x_examples/xintf_run_from/Example_2833xCodeRunFromXintf.c b/Source/External/v120/DSP2833x_examples/xintf_run_from/Example_2833xCodeRunFromXintf.c
deleted file mode 100644
index 2902cff..0000000
--- a/Source/External/v120/DSP2833x_examples/xintf_run_from/Example_2833xCodeRunFromXintf.c
+++ /dev/null
@@ -1,256 +0,0 @@
-//###########################################################################
-//
-// FILE:    Example_2833xCodeRunFromXintf.c
-//
-// TITLE:   Example Program That Executes From XINTF
-//
-// ASSUMPTIONS:
-//
-//    This program requires the DSP2833x header files.
-//
-//    As supplied, this project is configured for "boot to SARAM"
-//    operation.  The 2833x Boot Mode table is shown below.
-//    For information on configuring the boot mode of an eZdsp,
-//    please refer to the documentation included with the eZdsp,
-//
-//       $Boot_Table:
-//
-//         GPIO87   GPIO86     GPIO85   GPIO84
-//          XA15     XA14       XA13     XA12
-//           PU       PU         PU       PU
-//        ==========================================
-//            1        1          1        1    Jump to Flash
-//            1        1          1        0    SCI-A boot
-//            1        1          0        1    SPI-A boot
-//            1        1          0        0    I2C-A boot
-//            1        0          1        1    eCAN-A boot
-//            1        0          1        0    McBSP-A boot
-//            1        0          0        1    Jump to XINTF x16
-//            1        0          0        0    Jump to XINTF x32
-//            0        1          1        1    Jump to OTP
-//            0        1          1        0    Parallel GPIO I/O boot
-//            0        1          0        1    Parallel XINTF boot
-//            0        1          0        0    Jump to SARAM	    <- "boot to SARAM"
-//            0        0          1        1    Branch to check boot mode
-//            0        0          1        0    Boot to flash, bypass ADC cal
-//            0        0          0        1    Boot to SARAM, bypass ADC cal
-//            0        0          0        0    Boot to SCI-A, bypass ADC cal
-//                                              Boot_Table_End$
-//
-// DESCRIPTION:
-//
-//          This example configures CPU Timer0 and increments
-//          a counter each time the timer asserts an interrupt.
-//
-//          The code is loaded into SARAM.  The XINTF Zone 7 is
-//          configured for x16-bit data bus.  A porition of the code
-//          is copied to XINTF for execution there.
-//
-//       Watch Variables:
-//          CpuTimer0.InterruptCount
-//          CpuTimer1.InterruptCount
-//          CpuTimer2.InterruptCount
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-
-#include "DSP28x_Project.h"     // Device Headerfile and Examples Include File
-
-// These two functions will be loaded into SARAM and copied to
-// XINTF zone 7 for execution
-#pragma CODE_SECTION(cpu_timer0_isr,"xintffuncs");
-#pragma CODE_SECTION(cpu_timer1_isr,"xintffuncs");
-
-// Prototype statements for functions found within this file:
-void init_zone7(void);
-interrupt void cpu_timer0_isr(void);
-interrupt void cpu_timer1_isr(void);
-interrupt void cpu_timer2_isr(void);
-
-void main(void)
-{
-
-// Step 1. Initialize System Control:
-// PLL, WatchDog, enable Peripheral Clocks
-// This example function is found in the DSP2833x_SysCtrl.c file.
-   InitSysCtrl();
-
-// Step 2. Initalize GPIO:
-// This example function is found in the DSP2833x_Gpio.c file and
-// illustrates how to set the GPIO to it's default state.
-// InitGpio();  // Skipped for this example
-
-
-// Step 3. Clear all interrupts and initialize PIE vector table:
-// Disable CPU interrupts
-   DINT;
-
-// Initialize the PIE control registers to their default state.
-// The default state is all PIE interrupts disabled and flags
-// are cleared.
-// This function is found in the DSP2833x_PieCtrl.c file.
-   InitPieCtrl();
-
-// Disable CPU interrupts and clear all CPU interrupt flags:
-   IER = 0x0000;
-   IFR = 0x0000;
-
-// Initialize the PIE vector table with pointers to the shell Interrupt
-// Service Routines (ISR).
-// This will populate the entire table, even if the interrupt
-// is not used in this example.  This is useful for debug purposes.
-// The shell ISR routines are found in DSP2833x_DefaultIsr.c.
-// This function is found in DSP2833x_PieVect.c.
-   InitPieVectTable();
-
-// Interrupts that are used in this example are re-mapped to
-// ISR functions found within this file.
-   EALLOW;  // This is needed to write to EALLOW protected registers
-   PieVectTable.TINT0 = &cpu_timer0_isr;
-   PieVectTable.XINT13 = &cpu_timer1_isr;
-   PieVectTable.TINT2 = &cpu_timer2_isr;
-   EDIS;    // This is needed to disable write to EALLOW protected registers
-
-// Step 4. Initialize the Device Peripheral. This function can be
-//         found in DSP2833x_CpuTimers.c
-   InitCpuTimers();   // For this example, only initialize the Cpu Timers
-
-#if (CPU_FRQ_150MHZ)
-// Configure CPU-Timer 0, 1, and 2 to interrupt every second:
-// 150MHz CPU Freq, 1 second Period (in uSeconds)
-
-   ConfigCpuTimer(&CpuTimer0, 150, 1000000);
-   ConfigCpuTimer(&CpuTimer1, 150, 1000000);
-   ConfigCpuTimer(&CpuTimer2, 150, 1000000);
-#endif
-
-#if (CPU_FRQ_100MHZ)
-// Configure CPU-Timer 0, 1, and 2 to interrupt every second:
-// 100MHz CPU Freq, 1 second Period (in uSeconds)
-
-   ConfigCpuTimer(&CpuTimer0, 100, 1000000);
-   ConfigCpuTimer(&CpuTimer1, 100, 1000000);
-   ConfigCpuTimer(&CpuTimer2, 100, 1000000);
-#endif
-
-// To ensure precise timing, use write-only instructions to write to the entire register. Therefore, if any
-// of the configuration bits are changed in ConfigCpuTimer and InitCpuTimers (in DSP2833x_CpuTimers.h), the
-// below settings must also be updated.
-
-   CpuTimer0Regs.TCR.all = 0x4001; // Use write-only instruction to set TSS bit = 0
-   CpuTimer1Regs.TCR.all = 0x4001; // Use write-only instruction to set TSS bit = 0
-   CpuTimer2Regs.TCR.all = 0x4001; // Use write-only instruction to set TSS bit = 0
-
-// Step 5. User specific code, enable interrupts:
-
-// Initalize XINTF Zone 7
-   init_zone7();
-
-// Copy non-time critical code to XINTF
-// This includes the following ISR functions: cpu_timer0_isr(), cpu_timer1_isr()
-// The  XintffuncsLoadStart, XintffuncsLoadEnd, and XintffuncsRunStart
-// symbols are created by the linker. Refer to the F28335_ram_xintf.cmd file.
-   MemCopy(&XintffuncsLoadStart, &XintffuncsLoadEnd, &XintffuncsRunStart);
-
-// Enable CPU int1 which is connected to CPU-Timer 0, CPU int13
-// which is connected to CPU-Timer 1, and CPU int 14, which is connected
-// to CPU-Timer 2:
-   IER |= M_INT1;
-   IER |= M_INT13;
-   IER |= M_INT14;
-
-// Enable TINT0 in the PIE: Group 1 interrupt 7
-   PieCtrlRegs.PIEIER1.bit.INTx7 = 1;
-
-// Enable global Interrupts and higher priority real-time debug events:
-   EINT;   // Enable Global interrupt INTM
-   ERTM;   // Enable Global realtime interrupt DBGM
-
-// Step 6. IDLE loop. Just sit and loop forever (optional):
-   for(;;);
-
-}
-
-
-interrupt void cpu_timer0_isr(void)
-{
-   CpuTimer0.InterruptCount++;
-
-   // Acknowledge this interrupt to receive more interrupts from group 1
-   PieCtrlRegs.PIEACK.all = PIEACK_GROUP1;
-}
-
-interrupt void cpu_timer1_isr(void)
-{
-   CpuTimer1.InterruptCount++;
-   // The CPU acknowledges the interrupt.
-   EDIS;
-}
-
-interrupt void cpu_timer2_isr(void)
-{  EALLOW;
-   CpuTimer2.InterruptCount++;
-   // The CPU acknowledges the interrupt.
-   EDIS;
-}
-
-// Configure the timing paramaters for Zone 7.
-// Notes:
-//    This function should not be executed from XINTF
-//    Adjust the timing based on the data manual and
-//    external device requirements.
-void init_zone7(void)
-{
-
-    // Make sure the XINTF clock is enabled
-	SysCtrlRegs.PCLKCR3.bit.XINTFENCLK = 1;
-
-	// Configure the GPIO for XINTF with a 16-bit data bus
-	// This function is in DSP2833x_Xintf.c
-	InitXintf16Gpio();
-
-    EALLOW;
-    // All Zones---------------------------------
-    // Timing for all zones based on XTIMCLK = SYSCLKOUT
-    XintfRegs.XINTCNF2.bit.XTIMCLK = 0;
-    // Buffer up to 3 writes
-    XintfRegs.XINTCNF2.bit.WRBUFF = 3;
-    // XCLKOUT is enabled
-    XintfRegs.XINTCNF2.bit.CLKOFF = 0;
-    // XCLKOUT = XTIMCLK
-    XintfRegs.XINTCNF2.bit.CLKMODE = 0;
-
-    // Zone 7------------------------------------
-    // When using ready, ACTIVE must be 1 or greater
-    // Lead must always be 1 or greater
-    // Zone write timing
-    XintfRegs.XTIMING7.bit.XWRLEAD = 1;
-    XintfRegs.XTIMING7.bit.XWRACTIVE = 2;
-    XintfRegs.XTIMING7.bit.XWRTRAIL = 1;
-    // Zone read timing
-    XintfRegs.XTIMING7.bit.XRDLEAD = 1;
-    XintfRegs.XTIMING7.bit.XRDACTIVE = 3;
-    XintfRegs.XTIMING7.bit.XRDTRAIL = 0;
-
-    // don't double all Zone read/write lead/active/trail timing
-    XintfRegs.XTIMING7.bit.X2TIMING = 0;
-
-    // Zone will not sample XREADY signal
-    XintfRegs.XTIMING7.bit.USEREADY = 0;
-    XintfRegs.XTIMING7.bit.READYMODE = 0;
-
-    // 1,1 = x16 data bus
-    // 0,1 = x32 data bus
-    // other values are reserved
-    XintfRegs.XTIMING7.bit.XSIZE = 3;
-    EDIS;
-
-   //Force a pipeline flush to ensure that the write to
-   //the last register configured occurs before returning.
-   asm(" RPT #7 || NOP");
-}
-
-//===========================================================================
-// No more.
-//===========================================================================
diff --git a/Source/External/v120/DSP2833x_examples/xintf_run_from/Example_2833xCodeRunFromXintf.pjt b/Source/External/v120/DSP2833x_examples/xintf_run_from/Example_2833xCodeRunFromXintf.pjt
deleted file mode 100644
index e71b210..0000000
--- a/Source/External/v120/DSP2833x_examples/xintf_run_from/Example_2833xCodeRunFromXintf.pjt
+++ /dev/null
@@ -1,62 +0,0 @@
-; Code Composer Project File, Version 2.0 (do not modify or remove this line)
-
-[Project Settings]
-ProjectName="DSP2833x"
-ProjectDir="C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\xintf_run_from\"
-ProjectType=Executable
-CPUFamily=TMS320C28XX
-Tool="Compiler"
-Tool="CustomBuilder"
-Tool="DspBiosBuilder"
-Tool="Linker"
-Config="Debug"
-Config="Release"
-
-[Source Files]
-Source="..\..\DSP2833x_common\source\DSP2833x_ADC_cal.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CodeStartBranch.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_CpuTimers.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_DBGIER.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_DefaultIsr.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_MemCopy.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_PieVect.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_SysCtrl.c"
-Source="..\..\DSP2833x_common\source\DSP2833x_usDelay.asm"
-Source="..\..\DSP2833x_common\source\DSP2833x_Xintf.c"
-Source="..\..\DSP2833x_headers\source\DSP2833x_GlobalVariableDefs.c"
-Source="Example_2833xCodeRunFromXintf.c"
-Source="Example_2833xRunFromXintf.gel"
-Source="..\..\DSP2833x_headers\cmd\DSP2833x_Headers_nonBIOS.cmd"
-Source="28335_RAM_xintf_lnk.cmd"
-
-["Compiler" Settings: "Debug"]
-Options=-g -q -pdr -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\xintf_run_from\Debug" -i"..\..\DSP2833x_headers\include" -i"..\..\DSP2833x_common\include" -d"_DEBUG" -d"LARGE_MODEL" -mf -ml -mn -mt -v28 --float_support=fpu32
-
-["Compiler" Settings: "Release"]
-Options=-q -o3 -fr"C:\tidcs\c28\DSP2833x\v120\DSP2833x_examples\xintf_run_from\Release" -d"LARGE_MODEL" -ml -v28
-
-["DspBiosBuilder" Settings: "Debug"]
-Options=-v28
-
-["DspBiosBuilder" Settings: "Release"]
-Options=-v28
-
-["Linker" Settings: "Debug"]
-Options=-q -c -ecode_start -heap0x800 -m".\Debug\Example_2833xCodeRunFromXintf.map" -o".\Debug\Example_2833xCodeRunFromXintf.out" -stack0x380 -w -x -i"..\..\DSP2833x_headers\include" -l"rts2800_fpu32.lib"
-
-["Linker" Settings: "Release"]
-Options=-q -c -o".\Release\Example_2833xCodeRunFromXintf.out" -x
-
-["Example_2833xRunFromXintf.gel" Settings: "Debug"]
-ExcludeFromBuild=true
-
-["Example_2833xRunFromXintf.gel" Settings: "Release"]
-ExcludeFromBuild=true
-
-["28335_RAM_xintf_lnk.cmd" Settings: "Debug"]
-LinkOrder=1
-
-["28335_RAM_xintf_lnk.cmd" Settings: "Release"]
-LinkOrder=1
-
diff --git a/Source/External/v120/DSP2833x_examples/xintf_run_from/Example_2833xRunFromXintf.gel b/Source/External/v120/DSP2833x_examples/xintf_run_from/Example_2833xRunFromXintf.gel
deleted file mode 100644
index 04e0f4f..0000000
--- a/Source/External/v120/DSP2833x_examples/xintf_run_from/Example_2833xRunFromXintf.gel
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
-// TI File $Revision: /main/1 $
-// Checkin $Date: August 29, 2007   14:08:07 $
-//###########################################################################
-//
-// This .gel file can be used to help load and build the example project.
-// It should be unloaded from Code Composer Studio before loading another 
-// project. 
-//
-//###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//###########################################################################
-*/
-
-menuitem "DSP28335 XINTF Run Example"
-
-hotmenu Load_and_Build_Project()
-{
-  GEL_ProjectLoad("Example_2833xCodeRunFromXintf.pjt");
-  GEL_ProjectBuild("Example_2833xCodeRunFromXintf.pjt");
-  Setup_WatchWindow();
-}
-
-hotmenu Load_Code()
-{
-   GEL_Load(".\\debug\\Example_2833xCodeRunFromXintf.out");
-   Setup_WatchWindow();
-}
-
-hotmenu Setup_WatchWindow()
-{
-   GEL_WatchReset();
-   GEL_WatchAdd("CpuTimer0.InterruptCount",,"CPU ISR Count");
-   GEL_WatchAdd("CpuTimer1.InterruptCount",,"CPU ISR Count");
-   GEL_WatchAdd("CpuTimer2.InterruptCount",,"CPU ISR Count");
-}
diff --git a/Source/External/v120/DSP2833x_headers/gel/DSP2833x_DualMap_EPWM.gel b/Source/External/v120/DSP2833x_headers/gel/DSP2833x_DualMap_EPWM.gel
deleted file mode 100644
index e08455b..0000000
--- a/Source/External/v120/DSP2833x_headers/gel/DSP2833x_DualMap_EPWM.gel
+++ /dev/null
@@ -1,237 +0,0 @@
-/*
-/* TI File $Revision: /main/1 $                                               */
-/* Checkin $Date: May 7, 2008   13:07:07 $                                                   */
-/***********************************************************************/
-/* File: DSP2833x_DualMap_EPWM.gel   
-/*                                 
-/* Description: 
-/*   Adds dual-mapped EPWM registers to the GEL menu in     
-/*   Code Composer Studio and allows user to enable dual-mapping of   
-/*   EPWM registers to Peripheral Frame 3 (DMA-accessible) register    
-/*   space
-//#####################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//#####################################################################
-*/
-
-/********************************************************************/
-/* Dual-Mapped Enhanced PWM Registers                               */
-/********************************************************************/
-
-/* Add a space line to the GEL menu */
-menuitem "___________________________________";
-hotmenu ___() {}
-
-menuitem "Dual-Mapped ePWM Registers";
-hotmenu Enable_ePWM_Dual_Mapping ()
-{
-    *0x702E = (*0x702E) | 0x0001;    /*    MAPCNF[MAPEPWM] = 1 */
-}
-hotmenu ePWM1_DualMapped_All_Regs()
-{
-    GEL_WatchAdd("*0x5800,x","ePWM1 TBCTL");
-    GEL_WatchAdd("*0x5801,x","ePWM1 TBSTS");
-    GEL_WatchAdd("*0x5802,x","ePWM1 TBPHSHR");
-    GEL_WatchAdd("*0x5803,x","ePWM1 TBPHS");
-    GEL_WatchAdd("*0x5804,x","ePWM1 TBCTR");
-    GEL_WatchAdd("*0x5805,x","ePWM1 TBPRD");
-    GEL_WatchAdd("*0x5807,x","ePWM1 CMPCTL");
-    GEL_WatchAdd("*0x5808,x","ePWM1 CMPAHR");
-    GEL_WatchAdd("*0x5809,x","ePWM1 CMPA");
-    GEL_WatchAdd("*0x580A,x","ePWM1 CMPB");
-    GEL_WatchAdd("*0x580B,x","ePWM1 AQCTLA");
-    GEL_WatchAdd("*0x580C,x","ePWM1 AQCTLB");
-    GEL_WatchAdd("*0x580D,x","ePWM1 AQSFRC");
-    GEL_WatchAdd("*0x580E,x","ePWM1 AQCSFRC");
-    GEL_WatchAdd("*0x580F,x","ePWM1 DBCTL");
-    GEL_WatchAdd("*0x5810,x","ePWM1 DBRED");
-    GEL_WatchAdd("*0x5811,x","ePWM1 DBFED");
-    GEL_WatchAdd("*0x5812,x","ePWM1 TZSEL");
-    GEL_WatchAdd("*0x5813,x","ePWM1 TZDCSEL");
-    GEL_WatchAdd("*0x5814,x","ePWM1 TZCTL");
-    GEL_WatchAdd("*0x5815,x","ePWM1 TZEINT");
-    GEL_WatchAdd("*0x5816,x","ePWM1 TZFLG");
-    GEL_WatchAdd("*0x5817,x","ePWM1 TZCLR");
-    GEL_WatchAdd("*0x5818,x","ePWM1 TZFRC");
-    GEL_WatchAdd("*0x5819,x","ePWM1 ETSEL");
-    GEL_WatchAdd("*0x581A,x","ePWM1 ETPS");
-    GEL_WatchAdd("*0x581B,x","ePWM1 ETFLG");
-    GEL_WatchAdd("*0x581C,x","ePWM1 ETCLR");
-    GEL_WatchAdd("*0x581D,x","ePWM1 ETFRC");
-    GEL_WatchAdd("*0x581E,x","ePWM1 PCCTL");
-    GEL_WatchAdd("*0x5820,x","ePWM1 HRCNFG");
-}
-
-hotmenu ePWM2_DualMapped_All_Regs()
-{
-    GEL_WatchAdd("*0x5840,x","ePWM2 TBCTL");
-    GEL_WatchAdd("*0x5841,x","ePWM2 TBSTS");
-    GEL_WatchAdd("*0x5842,x","ePWM2 TBPHSHR");
-    GEL_WatchAdd("*0x5843,x","ePWM2 TBPHS");
-    GEL_WatchAdd("*0x5844,x","ePWM2 TBCTR");
-    GEL_WatchAdd("*0x5845,x","ePWM2 TBPRD");
-    GEL_WatchAdd("*0x5847,x","ePWM2 CMPCTL");
-    GEL_WatchAdd("*0x5848,x","ePWM2 CMPAHR");
-    GEL_WatchAdd("*0x5849,x","ePWM2 CMPA");
-    GEL_WatchAdd("*0x584A,x","ePWM2 CMPB");
-    GEL_WatchAdd("*0x584B,x","ePWM2 AQCTLA");
-    GEL_WatchAdd("*0x584C,x","ePWM2 AQCTLB");
-    GEL_WatchAdd("*0x584D,x","ePWM2 AQSFRC");
-    GEL_WatchAdd("*0x584E,x","ePWM2 AQCSFRC");
-    GEL_WatchAdd("*0x584F,x","ePWM2 DBCTL");
-    GEL_WatchAdd("*0x5850,x","ePWM2 DBRED");
-    GEL_WatchAdd("*0x5851,x","ePWM2 DBFED");
-    GEL_WatchAdd("*0x5852,x","ePWM2 TZSEL");
-    GEL_WatchAdd("*0x5853,x","ePWM2 TZDCSEL");
-    GEL_WatchAdd("*0x5854,x","ePWM2 TZCTL");
-    GEL_WatchAdd("*0x5855,x","ePWM2 TZEINT");
-    GEL_WatchAdd("*0x5856,x","ePWM2 TZFLG");
-    GEL_WatchAdd("*0x5857,x","ePWM2 TZCLR");
-    GEL_WatchAdd("*0x5858,x","ePWM2 TZFRC");
-    GEL_WatchAdd("*0x5859,x","ePWM2 ETSEL");
-    GEL_WatchAdd("*0x585A,x","ePWM2 ETPS");
-    GEL_WatchAdd("*0x585B,x","ePWM2 ETFLG");
-    GEL_WatchAdd("*0x585C,x","ePWM2 ETCLR");
-    GEL_WatchAdd("*0x585D,x","ePWM2 ETFRC");
-    GEL_WatchAdd("*0x585E,x","ePWM2 PCCTL");
-    GEL_WatchAdd("*0x5860,x","ePWM2 HRCNFG");
-}
-hotmenu ePWM3_DualMapped_All_Regs()
-{
-    GEL_WatchAdd("*0x5880,x","ePWM3 TBCTL");
-    GEL_WatchAdd("*0x5881,x","ePWM3 TBSTS");
-    GEL_WatchAdd("*0x5882,x","ePWM3 TBPHSHR");
-    GEL_WatchAdd("*0x5883,x","ePWM3 TBPHS");
-    GEL_WatchAdd("*0x5884,x","ePWM3 TBCTR");
-    GEL_WatchAdd("*0x5885,x","ePWM3 TBPRD");
-    GEL_WatchAdd("*0x5887,x","ePWM3 CMPCTL");
-    GEL_WatchAdd("*0x5888,x","ePWM3 CMPAHR");
-    GEL_WatchAdd("*0x5889,x","ePWM3 CMPA");
-    GEL_WatchAdd("*0x588A,x","ePWM3 CMPB");
-    GEL_WatchAdd("*0x588B,x","ePWM3 AQCTLA");
-    GEL_WatchAdd("*0x588C,x","ePWM3 AQCTLB");
-    GEL_WatchAdd("*0x588D,x","ePWM3 AQSFRC");
-    GEL_WatchAdd("*0x588E,x","ePWM3 AQCSFRC");
-    GEL_WatchAdd("*0x588F,x","ePWM3 DBCTL");
-    GEL_WatchAdd("*0x5890,x","ePWM3 DBRED");
-    GEL_WatchAdd("*0x5891,x","ePWM3 DBFED");
-    GEL_WatchAdd("*0x5892,x","ePWM3 TZSEL");
-    GEL_WatchAdd("*0x5893,x","ePWM3 TZDCSEL");
-    GEL_WatchAdd("*0x5894,x","ePWM3 TZCTL");
-    GEL_WatchAdd("*0x5895,x","ePWM3 TZEINT");
-    GEL_WatchAdd("*0x5896,x","ePWM3 TZFLG");
-    GEL_WatchAdd("*0x5897,x","ePWM3 TZCLR");
-    GEL_WatchAdd("*0x5898,x","ePWM3 TZFRC");
-    GEL_WatchAdd("*0x5899,x","ePWM3 ETSEL");
-    GEL_WatchAdd("*0x589A,x","ePWM3 ETPS");
-    GEL_WatchAdd("*0x589B,x","ePWM3 ETFLG");
-    GEL_WatchAdd("*0x589C,x","ePWM3 ETCLR");
-    GEL_WatchAdd("*0x589D,x","ePWM3 ETFRC");
-    GEL_WatchAdd("*0x589E,x","ePWM3 PCCTL");
-    GEL_WatchAdd("*0x58A0,x","ePWM3 HRCNFG");
-}
-hotmenu ePWM4_DualMapped_All_Regs()
-{
-    GEL_WatchAdd("*0x58C0,x","ePWM4 TBCTL");
-    GEL_WatchAdd("*0x58C1,x","ePWM4 TBSTS");
-    GEL_WatchAdd("*0x58C2,x","ePWM4 TBPHSHR");
-    GEL_WatchAdd("*0x58C3,x","ePWM4 TBPHS");
-    GEL_WatchAdd("*0x58C4,x","ePWM4 TBCTR");
-    GEL_WatchAdd("*0x58C5,x","ePWM4 TBPRD");
-    GEL_WatchAdd("*0x58C7,x","ePWM4 CMPCTL");
-    GEL_WatchAdd("*0x58C8,x","ePWM4 CMPAHR");
-    GEL_WatchAdd("*0x58C9,x","ePWM4 CMPA");
-    GEL_WatchAdd("*0x58CA,x","ePWM4 CMPB");
-    GEL_WatchAdd("*0x58CB,x","ePWM4 AQCTLA");
-    GEL_WatchAdd("*0x58CC,x","ePWM4 AQCTLB");
-    GEL_WatchAdd("*0x58CD,x","ePWM4 AQSFRC");
-    GEL_WatchAdd("*0x58CE,x","ePWM4 AQCSFRC");
-    GEL_WatchAdd("*0x58CF,x","ePWM4 DBCTL");
-    GEL_WatchAdd("*0x58D0,x","ePWM4 DBRED");
-    GEL_WatchAdd("*0x58D1,x","ePWM4 DBFED");
-    GEL_WatchAdd("*0x58D2,x","ePWM4 TZSEL");
-    GEL_WatchAdd("*0x58D3,x","ePWM4 TZDCSEL");
-    GEL_WatchAdd("*0x58D4,x","ePWM4 TZCTL");
-    GEL_WatchAdd("*0x58D5,x","ePWM4 TZEINT");
-    GEL_WatchAdd("*0x58D6,x","ePWM4 TZFLG");
-    GEL_WatchAdd("*0x58D7,x","ePWM4 TZCLR");
-    GEL_WatchAdd("*0x58D8,x","ePWM4 TZFRC");
-    GEL_WatchAdd("*0x58D9,x","ePWM4 ETSEL");
-    GEL_WatchAdd("*0x58DA,x","ePWM4 ETPS");
-    GEL_WatchAdd("*0x58DB,x","ePWM4 ETFLG");
-    GEL_WatchAdd("*0x58DC,x","ePWM4 ETCLR");
-    GEL_WatchAdd("*0x58DD,x","ePWM4 ETFRC");
-    GEL_WatchAdd("*0x58DE,x","ePWM4 PCCTL");
-    GEL_WatchAdd("*0x58E0,x","ePWM4 HRCNFG");
-}
-hotmenu ePWM5_DualMapped_All_Regs()
-{
-    GEL_WatchAdd("*0x5900,x","ePWM5 TBCTL");
-    GEL_WatchAdd("*0x5901,x","ePWM5 TBSTS");
-    GEL_WatchAdd("*0x5902,x","ePWM5 TBPHSHR");
-    GEL_WatchAdd("*0x5903,x","ePWM5 TBPHS");
-    GEL_WatchAdd("*0x5904,x","ePWM5 TBCTR");
-    GEL_WatchAdd("*0x5905,x","ePWM5 TBPRD");
-    GEL_WatchAdd("*0x5907,x","ePWM5 CMPCTL");
-    GEL_WatchAdd("*0x5908,x","ePWM5 CMPAHR");
-    GEL_WatchAdd("*0x5909,x","ePWM5 CMPA");
-    GEL_WatchAdd("*0x590A,x","ePWM5 CMPB");
-    GEL_WatchAdd("*0x590B,x","ePWM5 AQCTLA");
-    GEL_WatchAdd("*0x590C,x","ePWM5 AQCTLB");
-    GEL_WatchAdd("*0x590D,x","ePWM5 AQSFRC");
-    GEL_WatchAdd("*0x590E,x","ePWM5 AQCSFRC");
-    GEL_WatchAdd("*0x590F,x","ePWM5 DBCTL");
-    GEL_WatchAdd("*0x5910,x","ePWM5 DBRED");
-    GEL_WatchAdd("*0x5911,x","ePWM5 DBFED");
-    GEL_WatchAdd("*0x5912,x","ePWM5 TZSEL");
-    GEL_WatchAdd("*0x5913,x","ePWM5 TZDCSEL");
-    GEL_WatchAdd("*0x5914,x","ePWM5 TZCTL");
-    GEL_WatchAdd("*0x5915,x","ePWM5 TZEINT");
-    GEL_WatchAdd("*0x5916,x","ePWM5 TZFLG");
-    GEL_WatchAdd("*0x5917,x","ePWM5 TZCLR");
-    GEL_WatchAdd("*0x5918,x","ePWM5 TZFRC");
-    GEL_WatchAdd("*0x5919,x","ePWM5 ETSEL");
-    GEL_WatchAdd("*0x591A,x","ePWM5 ETPS");
-    GEL_WatchAdd("*0x591B,x","ePWM5 ETFLG");
-    GEL_WatchAdd("*0x591C,x","ePWM5 ETCLR");
-    GEL_WatchAdd("*0x591D,x","ePWM5 ETFRC");
-    GEL_WatchAdd("*0x591E,x","ePWM5 PCCTL");
-    GEL_WatchAdd("*0x5920,x","ePWM5 HRCNFG");
-}
-hotmenu ePWM6_DualMapped_All_Regs()
-{
-    GEL_WatchAdd("*0x5940,x","ePWM6 TBCTL");
-    GEL_WatchAdd("*0x5941,x","ePWM6 TBSTS");
-    GEL_WatchAdd("*0x5942,x","ePWM6 TBPHSHR");
-    GEL_WatchAdd("*0x5943,x","ePWM6 TBPHS");
-    GEL_WatchAdd("*0x5944,x","ePWM6 TBCTR");
-    GEL_WatchAdd("*0x5945,x","ePWM6 TBPRD");
-    GEL_WatchAdd("*0x5947,x","ePWM6 CMPCTL");
-    GEL_WatchAdd("*0x5948,x","ePWM6 CMPAHR");
-    GEL_WatchAdd("*0x5949,x","ePWM6 CMPA");
-    GEL_WatchAdd("*0x594A,x","ePWM6 CMPB");
-    GEL_WatchAdd("*0x594B,x","ePWM6 AQCTLA");
-    GEL_WatchAdd("*0x594C,x","ePWM6 AQCTLB");
-    GEL_WatchAdd("*0x594D,x","ePWM6 AQSFRC");
-    GEL_WatchAdd("*0x594E,x","ePWM6 AQCSFRC");
-    GEL_WatchAdd("*0x594F,x","ePWM6 DBCTL");
-    GEL_WatchAdd("*0x5950,x","ePWM6 DBRED");
-    GEL_WatchAdd("*0x5951,x","ePWM6 DBFED");
-    GEL_WatchAdd("*0x5952,x","ePWM6 TZSEL");
-    GEL_WatchAdd("*0x5953,x","ePWM6 TZDCSEL");
-    GEL_WatchAdd("*0x5954,x","ePWM6 TZCTL");
-    GEL_WatchAdd("*0x5955,x","ePWM6 TZEINT");
-    GEL_WatchAdd("*0x5956,x","ePWM6 TZFLG");
-    GEL_WatchAdd("*0x5957,x","ePWM6 TZCLR");
-    GEL_WatchAdd("*0x5958,x","ePWM6 TZFRC");
-    GEL_WatchAdd("*0x5959,x","ePWM6 ETSEL");
-    GEL_WatchAdd("*0x595A,x","ePWM6 ETPS");
-    GEL_WatchAdd("*0x595B,x","ePWM6 ETFLG");
-    GEL_WatchAdd("*0x595C,x","ePWM6 ETCLR");
-    GEL_WatchAdd("*0x595D,x","ePWM6 ETFRC");
-    GEL_WatchAdd("*0x595E,x","ePWM6 PCCTL");
-    GEL_WatchAdd("*0x5960,x","ePWM6 HRCNFG");
-
-}
-
diff --git a/Source/External/v120/DSP2833x_headers/gel/DSP2833x_Peripheral.gel b/Source/External/v120/DSP2833x_headers/gel/DSP2833x_Peripheral.gel
deleted file mode 100644
index c51afd1..0000000
--- a/Source/External/v120/DSP2833x_headers/gel/DSP2833x_Peripheral.gel
+++ /dev/null
@@ -1,249 +0,0 @@
-/*
-/* TI File $Revision: /main/7 $                                               */
-/* Checkin $Date: June 2, 2008   11:12:27 $                                                   */
-/*******************************************************************  */
-/* File: DSP2833x_peripheral.gel                                       */
-/* Description: Adds '2833x registers to the GEL menu in               */
-/*   Code Composer Studio using the structures defined in the DSP2833x */
-/*   header files.  The user must have the symbols (.out file)        */
-/*   loaded from a project using the DSP28 structures in order for    */
-/*   these menu items to work.  If symbols are not loaded, the        */
-/*   watch window will report "Identifier not found."                 */
-/*                                                                    
-//#####################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
-//#####################################################################
-*/
-
-/* Add a space line to the GEL menu */
-menuitem "____________________________________";
-hotmenu _() {}
-
-menuitem "Watch DSP2833x Peripheral Structures";                    
-
-hotmenu All_Peripherals_Regs()
-{
-    GEL_WatchAdd("AdcRegs");
-    GEL_WatchAdd("AdcMirror");
-    GEL_WatchAdd("CsmRegs");
-    GEL_WatchAdd("CsmPwl");
-    GEL_WatchAdd("CpuTimer0Regs");
-    GEL_WatchAdd("CpuTimer1Regs");
-    GEL_WatchAdd("CpuTimer2Regs");
-    GEL_WatchAdd("DevEmuRegs");
-    GEL_WatchAdd("DmaRegs");
-    GEL_WatchAdd("ECanaRegs");
-    GEL_WatchAdd("ECanaMboxes");
-    GEL_WatchAdd("ECanaLAMRegs");
-    GEL_WatchAdd("ECanaMOTSRegs");
-    GEL_WatchAdd("ECanbRegs");
-    GEL_WatchAdd("ECanbMboxes");
-    GEL_WatchAdd("ECanbLAMRegs");
-    GEL_WatchAdd("ECanbMOTSRegs");    
-    GEL_WatchAdd("EPwm1Regs");
-    GEL_WatchAdd("EPwm2Regs");
-    GEL_WatchAdd("EPwm3Regs");
-    GEL_WatchAdd("EPwm4Regs");
-    GEL_WatchAdd("EPwm5Regs");
-    GEL_WatchAdd("EPwm6Regs");
-    GEL_WatchAdd("ECap1Regs");                        
-    GEL_WatchAdd("ECap2Regs");                        
-    GEL_WatchAdd("ECap3Regs");                        
-    GEL_WatchAdd("ECap4Regs");                        
-    GEL_WatchAdd("ECap5Regs");                        
-    GEL_WatchAdd("ECap6Regs");                        
-    GEL_WatchAdd("EQep1Regs");                        
-    GEL_WatchAdd("EQep2Regs");                                        
-    GEL_WatchAdd("FlashRegs");
-    GEL_WatchAdd("XIntruptRegs");
-    GEL_WatchAdd("FlashRegs");
-    GEL_WatchAdd("GpioCtrlRegs");
-    GEL_WatchAdd("GpioDataRegs");
-    GEL_WatchAdd("GpioIntRegs");
-    GEL_WatchAdd("I2caRegs");
-    GEL_WatchAdd("McbspaRegs");
-    GEL_WatchAdd("McbspbRegs");
-    GEL_WatchAdd("PartIdRegs");
-    GEL_WatchAdd("PieCtrlRegs");
-    GEL_WatchAdd("PieVectTable");
-    GEL_WatchAdd("SciaRegs");
-    GEL_WatchAdd("ScibRegs");
-    GEL_WatchAdd("ScicRegs");
-    GEL_WatchAdd("SpiaRegs");       
-    GEL_WatchAdd("SysCtrlRegs");
-    GEL_WatchAdd("XintfRegs");
-}
-hotmenu _______________________() {}
-hotmenu ADC_Regs()
-{
-    GEL_WatchAdd("AdcRegs");
-    GEL_WatchAdd("AdcMirror");
-}
-hotmenu Code_Security_Module_Regs()
-{
-    GEL_WatchAdd("CsmRegs");
-    GEL_WatchAdd("CsmPwl");
-}
-hotmenu CPU_Timer0_Regs()
-{
-    GEL_WatchAdd("CpuTimer0Regs");
-}
-hotmenu CPU_Timer1_Regs()
-{
-    GEL_WatchAdd("CpuTimer1Regs");
-}
-hotmenu CPU_Timer2_Regs()
-{
-    GEL_WatchAdd("CpuTimer2Regs");
-}
-hotmenu Device_Emulation_Regs()
-{
-    GEL_WatchAdd("DevEmuRegs");
-}
-hotmenu DMA_Regs()
-{
-    GEL_WatchAdd("DMARegs");
-}
-hotmenu eCANA_Regs()
-{
-    GEL_WatchAdd("ECanaRegs");
-    GEL_WatchAdd("ECanaMboxes");
-    GEL_WatchAdd("ECanaLAMRegs");
-    GEL_WatchAdd("ECanaMOTSRegs");
-}
-hotmenu eCANB_Regs()
-{
-    GEL_WatchAdd("ECanbRegs");
-    GEL_WatchAdd("ECanbMboxes");
-    GEL_WatchAdd("ECanbLAMRegs");
-    GEL_WatchAdd("ECanbMOTSRegs");
-}
-hotmenu EPWM1_Regs()
-{
-    GEL_WatchAdd("EPwm1Regs");
-}
-hotmenu EPWM2_Regs()
-{
-    GEL_WatchAdd("EPwm2Regs");
-}
-hotmenu EPWM3_Regs()
-{
-    GEL_WatchAdd("EPwm3Regs");
-}
-hotmenu EPWM4_Regs()
-{
-    GEL_WatchAdd("EPwm4Regs");
-}
-hotmenu EPWM5_Regs()
-{
-    GEL_WatchAdd("EPwm5Regs");
-}
-hotmenu EPWM6_Regs()
-{
-    GEL_WatchAdd("EPwm6Regs");
-}
-hotmenu ECAP1_Regs()
-{
-    GEL_WatchAdd("ECap1Regs");
-}
-hotmenu ECAP2_Regs()
-{
-    GEL_WatchAdd("ECap2Regs");
-}
-hotmenu ECAP3_Regs()
-{
-    GEL_WatchAdd("ECap3Regs");
-}
-hotmenu ECAP4_Regs()
-{
-    GEL_WatchAdd("ECap4Regs");
-}
-hotmenu ECAP5_Regs()
-{
-    GEL_WatchAdd("ECap5Regs");
-}
-hotmenu ECAP6_Regs()
-{
-    GEL_WatchAdd("ECap6Regs");
-}
-hotmenu EQEP1_Regs()
-{
-    GEL_WatchAdd("EQep1Regs");
-}
-hotmenu EQEP2_Regs()
-{
-    GEL_WatchAdd("EQep2Regs");
-}
-hotmenu External_Interface_Regs()
-{
-    GEL_WatchAdd("XintfRegs");
-}
-hotmenu External_Interrupt_Regs()
-{
-    GEL_WatchAdd("XIntruptRegs");
-}
-hotmenu Flash_and_OTP_Regs()
-{
-    GEL_WatchAdd("FlashRegs");
-}
-hotmenu GPIO_CTRL_Regs()
-{
-    GEL_WatchAdd("GpioCtrlRegs");
-}
-hotmenu GPIO_DATA_Regs()
-{
-    GEL_WatchAdd("GpioDataRegs");
-}
-hotmenu GPIO_INT_Regs()
-{
-    GEL_WatchAdd("GpioIntRegs");
-}
-hotmenu I2CA_Regs()
-{
-    GEL_WatchAdd("I2caRegs");
-}
-hotmenu McBSPA_Regs()
-{
-    GEL_WatchAdd("McbspaRegs");
-}
-hotmenu McBSPB_Regs()
-{
-    GEL_WatchAdd("McbspbRegs");
-}
-hotmenu PartId_Regs()
-{
-    GEL_WatchAdd("PartIdRegs");
-}
-hotmenu PIE_Control_Regs()
-{
-    GEL_WatchAdd("PieCtrlRegs");
-}
-hotmenu SCIA_Regs()
-{
-    GEL_WatchAdd("SciaRegs");
-}
-hotmenu SCIB_Regs()
-{
-    GEL_WatchAdd("ScibRegs");
-}
-hotmenu SPIA_Regs()
-{
-    GEL_WatchAdd("SpiaRegs");
-}
-hotmenu System_and_Control_Regs()
-{
-    GEL_WatchAdd("SysCtrlRegs");
-}
-
-  
-
-/*
-//===========================================================================
-// End of file.
-//===========================================================================
-*/
-
-
-
-
diff --git a/UKSSTMS320F28335/.ccsproject b/UKSSTMS320F28335/.ccsproject
new file mode 100644
index 0000000..90f517d
--- /dev/null
+++ b/UKSSTMS320F28335/.ccsproject
@@ -0,0 +1,14 @@
+<?xml version="1.0" encoding="UTF-8" ?>
+<?ccsproject version="1.0"?>
+<projectOptions>
+	<ccsVersion value="12.3.0"/>
+	<deviceVariant value="TMS320C28XX"/>
+	<deviceFamily value="C2000"/>
+	<deviceEndianness value="UNKNOWN"/>
+	<codegenToolVersion value="22.6.0.LTS"/>
+	<isElfFormat value="false"/>
+	<rts value=""/>
+	<activeTargetConfiguration value="targetConfigs/TMS320F28335.ccxml"/>
+	<connection value="common/targetdb/connections/SAU510USBIsoPlus_Connection.xml"/>
+	<isTargetManual value="false"/>
+</projectOptions>
diff --git a/UKSSTMS320F28335/.cproject b/UKSSTMS320F28335/.cproject
new file mode 100644
index 0000000..1656074
--- /dev/null
+++ b/UKSSTMS320F28335/.cproject
@@ -0,0 +1,366 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.ti.ccstudio.buildDefinitions.C2000.Debug.828923687">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.ti.ccstudio.buildDefinitions.C2000.Debug.828923687" moduleId="org.eclipse.cdt.core.settings" name="Debug">
+				<externalSettings/>
+				<extensions>
+					<extension id="com.ti.ccstudio.binaryparser.CoffParser" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="com.ti.ccstudio.errorparser.CoffErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="com.ti.ccstudio.errorparser.AsmErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="com.ti.ccstudio.errorparser.LinkErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="out" artifactName="${SRC_ROOT}/bin/UKSSTMS320F28335" buildProperties="" cleanCommand="${CG_CLEAN_CMD}" description="" id="com.ti.ccstudio.buildDefinitions.C2000.Debug.828923687" name="Debug" parent="com.ti.ccstudio.buildDefinitions.C2000.Debug" postbuildStep="&quot;${PROJECT_ROOT}/postBuildStep_Debug.bat&quot; PROJECT_ROOT ${PROJECT_ROOT} !">
+					<folderInfo id="com.ti.ccstudio.buildDefinitions.C2000.Debug.828923687." name="/" resourcePath="">
+						<toolChain id="com.ti.ccstudio.buildDefinitions.C2000_22.6.exe.DebugToolchain.764638622" name="TI Build Tools" superClass="com.ti.ccstudio.buildDefinitions.C2000_22.6.exe.DebugToolchain" targetTool="com.ti.ccstudio.buildDefinitions.C2000_22.6.exe.linkerDebug.807362348">
+							<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.ti.ccstudio.buildDefinitions.core.OPT_TAGS.1848166163" superClass="com.ti.ccstudio.buildDefinitions.core.OPT_TAGS" valueType="stringList">
+								<listOptionValue builtIn="false" value="DEVICE_CONFIGURATION_ID=TMS320C28XX.TMS320F28335"/>
+								<listOptionValue builtIn="false" value="DEVICE_CORE_ID=C2800"/>
+								<listOptionValue builtIn="false" value="DEVICE_ENDIANNESS=little"/>
+								<listOptionValue builtIn="false" value="OUTPUT_FORMAT=COFF"/>
+								<listOptionValue builtIn="false" value="LINKER_COMMAND_FILE=F28335.cmd"/>
+								<listOptionValue builtIn="false" value="RUNTIME_SUPPORT_LIBRARY="/>
+								<listOptionValue builtIn="false" value="CCS_MBS_VERSION=6.1.3"/>
+								<listOptionValue builtIn="false" value="LINK_ORDER=F28335.cmd;Source/External/v120/DSP2833x_headers/cmd/DSP2833x_Headers_nonBIOS.cmd;"/>
+								<listOptionValue builtIn="false" value="PRODUCTS="/>
+								<listOptionValue builtIn="false" value="PRODUCT_MACRO_IMPORTS={}"/>
+								<listOptionValue builtIn="false" value="OUTPUT_TYPE=executable"/>
+							</option>
+							<option id="com.ti.ccstudio.buildDefinitions.core.OPT_CODEGEN_VERSION.780980775" name="Compiler version" superClass="com.ti.ccstudio.buildDefinitions.core.OPT_CODEGEN_VERSION" value="22.6.1.LTS" valueType="string"/>
+							<targetPlatform id="com.ti.ccstudio.buildDefinitions.C2000_22.6.exe.targetPlatformDebug.29339842" name="Platform" superClass="com.ti.ccstudio.buildDefinitions.C2000_22.6.exe.targetPlatformDebug"/>
+							<builder buildPath="${BuildDirectory}" id="com.ti.ccstudio.buildDefinitions.C2000_22.6.exe.builderDebug.461400164" keepEnvironmentInBuildfile="false" name="GNU Make" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.ti.ccstudio.buildDefinitions.C2000_22.6.exe.builderDebug"/>
+							<tool id="com.ti.ccstudio.buildDefinitions.C2000_22.6.exe.compilerDebug.683963127" name="C2000 Compiler" superClass="com.ti.ccstudio.buildDefinitions.C2000_22.6.exe.compilerDebug">
+								<option id="com.ti.ccstudio.buildDefinitions.C2000_22.6.compilerID.LARGE_MEMORY_MODEL.1229562348" name="Option deprecated, set by default (--large_memory_model, -ml)" superClass="com.ti.ccstudio.buildDefinitions.C2000_22.6.compilerID.LARGE_MEMORY_MODEL" value="true" valueType="boolean"/>
+								<option id="com.ti.ccstudio.buildDefinitions.C2000_22.6.compilerID.UNIFIED_MEMORY.1728204109" name="Unified memory (--unified_memory, -mt)" superClass="com.ti.ccstudio.buildDefinitions.C2000_22.6.compilerID.UNIFIED_MEMORY" value="true" valueType="boolean"/>
+								<option id="com.ti.ccstudio.buildDefinitions.C2000_22.6.compilerID.SILICON_VERSION.1135757643" name="Processor version (--silicon_version, -v)" superClass="com.ti.ccstudio.buildDefinitions.C2000_22.6.compilerID.SILICON_VERSION" value="com.ti.ccstudio.buildDefinitions.C2000_22.6.compilerID.SILICON_VERSION.28" valueType="enumerated"/>
+								<option id="com.ti.ccstudio.buildDefinitions.C2000_22.6.compilerID.FLOAT_SUPPORT.1724079067" name="Specify floating point support (--float_support)" superClass="com.ti.ccstudio.buildDefinitions.C2000_22.6.compilerID.FLOAT_SUPPORT" value="com.ti.ccstudio.buildDefinitions.C2000_22.6.compilerID.FLOAT_SUPPORT.fpu32" valueType="enumerated"/>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.ti.ccstudio.buildDefinitions.C2000_22.6.compilerID.INCLUDE_PATH.814154830" name="Add dir to #include search path (--include_path, -I)" superClass="com.ti.ccstudio.buildDefinitions.C2000_22.6.compilerID.INCLUDE_PATH" valueType="includePath">
+									<listOptionValue builtIn="false" value="${PROJECT_ROOT}"/>
+									<listOptionValue builtIn="false" value="${SRC_ROOT}/Source/External/v120/DSP2833x_headers/include"/>
+									<listOptionValue builtIn="false" value="${SRC_ROOT}/Source/Internal/Include"/>
+									<listOptionValue builtIn="false" value="${SRC_ROOT}/Source/External/v120/DSP2833x_common/include"/>
+									<listOptionValue builtIn="false" value="${CG_TOOL_ROOT}/include"/>
+								</option>
+								<option IS_BUILTIN_EMPTY="false" IS_VALUE_EMPTY="false" id="com.ti.ccstudio.buildDefinitions.C2000_22.6.compilerID.DEFINE.1094019590" name="Pre-define NAME (--define, -D)" superClass="com.ti.ccstudio.buildDefinitions.C2000_22.6.compilerID.DEFINE" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="_DEBUG"/>
+									<listOptionValue builtIn="false" value="LARGE_MODEL"/>
+								</option>
+								<option id="com.ti.ccstudio.buildDefinitions.C2000_22.6.compilerID.DEBUGGING_MODEL.1884872089" name="Debugging model" superClass="com.ti.ccstudio.buildDefinitions.C2000_22.6.compilerID.DEBUGGING_MODEL" value="com.ti.ccstudio.buildDefinitions.C2000_22.6.compilerID.DEBUGGING_MODEL.SYMDEBUG__DWARF" valueType="enumerated"/>
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+								<option id="com.ti.ccstudio.buildDefinitions.C2000_22.6.compilerID.DIAG_WRAP.355109228" name="Wrap diagnostic messages (--diag_wrap) [deprecated]" superClass="com.ti.ccstudio.buildDefinitions.C2000_22.6.compilerID.DIAG_WRAP" value="com.ti.ccstudio.buildDefinitions.C2000_22.6.compilerID.DIAG_WRAP.off" valueType="enumerated"/>
+								<option id="com.ti.ccstudio.buildDefinitions.C2000_22.6.compilerID.DISPLAY_ERROR_NUMBER.788994751" name="Emit diagnostic identifier numbers (--display_error_number, -pden) [deprecated]" superClass="com.ti.ccstudio.buildDefinitions.C2000_22.6.compilerID.DISPLAY_ERROR_NUMBER" value="true" valueType="boolean"/>
+								<option id="com.ti.ccstudio.buildDefinitions.C2000_22.6.compilerID.ABI.1704195023" name="Application binary interface [See 'General' page to edit] (--abi)" superClass="com.ti.ccstudio.buildDefinitions.C2000_22.6.compilerID.ABI" value="com.ti.ccstudio.buildDefinitions.C2000_22.6.compilerID.ABI.coffabi" valueType="enumerated"/>
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+								<option id="com.ti.ccstudio.buildDefinitions.C2000_22.6.compilerID.ASM_DIRECTORY.2000248056" name="Assembly file directory (default is .) (--asm_directory, -fs)" superClass="com.ti.ccstudio.buildDefinitions.C2000_22.6.compilerID.ASM_DIRECTORY" value="${SRC_ROOT}/Asm" valueType="string"/>
+								<option id="com.ti.ccstudio.buildDefinitions.C2000_22.6.compilerID.OBJ_DIRECTORY.1493501713" name="Object file directory (default is .) (--obj_directory, -fr)" superClass="com.ti.ccstudio.buildDefinitions.C2000_22.6.compilerID.OBJ_DIRECTORY" value="${SRC_ROOT}/Debug" valueType="string"/>
+								<inputType id="com.ti.ccstudio.buildDefinitions.C2000_22.6.compiler.inputType__C_SRCS.590281708" name="C Sources" superClass="com.ti.ccstudio.buildDefinitions.C2000_22.6.compiler.inputType__C_SRCS"/>
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+					<fileInfo id="com.ti.ccstudio.buildDefinitions.C2000.Release.975492619.Source/External/v120/DSP2833x_common/source/DSP2833x_Adc.c" name="DSP2833x_Adc.c" rcbsApplicability="disable" resourcePath="Source/External/v120/DSP2833x_common/source/DSP2833x_Adc.c" toolsToInvoke="com.ti.ccstudio.buildDefinitions.C2000_22.6.exe.compilerRelease.66834451.1966570564">
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+					<fileInfo id="com.ti.ccstudio.buildDefinitions.C2000.Release.975492619.Source/External/v120/DSP2833x_common/source/DSP2833x_SWPrioritizedDefaultIsr.c" name="DSP2833x_SWPrioritizedDefaultIsr.c" rcbsApplicability="disable" resourcePath="Source/External/v120/DSP2833x_common/source/DSP2833x_SWPrioritizedDefaultIsr.c" toolsToInvoke="com.ti.ccstudio.buildDefinitions.C2000_22.6.exe.compilerRelease.66834451.1433802323">
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+					<fileInfo id="com.ti.ccstudio.buildDefinitions.C2000.Release.975492619.Source/External/v120/DSP2833x_common/source/DSP2833x_SysCtrl.c" name="DSP2833x_SysCtrl.c" rcbsApplicability="disable" resourcePath="Source/External/v120/DSP2833x_common/source/DSP2833x_SysCtrl.c" toolsToInvoke="com.ti.ccstudio.buildDefinitions.C2000_22.6.exe.compilerRelease.66834451.954309520">
+						<tool id="com.ti.ccstudio.buildDefinitions.C2000_22.6.exe.compilerRelease.66834451.954309520" name="C2000 Compiler" superClass="com.ti.ccstudio.buildDefinitions.C2000_22.6.exe.compilerRelease.66834451">
+							<inputType id="com.ti.ccstudio.buildDefinitions.C2000_22.6.compiler.inputType__C_SRCS.1476273093" name="C Sources" superClass="com.ti.ccstudio.buildDefinitions.C2000_22.6.compiler.inputType__C_SRCS"/>
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+							<inputType id="com.ti.ccstudio.buildDefinitions.C2000_22.6.compiler.inputType__ASM2_SRCS.466438344" name="Assembly Sources" superClass="com.ti.ccstudio.buildDefinitions.C2000_22.6.compiler.inputType__ASM2_SRCS"/>
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+					<fileInfo id="com.ti.ccstudio.buildDefinitions.C2000.Release.975492619.Source/External/v120/DSP2833x_common/source/DSP2833x_SWPrioritizedPieVect.c" name="DSP2833x_SWPrioritizedPieVect.c" rcbsApplicability="disable" resourcePath="Source/External/v120/DSP2833x_common/source/DSP2833x_SWPrioritizedPieVect.c" toolsToInvoke="com.ti.ccstudio.buildDefinitions.C2000_22.6.exe.compilerRelease.66834451.1464601543">
+						<tool id="com.ti.ccstudio.buildDefinitions.C2000_22.6.exe.compilerRelease.66834451.1464601543" name="C2000 Compiler" superClass="com.ti.ccstudio.buildDefinitions.C2000_22.6.exe.compilerRelease.66834451">
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+					<fileInfo id="com.ti.ccstudio.buildDefinitions.C2000.Release.975492619.Source/External/v120/DSP2833x_headers/source/DSP2833x_GlobalVariableDefs.c" name="DSP2833x_GlobalVariableDefs.c" rcbsApplicability="disable" resourcePath="Source/External/v120/DSP2833x_headers/source/DSP2833x_GlobalVariableDefs.c" toolsToInvoke="com.ti.ccstudio.buildDefinitions.C2000_22.6.exe.compilerRelease.66834451.472114916">
+						<tool id="com.ti.ccstudio.buildDefinitions.C2000_22.6.exe.compilerRelease.66834451.472114916" name="C2000 Compiler" superClass="com.ti.ccstudio.buildDefinitions.C2000_22.6.exe.compilerRelease.66834451">
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+							<inputType id="com.ti.ccstudio.buildDefinitions.C2000_22.6.compiler.inputType__CPP_SRCS.813001745" name="C++ Sources" superClass="com.ti.ccstudio.buildDefinitions.C2000_22.6.compiler.inputType__CPP_SRCS"/>
+							<inputType id="com.ti.ccstudio.buildDefinitions.C2000_22.6.compiler.inputType__ASM_SRCS.619645051" name="Assembly Sources" superClass="com.ti.ccstudio.buildDefinitions.C2000_22.6.compiler.inputType__ASM_SRCS"/>
+							<inputType id="com.ti.ccstudio.buildDefinitions.C2000_22.6.compiler.inputType__ASM2_SRCS.1268163811" name="Assembly Sources" superClass="com.ti.ccstudio.buildDefinitions.C2000_22.6.compiler.inputType__ASM2_SRCS"/>
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+					</fileInfo>
+					<sourceEntries>
+						<entry excluding="28335_RAM_lnk.cmd" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
+					</sourceEntries>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="UKSSTMS320F28335.com.ti.ccstudio.buildDefinitions.C2000.ProjectType.1827404270" name="C2000" projectType="com.ti.ccstudio.buildDefinitions.C2000.ProjectType"/>
+	</storageModule>
+	<storageModule moduleId="scannerConfiguration"/>
+	<storageModule moduleId="org.eclipse.cdt.make.core.buildtargets"/>
+</cproject>
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diff --git a/UKSSTMS320F28335/.launches/UKSSTMS320F28335.launch b/UKSSTMS320F28335/.launches/UKSSTMS320F28335.launch
new file mode 100644
index 0000000..ea3ccde
--- /dev/null
+++ b/UKSSTMS320F28335/.launches/UKSSTMS320F28335.launch
@@ -0,0 +1,16 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<launchConfiguration type="com.ti.ccstudio.debug.launchType.device.debugging">
+    <stringAttribute key="com.ti.ccstudio.debug.debugModel.ATTR_DEBUGGER_PROPERTIES.TMS320F28335.ccxml.Sauris SAU510-USB Iso Plus Emulator_0/C28xx" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot; ?&gt;&#10;&lt;PropertyValues&gt;&#10;&#10;  &lt;property id=&quot;ConnectOnStartup&quot;&gt;&#10;    &lt;curValue&gt;1&lt;/curValue&gt;&#10;  &lt;/property&gt;&#10;&#10;  &lt;property id=&quot;EnableInstalledBreakpoint&quot;&gt;&#10;    &lt;curValue&gt;1&lt;/curValue&gt;&#10;  &lt;/property&gt;&#10;&#10;  &lt;property id=&quot;IgnoreSoftLaunchFailures&quot;&gt;&#10;    &lt;curValue&gt;0&lt;/curValue&gt;&#10;  &lt;/property&gt;&#10;&#10;&lt;/PropertyValues&gt;&#10;"/>
+    <stringAttribute key="com.ti.ccstudio.debug.debugModel.ATTR_PROGRAM.TMS320F28335.ccxml.Sauris SAU510-USB Iso Plus Emulator_0/C28xx" value="${build_artifact:UKSSTMS320F28335}"/>
+    <stringAttribute key="com.ti.ccstudio.debug.debugModel.ATTR_PROJECT.TMS320F28335.ccxml.Sauris SAU510-USB Iso Plus Emulator_0/C28xx" value="UKSSTMS320F28335"/>
+    <stringAttribute key="com.ti.ccstudio.debug.debugModel.ATTR_TARGET_CONFIG" value="${target_config_active_default:UKSSTMS320F28335}"/>
+    <stringAttribute key="com.ti.ccstudio.debug.debugModel.MRU_PROGRAM.TMS320F28335.ccxml.Sauris SAU510-USB Iso Plus Emulator_0/C28xx" value="${build_artifact:UKSSTMS320F28335}"/>
+    <listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS">
+        <listEntry value="/UKSSTMS320F28335"/>
+    </listAttribute>
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+        <listEntry value="4"/>
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+    <stringAttribute key="org.eclipse.debug.core.source_locator_id" value="com.ti.ccstudio.debug.sourceLocator"/>
+    <stringAttribute key="org.eclipse.debug.core.source_locator_memento" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;sourceLookupDirector&gt;&#13;&#10;    &lt;sourceContainers duplicates=&quot;false&quot;&gt;&#13;&#10;        &lt;container memento=&quot;&amp;lt;?xml version=&amp;quot;1.0&amp;quot; encoding=&amp;quot;UTF-8&amp;quot; standalone=&amp;quot;no&amp;quot;?&amp;gt;&amp;#13;&amp;#10;&amp;lt;default/&amp;gt;&amp;#13;&amp;#10;&quot; typeId=&quot;org.eclipse.debug.core.containerType.default&quot;/&gt;&#13;&#10;        &lt;container memento=&quot;&amp;lt;?xml version=&amp;quot;1.0&amp;quot; encoding=&amp;quot;UTF-8&amp;quot; standalone=&amp;quot;no&amp;quot;?&amp;gt;&amp;#13;&amp;#10;&amp;lt;cpuSpecificContainer cpuName=&amp;quot;Sauris SAU510-USB Iso Plus Emulator_0/C28xx&amp;quot;&amp;gt;&amp;#13;&amp;#10;    &amp;lt;childContainerEntry childMemento=&amp;quot;&amp;amp;lt;?xml version=&amp;amp;quot;1.0&amp;amp;quot; encoding=&amp;amp;quot;UTF-8&amp;amp;quot; standalone=&amp;amp;quot;no&amp;amp;quot;?&amp;amp;gt;&amp;amp;#13;&amp;amp;#10;&amp;amp;lt;project name=&amp;amp;quot;UKSSTMS320F28335&amp;amp;quot; referencedProjects=&amp;amp;quot;true&amp;amp;quot;/&amp;amp;gt;&amp;amp;#13;&amp;amp;#10;&amp;quot; childType=&amp;quot;org.eclipse.debug.core.containerType.project&amp;quot;/&amp;gt;&amp;#13;&amp;#10;    &amp;lt;childContainerEntry childMemento=&amp;quot;&amp;amp;lt;?xml version=&amp;amp;quot;1.0&amp;amp;quot; encoding=&amp;amp;quot;UTF-8&amp;amp;quot; standalone=&amp;amp;quot;no&amp;amp;quot;?&amp;amp;gt;&amp;amp;#13;&amp;amp;#10;&amp;amp;lt;default/&amp;amp;gt;&amp;amp;#13;&amp;amp;#10;&amp;quot; childType=&amp;quot;org.eclipse.debug.core.containerType.default&amp;quot;/&amp;gt;&amp;#13;&amp;#10;    &amp;lt;childContainerEntry childMemento=&amp;quot;&amp;amp;lt;?xml version=&amp;amp;quot;1.0&amp;amp;quot; encoding=&amp;amp;quot;UTF-8&amp;amp;quot; standalone=&amp;amp;quot;no&amp;amp;quot;?&amp;amp;gt;&amp;amp;#13;&amp;amp;#10;&amp;amp;lt;productsSource/&amp;amp;gt;&amp;amp;#13;&amp;amp;#10;&amp;quot; childType=&amp;quot;com.ti.ccstudio.debug.containerType.products.source&amp;quot;/&amp;gt;&amp;#13;&amp;#10;    &amp;lt;childContainerEntry childMemento=&amp;quot;&amp;amp;lt;?xml version=&amp;amp;quot;1.0&amp;amp;quot; encoding=&amp;amp;quot;UTF-8&amp;amp;quot; standalone=&amp;amp;quot;no&amp;amp;quot;?&amp;amp;gt;&amp;amp;#13;&amp;amp;#10;&amp;amp;lt;deviceLibrarySource/&amp;amp;gt;&amp;amp;#13;&amp;amp;#10;&amp;quot; childType=&amp;quot;com.ti.ccstudio.debug.containerType.device.library.source&amp;quot;/&amp;gt;&amp;#13;&amp;#10;    &amp;lt;childContainerEntry childMemento=&amp;quot;&amp;amp;lt;?xml version=&amp;amp;quot;1.0&amp;amp;quot; encoding=&amp;amp;quot;UTF-8&amp;amp;quot; standalone=&amp;amp;quot;no&amp;amp;quot;?&amp;amp;gt;&amp;amp;#13;&amp;amp;#10;&amp;amp;lt;librarySource/&amp;amp;gt;&amp;amp;#13;&amp;amp;#10;&amp;quot; childType=&amp;quot;com.ti.ccstudio.debug.containerType.library.source&amp;quot;/&amp;gt;&amp;#13;&amp;#10;&amp;lt;/cpuSpecificContainer&amp;gt;&amp;#13;&amp;#10;&quot; typeId=&quot;com.ti.ccstudio.debug.containerType.cpu.specific&quot;/&gt;&#13;&#10;    &lt;/sourceContainers&gt;&#13;&#10;&lt;/sourceLookupDirector&gt;&#13;&#10;"/>
+</launchConfiguration>
diff --git a/UKSSTMS320F28335/.project b/UKSSTMS320F28335/.project
new file mode 100644
index 0000000..25be340
--- /dev/null
+++ b/UKSSTMS320F28335/.project
@@ -0,0 +1,185 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>UKSSTMS320F28335</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>com.ti.ccstudio.core.ccsNature</nature>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>org.eclipse.cdt.core.ccnature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>F28335.cmd</name>
+			<type>1</type>
+			<locationURI>SRC_ROOT/F28335.cmd</locationURI>
+		</link>
+		<link>
+			<name>UKSSTMS320F28335.pjt</name>
+			<type>1</type>
+			<locationURI>SRC_ROOT/UKSSTMS320F28335.pjt</locationURI>
+		</link>
+		<link>
+			<name>Debug/UKSSTMS320F28335.out</name>
+			<type>1</type>
+			<locationURI>EXTERNAL_BUILD_ARTIFACT</locationURI>
+		</link>
+		<link>
+			<name>Libraries/rts2800_fpu32.lib</name>
+			<type>1</type>
+			<locationURI>SRC_ROOT/Libraries/rts2800_fpu32.lib</locationURI>
+		</link>
+		<link>
+			<name>Source/Internal/ADC.c</name>
+			<type>1</type>
+			<locationURI>SRC_ROOT/Source/Internal/ADC.c</locationURI>
+		</link>
+		<link>
+			<name>Source/Internal/RS485.c</name>
+			<type>1</type>
+			<locationURI>SRC_ROOT/Source/Internal/RS485.c</locationURI>
+		</link>
+		<link>
+			<name>Source/Internal/bios.c</name>
+			<type>1</type>
+			<locationURI>SRC_ROOT/Source/Internal/bios.c</locationURI>
+		</link>
+		<link>
+			<name>Source/Internal/cntrl_adr.c</name>
+			<type>1</type>
+			<locationURI>SRC_ROOT/Source/Internal/cntrl_adr.c</locationURI>
+		</link>
+		<link>
+			<name>Source/Internal/crc16.c</name>
+			<type>1</type>
+			<locationURI>SRC_ROOT/Source/Internal/crc16.c</locationURI>
+		</link>
+		<link>
+			<name>Source/Internal/ecan.c</name>
+			<type>1</type>
+			<locationURI>SRC_ROOT/Source/Internal/ecan.c</locationURI>
+		</link>
+		<link>
+			<name>Source/Internal/filter_bat2.c</name>
+			<type>1</type>
+			<locationURI>SRC_ROOT/Source/Internal/filter_bat2.c</locationURI>
+		</link>
+		<link>
+			<name>Source/Internal/i2c.c</name>
+			<type>1</type>
+			<locationURI>SRC_ROOT/Source/Internal/i2c.c</locationURI>
+		</link>
+		<link>
+			<name>Source/Internal/log_to_mem.c</name>
+			<type>1</type>
+			<locationURI>SRC_ROOT/Source/Internal/log_to_mem.c</locationURI>
+		</link>
+		<link>
+			<name>Source/Internal/main.c</name>
+			<type>1</type>
+			<locationURI>SRC_ROOT/Source/Internal/main.c</locationURI>
+		</link>
+		<link>
+			<name>Source/Internal/measure.c</name>
+			<type>1</type>
+			<locationURI>SRC_ROOT/Source/Internal/measure.c</locationURI>
+		</link>
+		<link>
+			<name>Source/Internal/message.c</name>
+			<type>1</type>
+			<locationURI>SRC_ROOT/Source/Internal/message.c</locationURI>
+		</link>
+		<link>
+			<name>Source/Internal/peripher.c</name>
+			<type>1</type>
+			<locationURI>SRC_ROOT/Source/Internal/peripher.c</locationURI>
+		</link>
+		<link>
+			<name>Source/Internal/spise2p.c</name>
+			<type>1</type>
+			<locationURI>SRC_ROOT/Source/Internal/spise2p.c</locationURI>
+		</link>
+		<link>
+			<name>Source/Internal/tools.c</name>
+			<type>1</type>
+			<locationURI>SRC_ROOT/Source/Internal/tools.c</locationURI>
+		</link>
+		<link>
+			<name>Source/External/v120/DSP2833x_common/source/DSP2833x_ADC_cal.asm</name>
+			<type>1</type>
+			<locationURI>SRC_ROOT/Source/External/v120/DSP2833x_common/source/DSP2833x_ADC_cal.asm</locationURI>
+		</link>
+		<link>
+			<name>Source/External/v120/DSP2833x_common/source/DSP2833x_Adc.c</name>
+			<type>1</type>
+			<locationURI>SRC_ROOT/Source/External/v120/DSP2833x_common/source/DSP2833x_Adc.c</locationURI>
+		</link>
+		<link>
+			<name>Source/External/v120/DSP2833x_common/source/DSP2833x_CpuTimers.c</name>
+			<type>1</type>
+			<locationURI>SRC_ROOT/Source/External/v120/DSP2833x_common/source/DSP2833x_CpuTimers.c</locationURI>
+		</link>
+		<link>
+			<name>Source/External/v120/DSP2833x_common/source/DSP2833x_PieCtrl.c</name>
+			<type>1</type>
+			<locationURI>SRC_ROOT/Source/External/v120/DSP2833x_common/source/DSP2833x_PieCtrl.c</locationURI>
+		</link>
+		<link>
+			<name>Source/External/v120/DSP2833x_common/source/DSP2833x_SWPrioritizedDefaultIsr.c</name>
+			<type>1</type>
+			<locationURI>SRC_ROOT/Source/External/v120/DSP2833x_common/source/DSP2833x_SWPrioritizedDefaultIsr.c</locationURI>
+		</link>
+		<link>
+			<name>Source/External/v120/DSP2833x_common/source/DSP2833x_SWPrioritizedPieVect.c</name>
+			<type>1</type>
+			<locationURI>SRC_ROOT/Source/External/v120/DSP2833x_common/source/DSP2833x_SWPrioritizedPieVect.c</locationURI>
+		</link>
+		<link>
+			<name>Source/External/v120/DSP2833x_common/source/DSP2833x_SysCtrl.c</name>
+			<type>1</type>
+			<locationURI>SRC_ROOT/Source/External/v120/DSP2833x_common/source/DSP2833x_SysCtrl.c</locationURI>
+		</link>
+		<link>
+			<name>Source/External/v120/DSP2833x_common/source/DSP2833x_Xintf.c</name>
+			<type>1</type>
+			<locationURI>SRC_ROOT/Source/External/v120/DSP2833x_common/source/DSP2833x_Xintf.c</locationURI>
+		</link>
+		<link>
+			<name>Source/External/v120/DSP2833x_common/source/DSP2833x_usDelay.asm</name>
+			<type>1</type>
+			<locationURI>SRC_ROOT/Source/External/v120/DSP2833x_common/source/DSP2833x_usDelay.asm</locationURI>
+		</link>
+		<link>
+			<name>Source/External/v120/DSP2833x_headers/cmd/DSP2833x_Headers_nonBIOS.cmd</name>
+			<type>1</type>
+			<locationURI>SRC_ROOT/Source/External/v120/DSP2833x_headers/cmd/DSP2833x_Headers_nonBIOS.cmd</locationURI>
+		</link>
+		<link>
+			<name>Source/External/v120/DSP2833x_headers/source/DSP2833x_GlobalVariableDefs.c</name>
+			<type>1</type>
+			<locationURI>SRC_ROOT/Source/External/v120/DSP2833x_headers/source/DSP2833x_GlobalVariableDefs.c</locationURI>
+		</link>
+	</linkedResources>
+	<variableList>
+		<variable>
+			<name>SRC_ROOT</name>
+			<value>$%7BPARENT-1-PROJECT_LOC%7D</value>
+		</variable>
+	</variableList>
+</projectDescription>
diff --git a/UKSSTMS320F28335/.settings/org.eclipse.cdt.codan.core.prefs b/UKSSTMS320F28335/.settings/org.eclipse.cdt.codan.core.prefs
new file mode 100644
index 0000000..f653028
--- /dev/null
+++ b/UKSSTMS320F28335/.settings/org.eclipse.cdt.codan.core.prefs
@@ -0,0 +1,3 @@
+eclipse.preferences.version=1
+inEditor=false
+onBuild=false
diff --git a/UKSSTMS320F28335/.settings/org.eclipse.cdt.debug.core.prefs b/UKSSTMS320F28335/.settings/org.eclipse.cdt.debug.core.prefs
new file mode 100644
index 0000000..2adc7b1
--- /dev/null
+++ b/UKSSTMS320F28335/.settings/org.eclipse.cdt.debug.core.prefs
@@ -0,0 +1,2 @@
+eclipse.preferences.version=1
+org.eclipse.cdt.debug.core.toggleBreakpointModel=com.ti.ccstudio.debug.CCSBreakpointMarker
diff --git a/Source/External/v120/DSP2833x_common/cmd/28335_RAM_lnk.cmd b/UKSSTMS320F28335/28335_RAM_lnk.cmd
similarity index 73%
rename from Source/External/v120/DSP2833x_common/cmd/28335_RAM_lnk.cmd
rename to UKSSTMS320F28335/28335_RAM_lnk.cmd
index b469211..0db663f 100644
--- a/Source/External/v120/DSP2833x_common/cmd/28335_RAM_lnk.cmd
+++ b/UKSSTMS320F28335/28335_RAM_lnk.cmd
@@ -1,6 +1,6 @@
 /*
-// TI File $Revision: /main/10 $
-// Checkin $Date: July 9, 2008   13:43:36 $
+// TI File $Revision: /main/11 $
+// Checkin $Date: April 15, 2009   09:57:28 $
 //###########################################################################
 //
 // FILE:    28335_RAM_lnk.cmd
@@ -8,41 +8,41 @@
 // TITLE:   Linker Command File For 28335 examples that run out of RAM
 //
 //          This ONLY includes all SARAM blocks on the 28335 device.
-//          This does not include flash or OTP. 
+//          This does not include flash or OTP.
 //
 //          Keep in mind that L0 and L1 are protected by the code
 //          security module.
 //
-//          What this means is in most cases you will want to move to 
-//          another memory map file which has more memory defined.  
+//          What this means is in most cases you will want to move to
+//          another memory map file which has more memory defined.
 //
 //###########################################################################
-// $TI Release: DSP2833x/DSP2823x Header Files V1.20 $
-// $Release Date: August 1, 2008 $
+// $TI Release:   $
+// $Release Date:   $
 //###########################################################################
 */
 
 /* ======================================================
 // For Code Composer Studio V2.2 and later
 // ---------------------------------------
-// In addition to this memory linker command file, 
-// add the header linker command file directly to the project. 
+// In addition to this memory linker command file,
+// add the header linker command file directly to the project.
 // The header linker command file is required to link the
-// peripheral structures to the proper locations within 
+// peripheral structures to the proper locations within
 // the memory map.
 //
 // The header linker files are found in <base>\DSP2833x_Headers\cmd
-//   
+//
 // For BIOS applications add:      DSP2833x_Headers_BIOS.cmd
-// For nonBIOS applications add:   DSP2833x_Headers_nonBIOS.cmd    
+// For nonBIOS applications add:   DSP2833x_Headers_nonBIOS.cmd
 ========================================================= */
 
 /* ======================================================
 // For Code Composer Studio prior to V2.2
 // --------------------------------------
-// 1) Use one of the following -l statements to include the 
+// 1) Use one of the following -l statements to include the
 // header linker command file in the project. The header linker
-// file is required to link the peripheral structures to the proper 
+// file is required to link the peripheral structures to the proper
 // locations within the memory map                                    */
 
 /* Uncomment this line to include file only for non-BIOS applications */
@@ -52,29 +52,29 @@
 /* -l DSP2833x_Headers_BIOS.cmd */
 
 /* 2) In your project add the path to <base>\DSP2833x_headers\cmd to the
-   library search path under project->build options, linker tab, 
+   library search path under project->build options, linker tab,
    library search path (-i).
 /*========================================================= */
 
-/* Define the memory block start/length for the F28335  
+/* Define the memory block start/length for the F28335
    PAGE 0 will be used to organize program sections
    PAGE 1 will be used to organize data sections
 
-   Notes: 
+   Notes:
          Memory blocks on F28335 are uniform (ie same
-         physical memory) in both PAGE 0 and PAGE 1.  
+         physical memory) in both PAGE 0 and PAGE 1.
          That is the same memory region should not be
          defined for both PAGE 0 and PAGE 1.
-         Doing so will result in corruption of program 
-         and/or data. 
-         
+         Doing so will result in corruption of program
+         and/or data.
+
          L0/L1/L2 and L3 memory blocks are mirrored - that is
          they can be accessed in high memory or low memory.
          For simplicity only one instance is used in this
-         linker file. 
-         
-         Contiguous SARAM memory blocks can be combined 
-         if required to create a larger memory block. 
+         linker file.
+
+         Contiguous SARAM memory blocks can be combined
+         if required to create a larger memory block.
 */
 
 
@@ -82,19 +82,14 @@ MEMORY
 {
 PAGE 0 :
    /* BEGIN is used for the "boot to SARAM" bootloader mode      */
-   /* BOOT_RSVD is used by the boot ROM for stack.               */
-   /* This section is only reserved to keep the BOOT ROM from    */
-   /* corrupting this area during the debug process              */
-   
-   BEGIN      : origin = 0x000000, length = 0x000002     /* Boot to M0 will go here                      */
-   BOOT_RSVD  : origin = 0x000002, length = 0x00004E     /* Part of M0, BOOT rom will use this for stack */               
-   RAMM0      : origin = 0x000050, length = 0x0003B0
 
-   RAML0      : origin = 0x008000, length = 0x001000    
-   RAML1      : origin = 0x009000, length = 0x001000    
-   RAML2      : origin = 0x00A000, length = 0x001000    
-   RAML3      : origin = 0x00B000, length = 0x001000 
-   ZONE7A     : origin = 0x200000, length = 0x00FC00    /* XINTF zone 7 - program space */ 
+   BEGIN      : origin = 0x000000, length = 0x000002     /* Boot to M0 will go here                      */
+   RAMM0      : origin = 0x000050, length = 0x0003B0
+   RAML0      : origin = 0x008000, length = 0x001000
+   RAML1      : origin = 0x009000, length = 0x001000
+   RAML2      : origin = 0x00A000, length = 0x001000
+   RAML3      : origin = 0x00B000, length = 0x001000
+   ZONE7A     : origin = 0x200000, length = 0x00FC00    /* XINTF zone 7 - program space */
    CSM_RSVD   : origin = 0x33FF80, length = 0x000076     /* Part of FLASHA.  Program with all 0x0000 when CSM is in use. */
    CSM_PWL    : origin = 0x33FFF8, length = 0x000008     /* Part of FLASHA.  CSM password locations in FLASHA            */
    ADC_CAL    : origin = 0x380080, length = 0x000009
@@ -102,75 +97,88 @@ PAGE 0 :
    IQTABLES   : origin = 0x3FE000, length = 0x000b50
    IQTABLES2  : origin = 0x3FEB50, length = 0x00008c
    FPUTABLES  : origin = 0x3FEBDC, length = 0x0006A0
-   BOOTROM    : origin = 0x3FF27C, length = 0x000D44               
+   BOOTROM    : origin = 0x3FF27C, length = 0x000D44
 
-         
-PAGE 1 : 
+
+PAGE 1 :
+   /* BOOT_RSVD is used by the boot ROM for stack.               */
+   /* This section is only reserved to keep the BOOT ROM from    */
+   /* corrupting this area during the debug process              */
+
+   BOOT_RSVD  : origin = 0x000002, length = 0x00004E     /* Part of M0, BOOT rom will use this for stack */
    RAMM1      : origin = 0x000400, length = 0x000400     /* on-chip RAM block M1 */
-   RAML4      : origin = 0x00C000, length = 0x001000    
-   RAML5      : origin = 0x00D000, length = 0x001000    
-   RAML6      : origin = 0x00E000, length = 0x001000    
-   RAML7      : origin = 0x00F000, length = 0x001000 
+   RAML4      : origin = 0x00C000, length = 0x001000
+   RAML5      : origin = 0x00D000, length = 0x001000
+   RAML6      : origin = 0x00E000, length = 0x001000
+   RAML7      : origin = 0x00F000, length = 0x001000
    ZONE7B     : origin = 0x20FC00, length = 0x000400     /* XINTF zone 7 - data space */
 }
- 
- 
+
+
 SECTIONS
 {
-   /* Setup for "boot to SARAM" mode: 
+   /* Setup for "boot to SARAM" mode:
       The codestart section (found in DSP28_CodeStartBranch.asm)
       re-directs execution to the start of user code.  */
    codestart        : > BEGIN,     PAGE = 0
-   ramfuncs         : > RAML0,     PAGE = 0  
+   
+#ifdef __TI_COMPILER_VERSION__
+   #if __TI_COMPILER_VERSION__ >= 15009000
+    .TI.ramfunc : {} > RAML0,      PAGE = 0
+   #else
+   ramfuncs         : > RAML0,     PAGE = 0   
+   #endif
+#endif    
+   
    .text            : > RAML1,     PAGE = 0
    .cinit           : > RAML0,     PAGE = 0
    .pinit           : > RAML0,     PAGE = 0
    .switch          : > RAML0,     PAGE = 0
-   
+
    .stack           : > RAMM1,     PAGE = 1
    .ebss            : > RAML4,     PAGE = 1
-   .econst          : > RAML5,     PAGE = 1      
+   .econst          : > RAML5,     PAGE = 1
    .esysmem         : > RAMM1,     PAGE = 1
 
    IQmath           : > RAML1,     PAGE = 0
-   IQmathTables     : > IQTABLES,  PAGE = 0, TYPE = NOLOAD 
-   
+   IQmathTables     : > IQTABLES,  PAGE = 0, TYPE = NOLOAD
+
    /* Uncomment the section below if calling the IQNexp() or IQexp()
-      functions from the IQMath.lib library in order to utilize the 
-      relevant IQ Math table in Boot ROM (This saves space and Boot ROM 
+      functions from the IQMath.lib library in order to utilize the
+      relevant IQ Math table in Boot ROM (This saves space and Boot ROM
       is 1 wait-state). If this section is not uncommented, IQmathTables2
       will be loaded into other memory (SARAM, Flash, etc.) and will take
       up space, but 0 wait-state is possible.
    */
    /*
-   IQmathTables2    : > IQTABLES2, PAGE = 0, TYPE = NOLOAD 
+   IQmathTables2    : > IQTABLES2, PAGE = 0, TYPE = NOLOAD
    {
-   
-              IQmath.lib<IQNexpTable.obj> (IQmathTablesRam)
-   
-   }
-   */   
 
-   FPUmathTables    : > FPUTABLES, PAGE = 0, TYPE = NOLOAD 
-      
+              IQmath.lib<IQNexpTable.obj> (IQmathTablesRam)
+
+   }
+   */
+
+   FPUmathTables    : > FPUTABLES, PAGE = 0, TYPE = NOLOAD
+
    DMARAML4         : > RAML4,     PAGE = 1
    DMARAML5         : > RAML5,     PAGE = 1
    DMARAML6         : > RAML6,     PAGE = 1
    DMARAML7         : > RAML7,     PAGE = 1
-   
-   ZONE7DATA        : > ZONE7B,    PAGE = 1  
+
+   ZONE7DATA        : > ZONE7B,    PAGE = 1
 
    .reset           : > RESET,     PAGE = 0, TYPE = DSECT /* not used                    */
    csm_rsvd         : > CSM_RSVD   PAGE = 0, TYPE = DSECT /* not used for SARAM examples */
    csmpasswds       : > CSM_PWL    PAGE = 0, TYPE = DSECT /* not used for SARAM examples */
-   
+
    /* Allocate ADC_cal function (pre-programmed by factory into TI reserved memory) */
    .adc_cal     : load = ADC_CAL,   PAGE = 0, TYPE = NOLOAD
-     
+
 }
 
 /*
 //===========================================================================
 // End of file.
 //===========================================================================
-*/
+*/
\ No newline at end of file
diff --git a/UKSSTMS320F28335/postBuildStep_Debug.bat b/UKSSTMS320F28335/postBuildStep_Debug.bat
new file mode 100644
index 0000000..a054feb
--- /dev/null
+++ b/UKSSTMS320F28335/postBuildStep_Debug.bat
@@ -0,0 +1,34 @@
+@echo off
+setlocal
+
+for %%I in ("%~dp0..") do set "SRC_ROOT=%%~fI"
+
+:process_arg
+if "%1"=="" goto end_process_arg
+set name=%1
+set value=
+
+:process_arg_value
+if NOT "%value%"=="" set value=%value% %2
+if "%value%"=="" set value=%2
+shift
+if "%2"=="!" goto set_arg
+if "%2"=="" goto set_arg
+goto process_arg_value
+
+:set_arg
+set %name%=%value%
+shift
+shift
+goto process_arg
+:end_process_arg
+
+echo. > temp_postBuildStep_Debug.bat
+
+echo "%SRC_ROOT%\Bin\hex2000.exe" "%SRC_ROOT%\Bin\UKSSTMS320F28335.out" -boot -sci8 -map "%SRC_ROOT%\Bin\UKSSTMS320F28335.map" -o "%SRC_ROOT%\Bin\UKSSTMS320F28335.hex" -i >> temp_postBuildStep_Debug.bat
+echo "%SRC_ROOT%\Bin\hex2000.exe" "%SRC_ROOT%\Bin\UKSSTMS320F28335.out" -boot -sci8 -map "%SRC_ROOT%\Bin\UKSSTMS320F28335.map" -o "%SRC_ROOT%\Bin\UKSSTMS320F28335.bin" -b >> temp_postBuildStep_Debug.bat
+
+call temp_postBuildStep_Debug.bat
+del temp_postBuildStep_Debug.bat
+
+endlocal
diff --git a/UKSSTMS320F28335/targetConfigs/TMS320F28335.ccxml b/UKSSTMS320F28335/targetConfigs/TMS320F28335.ccxml
new file mode 100644
index 0000000..325e655
--- /dev/null
+++ b/UKSSTMS320F28335/targetConfigs/TMS320F28335.ccxml
@@ -0,0 +1,23 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<configurations XML_version="1.2" id="configurations_0">
+        
+    
+    <configuration XML_version="1.2" id="Sauris SAU510-USB Iso Plus Emulator_0">
+                
+        <instance XML_version="1.2" desc="Sauris SAU510-USB Iso Plus Emulator_0" href="connections/SAU510USBIsoPlus_Connection.xml" id="Sauris SAU510-USB Iso Plus Emulator_0" xml="SAU510USBIsoPlus_Connection.xml" xmlpath="connections"/>
+                
+        <connection XML_version="1.2" id="Sauris SAU510-USB Iso Plus Emulator_0">
+                        
+            <instance XML_version="1.2" href="drivers/sau510c28x.xml" id="drivers" xml="sau510c28x.xml" xmlpath="drivers"/>
+                        
+            <platform XML_version="1.2" id="platform_0">
+                                
+                <instance XML_version="1.2" desc="TMS320F28335_0" href="devices/f28335.xml" id="TMS320F28335_0" xml="f28335.xml" xmlpath="devices"/>
+                            
+            </platform>
+                    
+        </connection>
+            
+    </configuration>
+    
+</configurations>
diff --git a/build_ccs12.cmd b/build_ccs12.cmd
new file mode 100644
index 0000000..e00f480
--- /dev/null
+++ b/build_ccs12.cmd
@@ -0,0 +1,22 @@
+@echo off
+setlocal
+
+set "CONFIG=%~1"
+if "%CONFIG%"=="" set "CONFIG=Debug"
+
+set "ROOT=%~dp0"
+set "CCS_ECLIPSEC=C:\ti\ccs1230\ccs\eclipse\eclipsec.exe"
+set "CCS_WORKSPACE=%ROOT%.ccs12_build_workspace"
+set "TI_APPDATA_DIR=%ROOT%.ti_appdata"
+set "PROJECT_DIR=%ROOT%UKSSTMS320F28335"
+
+if not exist "%CCS_ECLIPSEC%" (
+    echo CCS eclipsec.exe not found: %CCS_ECLIPSEC%
+    exit /b 1
+)
+
+"%CCS_ECLIPSEC%" -noSplash -data "%CCS_WORKSPACE%" -application com.ti.ccstudio.apps.projectImport -ccs.location "%PROJECT_DIR%" -ccs.overwrite
+if errorlevel 1 exit /b 1
+
+"%CCS_ECLIPSEC%" -noSplash -data "%CCS_WORKSPACE%" -application com.ti.ccstudio.apps.projectBuild -ccs.projects UKSSTMS320F28335 -ccs.configuration "%CONFIG%" -ccs.buildType full -ccs.listProblems
+exit /b %ERRORLEVEL%