andrey
eb2ff79932
Фронты START/STOP обрабатываются при принятии командного слова CAN/RS, а окончание импульса обслуживается таймером. STOP имеет приоритет, перекрытие выходов исключено, сохранена защита от самопуска при включении. Загрузка параметров больше не подменяет живые команды нагрузки. Добавлены подробные русские комментарии во все собственные C-модули и основные заголовки, описание поведения и host-тест автомата. Обновлены файлы прошивки. Полная сборка TI 22.6.1.LTS и тесты пройдены; проверка на физической плате не выполнялась.
357 lines
11 KiB
C
357 lines
11 KiB
C
/* Êîìàíäû è òåëåìåòðèÿ eCAN. MBOX1 ïðèíèìàåò êàäðû, MBOX0 ïåðåäà¸ò
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* òåõíîëîãè÷åñêèå ðåãèñòðû, MBOX2 âûäåëåí ïîä îòâåòû ëîããåðà.
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* Ñëîâî 127 ïðîõîäèò UMP_commands_write íåïîñðåäñòâåííî â CAN ISR.
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* Çàïðîñ àðõèâà ISR ëèøü ñòàâèò íà îáñëóæèâàíèå; ôðàãìåíòàöèÿ
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* îòâåòîâ âûïîëíÿåòñÿ UMP_CAN_service èç ôîíîâîãî öèêëà.
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*/
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#include "DSP2833x_Device.h" // DSP2833x Headerfile Include File
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#include "DSP2833x_SWPrioritizedIsrLevels.h"
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#include "filter_bat2.h"
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#include "measure.h"
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#include "package.h" // DSP281x Headerfile Include File
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#include "ecan.h" // DSP281x Headerfile Include File
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#include "tools.h" // DSP281x Headerfile Include File
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#include "RS485.h"
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#include "message.h"
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#include "peripher.h"
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#include "log_to_mem.h"
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#include "ump_can_protocol.h"
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#include "DAC.h"
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// Prototype statements for functions found within this file.
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interrupt void CANa_handler(void);
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interrupt void CANa_reset_err(void);
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// Global variable for this example
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Uint32 ErrorCount;
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Uint32 MessageReceivedCount;
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Uint32 MessageTransivedCount=0;
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Uint32 TestMbox1 = 0;
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Uint32 TestMbox2 = 0;
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Uint32 TestMbox3 = 0;
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int CanTimeOutErrorTR = 0;
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int wait=0;
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/* MBOX2 âûäåëåí ïîä îòâåòû ðåãèñòðàòîðà; øòàòíûé MBOX0 ïðîäîëæàåò
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* ïåðåäàâàòü òåõíîëîãè÷åñêèå äàííûå íåçàâèñèìî. ISR òîëüêî ñòàâèò çàïðîñ,
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* à ñíèìîê è îòïðàâêà êîðîòêèìè øàãàìè âûïîëíÿþòñÿ â îñíîâíîì öèêëå. */
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static volatile unsigned int ump_can_pending;
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static volatile unsigned int ump_can_tag, ump_can_address, ump_can_value;
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static unsigned int ump_can_reply[UMP_CAN_MAX_WORDS];
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static unsigned int ump_can_length, ump_can_index, ump_can_reply_tag;
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static unsigned int ump_can_waiting;
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static unsigned long ump_can_sent_at;
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void InitCan(int Port, int DevNum)
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{
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struct ECAN_REGS ECanShadow;
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volatile struct ECAN_REGS * ECanRegs;
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volatile struct ECAN_MBOXES * ECanMboxes;
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volatile struct MOTO_REGS * ECanMOTORegs;
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long id = 0x80BA0000;
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DevNum--;
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if(DevNum<0)DevNum=0;
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if(DevNum>15)DevNum=15;
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// Configure CAN pins using GPIO regs here
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EALLOW;
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ECanRegs = &ECanaRegs;
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ECanMboxes = &ECanaMboxes;
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ECanMOTORegs = &ECanaMOTORegs;
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GpioCtrlRegs.GPAMUX2.bit.GPIO30 = 1;
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GpioCtrlRegs.GPAMUX2.bit.GPIO31 = 1;
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// Configure the eCAN RX and TX pins for eCAN transmissions
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ECanRegs->CANTIOC.all = 8; // only 3rd bit, TXFUNC, is significant
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ECanRegs->CANRIOC.all = 8; // only 3rd bit, RXFUNC, is significant
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// Specify that 8 bits will be sent/received
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ECanMboxes->MBOX0.MSGCTRL.all = 0x00000008;
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ECanMboxes->MBOX1.MSGCTRL.all = 0x00000008;
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ECanMboxes->MBOX2.MSGCTRL.all = 0x00000008;
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// Disable all Mailboxes
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// Required before writing the MSGIDs
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ECanRegs->CANME.all = 0;
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// çàäàåì àäðåñ 0 àùèêa íà ïåðåäà÷ó
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ECanMboxes->MBOX0.MSGID.all = id + 0x10 + DevNum;
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// çàäàåì àäðåñ 1 àùèêa íà ïðèåì
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ECanMboxes->MBOX1.MSGID.all = id + DevNum; //ïîìåíàòü!!!! 1 è 0!!!
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// MBOX0 è MBOX2 ïåðåäàþò äàííûå; MBOX1 ïðèíèìàåò êîìàíäû.
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ECanMboxes->MBOX2.MSGID.all = id + 0x20 + DevNum;
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ECanRegs->CANMD.all = 0xFFFFFFFA;
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// Âêëþ÷àåì òðè mailbox: òåëåìåòðèÿ, êîìàíäû è îòâåòû ëîããåðà.
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ECanRegs->CANME.all = 0x00000007;
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// Clear all TAn bits
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ECanRegs->CANTA.all = 0xFFFFFFFF;
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// Clear all RMPn bits
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ECanRegs->CANRMP.all = 0xFFFFFFFF;
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// Clear all interrupt flag bits
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ECanRegs->CANGIF0.all = 0xFFFFFFFF;
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ECanRegs->CANGIF1.all = 0xFFFFFFFF;
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// Clear all error and status bits
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ECanRegs->CANES.all=0xffffffff;
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// Request permission to change the configuration registers
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ECanShadow.CANMC.all = 0;
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ECanShadow.CANMC.bit.MBCC = 1; // Mailbox timestamp counter clear bit
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ECanShadow.CANMC.bit.TCC = 1; // Time stamp counter MSB clear bit
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ECanShadow.CANMC.bit.SCB = 1; // eCAN mode (reqd to access 32 mailboxes)
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ECanShadow.CANMC.bit.WUBA = 1; // Wake up on bus activity
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ECanShadow.CANMC.bit.ABO = 1; // Auto bus on
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ECanShadow.CANMC.bit.CCR = 1;
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// ECanShadow.CANMC.bit.STM = 1; // self-test loop-back
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ECanRegs->CANMC.all = ECanShadow.CANMC.all;
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while(!ECanRegs->CANES.bit.CCE); // Wait for CCE bit to be set..
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// íàñòðèâàåì ñêîðîñòü CAN
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ECanShadow.CANBTC.all = ECanRegs->CANBTC.all;
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ECanShadow.CANBTC.bit.SJWREG=1;
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ECanShadow.CANBTC.bit.BRPREG = (CLKMULT * 3) - 1;
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ECanShadow.CANBTC.bit.TSEG1REG = 15;
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ECanShadow.CANBTC.bit.TSEG2REG = 2;
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ECanRegs->CANBTC.all = ECanShadow.CANBTC.all;
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ECanShadow.CANMC.bit.CCR = 0; // Set CCR = 0
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ECanRegs->CANMC.all = ECanShadow.CANMC.all;
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while(ECanRegs->CANES.bit.CCE); // Wait for CCE bit to be cleared..
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// çàäàåì òàéìàóòû äëà îæèäàíèà îòïðàâêè ïîëó÷åíèà ïîñûëêè
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ECanMOTORegs->MOTO0 = 550000;
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ECanMOTORegs->MOTO1 = 550000;
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ECanRegs->CANTOC.all = 1;
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ECanRegs->CANTOS.all = 0; // clear all time-out flags
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ECanRegs->CANTSC = 0; // clear time-out counter
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ECanShadow.CANGIM.all = 0;
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ECanRegs->CANMIM.all = 2; // Enable interrupts of box 1
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ECanRegs->CANMIL.all = 0x00000000; // All mailbox interrupts are generated on interrupt line 0.
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ECanShadow.CANGIM.bit.I0EN = 1;
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ECanShadow.CANGIM.bit.MTOM = 1;
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ECanShadow.CANGIM.bit.I1EN = 1;
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ECanShadow.CANGIM.bit.GIL = 1;
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ECanRegs->CANGIM.all = ECanShadow.CANGIM.all;
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PieVectTable.ECAN0INTA = &CANa_handler;
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PieCtrlRegs.PIEIER9.bit.INTx5=1; // PIE Group 9, INT6
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PieVectTable.ECAN1INTA = &CANa_reset_err;
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PieCtrlRegs.PIEIER9.bit.INTx6=1; // PIE Group 9, INT6
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IER |= M_INT9; // Enable CPU INT
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EDIS;
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// çàâåðøèëè íàñòðîéêó CAN àùèêîâ
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MessageReceivedCount = 0;
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ErrorCount = 0;
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CanTimeOutErrorTR=0;
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MessageTransivedCount=0;
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}
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/* Ïðè çàíÿòîì MBOX0 âîçâðàùàåòñÿ áåç îæèäàíèÿ ACK â öèêëå.
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* Ýòî îòëè÷àåòñÿ îò áëîêèðóþùèõ UART/EEPROM îïåðàöèé main.
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*/
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void CAN_send(int Port, int data[], int Addr)
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{
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unsigned long hiword,loword;
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volatile struct ECAN_REGS * ECanRegs;
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volatile struct ECAN_MBOXES * ECanMboxes;
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ECanRegs = &ECanaRegs;
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ECanMboxes = &ECanaMboxes;
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if(wait)
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if(!(ECanRegs->CANTA.all & 1))
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if(!(ECanRegs->CANAA.all & 1))
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return;
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ECanRegs->CANTA.all = 1;
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ECanRegs->CANAA.all = 1;
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hiword= ((((Uint32) Addr ) & 0xffff)<<16)| 0xE0000000 |
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((((Uint32)data[Addr ]) & 0xffff) );
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loword= ((((Uint32)data[Addr+1]) & 0xffff)<<16)|
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((((Uint32)data[Addr+2]) & 0xffff) );
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ECanMboxes->MBOX0.MDH.all = hiword;
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ECanMboxes->MBOX0.MDL.all = loword;
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EALLOW;
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ECanRegs->CANTSC = 0; // clear time-out counter
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EDIS;
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ECanRegs->CANTRS.all = 1; // çàïóñòèòü ïåðåäà÷ó
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wait=1;
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led1_toggle();
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}
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void Handlai(volatile struct ECAN_MBOXES * ECanMboxes)
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{
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unsigned int adr;
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unsigned int bit[3];
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unsigned long hiword,loword;
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int Data[3];
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Lonely=0;
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hiword = ECanMboxes->MBOX1.MDH.all;
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loword = ECanMboxes->MBOX1.MDL.all;
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/* Ñëóæåáíûé çàïðîñ ëîããåðà íå ÿâëÿåòñÿ êîìàíäîé ÓÌÏ è ñàì íå äîëæåí
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* çàïîëíÿòü æóðíàë CAN-ñîáûòèÿìè ïðè îíëàéí-÷òåíèè. Êîðîòêèå êàäðû
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* îòáðàñûâàþòñÿ: íåçàïîëíåííûå áàéòû mailbox ìîãëè îñòàòüñÿ îò ïðîøëîãî. */
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if ((unsigned int)(hiword >> 16) == UMP_CAN_MARKER) {
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if (ECanMboxes->MBOX1.MSGCTRL.bit.DLC == 8) {
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ump_can_tag = (unsigned int)hiword;
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ump_can_address = (unsigned int)(loword >> 16);
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ump_can_value = (unsigned int)loword;
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ump_can_pending = 1;
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}
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return;
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}
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adr = (hiword >> 16);
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bit[0] = adr & 0x8000;
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bit[1] = adr & 0x4000;
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bit[2] = adr & 0x2000;
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adr &= 0x1fff;
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Data[0] = (hiword ) & 0xffff;
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Data[1] = (loword>>16) & 0xffff;
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Data[2] = (loword ) & 0xffff;
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/* Êàæäîå ðàçðåø¸ííîå ñëîâî èìååò ñîáñòâåííûé àäðåñ. Íå îïðàøèâàåì
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* Commands ïîñëå êàäðà áåçóñëîâíî: ïàêåò òåëåìåòðèè íå äîëæåí
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* ïðåâðàùàòü âíóòðåííèé ñáðîñ ïàðàìåòðîâ â êîìàíäíûé ôðîíò.
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* Àäðåñ 127 ïðîõîäèò ÷åðåç åäèíûé îáðàáîò÷èê ïîëíîãî ñëîâà. */
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{
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unsigned int i;
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for (i = 0; i < 3; i++, adr++) {
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if (bit[i] && adr < ANSWER_LEN) {
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if (adr == 127) UMP_commands_write((unsigned int)Data[i]);
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else modbus[adr] = Data[i];
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}
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}
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}
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/* Ôèêñèðóåì ïðèìåí¸ííóþ êîìàíäó äî âûõîäà èç îáðàáîò÷èêà CAN. */
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ump_log_can((unsigned int)(hiword >> 16), Data[0], Data[1], Data[2]);
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led2_toggle();
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}
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interrupt void CANa_handler(void)
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{
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// Set interrupt priority:
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volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER9.all;
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IER |= M_INT9;
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IER &= MINT9; // Set "global" priority
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PieCtrlRegs.PIEIER9.all &= MG95; // Set "group" priority
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PieCtrlRegs.PIEACK.all = 0xFFFF; // Enable PIE interrupts
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EINT;
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Handlai(&ECanaMboxes);
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ECanaRegs.CANRMP.all = 2;
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PieCtrlRegs.PIEACK.bit.ACK9 |= 1;
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// Restore registers saved:
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DINT;
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PieCtrlRegs.PIEIER9.all = TempPIEIER;
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}
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interrupt void CANa_reset_err(void)
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{
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// Set interrupt priority:
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volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER9.all;
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IER |= M_INT9;
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IER &= MINT9; // Set "global" priority
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PieCtrlRegs.PIEIER9.all &= MG96; // Set "group" priority
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PieCtrlRegs.PIEACK.all = 0xFFFF; // Enable PIE interrupts
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EINT;
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ECanaRegs.CANTRR.all = 1;
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CanTimeOutErrorTR++;
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PieCtrlRegs.PIEACK.bit.ACK9 |= 1;
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// Restore registers saved:
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DINT;
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PieCtrlRegs.PIEIER9.all = TempPIEIER;
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}
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//===========================================================================
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// No more.
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//===========================================================================
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/* Îäèí âûçîâ îáñëóæèâàåò ìàêñèìóì îäèí êàäð è íèêîãäà íå æä¸ò ACK â öèêëå.
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* Ñíèìîê ôèêñèðóåòñÿ îäèí ðàç íà çàïðîñ: CAN-ôðàãìåíòû íå ñìåøèâàþò
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* çíà÷åíèÿ äî/ïîñëå ïåðåêëþ÷åíèÿ êîëüöåâîãî áàíêà. Íîâûå çàïðîñû çàáèðàåì
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* ïîñëå çàâåðøåíèÿ ïðåäûäóùåãî îòâåòà. GUI äåðæèò òîëüêî îäèí çàïðîñ. */
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void UMP_CAN_service(void)
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{
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unsigned int saved, tag, address, value, error;
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unsigned long hiword, loword;
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if (ump_can_waiting) {
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if (ECanaRegs.CANTA.all & 4UL) {
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ECanaRegs.CANTA.all = 4UL;
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ump_can_waiting = 0;
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} else if ((ECanaRegs.CANAA.all & 4UL) ||
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((unsigned long)CpuTimer1.InterruptCount - ump_can_sent_at > 250UL)) {
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/* Íåò ïîäòâåðæäåíèÿ øèíû: îòìåíÿåì òîëüêî ñëóæåáíûé mailbox.
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* GUI îáíàðóæèò íåïîëíûé îòâåò ïî òàéì-àóòó; óïðàâëåíèå MBOX0
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* è ïðè¸ì êîìàíä MBOX1 ïðîäîëæàþòñÿ. */
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ECanaRegs.CANTRR.all = 4UL;
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/* Äî ôàêòè÷åñêîãî çàâåðøåíèÿ îòìåíû mailbox íå ïåðåèñïîëüçóåì. */
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if (!(ECanaRegs.CANAA.all & 4UL)) return;
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ECanaRegs.CANAA.all = 4UL;
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ump_can_waiting = 0;
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ump_can_length = 0;
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} else return;
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}
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if (ump_can_index >= ump_can_length && ump_can_pending) {
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saved = __disable_interrupts();
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tag = ump_can_tag; address = ump_can_address; value = ump_can_value;
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ump_can_pending = 0;
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ump_can_length = ump_can_prepare(tag & 0xFF, address, value, ump_can_reply, &error);
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ump_can_reply_tag = (tag & 0xFF00) | error;
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ump_can_index = 0;
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__restore_interrupts(saved);
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}
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if (ump_can_index >= ump_can_length) return;
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/* Ïåðåä ñëåäóþùèì ôðàãìåíòîì óñòóïàåì øòàòíîé òåëåìåòðèè MBOX0. */
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if (ECanaRegs.CANTRS.all & 1UL) return;
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hiword = ((unsigned long)(UMP_CAN_MARKER + ump_can_index/2) << 16) | ump_can_reply_tag;
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loword = ((unsigned long)ump_can_reply[ump_can_index] << 16) | ump_can_reply[ump_can_index+1];
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ECanaRegs.CANTA.all = 4UL; ECanaRegs.CANAA.all = 4UL;
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ECanaMboxes.MBOX2.MDH.all = hiword;
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ECanaMboxes.MBOX2.MDL.all = loword;
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ump_can_sent_at = CpuTimer1.InterruptCount;
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ECanaRegs.CANTRS.all = 4UL;
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ump_can_waiting = 1;
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ump_can_index += 2;
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}
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