"""Exercise production RS485.c functions with FIFO register side effects.""" import argparse import os from pathlib import Path import re import subprocess import tempfile root=Path(__file__).resolve().parents[2] def read(path): return re.sub(r'/\*.*?\*/|//[^\n]*','',path.read_bytes().decode('cp1251').replace('\r\n','\n'),flags=re.S) source=read(root/'Source/Internal/RS485.c') names=['RS_RX_Handler','RS_TX_Handler','RS_Send','RS_BSend','RS_SetBitMode', 'RS_FifoWait','RS_FifoTx','RS_FifoStart','RS_FifoAbort','RS_FifoTick1ms'] prototypes=[];functions=[] for name in names: match=re.search(r'(?:static\s+)?(?:void|int)\s+'+name+r'\([^;{}]*\)\s*\{',source) assert match,name begin=source.index('{',match.start());end=begin+1;depth=1 while depth: depth+=(source[end]=='{')-(source[end]=='}');end+=1 prototypes.append(source[match.start():begin]+';') functions.append(source[match.start():end]) body='\n'.join(functions) # TI C28x char is 16 bits: 0x80..0xFF remain positive before word packing. body=re.sub(r'\bchar\s+Rc;', 'unsigned int Rc;', body) body=body.replace('received=rs_arr->SciRegs->SCIRXBUF.all;', 'received=model_pop(rs_arr);') body=body.replace('Rc = rs_arr->SciRegs->SCIRXBUF.bit.RXDT;', 'Rc=model_pop(rs_arr);') body=body.replace('rs_arr->SciRegs->SCIFFRX.bit.RXFIFORESET=0;', 'model_flush(rs_arr);rs_arr->SciRegs->SCIFFRX.bit.RXFIFORESET=0;') body=body.replace('rs_arr->SciRegs->SCICTL1.bit.SWRESET=1;', 'rs_arr->SciRegs->SCIRXST.all=0;rs_arr->SciRegs->SCICTL1.bit.SWRESET=1;') body=body.replace('while (!rs_arr->SciRegs->SCICTL2.bit.TXEMPTY) { }', 'while (!rs_arr->SciRegs->SCICTL2.bit.TXEMPTY) { model_step(rs_arr); }',1) body=body.replace('while (!rs_arr->SciRegs->SCICTL2.bit.TXEMPTY) { }', 'while (!rs_arr->SciRegs->SCICTL2.bit.TXEMPTY) { model_shift(rs_arr); }') body=body.replace('!rs_arr->SciRegs->SCICTL2.bit.TXEMPTY) { }', '!rs_arr->SciRegs->SCICTL2.bit.TXEMPTY) { model_step(rs_arr); }') header=read(root/'Source/Internal/Include/RS485.h') header=re.sub(r'#define SCI_send\(x,y\)[^\n]*', '#define SCI_send(x,y) model_push(x,y)',header) header=re.sub(r'#define enableUARTInt\(x\)[^\n]*', '#define enableUARTInt(x) model_interrupts(x,0)',header) header=re.sub(r'#define enableUARTIntW\(x\)[^\n]*', '#define enableUARTIntW(x) model_interrupts(x,1)',header) header=re.sub(r'#define Rec_Bloc_Begin[^\n]*', '#define Rec_Bloc_Begin ((uintptr_t)load_memory)',header) header=re.sub(r'#define Rec_Bloc_End[^\n]*', '#define Rec_Bloc_End ((uintptr_t)(load_memory+4100))',header) registers=read(root/'Source/External/v120/DSP2833x_headers/include/DSP2833x_Sci.h') defines=''' #include #include #include #include typedef unsigned short Uint16; #define interrupt #define true 1 #define false 0 #define BM_CHAR32 0 #define BM_PACKED 1 #define CNTRL_ADDR_UNIVERSAL 16 #define CNTRL_ADDR 5 #define ADDR_FOR_ALL 0 #define LOBYTE(x) ((x)&255) #define HIBYTE(x) (((x)>>8)&255) enum {CMD_MODBUS_3=3,ANS_MODBUS_4=4,CMD_MODBUS_6=6,CMD_MODBUS_16=16, CMD_LOAD=51,CMD_INITLOAD=58,CMD_STD_ANS=66}; ''' harness=(Path(__file__).with_name('model.inc')).read_text() before,after=harness.split('/* HANDLERS */') parser=argparse.ArgumentParser();parser.add_argument('--cc',required=True);args=parser.parse_args() env=dict(os.environ);env['PATH']=str(Path(args.cc).parent)+os.pathsep+env.get('PATH','') with tempfile.TemporaryDirectory(prefix='pm35-fifo-') as directory: path=Path(directory);c=path/'model.c';exe=path/'model.exe' c.write_text(defines+registers+header+'\n'.join(prototypes)+before+body+after) subprocess.run([args.cc,'-std=c99','-O1','-Werror=implicit-function-declaration',str(c),'-o',str(exe)],check=True,env=env) subprocess.run([str(exe)],check=True,env=env,timeout=20)