/* Exercise the production Timer2 SPI state machine; no hardware writes. */
#include <assert.h>
#include "../../Source/Internal/spise2p.c"
static unsigned trace[300], widths[300], used;
static void transfer(unsigned long address, int write)
{
    unsigned buf[2]={0x1234,0x5678}, i;
    SE2P_DATA message={buf,2,address};
    used=0;
    if(write) spiSe2pWrite(&se2p,&message); else spiSe2pRead(&se2p,&message);
    for(i=0;i<100 && !spiSe2pFree(&se2p);i++) {
        SpiaRegs.SPITXBUF=0xdead;
        SpiaRegs.SPIRXBUF=0; /* WIP clear for write, deterministic read data. */
        SpiaRegs.SPISTS.bit.INT_FLAG=1;
        SPISE2P_DRV_tick(&se2p);
        if(SpiaRegs.SPITXBUF!=0xdead) {
            assert(GpioDataRegs.GPADAT.bit.GPIO19==0);
            trace[used]=SpiaRegs.SPITXBUF;
            widths[used++]=(SpiaRegs.SPICCR.all&15)+1;
        }
    }
    assert(spiSe2pFree(&se2p) && GpioDataRegs.GPADAT.bit.GPIO19==1);
    i=0;
    if(write) { assert(trace[i]==0x0600 && widths[i++]==8); }
    assert(trace[i]==(write ? 0x0200 : 0x0300) && widths[i++]==8);
#if EEPROM_M95M02
    assert(trace[i]==((address>>16)<<8) && widths[i++]==8);
#endif
    assert(trace[i]==(address&65535) && widths[i++]==16);
    assert(trace[i]==(write ? 0x1234 : 0) && widths[i++]==16);
    assert(trace[i]==(write ? 0x5678 : 0) && widths[i++]==16);
    if(write) { assert(trace[i]==0x0500 && widths[i++]==8); assert(trace[i++]==0); }
    assert(i==used);
}
int main(void)
{
    SPISE2P_DRV_init(&se2p);
    transfer(0x7ffc,0); transfer(0x7ffc,1);
#if EEPROM_M95M02
    assert(BALSAM167_EEPROM_FIRMWARE_BYTES==261884UL);
    transfer(0xfffe,0); transfer(0x10000,0);
    transfer(0x20000,1); transfer(0x3fffc,0); transfer(0x3fffc,1);
#else
    assert(BALSAM167_EEPROM_FIRMWARE_BYTES==32508);
#endif
    return 0;
}