#include "../../Source/Internal/log_to_mem.c" struct mock_gpio GpioDataRegs; int READY = 1, Desk = 6, Mode = 5; int modbus[128], CanTimeOutErrorTR; unsigned long IMPowse, WAKEpowse; unsigned int ADC_table[4]; #define CHECK(x) if (!(x)) return __LINE__ int main(void) { unsigned int i; /* Simulate COFF boot with dirty RAM, including a stale active bank. */ ump_state = ump_count = ump_cursor = ump_next = 0xA5A5; ump_period = ump_divider = 0xA5A5; ump_time = ump_sequence = 0xA5A5A5A5UL; ump_bank = ump_archive_bank = 0xA5A5; ump_archive_count = ump_archive_next = ump_generation = 0xA5A5; ump_source = ump_post = ump_post_dropped = 0xA5A5; ump_can_header = ump_can_count = 0xA5A5; for (i = 0; i < 3; i++) ump_can_data[i] = 0xA5A5; for (i = 0; i < 2; i++) ump_pm67_voltage[i] = 0xA5A5; ump_prev_commands = ump_prev_inputs = ump_prev_outputs = 0xA5A5; ump_dac_ramp = ump_dac_duration = ump_dac_go10 = 0xA5A5; ump_dac_stop10 = ump_dac_position = 0xA5A5; ump_log_init(); CHECK(ump_log_read(UMP_LOG_BASE) == 0x554D); CHECK(ump_log_read(UMP_LOG_BASE+1) == 3); CHECK(ump_log_read(UMP_LOG_BASE+2) == 0); CHECK(ump_log_read(UMP_LOG_BASE+3) == 0); CHECK(ump_log_read(UMP_LOG_BASE+6) == 20); for (i = 7; i <= 8; i++) CHECK(ump_log_read(UMP_LOG_BASE+i) == 0); for (i = 12; i <= 15; i++) CHECK(ump_log_read(UMP_LOG_BASE+i) == 0); CHECK(ump_bank == 0 && ump_archive_bank == 1); CHECK(ump_cursor == 0 && ump_next == 0 && ump_archive_next == 0); CHECK(ump_divider == 0 && ump_sequence == 0 && ump_post_dropped == 0); CHECK(ump_can_header == 0 && ump_can_count == 0); for (i = 0; i < 3; i++) CHECK(ump_can_data[i] == 0); for (i = 0; i < 2; i++) CHECK(ump_pm67_voltage[i] == 0); CHECK(ump_prev_commands == 0 && ump_prev_inputs == 0 && ump_prev_outputs == 0); CHECK(ump_dac_ramp == 0 && ump_dac_duration == 0 && ump_dac_go10 == 0); CHECK(ump_dac_stop10 == 0 && ump_dac_position == 0); CHECK(ump_log_write(UMP_LOG_BASE+1, 20)); CHECK(ump_log_write(UMP_LOG_BASE, 1)); CHECK(ump_state == 1 && ump_count == 1); ump_log_tick(); CHECK(ump_time == 1); CHECK(ump_log_write(UMP_LOG_BASE, 0)); ump_archive_count = 7; ump_generation = 2; ump_pm67_voltage[0] = 123; CHECK(ump_log_write(UMP_LOG_BASE, 1)); CHECK(ump_time == 1 && ump_archive_count == 7 && ump_generation == 2); CHECK(ump_word(0, 0, 40) == 123); return 0; }