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Dimas
2024-05-08 13:12:28 +03:00
parent 60660d7abe
commit 4386deba67
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257
Source/Internal/ADC.c Normal file
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#include "DSP2833x_Device.h" // DSP281x Headerfile Include File
#include "DSP2833x_Examples.h" // DSP281x Examples Include File
#include "DSP2833x_SWPrioritizedIsrLevels.h"
#include "ADC.h"
#include "log_to_mem.h"
#include "RS485.h"
#include "filter_bat2.h"
#include "measure.h"
#include "message.h"
#include "package.h"
#include "peripher.h"
Uint16 adc_table_lem[4];
Uint16 adc_table_tpl[28]; // Ïîòîìó ÷òî +4 êàëèáð
unsigned long COUNT_WAIT_ONE_CANAL;
// Prototype statements for functions found within this file.
interrupt void adc_isr(void);
void setup_adc()
{
long CLKdiv,HSPCLKdiv,Rate;
#if (CPU_FRQ_150MHZ) // Default - 150 MHz SYSCLKOUT
#define ADC_MODCLK 0x3 // HSPCLK = SYSCLKOUT/2*ADC_MODCLK2 = 150/(2*3) = 25.0 MHz
#endif
#if (CPU_FRQ_100MHZ)
#define ADC_MODCLK 0x2 // HSPCLK = SYSCLKOUT/2*ADC_MODCLK2 = 100/(2*2) = 25.0 MHz
#endif
// Specific clock setting for this example:
// EALLOW;
// SysCtrlRegs.HISPCP.all = ADC_MODCLK; // HSPCLK = SYSCLKOUT/ADC_MODCLK
// EDIS;
// Interrupts that are used in this example are re-mapped to
// ISR functions found within this file.
EALLOW; // This is needed to write to EALLOW protected register
PieVectTable.ADCINT = &adc_isr;
EDIS; // This is needed to disable write to EALLOW protected registers
InitAdc(); // For this example, init the ADC
// Enable ADCINT in PIE
PieCtrlRegs.PIEIER1.bit.INTx6 = 1;
IER |= M_INT1; // Enable CPU Interrupt 1
// EINT; // Enable Global interrupt INTM
// ERTM; // Enable Global realtime interrupt DBGM
// Configure ADC
if(Desk==dsk_LOAD)
{
AdcRegs.ADCMAXCONV.bit.MAX_CONV1 = 0x0005; // Setup 2 conv's on SEQ1
AdcRegs.ADCCHSELSEQ1.bit.CONV00 = 0x3; // òåìïåðàòóðà (êîòîðîé íåò)
AdcRegs.ADCCHSELSEQ1.bit.CONV01 = 0x1; // îìåãà
AdcRegs.ADCCHSELSEQ1.bit.CONV02 = 0x5; // íàïðóãà 1
AdcRegs.ADCCHSELSEQ1.bit.CONV03 = 0x4; // íàïðóãà 2
AdcRegs.ADCCHSELSEQ2.bit.CONV04 = 0x7; // òîê 1
AdcRegs.ADCCHSELSEQ2.bit.CONV05 = 0x2; // òîê 2
}
if(Desk==dsk_BKST)
{
AdcRegs.ADCMAXCONV.bit.MAX_CONV1 = 0x0002; // Setup 2 conv's on SEQ1
AdcRegs.ADCCHSELSEQ1.bit.CONV00 = 0x0; //0x5;//0x7; // Setup ADCINA3 as 1st SEQ1 conv.
AdcRegs.ADCCHSELSEQ1.bit.CONV01 = 0x1; //0x4;// Setup ADCINA2 as 2nd SEQ1 conv.
AdcRegs.ADCCHSELSEQ1.bit.CONV02 = 0x2; //0x4;// Setup ADCINA2 as 2nd SEQ1 conv.
}
if(Desk==dsk_COMM)
{
AdcRegs.ADCMAXCONV.bit.MAX_CONV1 = 0x0006; // Setup 2 conv's on SEQ1
AdcRegs.ADCCHSELSEQ1.bit.CONV00 = 0x5; // ñíà÷àëà òîæå áóäóò òåìïåðàòóðû
AdcRegs.ADCCHSELSEQ1.bit.CONV01 = 0x4; // Setup ADCINA2 as 2nd SEQ1 conv.
AdcRegs.ADCCHSELSEQ1.bit.CONV02 = 0x7; // Setup ADCINA2 as 2nd SEQ1 conv.
AdcRegs.ADCCHSELSEQ1.bit.CONV03 = 0x2; // Setup ADCINA2 as 2nd SEQ1 conv.
AdcRegs.ADCCHSELSEQ2.bit.CONV04 = 0x3; // Setup ADCINA2 as 2nd SEQ1 conv.
AdcRegs.ADCCHSELSEQ2.bit.CONV05 = 0x6; // Setup ADCINA2 as 2nd SEQ1 conv.
AdcRegs.ADCCHSELSEQ2.bit.CONV06 = 0x1; // Setup ADCINA2 as 2nd SEQ1 conv.
}
if(Desk==dsk_BKSD)
{
AdcRegs.ADCMAXCONV.bit.MAX_CONV1 = 0x0000; // Setup 2 conv's on SEQ1
AdcRegs.ADCCHSELSEQ1.bit.CONV00 = 0x0; // Setup ADCINA3 as 1st SEQ1 conv.
}
if(Desk==dsk_SHKF)
{
AdcRegs.ADCMAXCONV.bit.MAX_CONV1 = 0x000F; // Setup 2 conv's on SEQ1
AdcRegs.ADCCHSELSEQ1.bit.CONV00 = 0x2; // 380Â Ô1
AdcRegs.ADCCHSELSEQ1.bit.CONV01 = 0x3; // 380Â Ô2
AdcRegs.ADCCHSELSEQ1.bit.CONV02 = 0x6; // 31Â Ô1
AdcRegs.ADCCHSELSEQ1.bit.CONV03 = 0xC; // 31Â Ô2 ?
AdcRegs.ADCCHSELSEQ2.bit.CONV04 = 0xA; // 31Â UC1
AdcRegs.ADCCHSELSEQ2.bit.CONV05 = 0xB; // 31Â UC2
AdcRegs.ADCCHSELSEQ2.bit.CONV06 = 0x7; // 24Â ÏÓ
AdcRegs.ADCCHSELSEQ2.bit.CONV07 = 0x4; // 24Â ÏÓ
AdcRegs.ADCCHSELSEQ3.bit.CONV08 = 0x5; // 24Â ÏÊ áûëî 5
AdcRegs.ADCCHSELSEQ3.bit.CONV09 = 0x1; // 15Â Äð
AdcRegs.ADCCHSELSEQ3.bit.CONV10 = 0xE; // +24Â Äò
AdcRegs.ADCCHSELSEQ3.bit.CONV11 = 0x0; // +24Â Äò
AdcRegs.ADCCHSELSEQ4.bit.CONV12 = 0x8; // -24Â Äò áûëî 8
AdcRegs.ADCCHSELSEQ4.bit.CONV13 = 0xF;//0xF; // ÄÒ° 1
AdcRegs.ADCCHSELSEQ4.bit.CONV14 = 0xD;//0xD; // ÄÒ° 2
AdcRegs.ADCCHSELSEQ4.bit.CONV15 = 0x9;//0x9;
}
AdcRegs.ADCTRL2.bit.EPWM_SOCA_SEQ1 = 1;// Enable SOCA from ePWM to start SEQ1
AdcRegs.ADCTRL2.bit.INT_ENA_SEQ1 = 1; // Enable SEQ1 interrupt (every EOS)
AdcRegs.ADCST.bit.INT_SEQ1_CLR = 1; // Clear INT SEQ1 bit
AdcRegs.ADCTRL1.bit.SEQ_CASC = 1; // 1 Cascaded mode
AdcRegs.ADCTRL1.bit.CONT_RUN=0;
AdcRegs.ADCTRL1.bit.ACQ_PS = 15;
//AdcRegs.ADCTRL1.bit.CPS=1;
AdcRegs.ADCTRL2.bit.RST_SEQ1 = 1; // Reset SEQ1
PieCtrlRegs.PIEACK.all = PIEACK_GROUP1; // Acknowledge interrupt to PIE
// Assumes ePWM1 clock is already enabled in InitSysCtrl();
EPwm1Regs.ETSEL.bit.SOCAEN = 1; // Enable SOC on A group
EPwm1Regs.ETSEL.bit.SOCASEL = 4; // Select SOC from from CPMA on upcount
EPwm1Regs.ETPS.bit.SOCAPRD = 1; // Generate pulse on 1st event
EPwm1Regs.CMPA.half.CMPA = 0x0080; // Set compare A value
EPwm1Regs.TBCTL.bit.HSPCLKDIV = CLKMULT;
EPwm1Regs.TBCTL.bit.CLKDIV=2;
CLKdiv = 1<<EPwm1Regs.TBCTL.bit.CLKDIV;
if(EPwm1Regs.TBCTL.bit.HSPCLKDIV) HSPCLKdiv = 2*EPwm1Regs.TBCTL.bit.HSPCLKDIV;
else HSPCLKdiv = 1;
Rate = (SYSCLKOUT/(HSPCLKdiv*CLKdiv))/ADC_FREQ;
EPwm1Regs.TBPRD = Rate; // Set period for ePWM1
EPwm1Regs.TBCTL.bit.CTRMODE = 0; // count up and start
if(Desk==dsk_BKSD) COUNT_WAIT_ONE_CANAL = (ADC_FREQ/100);
else COUNT_WAIT_ONE_CANAL = (ADC_FREQ/20);
}
interrupt void adc_isr(void)
{
static int count_run_one_canal=0;
static int cownt_cans=0;
int code_tpl_canal=0;
float Temper;
int i;
// Set interrupt priority:
volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER1.all;
IER |= M_INT1;
IER &= MINT1; // Set "global" priority
PieCtrlRegs.PIEIER1.all &= MG11;//16; // Set "group" priority
PieCtrlRegs.PIEACK.all = 0xFFFF; // Enable PIE interrupts
EINT;
if(WAKE) WAKE--;
if(READY) READY--;
else
{
if(Caliber_time)
{
if(!--Caliber_time)
{
cTermoCal = 0;
cSaveParam = 1;
} }
if(Kurrent)
{
for(i=0;i<4;i++)
{
adc_table_lem[i] = *((&AdcRegs.ADCRESULT0)+i+2) >>4; Current_count(i);
} }
if(Desk==dsk_LOAD)
{
Temper = AdcRegs.ADCRESULT1 >> 4;
modbus[0x63] = Temper;
Temper = filterbat(&adc_filter[0],Temper);
modbus[0x1D] = (Temper-DAC_04)/(DAC_20-DAC_04)*(200-40)+40;
}
if(Desk==dsk_SHKF)
{
for(i=0;i<CLKMULT*3;)
{
if (++cownt_cans>=tpl_cans) cownt_cans=0;
// Èìåííî çäåñü íåò äûð
// if(sens_type[cownt_cans])
{
i++;
Temper= *(&AdcRegs.ADCRESULT0 + cownt_cans) >>4;
adc_table_tpl[cownt_cans]=filterbat(&adc_filter[cownt_cans],Temper);
if(sens_type[cownt_cans]==TERMO_AD) Temper_count(cownt_cans);
else Power_count(cownt_cans);
} } }
if(TermoSW)
{
if (count_run_one_canal>COUNT_WAIT_ONE_CANAL/2)
{
for(i=0;i<TermoSW;i++)
{
Temper = *(&AdcRegs.ADCRESULT0 + i) >>4;
Temper = filterbat(&adc_filter[TermoSW*cownt_cans+i],Temper);
adc_table_tpl[TermoSW*cownt_cans+i]=(int)Temper;
} }
if (count_run_one_canal++ >= COUNT_WAIT_ONE_CANAL)
{
count_run_one_canal=0;
for(i=0;i<TermoSW;i++)
Temper_count(TermoSW*cownt_cans+i);
if (++cownt_cans >= TPL_CANS+2)
{
cownt_cans=0;
}
code_tpl_canal = cownt_cans;
if(TermoAD)
{
if(cownt_cans == TPL_CANS ) code_tpl_canal = TERMOPAIR-1;
if(cownt_cans == TPL_CANS+1) code_tpl_canal = TERMOPAIR-2; // ïîòîìó ÷òî 300 è 400 íàîáîðîò
}
select_tpl_canal(code_tpl_canal);
} } }
// Reinitialize for next ADC sequence
AdcRegs.ADCTRL2.bit.RST_SEQ1 = 1; // Reset SEQ1
AdcRegs.ADCST.bit.INT_SEQ1_CLR = 1; // Clear INT SEQ1 bit
PieCtrlRegs.PIEACK.all = PIEACK_GROUP1; // Acknowledge interrupt to PIE
// Restore registers saved:
DINT;
PieCtrlRegs.PIEIER1.all = TempPIEIER;
return;
}

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#include "DSP2833x_Device.h" // DSP281x Headerfile Include File
#include "DSP2833x_SWPrioritizedIsrLevels.h"
#include "filter_bat2.h"
#include "measure.h"
#include "RS485.h"
#include "message.h"
#include "DAC.h"
#include "package.h"
#include "tools.h"
#include "peripher.h"
#include "log_to_mem.h"
#define dCLK_1() GpioDataRegs.GPBSET.bit.GPIO63=1
#define dCLK_0() GpioDataRegs.GPBCLEAR.bit.GPIO63=1
#define dCS_1() GpioDataRegs.GPBSET.bit.GPIO59=1
#define dCS_0() GpioDataRegs.GPBCLEAR.bit.GPIO59=1
unsigned long WAKEpowse;
unsigned long IMPowse;
unsigned int period_dac, time_dac;
void Setup_DAC_time(void)
{
WAKEpowse = 3L * DAC_FREQ +1;
period_dac = READY_FREQ / DAC_FREQ;
time_dac = LOAD_TIME * DAC_FREQ;
}
void dOUT(int x)
{
if(x) GpioDataRegs.GPBSET.bit.GPIO60=1;
else GpioDataRegs.GPBCLEAR.bit.GPIO60=1;
}
void wast()
{
int i;
for(i=0;i<25;i++);
}
void dSEND(unsigned int word)
{
int i;
dCS_0(); DSP28x_usDelay(1L);
for(i=0;i<16;i++)
{
dCLK_1();
dOUT((word & 0x8000)?1:0); word = word<<1; DSP28x_usDelay(1L);
dCLK_0(); DSP28x_usDelay(1L);
}
dCS_1();
}
void Init_DAC(void)
{
dSEND(0x9002|0x0000); toggle_RES_OUT_1();
}
void Anal_output(long vrot, long maxx)
{
long out;
static int x;
out = DAC_min() + vrot * DAC_max() / maxx - vrot * DAC_min() / maxx ;
x=0;// !x; òùåòíî áûòèå
if(cCalibrDac) out=DAC_cal();
out = out & 0xFFF;
if(x) dSEND(out|0x0000|0x0000);
else dSEND(out|0x8000|0x0000);
modbus[123] = out;
modbus[0x1C] = 40L + vrot * 200 / maxx - vrot * 40 / maxx ;
/*
if(!no_write)
{
Test_mem_limit(4);
Log_to_mem(modbus[0x7B]);
Log_to_mem(modbus[0x63]);
Log_to_mem(modbus[0x1C]);
Log_to_mem(modbus[0x1D]);
}
*/
}
void Load_runner()
{
static unsigned int count_dac=0, count_load=0, x=1;
float sinus=0;
int kod;
if(IMPowse) IMPowse--;
if(++count_dac >= period_dac)
{
count_dac=0;
if(WAKEpowse)
{
--WAKEpowse;
if( (WAKEpowse == DAC_FREQ/2*6)||
(WAKEpowse == DAC_FREQ/2*5)||
(WAKEpowse == DAC_FREQ/2*4)||
(WAKEpowse == DAC_FREQ/2*3)||
(WAKEpowse == DAC_FREQ/2*2)||
(WAKEpowse == DAC_FREQ/2*1) )
{
Init_DAC(); x=1;
} }
else
{
if(cUMPstart)
{
if(++count_load > time_dac) count_load = time_dac;
if(count_load > (time_dac/2))count_load++;
sinus = (10.0 / 16.0 * count_load) + (2.0 / 16.0 * time_dac);
}
else
{ count_load = 0;
sinus=0;
x = (x+1)&0x3FF;
}
if(!x || cInitDac)
{
Init_DAC(); x=1; cInitDac=0;
}
else
{
kod = (int)sinus;
Anal_output(kod, time_dac);
} } } }

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Source/Internal/Include/ADC.h Normal file
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extern Uint16 adc_table_lem[];
extern Uint16 adc_table_tpl[];
void setup_adc(void);

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Source/Internal/Include/DAC.h Normal file
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void Load_runner(void);
void Anal_output(long vrot, long maxx);
void Init_DAC(void);
void Setup_DAC_time(void);
extern unsigned long WAKEpowse;
extern unsigned long IMPowse;
extern unsigned int period_dac, time_dac;

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Source/Internal/Include/GPIO_table.h Normal file
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#define COMM_gpio00_dir 0L
#define COMM_gpio01_dir 0L
#define COMM_gpio02_dir 0L
#define COMM_gpio03_dir 0L
#define COMM_gpio04_dir 0L
#define COMM_gpio05_dir 0L
#define COMM_gpio06_dir 0L
#define COMM_gpio07_dir 0L
#define COMM_gpio08_dir 0L
#define COMM_gpio09_dir 0L
#define COMM_gpio10_dir 0L
#define COMM_gpio11_dir 0L
#define COMM_gpio19_dir 1L // 63 — SPI
#define COMM_gpio20_dir 0L // 64 2:9B mode 2
#define COMM_gpio21_dir 0L // 65 2:9A mode 4
#define COMM_gpio22_dir 0L // 66 2:12C mode 1
#define COMM_gpio23_dir 0L
#define COMM_gpio24_dir 1L // 68 2:12A select
#define COMM_gpio25_dir 1L // 69 2:11C select
#define COMM_gpio26_dir 0L
#define COMM_gpio27_dir 1L // 73 2:11A select
#define COMM_gpio32_dir 1L // 74 2:10B DIOD green
#define COMM_gpio33_dir 0L
#define COMM_gpio34_dir 1L // 142 — SCI
#define COMM_gpio48_dir 1L // 88 2:14C DIOD red
#define COMM_gpio49_dir 1L // 89 2:14B select
#define COMM_gpio50_dir 0L // 90 2:14A input 2
#define COMM_gpio51_dir 0L // 91 2:13C mode !8
#define COMM_gpio52_dir 1L // 94 2:13B select
#define COMM_gpio53_dir 0L // 95 2:13A input 1
#define COMM_gpio58_dir 1L // 100 1:13C rez 1
#define COMM_gpio59_dir 1L // 110 1:13B gotov
#define COMM_gpio60_dir 1L // 111 1:13A led 1
#define COMM_gpio61_dir 1L // 112 1:14C rez 2
#define COMM_gpio62_dir 0L
#define COMM_gpio63_dir 1L // 114 1:14A led 2
//===========================================================================
#define BKSD_gpio00_dir 0L // 5 2:7A oil
#define BKSD_gpio01_dir 1L // 6 2:4A select
#define BKSD_gpio02_dir 0L // 7 2:7B oil
#define BKSD_gpio03_dir 1L // 10 2:4B select
#define BKSD_gpio04_dir 0L // 11 2:7C oil
#define BKSD_gpio05_dir 0L
#define BKSD_gpio06_dir 0L
#define BKSD_gpio07_dir 1L // 16 2:3A select
#define BKSD_gpio08_dir 1L // 17 2:6B select
#define BKSD_gpio09_dir 1L // 18 2:3B select
#define BKSD_gpio10_dir 0L // 19 2:6C oil
#define BKSD_gpio11_dir 1L // 20 2:3C select
#define BKSD_gpio19_dir 1L // 63 — SPI
#define BKSD_gpio20_dir 0L // 64 2:9B mode 2
#define BKSD_gpio21_dir 0L // 65 2:9A mode 4
#define BKSD_gpio22_dir 0L // 66 2:12C mode 1
#define BKSD_gpio23_dir 0L
#define BKSD_gpio24_dir 0L
#define BKSD_gpio25_dir 0L
#define BKSD_gpio26_dir 0L
#define BKSD_gpio27_dir 0L
#define BKSD_gpio32_dir 1L // 74 2:10B DIOD green
#define BKSD_gpio33_dir 0L
#define BKSD_gpio34_dir 1L // 142 — SCI
#define BKSD_gpio48_dir 1L // 88 2:14C DIOD red
#define BKSD_gpio49_dir 0L // 89 2:14B input 2
#define BKSD_gpio50_dir 0L // 90 2:14A input 1
#define BKSD_gpio51_dir 0L // 91 2:13C mode !8
#define BKSD_gpio52_dir 0L
#define BKSD_gpio53_dir 0L
#define BKSD_gpio58_dir 0L
#define BKSD_gpio59_dir 1L // 110 1:13B gotov
#define BKSD_gpio60_dir 1L // 111 1:13A led 1
#define BKSD_gpio61_dir 1L // 112 1:14C rez 2
#define BKSD_gpio62_dir 1L // 113 1:14B rez 1
#define BKSD_gpio63_dir 1L // 114 1:14A led 2
//===========================================================================
#define BKST_gpio00_dir 1L // 5 2:7A select
#define BKST_gpio01_dir 1L // 6 2:4A select
#define BKST_gpio02_dir 0L
#define BKST_gpio03_dir 1L // 10 2:4B select
#define BKST_gpio04_dir 0L
#define BKST_gpio05_dir 0L
#define BKST_gpio06_dir 1L // 13 2:6A select
#define BKST_gpio07_dir 1L // 16 2:3A select
#define BKST_gpio08_dir 1L // 17 2:6B select
#define BKST_gpio09_dir 1L // 18 2:3B select
#define BKST_gpio10_dir 0L
#define BKST_gpio11_dir 1L // 20 2:3C select
#define BKST_gpio19_dir 1L // 63 — SPI
#define BKST_gpio20_dir 0L // 64 2:9B mode 2
#define BKST_gpio21_dir 0L // 65 2:9A mode 4
#define BKST_gpio22_dir 0L // 66 2:12C mode 1
#define BKST_gpio23_dir 0L
#define BKST_gpio24_dir 1L // 68 2:12A select
#define BKST_gpio25_dir 0L
#define BKST_gpio26_dir 0L
#define BKST_gpio27_dir 1L // 73 2:11A select
#define BKST_gpio32_dir 1L // 74 2:10B DIOD green
#define BKST_gpio33_dir 0L
#define BKST_gpio34_dir 1L // 142 — SCI
#define BKST_gpio48_dir 1L // 88 2:14C DIOD red
#define BKST_gpio49_dir 0L
#define BKST_gpio50_dir 1L // 90 2:14A select
#define BKST_gpio51_dir 0L // 91 2:13C mode !8
#define BKST_gpio52_dir 0L
#define BKST_gpio53_dir 1L // 95 2:13A select
#define BKST_gpio58_dir 1L // 100 1:13C rez 1
#define BKST_gpio59_dir 1L // 110 1:13B gotov
#define BKST_gpio60_dir 1L // 111 1:13A led 1
#define BKST_gpio61_dir 1L // 112 1:14C rez 2
#define BKST_gpio62_dir 1L // 113 1:14B led 2
#define BKST_gpio63_dir 0L // 114 1:14A input
//===========================================================================
#define PULT_gpio00_dir 1L // 5 2:7A gotov
#define PULT_gpio01_dir 0L
#define PULT_gpio02_dir 1L // 7 2:7B ro 1
#define PULT_gpio03_dir 0L
#define PULT_gpio04_dir 0L
#define PULT_gpio05_dir 0L
#define PULT_gpio06_dir 1L // 13 2:6A kanal
#define PULT_gpio07_dir 0L
#define PULT_gpio08_dir 1L // 17 2:6B kanal
#define PULT_gpio09_dir 0L
#define PULT_gpio10_dir 0L
#define PULT_gpio11_dir 0L
#define PULT_gpio19_dir 1L // 63 — SPI
#define PULT_gpio20_dir 0L // 64 2:9B mode 2
#define PULT_gpio21_dir 0L // 65 2:9A mode 4
#define PULT_gpio22_dir 0L // 66 2:12C mode 1
#define PULT_gpio23_dir 0L // 67 2:12B button
#define PULT_gpio24_dir 0L // 68 2:12A button
#define PULT_gpio25_dir 0L
#define PULT_gpio26_dir 0L // 72 2:11B button
#define PULT_gpio27_dir 0L // 73 2:11A button
#define PULT_gpio32_dir 1L // 74 2:10B DIOD green
#define PULT_gpio33_dir 0L
#define PULT_gpio34_dir 1L // 142 — SCI
#define PULT_gpio48_dir 1L // 88 2:14C DIOD red
#define PULT_gpio49_dir 0L // 89 2:14B button
#define PULT_gpio50_dir 0L // 90 2:14A button
#define PULT_gpio51_dir 0L // 91 2:13C mode !8
#define PULT_gpio52_dir 0L // 94 2:13B button
#define PULT_gpio53_dir 0L // 95 2:13A button
#define PULT_gpio58_dir 0L
#define PULT_gpio59_dir 0L
#define PULT_gpio60_dir 0L
#define PULT_gpio61_dir 0L
#define PULT_gpio62_dir 0L
#define PULT_gpio63_dir 0L
//===========================================================================
#define PLT2_gpio00_dir 0L
#define PLT2_gpio01_dir 0L
#define PLT2_gpio02_dir 0L
#define PLT2_gpio03_dir 1L // 10 2:4B res_pb
#define PLT2_gpio04_dir 0L // 11 2:7C button
#define PLT2_gpio05_dir 0L // 12 2:4C button
#define PLT2_gpio06_dir 1L // 13 2:6A kanal
#define PLT2_gpio07_dir 0L
#define PLT2_gpio08_dir 1L // 17 2:6B kanal
#define PLT2_gpio09_dir 1L // 18 2:3B res_lb
#define PLT2_gpio10_dir 0L
#define PLT2_gpio11_dir 0L
#define PLT2_gpio19_dir 1L // 63 × SPI
#define PLT2_gpio20_dir 0L // 64 2:9B mode 2
#define PLT2_gpio21_dir 0L // 65 2:9A mode 4
#define PLT2_gpio22_dir 0L // 66 2:12C mode 1
#define PLT2_gpio23_dir 0L // 67 2:12B button
#define PLT2_gpio24_dir 0L // 68 2:12A button
#define PLT2_gpio25_dir 0L // 69 2:11C button
#define PLT2_gpio26_dir 0L // 72 2:11B button
#define PLT2_gpio27_dir 0L // 73 2:11A button
#define PLT2_gpio32_dir 1L // 74 2:10B DIOD green
#define PLT2_gpio33_dir 0L // 75 2:10C button
#define PLT2_gpio34_dir 1L // 142 × SCI
#define PLT2_gpio48_dir 0L // 88 2:14C button
#define PLT2_gpio49_dir 0L // 89 2:14B button
#define PLT2_gpio50_dir 0L // 90 2:14A button
#define PLT2_gpio51_dir 0L // 91 2:13C mode !8
#define PLT2_gpio52_dir 0L // 94 2:13B button
#define PLT2_gpio53_dir 0L // 95 2:13A button
#define PLT2_gpio58_dir 0L
#define PLT2_gpio59_dir 0L
#define PLT2_gpio60_dir 0L
#define PLT2_gpio61_dir 0L
#define PLT2_gpio62_dir 0L
#define PLT2_gpio63_dir 0L
//===========================================================================
#define SHKF_gpio00_dir 0L // 5 2:7A input
#define SHKF_gpio01_dir 0L // 6 2:4A input
#define SHKF_gpio02_dir 0L // 7 2:7B input
#define SHKF_gpio03_dir 0L // 10 2:4B input
#define SHKF_gpio04_dir 0L // 11 2:7C input
#define SHKF_gpio05_dir 0L // 12 2:4C input
#define SHKF_gpio06_dir 0L // 13 2:6A input
#define SHKF_gpio07_dir 0L // 16 2:3A input
#define SHKF_gpio08_dir 0L // 17 2:6B input
#define SHKF_gpio09_dir 0L // 18 2:3B input
#define SHKF_gpio10_dir 0L // 19 2:6C input
#define SHKF_gpio11_dir 0L // 20 2:3C input
#define SHKF_gpio19_dir 1L // 63 — SPI
#define SHKF_gpio20_dir 0L // 64 2:9B mode 2
#define SHKF_gpio21_dir 0L // 65 2:9A mode 4
#define SHKF_gpio22_dir 0L // 66 2:12C mode 1
#define SHKF_gpio23_dir 0L // 67 2:12B input
#define SHKF_gpio24_dir 0L // 68 2:12A input
#define SHKF_gpio25_dir 0L // 69 2:11C input
#define SHKF_gpio26_dir 0L // 72 2:11B input
#define SHKF_gpio27_dir 0L // 73 2:11A input
#define SHKF_gpio32_dir 0L // 74 2:10B input
#define SHKF_gpio33_dir 0L // 75 2:10C input
#define SHKF_gpio34_dir 1L // 142 — SCI
#define SHKF_gpio48_dir 1L // 88 2:14C DIOD red
#define SHKF_gpio49_dir 0L // 89 2:14B input
#define SHKF_gpio50_dir 0L // 90 2:14A input
#define SHKF_gpio51_dir 0L // 91 2:13C mode !8
#define SHKF_gpio52_dir 0L // 94 2:13B input
#define SHKF_gpio53_dir 0L // 95 2:13A input
#define SHKF_gpio58_dir 1L // 100 1:13C rez 1
#define SHKF_gpio59_dir 1L // 110 1:13B gotov
#define SHKF_gpio60_dir 1L // 111 1:13A led 1
#define SHKF_gpio61_dir 1L // 112 1:14C rez 2
#define SHKF_gpio62_dir 0L
#define SHKF_gpio63_dir 1L // 114 1:14A led 2
//===========================================================================
#define LOAD_gpio00_dir 0L
#define LOAD_gpio01_dir 1L // 6 2:4A led 2
#define LOAD_gpio02_dir 0L
#define LOAD_gpio03_dir 1L // 10 2:4B res_out 2
#define LOAD_gpio04_dir 0L
#define LOAD_gpio05_dir 0L
#define LOAD_gpio06_dir 0L // 13 2:6A omega d
#define LOAD_gpio07_dir 1L // 16 2:3A led 1
#define LOAD_gpio08_dir 0L // 17 2:6B start 1
#define LOAD_gpio09_dir 1L // 18 2:3B res_out 1
#define LOAD_gpio10_dir 0L
#define LOAD_gpio11_dir 0L // 20 2:3C res_in 0
#define LOAD_gpio19_dir 1L // 63 — SPI
#define LOAD_gpio20_dir 0L // 64 2:9B mode 2
#define LOAD_gpio21_dir 0L // 65 2:9A mode 4
#define LOAD_gpio22_dir 0L // 66 2:12C mode 1
#define LOAD_gpio23_dir 0L
#define LOAD_gpio24_dir 0L
#define LOAD_gpio25_dir 0L
#define LOAD_gpio26_dir 0L
#define LOAD_gpio27_dir 0L
#define LOAD_gpio32_dir 1L // 74 2:10B DIOD green
#define LOAD_gpio33_dir 0L
#define LOAD_gpio34_dir 1L // 142 — SCI
#define LOAD_gpio48_dir 1L // 88 2:14C DIOD red
#define LOAD_gpio49_dir 0L
#define LOAD_gpio50_dir 0L
#define LOAD_gpio51_dir 0L // 91 2:13C mode !8
#define LOAD_gpio52_dir 0L
#define LOAD_gpio53_dir 0L
#define LOAD_gpio58_dir 1L // 100 1:13C stop_dptb
#define LOAD_gpio59_dir 1L // 110 1:13B csdac
#define LOAD_gpio60_dir 1L // 111 1:13A didac
#define LOAD_gpio61_dir 1L // 112 1:14C gotov
#define LOAD_gpio62_dir 1L // 113 1:14B start_dptb
#define LOAD_gpio63_dir 1L // 114 1:14A clkdac
//===========================================================================
#define COMM_GPADIR (COMM_gpio00_dir ) + (COMM_gpio01_dir<<1) + (COMM_gpio02_dir<<2) + (COMM_gpio03_dir<<3) + \
(COMM_gpio04_dir<<4) + (COMM_gpio05_dir<<5) + (COMM_gpio06_dir<<6) + (COMM_gpio07_dir<<7) + \
(COMM_gpio08_dir<<8) + (COMM_gpio09_dir<<9) + (COMM_gpio10_dir<<10)+ (COMM_gpio11_dir<<11)+ \
(COMM_gpio19_dir<<19)+ \
(COMM_gpio20_dir<<20)+ (COMM_gpio21_dir<<21)+ (COMM_gpio22_dir<<22)+ (COMM_gpio23_dir<<23)+ \
(COMM_gpio24_dir<<24)+ (COMM_gpio25_dir<<25)+ (COMM_gpio26_dir<<26)+ (COMM_gpio27_dir<<27);
#define COMM_GPBDIR (COMM_gpio32_dir )+ (COMM_gpio33_dir<<1) + (COMM_gpio34_dir<<2 )+ \
(COMM_gpio48_dir<<16)+ (COMM_gpio49_dir<<17)+ (COMM_gpio50_dir<<18)+ (COMM_gpio51_dir<<19)+ \
(COMM_gpio52_dir<<20)+ (COMM_gpio53_dir<<21)+ \
(COMM_gpio58_dir<<26)+ (COMM_gpio59_dir<<27)+ \
(COMM_gpio60_dir<<28)+ (COMM_gpio61_dir<<29)+ (COMM_gpio62_dir<<30)+ (COMM_gpio63_dir<<31);
#define BKSD_GPADIR (BKSD_gpio00_dir ) + (BKSD_gpio01_dir<<1) + (BKSD_gpio02_dir<<2) + (BKSD_gpio03_dir<<3) + \
(BKSD_gpio04_dir<<4) + (BKSD_gpio05_dir<<5) + (BKSD_gpio06_dir<<6) + (BKSD_gpio07_dir<<7) + \
(BKSD_gpio08_dir<<8) + (BKSD_gpio09_dir<<9) + (BKSD_gpio10_dir<<10)+ (BKSD_gpio11_dir<<11)+ \
(BKSD_gpio19_dir<<19)+ \
(BKSD_gpio20_dir<<20)+ (BKSD_gpio21_dir<<21)+ (BKSD_gpio22_dir<<22)+ (BKSD_gpio23_dir<<23)+ \
(BKSD_gpio24_dir<<24)+ (BKSD_gpio25_dir<<25)+ (BKSD_gpio26_dir<<26)+ (BKSD_gpio27_dir<<27);
#define BKSD_GPBDIR (BKSD_gpio32_dir )+ (BKSD_gpio33_dir<<1) + (BKSD_gpio34_dir<<2 )+ \
(BKSD_gpio48_dir<<16)+ (BKSD_gpio49_dir<<17)+ (BKSD_gpio50_dir<<18)+ (BKSD_gpio51_dir<<19)+ \
(BKSD_gpio52_dir<<20)+ (BKSD_gpio53_dir<<21)+ \
(BKSD_gpio58_dir<<26)+ (BKSD_gpio59_dir<<27)+ \
(BKSD_gpio60_dir<<28)+ (BKSD_gpio61_dir<<29)+ (BKSD_gpio62_dir<<30)+ (BKSD_gpio63_dir<<31);
#define BKST_GPADIR (BKST_gpio00_dir ) + (BKST_gpio01_dir<<1) + (BKST_gpio02_dir<<2) + (BKST_gpio03_dir<<3) + \
(BKST_gpio04_dir<<4) + (BKST_gpio05_dir<<5) + (BKST_gpio06_dir<<6) + (BKST_gpio07_dir<<7) + \
(BKST_gpio08_dir<<8) + (BKST_gpio09_dir<<9) + (BKST_gpio10_dir<<10)+ (BKST_gpio11_dir<<11)+ \
(BKST_gpio19_dir<<19)+ \
(BKST_gpio20_dir<<20)+ (BKST_gpio21_dir<<21)+ (BKST_gpio22_dir<<22)+ (BKST_gpio23_dir<<23)+ \
(BKST_gpio24_dir<<24)+ (BKST_gpio25_dir<<25)+ (BKST_gpio26_dir<<26)+ (BKST_gpio27_dir<<27);
#define BKST_GPBDIR (BKST_gpio32_dir )+ (BKST_gpio33_dir<<1) + (BKST_gpio34_dir<<2 )+ \
(BKST_gpio48_dir<<16)+ (BKST_gpio49_dir<<17)+ (BKST_gpio50_dir<<18)+ (BKST_gpio51_dir<<19)+ \
(BKST_gpio52_dir<<20)+ (BKST_gpio53_dir<<21)+ \
(BKST_gpio58_dir<<26)+ (BKST_gpio59_dir<<27)+ \
(BKST_gpio60_dir<<28)+ (BKST_gpio61_dir<<29)+ (BKST_gpio62_dir<<30)+ (BKST_gpio63_dir<<31);
#define PULT_GPADIR (PULT_gpio00_dir ) + (PULT_gpio01_dir<<1) + (PULT_gpio02_dir<<2) + (PULT_gpio03_dir<<3) + \
(PULT_gpio04_dir<<4) + (PULT_gpio05_dir<<5) + (PULT_gpio06_dir<<6) + (PULT_gpio07_dir<<7) + \
(PULT_gpio08_dir<<8) + (PULT_gpio09_dir<<9) + (PULT_gpio10_dir<<10)+ (PULT_gpio11_dir<<11)+ \
(PULT_gpio19_dir<<19)+ \
(PULT_gpio20_dir<<20)+ (PULT_gpio21_dir<<21)+ (PULT_gpio22_dir<<22)+ (PULT_gpio23_dir<<23)+ \
(PULT_gpio24_dir<<24)+ (PULT_gpio25_dir<<25)+ (PULT_gpio26_dir<<26)+ (PULT_gpio27_dir<<27);
#define PULT_GPBDIR (PULT_gpio32_dir )+ (PULT_gpio33_dir<<1) + (PULT_gpio34_dir<<2 )+ \
(PULT_gpio48_dir<<16)+ (PULT_gpio49_dir<<17)+ (PULT_gpio50_dir<<18)+ (PULT_gpio51_dir<<19)+ \
(PULT_gpio52_dir<<20)+ (PULT_gpio53_dir<<21)+ \
(PULT_gpio58_dir<<26)+ (PULT_gpio59_dir<<27)+ \
(PULT_gpio60_dir<<28)+ (PULT_gpio61_dir<<29)+ (PULT_gpio62_dir<<30)+ (PULT_gpio63_dir<<31);
#define PLT2_GPADIR (PLT2_gpio00_dir ) + (PLT2_gpio01_dir<<1) + (PLT2_gpio02_dir<<2) + (PLT2_gpio03_dir<<3) + \
(PLT2_gpio04_dir<<4) + (PLT2_gpio05_dir<<5) + (PLT2_gpio06_dir<<6) + (PLT2_gpio07_dir<<7) + \
(PLT2_gpio08_dir<<8) + (PLT2_gpio09_dir<<9) + (PLT2_gpio10_dir<<10)+ (PLT2_gpio11_dir<<11)+ \
(PLT2_gpio19_dir<<19)+ \
(PLT2_gpio20_dir<<20)+ (PLT2_gpio21_dir<<21)+ (PLT2_gpio22_dir<<22)+ (PLT2_gpio23_dir<<23)+ \
(PLT2_gpio24_dir<<24)+ (PLT2_gpio25_dir<<25)+ (PLT2_gpio26_dir<<26)+ (PLT2_gpio27_dir<<27);
#define PLT2_GPBDIR (PLT2_gpio32_dir )+ (PLT2_gpio33_dir<<1) + (PLT2_gpio34_dir<<2 )+ \
(PLT2_gpio48_dir<<16)+ (PLT2_gpio49_dir<<17)+ (PLT2_gpio50_dir<<18)+ (PLT2_gpio51_dir<<19)+ \
(PLT2_gpio52_dir<<20)+ (PLT2_gpio53_dir<<21)+ \
(PLT2_gpio58_dir<<26)+ (PLT2_gpio59_dir<<27)+ \
(PLT2_gpio60_dir<<28)+ (PLT2_gpio61_dir<<29)+ (PLT2_gpio62_dir<<30)+ (PLT2_gpio63_dir<<31);
#define SHKF_GPADIR (SHKF_gpio00_dir ) + (SHKF_gpio01_dir<<1) + (SHKF_gpio02_dir<<2) + (SHKF_gpio03_dir<<3) + \
(SHKF_gpio04_dir<<4) + (SHKF_gpio05_dir<<5) + (SHKF_gpio06_dir<<6) + (SHKF_gpio07_dir<<7) + \
(SHKF_gpio08_dir<<8) + (SHKF_gpio09_dir<<9) + (SHKF_gpio10_dir<<10)+ (SHKF_gpio11_dir<<11)+ \
(SHKF_gpio19_dir<<19)+ \
(SHKF_gpio20_dir<<20)+ (SHKF_gpio21_dir<<21)+ (SHKF_gpio22_dir<<22)+ (SHKF_gpio23_dir<<23)+ \
(SHKF_gpio24_dir<<24)+ (SHKF_gpio25_dir<<25)+ (SHKF_gpio26_dir<<26)+ (SHKF_gpio27_dir<<27);
#define SHKF_GPBDIR (SHKF_gpio32_dir )+ (SHKF_gpio33_dir<<1) + (SHKF_gpio34_dir<<2 )+ \
(SHKF_gpio48_dir<<16)+ (SHKF_gpio49_dir<<17)+ (SHKF_gpio50_dir<<18)+ (SHKF_gpio51_dir<<19)+ \
(SHKF_gpio52_dir<<20)+ (SHKF_gpio53_dir<<21)+ \
(SHKF_gpio58_dir<<26)+ (SHKF_gpio59_dir<<27)+ \
(SHKF_gpio60_dir<<28)+ (SHKF_gpio61_dir<<29)+ (SHKF_gpio62_dir<<30)+ (SHKF_gpio63_dir<<31);
#define LOAD_GPADIR (LOAD_gpio00_dir ) + (LOAD_gpio01_dir<<1) + (LOAD_gpio02_dir<<2) + (LOAD_gpio03_dir<<3) + \
(LOAD_gpio04_dir<<4) + (LOAD_gpio05_dir<<5) + (LOAD_gpio06_dir<<6) + (LOAD_gpio07_dir<<7) + \
(LOAD_gpio08_dir<<8) + (LOAD_gpio09_dir<<9) + (LOAD_gpio10_dir<<10)+ (LOAD_gpio11_dir<<11)+ \
(LOAD_gpio19_dir<<19)+ \
(LOAD_gpio20_dir<<20)+ (LOAD_gpio21_dir<<21)+ (LOAD_gpio22_dir<<22)+ (LOAD_gpio23_dir<<23)+ \
(LOAD_gpio24_dir<<24)+ (LOAD_gpio25_dir<<25)+ (LOAD_gpio26_dir<<26)+ (LOAD_gpio27_dir<<27);
#define LOAD_GPBDIR (LOAD_gpio32_dir )+ (LOAD_gpio33_dir<<1) + (LOAD_gpio34_dir<<2 )+ \
(LOAD_gpio48_dir<<16)+ (LOAD_gpio49_dir<<17)+ (LOAD_gpio50_dir<<18)+ (LOAD_gpio51_dir<<19)+ \
(LOAD_gpio52_dir<<20)+ (LOAD_gpio53_dir<<21)+ \
(LOAD_gpio58_dir<<26)+ (LOAD_gpio59_dir<<27)+ \
(LOAD_gpio60_dir<<28)+ (LOAD_gpio61_dir<<29)+ (LOAD_gpio62_dir<<30)+ (LOAD_gpio63_dir<<31);
//===========================================================================
// No more.
//===========================================================================

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Source/Internal/Include/RS485.h Normal file
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/****************************************************************/
/* TMS320C32 */
/* ====== BIOS, ÊËÀÈÍ, ÊËÂÑÏ ====== */
/* ÖÍÈÈ ÑÝÒ (ñ) 1998-2000 ã. */
/****************************************************************
RS485.h
****************************************************************
* Ïðîöåäóðû ðàáîòû ñ UART *
****************************************************************/
#ifndef _RS485
#define _RS485
#ifdef __cplusplus
extern "C" {
#endif
//#include "DSP2833x_Device.h" // DSP281x Headerfile Include File
//#include "DSP2833x_Sci.h"
//#include "cntrl_adr.h"
//#include "params.h"
#define COM_1 1
#define COM_2 2
#define MAX_RECEIVE_LENGTH 400 // 80 //150
#define MAX_SEND_LENGTH 400 //150
#define TIME_WAIT_RS_BYTE_OUT 1000
#define TIME_WAIT_RS_LOST_BYTE 100
#define RS_TIME_OUT (SECOND*10)
#define Rec_Bloc_Begin 0x200000
#define Rec_Bloc_End 0x2F0000
#define Rec_Bloc_Length (Rec_Bloc_End-Rec_Bloc_Begin)
/* Message RS declaration */
typedef struct
{
volatile struct SCI_REGS *SciRegs;
unsigned int commnumber; // Íîìåð ïîðòà
unsigned long RS_Length; // Äëèíà ïàêåòà
unsigned int *pRS_RecvPtr; // Áóôåð ïðèåìà
unsigned int *pRS_SendPtr; // Áóôåð ïîñûëêè
unsigned int *pRecvPtr;
unsigned int RS_PrevCmd; // Ïðåäûäóùàà êîììàíäà
unsigned int RS_Cmd; // Òåêóùàà êîììàíäà
unsigned int RS_Header[MAX_RECEIVE_LENGTH]; // Çàãîëîâîê
unsigned int flag_TIMEOUT_to_Send; // Ôëàã îæèäàíèà òàéìàóòà íà îòñûëêó
unsigned int flag_TIMEOUT_to_Receive; // Ôëàã îæèäàíèà òàéìàóòà íà ïðèåì
unsigned int RS_DataReady; // Ôëàã ãîòîâíîñòè RS äàííûõ
unsigned int buffer[MAX_SEND_LENGTH]; // Áóôåð äëà îòñûëêè ïî RS
unsigned int addr_answer; // àäðåñ êóäà îòâå÷àòü â ðåæèìå âåäóùåãî
unsigned int addr_recive; // àäðåñ ïî êîòîðîìó íàñ çàïðîñèëè
unsigned int flag_LEADING; // Ôëàã ðåæèìà êîíòðîëëåðà (ïî óìîë÷àíèþ âåäîìûé)
unsigned long RS_RecvLen;
unsigned long RS_SLength; // Äëèíà ïàêåòà äëà ïîñûëêè
unsigned long RS_SendLen; // Êîëè÷åñòâî áàéò óæå ïåðåäàëè
char RS_SendBlockMode; // Ðåæèì ïåðåäà÷è
char RS_Flag9bit; // äëà RS485????????
int BS_LoadOK; // Ôëàã óñïåøíîñòè ïðèåìà áëîêà
int RS_FlagBegin;
int RS_HeaderCnt;
int RS_FlagSkiping;
unsigned long curr_baud;
unsigned long time_wait_rs_out;
} RS_DATA;
extern RS_DATA rs_a,rs_b;
extern unsigned int
RS_Len[70]; /* Äåéñòâèòåëüíàà äëèíà êîìàíäû (îòëàäî÷íîé) + 1 */
interrupt void RSA_RX_Handler(void);
interrupt void RSA_TX_Handler(void);
interrupt void RSB_RX_Handler(void);
interrupt void RSB_TX_Handler(void);
/* èíèöèëèçàöèà ïåðåìåííûõ rs_a,rs_b*/
void create_uart_vars(char size_cmd15);
/** Ïîâòîðíàà èíèöèàëèçàöèà ïîñëåäîâàòåëüíîãî ïîðòà, èñïîëüçóåòñà ïîñëå ïîäâèñà */
/** Íàñòðîéêà ðåæèìà ïðèåìà/ïåðåäà÷è */
void RS_SetBitMode(RS_DATA *rs_arr, int n);
/** Ïîñûëêà áëîêà áàéòîâ.
Ïîñûëàåò ìàññèâà 32-áèòíûõ öåëûõ ÷èñåë ñòàðøèå áèòû äîëæíû áûòü 0.
@precondition Ðàáîòà ô-öèè çàâèñèò îò ìàêðî RS_TRANSMIT_INTR
@param buf àäðåñ ìàññèâà
@param len êîëè÷åñòâî áàéò
@see RS_BSend, RS_TRANSMIT_INTR
*/
int RS_Send(RS_DATA *rs_arr,unsigned int *pBuf, unsigned long len);
/** Ïîñûëêà áëîêà óïàêîâàííûõ áàéòîâ.
@precondition Ðàáîòà ô-öèè çàâèñèò îò ìàêðî RS_TRANSMIT_INTR
@param buf àäðåñ ìàññèâà
@param len êîëè÷åñòâî 8-áèòíûõ áàéò
@see RS_Send, RS_TRANSMIT_INTR
*/
int RS_BSend(RS_DATA *rs_arr,unsigned int *pBuf, unsigned long len);
/** Èíèöèàëèçàöèà ïîñëåäîâàòåëüíîãî ïîðòà */
void setup_uart(char commnumber,unsigned long speed_baud); /* speed_baud - ñêîðîñòü ëèíèè â áîäàõ */
void RS_SetLineMode(RS_DATA *rs_arr, int bit, char parity, int stop);
void RS_SetLineSpeed(RS_DATA *rs_arr, unsigned long speed);
// Transmit a character from the SCI'
#define SCI_send(x,y) x->SciRegs->SCITXBUF=(unsigned char)(y)
// Îæèäàíèå çàâåðøåíèà ïåðåäà÷è UART
// wait for TRDY =1 for empty state
#define RS_Wait4OK(x) while(!(x->SciRegs->SCICTL2.bit.TXEMPTY))
/** Ïåðåêëþ÷åíèå ëèíèè íà ïðèåì */
#define RS_Line_to_receive(x) if(x->commnumber==COM_2) GpioDataRegs.GPBDAT.bit.GPIO34 = 1;
/** Ïåðåêëþ÷åíèå ëèíèè íà ïåðåäà÷ó */
#define RS_Line_to_send(x) if(x->commnumber==COM_2) GpioDataRegs.GPBDAT.bit.GPIO34 = 0;
/** Ðàçðåøåíèå ïðåðûâàíèé ïî ïîëó÷åíèþ ñèìâîëà è îøèáêàì îò UART */
#define enableUARTInt(x) x->SciRegs->SCICTL2.all=2
#define enableUARTIntW(x) x->SciRegs->SCICTL2.all=1
void clear_timer_rs_live(RS_DATA *rs_arr);
void test_rs_live(RS_DATA *rs_arr);
#ifdef __cplusplus
}
#endif
#endif /* _RS485 */

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/****************************************************************/
/* TMS320C32 */
/* ====== BIOS, ÊËÀÈÍ, ÊËÂÑÏ ====== */
/* ÖÍÈÈ ÑÝÒ (ñ) 1998-2000 ã. */
/****************************************************************/
/* Bios_dsp.h */
/****************************************************************/
/* Îñíîâíûå êîììàíäû BIOS */
/****************************************************************/
#ifndef _BIOS_DSP
#define _BIOS_DSP
#ifdef __cplusplus
extern "C" {
#endif
#define BM_PACKED 1
#define BM_CHAR32 0
#define CHIEF 1
#define SLAVE 0
#define ADR_FOR_SPECIAL 0x100
#define CMD_MODBUS_3 3
#define ANS_MODBUS_3 4
#define CMD_MODBUS_15 5
#define CMD_MODBUS_6 6
#define ANS_MODBUS_6 7
#define CMD_MODBUS_16 16
/*
CMD_MODBUS_3 = 3,
ANS_MODBUS_3 = 4,
CMD_MODBUS_15 = 5,
CMD_MODBUS_6 = 6,
ANS_MODBUS_6 = 7,
CMD_MODBUS_16 = 16,
*/
enum {
CMD_LOAD=51, CMD_UPLOAD, CMD_RUN, CMD_XFLASH, CMD_TFLASH,
CMD_PEEK, CMD_POKE, CMD_INITLOAD, CMD_INIT,CMD_EXTEND,
CMD_VECTOR=61,
CMD_IMPULSE,
/* ñòàíäàðòíûå êîìàíäû */
CMD_STD=65, CMD_STD_ANS
};
enum {false=0, true};
/** Âîçâðàùàåò íîìåð êîììàíäû, åñëè åñòü èëè -1 åñëè òðàíçàêöèé íå áûëî */
int get_command(RS_DATA *rs_arr);
/** Ñòàíäàðòíûé îòâåò, áåç ïàðàìåòðîâ */
void Answer(RS_DATA *rs_arr,int n);
/* íà÷àëüíûå óñòàíîâêè (íå ðàáîòàåò)*/
void init(RS_DATA *rs_arr);
/**@name Êîììàíäû
* Êîììàíäû, âûçûâàåìûå ÷åðåç ïîñëåäîâàòåëüíûé êàíàë*/
//@{
/** Èíèöèèðîâàòü çàãðóçêó áëîêà.
Íàñòðàèâàåò ïðèåì áëîêà äàííûõ */
void initload(RS_DATA *rs_arr);
/** Çàãðóçêà áëîêà.
Âûçûâàåòñà ïîñëå çàãðóçêè áëîêà ÷åðåç RS */
void load(RS_DATA *rs_arr);
/** Âûïîëíèòü ïðîãðàììó â ôîðìàòå Serial Boot.
@precondition Äîëæíà áûòü ïðîèçâåäåíà çàãðóçêà áëîêà
Àäðåñ ïðîãðàììû áåðåòñà èç çàãîëîâêà è
ñðàâíèâàåòñà ñ ïåðåìåííîé RecvPtr, çàïîëíàåìîé â ô-öèè load
@see load */
void run (RS_DATA *rs_arr);
/** Ïðî÷èòàòü à÷åéêó ïàìàòè */
void peek(RS_DATA *rs_arr);
/** Çàïèñàòü â à÷åéêó ïàìàòè */
void poke(RS_DATA *rs_arr);
/** Ïåðåäàòü áëîê ïàìàòè */
void upload(RS_DATA *rs_arr);
/** Ïðîøèòü XILINX.
@precondition Äîëæíà áûòü ïðîèçâåäåíà çàãðóçêà áëîêà
Àäðåñ è äëèíà ïðîøèâêè áåðåòñà èç çàãîëîâêà è
ñðàâíèâàåòñà ñ ïåðåìåííûìè RecvPtr è Length, çàïîëíàåìûìè â ô-öèè load,
òàê æå ñìîòðèò ìàãè÷åñêîå ñëîâî â íà÷àëå ïðîøèâêè
@see load */
void xflash(RS_DATA *rs_arr);
/** Ïðîøèòü TMS.
@precondition Äîëæíà áûòü ïðîèçâåäåíà çàãðóçêà áëîêà
Àäðåñ è äëèíà ïðîøèâêè áåðåòñà èç çàãîëîâêà è
ñðàâíèâàåòñà ñ ïåðåìåííûìè RecvPtr è Length, çàïîëíàåìûìè â ô-öèè load
@see load */
void tflash(RS_DATA *rs_arr);
/* ðàñøèðåííûå êîìàíäû äëà áèîñà */
void extendbios(RS_DATA *rs_arr);
void write_memory(unsigned long addr, unsigned int data);
unsigned int read_memory(unsigned long addr);
//@}
#ifdef __cplusplus
}
#endif
#endif/* _BIOS_DSP */

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#if BALSAM == 166 //-------------------------------------------------------------
int def_cal[][8] = {
// Ñèëîâîé UA1 UB1 UA2 UB2 300 1 300 2 400 1 400 2
4936, 4877, 4972, 4857, 1960, 1920, 2610, 2570, // Áîðò 0
4876, 5005, 4876, 4847, 1950, 1965, 2600, 2615, // Áîðò 1
// ÓÌÏ UA UC IA IC 20mA O 4mA O 20mA I 4mA I
3820, 3790, 3505, 3380, 1718, 673, 854, 14, // Áîðò 0
3810, 3775, 3522, 3332, 1697, 653, 860, 17, // Áîðò 1
// ÂÝÏ 380Ô1 380Ô2 300 1 300 2 400 1 400 2
1281, 1272, 0, 0, 2049, 2050, 2749, 2750 };
#endif //---------------------------------------------------------------------
/*
#if PXXXXX == 1 //-------------------------------------------------------------
int def_cal[][6] = {
// Ñèëîâîé UA1 UB1 UA2 UB2 300 1 300 2 400 1 400 2
0400, 0400, 0400, 0400, 1950, 1950, 2600, 2600, // Áîðò 0
0400, 0400, 0400, 0400, 1950, 1950, 2600, 2600, // Áîðò 1
// ÓÌÏ UA UC IA IC 20mA 4mA
0400, 0400, 4800, 4800, 0, 0, 0, 0, // Áîðò 0
0400, 0400, 4800, 4800, 0, 0, 0, 0, // Áîðò 1
// ÂÝÏ 380Ô1 380Ô2 300 1 300 2 400 1 400 2
1270, 1270, 0, 0, 1950, 1950, 2600, 2600 };
#endif //---------------------------------------------------------------------
*/

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/****************************************************************/
/* TMS320C32 */
/* ====== BIOS, ÊËÀÈÍ, ÊËÂÑÏ ====== */
/* ÖÍÈÈ ÑÝÒ (ñ) 1998-2000 ã. */
/****************************************************************
cntrl_adr.h
****************************************************************
* Àäðåñ êîíòðîëëåðà *
****************************************************************/
#ifndef _CNTRL_ADR
#define _CNTRL_ADR
#ifdef __cplusplus
extern "C" {
#endif
/** àäðåñ êîíòðîëëåðà äëà ïîñûëêè âñåì ÀÈÍàì */
extern int ADDR_FOR_ALL;
/** àäðåñ êîíòðîëëåðà äëà ïîñûëêè îòâåòà */
extern const int ADDR_ANSWER;
/** àäðåñà òåðìèíàëà äëà ïîñûëêè îòâåòà */
extern const int ADDR_TERMINAL;
/* Àäðåñ êîíòðîëëåðà */
extern int CNTRL_ADDR;
/* Óíèâåðñàëüíûé àäðåñ êîíòðîëëåðà */
extern const int CNTRL_ADDR_UNIVERSAL;
/** Óñòàíîâêà àäðåñà êîíòðîëëåðà äëà ïðîøèâêè */
void set_cntrl_addr (int cntrl_addr,int cntrl_addr_for_all);
extern int cntr_addr_c;
extern int cntr_addr_c_all;
#ifdef __cplusplus
}
#endif
#endif /* _CNTRL_ADR */

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typedef unsigned short WORD;
typedef unsigned char byte;
unsigned int get_crc_ccitt(unsigned int crc, unsigned int *buf, unsigned long size );
unsigned int get_crc_16(unsigned int crc,unsigned int *buf,unsigned long size );
unsigned int get_crc_16b(unsigned int crc,unsigned int *buf,unsigned long size );
int get_crc16(unsigned int *buf, int size );

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void InitCan(int Port, int DevNum);
void CAN_send(int Port, int data[], int Addr);
extern int CAN_input_data[];

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#ifndef _FILTER_BAT2
#define _FILTER_BAT2
#ifdef __cplusplus
extern "C" {
#endif
#define K1_FILTER_BATTER2_1HZ 0.0000096
#define K2_FILTER_BATTER2_1HZ 1.94468056
#define K3_FILTER_BATTER2_1HZ -0.94471895
#define K1_FILTER_BATTER2_3HZ 0.00008766
#define K2_FILTER_BATTER2_3HZ 1.97347532
#define K3_FILTER_BATTER2_3HZ -0.97382594
#define K1_FILTER_BATTER2_5HZ 0.00024135
#define K2_FILTER_BATTER2_5HZ 1.95581276
#define K3_FILTER_BATTER2_5HZ -0.95677816
#define K1_FILTER_BATTER2_10HZ 0.00094411
#define K2_FILTER_BATTER2_10HZ 1.91126422
#define K3_FILTER_BATTER2_10HZ -0.91504065
typedef struct { float k_0;
float k_1;
float k_2;
float i_0;
float i_1;
float i_2;
float u_0;
float u_1;
float u_2;
} FILTERBAT;
#define DEF_FILTERBAT { K1_FILTER_BATTER2_10HZ, \
K2_FILTER_BATTER2_10HZ, \
K3_FILTER_BATTER2_10HZ, \
0,0,0,0,0,0}
float filterbat(FILTERBAT *b, float InpVarCurr);
#ifdef __cplusplus
}
#endif
#endif /* _FILTER_BAT2 */

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void kanal_Send(int adr, long dat, int dot);

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/****************************************************************/
/* TMS320C32 */
/* ====== BIOS, ÊËÀÈÍ, ÊËÂÑÏ ====== */
/* ÖÍÈÈ ÑÝÒ (ñ) 1998-2001ã. */
/****************************************************************/
/* log_to_mem.h
****************************************************************
* Çàïèñü ëîãîâ â ïàìyòü *
****************************************************************/
#ifndef _LOG_TO_MEM
#define _LOG_TO_MEM
#ifdef __cplusplus
extern "C" {
#endif
/* Îïðåäåëåíèa äëa ðàáîòû ëîããåðà */
#define LOG_PAGE_START 0x0200000
#define LOG_PAGE_LEN 0xFA00
extern int no_write, never_write; // Ôëàãè, ÷òîáû íå ïèñàòü (åñëè ÷òî)
typedef struct
{
unsigned long Start;
unsigned long Finis;
unsigned long Adres;
unsigned int Circl;
} LOG;
extern LOG Log;
/* Çàïèñü ñëîâa â ïàìàòü, ãäå ëîãè ëåæàò */
#define Log_to_mem(x) *(int *)(Log.Adres++) = x
/* Ïðîâåðêà ãðàíèöû ïàìàòè äëà ëîãîâ */
#define Test_mem_limit(x) if(Log.Adres > (Log.Finis - (x))) Log.Adres = Log.Start
/* Î÷èñòêà ïàìàòè (îáíóëåíèå) */
void clear_mem();
#ifdef __cplusplus
}
#endif
#endif /* _LOG_TO_MEM */

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// âãâ
#ifndef _MEASURE
#define _MEASURE
interrupt void cpu_timer1_isr_SENS(void);
void Init_sensors(void);
void Init_sensors_more(void);
void Init_packMask(void);
void Temper_count(int chan);
void Current_count(int chan);
void Power_count(int chan);
void calc_sensor_koef(void);
void Is_Voltage_Hi(void);
void calc_volta_edge(void);
int er_anal(int term, long * count, long edge, int pre);
typedef union
{
struct
{
unsigned int Tear :1;
unsigned int res :1;
unsigned int Wry :1;
unsigned int Out :1;
unsigned int Over :1;
unsigned int Hyper :1;
unsigned int Contr :1;
unsigned int res2 :1;
unsigned int Stop :1;
unsigned int Ready :1;
unsigned int Discr1 :1;
unsigned int Discr2 :1;
unsigned int Discr3 :1;
unsigned int Discr4 :1;
unsigned int Ignor :1;
unsigned int Bypas :1;
} bit;
unsigned int all;
} ERROR;
typedef union
{
struct
{
unsigned int Error :1;
unsigned int Alarm :1;
unsigned int OverHeat :1;
unsigned int SubHeat :1;
unsigned int OutHeat :1;
unsigned int Test_lamp :1;
} bit;
unsigned int all;
} FLAG;
#define NOER 0xC000
#define EROR 0x01FF
#define READY_FREQ (500.0 * 2)// Ãö
#define BLINK_FREQ 2 // Ãö
#define BLINK_TIME (READY_FREQ / BLINK_FREQ)
#define CANPOWSE 20
#define ADC_FREQ 3750 //3885.0//777//2000//20000 //777 //3885 // Ãö (777*5)
#define DAC_FREQ 200//5 // Ãö
#define LOAD_TIME 30//15 // sec
extern unsigned int Caliber_time;
#define SENS_ERR_WAIT 10
#define maximum_bright 10
#define Pi 3.1415926535897932384626433832795
#define Pi_2 1.5707963267948966192313216916398
#define ZERO 27
#define Cooling 5 // (°Ñ) Ãèñòåðåçèñ ïî ñíàòèþ ïåðåãðåâà
#define COSPi6 0.86602540378443864676372317075294
#define RADIX2 1.4142135623730950488016887242097
#define POWER_380 0 // ïèòàíèå 380Â
#define POWER_38O 1 // ïèòàíèå 380Â
#define CURRENT 2 // òîê
#define VOLTAGE 3 // íàïðàæåíèå
#define POWER_31 4 // ïèòàíèå 31Â
#define POWER_27 5 // ïèòàíèå 24Â
#define POWER_24 6 // ïèòàíèå 24Â
#define POWER_15 7 // ïèòàíèå 15Â
#define TERMO_AD 8 // òåðìîäàò÷èê ìåëêîñõåìà
extern int TPL_CANS,tpl_cans;
extern int READY, WAKE;
extern FILTERBAT filter[];
extern FILTERBAT adc_filter[];
extern FILTERBAT out_filter[];
extern int sens_type[];
extern unsigned long Lonely;
extern unsigned int CanPowse,CanGO;
extern unsigned int Maska[][8];
#endif //_MEASURE

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#ifndef MESSAGE_H
#define MESSAGE_H
typedef unsigned char CHAR;
#define ANSWER_LEN 0x80 //70 // 16+16+16+16+6
#define REPLY_LEN 0x19
#define byte_hi byte_1
#define byte_lo byte_0
typedef struct
{
unsigned char Address; // Àäðåñ êîíòðîëëåðà
unsigned char Number; // Íîìåð êîìàíäû
BAITE byte0;
BAITE byte1;
BAITE byte2;
BAITE byte3;
BAITE byte4;
BAITE byte5;
BAITE byte6;
BAITE byte7;
unsigned char crc_lo;
unsigned char crc_hi;
unsigned char add_byte;
} CMD_TO_TMS;
extern int modbus[];
void ReceiveCommandModbus3(RS_DATA *rs_arr);
void ReceiveCommandModbus6(RS_DATA *rs_arr);
void Save_params(void);
void Load_params(void);
void Default_params(void);
#endif //MESSAGE_H

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#ifndef PACKAGE
#define PACKAGE
#define BALSAM 166
#define ONBOARDCALIBER
#define TERMOPAIR 14
#define CURRENTOS (TERMOPAIR*2)
//-----------------------------------------------
#define adr_TRN1 1
#define adr_TRN2 2
#define adr_POW1 3
#define adr_POW2 4
#define adr_LOA1 5
#define adr_LOA2 6
#define adr_ENG1 7
#define adr_PLT3 8
#define adr_SHKF 9
//-------------------
#define adr_REC1 0xff
#define adr_REC2 0xff
#define adr_INV1 0xff
#define adr_INV2 0xff
#define adr_BRK1 0xff
#define adr_BRK2 0xff
#define adr_ENG2 0xff
#define adr_PLT1 0xff
#define adr_PLT2 0xff
#define adr_DSTR 0xff
//-----------------------------------------------
#define dsk_COMM 1
#define dsk_BKSD 2
#define dsk_BKST 3
#define dsk_EPLT 4
#define dsk_SHKF 5
#define dsk_LOAD 6
//-----------------------------------------------
//-----------------------------------------------
#define TPL_TRN 10
#define TPL_POW 8
#define TPL_ENG 8
#define TPL_SHK 15
//-----------------------------------------------
#define Modbus ((WORDE *)modbus)
#define start_error 0x00
#define start_data 0x18
#define start_hi_edge 0x30
#define start_lo_edge 0x48
#define sens_error ((ERROR *)(modbus+start_error))
#define sens_data (modbus+start_data)
#define sens_hi_edge (modbus+start_hi_edge)
#define sens_lo_edge (modbus+start_lo_edge)
#define InputRep0 Modbus[0].bit.bitA
#define InputRep1 Modbus[0].bit.bitB
#define InputRep2 Modbus[0].bit.bitC
#define Inputs Modbus[0x10]
#define Buttons Modbus[0x16]
#define Jumpers modbus[0x17]
#define bTestLamp Buttons.bit.bit0
#define bSecretBt Buttons.bit.bit1
#define bTermoCal Buttons.bit.bit2
#define Cancount (modbus+0x60) // ïàóçà ìåæäó I ïîñûëêàìè CAN
#define Bright (modbus+0x62) // àðêîñòü ñèãíàëüíûõ ëàìïî÷åê
#define Brightness modbus[0x62] // àðêîñòü ñèãíàëüíûõ ëàìïî÷åê
#define m_FAST 0
#define m_SLOW 1
#define Zero_lev (modbus+0x70)
#define DAC_20 modbus[0x6E]
#define DAC_04 modbus[0x6F]
#define DAC_max() modbus[0x78] // 751//0x0000 804
#define DAC_min() modbus[0x79] // 2162//0x0FFF 2373
#define DAC_cal() modbus[0x7A]
#define Caliber (modbus+0x74)
#define K380_1 Caliber[0]
#define K380_2 Caliber[1]
#define KPOW_1 Caliber[0]
#define KPOW_2 Caliber[1]
#define KPOW_3 Caliber[2]
#define KPOW_4 Caliber[3]
#define NormaU Caliber[8]
#define DeltaU Caliber[9]
#define TCaliber (modbus+0x78)
#define K300_1 TCaliber[0]
#define K300_2 TCaliber[1]
#define K400_1 TCaliber[2]
#define K400_2 TCaliber[3]
#define K100_1 TCaliber[0]
#define K100_2 TCaliber[1]
#define K150_1 TCaliber[2]
#define K150_2 TCaliber[3]
#define K100_D TCaliber[0]
#define K150_D TCaliber[1]
#define LastMode Modbus[126].all
#define Commands Modbus[127].all
#define cTestLamp Modbus[127].bit.bit0
#define cDefParam Modbus[127].bit.bit1
#define cSaveParam Modbus[127].bit.bit2
#define cLoadParam Modbus[127].bit.bit3
#define cTermoCal Modbus[127].bit.bit4
#define cKoefCalc Modbus[127].bit.bit5
#define cUMPreset Modbus[127].bit.bit6
#define cUMPstart Modbus[127].bit.bit7
#define cInitDac Modbus[127].bit.bit8
#define cCalibrDac Modbus[127].bit.bit9
#define cSecretBt Modbus[127].bit.bitA
#define cLiteFire Modbus[127].bit.bitB
#define cRawMeat Modbus[127].bit.bitC
#define cReset Modbus[127].bit.bitF
#endif //PACKAGE

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#include "DSP2833x_Device.h" // DSP281x Headerfile Include File
extern int Mode,Desk,TermoAD,TermoRS,TermoSW,Kurrent,Kalibro;
void setup_leds_line(void);
#define led1_toggle() GpioDataRegs.GPBTOGGLE.bit.GPIO32=1
#define led2_toggle() GpioDataRegs.GPBTOGGLE.bit.GPIO48=1
#define led1_off() GpioDataRegs.GPBSET.bit.GPIO32=1
#define led2_off() GpioDataRegs.GPBSET.bit.GPIO48=1
#define led1_on() GpioDataRegs.GPBCLEAR.bit.GPIO32=1
#define led2_on() GpioDataRegs.GPBCLEAR.bit.GPIO48=1
// READY ---------------------------------------------------------
static inline void dat_READY(int x)
{ if(Desk==dsk_LOAD) GpioDataRegs.GPBDAT.bit.GPIO61=!x; else
GpioDataRegs.GPBDAT.bit.GPIO59=!x; }
static inline void set_READY(void)
{ if(Desk==dsk_LOAD) GpioDataRegs.GPBCLEAR.bit.GPIO61=1; else
GpioDataRegs.GPBCLEAR.bit.GPIO59=1; }
static inline void clear_READY(void)
{ if(Desk==dsk_LOAD) GpioDataRegs.GPBSET.bit.GPIO61=1; else
GpioDataRegs.GPBSET.bit.GPIO59=1; }
static inline void toggle_READY(void)
{ if(Desk==dsk_LOAD) GpioDataRegs.GPBTOGGLE.bit.GPIO61=1;else
GpioDataRegs.GPBTOGGLE.bit.GPIO59=1;}
// LED OUT 1 -----------------------------------------------------
static inline void dat_LED_OUT_1(int x)
{ if(Desk==dsk_BKST || Desk==dsk_COMM)
GpioDataRegs.GPBDAT.bit.GPIO60=!x; else
if(Desk==dsk_LOAD) GpioDataRegs.GPADAT.bit.GPIO7=!x; else
GpioDataRegs.GPBDAT.bit.GPIO60=x; }
static inline void set_LED_OUT_1(void)
{ if(Desk==dsk_BKST || Desk==dsk_COMM)
GpioDataRegs.GPBCLEAR.bit.GPIO60=1; else
if(Desk==dsk_LOAD) GpioDataRegs.GPACLEAR.bit.GPIO7=1; else
GpioDataRegs.GPBSET.bit.GPIO60=1; }
static inline void clear_LED_OUT_1(void)
{ if(Desk==dsk_BKST || Desk==dsk_COMM)
GpioDataRegs.GPBSET.bit.GPIO60=1; else
if(Desk==dsk_LOAD) GpioDataRegs.GPASET.bit.GPIO7=1; else
GpioDataRegs.GPBCLEAR.bit.GPIO60=1; }
static inline void toggle_LED_OUT_1(void)
{ if(Desk==dsk_LOAD) GpioDataRegs.GPATOGGLE.bit.GPIO7=1; else
GpioDataRegs.GPBTOGGLE.bit.GPIO60=1;}
// LED OUT 2 -----------------------------------------------------
static inline void dat_LED_OUT_2(int x)
{ if(Desk==dsk_LOAD) GpioDataRegs.GPADAT.bit.GPIO1=!x; else
if(Desk==dsk_BKST) GpioDataRegs.GPBDAT.bit.GPIO62=!x; else
if(Desk==dsk_COMM) GpioDataRegs.GPBDAT.bit.GPIO63=!x; else
GpioDataRegs.GPBDAT.bit.GPIO63=x; }
static inline void set_LED_OUT_2(void)
{ if(Desk==dsk_LOAD) GpioDataRegs.GPACLEAR.bit.GPIO1=1; else
if(Desk==dsk_BKST) GpioDataRegs.GPBCLEAR.bit.GPIO62=1; else
if(Desk==dsk_COMM) GpioDataRegs.GPBCLEAR.bit.GPIO63=1; else
GpioDataRegs.GPBSET.bit.GPIO63=1; }
static inline void clear_LED_OUT_2(void)
{ if(Desk==dsk_LOAD) GpioDataRegs.GPASET.bit.GPIO7=1; else
if(Desk==dsk_BKST) GpioDataRegs.GPBSET.bit.GPIO62=1; else
if(Desk==dsk_COMM) GpioDataRegs.GPBSET.bit.GPIO63=1; else
GpioDataRegs.GPBCLEAR.bit.GPIO63=1; }
static inline void toggle_LED_OUT_2(void)
{ if(Desk==dsk_LOAD) GpioDataRegs.GPATOGGLE.bit.GPIO1=1; else
if(Desk==dsk_BKST) GpioDataRegs.GPBTOGGLE.bit.GPIO62=1;else
GpioDataRegs.GPBTOGGLE.bit.GPIO63=1;}
// RES OUT 1 -----------------------------------------------------
static inline void dat_RES_OUT_1(int x)
{
if(Desk==dsk_LOAD || Desk==dsk_EPLT)
GpioDataRegs.GPADAT.bit.GPIO9=!x; else
if(Desk==dsk_BKSD) GpioDataRegs.GPBDAT.bit.GPIO62=!x; else
GpioDataRegs.GPBDAT.bit.GPIO58=!x; }
static inline void set_RES_OUT_1(void)
{
if(Desk==dsk_LOAD || Desk==dsk_EPLT)
GpioDataRegs.GPACLEAR.bit.GPIO9=1; else
if(Desk==dsk_BKSD) GpioDataRegs.GPBCLEAR.bit.GPIO62=1; else
GpioDataRegs.GPBCLEAR.bit.GPIO58=1; }
static inline void clear_RES_OUT_1(void)
{
if(Desk==dsk_LOAD || Desk==dsk_EPLT)
GpioDataRegs.GPASET.bit.GPIO9=1; else
if(Desk==dsk_BKSD) GpioDataRegs.GPBSET.bit.GPIO62=1; else
GpioDataRegs.GPBSET.bit.GPIO58=1; }
static inline void toggle_RES_OUT_1(void)
{
if(Desk==dsk_LOAD || Desk==dsk_EPLT)
GpioDataRegs.GPATOGGLE.bit.GPIO9=1; else
if(Desk==dsk_BKSD) GpioDataRegs.GPBTOGGLE.bit.GPIO62=1;else
GpioDataRegs.GPBTOGGLE.bit.GPIO58=1;}
// RES OUT 2 -----------------------------------------------------
static inline void dat_RES_OUT_2(int x)
{ if(Desk==dsk_LOAD || Desk==dsk_EPLT)
GpioDataRegs.GPADAT.bit.GPIO3=!x; else
GpioDataRegs.GPBDAT.bit.GPIO61=x; }
static inline void set_RES_OUT_2(void)
{ if(Desk==dsk_LOAD || Desk==dsk_EPLT)
GpioDataRegs.GPACLEAR.bit.GPIO3=1; else
GpioDataRegs.GPBCLEAR.bit.GPIO61=1; }
static inline void clear_RES_OUT_2(void)
{ if(Desk==dsk_LOAD || Desk==dsk_EPLT)
GpioDataRegs.GPASET.bit.GPIO3=1; else
GpioDataRegs.GPBSET.bit.GPIO61=1; }
static inline void toggle_RES_OUT_2(void)
{ if(Desk==dsk_LOAD || Desk==dsk_EPLT)
GpioDataRegs.GPATOGGLE.bit.GPIO3=1; else
GpioDataRegs.GPBTOGGLE.bit.GPIO61=1;}
// START DPTB -----------------------------------------------------
static inline void dat_START_DPTB(int x)
{ GpioDataRegs.GPBDAT.bit.GPIO62=x; }
static inline void set_START_DPTB(void)
{ GpioDataRegs.GPBSET.bit.GPIO62=1; }
static inline void clear_START_DPTB(void)
{ GpioDataRegs.GPBCLEAR.bit.GPIO62=1; }
static inline void toggle_START_DPTB(void)
{ GpioDataRegs.GPBTOGGLE.bit.GPIO62=1;}
// STOP DPTB -----------------------------------------------------
static inline void dat_STOP_DPTB(int x)
{ GpioDataRegs.GPBDAT.bit.GPIO58=x; }
static inline void set_STOP_DPTB(void)
{ GpioDataRegs.GPBSET.bit.GPIO58=1; }
static inline void clear_STOP_DPTB(void)
{ GpioDataRegs.GPBCLEAR.bit.GPIO58=1; }
static inline void toggle_STOP_DPTB(void)
{ GpioDataRegs.GPBTOGGLE.bit.GPIO58=1;}
extern LONGE DigErr;
void select_tpl_canal(int n_tpl);
void get_Mode(void);
void get_Buttons(void);

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Source/Internal/Include/pulto.h Normal file
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//void what_is(void);
interrupt void cpu_timer1_isr_PULT(void);

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Source/Internal/Include/spise2p.h Normal file
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/*=====================================================================
File name : SPISE2P.H
Originator : Settu Duraisamy
C2000 Applications Team
Texas Instruments
Description :
Header file containing object definitions, proto type
declaration and default object initializers for
SPI Serial EEPROM driver using VSPI
Date : 30/6/2003 (DD/MM/YYYY)
=======================================================================*/
#ifndef __SPISE2P_H__
#define __SPISE2P_H__
// ¨ìêîñòü ïàìàòè â áàéòàõ
#define SEEPROM_LEN 0x10000
#define NULL 0
#define SIXTEEN_BIT 15
#define EIGHT_BIT 07
/***************************************************************/
/* Configurable Parameter for SPI bus Serial EEPROM */
/***************************************************************/
#define SPISE2P_DATA_WIDTH SIXTEEN_BIT//EIGHT_BIT
#define SPISE2P_ADDR_WIDTH SIXTEEN_BIT
#define SPIBAUD_REG_VAL 1//12
#define SPICLK_PHASE 1
#define SPICLK_POLARITY 0
#define SPIBAUD_RATE 100000
//10000000
/**************************************************************/
/**************************************************************/
/* Serial EEPROM Command words, left justified */
#define SPISE2P_READ_CMD 0x0300
#define SPISE2P_WRITE_CMD 0x0200
#define SPISE2P_WRDI_CMD 0x0400
#define SPISE2P_WREN_CMD 0x0600
#define SPISE2P_RDSR_CMD 0x0500
#define SPISE2P_WRSR_CMD 0x0100
#define SPISE2P_RDID_CMD 0x0A00
#define SPISE2P_DUMMY_DATA 0x0000
#define SPISE2P_BUSY_MASK 0x01
/* Symbolic constant for SPICCR to transfer 8bit or 16 bit value*/
#define SPISE2P_TFR16BIT 0x80|(SPICLK_POLARITY<<6)|SIXTEEN_BIT
#define SPISE2P_TFR8BIT 0x80|(SPICLK_POLARITY<<6)|EIGHT_BIT
/* Status valus */
#define SPISE2P_WRRQ 1 /* Write Requset */
#define SPISE2P_RDRQ 2 /* Read request */
#define SPISE2P_WRIP 4 /* Write in progress */
#define SPISE2P_RDIP 8 /* Read in progress */
/* Message declaration */
typedef struct {
unsigned int *dataPtr; /* Data pointer */
unsigned long nrData; /* number of data */
unsigned long se2pAddr; /* se2pAddr */
}SE2P_DATA;
/* Object declaration */
typedef struct {
SE2P_DATA *msgPtr;
unsigned int csr; /* control/status register */
void (*init)(void *);
void (*tick)(void *);
void (*csset)(void);
void (*csclr)(void);
}SPISE2P_DRV;
#define SPISE2P_DRV_DEFAULTS { NULL,\
0,\
(void (*)(void *))SPISE2P_DRV_init,\
(void (*)(void *))SPISE2P_DRV_tick,\
(void (*)(void))SPISE2P_DRV_csset,\
(void (*)(void))SPISE2P_DRV_csclr}
typedef SPISE2P_DRV *SPISE2P_DRV_handle;
void SPISE2P_DRV_init(SPISE2P_DRV * );
void SPISE2P_DRV_tick(SPISE2P_DRV *);
void SPISE2P_DRV_csset(void);
void SPISE2P_DRV_csclr(void);
unsigned int spiSe2pFree(SPISE2P_DRV *se2p);
void spiSe2pWrite(SPISE2P_DRV *se2p, SE2P_DATA *data);
void spiSe2pRead(SPISE2P_DRV *se2p, SE2P_DATA *data);
#if(SPISE2P_DATA_WIDTH==SIXTEEN_BIT)
#define PROM_LEN 0x8000
#define PAGE_LEN 0x20
#define WORD_LEN 2
#else
#define PROM_LEN 0x4000
#define PAGE_LEN 0x40
#define WORD_LEN 1
#endif
/* Óñòàíîâêà äðàéâåðà ñåðèàëüíîé EEPROM. **
** Èíèöèàëèçàöèà SPI è ïðî÷. Òàêæå íàñòðîéêà òàéìåðà. **
** Äðàéâåð ðàáîòàåò íà ïðåðûâàíèàõ îò òàéìåðà 2! */
void InitSeeprom(void);
/* Çàïèñü áëîêà â SEEPROM. Ïàðàìåòðû òàêîâû: **
** adres - àäðåñ â åïðîìêå, êóäà ïèñàòü. **
** adres = 0..0x8000, åñëè äëèíà ñëîâà 8 áèò **
** adres = 0..0x4000, åñëè äëèíà ñëîâà 16 áèò **
** buf - óêàçàòåëü íà ïàìàòü, îòêóäà ïèñàòü. **
** size - äëèíà áëîêà â áàéòàõ. Ïî-ëþáîìó â áàéòàõ! */
void Seeprom_write(unsigned int adres, unsigned int buf[], unsigned int size);
/* ×òåíèå áëîêà èç SEEPROM. Ïàðàìåòðû òàêîâû: **
** adres - àäðåñ â åïðîìêå, îòêóäà ÷èòàòü. **
** adres = 0..0x8000, åñëè äëèíà ñëîâà 8 áèò **
** adres = 0..0x4000, åñëè äëèíà ñëîâà 16 áèò **
** buf - óêàçàòåëü íà ïàìàòü, êóäà ÷èòàòü. **
** size - äëèíà áëîêà â áàéòàõ. Ïî-ëþáîìó â áàéòàõ! */
void Seeprom_read(unsigned int adres, unsigned int buf[], unsigned int size);
#endif

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Source/Internal/Include/tools.h Normal file
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#ifndef TOOLS_H
#define TOOLS_H
void init_zone7(void);
void pause_us(unsigned long t);
#endif //TOOLS_H

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/****************************************************************/
/* TMS320C32 */
/* ====== BIOS, ÊËÀÈÍ, ÊËÂÑÏ ====== */
/* ÖÍÈÈ ÑÝÒ (ñ) 1998-2000 ã. */
/****************************************************************
RS485.ñ
****************************************************************
* Ïðîöåäóðû ðàáîòû ñ UART *
****************************************************************/
//#include "big_dsp_module.h"
#include "DSP2833x_Device.h"
#include "DSP2833x_SWPrioritizedIsrLevels.h"
#include "RS485.h"
#include "bios_dsp.h"
#include "cntrl_adr.h"
#include "tools.h"
//#include "flash_tools.h"
RS_DATA rs_a,rs_b;
unsigned int RS_Len[70]={0};
static char size_cmd15=1;
void RS_RX_Handler(RS_DATA *rs_arr);
void RS_TX_Handler(RS_DATA *rs_arr);
/** Îáðàáîò÷èê ïðåðûâàíèé UART - ïðèíàòî */
interrupt void RSA_RX_Handler(void)
{
// Set interrupt priority:
volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER9.all;
IER |= M_INT9;
IER &= MINT9; // Set "global" priority
PieCtrlRegs.PIEIER9.all &= MG91; // Set "group" priority
PieCtrlRegs.PIEACK.all = 0xFFFF; // Enable PIE interrupts
EINT;
clear_timer_rs_live(&rs_a);
RS_RX_Handler(&rs_a);
// Restore registers saved:
DINT;
PieCtrlRegs.PIEIER9.all = TempPIEIER;
}
interrupt void RSB_RX_Handler(void)
{
// Set interrupt priority:
volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER9.all;
IER |= M_INT9;
IER &= MINT9; // Set "global" priority
PieCtrlRegs.PIEIER9.all &= MG93; // Set "group" priority
PieCtrlRegs.PIEACK.all = 0xFFFF; // Enable PIE interrupts
EINT;
clear_timer_rs_live(&rs_b);
RS_RX_Handler(&rs_b);
// Restore registers saved:
DINT;
PieCtrlRegs.PIEIER9.all = TempPIEIER;
}
interrupt void RSA_TX_Handler(void)
{
// Set interrupt priority:
volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER9.all;
IER |= M_INT9;
IER &= MINT9; // Set "global" priority
PieCtrlRegs.PIEIER9.all &= MG92; // Set "group" priority
PieCtrlRegs.PIEACK.all = 0xFFFF; // Enable PIE interrupts
EINT;
clear_timer_rs_live(&rs_a);
RS_TX_Handler(&rs_a);
// Restore registers saved:
DINT;
PieCtrlRegs.PIEIER9.all = TempPIEIER;
}
interrupt void RSB_TX_Handler(void)
{
// Set interrupt priority:
volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER9.all;
IER |= M_INT9;
IER &= MINT9; // Set "global" priority
PieCtrlRegs.PIEIER9.all &= MG94; // Set "group" priority
PieCtrlRegs.PIEACK.all = 0xFFFF; // Enable PIE interrupts
EINT;
clear_timer_rs_live(&rs_b);
RS_TX_Handler(&rs_b);
// Restore registers saved:
DINT;
PieCtrlRegs.PIEIER9.all = TempPIEIER;
}
/** Îáðàáîò÷èê ïðåðûâàíèé UART - ïðèíàòî */
void RS_RX_Handler(RS_DATA *rs_arr)
{
char Rc;
char RS_BytePtr;
// led1_on();
for(;;) // 'goto' ýòî íå îïåðàòîð àçûêà Ñ
{
if(!rs_arr->SciRegs->SCIRXST.bit.RXRDY) // Receiver ready flag
{
PieCtrlRegs.PIEACK.bit.ACK9 |= 1;
rs_arr->SciRegs->SCIFFRX.bit.RXFFINTCLR=1; // Clear INT flag
return; // êñòàòè ýòî åäèíñòâåííûé âûõîä èç ïðåðûâàíèà
}
Rc = rs_arr->SciRegs->SCIRXBUF.bit.RXDT; // ×èòàåì ñèìâîë â ëþáîì ñëó÷àå
if(rs_arr->SciRegs->SCIRXST.bit.RXERROR) // Receiver error flag
{
rs_arr->SciRegs->SCICTL1.bit.SWRESET=0; // Reset SCI
rs_arr->SciRegs->SCICTL1.bit.SWRESET=1; // Relinquish SCI from Reset
continue;
}
if(rs_arr->RS_DataReady) continue; // Íå çàáðàëè äàííûå
if (rs_arr->RS_Flag9bit==1) // äëà RS485????????
{
// Èíèöèàëèçèðóåì ïåðåìåííûå è ôëàãè
rs_arr->RS_FlagBegin = true; // Æäåì çàãîëîâîê
rs_arr->RS_RecvLen = 0;
rs_arr->RS_FlagSkiping = false;
rs_arr->RS_HeaderCnt = 0;
rs_arr->RS_Cmd = 0;
}
if(rs_arr->RS_FlagSkiping) continue; // Íå íàì
if (rs_arr->RS_FlagBegin) // Çàãîëîâîê
{
if (rs_arr->RS_HeaderCnt==0) // Àäðåñ êîíòðîëëåðà èëè ñòàíäàðòíàà êîìàíäà
{
if( (Rc == CNTRL_ADDR_UNIVERSAL) || (Rc == CNTRL_ADDR && CNTRL_ADDR!=0) || ((Rc == rs_arr->addr_answer) && rs_arr->flag_LEADING)
|| ((Rc == ADDR_FOR_ALL && ADDR_FOR_ALL!=0) && !rs_arr->flag_LEADING))
{
rs_arr->addr_recive=Rc; // çàïîìíèëè àäðåñ ïî êîòîðîìó íàñ çàïðîñèëè
rs_arr->RS_Header[rs_arr->RS_HeaderCnt++] = Rc; // Ïåðâûé áàéò
RS_SetBitMode(rs_arr,8); // ïåðåñòðîèëèñü â 8-áèò ðåæèì
}
else
{
rs_arr->RS_FlagSkiping = true; // Íå íàøåìó êîíòðîëëåðó
rs_arr->RS_FlagBegin = false; // îñòàëèñü â 9-áèò ðåæèìå
// led1_off();
}
}
else
{
rs_arr->RS_Header[rs_arr->RS_HeaderCnt++] = Rc; // Âòîðîé áàéò è ò.ä.
if (rs_arr->RS_HeaderCnt == 7 && rs_arr->RS_Cmd==CMD_MODBUS_16 && !rs_arr->flag_LEADING)
{
RS_Len[CMD_MODBUS_16] = (10+Rc);
}
// åñëè âòîðîé áàéò - ýòî êîìàíäà
if (rs_arr->RS_HeaderCnt == 2)
{
rs_arr->RS_Cmd = Rc;
// Ïðîâåðêà äëèíû ïîñûëêè
// CMD_LOAD - ìëàäøàà íà äàííûé ìîìåíò
// CMD_STD_ANS - ñòàðøàà íà äàííûé ìîìåíò
if ((rs_arr->RS_Cmd < CMD_MODBUS_3) || (rs_arr->RS_Cmd > CMD_STD_ANS) || (RS_Len[rs_arr->RS_Cmd]<3)
|| ((rs_arr->RS_Cmd == CMD_LOAD)&&(rs_arr->RS_PrevCmd != CMD_INITLOAD))
)
{
RS_SetBitMode(rs_arr,9); // Ïîëó÷èëè âñå ïåðåñòðîèëèñü â 9-áèò äëà RS485?
rs_arr->RS_HeaderCnt = 0; // Ïîòîìó ÷òî êîìàíäà íå òà
rs_arr->RS_FlagBegin = true;
rs_arr->RS_FlagSkiping = false;
rs_arr->RS_Cmd=0;
// led1_off();
continue;
}
if (rs_arr->RS_Cmd == CMD_LOAD) // Äëà ýòîé êîìàíäû çàãîëîâîê î÷åíü êîðîòêèé
rs_arr->RS_FlagBegin = false;// äàëüøå èäóò äàííûå
}
if( (rs_arr->RS_HeaderCnt >= RS_Len[rs_arr->RS_Cmd]) ||
(rs_arr->RS_HeaderCnt >= sizeof(rs_arr->RS_Header)))
{ // Ïîëó÷èëè çàãîëîâîê
RS_SetBitMode(rs_arr,9); // Ïîëó÷èëè âñå ïåðåñòðîèëèñü â 9-áèò äëà RS485?
rs_arr->RS_FlagBegin = false;
rs_arr->RS_FlagSkiping = true;
rs_arr->RS_DataReady = true;
rs_arr->RS_Cmd=0;
// led1_off();
} } }
else // Ïîòîê äàííûõ
{
if(rs_arr->pRS_RecvPtr<(unsigned int *)Rec_Bloc_Begin || rs_arr->pRS_RecvPtr>(unsigned int *)Rec_Bloc_End)
{
rs_arr->pRS_RecvPtr = (unsigned int *)Rec_Bloc_Begin; // Íà ïðîãðàììó íàäåéñà, à ñàì íå ïëîøàé
rs_arr->pRecvPtr = (unsigned int *)Rec_Bloc_Begin; // Íà ïðîãðàììó íàäåéñà, à ñàì íå ïëîøàé
}
if(rs_arr->RS_PrevCmd != CMD_INITLOAD) continue; // Ìû çäåñü îêàçàëèñü ïî êàêîé-òî ÷óäîâèùíîé îøèáêå
if(rs_arr->RS_DataReady) // Åñëè äàííûå â îñíîâíîì öèêëå íå çàáðàíû,
{ // òî ïðîïóñêàåì ñëåäóþùóþ ïîñûëêó
rs_arr->RS_FlagSkiping = true; // Èãíîðèðóåì äî ñëåäóþùåãî çàãîëîâêà
// led1_off();
continue;
}
RS_BytePtr = rs_arr->RS_RecvLen++ % 2;
if(RS_BytePtr) *rs_arr->pRS_RecvPtr++ |= Rc; // Ïîëó÷èëè ñëîâî
else *rs_arr->pRS_RecvPtr = Rc<<8;
if(rs_arr->RS_Length <= rs_arr->RS_RecvLen) // Êîíåö ïîñûëêè
{
rs_arr->RS_PrevCmd = rs_arr->RS_Header[1] = CMD_LOAD;
RS_SetBitMode(rs_arr,9); // Ïîëó÷èëè âñå äàííûå ïåðåñòðîèëèñü â 9-áèò äëà RS485?
rs_arr->RS_FlagSkiping = true; // Èãíîðèðóåì äî ñëåäóþùåãî çàãîëîâêà
rs_arr->RS_DataReady = true; // Ôëàã â îñíîâíîé öèêë - äàííûå ïîëó÷åíû
// led1_off();
} } } }
/** Îáðàáîò÷èê ïðåðûâàíèé UART - ïîñëàíî */
void RS_TX_Handler(RS_DATA *rs_arr)
{
char RS_BytePtr;
// unsigned int i;
if(rs_arr->RS_SendBlockMode == BM_CHAR32)
{
if(++rs_arr->RS_SendLen >= rs_arr->RS_SLength)
{
enableUARTInt(rs_arr); /* Çàïðåùàåì ïðåðûâàíèà ïî ïåðåäà÷å */
}
SCI_send(rs_arr,*(rs_arr->pRS_SendPtr++));
if(rs_arr->RS_SendLen >= rs_arr->RS_SLength)
{
RS_Wait4OK(rs_arr);
// for (i=0; i <= TIME_WAIT_RS_BYTE_OUT; i++){} /* Ïàóçà äëà PC */
RS_SetBitMode(rs_arr,9); /* Ïåðåäàëè âñå ïåðåñòðîèëèñü â 9-áèò äëà RS485?*/
RS_Line_to_receive(rs_arr); /* ðåæèì ïðèåìà RS485 */
rs_arr->flag_TIMEOUT_to_Send=false; /* ñáðîñèëè ôëàã îæèäàíèà òàéìàóòà */
}
}
else /* BM_PACKED */
{
RS_BytePtr = (rs_arr->RS_SendLen++) % 2;
if(rs_arr->RS_SendLen >= rs_arr->RS_SLength)
{
enableUARTInt(rs_arr); /* Çàïðåùàåì ïðåðûâàíèà ïî ïåðåäà÷å */
}
if(RS_BytePtr) SCI_send(rs_arr, LOBYTE( *(rs_arr->pRS_SendPtr++) ));
else SCI_send(rs_arr, HIBYTE( *rs_arr->pRS_SendPtr ));
if(rs_arr->RS_SendLen >= rs_arr->RS_SLength)
{
RS_Wait4OK(rs_arr);
// for (i=0; i <= TIME_WAIT_RS_BYTE_OUT; i++){} /* Ïàóçà äëà PC */
// RS_SetBitMode(rs_arr,9); /* Ïåðåäàëè âñå ïåðåñòðîèëèñü â 9-áèò äëà RS485?*/
// RS_Line_to_receive(); /* ðåæèì ïðèåìà RS485 */
}
}
PieCtrlRegs.PIEACK.bit.ACK9 |= 1;
// rs_arr->SciRegs->SCIFFTX.bit.TXINTCLR=1; // Clear INT flag
}
/** Èíèöèàëèçàöèà ìàññèâà äëèí êîìàíä */
void setup_arr_cmd_length()
{
int i;
for (i=0;i<70;i++) RS_Len[i]=i;
RS_Len[CMD_LOAD] = 12;
RS_Len[CMD_UPLOAD] = 12;
RS_Len[CMD_RUN] = 8;
RS_Len[CMD_XFLASH] = 9;
RS_Len[CMD_TFLASH] = 16;
RS_Len[CMD_PEEK] = 8;
RS_Len[CMD_POKE] = 12;
RS_Len[CMD_INITLOAD] = 12;
RS_Len[CMD_INIT] = 5;
RS_Len[CMD_VECTOR] = size_cmd15-2; //sizeof(CMD_TO_TMS)-2;
RS_Len[CMD_STD] = size_cmd15-1; //sizeof(CMD_TO_TMS)-1;
RS_Len[CMD_IMPULSE] = 8;
RS_Len[CMD_MODBUS_3] = 8;
RS_Len[CMD_MODBUS_6] = 8;
RS_Len[CMD_MODBUS_16] = 13;
RS_Len[CMD_MODBUS_15] = 27;
RS_Len[CMD_EXTEND] = 18;
}
/** Íàñòðîéêà ðåæèìà ïðèåìà/ïåðåäà÷è */
void RS_SetBitMode(RS_DATA *rs_arr,int n)
{
if(n == 8)
{
RS_SetLineMode(rs_arr,8,'N',1); /* ðåæèì ëèíèè */
rs_arr->RS_Flag9bit=0;
}
if(n == 9)
{
RS_SetLineMode(rs_arr,8,'N',1); /* ðåæèì ëèíèè */
rs_arr->RS_Flag9bit=1;
} }
/** Ïîñûëêà áëîêà áàéòîâ.
Ïîñûëàåò ìàññèâà 32-áèòíûõ öåëûõ ÷èñåë ñòàðøèå áèòû äîëæíû áûòü 0.
@precondition Ðàáîòà ô-öèè çàâèñèò îò ìàêðî RS_TRANSMIT_INTR
@param buf àäðåñ ìàññèâà
@param len êîëè÷åñòâî áàéò
@see RS_BSend, RS_TRANSMIT_INTR */
int RS_Send(RS_DATA *rs_arr,unsigned int *pBuf,unsigned long len)
{
unsigned int i;
for (i=0; i <= 30000; i++){} /* Ïàóçà äëà PC */
RS_Line_to_send(rs_arr); /* ðåæèì ïåðåäà÷è RS485 */
for (i=0; i <= 10000; i++){} /* Ïàóçà äëà PC */
rs_arr->RS_SLength = len; /* Íàñòðàèâàåì ïåðåìåííûå */
rs_arr->pRS_SendPtr = pBuf + 1;
rs_arr->RS_SendBlockMode = BM_CHAR32;
RS_Wait4OK(rs_arr); /* Äîæèäàåìñà óõîäà */
RS_SetBitMode(rs_arr,8); /* Îñòàëüíûå â 8-áèò ðåæèìå */
rs_arr->RS_SendLen = 1; /* Äâà áàéòà óæå ïåðåäàëè */
if(len > 1)
{
enableUARTIntW(rs_arr); /* Ðàçðåøàåì ïðåðûâàíèà ïî ïåðåäà÷å */
SCI_send(rs_arr, *pBuf); // Ïåðåäàåì âòîðîé áàéò ïî ïðåðûâàíèþ
}
else
{
SCI_send(rs_arr, *pBuf); // Ïåðåäàåì âòîðîé áàéò ïî ïðåðûâàíèþ
RS_Wait4OK(rs_arr); /* Äîæèäàåìñà óõîäà áåç ïðåðûâàíèà */
for (i=0; i <= TIME_WAIT_RS_BYTE_OUT; i++){} /* Ïàóçà äëà PC */
RS_SetBitMode(rs_arr,9); /* Îáðàòíî â 9-áèò ðåæèì */
RS_Line_to_receive(rs_arr); /* ðåæèì ïðèåìà RS485 */
}
return 0;
}
// Ïîñûëêà áëîêà óïàêîâàííûõ áàéòîâ
int RS_BSend(RS_DATA *rs_arr,unsigned int *pBuf, unsigned long len)
{
RS_Line_to_send(rs_arr); // ðåæèì ïåðåäà÷è RS485
rs_arr->RS_SLength = len; // Íàñòðàèâàåì ïåðåìåííûå
rs_arr->pRS_SendPtr = pBuf;
rs_arr->RS_SendBlockMode = BM_PACKED;
RS_Wait4OK(rs_arr); // Îæèäàåì î÷èñòêè è óõîäà ïîñëåäíåãî áàéòà
RS_SetBitMode(rs_arr,8); /* Îñòàëüíûå â 8-áèò ðåæèìå */
rs_arr->RS_SendLen = 1; // Îäèí áàéò óæå ïåðåäàëè
enableUARTIntW(rs_arr); /* Ðàçðåøàåì ïðåðûâàíèà ïî ïåðåäà÷å */
SCI_send(rs_arr,HIBYTE(*pBuf));// Ïåðåäàåì ïåðâûé áàéò
return 0;
}
/** Óñòàíàâëèâàåò ñêîðîñòü îáìåíà.
@param speed ñêîðîñòü RS â áîä */
/** Óñòàíàâëèâàåò ñêîðîñòü îáìåíà.
@param speed ñêîðîñòü RS â áîä */
void RS_SetLineSpeed(RS_DATA *rs_arr,unsigned long speed)
{
long SciBaud;
SciBaud = LSPCLK/(speed*8.0);
// if((SciBaud-(unsigned int)SciBaud)>0.5) SciBaud++;
rs_arr->SciRegs->SCIHBAUD = HIBYTE((int)SciBaud);
rs_arr->SciRegs->SCILBAUD = LOBYTE((int)SciBaud);
}
/** Èíèöèàëèçàöèà ïîñëåäîâàòåëüíîãî ïîðòà */
void create_uart_vars(char size_cmd15_set)
{
size_cmd15=size_cmd15_set;
rs_a.commnumber=COM_1;
rs_b.commnumber=COM_2;
}
/** Èíèöèàëèçàöèà ïîñëåäîâàòåëüíîãî ïîðòà */
void setup_uart(char commnumber, unsigned long speed_baud)
{
volatile struct SCI_REGS *SciRegs;
RS_DATA *rs_arr;
if(commnumber==COM_1)
{
rs_a.SciRegs = &SciaRegs;
rs_arr = &rs_a;
EALLOW;
GpioCtrlRegs.GPAMUX2.bit.GPIO29 = 1; // SCITXDA - SCI-A transmit(O)
GpioCtrlRegs.GPAMUX2.bit.GPIO28 = 1; // SCIRXDA - SCI-A receive (I)
PieVectTable.SCIRXINTA = &RSA_RX_Handler;
PieVectTable.SCITXINTA = &RSA_TX_Handler;
PieCtrlRegs.PIEIER9.bit.INTx1=1; // PIE Group 9, INT1
PieCtrlRegs.PIEIER9.bit.INTx2=1; // PIE Group 9, INT2
IER |= M_INT9; // Enable CPU INT
EDIS;
}
if(commnumber==COM_2)
{
rs_b.SciRegs = &ScibRegs;
rs_arr = &rs_b;
EALLOW;
GpioCtrlRegs.GPAMUX1.bit.GPIO14 = 2; // SCITXDB - SCI-B transmit(O)
GpioCtrlRegs.GPAMUX1.bit.GPIO15 = 2; // SCIRXDB - SCI-B receive (I)
GpioCtrlRegs.GPBMUX1.bit.GPIO34 = 0; // GPIO 34 - general purpose I/O 34 (default)
GpioCtrlRegs.GPBDIR.bit.GPIO34 = 1; // Configures the GPIO pin as an output
PieVectTable.SCIRXINTB = &RSB_RX_Handler;
PieVectTable.SCITXINTB = &RSB_TX_Handler;
PieCtrlRegs.PIEIER9.bit.INTx3=1; // PIE Group 9, INT3
PieCtrlRegs.PIEIER9.bit.INTx4=1; // PIE Group 9, INT4
IER |= M_INT9; // Enable CPU INT
EDIS;
}
rs_arr->commnumber = commnumber;
SciRegs = rs_arr->SciRegs;
RS_SetLineMode(rs_arr,8,'N',1);
// enable TX, RX, internal SCICLK,
// Disable RX ERR, SLEEP, TXWAKE
SciRegs->SCIFFCT.bit.ABDCLR=1;
SciRegs->SCIFFCT.bit.CDC=0;
SciRegs->SCICTL1.bit.RXERRINTENA=0;
SciRegs->SCICTL1.bit.SWRESET=0;
SciRegs->SCICTL1.bit.TXWAKE=0;
SciRegs->SCICTL1.bit.SLEEP=0;
SciRegs->SCICTL1.bit.TXENA=1;
SciRegs->SCICTL1.bit.RXENA=1;
SciRegs->SCIFFTX.bit.SCIFFENA=0; // fifo off
SciRegs->SCIFFRX.bit.RXFFIL=1; // Äëèíà íàèìåíüøåé êîìàíäû
setup_arr_cmd_length();
RS_SetLineSpeed(rs_arr,speed_baud); // ñêîðîñòü ëèíèè
RS_Line_to_receive(rs_arr); // ðåæèì ïðèåìà RS485
enableUARTInt(rs_arr); // ðàçðåøåíèå ïðåðûâàíèé UART
RS_SetBitMode(rs_arr,9);
rs_arr->RS_PrevCmd = 0; // íå áûëî íèêàêèõ êîìàíä
rs_arr->flag_TIMEOUT_to_Send = 0;
rs_arr->flag_LEADING = 0;
SciRegs->SCIFFRX.bit.RXFFINTCLR=1; // Clear INT flag
SciRegs->SCICTL1.bit.SWRESET=1; // Relinquish SCI from Reset
}
/** Íàñòðîéêà ðåæèìà ëèíèè.
@param bit êîëè÷åñòâî áèò äàííûõ
@param parity ðåæèì ÷åòíîñòè (N,O,E,M,S)
@param stop êîëè÷åñòâî ñòîïîâûõ áèò */
void RS_SetLineMode(RS_DATA *rs_arr, int bit, char parity, int stop)
{
volatile struct SCI_REGS *SciRegs;
/*
SCICCR - SCI Communication Control Register
Bit Bit Name Designation Functions
2-0 SCI CHAR2-0 SCICHAR Select the character (data) length (one to eight bits).
3 ADDR/IDLE MODE ADDRIDLE_MODE The idle-line mode (0) is usually used for normal communications because the address-bit mode adds an extra bit to the frame. The idle-line mode does not add this extra bit and is compatible with RS-232 type communications.
4 LOOP BACK ENABLE LOOPBKENA This bit enables (1) the Loop Back test mode where the Tx pin is internally connected to the Rx pin.
5 PARITY ENABLE PARITYENA Enables the parity function if set to 1, or disables the parity function if cleared to 0.
6 EVEN/ODD PARITY PARITY If parity is enabled, selects odd parity if cleared to 0 or even parity if set to 1.
7 STOP BITS STOPBITS Determines the number of stop bits transmitted-one stop bit if cleared to 0 or two stop bits if set to 1.
*/
SciRegs = rs_arr->SciRegs;
if(bit>0 && bit<9) SciRegs->SCICCR.bit.SCICHAR = bit-1;
switch(parity)
{
case 'N': SciRegs->SCICCR.bit.PARITYENA = 0;
break;
case 'O': SciRegs->SCICCR.bit.PARITYENA = 1;
SciRegs->SCICCR.bit.PARITY = 0;
break;
case 'E': SciRegs->SCICCR.bit.PARITYENA = 1;
SciRegs->SCICCR.bit.PARITY = 1;
break;
}
if (stop==1) SciRegs->SCICCR.bit.STOPBITS = 0;
if (stop==2) SciRegs->SCICCR.bit.STOPBITS = 1;
SciRegs->SCICCR.bit.LOOPBKENA = 0; //0
SciRegs->SCICCR.bit.ADDRIDLE_MODE = 0;
}
void clear_timer_rs_live(RS_DATA *rs_arr)
{
rs_arr->time_wait_rs_out=0;
}
/* ïðîâåðêà íà æèâó÷åñòü RS */
void test_rs_live(RS_DATA *rs_arr)
{
/* if (rs_arr->time_wait_rs_out < RS_TIME_OUT)
rs_arr->time_wait_rs_out++;
else
{
rs_arr->time_wait_rs_out=0;
RS_Line_to_receive(rs_arr); // ðåæèì ïðèåìà RS485
RS_SetBitMode(rs_arr,9);
}*/ }

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Source/Internal/bios.c Normal file
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/****************************************************************/
/* TMS320C32 */
/* ====== BIOS, ÊËÀÈÍ, ÊËÂÑÏ ====== */
/* ÖÍÈÈ ÑÝÒ (ñ) 1998-2000 ã. */
/****************************************************************
Bios.c
**************************************************************
Îñíîâíûå êîììàíäû BIOS *
äëà ðàáîòû ñ RS232
****************************************************************/
#include "DSP2833x_Device.h" // DSP2833x Headerfile Include File
#include "RS485.h"
#include "bios_dsp.h"
#include "crc16.h"
#include "spise2p.h"
#include "log_to_mem.h"
//#include "flash_tools.h"
//#include "spartan_tools.h"
//#include "big_dsp_module.h"
int flag_DEBUG = false; /* Ôëàã îòëàäî÷íîãî ðåæèìà */
//static unsigned int *RecvPtr;
//static int BS_LoadOK = false; /** Ôëàã óñïåøíîñòè ïðèåìà áëîêà */
/**********************************************************/
/* Ïðîòîòèïû ôóíêöèé, èñïîëüçóåìûõ è îïðåäåëåííûõ â ôàéëå */
/**********************************************************/
//static int _getbyte(int *addr, int offs);
unsigned int read_memory(unsigned long addr)
{
return (*(volatile int *)(addr));
}
void write_memory(unsigned long addr, unsigned int data)
{
(*(volatile int *)( addr )) = data;
}
/** Âîçâðàùàåò íîìåð êîììàíäû, åñëè åñòü èëè -1 åñëè òðàíçàêöèé íå áûëî */
int get_command(RS_DATA *rs_arr)
{
int cmd;
unsigned int crc, rcrc;
if(rs_arr->RS_DataReady) // Äàííûå ïî RS ïðèøëè
{
rs_arr->RS_DataReady = false;
cmd = rs_arr->RS_Header[1]; // Ïðî÷èòàëè íîìåð êîìàíäû
// Ïðîâåðàåì äëèíó êîìàíäû äëà ñ÷èòûâàíèà CRC
if((RS_Len[cmd]<3) || (RS_Len[cmd]>MAX_RECEIVE_LENGTH))
{
RS_Line_to_receive(rs_arr); // ðåæèì ïðèåìà RS485
RS_SetBitMode(rs_arr,9);
return -1;
}
if(cmd == CMD_LOAD) // Åñëè êîìàíäà çàãðóçêè
{
rs_arr->RS_PrevCmd = cmd;
return cmd; // Íåò ïðîâåðêè crc
}
else // Âñå îñòàëüíûå êîìàíäû
{
// Ñ÷èòûâàåì crc èç ïîñûëêè
crc = (rs_arr->RS_Header[RS_Len[cmd]-1] << 8) |
(rs_arr->RS_Header[RS_Len[cmd]-2]) ;
}
// Ðàññ÷èòûâàåì crc èç ïîñûëêè
rcrc = 0xffff;
rcrc = get_crc_16( rcrc, rs_arr->RS_Header, (RS_Len[cmd]-2) );
if(crc == rcrc) // Ïðîâåðàåì crc
{
rs_arr->RS_PrevCmd = cmd;
return cmd;
}
else
{
RS_Line_to_receive(rs_arr); // ðåæèì ïðèåìà RS485
RS_SetBitMode(rs_arr,9);
} }
return -1;
}
/** Ñòàíäàðòíûé îòâåò, áåç ïàðàìåòðîâ */
void Answer(RS_DATA *rs_arr,int n)
{
int crc;
flag_DEBUG = true; // Ôëàã îòëàäî÷íîãî ðåæèìà
rs_arr->buffer[0] = rs_arr->addr_recive; //CNTRL_ADDR;
rs_arr->buffer[1] = n;
crc = 0xffff;
crc = get_crc_16( crc, rs_arr->buffer, 2);
rs_arr->buffer[2] = LOBYTE(crc);
rs_arr->buffer[3] = HIBYTE(crc);
rs_arr->buffer[4] = 0;
rs_arr->buffer[5] = 0;
RS_Send(rs_arr,rs_arr->buffer, 6);
}
/* Âíóòðåííàà ô-öèà */
static char _getbyte(unsigned int *addr, int32 offs)
{
unsigned int *address;
unsigned int byte;
address = addr + offs/2;
byte = *address;
if(offs%2) return LOBYTE(byte);
else return HIBYTE(byte);
}
/* íà÷àëüíûå óñòàíîâêè (íå ðàáîòàåò)*/
void init(RS_DATA *rs_arr)
{
/*
if(rs_arr->RS_Header[2]==3)
{
if (rs_arr->curr_baud!=57600)
{ RS_SetLineSpeed(rs_arr,57600);
rs_arr->curr_baud= 57600;
} }
if(rs_arr->RS_Header[2]==4)
{
if (rs_arr->curr_baud!=115200)
{ RS_SetLineSpeed(rs_arr,115200);
rs_arr->curr_baud= 115200;
} }
Answer(rs_arr,CMD_INIT);
rs_arr->BS_LoadOK = false;
*/
}
/**@name Êîììàíäû
* Êîììàíäû, âûçûâàåìûå ÷åðåç ïîñëåäîâàòåëüíûé êàíàë
*/
//@{
/** Èíèöèèðîâàòü çàãðóçêó áëîêà.
Íàñòðàèâàåò ïðèåì áëîêà äàííûõ */
void initload(RS_DATA *rs_arr)
{
unsigned long Address;
Address = rs_arr->RS_Header[5] & 0xFF;
Address = (Address<<8) | (rs_arr->RS_Header[4] & 0xFF);
Address = (Address<<8) | (rs_arr->RS_Header[3] & 0xFF);
Address = (Address<<8) | (rs_arr->RS_Header[2] & 0xFF);
rs_arr->RS_Length = rs_arr->RS_Header[9] & 0xFF;
rs_arr->RS_Length = (rs_arr->RS_Length<<8) | (rs_arr->RS_Header[8] & 0xFF);
rs_arr->RS_Length = (rs_arr->RS_Length<<8) | (rs_arr->RS_Header[7] & 0xFF);
rs_arr->RS_Length = (rs_arr->RS_Length<<8) | (rs_arr->RS_Header[6] & 0xFF);
rs_arr->RS_Length += 2;
rs_arr->pRS_RecvPtr = (unsigned int *)Address; //(unsigned int *)Address;
rs_arr->pRecvPtr = (unsigned int *)Address; //(unsigned int *)Address;
no_write = 1;
Answer(rs_arr,CMD_INITLOAD);
}
/** Çàãðóçêà áëîêà.
Âûçûâàåòñà ïîñëå çàãðóçêè áëîêà ÷åðåç RS */
void load(RS_DATA *rs_arr)
{
unsigned int rcrc, crc;
crc = (_getbyte(rs_arr->pRecvPtr, rs_arr->RS_Length-1) << 8) +
_getbyte(rs_arr->pRecvPtr, rs_arr->RS_Length-2);
rs_arr->RS_Header[0] = rs_arr->addr_recive;
// CNTRL_ADDR;
rs_arr->RS_Header[1]=CMD_LOAD;
rcrc = 0xffff;
rcrc = get_crc_16( rcrc, rs_arr->RS_Header, 2);
rcrc = get_crc_16b( rcrc, rs_arr->pRecvPtr, rs_arr->RS_Length-2);
if(rcrc == crc)
{
Answer(rs_arr,CMD_LOAD);
rs_arr->BS_LoadOK = true;
}
else
{
rs_arr->BS_LoadOK = false;
RS_Line_to_receive(rs_arr); // ðåæèì ïðèåìà RS485
RS_SetBitMode(rs_arr,9);
} }
/** Âûïîëíèòü ïðîãðàììó â ôîðìàòå Serial Boot.
@precondition Äîëæíà áûòü ïðîèçâåäåíà çàãðóçêà áëîêà
Àäðåñ ïðîãðàììû áåðåòñà èç çàãîëîâêà è
ñðàâíèâàåòñà ñ ïåðåìåííîé RecvPtr, çàïîëíàåìîé â ô-öèè load
@see load */
void run (RS_DATA *rs_arr)
{
return;
}
/** Ïðî÷èòàòü à÷åéêó ïàìàòè */
void peek(RS_DATA *rs_arr)
{
unsigned long Address;
unsigned int Data, crc;
flag_DEBUG = true; // Ôëàã îòëàäî÷íîãî ðåæèìà
Address = rs_arr->RS_Header[5] & 0xFF;
Address = (Address<<8) | (rs_arr->RS_Header[4] & 0xFF);
Address = (Address<<8) | (rs_arr->RS_Header[3] & 0xFF);
Address = (Address<<8) | (rs_arr->RS_Header[2] & 0xFF);
if(Address<PROM_LEN)
Seeprom_read(Address,(unsigned int *)&Data,2);
else Data = read_memory(Address);
rs_arr->buffer[0] = rs_arr->addr_recive; //CNTRL_ADDR;
rs_arr->buffer[1] = CMD_PEEK;
rs_arr->buffer[2] = LOBYTE(Data);
rs_arr->buffer[3] = HIBYTE(Data);
rs_arr->buffer[4] = LOBYTE(CpuTimer2.InterruptCount);
rs_arr->buffer[5] = HIBYTE(CpuTimer2.InterruptCount);
crc = 0xffff;
crc = get_crc_16(crc, rs_arr->buffer, 6);
rs_arr->buffer[6] = LOBYTE(crc);
rs_arr->buffer[7] = HIBYTE(crc);
rs_arr->buffer[8] = 0;
rs_arr->buffer[9] = 0;
RS_Send(rs_arr,rs_arr->buffer, 10);
}
/** Çàïèñàòü â à÷åéêó ïàìàòè */
void poke(RS_DATA *rs_arr)
{
unsigned long Address;
unsigned int Data;
Address = rs_arr->RS_Header[5] & 0xFF;
Address = (Address<<8) | (rs_arr->RS_Header[4] & 0xFF);
Address = (Address<<8) | (rs_arr->RS_Header[3] & 0xFF);
Address = (Address<<8) | (rs_arr->RS_Header[2] & 0xFF);
Data = 0;
Data = (Data<<8) | (rs_arr->RS_Header[7] & 0xFF);
Data = (Data<<8) | (rs_arr->RS_Header[6] & 0xFF);
if(Address<PROM_LEN)
Seeprom_write(Address,(unsigned int *)&Data,2);
else write_memory(Address,Data);
Answer(rs_arr,CMD_POKE);
}
/** Ïåðåäàòü áëîê ïàìàòè */
void upload(RS_DATA *rs_arr)
{
int32 Address, Length, crc;
no_write = 1; // Ôëàã îòëàäî÷íîãî ðåæèìà
// stopp=1;
Address = rs_arr->RS_Header[5] & 0xFF;
Address = (Address<<8) | (rs_arr->RS_Header[4] & 0xFF);
Address = (Address<<8) | (rs_arr->RS_Header[3] & 0xFF);
Address = (Address<<8) | (rs_arr->RS_Header[2] & 0xFF);
Length = rs_arr->RS_Header[9] & 0xFF;
Length = (Length<<8) | (rs_arr->RS_Header[8] & 0xFF);
Length = (Length<<8) | (rs_arr->RS_Header[7] & 0xFF);
Length = (Length<<8) | (rs_arr->RS_Header[6] & 0xFF);
rs_arr->buffer[0] = rs_arr->addr_recive; //CNTRL_ADDR;
rs_arr->buffer[1] = CMD_UPLOAD;
crc = 0xffff;
crc = get_crc_16( crc, rs_arr->buffer, 2);
crc = get_crc_16b( crc, (unsigned int *)Address, Length);
RS_Send(rs_arr,rs_arr->buffer, 1); // <=2 áàéò ïî ôëàãó
rs_arr->buffer[0] = CMD_UPLOAD;
RS_Send(rs_arr,rs_arr->buffer, 1); // <=2 áàéò ïî ôëàãó
RS_Wait4OK(rs_arr);
RS_BSend(rs_arr,(unsigned int*)Address, Length);
RS_Wait4OK(rs_arr);
rs_arr->buffer[0] = LOBYTE(crc);
rs_arr->buffer[1] = HIBYTE(crc);
rs_arr->buffer[2] = 0;
rs_arr->buffer[3] = 0;
RS_Send(rs_arr,rs_arr->buffer, 4+2);
}
/** Ïðîøèòü XILINX.
@precondition Äîëæíà áûòü ïðîèçâåäåíà çàãðóçêà áëîêà
Àäðåñ è äëèíà ïðîøèâêè áåðåòñà èç çàãîëîâêà è
ñðàâíèâàåòñà ñ ïåðåìåííûìè RecvPtr è Length, çàïîëíàåìûìè â ô-öèè load,
òàê æå ñìîòðèò ìàãè÷åñêîå ñëîâî â íà÷àëå ïðîøèâêè
@see load */
void xflash(RS_DATA *rs_arr)
{
return;
}
/** Ïðîøèòü TMS.
@precondition Äîëæíà áûòü ïðîèçâåäåíà çàãðóçêà áëîêà
Àäðåñ è äëèíà ïðîøèâêè áåðåòñà èç çàãîëîâêà è
ñðàâíèâàåòñà ñ ïåðåìåííûìè RecvPtr è Length, çàïîëíàåìûìè â ô-öèè load
@see load */
void tflash(RS_DATA *rs_arr)
{
// volatile unsigned long Address1,Address2;
// volatile unsigned long Length, LengthW;
/*
if(!rs_arr->BS_LoadOK)
{
RS_Line_to_receive(rs_arr); // ðåæèì ïðèåìà RS485
RS_SetBitMode(rs_arr,9);
return;
}
Address1 = rs_arr->RS_Header[5] & 0xFF;
Address1 = (Address1<<8) | (rs_arr->RS_Header[4] & 0xFF);
Address1 = (Address1<<8) | (rs_arr->RS_Header[3] & 0xFF);
Address1 = (Address1<<8) | (rs_arr->RS_Header[2] & 0xFF);
Address2 = rs_arr->RS_Header[9] & 0xFF;
Address2 = (Address2<<8) | (rs_arr->RS_Header[8] & 0xFF);
Address2 = (Address2<<8) | (rs_arr->RS_Header[7] & 0xFF);
Address2 = (Address2<<8) | (rs_arr->RS_Header[6] & 0xFF);
Length = rs_arr->RS_Header[13] & 0xFF;
Length = (Length<<8) | (rs_arr->RS_Header[12] & 0xFF);
Length = (Length<<8) | (rs_arr->RS_Header[11] & 0xFF);
Length = (Length<<8) | (rs_arr->RS_Header[10] & 0xFF);
LengthW = Length/2;
if (LengthW*2<Length) LengthW++;
if( (Address2 < 0x100000) || (Address2 > 0x180000) || ((Address2+LengthW) > 0x180000) )
{
RS_Line_to_receive(rs_arr); // ðåæèì ïðèåìà RS485
RS_SetBitMode(rs_arr,9);
return;
}
run_flash_data(Address1,Address2, LengthW );
Answer(rs_arr,CMD_TFLASH);
*/
return;
}
/** Ïðîøèòü TMS.
@precondition Äîëæíà áûòü ïðîèçâåäåíà çàãðóçêà áëîêà
Àäðåñ è äëèíà ïðîøèâêè áåðåòñà èç çàãîëîâêà è
ñðàâíèâàåòñà ñ ïåðåìåííûìè RecvPtr è Length, çàïîëíàåìûìè â ô-öèè load
@see load */
void extendbios(RS_DATA *rs_arr)
{
volatile unsigned long Address1,Address2,Length;
unsigned int code;
Address1 = rs_arr->RS_Header[5] & 0xFF;
Address1 = (Address1<<8) | (rs_arr->RS_Header[4] & 0xFF);
Address1 = (Address1<<8) | (rs_arr->RS_Header[3] & 0xFF);
Address1 = (Address1<<8) | (rs_arr->RS_Header[2] & 0xFF);
Address2 = rs_arr->RS_Header[9] & 0xFF;
Address2 = (Address2<<8) | (rs_arr->RS_Header[8] & 0xFF);
Address2 = (Address2<<8) | (rs_arr->RS_Header[7] & 0xFF);
Address2 = (Address2<<8) | (rs_arr->RS_Header[6] & 0xFF);
Length = rs_arr->RS_Header[13] & 0xFF;
Length = (Length<<8) | (rs_arr->RS_Header[12] & 0xFF);
Length = (Length<<8) | (rs_arr->RS_Header[11] & 0xFF);
Length = (Length<<8) | (rs_arr->RS_Header[10] & 0xFF);
code=rs_arr->RS_Header[14] & 0xFF;
switch ( code )
{
// Ïðîøèâàåì EPROM Èç RAM
case 4: Seeprom_write(Address1,(unsigned int*)Address2,Length);
break;
// ×èòàåì èç EPROM â RAM
case 5: Seeprom_read(Address1,(unsigned int*)Address2,Length);
break;
default:
return;
}
Answer(rs_arr,CMD_EXTEND);
return;
}
//@}

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/****************************************************************/
/* TMS320C32 */
/* ====== BIOS, ÊËÀÈÍ, ÊËÂÑÏ ====== */
/* ÖÍÈÈ ÑÝÒ (ñ) 1998-2000 ã. */
/****************************************************************
cntrl_adr.c
****************************************************************
* Àäðåñ êîíòðîëëåðà *
****************************************************************/
#include "cntrl_adr.h"
#define ADDR_FOR_ALL_DEF 10
#define ADDR_ANSWER_DEF 0x33
#define ADDR_TERMINAL_DEF 11
#define ADDR_UNIVERSAL_DEF 10
/** Óñòàíîâêà àäðåñà êîíòðîëëåðà äëà ïîñûëêè âñåì ÀÈÍàì */
int ADDR_FOR_ALL = ADDR_FOR_ALL_DEF;
/** Óñòàíîâêà àäðåñà êîíòðîëëåðà äëà ïîñûëêè îòâåòà */
const int ADDR_ANSWER = ADDR_ANSWER_DEF;
/** Óñòàíîâêà àäðåñà òåðìèíàëà äëà ïîñûëêè îòâåòà */
const int ADDR_TERMINAL = ADDR_TERMINAL_DEF;
/* Óíèâåðñàëüíûé àäðåñ êîíòðîëëåðà */
const int CNTRL_ADDR_UNIVERSAL=ADDR_UNIVERSAL_DEF;
/* Àäðåñ êîíòðîëëåðà */
int CNTRL_ADDR=1;
int cntr_addr_c;
int cntr_addr_c_all;
/** Óñòàíîâêà àäðåñà êîíòðîëëåðà äëà ïðîøèâêè */
void set_cntrl_addr (int cntrl_addr,int cntrl_addr_for_all)
{
CNTRL_ADDR = cntrl_addr;
ADDR_FOR_ALL = cntrl_addr_for_all;
}

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#include "crc16.h"
#define MAKE_TABS 0 /* Builds tables below */
#define FAST_CRC 1 /* If fast CRC should be used */
#define ONLY_CRC16 1
#define Poln 0xA001
#if FAST_CRC & !MAKE_TABS
#if !ONLY_CRC16
static WORD crc_ccitt_tab[] = {
0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50a5, 0x60c6, 0x70e7,
0x8108, 0x9129, 0xa14a, 0xb16b, 0xc18c, 0xd1ad, 0xe1ce, 0xf1ef,
0x1231, 0x0210, 0x3273, 0x2252, 0x52b5, 0x4294, 0x72f7, 0x62d6,
0x9339, 0x8318, 0xb37b, 0xa35a, 0xd3bd, 0xc39c, 0xf3ff, 0xe3de,
0x2462, 0x3443, 0x0420, 0x1401, 0x64e6, 0x74c7, 0x44a4, 0x5485,
0xa56a, 0xb54b, 0x8528, 0x9509, 0xe5ee, 0xf5cf, 0xc5ac, 0xd58d,
0x3653, 0x2672, 0x1611, 0x0630, 0x76d7, 0x66f6, 0x5695, 0x46b4,
0xb75b, 0xa77a, 0x9719, 0x8738, 0xf7df, 0xe7fe, 0xd79d, 0xc7bc,
0x48c4, 0x58e5, 0x6886, 0x78a7, 0x0840, 0x1861, 0x2802, 0x3823,
0xc9cc, 0xd9ed, 0xe98e, 0xf9af, 0x8948, 0x9969, 0xa90a, 0xb92b,
0x5af5, 0x4ad4, 0x7ab7, 0x6a96, 0x1a71, 0x0a50, 0x3a33, 0x2a12,
0xdbfd, 0xcbdc, 0xfbbf, 0xeb9e, 0x9b79, 0x8b58, 0xbb3b, 0xab1a,
0x6ca6, 0x7c87, 0x4ce4, 0x5cc5, 0x2c22, 0x3c03, 0x0c60, 0x1c41,
0xedae, 0xfd8f, 0xcdec, 0xddcd, 0xad2a, 0xbd0b, 0x8d68, 0x9d49,
0x7e97, 0x6eb6, 0x5ed5, 0x4ef4, 0x3e13, 0x2e32, 0x1e51, 0x0e70,
0xff9f, 0xefbe, 0xdfdd, 0xcffc, 0xbf1b, 0xaf3a, 0x9f59, 0x8f78,
0x9188, 0x81a9, 0xb1ca, 0xa1eb, 0xd10c, 0xc12d, 0xf14e, 0xe16f,
0x1080, 0x00a1, 0x30c2, 0x20e3, 0x5004, 0x4025, 0x7046, 0x6067,
0x83b9, 0x9398, 0xa3fb, 0xb3da, 0xc33d, 0xd31c, 0xe37f, 0xf35e,
0x02b1, 0x1290, 0x22f3, 0x32d2, 0x4235, 0x5214, 0x6277, 0x7256,
0xb5ea, 0xa5cb, 0x95a8, 0x8589, 0xf56e, 0xe54f, 0xd52c, 0xc50d,
0x34e2, 0x24c3, 0x14a0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405,
0xa7db, 0xb7fa, 0x8799, 0x97b8, 0xe75f, 0xf77e, 0xc71d, 0xd73c,
0x26d3, 0x36f2, 0x0691, 0x16b0, 0x6657, 0x7676, 0x4615, 0x5634,
0xd94c, 0xc96d, 0xf90e, 0xe92f, 0x99c8, 0x89e9, 0xb98a, 0xa9ab,
0x5844, 0x4865, 0x7806, 0x6827, 0x18c0, 0x08e1, 0x3882, 0x28a3,
0xcb7d, 0xdb5c, 0xeb3f, 0xfb1e, 0x8bf9, 0x9bd8, 0xabbb, 0xbb9a,
0x4a75, 0x5a54, 0x6a37, 0x7a16, 0x0af1, 0x1ad0, 0x2ab3, 0x3a92,
0xfd2e, 0xed0f, 0xdd6c, 0xcd4d, 0xbdaa, 0xad8b, 0x9de8, 0x8dc9,
0x7c26, 0x6c07, 0x5c64, 0x4c45, 0x3ca2, 0x2c83, 0x1ce0, 0x0cc1,
0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8,
0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0
};
#endif
WORD crc_16_tab[] = {
0x0000, 0xc0c1, 0xc181, 0x0140, 0xc301, 0x03c0, 0x0280, 0xc241,
0xc601, 0x06c0, 0x0780, 0xc741, 0x0500, 0xc5c1, 0xc481, 0x0440,
0xcc01, 0x0cc0, 0x0d80, 0xcd41, 0x0f00, 0xcfc1, 0xce81, 0x0e40,
0x0a00, 0xcac1, 0xcb81, 0x0b40, 0xc901, 0x09c0, 0x0880, 0xc841,
0xd801, 0x18c0, 0x1980, 0xd941, 0x1b00, 0xdbc1, 0xda81, 0x1a40,
0x1e00, 0xdec1, 0xdf81, 0x1f40, 0xdd01, 0x1dc0, 0x1c80, 0xdc41,
0x1400, 0xd4c1, 0xd581, 0x1540, 0xd701, 0x17c0, 0x1680, 0xd641,
0xd201, 0x12c0, 0x1380, 0xd341, 0x1100, 0xd1c1, 0xd081, 0x1040,
0xf001, 0x30c0, 0x3180, 0xf141, 0x3300, 0xf3c1, 0xf281, 0x3240,
0x3600, 0xf6c1, 0xf781, 0x3740, 0xf501, 0x35c0, 0x3480, 0xf441,
0x3c00, 0xfcc1, 0xfd81, 0x3d40, 0xff01, 0x3fc0, 0x3e80, 0xfe41,
0xfa01, 0x3ac0, 0x3b80, 0xfb41, 0x3900, 0xf9c1, 0xf881, 0x3840,
0x2800, 0xe8c1, 0xe981, 0x2940, 0xeb01, 0x2bc0, 0x2a80, 0xea41,
0xee01, 0x2ec0, 0x2f80, 0xef41, 0x2d00, 0xedc1, 0xec81, 0x2c40,
0xe401, 0x24c0, 0x2580, 0xe541, 0x2700, 0xe7c1, 0xe681, 0x2640,
0x2200, 0xe2c1, 0xe381, 0x2340, 0xe101, 0x21c0, 0x2080, 0xe041,
0xa001, 0x60c0, 0x6180, 0xa141, 0x6300, 0xa3c1, 0xa281, 0x6240,
0x6600, 0xa6c1, 0xa781, 0x6740, 0xa501, 0x65c0, 0x6480, 0xa441,
0x6c00, 0xacc1, 0xad81, 0x6d40, 0xaf01, 0x6fc0, 0x6e80, 0xae41,
0xaa01, 0x6ac0, 0x6b80, 0xab41, 0x6900, 0xa9c1, 0xa881, 0x6840,
0x7800, 0xb8c1, 0xb981, 0x7940, 0xbb01, 0x7bc0, 0x7a80, 0xba41,
0xbe01, 0x7ec0, 0x7f80, 0xbf41, 0x7d00, 0xbdc1, 0xbc81, 0x7c40,
0xb401, 0x74c0, 0x7580, 0xb541, 0x7700, 0xb7c1, 0xb681, 0x7640,
0x7200, 0xb2c1, 0xb381, 0x7340, 0xb101, 0x71c0, 0x7080, 0xb041,
0x5000, 0x90c1, 0x9181, 0x5140, 0x9301, 0x53c0, 0x5280, 0x9241,
0x9601, 0x56c0, 0x5780, 0x9741, 0x5500, 0x95c1, 0x9481, 0x5440,
0x9c01, 0x5cc0, 0x5d80, 0x9d41, 0x5f00, 0x9fc1, 0x9e81, 0x5e40,
0x5a00, 0x9ac1, 0x9b81, 0x5b40, 0x9901, 0x59c0, 0x5880, 0x9841,
0x8801, 0x48c0, 0x4980, 0x8941, 0x4b00, 0x8bc1, 0x8a81, 0x4a40,
0x4e00, 0x8ec1, 0x8f81, 0x4f40, 0x8d01, 0x4dc0, 0x4c80, 0x8c41,
0x4400, 0x84c1, 0x8581, 0x4540, 0x8701, 0x47c0, 0x4680, 0x8641,
0x8201, 0x42c0, 0x4380, 0x8341, 0x4100, 0x81c1, 0x8081, 0x4040
};
#endif
#if !ONLY_CRC16
/* CRC-CCITT is based on the polynomial x^16 + x^12 + x^5 + 1. Bits */
/* are sent MSB to LSB. */
unsigned int get_crc_ccitt(unsigned int crc,unsigned int *buf,unsigned long size )
{
#if !(FAST_CRC & !MAKE_TABS)
register int i;
#endif
while (size--) {
#if FAST_CRC & !MAKE_TABS
crc = (crc << 8) ^ crc_ccitt_tab[ (crc >> 8) ^ *buf++ ];
#else
crc ^= (WORD)(*buf++) << 8;
for (i = 0; i < 8; i++) {
if (crc & 0x8000)
crc = (crc << 1) ^ 0x1021;
else
crc <<= 1;
}
#endif
} return crc;
}
#endif
/* CRC-16 is based on the polynomial x^16 + x^15 + x^2 + 1. Bits are */
/* sent LSB to MSB. */
unsigned int get_crc_16(unsigned int crc,unsigned int *buf,unsigned long size )
{
#if !(FAST_CRC & !MAKE_TABS)
register unsigned int i;
register unsigned int ch;
#endif
while (size--) {
#if FAST_CRC & !MAKE_TABS
crc = (crc >> 8) ^ crc_16_tab[ (crc ^ *buf++) & 0xff ];
crc = crc & 0xffff;
#else
ch = *buf++;
for (i = 0; i < 8; i++) {
if ((crc ^ ch) & 1)
crc = (crc >> 1) ^ 0xa001;
else
crc >>= 1;
ch >>= 1;
}
#endif
} return (crc & 0xffff);
}
unsigned int get_crc_16b(unsigned int crc,unsigned int *buf,unsigned long size )
{
unsigned int x, dword, byte;
unsigned long i;
for (i = 0; i < size; i++)
{
x = i % 2;
dword = buf[i/2];
// dword = *buf;
if (x == 0)
{
byte = ((dword >> 8)&0xFF);
}
if (x == 1)
{
byte = (dword & 0xFF);
}
crc = (crc >> 8) ^ crc_16_tab[ (crc ^ (byte) ) & 0xff ];
crc = crc & 0xffff;
// crc = crc + ((byte) & 0xff);
}
return (crc & 0xffff);
}
int get_crc16(unsigned int *buf, int size )
{
int crc16,i,j;
crc16=0xFFFF;
for(i=0;i<size;i++)
{
crc16=crc16^(buf[i]&0xFF);
for (j=0;j<8;j++)
if(crc16&1) crc16=(crc16>>1)^Poln;
else crc16=crc16>>1;
crc16=crc16^((buf[i]>>8)&0xFF);
for (j=0;j<8;j++)
if(crc16&1) crc16=(crc16>>1)^Poln;
else crc16=crc16>>1;
}
return crc16;
}

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#include "DSP2833x_Device.h" // DSP2833x Headerfile Include File
#include "DSP2833x_SWPrioritizedIsrLevels.h"
#include "filter_bat2.h"
#include "measure.h"
#include "package.h" // DSP281x Headerfile Include File
#include "ecan.h" // DSP281x Headerfile Include File
#include "tools.h" // DSP281x Headerfile Include File
#include "RS485.h"
#include "message.h"
#include "peripher.h"
// Prototype statements for functions found within this file.
interrupt void CANa_handler(void);
interrupt void CANa_reset_err(void);
// Global variable for this example
Uint32 ErrorCount;
Uint32 MessageReceivedCount;
Uint32 MessageTransivedCount=0;
Uint32 TestMbox1 = 0;
Uint32 TestMbox2 = 0;
Uint32 TestMbox3 = 0;
int CanTimeOutErrorTR = 0;
int wait=0;
void InitCan(int Port, int DevNum)
{
struct ECAN_REGS ECanShadow;
volatile struct ECAN_REGS * ECanRegs;
volatile struct ECAN_MBOXES * ECanMboxes;
volatile struct MOTO_REGS * ECanMOTORegs;
long id = 0x80BA0000;
DevNum--;
if(DevNum<0)DevNum=0;
if(DevNum>15)DevNum=15;
// Configure CAN pins using GPIO regs here
EALLOW;
ECanRegs = &ECanaRegs;
ECanMboxes = &ECanaMboxes;
ECanMOTORegs = &ECanaMOTORegs;
GpioCtrlRegs.GPAMUX2.bit.GPIO30 = 1;
GpioCtrlRegs.GPAMUX2.bit.GPIO31 = 1;
// Configure the eCAN RX and TX pins for eCAN transmissions
ECanRegs->CANTIOC.all = 8; // only 3rd bit, TXFUNC, is significant
ECanRegs->CANRIOC.all = 8; // only 3rd bit, RXFUNC, is significant
// Specify that 8 bits will be sent/received
ECanMboxes->MBOX0.MSGCTRL.all = 0x00000008;
ECanMboxes->MBOX1.MSGCTRL.all = 0x00000008;
// Disable all Mailboxes
// Required before writing the MSGIDs
ECanRegs->CANME.all = 0;
// çàäàåì àäðåñ 0 àùèêa íà ïåðåäà÷ó
ECanMboxes->MBOX0.MSGID.all = id + 0x10 + DevNum;
// çàäàåì àäðåñ 1 àùèêa íà ïðèåì
ECanMboxes->MBOX1.MSGID.all = id + DevNum; //ïîìåíàòü!!!! 1 è 0!!!
// çàäàåì ðåæèìû ðàáîòû àùèêa 0 íà ïåðåäà÷ó, îñòàëüíûå íà ïðèåì
ECanRegs->CANMD.all = 0xFFFFFFFE;
// âûáèðàåì òîëüêî 2 àùèêa äëà ðàáîòû, îñòàëüíûå çàïðåùàåì
ECanRegs->CANME.all = 0x00000003;
// Clear all TAn bits
ECanRegs->CANTA.all = 0xFFFFFFFF;
// Clear all RMPn bits
ECanRegs->CANRMP.all = 0xFFFFFFFF;
// Clear all interrupt flag bits
ECanRegs->CANGIF0.all = 0xFFFFFFFF;
ECanRegs->CANGIF1.all = 0xFFFFFFFF;
// Clear all error and status bits
ECanRegs->CANES.all=0xffffffff;
// Request permission to change the configuration registers
ECanShadow.CANMC.all = 0;
ECanShadow.CANMC.bit.MBCC = 1; // Mailbox timestamp counter clear bit
ECanShadow.CANMC.bit.TCC = 1; // Time stamp counter MSB clear bit
ECanShadow.CANMC.bit.SCB = 1; // eCAN mode (reqd to access 32 mailboxes)
ECanShadow.CANMC.bit.WUBA = 1; // Wake up on bus activity
ECanShadow.CANMC.bit.ABO = 1; // Auto bus on
ECanShadow.CANMC.bit.CCR = 1;
// ECanShadow.CANMC.bit.STM = 1; // self-test loop-back
ECanRegs->CANMC.all = ECanShadow.CANMC.all;
while(!ECanRegs->CANES.bit.CCE); // Wait for CCE bit to be set..
// íàñòðèâàåì ñêîðîñòü CAN
ECanShadow.CANBTC.all = ECanRegs->CANBTC.all;
ECanShadow.CANBTC.bit.SJWREG=1;
ECanShadow.CANBTC.bit.BRPREG = (CLKMULT * 3) - 1;
ECanShadow.CANBTC.bit.TSEG1REG = 15;
ECanShadow.CANBTC.bit.TSEG2REG = 2;
ECanRegs->CANBTC.all = ECanShadow.CANBTC.all;
ECanShadow.CANMC.bit.CCR = 0; // Set CCR = 0
ECanRegs->CANMC.all = ECanShadow.CANMC.all;
while(ECanRegs->CANES.bit.CCE); // Wait for CCE bit to be cleared..
// çàäàåì òàéìàóòû äëà îæèäàíèà îòïðàâêè ïîëó÷åíèà ïîñûëêè
ECanMOTORegs->MOTO0 = 550000;
ECanMOTORegs->MOTO1 = 550000;
ECanRegs->CANTOC.all = 1;
ECanRegs->CANTOS.all = 0; // clear all time-out flags
ECanRegs->CANTSC = 0; // clear time-out counter
ECanShadow.CANGIM.all = 0;
ECanRegs->CANMIM.all = 2; // Enable interrupts of box 1
ECanRegs->CANMIL.all = 0x00000000; // All mailbox interrupts are generated on interrupt line 0.
ECanShadow.CANGIM.bit.I0EN = 1;
ECanShadow.CANGIM.bit.MTOM = 1;
ECanShadow.CANGIM.bit.I1EN = 1;
ECanShadow.CANGIM.bit.GIL = 1;
ECanRegs->CANGIM.all = ECanShadow.CANGIM.all;
PieVectTable.ECAN0INTA = &CANa_handler;
PieCtrlRegs.PIEIER9.bit.INTx5=1; // PIE Group 9, INT6
PieVectTable.ECAN1INTA = &CANa_reset_err;
PieCtrlRegs.PIEIER9.bit.INTx6=1; // PIE Group 9, INT6
IER |= M_INT9; // Enable CPU INT
EDIS;
// çàâåðøèëè íàñòðîéêó CAN àùèêîâ
MessageReceivedCount = 0;
ErrorCount = 0;
CanTimeOutErrorTR=0;
MessageTransivedCount=0;
}
void CAN_send(int Port, int data[], int Addr)
{
unsigned long hiword,loword;
volatile struct ECAN_REGS * ECanRegs;
volatile struct ECAN_MBOXES * ECanMboxes;
ECanRegs = &ECanaRegs;
ECanMboxes = &ECanaMboxes;
if(wait)
if(!(ECanRegs->CANTA.all & 1))
if(!(ECanRegs->CANAA.all & 1))
return;
ECanRegs->CANTA.all = 1;
ECanRegs->CANAA.all = 1;
hiword= ((((Uint32) Addr ) & 0xffff)<<16)| 0xE0000000 |
((((Uint32)data[Addr ]) & 0xffff) );
loword= ((((Uint32)data[Addr+1]) & 0xffff)<<16)|
((((Uint32)data[Addr+2]) & 0xffff) );
ECanMboxes->MBOX0.MDH.all = hiword;
ECanMboxes->MBOX0.MDL.all = loword;
EALLOW;
ECanRegs->CANTSC = 0; // clear time-out counter
EDIS;
ECanRegs->CANTRS.all = 1; // çàïóñòèòü ïåðåäà÷ó
wait=1;
led1_toggle();
}
void Handlai(volatile struct ECAN_MBOXES * ECanMboxes)
{
unsigned int adr;
unsigned int bit[3];
unsigned long hiword,loword;
int Data[3];
Lonely=0;
hiword = ECanMboxes->MBOX1.MDH.all;
loword = ECanMboxes->MBOX1.MDL.all;
adr = (hiword >> 16);
bit[0] = adr & 0x8000;
bit[1] = adr & 0x4000;
bit[2] = adr & 0x2000;
adr &= 0x1fff;
Data[0] = (hiword ) & 0xffff;
Data[1] = (loword>>16) & 0xffff;
Data[2] = (loword ) & 0xffff;
if(bit[0]) if(adr < ANSWER_LEN) modbus[adr] = Data[0]; adr++;
if(bit[1]) if(adr < ANSWER_LEN) modbus[adr] = Data[1]; adr++;
if(bit[2]) if(adr < ANSWER_LEN) modbus[adr] = Data[2];
led2_toggle();
}
interrupt void CANa_handler(void)
{
// Set interrupt priority:
volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER9.all;
IER |= M_INT9;
IER &= MINT9; // Set "global" priority
PieCtrlRegs.PIEIER9.all &= MG95; // Set "group" priority
PieCtrlRegs.PIEACK.all = 0xFFFF; // Enable PIE interrupts
EINT;
Handlai(&ECanaMboxes);
ECanaRegs.CANRMP.all = 2;
PieCtrlRegs.PIEACK.bit.ACK9 |= 1;
// Restore registers saved:
DINT;
PieCtrlRegs.PIEIER9.all = TempPIEIER;
}
interrupt void CANa_reset_err(void)
{
// Set interrupt priority:
volatile Uint16 TempPIEIER = PieCtrlRegs.PIEIER9.all;
IER |= M_INT9;
IER &= MINT9; // Set "global" priority
PieCtrlRegs.PIEIER9.all &= MG96; // Set "group" priority
PieCtrlRegs.PIEACK.all = 0xFFFF; // Enable PIE interrupts
EINT;
ECanaRegs.CANTRR.all = 1;
CanTimeOutErrorTR++;
PieCtrlRegs.PIEACK.bit.ACK9 |= 1;
// Restore registers saved:
DINT;
PieCtrlRegs.PIEIER9.all = TempPIEIER;
}
//===========================================================================
// No more.
//===========================================================================

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#include "filter_bat2.h"
float filterbat(FILTERBAT *b, float InpVarCurr)
{
float y;
y = (b->k_0 * (InpVarCurr + (b->i_0*2) + b->i_1)) +
(b->k_1 * b->u_0) + (b->k_2 * b->u_1);
b->u_1=b->u_0;
b->u_0=y;
b->i_1=b->i_0;
b->i_0=InpVarCurr;
return y;
}

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#include "DSP2833x_Device.h" // DSP281x Headerfile Include File
#include "DSP2833x_SWPrioritizedIsrLevels.h"
#include "filter_bat2.h"
#include "measure.h"
#include "RS485.h"
#include "message.h"
#include "kanal.h"
#include "pulto.h"
#include "package.h"
#include "tools.h"
#include "peripher.h"
int digits[16] = {63,6,91,79,102,109,125,7,127,111,64,0,0,0,121,0};
int readr[5] = {0x08,0x0C,0x10,0x00,0x04};
void DCLK(int x)
{
if(x) GpioDataRegs.GPASET.bit.GPIO6=1;
else GpioDataRegs.GPACLEAR.bit.GPIO6=1;
}
void DOUT(int x)
{
if(x) GpioDataRegs.GPASET.bit.GPIO8=1;
else GpioDataRegs.GPACLEAR.bit.GPIO8=1;
}
#if CLKMULT==1
#define POWS0 0L
#define POWS1 10L
#endif
#if CLKMULT==2
#define POWS0 0L
#define POWS1 30L
#endif
#if CLKMULT==3
#define POWS0 1L
#define POWS1 50L
#endif
#if CLKMULT==4
#define POWS0 2L
#define POWS1 60L
#endif
#if CLKMULT==5
#define POWS0 4L
#define POWS1 80L
#endif
void RESET()
{
DCLK(0);
#if POWS1>0
DSP28x_usDelay(POWS1);
#endif
DOUT(1);
#if POWS1>0
DSP28x_usDelay(POWS1);
#endif
DOUT(0);
#if POWS1>0
DSP28x_usDelay(POWS1);
#endif
}
void SENDBIT(int x)
{
DOUT(x); DCLK(1);
#if POWS0>0
DSP28x_usDelay(POWS0);
#endif
DCLK(0); DOUT(0);
#if POWS1>0
DSP28x_usDelay(POWS1);
#endif
}
void kanal_Send(int adr, long dat, int dot)
{
long Word,data,aliq_part,dg[4];
int i,j,bit,byt,addr,sgn=0,punkt=0,aliq_len=0,full_len, isdot=0;
if(adr>1) // Ëàìïî÷êè
{
Word =dat;
}
else
{
if(dat<0) sgn=1;
data = labs(dat);
if(dot>=0 && dot<4) isdot = 1;
else dot=0;
aliq_part = data;
for(i=0;i<dot;i++) aliq_part/=10;
dat = aliq_part;
while(dat>0)
{
aliq_len++; dat/=10;
}
dat = data;
full_len = aliq_len+sgn;
if(full_len==0) full_len=1;
full_len += dot;
for(i=0; i<(full_len-4);i++)
{
dot--; dat/=10;
}
if(dot<0) dot=0;
punkt = 1<<dot;
if(punkt==1) punkt=0;
dg[3] = (dat)/1000;
dg[2] = (dat%1000)/100;
dg[1] = (dat%100)/10;
dg[0] = (dat%10);
if(dg[0]+dg[1]+dg[2]+dg[3]==0)
{
punkt=0; dot=0; sgn=0;
}
if(isdot)
for(i=3;i>0;i--)
{
if((dg[i]==0)&&(i!=dot))
dg[i]=0xF; // Ýòî çíà÷èò ïóñòî
else break;
}
if(sgn)
for(i=1;i<4;i++)
{
if( (dg[i]==0xF)||(i==3))
{
dg[i]=0xA; // Ýòî çíà÷èò ìèíóñ
break;
} }
for(i=0;i<4;i++)
{
dg[i] = digits[dg[i]];
if((punkt>>i)&1) dg[i]+= 128;
}
Word = ((dg[0] ) & 0x000000FF) | ((dg[1]<<8 ) & 0x0000FF00) |
((dg[2]<<16) & 0x00FF0000) | ((dg[3]<<24) & 0xFF000000);
}
addr = readr[adr];
for (i=0;i<4;i++)
{
if(addr>0x10) break;
for (j=0;j<8;j++)
{
bit = Word & 1; Word >>= 1;
SENDBIT(bit);
}
byt = addr;
for (j=0;j<6;j++)
{
bit = byt & 1; byt >>= 1;
SENDBIT(bit);
}
addr++;
RESET();
}
}

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/****************************************************************/
/* TMS320C32 */
/* ====== BIOS, ÊËÀÈÍ, ÊËÂÑÏ ====== */
/* ÖÍÈÈ ÑÝÒ (ñ) 1998-2001ã. */
/****************************************************************/
/* log_to_mem.c
****************************************************************
* Çàïèñü ëîãîâ â ïàìyòü *
****************************************************************/
#include "log_to_mem.h"
int no_write = 0,
never_write = 0; // Ôëàãè, ÷òîáû íå ïèñàòü (åñëè ÷òî)
#pragma DATA_SECTION(logs_block,".logg");
unsigned int logs_block[0xFA00];
LOG Log;
unsigned int flog=0;
// Î÷èùåíèå ïàìàòè, ãäå ëîãè ëåæàò
void clear_mem()
{
unsigned long i;
Log.Start = LOG_PAGE_START;
Log.Finis = LOG_PAGE_START + LOG_PAGE_LEN;
Log.Adres = Log.Start;
Log.Circl = 0;
for (i=Log.Start; i<Log.Finis; i++)
*(volatile int *)i = 0;
}

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#include "DSP2833x_Device.h" // DSP2833x Headerfile Include File
#include "cntrl_adr.h"
#include "RS485.h"
#include "BIOS_DSP.h"
#include "Message.h"
#include "filter_bat2.h"
#include "measure.h"
#include "package.h"
#include "spise2p.h"
#include "tools.h"
#include "peripher.h"
#include "ADC.h"
#include "DAC.h"
#include "ecan.h"
#include "kanal.h"
#include "pulto.h"
#include "log_to_mem.h"
#include "measure.h"
extern void DSP28x_usDelay(Uint32 Count);
void timer_Init()
{
EALLOW; // This is needed to write to EALLOW protected registers
if(Desk==dsk_EPLT) PieVectTable.XINT13 = &cpu_timer1_isr_PULT;
else PieVectTable.XINT13 = &cpu_timer1_isr_SENS;
EDIS; // This is needed to disable write to EALLOW protected registers
ConfigCpuTimer(&CpuTimer1, SYSCLKOUT/1000000, 1000000/READY_FREQ);
CpuTimer1Regs.TCR.all = 0x4020; // Use write-only instruction to set TSS bit = 0
IER |= M_INT13;
}
void main()
{
int i,j,mask;
static unsigned int cancount[2], cancell[2];
static int preCstart=1,preCstop=1;
RS_DATA * rs;
int presbyt=0;
InitSysCtrl();
// Disable CPU interrupts and clear all CPU interrupt flags:
DINT;
InitPieCtrl();
IER = 0x0000;
IFR = 0x0000;
InitPieVectTable();
init_zone7();
create_uart_vars(sizeof(CMD_TO_TMS));
setup_uart(COM_1,115200);
setup_uart(COM_2,115200);
InitSeeprom();
setup_leds_line();
led1_on();
led2_off();
for (i=0;i<10;i++)
{
pause_us(50000);
led2_toggle();
led1_toggle();
}
led1_off();
led2_off();
clear_mem();
get_Mode();
InitCan(0,Mode);
set_cntrl_addr(Mode,16);
timer_Init();
EnableInterrupts();
if(Desk!=dsk_EPLT)
{
setup_adc();
Init_sensors();
}
Init_packMask();
Load_params();
Init_sensors_more();
if(Desk==dsk_LOAD)
Setup_DAC_time();
LastMode = Mode;
EALLOW;
SysCtrlRegs.WDCR= 0x2F;
EDIS;
while(1)
{
if(CanGO)
{
CanGO=0;
for(i=0;i<2;i++)
if(Cancount[i])
if(++cancount[i] >= Cancount[i])
{
cancount[i] = 0;
while(1)
{
if(cancell[i] >= 0x80) cancell[i]=0;
mask = Maska[i][cancell[i]/16] >> (cancell[i]%16);
if(!mask) cancell[i] = (cancell[i] + 0x10) & 0xFFF0;
else
{
while(!(mask & 1))
{
cancell[i]++; mask >>= 1;
}
break;
} }
CAN_send(0,modbus,cancell[i]);
cancell[i]+=3;
} }
if(cDefParam)
{
cDefParam=0;
Default_params();
}
if(cSaveParam)
{
cSaveParam=0;
Save_params();
}
if(cLoadParam)
{
cLoadParam=0;
Load_params();
}
if(cKoefCalc)
{
cKoefCalc=0;
calc_sensor_koef();
}
get_Buttons();
if(WAKEpowse) bTermoCal=0;
if(!bTermoCal & presbyt) cSaveParam=1;
presbyt = bTermoCal;
if(Desk==dsk_LOAD)
{
if(cUMPstart & !preCstart)
{
set_START_DPTB(); set_RES_OUT_2();
IMPowse = READY_FREQ;
}
preCstart = cUMPstart;
if(cUMPreset & !preCstop)
{
set_STOP_DPTB(); clear_RES_OUT_2();
IMPowse = READY_FREQ;
}
preCstop = cUMPreset;
if(!IMPowse) { clear_START_DPTB(); clear_STOP_DPTB(); }
}
for(i=0;i<2;i++)
{
if(i) rs = &rs_a;
else rs = &rs_b;
j = get_command(rs);
if(j!=-1)
{
Lonely=0;
led2_toggle();
switch(j)
{
case CMD_INIT: init(rs); break; // íà÷àëüíûå óñòàíîâêè
case CMD_INITLOAD: initload(rs); break; // íàñòðîéêà çàãðóçêè
case CMD_RUN: run(rs); break; // çàãðóçèòü áëîê
case CMD_LOAD: load(rs); break; // çàãðóçèòü áëîê
case CMD_PEEK: peek(rs); break; // ïðî÷èòàòü à÷åéêó ïàìàòè
case CMD_POKE: poke(rs); break; // çàïèñàòü â à÷åéêó ïàìàòè
case CMD_UPLOAD: upload(rs); break; // ïåðåäàòü áëîê ïàìàòè
case CMD_EXTEND: extendbios(rs); break; // ðàñøèðåííûå êîìàíäû äëà áèîñà
case CMD_TFLASH: tflash(rs); break; // ïðîøèòü TMS
case CMD_MODBUS_3: ReceiveCommandModbus3(rs); break;
case CMD_MODBUS_6: ReceiveCommandModbus6(rs); break;
default: break;
} } } } }

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#include "DSP2833x_Device.h" // DSP2833x Headerfile Include File
#include "DSP2833x_SWPrioritizedIsrLevels.h"
#include "filter_bat2.h"
#include "package.h"
#include "measure.h"
#include "package.h"
#include "peripher.h"
#include "ADC.h"
#include "DAC.h"
#include "RS485.h"
#include "message.h"
#include "log_to_mem.h"
#include <math.h> // Ýòî ÷òîáû ìåðèòü àìïëèòóäó! sqrt áåç ýòîãî áóäåò êðèâ!!!
unsigned int CanPowse=CANPOWSE,CanGO=0;
unsigned int Maska[2][8];
int TPL_CANS=0; // Êîëè÷åñòâî òåìïåðàòóðíûõ êàíàëîâ
int tpl_cans=0;
int cal_addr=0;
int period_ready, period_blink;
FLAG chk,sig;
long time_1_5sec, time_5msec, time_5sec;
int READY = 1 * ADC_FREQ;
int WAKE = 3 * ADC_FREQ;
long low_count[2] = {0,0};
long err_count[6];
int lev_count[6];
float lev_quadr[6];
float zer_count[4];
int sens_type[16];
int sens_pair[16];
long din_count[32];
unsigned int Caliber_time = 0;
int Curr_Edge;
float powK[] =
{
0.127, // ïèòàíèå 380Â
0.127, // ïèòàíèå 380Â
1.000, // òîê
1.000, // íàïðàæåíèå
0.0076, // ïèòàíèå 31Â
0.0076, // ïèòàíèå 24Â
0.0076, // ïèòàíèå 24Â
0.0076, // ïèòàíèå 15Â
1.0000, // òåðìîäàò÷èê ìåëêîñõåìà
};
FILTERBAT def_FILTERBAT = DEF_FILTERBAT;
FILTERBAT adc_filter[20+4]; // ìàêñ.TPL*2 + 4 êàëèáð
FILTERBAT out_filter[20+4]; // ìàêñ.TPL*2 + 4 íàïðàæ
FILTERBAT zer_filter[4]; // 4 íàïðàæ
long sens_count[24+4];
float K100,K_50;
float K_T1,K_T2;
interrupt void cpu_timer1_isr_SENS(void);
/********************************************************************/
/* Ðàñ÷åò ìîäóëà òîêà èç ïîêàçàíèé äâóõ ôàç */
/********************************************************************/
float im_calc(float ia,float ib)
{
float isa,isb;
isa = - 1.5 * (ia + ib);
isb = COSPi6 * (ia - ib);
return (2*sqrt(isa*isa+isb*isb)/3);
}
void calc_sensor_koef()
{
int i;
K_T1 = 100.0/(K400_1 - K300_1);
K_T2 = 100.0/(K400_2 - K300_2);
for(i=0;i<4;i++)
{
powK[i] = Caliber[i];
if(sens_type[i]==CURRENT) powK[i]/=1000.0;
else powK[i]/=10000.0;
} }
interrupt void cpu_timer1_isr_SENS(void)
{
static unsigned int
count_blink=0, count_bright=0, count_mode,
blink_over, blink_alarm, work_lamp, heat_lamp, power_lamp;
static int preTest;
int TST;
#define err_lamp work_lamp // ýòî äëà øêàïà,
#define alm_lamp heat_lamp // ÷òîá áûëî ïîíàòíåå
EALLOW;
CpuTimer1.InterruptCount++;
IER |= M_INT13; // Set "global" priority
IER &= MINT13; // Set "global" priority
EINT;
EDIS; // This is needed to disable write to EALLOW protected registers
if(!cReset) ServiceDog();
if(++CanPowse >= CANPOWSE)
{
CanPowse = 0;
CanGO = 1;
}
TST = cTestLamp|bTestLamp;
if(!sig.bit.Error|TST) toggle_READY();
else clear_READY();
if(Desk==dsk_LOAD)
{
Load_runner();
return;
}
if(++count_bright == maximum_bright)
{
count_bright = 0 ;
if( ((Desk==dsk_SHKF) && power_lamp) ||
((Desk==dsk_COMM) && heat_lamp) ) set_RES_OUT_1();
else clear_RES_OUT_1();
if(work_lamp) set_LED_OUT_1(); // Îíà æå err_lamp äëà øêàïà
else clear_LED_OUT_1();
if(heat_lamp) set_LED_OUT_2(); // Îíà æå alm_lamp äëà øêàïà
else clear_LED_OUT_2();
}
if(!TST)
if(count_bright == Brightness)
{
clear_LED_OUT_1();
clear_LED_OUT_2();
clear_RES_OUT_1();
}
if(TST & !preTest)
{
count_blink = BLINK_TIME;
count_mode = 0;
}
preTest = TST;
if(++count_blink >= BLINK_TIME)
{
count_blink=0;
count_mode++;
blink_over = (count_mode & 1)?1:0;
blink_alarm = (count_mode & 7)?1:0;
if(TST)
{
heat_lamp = blink_over;
work_lamp = blink_over;
power_lamp= blink_over;
}
else
{
if(Mode==adr_SHKF)
{
power_lamp= 1;
if(sig.bit.Alarm){// power_lamp= blink_alarm;
alm_lamp = blink_over; }
else alm_lamp = 0;
if(sig.bit.Error){ power_lamp= blink_over;
err_lamp = blink_over; }
else err_lamp = 0;
}
else
{
// if(sig.bit.Error) work_lamp = blink_over;
// else if(sig.bit.Alarm) work_lamp = blink_alarm;
// else
work_lamp = 1;
if(bSecretBt|cSecretBt) work_lamp = blink_alarm;
if(sig.bit.OverHeat) heat_lamp = 1;
else if(sig.bit.SubHeat) heat_lamp = blink_over;
else if(sig.bit.OutHeat) heat_lamp = !blink_alarm;
else heat_lamp = 0;
} } } }
void Init_sensors()
{
int i;
DigErr.all=0;
time_1_5sec = (3 * ADC_FREQ) / 2;
time_5msec = (5 * ADC_FREQ) / 1000;
time_5sec = (5 * ADC_FREQ);
for(i=0;i<16;i++)
{
sens_type[i]=0;
sens_pair[i]=i;
}
if(Desk==dsk_LOAD)
{
sens_type[0]=VOLTAGE; sens_pair[0]=1;
sens_type[1]=VOLTAGE; sens_pair[1]=0;
sens_type[2]=CURRENT; sens_pair[2]=3;
sens_type[3]=CURRENT; sens_pair[3]=2;
Curr_Edge = 300;
}
if(Desk==dsk_COMM)
{
Curr_Edge = 200;
for(i=0;i<4;i++)
{
sens_type[i]=VOLTAGE;
sens_pair[i] = (i&2)| !(i&1);
} }
if(Mode==adr_SHKF)
{
sens_type[0] = POWER_380; sens_pair[0]=1;
sens_type[1] = POWER_38O; sens_pair[1]=0;
sens_type[2] = POWER_31; sens_pair[2]=3;
sens_type[3] = POWER_31; sens_pair[3]=2;
sens_type[4] = POWER_31; sens_pair[4]=5;
sens_type[5] = POWER_31; sens_pair[5]=4;
sens_type[6] = POWER_24;
sens_type[7] = POWER_27;
sens_type[8] = POWER_24;
sens_type[9] = POWER_15;
sens_type[10] = POWER_24;
sens_type[11] = POWER_24;
sens_type[12] = POWER_24;
sens_type[13] = TERMO_AD;
sens_type[14] = TERMO_AD;
// sens_type[15] = TERMO_AD;
}
for(i=0;i<6; i++)
{
err_count[i] = 0;
lev_count[i] = 0;
lev_quadr[i] = 0;
}
for(i=0;i<28;i++) sens_count[i] = 0;
for(i=0;i<32;i++) din_count[i] = 0;
for(i=0;i<24;i++)
{ adc_filter[i] = def_FILTERBAT;
out_filter[i] = def_FILTERBAT;
}
for(i=0;i<4; i++)
zer_filter[i] = def_FILTERBAT;
switch(Mode)
{
case adr_TRN1:
case adr_TRN2:
TPL_CANS = TPL_TRN; tpl_cans = TPL_TRN*2; cal_addr = tpl_cans; break;
case adr_POW1:
case adr_POW2:
TPL_CANS = TPL_POW; tpl_cans = TPL_POW*2; cal_addr = tpl_cans; break;
case adr_ENG1:
TPL_CANS = TPL_ENG; tpl_cans = TPL_ENG; cal_addr = tpl_cans; break;
case adr_SHKF:
tpl_cans = TPL_SHK; cal_addr = tpl_cans-2; break;
} }
void Init_sensors_more()
{
int i;
for(i=0;i<24;i++) modbus[i] &= NOER;
for(i=0;i<4; i++) zer_count[i] = Zero_lev[i];
for(i=0;i<24;i++)
{
if(sens_type[i]==VOLTAGE)
{
if(i&1) sens_data[i]=560;
else sens_data[i]=390;
} }
if(Desk==dsk_COMM)
{
Modbus[tpl_cans+0].bit.bitE = 1; // Ignore
Modbus[tpl_cans+1].bit.bitE = 1; // Ignore
Modbus[tpl_cans+2].bit.bitE = 1; // Ignore
Modbus[tpl_cans+3].bit.bitE = 1; // Ignore
}
if(Desk==dsk_LOAD)
{
Modbus[0].bit.bitE = 1; // Ignore
Modbus[1].bit.bitE = 1; // Ignore
}
if(Kalibro) calc_sensor_koef();
}
void Init_packMask()
{
int i,j,can=0;
can = tpl_cans;
if(Kurrent) can+= 4;
for(i=0;i<2;i++)
for(j=0;j<8;j++) { Maska[i][j]=0; }
switch(Desk)
{
case dsk_EPLT:
Maska[m_SLOW][0]|= 0x000F; // Ïîëó÷åííîå
Maska[m_SLOW][6]|= 0x01FC; // ßðêîñòü ëàìï è îäèíî÷åñòâî
break;
default:
for(i=0;i<can;i++)
{
Maska[m_FAST][ i /16]|=(1<<( i %16)); // Äèàãíîñòèêà
Maska[m_FAST][(i+24)/16]|=(1<<((i+24)%16)); // Ïîêàçàíèà
}
for(i=0;i<3; i++)
Maska[m_SLOW][i+3] = Maska[m_FAST][i]; // Óñòàâêè
if(Desk==dsk_BKSD) Maska[m_SLOW][7]|= 0x0300; // Êàëèáðîâêà òåðìîäàò÷èêîâ
else
Maska[m_SLOW][7]|= 0x0F00; // Êàëèáðîâêà òåðìîäàò÷èêîâ
if(Kurrent)
{ Maska[m_SLOW][7]|= 0x000F; // Íîëü äàò÷èêîâ íàïðàæåíèà
Maska[m_FAST][6]|= 0x3F00; // Ôàçíûå çíà÷åíèà
}
if(Desk==dsk_LOAD)
{ Maska[m_SLOW][7]|= 0x0030; // Êàëèáðîâêà ÖÀÏ
Maska[m_FAST][7]|= 0xE000; // Äóáëèðîâàòü êîìàíäû
Maska[m_FAST][1]|= 0x3000; // Óïðàâëàþùèé òîê ÑÈÔÓ
} }
Maska[m_FAST][1]|= 0x0001; // Äèñêðåòíûå âõîäû
Maska[m_SLOW][6]|= 0x0007; // ßðêîñòü ëàìï è ïåðèîäû ïîñûëîê
Maska[m_SLOW][7]|= 0xE000; // Àäðåñ, êîìàíäû, è ÷òîá íå âûëàçèëî
Maska[1][6] = 0xF3FF;
Maska[1][7] = 0xC03F;
}
int er_anal(int term, long * count, long edge, int pre)
{
if (term)
{
if((*count)>=edge) return 1;
(*count)++; return pre;
}
if( (*count) == 0 ) return 0;
(*count)--; return pre;
}
void reset_errs(int sens, ERROR err)
{
unsigned int set;
set = sens_error[sens].all & NOER;
sens_error[sens].all = err.all | set;
sens_error[sens].bit.Ready = !(err.bit.Stop && (!sens_error[sens].bit.Ignor));
chk.bit.Error|= !(sens_error[sens].bit.Ready);
}
void Current_count(int chan)
{
float Numb,Current,Level;
static float aCurrent,Amplitude;
int sens, pair, ist, thrd, fazz, feed, no_ignor;
ERROR error;
if(Desk == dsk_LOAD)
if(!chan)
{
sig.all = chk.all;
chk.all = 0;
}
sens = tpl_cans + chan;
pair = sens_pair[chan];
ist = !(chan & 1);
feed = (chan >>1);
fazz = feed*3;
thrd = feed+4;
if(sens_error[sens].bit.Bypas)
{
sens_error[sens].all = 0;
sens_error[sens].bit.Bypas = 1;
sens_data[sens] = 0;
return;
}
Numb = adc_table_lem[chan];
modbus[0x64+chan] = Numb;
// Ñðåäíèé (îí æå íóëåâîé) óðîâåíü ïîêàçàíèé ÀÖÏ
zer_count[chan] += (Numb-zer_count[chan])/(5.0 * ADC_FREQ);
Zero_lev[chan] = (int)(filterbat(&zer_filter[chan],zer_count[chan]));
// Ìãíîâåííîå çíà÷åíèå ôàçû
Current = (Numb - Zero_lev[chan]) * powK[chan];
// Äåéñòâóþùåå (ñðåäíåêâàäðàòè÷íîå) çíà÷åíèå ôàçû
lev_quadr[chan] += ((Current*Current)-lev_quadr[chan])/(1.0 * ADC_FREQ);
lev_count[chan] = sqrt(lev_quadr[chan]);
// Çàïîìíèì
if(ist)
{
if(Desk==dsk_COMM) aCurrent =-Current;
else aCurrent = Current; // Çàïîìíèëè ìãíîâåííîå çíà÷åíèå - äëà àìïëèòóäû
}
else
{
// Âû÷èñëåíèå àìïëèòóäû
Amplitude = filterbat(&out_filter[sens], im_calc(Current,aCurrent));
if(sens_type[chan]==VOLTAGE)
if(Amplitude<20) Amplitude = 0;
if(sens_type[chan]==CURRENT)
if(Amplitude<75) Amplitude = 0;
Level = Amplitude / RADIX2;
sens_data[sens ] = Amplitude;
sens_data[sens-1] = Level;
// Äåéñòâóþùåå (ñðåäíåêâàäðàòè÷íîå) çíà÷åíèå òðåòüåé ôàçû
Numb =-Current-aCurrent;
lev_quadr[thrd] += (Numb*Numb-lev_quadr[thrd])/(1.0 * ADC_FREQ);
lev_count[thrd] = sqrt(lev_quadr[thrd]);
/*
if(!no_write)
{
Test_mem_limit(8);
Log_to_mem(Current);
Log_to_mem(aCurrent);
Log_to_mem(Numb);
Log_to_mem(lev_count[chan]);
Log_to_mem(lev_count[pair]);
Log_to_mem(lev_count[thrd]);
Log_to_mem(Amplitude);
Log_to_mem(Level);
}
*/
modbus[0x68+fazz ] = lev_count[pair];
modbus[0x68+fazz+1] = lev_count[chan];
modbus[0x68+fazz+2] = lev_count[thrd];
}
// Ýòî ìàêñèìàëüíîå
Numb = lev_count[chan];
if(Numb<lev_count[pair]) Numb = lev_count[pair];
if(Numb<lev_count[thrd]) Numb = lev_count[thrd];
// Çàøèòû!
error.all = 0;
no_ignor = !sens_error[chan].bit.Ignor;
if(er_anal( ((Numb-lev_count[chan])/Numb > 0.2) && (Numb>Curr_Edge),
&err_count[chan],time_1_5sec,0))
{
error.bit.Wry = 1;
error.bit.Stop = no_ignor;
}
if(er_anal( ((Numb-lev_count[thrd])/Numb > 0.2) && (Numb>Curr_Edge),
&err_count[thrd],time_1_5sec,0))
{
error.bit.Wry = 1;
error.bit.Stop = no_ignor;
}
if(Desk == dsk_LOAD)
if(!ist)
{
if(Level > sens_hi_edge[sens])
{
error.bit.Hyper = 1;
error.bit.Stop = no_ignor;
}
if(sens_type[chan]==VOLTAGE)
if(er_anal( (Level < sens_lo_edge[sens]),
&low_count[feed],time_1_5sec,0))
{
error.bit.Out = 1;
error.bit.Stop = no_ignor;
}
/* if(Level < sens_lo_edge[sens])
{
error.bit.Out = 1;
error.bit.Stop = no_ignor;
}
*/
if(sens_type[chan]==CURRENT)
if(Level > sens_lo_edge[sens])
{
error.bit.Over = 1;
} }
if(chan==1)
if(error.all)
if(!no_write)
{
Test_mem_limit(10);
Log_to_mem(Current);
Log_to_mem(aCurrent);
Log_to_mem(Numb);
Log_to_mem(lev_count[chan]);
Log_to_mem(lev_count[pair]);
Log_to_mem(lev_count[thrd]);
Log_to_mem(Amplitude);
Log_to_mem(Level);
Log_to_mem(Curr_Edge);
Log_to_mem(error.all);
}
if(!WAKE)
reset_errs(sens,error);
}
void Temper_count(int chan)
{
float Numb;
static int Temper;
int kun, no_ignor;
ERROR error;
if(!chan)
{
sig.all = chk.all;
chk.all = 0;
}
if(chan<tpl_cans)
if(sens_error[chan].bit.Bypas)
{
sens_error[chan].all = 0;
sens_error[chan].bit.Bypas = 1;
sens_data[chan] = 0;
return;
}
Numb = adc_table_tpl[chan];
if(cRawMeat)
{
sens_data[chan] = Numb;
return;
}
kun = chan - cal_addr;
if(TermoAD)
{
if(cTermoCal|bTermoCal)
{
if(Desk==dsk_SHKF)
if(Numb>2200) kun|=2;
if(kun>=0)
{
TCaliber[kun] = Numb;
calc_sensor_koef();
return;
} }
if(chan>tpl_cans) return;
// Kun èìåííî ÷òîá ñêîìïåíñèðîâàòü íå÷åòíîñòü
if(kun&1) Numb = (Numb-K300_2)*K_T2+ZERO;
else Numb = (Numb-K300_1)*K_T1+ZERO;
}
if(TermoRS)
{
if(kun>=0)
{
TCaliber[kun] = Numb;
K100 = 129.0/(K150_D - K100_D);
K_50 = 261.8/(K150_D - K100_D);
K_T1 = 129.0/(K150_1 - K100_1);
K_T2 = 129.0/(K150_2 - K100_2);
//modbus[68]=K_T1*10000;
//modbus[69]=K_T2*10000;
return;
}
if(Desk==dsk_BKSD)
{
sens_data[chan+8] = Numb;
if(chan<6) Numb = (Numb-K100_D)*K100;
else Numb = (Numb-K100_D)*K_50;// - 6.56;
}
else
{
if(chan&1) Numb = (Numb-K100_2)*K_T2;
else Numb = (Numb-K100_1)*K_T1;
}
if(Numb > -20) if(Numb < 200)
Numb = filterbat(&out_filter[chan],Numb*100)/100;
}
if(Numb < -20) Numb = -20;
if(Numb > 200) Numb = 200;
if(bSecretBt|cSecretBt) Numb = 40.0;
sens_data[chan] = (int)(Numb*10);
Temper = (int)Numb;
error.all = 0;
no_ignor = !sens_error[chan].bit.Ignor;
// Îáðûâ èëè íåèñïðàâíîñòü
if(Temper==-20 || Temper==200)
{
error.bit.Tear = 1;
chk.bit.OutHeat = no_ignor;
}
else
// Ïåðåãðåâ
if(((Temper>sens_hi_edge[chan]-Cooling) && (sens_error[chan].bit.Hyper)) ||
(Temper>sens_hi_edge[chan]) )
{
error.bit.Hyper = 1;
error.bit.Stop = no_ignor;
chk.bit.OverHeat= no_ignor;
}
else
// Ïðåäóïðåæäåíèå ïî òåìïåðàòóðå
if(Temper>sens_lo_edge[chan])
{
error.bit.Over = 1;
chk.bit.SubHeat = no_ignor;
}
if(!WAKE)
reset_errs(chan,error);
}
void Power_count(int chan)
{
float Numb;
int Power,ignor,bitt;
ERROR error;
if(!chan)
{
sig.all = chk.all;
chk.all = 0;
}
if(sens_error[chan].bit.Bypas)
{
sens_error[chan].all = 0;
sens_error[chan].bit.Bypas = 1;
sens_data[chan] = 0;
return;
}
error.all = 0;
ignor = sens_error[chan].bit.Ignor;
bitt = chan*2;
if(chan!=7)
{
error.bit.Discr1 = er_anal(((DigErr.all>>bitt)&1), &din_count[bitt], 1000, 0); bitt++;
error.bit.Discr2 = er_anal(((DigErr.all>>bitt)&1), &din_count[bitt], 1000, 0); bitt++;
}
if(chan==6)
{
error.bit.Discr3 = er_anal(((DigErr.all>>bitt)&1), &din_count[bitt], 1000, 0); bitt++;
error.bit.Discr4 = er_anal(((DigErr.all>>bitt)&1), &din_count[bitt], 1000, 0); bitt++;
}
error.bit.Contr = error.bit.Discr1 | error.bit.Discr2 | error.bit.Discr3 | error.bit.Discr4;
Numb = adc_table_tpl[chan];
if(cRawMeat)
{
sens_data[chan] = Numb;
return;
}
Power = Numb * powK[sens_type[chan]];
sens_data[chan] = Power;
if(Power <sens_lo_edge[chan])
{
error.bit.Out = 1;
if(sens_error[sens_pair[chan]].bit.Out)
{
if(!ignor)
error.bit.Stop = 1;
} }
/* Ïîâûøåííîå íàïðàæåíèå
if(Power > sens_hi_edge[chan])
{
error.bit.Hyper = 1;
if(!ignor)
error.bit.Stop = 1;
}
*/
if(error.all)
if(!ignor)
chk.bit.Alarm = 1;
if(!WAKE)
reset_errs(chan,error);
}

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#include "DSP2833x_Device.h" // DSP2833x Headerfile Include File
#include "package.h"
#include "RS485.h"
#include "crc16.h"
#include "cntrl_adr.h"
#include "bios_dsp.h"
#include "message.h"
#include "filter_bat2.h"
#include "measure.h"
#include "ADC.h"
#include "peripher.h"
#include "ecan.h"
#include "pulto.h"
#include "spise2p.h"
#include "caliber.h"
int modbus[ANSWER_LEN+1];
unsigned int param[ANSWER_LEN+1];
void Default_params()
{
unsigned int i,def;
int shkf_lo_edge[] = {300, // 380
300, // 38O
0, // 0
0, // 0
15, // 31
22, // 27
20, // 24
10, // 15
60}; // AD
int bright[] = {10,8,6,8,6,8};
for(i=0;i<ANSWER_LEN;i++)
{
Modbus[i].all = 0;
}
LastMode = Mode;
if(Desk == dsk_EPLT)
{
Cancount[m_FAST] = 2; // ïàóçà ìåæäó ïîñûëêàìè CAN
for(i=0;i<6;i++) Bright[i] = bright[i];
}
else
{
Cancount[m_FAST] = 10; // ïàóçà ìåæäó ïîñûëêàìè CAN
Brightness = 8;
}
Cancount[m_SLOW] = 101; // ïàóçà ìåæäó ïîñûëêàìè CAN
if(Kalibro)
{
def = Mode-3;
if(Mode==adr_SHKF) def=4;
for(i=0;i<8;i++) Caliber[i] = def_cal[def][i];
}
if(Desk == dsk_COMM)
{
for(i=0;i<TPL_POW*2;i++)
{
sens_hi_edge[i] = 70;
sens_lo_edge[i] = 60;
} }
if(Desk==dsk_BKSD)
{
for(i=0;i<6;i++)
{
sens_hi_edge[i] = 170;
sens_lo_edge[i] = 150;
}
for(i=6;i<8;i++)
{
sens_hi_edge[i] = 115;
sens_lo_edge[i] = 105;
} }
if(Desk==dsk_BKST)
for(i=0;i<TPL_TRN*2;i++)
{
sens_hi_edge[i] = 70;
sens_lo_edge[i] = 60;
}
if(Mode==adr_SHKF)
{
for(i=0;i<15;i++) sens_lo_edge[i] = shkf_lo_edge[sens_type[i]];
sens_hi_edge[13] = 70;
sens_hi_edge[14] = 70;
}
if(Desk==dsk_LOAD)
{
sens_hi_edge[0] = 420;
sens_hi_edge[1] = 420;
sens_hi_edge[2] = 900;
sens_hi_edge[3] = 900;
sens_lo_edge[0] = 300;
sens_lo_edge[1] = 300;
sens_lo_edge[2] = 800;
sens_lo_edge[3] = 800;
DAC_20 = Caliber[6];
DAC_04 = Caliber[7];
}
if(Kurrent)
for(i=0;i<4;i++)
Zero_lev[i] = 0x800;
Init_sensors_more();
}
void Load_params()
{
unsigned int i,crc;
Seeprom_read(0x3FFF-(ANSWER_LEN+1), param, (ANSWER_LEN+1)*2);
crc = get_crc16(param,ANSWER_LEN);
if( (crc==param[ANSWER_LEN]) &&
(crc !=0xFFFF) &&
(Mode == param[126]) )
{
for(i=0;i<ANSWER_LEN;i++) modbus[i] = param[i];
Commands=0;
}
else
{
Default_params();
Commands=0;
Save_params();
if(Desk == dsk_COMM)
{
cTermoCal =1;
Caliber_time = 0xFFFF;
} } }
void Save_params()
{
unsigned int i,dif=0;
for(i=0;i<ANSWER_LEN;i++)
if(param[i] != modbus[i])
{
param[i] = modbus[i];
dif=1;
}
if(dif)
{
param[ANSWER_LEN] = get_crc16(param,ANSWER_LEN);
Seeprom_write(0x3FFF-(ANSWER_LEN+1),param,(ANSWER_LEN+1)*2);
} }
/***************************************************************/
/***************************************************************/
/* Ïåðåäà÷à äàííûõ ïî ïðîòîêîëó ModBus - êîìàíäà 3
×òåíèå à÷ååê äàííûõ */
/***************************************************************/
/***************************************************************/
void ReceiveCommandModbus3(RS_DATA *rs_arr)
{
unsigned int crc, Address_MB, Length_MB, i;
// ïîëó÷èëè íà÷àëüíûé àäðåñ ÷òåíèà
Address_MB =/*(rs_arr->RS_Header[2] << 8) |*/ rs_arr->RS_Header[3];
// ïîëó÷èëè êîëè÷åñòâî ñëîâ äàííûõ
Length_MB = (rs_arr->RS_Header[4] << 8) | rs_arr->RS_Header[5];
/////////////////////////////////////////////////
// Îòñûëêà
/* Ïîñ÷èòàëè êîíòðîëüíóþ ñóììó ïåðåä ñàìîé ïîñûëêîé */
rs_arr->buffer[0] = CNTRL_ADDR;
rs_arr->buffer[1] = CMD_MODBUS_3;
rs_arr->buffer[2] = Length_MB*2;
for (i=0;i<Length_MB;i++)
{
rs_arr->buffer[3+i*2 ]=(Modbus[Address_MB+i].byt.byte_hi);
rs_arr->buffer[3+i*2+1]=(Modbus[Address_MB+i].byt.byte_lo);
}
crc = 0xffff;
crc = get_crc_16(crc, rs_arr->buffer, Length_MB*2+3);
rs_arr->buffer[Length_MB*2+3] = LOBYTE(crc);
rs_arr->buffer[Length_MB*2+4] = HIBYTE(crc);
rs_arr->buffer[Length_MB*2+5] = 0;
rs_arr->buffer[Length_MB*2+6] = 0;
rs_arr->buffer[Length_MB*2+7] = 0;
rs_arr->buffer[Length_MB*2+8] = 0;
rs_arr->flag_TIMEOUT_to_Send=true;
RS_Send(rs_arr, rs_arr->buffer, Length_MB*2+8);
return;
}
void ReceiveCommandModbus6(RS_DATA *rs_arr)
{
unsigned int Address_MB, Data_MB, i;
/////////////////////////////////////////////////
// Îòñûëêà
/* Îòïðàâëàåì íàçàä òî æå ñàìîå */
for (i=0;i<8;i++)
rs_arr->buffer[i] = rs_arr->RS_Header[i];
// ïîëó÷èëè íà÷àëüíûé àäðåñ çàïèñè
Address_MB = (/*(rs_arr->RS_Header[2] << 8) | */rs_arr->RS_Header[3]);
// ïîëó÷èëè ñëîâî äàííûõ
Data_MB = (rs_arr->RS_Header[4] << 8) | rs_arr->RS_Header[5];
Modbus[Address_MB].all = Data_MB;
rs_arr->flag_TIMEOUT_to_Send=true;
RS_Send(rs_arr, rs_arr->buffer, 10);
}

252
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#include "DSP2833x_Device.h" // DSP281x Headerfile Include File
#include "filter_bat2.h"
#include "measure.h"
#include "RS485.h"
#include "message.h"
#include "package.h"
#include "pulto.h"
#include "peripher.h"
#include "GPIO_table.h"
int Mode,Desk,TermoAD=0,TermoRS=0,TermoSW=0,Kurrent=0,Kalibro=0;
long INcount0=0,INcount1=0;
LONGE DigErr;
void setup_leds_line()
{
EALLOW;
GpioCtrlRegs.GPBMUX1.bit.GPIO32 = 0;
GpioCtrlRegs.GPBMUX2.bit.GPIO48 = 0;
GpioCtrlRegs.GPBDIR.bit.GPIO32 = 1;
GpioCtrlRegs.GPBDIR.bit.GPIO48 = 1;
EDIS;
}
void get_Mode()
{
EALLOW;
GpioCtrlRegs.GPAMUX1.all &= 0xFF000000; // 00—11
GpioCtrlRegs.GPAMUX2.all &= 0xFF00003F; // 19—27
GpioCtrlRegs.GPBMUX1.all &= 0xFFFFFFC0; // 32—34
GpioCtrlRegs.GPBMUX2.all &= 0x000FF000; // 48—53, 58—63
GpioCtrlRegs.GPADIR.bit.GPIO20 = 0;
GpioCtrlRegs.GPADIR.bit.GPIO21 = 0;
GpioCtrlRegs.GPADIR.bit.GPIO22 = 0;
GpioCtrlRegs.GPBDIR.bit.GPIO51 = 0;
EDIS;
Mode = 1;
Mode += 1 * !GpioDataRegs.GPADAT.bit.GPIO21;
Mode += 2 * !GpioDataRegs.GPADAT.bit.GPIO20;
Mode += 4 * !GpioDataRegs.GPADAT.bit.GPIO22;
Mode += 8 * !GpioDataRegs.GPBDAT.bit.GPIO51;
if( (Mode==adr_POW1)||(Mode==adr_POW2)) Desk = dsk_COMM;
if( (Mode==adr_TRN1)||(Mode==adr_TRN2)) Desk = dsk_BKST;
if( (Mode==adr_LOA1)||(Mode==adr_LOA2)) Desk = dsk_LOAD;
if (Mode==adr_ENG1) Desk = dsk_BKSD;
if (Mode==adr_PLT3) Desk = dsk_EPLT;
if (Mode==adr_SHKF) Desk = dsk_SHKF;
if(Desk==dsk_LOAD)
{
GpioDataRegs.GPASET.bit.GPIO1=1;
GpioDataRegs.GPASET.bit.GPIO3=1;
GpioDataRegs.GPASET.bit.GPIO7=1;
GpioDataRegs.GPASET.bit.GPIO9=1;
GpioDataRegs.GPBSET.bit.GPIO61=1;
}
if( (Desk==dsk_COMM)||(Desk==dsk_SHKF)||
(Desk==dsk_LOAD) ) Kalibro = 1;
if( (Desk==dsk_COMM)||(Desk==dsk_LOAD)) Kurrent = 1;
if( (Desk==dsk_BKSD)||(Desk==dsk_BKST)) TermoRS = 1;
if( (Desk==dsk_COMM)||(Desk==dsk_SHKF)) TermoAD = 1;
if( (Desk==dsk_COMM)||(Desk==dsk_BKST)) TermoSW = 2;
if (Desk==dsk_BKSD) TermoSW = 1;
EALLOW;
switch(Desk)
{
case dsk_COMM: GpioCtrlRegs.GPADIR.all = COMM_GPADIR;
GpioCtrlRegs.GPBDIR.all = COMM_GPBDIR; break;
case dsk_BKSD: GpioCtrlRegs.GPADIR.all = BKSD_GPADIR;
GpioCtrlRegs.GPBDIR.all = BKSD_GPBDIR; break;
case dsk_BKST: GpioCtrlRegs.GPADIR.all = BKST_GPADIR;
GpioCtrlRegs.GPBDIR.all = BKST_GPBDIR; break;
case dsk_EPLT: GpioCtrlRegs.GPADIR.all = PLT2_GPADIR;
GpioCtrlRegs.GPBDIR.all = PLT2_GPBDIR; break;
case dsk_LOAD: GpioCtrlRegs.GPADIR.all = LOAD_GPADIR;
GpioCtrlRegs.GPBDIR.all = LOAD_GPBDIR;
GpioDataRegs.GPASET.bit.GPIO3=1; break;
case dsk_SHKF: GpioCtrlRegs.GPADIR.all = SHKF_GPADIR;
GpioCtrlRegs.GPBDIR.all = SHKF_GPBDIR; break;
}
EDIS;
}
void select_tpl_canal(int n_tpl)
{
if(Desk==dsk_BKSD)
{
#define BKSD_A_tpl_zero ((1L<<11) + (1L<<9) + (1L<<7) + (1L<<3))
GpioDataRegs.GPASET.all = BKSD_A_tpl_zero;
if(n_tpl&0x01) GpioDataRegs.GPACLEAR.bit.GPIO11=1;
if(n_tpl&0x02) GpioDataRegs.GPACLEAR.bit.GPIO9=1;
if(n_tpl&0x04) GpioDataRegs.GPACLEAR.bit.GPIO7=1;
if(n_tpl&0x08) GpioDataRegs.GPACLEAR.bit.GPIO3=1;
}
if(Desk==dsk_BKST)
{
#define BKST_A_tpl_zero ((1L<<11) + (1L<<9) + (1L<<7) + (1L<<3) + (1L<<1) + (1L<<8) + (1L<<6) + (1L<<0) + (1L<<27) + (1L<<24))
#define BKST_B_tpl_zero ((1L<<(53-32)) + (1L<<(50-32)))
GpioDataRegs.GPASET.all = BKST_A_tpl_zero;
GpioDataRegs.GPBSET.all = BKST_B_tpl_zero;
if(n_tpl==0) GpioDataRegs.GPACLEAR.bit.GPIO11=1;
if(n_tpl==1) GpioDataRegs.GPACLEAR.bit.GPIO9=1;
if(n_tpl==2) GpioDataRegs.GPACLEAR.bit.GPIO7=1;
if(n_tpl==3) GpioDataRegs.GPACLEAR.bit.GPIO3=1;
if(n_tpl==4) GpioDataRegs.GPACLEAR.bit.GPIO1=1;
if(n_tpl==5) GpioDataRegs.GPACLEAR.bit.GPIO8=1;
if(n_tpl==6) GpioDataRegs.GPACLEAR.bit.GPIO6=1;
if(n_tpl==7) GpioDataRegs.GPACLEAR.bit.GPIO0=1;
if(n_tpl==8) GpioDataRegs.GPACLEAR.bit.GPIO27=1;
if(n_tpl==9) GpioDataRegs.GPACLEAR.bit.GPIO24=1;
if(n_tpl==10) GpioDataRegs.GPBCLEAR.bit.GPIO53=1;
if(n_tpl==11) GpioDataRegs.GPBCLEAR.bit.GPIO50=1;
}
if(Desk==dsk_COMM)
{
#define COMM_A_tpl_zero ((1L<<27) + (1L<<24) + (1L<<25))
#define COMM_B_tpl_zero ((1L<<(49-32)) + (1L<<(52-32)))
GpioDataRegs.GPACLEAR.all = COMM_A_tpl_zero;
GpioDataRegs.GPBCLEAR.all = COMM_B_tpl_zero;
if(n_tpl&0x01) GpioDataRegs.GPASET.bit.GPIO27=1;
if(n_tpl&0x02) GpioDataRegs.GPASET.bit.GPIO24=1;
if(n_tpl&0x04) GpioDataRegs.GPASET.bit.GPIO25=1;
if(n_tpl&0x08) GpioDataRegs.GPBSET.bit.GPIO49=1;
if(n_tpl&0x10) GpioDataRegs.GPBSET.bit.GPIO52=1;
} }
void get_Buttons()
{
unsigned long butt =0;
unsigned long fluf =0;
if(Desk==dsk_BKSD)
{
bTestLamp = !GpioDataRegs.GPBDAT.bit.GPIO50;
bSecretBt = !GpioDataRegs.GPBDAT.bit.GPIO49;
InputRep0 = bTestLamp;
InputRep1 = bSecretBt;
if(GpioDataRegs.GPADAT.bit.GPIO0) butt +=0x0001;
if(GpioDataRegs.GPADAT.bit.GPIO2) butt +=0x0002;
if(GpioDataRegs.GPADAT.bit.GPIO10)butt +=0x0004;
if(GpioDataRegs.GPADAT.bit.GPIO4) butt +=0x0008;
Inputs.all = butt;
}
/* Íè÷åãî òàêîãî â äåéñòâèòåëüíîñòè íåò
if(Desk==dsk_BKST)
{ bSecretBt = !GpioDataRegs.GPBDAT.bit.GPIO63;
InputRep1 = bSecretBt;
return;
} */
if(Desk==dsk_COMM)
{
bSecretBt = !GpioDataRegs.GPBDAT.bit.GPIO53;
bTermoCal = er_anal(!GpioDataRegs.GPBDAT.bit.GPIO50, &INcount0, 500000, 0);
InputRep1 = bSecretBt;
InputRep2 = bTermoCal;
}
if(Desk==dsk_EPLT)
{
bTestLamp = er_anal(GpioDataRegs.GPADAT.bit.GPIO26, &INcount0, 1000, 0);
if(GpioDataRegs.GPADAT.bit.GPIO27) butt +=0x0001;
if(GpioDataRegs.GPADAT.bit.GPIO24) butt +=0x0002;
if(GpioDataRegs.GPBDAT.bit.GPIO53) butt +=0x0004;
if(GpioDataRegs.GPBDAT.bit.GPIO50) butt +=0x0008;
if(GpioDataRegs.GPADAT.bit.GPIO26) butt +=0x0010;
if(GpioDataRegs.GPADAT.bit.GPIO23) butt +=0x0020;
if(GpioDataRegs.GPBDAT.bit.GPIO52) butt +=0x0040;
if(GpioDataRegs.GPADAT.bit.GPIO4 ) butt +=0x0080;
if(GpioDataRegs.GPADAT.bit.GPIO25) butt +=0x0100;
if(GpioDataRegs.GPBDAT.bit.GPIO49) butt +=0x0200;
if(GpioDataRegs.GPADAT.bit.GPIO11) butt +=0x0400;
if(GpioDataRegs.GPADAT.bit.GPIO5 ) butt +=0x0800;
if(GpioDataRegs.GPBDAT.bit.GPIO48) butt +=0x1000;
if(GpioDataRegs.GPADAT.bit.GPIO10) butt +=0x2000; // Ñåêğåòíûé âõîä
Inputs.all = butt;
}
if(Desk==dsk_LOAD)
{
if(!GpioDataRegs.GPADAT.bit.GPIO6) butt +=0x0001; // OMEGA
if(!GpioDataRegs.GPADAT.bit.GPIO8) butt +=0x0002; // Start_1
if(!GpioDataRegs.GPADAT.bit.GPIO11) butt +=0x0004; // Res_in
Inputs.all = butt;
}
if(Desk==dsk_SHKF)
{
if(GpioDataRegs.GPBDAT.bit.GPIO53) fluf += 0x0000010; else butt += 0x0001;
if(GpioDataRegs.GPBDAT.bit.GPIO52) fluf += 0x0000040; else butt += 0x0002;
if(GpioDataRegs.GPADAT.bit.GPIO2) fluf += 0x0001000; else butt += 0x0004;
if(GpioDataRegs.GPADAT.bit.GPIO4) fluf += 0x0002000; else butt += 0x0008;
if(GpioDataRegs.GPADAT.bit.GPIO6) fluf += 0x0004000; else butt += 0x0010;
if(GpioDataRegs.GPADAT.bit.GPIO0) fluf += 0x0008000; else butt += 0x0020;
if(GpioDataRegs.GPADAT.bit.GPIO8) fluf += 0x0010000; else butt += 0x0040;
if(GpioDataRegs.GPADAT.bit.GPIO10) fluf += 0x0020000; else butt += 0x0080;
if(GpioDataRegs.GPADAT.bit.GPIO3) fluf += 0x0040000; else butt += 0x0100;
if(GpioDataRegs.GPADAT.bit.GPIO5) fluf += 0x0080000; else butt += 0x0200;
if(GpioDataRegs.GPADAT.bit.GPIO7) fluf += 0x0100000; else butt += 0x0400;
if(GpioDataRegs.GPADAT.bit.GPIO1) fluf += 0x0200000; else butt += 0x0800;
if(GpioDataRegs.GPADAT.bit.GPIO11) fluf += 0x0400000; else butt += 0x1000;
if(GpioDataRegs.GPADAT.bit.GPIO9) fluf += 0x0800000; else butt += 0x2000;
DigErr.all = fluf;
Inputs.all = butt;
}
butt = 1 * !GpioDataRegs.GPADAT.bit.GPIO21;
butt += 2 * !GpioDataRegs.GPADAT.bit.GPIO20;
butt += 4 * !GpioDataRegs.GPADAT.bit.GPIO22;
butt += 8 * !GpioDataRegs.GPBDAT.bit.GPIO51;
Jumpers = butt;
}

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Source/Internal/pulto.c Normal file
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#include "DSP2833x_Device.h" // DSP2833x Headerfile Include File
#include "DSP2833x_SWPrioritizedIsrLevels.h"
#include "RS485.h"
#include "message.h"
#include "filter_bat2.h"
#include "measure.h"
#include "package.h"
#include "pulto.h"
#include "kanal.h"
#include "peripher.h"
unsigned long isMask;
int isNumb;
int quaLamp = 6;
unsigned long Lonely=0;
void what_is()
{
static unsigned int count_blink;
static int numb=0;
if(++count_blink >= BLINK_TIME)
{
count_blink=0;
numb++; if(numb==10) numb=0;
isNumb = numb*1000 + numb*100 + numb*10 +numb;
if(isMask) isMask = 0;
else isMask = 0xFFFFFFFF;
} }
interrupt void cpu_timer1_isr_PULT(void)
{
static int cownt=0,count_bright;
unsigned int light=0, i;
unsigned int Alone = 20*READY_FREQ;
EALLOW;
CpuTimer1.InterruptCount++;
IER |= MINT13; // Set "global" priority
EINT;
EDIS; // This is needed to disable write to EALLOW protected registers
if(!cReset) ServiceDog();
if(++CanPowse >= CANPOWSE)
{
CanPowse = 0;
CanGO = 1;
}
toggle_RES_OUT_1(); // òèïà ýòî ãîòîâíîñòü
toggle_RES_OUT_2(); // íà âñàêèé
if(++Lonely > Alone) Lonely = Alone;
if(++count_bright >= maximum_bright) count_bright = 0 ;
for(i=0; i<quaLamp; i++)
{
if(count_bright < Bright[i]) light+=(1<<i);
}
if(++cownt>2) cownt=0;
if(cTestLamp|bTestLamp)
{
what_is();
if(cownt == 0) kanal_Send(0,isNumb,4);
if(cownt == 1) kanal_Send(1,isNumb,4);
kanal_Send(2,isMask,0);
if(cownt == 2) kanal_Send(3,isMask,0);
}
else
if(cLiteFire)
{
if(cownt == 0) kanal_Send(0,8888,1);
if(cownt == 1) kanal_Send(1,8888,1);
kanal_Send(2,0xFFFF & light,0);
if(cownt == 2) kanal_Send(3,0xFFFF,0);
}
else
if((Lonely >= Alone))
{
if(cownt == 0) kanal_Send(0,0,0);
if(cownt == 1) kanal_Send(1,0,0);
kanal_Send(2,0,0);
if(cownt == 2) kanal_Send(3,0,0);
}
else
{
if(cownt == 0) kanal_Send(0,modbus[1],1);
if(cownt == 1) kanal_Send(1,modbus[0],1);
kanal_Send(2,modbus[2] & light,0);
if(cownt == 2) kanal_Send(3,modbus[3],0);
} }

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Source/Internal/spise2p.c Normal file
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/*=================================================================
File name : SPISE2PD.C
Originator : Settu Duraisamy
C2000 Applications Team
Texas Instruments
Description : This file contains the SPI bus Serial EEPROM driver
implemented using Virtual SPI driver
Date : 6/30/2003 (DD/MM/YYYY)
====================================================================*/
#include "DSP2833x_Device.h" // DSP2833x Headerfile Include File
#include "spise2p.h"
//#include "pins.h"
/* Instance the SPI bus serial EEPROM driver */
static SPISE2P_DRV se2p=SPISE2P_DRV_DEFAULTS;
/* Instance serial EEPROm data transfer structure */
static SE2P_DATA writeData, readData;
// Prototype statements for functions found within this file.
interrupt void PRD_TICK(void);
interrupt void cpu_timer2_isr(void);
int ccc=0;
/********************************************************************/
/******* SPI bus Serial EEPROM driver Initialization routine ********/
/********************************************************************/
void Seeprom_write( unsigned int adres,
unsigned int buf[],
unsigned int size)
{
unsigned int len;
CpuTimer2.InterruptCount=0;
CpuTimer2Regs.TCR.all = 0x4020; // Use write-only instruction to set TSS bit = 0
while(!spiSe2pFree(&se2p));
size = (size / WORD_LEN) + (size % WORD_LEN);
while(size)
{
len = PAGE_LEN - (adres % PAGE_LEN);
if(len > size) len=size;
writeData.dataPtr = buf;
writeData.nrData = len;
writeData.se2pAddr = adres * WORD_LEN;
spiSe2pWrite(&se2p, &writeData);
while(!spiSe2pFree(&se2p));
buf += len;
adres += len;
size -= len;
}
CpuTimer2Regs.TCR.all = 0x4010; // Use write-only instruction to set TSS bit = 1
}
void Seeprom_read( unsigned int adres,
unsigned int buf[],
unsigned int size)
{
unsigned int len;
CpuTimer2.InterruptCount=0;
CpuTimer2Regs.TCR.all = 0x4020; // Use write-only instruction to set TSS bit = 0
while(!spiSe2pFree(&se2p));
size = (size / WORD_LEN) + (size % WORD_LEN);
while(size)
{
len = PAGE_LEN - (adres % PAGE_LEN);
if(len > size) len=size;
readData.dataPtr = buf;
readData.nrData = len;
readData.se2pAddr = adres * WORD_LEN;
spiSe2pRead(&se2p, &readData);
while(!spiSe2pFree(&se2p));
buf += len;
adres += len;
size -= len;
}
CpuTimer2Regs.TCR.all = 0x4010; // Use write-only instruction to set TSS bit = 1
}
void InitSeeprom()
{
se2p.init(&se2p);
EALLOW; // This is needed to write to EALLOW protected registers
PieVectTable.TINT2 = &cpu_timer2_isr;
EDIS; // This is needed to disable write to EALLOW protected registers
InitCpuTimers(); // For this example, only initialize the Cpu Timers
ConfigCpuTimer(&CpuTimer2, (SYSCLKOUT/1000000), 100);
IER |= M_INT14;
}
void SPISE2P_DRV_init(SPISE2P_DRV *eeprom)
{
/* Configure SPI-A pins using GPIO regs*/
// This specifies which of the possible GPIO pins will be SPI functional pins.
// Comment out other unwanted lines.
EALLOW;
GpioCtrlRegs.GPAMUX2.bit.GPIO16 = 1; // Configure GPIO16 as SPISIMOA
GpioCtrlRegs.GPAMUX2.bit.GPIO17 = 1; // Configure GPIO17 as SPISOMIA
GpioCtrlRegs.GPAMUX2.bit.GPIO18 = 1; // Configure GPIO18 as SPICLKA
GpioCtrlRegs.GPAMUX2.bit.GPIO19 = 0; // General purpose I/O 19 (default) (I/O)
GpioCtrlRegs.GPADIR.bit.GPIO19 = 1; // Configures the GPIO pin as an output
GpioDataRegs.GPADAT.bit.GPIO19 = 0;
EDIS;
/* Configure the SPI: 8-bit, Rising edge with delay */
SpiaRegs.SPICCR.all=0x0007;
SpiaRegs.SPICTL.all=0x001F;
SpiaRegs.SPISTS.all=0x00;
SpiaRegs.SPIBRR = CLKMULT * 6;
SpiaRegs.SPIFFTX.all=0x8000;
SpiaRegs.SPIFFRX.all=0x0000;
SpiaRegs.SPIFFCT.all=0x00;
SpiaRegs.SPIPRI.all=0x0010;
/* Disable Chip Select of Serial EEPROM */
eeprom->csr=0;
eeprom->msgPtr=0;
SpiaRegs.SPICCR.bit.SPISWRESET=1; // Enable SCI
}
void SPISE2P_DRV_csset()
{
GpioDataRegs.GPADAT.bit.GPIO19 = 1;
}
void SPISE2P_DRV_csclr()
{
GpioDataRegs.GPADAT.bit.GPIO19 = 0;
}
unsigned int spiSe2pFree(SPISE2P_DRV *se2p)
{
if(se2p->csr&0x3) return(0);
else return(1);
}
void spiSe2pWrite(SPISE2P_DRV *se2p, SE2P_DATA *msgPtr)
{
se2p->msgPtr=msgPtr;
se2p->csr|=0x1;
}
void spiSe2pRead(SPISE2P_DRV *se2p, SE2P_DATA *msgPtr)
{
se2p->msgPtr=msgPtr;
se2p->csr|=0x2;
}
/********************************************************************/
/******* SPI bus Serial EEPROM driver Tick function *****************/
/********************************************************************/
interrupt void cpu_timer2_isr(void)
{ EALLOW;
CpuTimer2.InterruptCount++;
se2p.tick(&se2p);
// The CPU acknowledges the interrupt.
EDIS;
}
void SPISE2P_DRV_tick(SPISE2P_DRV *eeprom)
{
static unsigned int step=0;
static unsigned int dataCount=0;
static volatile unsigned int dummy=0;
switch(step)
{
case 0:
/* If write request is SET, then trigger the Write operation
If read request is SET, then trigger the Read operation
If Read request is also not SET, then continue to poll */
if(eeprom->csr&SPISE2P_WRRQ)
{ step=1;
eeprom->csr|=SPISE2P_WRIP; /* Set Write in progress*/
eeprom->csclr();
}
if(eeprom->csr&SPISE2P_RDRQ)
{ step=13;
eeprom->csr|=SPISE2P_RDIP; /* Set Read in progress */
eeprom->csclr();
}
break;
case 1:
/************************************************************
*********** SPI bus EEPROM Write Starts from here ***********
*************************************************************
Prier to any attempt to write data to SPI serial EEPROM
Write Enable Latch must be set by issuing the WREN command */
SpiaRegs.SPICCR.all=SPISE2P_TFR8BIT;
SpiaRegs.SPITXBUF=SPISE2P_WREN_CMD;
SpiaRegs.SPISTS.bit.BUFFULL_FLAG=1;
step=2;
break;
case 2:
/* Wait for VSPI State machine to send the WREN command and
serial EEPROM Chip Select must be brought to HIGH to set
the WREN latch */
if(SpiaRegs.SPISTS.bit.INT_FLAG) /* Check SPI INT FLAG */
{
dummy=SpiaRegs.SPIRXBUF; /* Reset SPI INT FLAG */
eeprom->csset();
step=3;
}
break;
case 3:
/* Assert CS of Serial EEPROM and send WRITE command */
eeprom->csclr();
SpiaRegs.SPICCR.all=SPISE2P_TFR8BIT;
SpiaRegs.SPITXBUF=SPISE2P_WRITE_CMD;
SpiaRegs.SPISTS.bit.BUFFULL_FLAG=1;
step=4;
break;
case 4:
/* Wait for VSPI State machine to send the WRITE command */
if(SpiaRegs.SPISTS.bit.INT_FLAG) /* Check SPI INT FLAG */
{ dummy=SpiaRegs.SPIRXBUF; /* Reset SPI INT FLAG */
step=5;
}
break;
case 5:
/* Send Address */
#if(SPISE2P_ADDR_WIDTH==SIXTEEN_BIT)
SpiaRegs.SPICCR.all= SPISE2P_TFR16BIT;
SpiaRegs.SPITXBUF=eeprom->msgPtr->se2pAddr;
#endif
#if(SPISE2P_ADDR_WIDTH==EIGHT_BIT)
SpiaRegs.SPICCR.all= SPISE2P_TFR8BIT;
SpiaRegs.SPITXBUF=eeprom->msgPtr->se2pAddr<<8;
#endif
SpiaRegs.SPISTS.bit.BUFFULL_FLAG=1; /* Set TXBUF FULL FLAG */
step=6;
break;
case 6:
/* Wait for VSPI State machine to send the Address */
if(SpiaRegs.SPISTS.bit.INT_FLAG) /* Check SPI INT FLAG */
{ dummy=SpiaRegs.SPIRXBUF; /* Reset SPI INT FLAG */
step=7;
}
break;
case 7:
/* Send Data */
#if(SPISE2P_DATA_WIDTH==SIXTEEN_BIT)
SpiaRegs.SPICCR.all=SPISE2P_TFR16BIT;
SpiaRegs.SPITXBUF=*(eeprom->msgPtr->dataPtr+dataCount);
#endif
#if(SPISE2P_DATA_WIDTH==EIGHT_BIT)
SpiaRegs.SPICCR.all=SPISE2P_TFR8BIT;
SpiaRegs.SPITXBUF=*(eeprom->msgPtr->dataPtr+dataCount)<<8;
#endif
dataCount++;
SpiaRegs.SPISTS.bit.BUFFULL_FLAG=1; /* Set TXBUF FULL FLAG */
step=8;
break;
case 8:
/* Wait for VSPI State machine to send the Data.
If all the data are sent, then set the CS pin to HIGH
to program or write the data in EEPROM array */
if(SpiaRegs.SPISTS.bit.INT_FLAG) /* Check SPI INT FLAG */
{ dummy=SpiaRegs.SPIRXBUF; /* Reset SPI INT FLAG */
if (dataCount==eeprom->msgPtr->nrData)
{ eeprom->csset();
step=9;}
else
step=7; /* Write next data */
}
break;
case 9:
/* Read the EEPROM status register to check whether the
data sent are indeed programmed to the EEPROM array.
Hence, send RDSR command to EEPROM to read status reg. */
eeprom->csclr();
SpiaRegs.SPICCR.all=SPISE2P_TFR8BIT;
SpiaRegs.SPITXBUF=SPISE2P_RDSR_CMD;
SpiaRegs.SPISTS.bit.BUFFULL_FLAG=1; /* Set TXBUF FULL FLAG */
step=10;
break;
case 10:
/* Wait for VSPI State machine to send RDSR command */
if(SpiaRegs.SPISTS.bit.INT_FLAG) /* Check SPI INT FLAG */
{ dummy=SpiaRegs.SPIRXBUF; /* Reset SPI INT FLAG */
step=11;
}
break;
case 11:
/* Send dummy Data to read Status reg. */
SpiaRegs.SPITXBUF=SPISE2P_DUMMY_DATA;
SpiaRegs.SPISTS.bit.BUFFULL_FLAG=1; /* Set TXBUF FULL FLAG */
step=12;
break;
case 12:
/* Wait for VSPI State machine to clock out status reg.
Check, whether the data are written to the EEPROM array,
If written, then reset the WRIP(write in progress) and
WRRQ(Write request bit) and go back to STATE0 */
if(SpiaRegs.SPISTS.bit.INT_FLAG) /* Check SPI INT FLAG */
{ eeprom->csset();
if (SpiaRegs.SPIRXBUF & SPISE2P_BUSY_MASK )
step=9;
else
{ eeprom->csr&=(~SPISE2P_WRIP);
eeprom->csr&=(~SPISE2P_WRRQ);
step=0;
dataCount=0;
}
}
break;
case 13:
/************************************************************
*********** SPI bus EEPROM Read Starts from here ***********
*************************************************************
Send READ Command to SPI bus serail EEPROM */
SpiaRegs.SPICCR.all=SPISE2P_TFR8BIT;
SpiaRegs.SPITXBUF=SPISE2P_READ_CMD;
SpiaRegs.SPISTS.bit.BUFFULL_FLAG=1; /* Set TXBUF FULL FLAG */
step=14;
break;
case 14:
/* Wait for VSPI State machine to send READ command */
if(SpiaRegs.SPISTS.bit.INT_FLAG) /* Check SPI INT FLAG */
{ dummy=SpiaRegs.SPIRXBUF; /* Reset SPI INT FLAG */
step=15;
}
break;
case 15:
/* Send Address */
#if(SPISE2P_ADDR_WIDTH==SIXTEEN_BIT)
SpiaRegs.SPICCR.all= SPISE2P_TFR16BIT;
SpiaRegs.SPITXBUF=eeprom->msgPtr->se2pAddr;
#endif
#if(SPISE2P_ADDR_WIDTH==EIGHT_BIT)
SpiaRegs.SPICCR.all= SPISE2P_TFR8BIT;
SpiaRegs.SPITXBUF=eeprom->msgPtr->se2pAddr<<8;
#endif
SpiaRegs.SPISTS.bit.BUFFULL_FLAG=1; /* Set TXBUF FULL FLAG */
step=16;
break;
case 16:
/* Wait for VSPI State machine to send Address */
if(SpiaRegs.SPISTS.bit.INT_FLAG) /* Check SPI INT FLAG */
{ dummy=SpiaRegs.SPIRXBUF; /* Reset SPI INT FLAG */
step=17;
}
break;
case 17:
/* Send Dummy value to clock out data from serial EEPROM */
#if(SPISE2P_DATA_WIDTH==SIXTEEN_BIT)
SpiaRegs.SPICCR.all= SPISE2P_TFR16BIT;
SpiaRegs.SPITXBUF=SPISE2P_DUMMY_DATA;
#endif
#if(SPISE2P_DATA_WIDTH==EIGHT_BIT)
SpiaRegs.SPICCR.all= SPISE2P_TFR8BIT;
SpiaRegs.SPITXBUF=SPISE2P_DUMMY_DATA<<8;
#endif
SpiaRegs.SPISTS.bit.BUFFULL_FLAG=1; /* Set TXBUF FULL FLAG */
step=18;
break;
case 18:
/* Wait for VSPI State machine to clk out data from EEPROM */
if(SpiaRegs.SPISTS.bit.INT_FLAG) /* Check SPI INT FLAG */
{
#if(SPISE2P_DATA_WIDTH==SIXTEEN_BIT)
*(eeprom->msgPtr->dataPtr+dataCount)=SpiaRegs.SPIRXBUF;
#endif
#if(SPISE2P_DATA_WIDTH==EIGHT_BIT)
*(eeprom->msgPtr->dataPtr+dataCount)=SpiaRegs.SPIRXBUF&0xFF;
#endif
dataCount++;
step=19;
}
break;
case 19:
/* If all the data are read, terminate the read operation by
rising the CS. Then reset the RDIP (Read in progress) bit
and reset the RDRQ(Read request) bit and go back to STATE0 */
if (dataCount==eeprom->msgPtr->nrData)
{ eeprom->csset();
step=0;
dataCount=0;
eeprom->csr&=(~SPISE2P_RDIP);
eeprom->csr&=(~SPISE2P_RDRQ);
}
else
step=17;
break;
}
}

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#include "DSP2833x_Device.h" // DSP281x Headerfile Include File
// Configure the timing paramaters for Zone 7.
// Notes:
// This function should not be executed from XINTF
// Adjust the timing based on the data manual and
// external device requirements.
void init_zone7(void)
{
// Make sure the XINTF clock is enabled
SysCtrlRegs.PCLKCR3.bit.XINTFENCLK = 1;
// Configure the GPIO for XINTF with a 16-bit data bus
// This function is in DSP2833x_Xintf.c
InitXintf16Gpio();
EALLOW;
// All Zones---------------------------------
// Timing for all zones based on XTIMCLK = SYSCLKOUT
XintfRegs.XINTCNF2.bit.XTIMCLK = 0;
// Buffer up to 3 writes
XintfRegs.XINTCNF2.bit.WRBUFF = 3;
// XCLKOUT is enabled
XintfRegs.XINTCNF2.bit.CLKOFF = 0;
// XCLKOUT = XTIMCLK
XintfRegs.XINTCNF2.bit.CLKMODE = 0;
// Zone 7------------------------------------
// When using ready, ACTIVE must be 1 or greater
// Lead must always be 1 or greater
// Zone write timing
XintfRegs.XTIMING7.bit.XWRLEAD = 1;
XintfRegs.XTIMING7.bit.XWRACTIVE = 2;
XintfRegs.XTIMING7.bit.XWRTRAIL = 1;
// Zone read timing
XintfRegs.XTIMING7.bit.XRDLEAD = 1;
XintfRegs.XTIMING7.bit.XRDACTIVE = 3;
XintfRegs.XTIMING7.bit.XRDTRAIL = 0;
// don't double all Zone read/write lead/active/trail timing
XintfRegs.XTIMING7.bit.X2TIMING = 0;
// Zone will not sample XREADY signal
XintfRegs.XTIMING7.bit.USEREADY = 0;
XintfRegs.XTIMING7.bit.READYMODE = 0;
// 1,1 = x16 data bus
// 0,1 = x32 data bus
// other values are reserved
XintfRegs.XTIMING7.bit.XSIZE = 3;
EDIS;
//Force a pipeline flush to ensure that the write to
//the last register configured occurs before returning.
asm(" RPT #7 || NOP");
}
void pause_us(unsigned long t)
{
unsigned long i;
t = t >> 1;
for (i = 0; i < t; i++)
{
DSP28x_usDelay(CLKMULT*8L);
} }