/* WARNING: Do NOT edit the input and output ports in this file in a text editor if you plan to continue editing the block that represents it in the Block Editor! File corruption is VERY likely to occur. */ /* Copyright (C) 1991-2013 Altera Corporation Your use of Altera Corporation's design tools, logic functions and other software and tools, and its AMPP partner logic functions, and any output files from any of the foregoing (including device programming or simulation files), and any associated documentation or information are expressly subject to the terms and conditions of the Altera Program License Subscription Agreement, Altera MegaCore Function License Agreement, or other applicable license agreement, including, without limitation, that your use is for the sole purpose of programming logic devices manufactured by Altera and sold by Altera or its authorized distributors. Please refer to the applicable agreement for further details. */ (header "symbol" (version "1.1")) (symbol (rect 16 16 168 128) (text "AlteraPLL" (rect 5 0 47 12)(font "Arial" )) (text "inst" (rect 8 96 20 108)(font "Arial" )) (port (pt 0 32) (input) (text "areset" (rect 0 0 24 12)(font "Arial" )) (text "areset" (rect 21 27 45 39)(font "Arial" )) (line (pt 0 32)(pt 16 32)(line_width 1)) ) (port (pt 0 48) (input) (text "inclk0" (rect 0 0 21 12)(font "Arial" )) (text "inclk0" (rect 21 43 42 55)(font "Arial" )) (line (pt 0 48)(pt 16 48)(line_width 1)) ) (port (pt 152 32) (output) (text "c0" (rect 0 0 9 12)(font "Arial" )) (text "c0" (rect 122 27 131 39)(font "Arial" )) (line (pt 152 32)(pt 136 32)(line_width 1)) ) (port (pt 152 48) (output) (text "c1" (rect 0 0 8 12)(font "Arial" )) (text "c1" (rect 123 43 131 55)(font "Arial" )) (line (pt 152 48)(pt 136 48)(line_width 1)) ) (port (pt 152 64) (output) (text "locked" (rect 0 0 24 12)(font "Arial" )) (text "locked" (rect 107 59 131 71)(font "Arial" )) (line (pt 152 64)(pt 136 64)(line_width 1)) ) (drawing (rectangle (rect 16 16 136 96)(line_width 1)) ) )