From dfe22a8ab2aa0407223c14deef7b931bc8d8d865 Mon Sep 17 00:00:00 2001 From: sokolovstanislav Date: Thu, 13 Jun 2024 16:27:00 +0300 Subject: [PATCH] =?UTF-8?q?=D0=A0=D0=B0=D0=B7=D0=BD=D1=8B=D0=B5=20=D1=81?= =?UTF-8?q?=D0=BF=D0=BE=D1=81=D0=BE=D0=B1=D1=8B=20=D0=B7=D0=B0=D1=87=D0=B8?= =?UTF-8?q?=D1=82=D0=B0=D1=82=D1=8C=20=D0=B8=D0=B7=20=D1=8F=D1=87=D0=B5?= =?UTF-8?q?=D0=B9=D0=BA=D0=B8=20=D0=BF=D0=B0=D0=BC=D1=8F=D1=82=D0=B8=20?= =?UTF-8?q?=D0=B0=D0=B4=D1=80=D0=B5=D1=81=D0=B0=20=D1=83=D1=81=D1=82=D1=80?= =?UTF-8?q?=D0=BE=D0=B9=D1=81=D1=82=D0=B2=D0=B0=20=D0=B8=20=D1=80=D0=B8?= =?UTF-8?q?=D0=B3=D0=B8=D1=81=D1=82=D1=80=D0=B0.?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- MainController/RAM9X8_ParallelBusMaster.vhd | 48 ++++++++++++++++++--- 1 file changed, 41 insertions(+), 7 deletions(-) diff --git a/MainController/RAM9X8_ParallelBusMaster.vhd b/MainController/RAM9X8_ParallelBusMaster.vhd index 450a6e6..8627e52 100644 --- a/MainController/RAM9X8_ParallelBusMaster.vhd +++ b/MainController/RAM9X8_ParallelBusMaster.vhd @@ -65,7 +65,27 @@ signal lineBusy : std_logic := '1'; signal start : std_logic := '0'; signal startPrev : std_logic := '0'; -begin +signal currentMemoryCell : integer range 0 to ARRAY_LENGTH - 1 := 0; + +begin + +memoryAddress(0) <= x"30"; +memoryAddress(1) <= x"30"; +memoryAddress(2) <= x"31"; +memoryAddress(3) <= x"31"; +memoryAddress(4) <= x"32"; +memoryAddress(5) <= x"32"; +memoryAddress(6) <= x"33"; +memoryAddress(7) <= x"33"; +memoryAddress(8) <= x"34"; +memoryAddress(9) <= x"34"; +memoryAddress(10) <= x"35"; +memoryAddress(11) <= x"35"; +memoryAddress(12) <= x"36"; +memoryAddress(13) <= x"36"; +memoryAddress(14) <= x"37"; +memoryAddress(15) <= x"37"; + process (we, oe, ce) variable addr : integer range 0 to 2**ADDRESS_BUS_WIDTH - 1 := 0; @@ -115,8 +135,8 @@ begin fasBuf(15 downto 8) <= data; when PB_FILL_ADDRESS_SPACE_LOWER => fasBuf(7 downto 0) <= data; - position := conv_integer(data); - memoryAddress(position) <= fasBuf(15 downto 8); + --position := conv_integer(data); + --memoryAddress(position) <= fasBuf(15 downto 8); when others => data <= (others => 'Z'); -- Запретить запись на шину end case; @@ -125,7 +145,9 @@ begin end if; elsif (addr >= conv_integer(firstFreeBuf) and addr <= conv_integer(firstFreeBuf) + conv_integer(cmdBuf(7 downto 0))) then if (oe = '0') then -- Если сигнал чтения активен - data <= memoryData(addr - conv_integer(firstFreeBuf)); + -- data <= memoryData(addr - conv_integer(firstFreeBuf)); + data <= memoryAddress(addr - conv_integer(firstFreeBuf)); -- для проверки обратного считывания адреса устройства и адреса регистра. + currentMemoryCell <= addr - conv_integer(firstFreeBuf); else data <= (others => 'Z'); -- Запретить запись на шину end if; @@ -218,13 +240,25 @@ begin when ReceiveCheck => if pback = '0' then if pbdata = not dataTemp then - memoryData(position) <= dataTemp(15 downto 8); - memoryData(position + 1) <= dataTemp(7 downto 0); - controlBuf <= memoryAddress(position); + -- if currentMemoryCell rem 2 = 0 and currentMemoryCell = position then +-- if currentMemoryCell /= position then +-- memoryData(position) <= dataTemp(15 downto 8); +-- memoryData(position + 1) <= dataTemp(7 downto 0); +-- controlBuf <= memoryAddress(position); +-- if position + 1 < conv_integer(cmdBuf(7 downto 0)) then +-- position := position + 2; +-- else +-- position := 0; +-- circleCounter := circleCounter + 1; +-- end if; +-- end if; CommunicationState <= Timeout; count := 0; pbce <= '1'; countValue := 5; + memoryData(position) <= dataTemp(15 downto 8); + memoryData(position + 1) <= dataTemp(7 downto 0); + controlBuf <= memoryAddress(position); if position + 1 < conv_integer(cmdBuf(7 downto 0)) then position := position + 2; else