diff --git a/MainController/AlteraPLL.bsf b/MainController/AlteraPLL.bsf
index 9021791..c37c39a 100644
--- a/MainController/AlteraPLL.bsf
+++ b/MainController/AlteraPLL.bsf
@@ -18,47 +18,90 @@ programming logic devices manufactured by Altera and sold by
 Altera or its authorized distributors.  Please refer to the 
 applicable agreement for further details.
 */
-(header "symbol" (version "1.1"))
+(header "symbol" (version "1.2"))
 (symbol
-	(rect 16 16 168 128)
-	(text "AlteraPLL" (rect 5 0 47 12)(font "Arial" ))
-	(text "inst" (rect 8 96 20 108)(font "Arial" ))
+	(rect 0 0 264 184)
+	(text "AlteraPLL" (rect 104 0 171 16)(font "Arial" (font_size 10)))
+	(text "inst" (rect 8 168 25 180)(font "Arial" ))
 	(port
-		(pt 0 32)
+		(pt 0 64)
 		(input)
-		(text "areset" (rect 0 0 24 12)(font "Arial" ))
-		(text "areset" (rect 21 27 45 39)(font "Arial" ))
-		(line (pt 0 32)(pt 16 32)(line_width 1))
+		(text "inclk0" (rect 0 0 31 14)(font "Arial" (font_size 8)))
+		(text "inclk0" (rect 4 50 29 63)(font "Arial" (font_size 8)))
+		(line (pt 0 64)(pt 48 64))
 	)
 	(port
-		(pt 0 48)
+		(pt 0 80)
 		(input)
-		(text "inclk0" (rect 0 0 21 12)(font "Arial" ))
-		(text "inclk0" (rect 21 43 42 55)(font "Arial" ))
-		(line (pt 0 48)(pt 16 48)(line_width 1))
+		(text "areset" (rect 0 0 36 14)(font "Arial" (font_size 8)))
+		(text "areset" (rect 4 66 33 79)(font "Arial" (font_size 8)))
+		(line (pt 0 80)(pt 48 80))
 	)
 	(port
-		(pt 152 32)
+		(pt 264 64)
 		(output)
-		(text "c0" (rect 0 0 9 12)(font "Arial" ))
-		(text "c0" (rect 122 27 131 39)(font "Arial" ))
-		(line (pt 152 32)(pt 136 32)(line_width 1))
+		(text "c0" (rect 0 0 14 14)(font "Arial" (font_size 8)))
+		(text "c0" (rect 248 50 258 63)(font "Arial" (font_size 8)))
 	)
 	(port
-		(pt 152 48)
+		(pt 264 80)
 		(output)
-		(text "c1" (rect 0 0 8 12)(font "Arial" ))
-		(text "c1" (rect 123 43 131 55)(font "Arial" ))
-		(line (pt 152 48)(pt 136 48)(line_width 1))
+		(text "c1" (rect 0 0 14 14)(font "Arial" (font_size 8)))
+		(text "c1" (rect 248 66 256 79)(font "Arial" (font_size 8)))
 	)
 	(port
-		(pt 152 64)
+		(pt 264 96)
 		(output)
-		(text "locked" (rect 0 0 24 12)(font "Arial" ))
-		(text "locked" (rect 107 59 131 71)(font "Arial" ))
-		(line (pt 152 64)(pt 136 64)(line_width 1))
+		(text "c2" (rect 0 0 14 14)(font "Arial" (font_size 8)))
+		(text "c2" (rect 248 82 258 95)(font "Arial" (font_size 8)))
+	)
+	(port
+		(pt 264 112)
+		(output)
+		(text "locked" (rect 0 0 36 14)(font "Arial" (font_size 8)))
+		(text "locked" (rect 229 98 258 111)(font "Arial" (font_size 8)))
 	)
 	(drawing
-		(rectangle (rect 16 16 136 96)(line_width 1))
+		(text "Cyclone III" (rect 202 168 449 347)(font "Arial" ))
+		(text "inclk0 frequency: 25.000 MHz" (rect 58 59 239 129)(font "Arial" ))
+		(text "Operation Mode: Normal" (rect 58 72 215 155)(font "Arial" ))
+		(text "Clk " (rect 59 93 132 197)(font "Arial" ))
+		(text "Ratio" (rect 80 93 180 197)(font "Arial" ))
+		(text "Ph (dg)" (rect 106 93 241 197)(font "Arial" ))
+		(text "DC (%)" (rect 140 93 310 197)(font "Arial" ))
+		(text "c0" (rect 62 107 132 225)(font "Arial" ))
+		(text "4/1" (rect 85 107 180 225)(font "Arial" ))
+		(text "0.00" (rect 112 107 240 225)(font "Arial" ))
+		(text "50.00" (rect 144 107 309 225)(font "Arial" ))
+		(text "c1" (rect 62 121 131 253)(font "Arial" ))
+		(text "8/1" (rect 85 121 180 253)(font "Arial" ))
+		(text "0.00" (rect 112 121 240 253)(font "Arial" ))
+		(text "50.00" (rect 144 121 309 253)(font "Arial" ))
+		(text "c2" (rect 62 135 132 281)(font "Arial" ))
+		(text "16/1" (rect 82 135 179 281)(font "Arial" ))
+		(text "0.00" (rect 112 135 240 281)(font "Arial" ))
+		(text "50.00" (rect 144 135 309 281)(font "Arial" ))
+		(line (pt 0 0)(pt 265 0))
+		(line (pt 265 0)(pt 265 185))
+		(line (pt 0 185)(pt 265 185))
+		(line (pt 0 0)(pt 0 185))
+		(line (pt 56 91)(pt 172 91))
+		(line (pt 56 104)(pt 172 104))
+		(line (pt 56 118)(pt 172 118))
+		(line (pt 56 132)(pt 172 132))
+		(line (pt 56 146)(pt 172 146))
+		(line (pt 56 91)(pt 56 146))
+		(line (pt 77 91)(pt 77 146)(line_width 3))
+		(line (pt 103 91)(pt 103 146)(line_width 3))
+		(line (pt 137 91)(pt 137 146)(line_width 3))
+		(line (pt 171 91)(pt 171 146))
+		(line (pt 48 48)(pt 215 48))
+		(line (pt 215 48)(pt 215 167))
+		(line (pt 48 167)(pt 215 167))
+		(line (pt 48 48)(pt 48 167))
+		(line (pt 263 64)(pt 215 64))
+		(line (pt 263 80)(pt 215 80))
+		(line (pt 263 96)(pt 215 96))
+		(line (pt 263 112)(pt 215 112))
 	)
 )
diff --git a/MainController/AlteraPLL.cmp b/MainController/AlteraPLL.cmp
index 9a8bfe2..f1efcaa 100644
--- a/MainController/AlteraPLL.cmp
+++ b/MainController/AlteraPLL.cmp
@@ -20,6 +20,7 @@ component AlteraPLL
 		inclk0		: IN STD_LOGIC  := '0';
 		c0		: OUT STD_LOGIC ;
 		c1		: OUT STD_LOGIC ;
+		c2		: OUT STD_LOGIC ;
 		locked		: OUT STD_LOGIC 
 	);
 end component;
diff --git a/MainController/AlteraPLL.ppf b/MainController/AlteraPLL.ppf
index 8e746fe..10903ab 100644
--- a/MainController/AlteraPLL.ppf
+++ b/MainController/AlteraPLL.ppf
@@ -6,6 +6,7 @@
 <pin name="inclk0" direction="input" scope="external" source="clock"  />
 <pin name="c0" direction="output" scope="external" source="clock"  />
 <pin name="c1" direction="output" scope="external" source="clock"  />
+<pin name="c2" direction="output" scope="external" source="clock"  />
 <pin name="locked" direction="output" scope="external"  />
 
 </global>
diff --git a/MainController/AlteraPLL.qip b/MainController/AlteraPLL.qip
index de60f8e..6006c05 100644
--- a/MainController/AlteraPLL.qip
+++ b/MainController/AlteraPLL.qip
@@ -1,5 +1,7 @@
 set_global_assignment -name IP_TOOL_NAME "ALTPLL"
 set_global_assignment -name IP_TOOL_VERSION "13.1"
 set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) "AlteraPLL.vhd"]
+set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "AlteraPLL.bsf"]
+set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "AlteraPLL_inst.vhd"]
 set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "AlteraPLL.cmp"]
 set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "AlteraPLL.ppf"]
diff --git a/MainController/AlteraPLL.vhd b/MainController/AlteraPLL.vhd
index 31cc120..6748dcf 100644
--- a/MainController/AlteraPLL.vhd
+++ b/MainController/AlteraPLL.vhd
@@ -46,6 +46,7 @@ ENTITY AlteraPLL IS
 		inclk0		: IN STD_LOGIC  := '0';
 		c0		: OUT STD_LOGIC ;
 		c1		: OUT STD_LOGIC ;
+		c2		: OUT STD_LOGIC ;
 		locked		: OUT STD_LOGIC 
 	);
 END AlteraPLL;
@@ -58,9 +59,10 @@ ARCHITECTURE SYN OF alterapll IS
 	SIGNAL sub_wire2	: STD_LOGIC ;
 	SIGNAL sub_wire3	: STD_LOGIC ;
 	SIGNAL sub_wire4	: STD_LOGIC ;
-	SIGNAL sub_wire5	: STD_LOGIC_VECTOR (1 DOWNTO 0);
-	SIGNAL sub_wire6_bv	: BIT_VECTOR (0 DOWNTO 0);
-	SIGNAL sub_wire6	: STD_LOGIC_VECTOR (0 DOWNTO 0);
+	SIGNAL sub_wire5	: STD_LOGIC ;
+	SIGNAL sub_wire6	: STD_LOGIC_VECTOR (1 DOWNTO 0);
+	SIGNAL sub_wire7_bv	: BIT_VECTOR (0 DOWNTO 0);
+	SIGNAL sub_wire7	: STD_LOGIC_VECTOR (0 DOWNTO 0);
 
 
 
@@ -75,6 +77,10 @@ ARCHITECTURE SYN OF alterapll IS
 		clk1_duty_cycle		: NATURAL;
 		clk1_multiply_by		: NATURAL;
 		clk1_phase_shift		: STRING;
+		clk2_divide_by		: NATURAL;
+		clk2_duty_cycle		: NATURAL;
+		clk2_multiply_by		: NATURAL;
+		clk2_phase_shift		: STRING;
 		compensate_clock		: STRING;
 		inclk0_input_frequency		: NATURAL;
 		intended_device_family		: STRING;
@@ -135,15 +141,17 @@ ARCHITECTURE SYN OF alterapll IS
 	END COMPONENT;
 
 BEGIN
-	sub_wire6_bv(0 DOWNTO 0) <= "0";
-	sub_wire6    <= To_stdlogicvector(sub_wire6_bv);
+	sub_wire7_bv(0 DOWNTO 0) <= "0";
+	sub_wire7    <= To_stdlogicvector(sub_wire7_bv);
+	sub_wire4    <= sub_wire0(2);
 	sub_wire3    <= sub_wire0(0);
 	sub_wire1    <= sub_wire0(1);
 	c1    <= sub_wire1;
 	locked    <= sub_wire2;
 	c0    <= sub_wire3;
-	sub_wire4    <= inclk0;
-	sub_wire5    <= sub_wire6(0 DOWNTO 0) & sub_wire4;
+	c2    <= sub_wire4;
+	sub_wire5    <= inclk0;
+	sub_wire6    <= sub_wire7(0 DOWNTO 0) & sub_wire5;
 
 	altpll_component : altpll
 	GENERIC MAP (
@@ -156,6 +164,10 @@ BEGIN
 		clk1_duty_cycle => 50,
 		clk1_multiply_by => 8,
 		clk1_phase_shift => "0",
+		clk2_divide_by => 1,
+		clk2_duty_cycle => 50,
+		clk2_multiply_by => 16,
+		clk2_phase_shift => "0",
 		compensate_clock => "CLK0",
 		inclk0_input_frequency => 40000,
 		intended_device_family => "Cyclone III",
@@ -190,7 +202,7 @@ BEGIN
 		port_scanwrite => "PORT_UNUSED",
 		port_clk0 => "PORT_USED",
 		port_clk1 => "PORT_USED",
-		port_clk2 => "PORT_UNUSED",
+		port_clk2 => "PORT_USED",
 		port_clk3 => "PORT_UNUSED",
 		port_clk4 => "PORT_UNUSED",
 		port_clk5 => "PORT_UNUSED",
@@ -209,7 +221,7 @@ BEGIN
 	)
 	PORT MAP (
 		areset => areset,
-		inclk => sub_wire5,
+		inclk => sub_wire6,
 		clk => sub_wire0,
 		locked => sub_wire2
 	);
@@ -239,10 +251,13 @@ END SYN;
 -- Retrieval info: PRIVATE: DEVICE_SPEED_GRADE STRING "8"
 -- Retrieval info: PRIVATE: DIV_FACTOR0 NUMERIC "1"
 -- Retrieval info: PRIVATE: DIV_FACTOR1 NUMERIC "1"
+-- Retrieval info: PRIVATE: DIV_FACTOR2 NUMERIC "1"
 -- Retrieval info: PRIVATE: DUTY_CYCLE0 STRING "50.00000000"
 -- Retrieval info: PRIVATE: DUTY_CYCLE1 STRING "50.00000000"
+-- Retrieval info: PRIVATE: DUTY_CYCLE2 STRING "50.00000000"
 -- Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE0 STRING "100.000000"
 -- Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE1 STRING "200.000000"
+-- Retrieval info: PRIVATE: EFF_OUTPUT_FREQ_VALUE2 STRING "400.000000"
 -- Retrieval info: PRIVATE: EXPLICIT_SWITCHOVER_COUNTER STRING "0"
 -- Retrieval info: PRIVATE: EXT_FEEDBACK_RADIO STRING "0"
 -- Retrieval info: PRIVATE: GLOCKED_COUNTER_EDIT_CHANGED STRING "1"
@@ -264,25 +279,33 @@ END SYN;
 -- Retrieval info: PRIVATE: LVDS_MODE_DATA_RATE_DIRTY NUMERIC "0"
 -- Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT0 STRING "deg"
 -- Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT1 STRING "deg"
+-- Retrieval info: PRIVATE: LVDS_PHASE_SHIFT_UNIT2 STRING "ps"
 -- Retrieval info: PRIVATE: MIG_DEVICE_SPEED_GRADE STRING "Any"
 -- Retrieval info: PRIVATE: MIRROR_CLK0 STRING "0"
 -- Retrieval info: PRIVATE: MIRROR_CLK1 STRING "0"
+-- Retrieval info: PRIVATE: MIRROR_CLK2 STRING "0"
 -- Retrieval info: PRIVATE: MULT_FACTOR0 NUMERIC "4"
 -- Retrieval info: PRIVATE: MULT_FACTOR1 NUMERIC "8"
+-- Retrieval info: PRIVATE: MULT_FACTOR2 NUMERIC "16"
 -- Retrieval info: PRIVATE: NORMAL_MODE_RADIO STRING "1"
 -- Retrieval info: PRIVATE: OUTPUT_FREQ0 STRING "100.00000000"
 -- Retrieval info: PRIVATE: OUTPUT_FREQ1 STRING "200.00000000"
+-- Retrieval info: PRIVATE: OUTPUT_FREQ2 STRING "400.00000000"
 -- Retrieval info: PRIVATE: OUTPUT_FREQ_MODE0 STRING "0"
 -- Retrieval info: PRIVATE: OUTPUT_FREQ_MODE1 STRING "0"
+-- Retrieval info: PRIVATE: OUTPUT_FREQ_MODE2 STRING "0"
 -- Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT0 STRING "MHz"
 -- Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT1 STRING "MHz"
+-- Retrieval info: PRIVATE: OUTPUT_FREQ_UNIT2 STRING "MHz"
 -- Retrieval info: PRIVATE: PHASE_RECONFIG_FEATURE_ENABLED STRING "1"
 -- Retrieval info: PRIVATE: PHASE_RECONFIG_INPUTS_CHECK STRING "0"
 -- Retrieval info: PRIVATE: PHASE_SHIFT0 STRING "0.00000000"
 -- Retrieval info: PRIVATE: PHASE_SHIFT1 STRING "0.00000000"
+-- Retrieval info: PRIVATE: PHASE_SHIFT2 STRING "0.00000000"
 -- Retrieval info: PRIVATE: PHASE_SHIFT_STEP_ENABLED_CHECK STRING "0"
 -- Retrieval info: PRIVATE: PHASE_SHIFT_UNIT0 STRING "deg"
 -- Retrieval info: PRIVATE: PHASE_SHIFT_UNIT1 STRING "deg"
+-- Retrieval info: PRIVATE: PHASE_SHIFT_UNIT2 STRING "deg"
 -- Retrieval info: PRIVATE: PLL_ADVANCED_PARAM_CHECK STRING "0"
 -- Retrieval info: PRIVATE: PLL_ARESET_CHECK STRING "1"
 -- Retrieval info: PRIVATE: PLL_AUTOPLL_CHECK NUMERIC "1"
@@ -306,13 +329,16 @@ END SYN;
 -- Retrieval info: PRIVATE: SRC_SYNCH_COMP_RADIO STRING "0"
 -- Retrieval info: PRIVATE: STICKY_CLK0 STRING "1"
 -- Retrieval info: PRIVATE: STICKY_CLK1 STRING "1"
+-- Retrieval info: PRIVATE: STICKY_CLK2 STRING "1"
 -- Retrieval info: PRIVATE: SWITCHOVER_COUNT_EDIT NUMERIC "1"
 -- Retrieval info: PRIVATE: SWITCHOVER_FEATURE_ENABLED STRING "1"
 -- Retrieval info: PRIVATE: SYNTH_WRAPPER_GEN_POSTFIX STRING "0"
 -- Retrieval info: PRIVATE: USE_CLK0 STRING "1"
 -- Retrieval info: PRIVATE: USE_CLK1 STRING "1"
+-- Retrieval info: PRIVATE: USE_CLK2 STRING "1"
 -- Retrieval info: PRIVATE: USE_CLKENA0 STRING "0"
 -- Retrieval info: PRIVATE: USE_CLKENA1 STRING "0"
+-- Retrieval info: PRIVATE: USE_CLKENA2 STRING "0"
 -- Retrieval info: PRIVATE: USE_MIL_SPEED_GRADE NUMERIC "0"
 -- Retrieval info: PRIVATE: ZERO_DELAY_RADIO STRING "0"
 -- Retrieval info: LIBRARY: altera_mf altera_mf.altera_mf_components.all
@@ -325,6 +351,10 @@ END SYN;
 -- Retrieval info: CONSTANT: CLK1_DUTY_CYCLE NUMERIC "50"
 -- Retrieval info: CONSTANT: CLK1_MULTIPLY_BY NUMERIC "8"
 -- Retrieval info: CONSTANT: CLK1_PHASE_SHIFT STRING "0"
+-- Retrieval info: CONSTANT: CLK2_DIVIDE_BY NUMERIC "1"
+-- Retrieval info: CONSTANT: CLK2_DUTY_CYCLE NUMERIC "50"
+-- Retrieval info: CONSTANT: CLK2_MULTIPLY_BY NUMERIC "16"
+-- Retrieval info: CONSTANT: CLK2_PHASE_SHIFT STRING "0"
 -- Retrieval info: CONSTANT: COMPENSATE_CLOCK STRING "CLK0"
 -- Retrieval info: CONSTANT: INCLK0_INPUT_FREQUENCY NUMERIC "40000"
 -- Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "Cyclone III"
@@ -358,7 +388,7 @@ END SYN;
 -- Retrieval info: CONSTANT: PORT_SCANWRITE STRING "PORT_UNUSED"
 -- Retrieval info: CONSTANT: PORT_clk0 STRING "PORT_USED"
 -- Retrieval info: CONSTANT: PORT_clk1 STRING "PORT_USED"
--- Retrieval info: CONSTANT: PORT_clk2 STRING "PORT_UNUSED"
+-- Retrieval info: CONSTANT: PORT_clk2 STRING "PORT_USED"
 -- Retrieval info: CONSTANT: PORT_clk3 STRING "PORT_UNUSED"
 -- Retrieval info: CONSTANT: PORT_clk4 STRING "PORT_UNUSED"
 -- Retrieval info: CONSTANT: PORT_clk5 STRING "PORT_UNUSED"
@@ -379,6 +409,7 @@ END SYN;
 -- Retrieval info: USED_PORT: areset 0 0 0 0 INPUT GND "areset"
 -- Retrieval info: USED_PORT: c0 0 0 0 0 OUTPUT_CLK_EXT VCC "c0"
 -- Retrieval info: USED_PORT: c1 0 0 0 0 OUTPUT_CLK_EXT VCC "c1"
+-- Retrieval info: USED_PORT: c2 0 0 0 0 OUTPUT_CLK_EXT VCC "c2"
 -- Retrieval info: USED_PORT: inclk0 0 0 0 0 INPUT_CLK_EXT GND "inclk0"
 -- Retrieval info: USED_PORT: locked 0 0 0 0 OUTPUT GND "locked"
 -- Retrieval info: CONNECT: @areset 0 0 0 0 areset 0 0 0 0
@@ -386,12 +417,13 @@ END SYN;
 -- Retrieval info: CONNECT: @inclk 0 0 1 0 inclk0 0 0 0 0
 -- Retrieval info: CONNECT: c0 0 0 0 0 @clk 0 0 1 0
 -- Retrieval info: CONNECT: c1 0 0 0 0 @clk 0 0 1 1
+-- Retrieval info: CONNECT: c2 0 0 0 0 @clk 0 0 1 2
 -- Retrieval info: CONNECT: locked 0 0 0 0 @locked 0 0 0 0
 -- Retrieval info: GEN_FILE: TYPE_NORMAL AlteraPLL.vhd TRUE
 -- Retrieval info: GEN_FILE: TYPE_NORMAL AlteraPLL.ppf TRUE
 -- Retrieval info: GEN_FILE: TYPE_NORMAL AlteraPLL.inc FALSE
 -- Retrieval info: GEN_FILE: TYPE_NORMAL AlteraPLL.cmp TRUE
--- Retrieval info: GEN_FILE: TYPE_NORMAL AlteraPLL.bsf FALSE
--- Retrieval info: GEN_FILE: TYPE_NORMAL AlteraPLL_inst.vhd FALSE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL AlteraPLL.bsf TRUE
+-- Retrieval info: GEN_FILE: TYPE_NORMAL AlteraPLL_inst.vhd TRUE
 -- Retrieval info: LIB_FILE: altera_mf
 -- Retrieval info: CBX_MODULE_PREFIX: ON
diff --git a/MainController/AlteraPLL_inst.vhd b/MainController/AlteraPLL_inst.vhd
new file mode 100644
index 0000000..edd82d0
--- /dev/null
+++ b/MainController/AlteraPLL_inst.vhd
@@ -0,0 +1,8 @@
+AlteraPLL_inst : AlteraPLL PORT MAP (
+		areset	 => areset_sig,
+		inclk0	 => inclk0_sig,
+		c0	 => c0_sig,
+		c1	 => c1_sig,
+		c2	 => c2_sig,
+		locked	 => locked_sig
+	);
diff --git a/MainController/MainController.bdf b/MainController/MainController.bdf
index da69a11..7601c83 100644
--- a/MainController/MainController.bdf
+++ b/MainController/MainController.bdf
@@ -735,49 +735,6 @@ applicable agreement for further details.
 	(text "VCC" (rect 4 7 24 17)(font "Arial" (font_size 6)))
 	(annotation_block (location)(rect 2032 968 2080 1200))
 )
-(symbol
-	(rect 704 88 856 200)
-	(text "AlteraPLL" (rect 5 0 52 12)(font "Arial" ))
-	(text "inst" (rect 8 96 25 108)(font "Arial" ))
-	(port
-		(pt 0 32)
-		(input)
-		(text "areset" (rect 0 0 30 12)(font "Arial" ))
-		(text "areset" (rect 21 27 51 39)(font "Arial" ))
-		(line (pt 0 32)(pt 16 32))
-	)
-	(port
-		(pt 0 48)
-		(input)
-		(text "inclk0" (rect 0 0 28 12)(font "Arial" ))
-		(text "inclk0" (rect 21 43 49 55)(font "Arial" ))
-		(line (pt 0 48)(pt 16 48))
-	)
-	(port
-		(pt 152 32)
-		(output)
-		(text "c0" (rect 0 0 11 12)(font "Arial" ))
-		(text "c0" (rect 122 27 133 39)(font "Arial" ))
-		(line (pt 152 32)(pt 136 32))
-	)
-	(port
-		(pt 152 48)
-		(output)
-		(text "c1" (rect 0 0 11 12)(font "Arial" ))
-		(text "c1" (rect 122 43 133 55)(font "Arial" ))
-		(line (pt 152 48)(pt 136 48))
-	)
-	(port
-		(pt 152 64)
-		(output)
-		(text "locked" (rect 0 0 31 12)(font "Arial" ))
-		(text "locked" (rect 105 59 136 71)(font "Arial" ))
-		(line (pt 152 64)(pt 136 64))
-	)
-	(drawing
-		(rectangle (rect 16 16 136 96))
-	)
-)
 (symbol
 	(rect 1528 -640 1648 -560)
 	(text "LedBlink" (rect 5 0 46 12)(font "Arial" ))
@@ -801,7 +758,7 @@ applicable agreement for further details.
 	)
 )
 (symbol
-	(rect 472 136 504 168)
+	(rect 560 -480 592 -448)
 	(text "GND" (rect 8 16 29 26)(font "Arial" (font_size 6)))
 	(text "inst8" (rect 3 21 26 33)(font "Arial" )(invisible))
 	(port
@@ -2310,17 +2267,91 @@ applicable agreement for further details.
 	)
 	(annotation_block (parameter)(rect 1032 2032 1272 2080))
 )
-(connector
-	(pt 488 136)
-	(pt 488 120)
-)
-(connector
-	(pt 488 120)
-	(pt 704 120)
-)
-(connector
-	(pt 608 136)
-	(pt 704 136)
+(symbol
+	(rect 664 -576 928 -392)
+	(text "AlteraPLL" (rect 104 0 171 16)(font "Arial" (font_size 10)))
+	(text "inst" (rect 8 168 25 180)(font "Arial" ))
+	(port
+		(pt 0 64)
+		(input)
+		(text "inclk0" (rect 0 0 31 14)(font "Arial" (font_size 8)))
+		(text "inclk0" (rect 4 50 35 64)(font "Arial" (font_size 8)))
+		(line (pt 0 64)(pt 48 64))
+	)
+	(port
+		(pt 0 80)
+		(input)
+		(text "areset" (rect 0 0 36 14)(font "Arial" (font_size 8)))
+		(text "areset" (rect 4 66 40 80)(font "Arial" (font_size 8)))
+		(line (pt 0 80)(pt 48 80))
+	)
+	(port
+		(pt 264 64)
+		(output)
+		(text "c0" (rect 0 0 14 14)(font "Arial" (font_size 8)))
+		(text "c0" (rect 248 50 262 64)(font "Arial" (font_size 8)))
+	)
+	(port
+		(pt 264 80)
+		(output)
+		(text "c1" (rect 0 0 14 14)(font "Arial" (font_size 8)))
+		(text "c1" (rect 248 66 262 80)(font "Arial" (font_size 8)))
+	)
+	(port
+		(pt 264 96)
+		(output)
+		(text "c2" (rect 0 0 14 14)(font "Arial" (font_size 8)))
+		(text "c2" (rect 248 82 262 96)(font "Arial" (font_size 8)))
+	)
+	(port
+		(pt 264 112)
+		(output)
+		(text "locked" (rect 0 0 36 14)(font "Arial" (font_size 8)))
+		(text "locked" (rect 229 98 265 112)(font "Arial" (font_size 8)))
+	)
+	(drawing
+		(text "Cyclone III" (rect 202 168 257 180)(font "Arial" ))
+		(text "inclk0 frequency: 25.000 MHz" (rect 58 59 205 71)(font "Arial" ))
+		(text "Operation Mode: Normal" (rect 58 72 177 84)(font "Arial" ))
+		(text "Clk " (rect 59 93 79 105)(font "Arial" ))
+		(text "Ratio" (rect 80 93 105 105)(font "Arial" ))
+		(text "Ph (dg)" (rect 106 93 141 105)(font "Arial" ))
+		(text "DC (%)" (rect 140 93 176 105)(font "Arial" ))
+		(text "c0" (rect 62 107 73 119)(font "Arial" ))
+		(text "4/1" (rect 85 107 100 119)(font "Arial" ))
+		(text "0.00" (rect 112 107 133 119)(font "Arial" ))
+		(text "50.00" (rect 144 107 171 119)(font "Arial" ))
+		(text "c1" (rect 62 121 73 133)(font "Arial" ))
+		(text "8/1" (rect 85 121 100 133)(font "Arial" ))
+		(text "0.00" (rect 112 121 133 133)(font "Arial" ))
+		(text "50.00" (rect 144 121 171 133)(font "Arial" ))
+		(text "c2" (rect 62 135 73 147)(font "Arial" ))
+		(text "16/1" (rect 82 135 103 147)(font "Arial" ))
+		(text "0.00" (rect 112 135 133 147)(font "Arial" ))
+		(text "50.00" (rect 144 135 171 147)(font "Arial" ))
+		(line (pt 0 0)(pt 265 0))
+		(line (pt 265 0)(pt 265 185))
+		(line (pt 0 185)(pt 265 185))
+		(line (pt 0 0)(pt 0 185))
+		(line (pt 56 91)(pt 172 91))
+		(line (pt 56 104)(pt 172 104))
+		(line (pt 56 118)(pt 172 118))
+		(line (pt 56 132)(pt 172 132))
+		(line (pt 56 146)(pt 172 146))
+		(line (pt 56 91)(pt 56 146))
+		(line (pt 77 91)(pt 77 146)(line_width 3))
+		(line (pt 103 91)(pt 103 146)(line_width 3))
+		(line (pt 137 91)(pt 137 146)(line_width 3))
+		(line (pt 171 91)(pt 171 146))
+		(line (pt 48 48)(pt 215 48))
+		(line (pt 215 48)(pt 215 167))
+		(line (pt 48 167)(pt 215 167))
+		(line (pt 48 48)(pt 48 167))
+		(line (pt 263 64)(pt 215 64))
+		(line (pt 263 80)(pt 215 80))
+		(line (pt 263 96)(pt 215 96))
+		(line (pt 263 112)(pt 215 112))
+	)
 )
 (connector
 	(pt 544 272)
@@ -2369,10 +2400,6 @@ applicable agreement for further details.
 	(pt 1040 288)
 	(bus)
 )
-(connector
-	(pt 704 240)
-	(pt 680 240)
-)
 (connector
 	(pt 1040 576)
 	(pt 608 576)
@@ -2645,14 +2672,6 @@ applicable agreement for further details.
 	(pt 1016 368)
 	(pt 608 368)
 )
-(connector
-	(pt 608 136)
-	(pt 608 368)
-)
-(connector
-	(pt 608 368)
-	(pt 608 408)
-)
 (connector
 	(pt 1368 288)
 	(pt 1840 288)
@@ -2661,26 +2680,6 @@ applicable agreement for further details.
 	(pt 1368 304)
 	(pt 1840 304)
 )
-(connector
-	(pt 680 240)
-	(pt 680 80)
-)
-(connector
-	(pt 856 136)
-	(pt 880 136)
-)
-(connector
-	(pt 680 80)
-	(pt 880 80)
-)
-(connector
-	(pt 880 136)
-	(pt 880 80)
-)
-(connector
-	(pt 608 32)
-	(pt 608 136)
-)
 (connector
 	(pt 1368 912)
 	(pt 1440 912)
@@ -2843,10 +2842,6 @@ applicable agreement for further details.
 	(pt 608 -112)
 	(pt 608 -16)
 )
-(connector
-	(pt 608 -16)
-	(pt 608 32)
-)
 (connector
 	(pt 1040 -32)
 	(pt 800 -32)
@@ -2970,10 +2965,6 @@ applicable agreement for further details.
 	(pt 608 -608)
 	(pt 1528 -608)
 )
-(connector
-	(pt 608 -608)
-	(pt 608 -360)
-)
 (connector
 	(pt 1648 -608)
 	(pt 1768 -608)
@@ -3158,11 +3149,62 @@ applicable agreement for further details.
 	(pt 1856 2112)
 	(bus)
 )
+(connector
+	(pt 608 -16)
+	(pt 608 32)
+)
+(connector
+	(pt 608 32)
+	(pt 608 368)
+)
+(connector
+	(pt 608 368)
+	(pt 608 408)
+)
+(connector
+	(pt 704 240)
+	(pt 688 240)
+)
+(connector
+	(pt 688 192)
+	(pt 688 240)
+)
+(connector
+	(pt 1016 192)
+	(pt 688 192)
+)
+(connector
+	(pt 1016 192)
+	(pt 1016 -480)
+)
+(connector
+	(pt 608 -512)
+	(pt 664 -512)
+)
+(connector
+	(pt 608 -608)
+	(pt 608 -512)
+)
+(connector
+	(pt 608 -512)
+	(pt 608 -360)
+)
+(connector
+	(pt 928 -480)
+	(pt 1016 -480)
+)
+(connector
+	(pt 664 -496)
+	(pt 576 -496)
+)
+(connector
+	(pt 576 -496)
+	(pt 576 -480)
+)
 (junction (pt 1000 288))
 (junction (pt 984 304))
 (junction (pt 968 320))
 (junction (pt 952 336))
-(junction (pt 608 136))
 (junction (pt 608 576))
 (junction (pt 608 656))
 (junction (pt 1000 592))
@@ -3209,3 +3251,4 @@ applicable agreement for further details.
 (junction (pt 968 1960))
 (junction (pt 952 1976))
 (junction (pt 608 1512))
+(junction (pt 608 -512))
diff --git a/MainController/output_file.rbf b/MainController/output_file.rbf
index 2f23e56..a6798c1 100644
Binary files a/MainController/output_file.rbf and b/MainController/output_file.rbf differ