From 92fd7969bca128be83a5338adb51d27ca73da426 Mon Sep 17 00:00:00 2001 From: sokolovstanislav Date: Fri, 7 Jun 2024 12:21:36 +0300 Subject: [PATCH] =?UTF-8?q?=D0=94=D0=BE=D0=B1=D0=B0=D0=B2=D0=B8=D0=BB?= =?UTF-8?q?=D0=B8=20=D0=B0=D0=BF=D0=BF=D0=B0=D1=80=D0=B0=D1=82=D0=BD=D1=8B?= =?UTF-8?q?=D0=B9=20=D0=BA=D0=BE=D0=BD=D1=82=D1=80=D0=BE=D0=BB=D1=8C=20?= =?UTF-8?q?=D1=82=D0=B0=D0=B9=D0=BC=D0=B0=D1=83=D1=82=D0=B0=20=D0=B2=20?= =?UTF-8?q?=D1=88=D0=B8=D0=BD=D0=B5=20=D0=B4=D0=BB=D1=8F=20=D0=B3=D0=BE?= =?UTF-8?q?=D1=82=D0=BE=D0=B2=D0=BD=D0=BE=D1=81=D1=82=D0=B8=20=D0=BF=D0=B5?= =?UTF-8?q?=D1=80=D0=B8=D1=84=D0=B5=D1=80=D0=B8=D0=B9=D0=BD=D1=8B=D0=B9=20?= =?UTF-8?q?=D0=BF=D0=BB=D0=B0=D1=82.=20=D0=94=D0=BE=D0=B1=D0=B0=D0=B2?= =?UTF-8?q?=D0=B8=D0=BB=D0=B8=20=D0=B2=20=D1=80=D0=B5=D0=B3=D0=B8=D1=81?= =?UTF-8?q?=D1=82=D1=80=20=D0=BA=D0=BE=D0=BD=D1=82=D1=80=D0=BE=D0=BB=D1=8F?= =?UTF-8?q?=20=D1=88=D0=B8=D0=BD=D1=8B=20=D1=81=D0=BE=D1=81=D1=82=D0=BE?= =?UTF-8?q?=D1=8F=D0=BD=D0=B8=D0=B5=20=D0=BF=D0=B5=D1=80=D0=B5=D0=B4=D0=B0?= =?UTF-8?q?=D1=87=D0=B8=20(=D0=B1=D0=B8=D1=82=201).=20=D0=A3=D0=BC=D0=B5?= =?UTF-8?q?=D0=BD=D1=8C=D1=88=D0=B8=D0=BB=D0=B8=20=D0=BF=D0=B5=D1=80=D0=B8?= =?UTF-8?q?=D0=BE=D0=B4=20=D1=82=D0=B0=D0=BA=D1=82=D0=B0=20=D0=BF=D0=BE=20?= =?UTF-8?q?=D1=81=D0=B8=D1=85=D1=80=D0=BE=D1=81=D0=B8=D0=B3=D0=BD=D0=B0?= =?UTF-8?q?=D0=BB=D1=83=20=D0=BD=D0=B0=20=D1=87=D0=B5=D1=82=D0=B2=D0=B5?= =?UTF-8?q?=D1=80=D1=82=D1=8C.?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- MainController/RAM9X8_SerialBusMaster.vhd | 86 +++++++++++++++-------- 1 file changed, 55 insertions(+), 31 deletions(-) diff --git a/MainController/RAM9X8_SerialBusMaster.vhd b/MainController/RAM9X8_SerialBusMaster.vhd index c168183..0055778 100644 --- a/MainController/RAM9X8_SerialBusMaster.vhd +++ b/MainController/RAM9X8_SerialBusMaster.vhd @@ -43,7 +43,7 @@ signal addressToTransmit : std_logic_vector(7 downto 0) := x"00"; signal dataToTransmit : std_logic_vector(15 downto 0) := x"0000"; signal dataFromDevices : std_logic_vector(15 downto 0) := x"0000"; -type CommunicationState_start is (Waiting, TransmitAddress, TransmitData, TransmitCRC, TransmitCheck, ReceiveData, ReceiveCRC, ReceiveCheck); +type CommunicationState_start is (Waiting, TransmitAddress, TransmitData, TransmitCRC, TransmitCheck, ReceiveData, ReceiveCRC, ReceiveCheck, Timeout); signal CommunicationState : CommunicationState_start := Waiting ; signal resetCRC : std_logic := '1'; @@ -110,7 +110,8 @@ begin process(clk) is variable count : integer range 0 to 255 := 0; - variable countValue : integer range 0 to 255 := 50; + variable halfPeriod : integer range 0 to 255 := 50; + variable pause : integer range 0 to 255 := 200; variable state : integer range 0 to 1 := 1; variable bitCnt : integer range -1 to 31 := 0; variable latch : integer range 0 to 1 := 0; @@ -122,9 +123,7 @@ begin bitCnt := 8; latch := 0; resetCRC <= '1'; - sbdataout <= '0'; - lineBusy <= '0'; - count := 0; + sbdataout <= '0'; state := 1; if start = '1' and startPrev = '0' then direction <= cmdBuf(15); @@ -132,11 +131,32 @@ begin addressToTransmit(7 downto 0) <= cmdBuf(7 downto 0); dataCRC(23 downto 16) <= cmdBuf(7 downto 0); dataToTransmit <= dataBufIn; - dataCRC(15 downto 0) <= dataBufIn; - CommunicationState <= TransmitAddress; - lineBusy <= '1'; - controlBuf <= (others => '0'); + dataCRC(15 downto 0) <= dataBufIn; + controlBuf(15 downto 2) <= (others => '0'); + controlBuf(1) <= '1'; + controlBuf(0) <= '0'; + if count < pause then + CommunicationState <= Timeout; + count := count + 1; + else + CommunicationState <= TransmitAddress; + count:= 0; + end if; + else + if count < pause then + count := count + 1; + controlBuf(1) <= '1'; + else + controlBuf(1) <= '0'; + end if; end if; + when Timeout => + if count < pause then + count := count + 1; + else + CommunicationState <= TransmitAddress; + count:= 0; + end if; when TransmitAddress => if bitCnt = -1 then if direction = '1' then @@ -147,7 +167,7 @@ begin end if; bitCnt := 15; else - if count < countValue and state = 1 then + if count < halfPeriod and state = 1 then if count = 0 then if latch = 0 then sbdataout <= direction; @@ -157,16 +177,16 @@ begin sbclk <= '0'; end if; count := count + 1; - elsif count = countValue and state = 1 then + elsif count = halfPeriod and state = 1 then latch := 1; count := 0; state := 0; - elsif count < countValue and state = 0 then + elsif count < halfPeriod and state = 0 then if count = 0 then sbclk <= '1'; end if; count := count + 1; - elsif count = countValue and state = 0 then + elsif count = halfPeriod and state = 0 then count := 0; state := 1; bitCnt := bitCnt - 1; @@ -177,21 +197,21 @@ begin CommunicationState <= TransmitCRC; bitCnt := 3; else - if count < countValue and state = 1 then + if count < halfPeriod and state = 1 then if count = 0 then sbdataout <= dataToTransmit(bitCnt); sbclk <= '0'; end if; count := count + 1; - elsif count = countValue and state = 1 then + elsif count = halfPeriod and state = 1 then count := 0; state := 0; - elsif count < countValue and state = 0 then + elsif count < halfPeriod and state = 0 then if count = 0 then sbclk <= '1'; end if; count := count + 1; - elsif count = countValue and state = 0 then + elsif count = halfPeriod and state = 0 then count := 0; state := 1; bitCnt := bitCnt - 1; @@ -202,32 +222,33 @@ begin if bitCnt = -1 then CommunicationState <= TransmitCheck; else - if count < countValue and state = 1 then + if count < halfPeriod and state = 1 then if count = 0 then sbdataout <= CRC(bitCnt); sbclk <= '0'; end if; count := count + 1; - elsif count = countValue and state = 1 then + elsif count = halfPeriod and state = 1 then count := 0; state := 0; - elsif count < countValue and state = 0 then + elsif count < halfPeriod and state = 0 then if count = 0 then sbclk <= '1'; end if; count := count + 1; - elsif count = countValue and state = 0 then + elsif count = halfPeriod and state = 0 then count := 0; state := 1; bitCnt := bitCnt - 1; end if; end if; - else + else + count := 0; CommunicationState <= Waiting; controlBuf(15) <= '1'; end if; when TransmitCheck => - if count < countValue and state = 1 then + if count < halfPeriod and state = 1 then if count = 0 then sbclk <= '0'; end if; @@ -247,21 +268,21 @@ begin CommunicationState <= ReceiveCRC; bitCnt := 3; else - if count < countValue and state = 1 then + if count < halfPeriod and state = 1 then if count = 0 then sbclk <= '0'; end if; count := count + 1; - elsif count = countValue and state = 1 then + elsif count = halfPeriod and state = 1 then dataFromDevices(bitCnt) <= sbdatain; count := 0; state := 0; - elsif count < countValue and state = 0 then + elsif count < halfPeriod and state = 0 then if count = 0 then sbclk <= '1'; end if; count := count + 1; - elsif count = countValue and state = 0 then + elsif count = halfPeriod and state = 0 then count := 0; state := 1; bitCnt := bitCnt - 1; @@ -271,12 +292,12 @@ begin if bitCnt = -1 then CommunicationState <= ReceiveCheck; else - if count < countValue and state = 1 then + if count < halfPeriod and state = 1 then if count = 0 then sbclk <= '0'; end if; count := count + 1; - elsif count = countValue and state = 1 then + elsif count = halfPeriod and state = 1 then bufCRC(BitCnt) <= sbdatain; count := 0; state := 0; @@ -286,12 +307,12 @@ begin dataCRC(15 downto 0) <= dataFromDevices(15 downto 0); resetCRC <= '0'; end if; - elsif count < countValue and state = 0 then + elsif count < halfPeriod and state = 0 then if count = 0 then sbclk <= '1'; end if; count := count + 1; - elsif count = countValue and state = 0 then + elsif count = halfPeriod and state = 0 then count := 0; state := 1; bitCnt := bitCnt - 1; @@ -308,8 +329,11 @@ begin else controlBuf(12) <= '1'; end if; + count := 0; CommunicationState <= Waiting; when others => + count := 0; + CommunicationState <= Waiting; end case; startPrev <= start; end if;