From 6bb13aec36cd8881f8ebd930cee581d2cea92217 Mon Sep 17 00:00:00 2001 From: sokolovstanislav Date: Mon, 4 Mar 2024 18:16:35 +0300 Subject: [PATCH] =?UTF-8?q?=D0=9E=D1=82=D0=BA=D0=BE=D1=80=D1=80=D0=B5?= =?UTF-8?q?=D0=BA=D1=82=D0=B8=D1=80=D0=BE=D0=B2=D0=B0=D0=BB=20=D0=B1=D0=BB?= =?UTF-8?q?=D0=BE=D0=BA=20=D0=BF=D0=B0=D0=BC=D1=8F=D1=82=D0=B8=20RAM=20?= =?UTF-8?q?=D0=B4=D0=BB=D1=8F=20=D0=B2=D0=BE=D0=B7=D0=BC=D0=BE=D0=B6=D0=BD?= =?UTF-8?q?=D0=BE=D0=B9=20=D1=80=D0=B0=D0=B1=D0=BE=D1=82=D1=8B=20=D1=81=20?= =?UTF-8?q?=D0=B4=D0=B2=D1=83=D0=BC=D1=8F=20=D1=83=D1=81=D1=82=D1=80=D0=BE?= =?UTF-8?q?=D0=B9=D1=81=D1=82=D0=B2=D0=B0=D0=BC=D0=B8=20=D0=BE=D0=B4=D0=BD?= =?UTF-8?q?=D0=BE=D0=B2=D1=80=D0=B5=D0=BC=D0=B5=D0=BD=D0=BD=D0=BE.=20?= =?UTF-8?q?=D0=9E=D0=B4=D0=BD=D0=BE=20=D0=B8=D0=B7=20=D0=BD=D0=B8=D1=85=20?= =?UTF-8?q?-=20=D0=B2=D0=BD=D0=B5=D1=88=D0=BD=D0=B8=D0=B9=20=D0=BA=D0=BE?= =?UTF-8?q?=D0=BD=D1=82=D1=80=D0=BE=D0=BB=D0=BB=D0=B5=D1=80.=20=D0=92?= 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=?UTF-8?q?=20=D0=B2=D0=BD=D1=83=D1=82=D1=80=D0=B8=20=D1=83=D1=81=D1=82?= =?UTF-8?q?=D1=80=D0=BE=D0=B9=D1=81=D1=82=D0=B2=D0=B0=20=D0=B1=D1=83=D0=B4?= =?UTF-8?q?=D1=83=D1=82=20=D1=82=D0=BE=D0=BB=D1=8C=D0=BA=D0=BE=20=D1=87?= =?UTF-8?q?=D0=B8=D1=82=D0=B0=D1=82=D1=8C.?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- MainController/MainController.bdf | 246 ++++++++++++++++-------------- MainController/RAM.bsf | 78 ++++++---- MainController/RAM.vhd | 57 +++++-- 3 files changed, 219 insertions(+), 162 deletions(-) diff --git a/MainController/MainController.bdf b/MainController/MainController.bdf index 287f117..8974e2b 100644 --- a/MainController/MainController.bdf +++ b/MainController/MainController.bdf @@ -23,7 +23,7 @@ applicable agreement for further details. (input) (rect 376 248 544 264) (text "INPUT" (rect 125 0 153 10)(font "Arial" (font_size 6))) - (text "ClkRAM" (rect 5 0 46 12)(font "Arial" )) + (text "WR" (rect 5 0 23 12)(font "Arial" )) (pt 168 8) (drawing (line (pt 84 12)(pt 109 12)) @@ -37,41 +37,9 @@ applicable agreement for further details. ) (pin (input) - (rect 352 232 544 248) - (text "INPUT" (rect 149 0 177 10)(font "Arial" (font_size 6))) - (text "AddressRAM[7..0]" (rect 5 0 95 12)(font "Arial" )) - (pt 192 8) - (drawing - (line (pt 108 12)(pt 133 12)) - (line (pt 108 4)(pt 133 4)) - (line (pt 137 8)(pt 192 8)) - (line (pt 108 12)(pt 108 4)) - (line (pt 133 4)(pt 137 8)) - (line (pt 133 12)(pt 137 8)) - ) - (text "VCC" (rect 152 7 172 17)(font "Arial" (font_size 6))) -) -(pin - (input) - (rect 368 216 544 232) - (text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6))) - (text "DataRAM[15..0]" (rect 5 0 85 12)(font "Arial" )) - (pt 176 8) - (drawing - (line (pt 92 12)(pt 117 12)) - (line (pt 92 4)(pt 117 4)) - (line (pt 121 8)(pt 176 8)) - (line (pt 92 12)(pt 92 4)) - (line (pt 117 4)(pt 121 8)) - (line (pt 117 12)(pt 121 8)) - ) - (text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6))) -) -(pin - (input) - (rect 376 144 544 160) + (rect 376 216 544 232) (text "INPUT" (rect 125 0 153 10)(font "Arial" (font_size 6))) - (text "Clk" (rect 5 0 22 12)(font "Arial" )) + (text "Address[7..0]" (rect 5 0 72 12)(font "Arial" )) (pt 168 8) (drawing (line (pt 84 12)(pt 109 12)) @@ -87,7 +55,7 @@ applicable agreement for further details. (input) (rect 376 264 544 280) (text "INPUT" (rect 125 0 153 10)(font "Arial" (font_size 6))) - (text "WR" (rect 5 0 24 12)(font "Arial" )) + (text "Clk" (rect 5 0 22 12)(font "Arial" )) (pt 168 8) (drawing (line (pt 84 12)(pt 109 12)) @@ -99,6 +67,40 @@ applicable agreement for further details. ) (text "VCC" (rect 128 7 148 17)(font "Arial" (font_size 6))) ) +(pin + (input) + (rect 376 144 544 160) + (text "INPUT" (rect 125 0 153 10)(font "Arial" (font_size 6))) + (text "Clk50MHh" (rect 5 0 56 12)(font "Arial" )) + (pt 168 8) + (drawing + (line (pt 84 12)(pt 109 12)) + (line (pt 84 4)(pt 109 4)) + (line (pt 113 8)(pt 168 8)) + (line (pt 84 12)(pt 84 4)) + (line (pt 109 4)(pt 113 8)) + (line (pt 109 12)(pt 113 8)) + ) + (text "VCC" (rect 128 7 148 17)(font "Arial" (font_size 6))) +) +(pin + (bidir) + (rect 368 232 544 248) + (text "BIDIR" (rect 151 0 175 10)(font "Arial" (font_size 6))) + (text "Data[15..0]" (rect 5 0 61 12)(font "Arial" )) + (pt 176 8) + (drawing + (line (pt 120 4)(pt 98 4)) + (line (pt 176 8)(pt 124 8)) + (line (pt 120 12)(pt 98 12)) + (line (pt 98 4)(pt 94 8)) + (line (pt 98 12)(pt 94 8)) + (line (pt 120 4)(pt 124 8)) + (line (pt 124 8)(pt 120 12)) + ) + (flipy) + (text "VCC" (rect 152 7 172 17)(font "Arial" (font_size 6))) +) (symbol (rect 632 104 784 216) (text "AlteraPLL" (rect 5 0 52 12)(font "Arial" )) @@ -143,9 +145,9 @@ applicable agreement for further details. ) ) (symbol - (rect 816 176 1040 320) + (rect 848 160 1048 304) (text "RAM" (rect 5 0 28 12)(font "Arial" )) - (text "inst4" (rect 8 128 31 140)(font "Arial" )) + (text "inst1" (rect 24 128 47 140)(font "Arial" )) (port (pt 0 32) (input) @@ -154,49 +156,63 @@ applicable agreement for further details. (line (pt 0 32)(pt 16 32)) ) (port - (pt 224 48) + (pt 0 64) (input) - (text "data[15..0]" (rect 0 0 53 12)(font "Arial" )) - (text "data[15..0]" (rect 146 40 199 52)(font "Arial" )) - (line (pt 208 48)(pt 224 48)(line_width 3)) - ) - (port - (pt 224 64) - (input) - (text "address[7..0]" (rect 0 0 64 12)(font "Arial" )) - (text "address[7..0]" (rect 135 56 199 68)(font "Arial" )) - (line (pt 208 64)(pt 224 64)(line_width 3)) - ) - (port - (pt 0 80) - (input) - (text "clkMCU" (rect 0 0 38 12)(font "Arial" )) - (text "clkMCU" (rect 21 75 59 87)(font "Arial" )) - (line (pt 0 80)(pt 16 80)) + (text "address0[7..0]" (rect 0 0 70 12)(font "Arial" )) + (text "address0[7..0]" (rect 24 56 94 68)(font "Arial" )) + (line (pt 0 64)(pt 16 64)(line_width 3)) ) (port (pt 0 96) (input) - (text "wr" (rect 0 0 10 12)(font "Arial" )) - (text "wr" (rect 21 91 31 103)(font "Arial" )) + (text "wr0" (rect 0 0 16 12)(font "Arial" )) + (text "wr0" (rect 24 88 40 100)(font "Arial" )) (line (pt 0 96)(pt 16 96)) ) (port - (pt 0 48) - (bidir) - (text "dataMCU[15..0]" (rect 0 0 77 12)(font "Arial" )) - (text "dataMCU[15..0]" (rect 24 40 101 52)(font "Arial" )) - (line (pt 16 48)(pt 0 48)(line_width 3)) + (pt 0 112) + (input) + (text "clk0" (rect 0 0 20 12)(font "Arial" )) + (text "clk0" (rect 24 104 44 116)(font "Arial" )) + (line (pt 0 112)(pt 16 112)) ) (port - (pt 0 64) + (pt 200 64) + (input) + (text "address1[7..0]" (rect 0 0 70 12)(font "Arial" )) + (text "address1[7..0]" (rect 120 56 190 68)(font "Arial" )) + (line (pt 184 64)(pt 200 64)(line_width 3)) + ) + (port + (pt 200 96) + (input) + (text "wr1" (rect 0 0 16 12)(font "Arial" )) + (text "wr1" (rect 160 88 176 100)(font "Arial" )) + (line (pt 184 96)(pt 200 96)) + ) + (port + (pt 200 112) + (input) + (text "clk1" (rect 0 0 20 12)(font "Arial" )) + (text "clk1" (rect 160 104 180 116)(font "Arial" )) + (line (pt 184 112)(pt 200 112)) + ) + (port + (pt 0 80) (bidir) - (text "addressMCU[7..0]" (rect 0 0 89 12)(font "Arial" )) - (text "addressMCU[7..0]" (rect 24 56 113 68)(font "Arial" )) - (line (pt 16 64)(pt 0 64)(line_width 3)) + (text "data0[15..0]" (rect 0 0 59 12)(font "Arial" )) + (text "data0[15..0]" (rect 24 72 83 84)(font "Arial" )) + (line (pt 16 80)(pt 0 80)(line_width 3)) + ) + (port + (pt 200 80) + (bidir) + (text "data1[15..0]" (rect 0 0 59 12)(font "Arial" )) + (text "data1[15..0]" (rect 128 72 187 84)(font "Arial" )) + (line (pt 200 80)(pt 184 80)(line_width 3)) ) (drawing - (rectangle (rect 16 16 208 128)) + (rectangle (rect 16 16 184 128)) ) ) (connector @@ -213,50 +229,6 @@ applicable agreement for further details. (pt 592 624) (bus) ) -(connector - (pt 544 224) - (pt 592 224) - (bus) -) -(connector - (pt 544 240) - (pt 576 240) - (bus) -) -(connector - (pt 544 256) - (pt 560 256) -) -(connector - (pt 560 256) - (pt 816 256) -) -(connector - (pt 544 272) - (pt 816 272) -) -(connector - (pt 592 224) - (pt 816 224) - (bus) -) -(connector - (pt 576 240) - (pt 816 240) - (bus) -) -(connector - (pt 816 208) - (pt 800 208) -) -(connector - (pt 800 136) - (pt 784 136) -) -(connector - (pt 800 208) - (pt 800 136) -) (connector (pt 608 152) (pt 608 624) @@ -269,7 +241,51 @@ applicable agreement for further details. (pt 608 152) (pt 632 152) ) -(junction (pt 560 256)) -(junction (pt 576 240)) -(junction (pt 592 224)) +(connector + (pt 784 136) + (pt 832 136) +) +(connector + (pt 832 192) + (pt 848 192) +) +(connector + (pt 832 136) + (pt 832 192) +) +(connector + (pt 544 272) + (pt 848 272) +) +(connector + (pt 544 224) + (pt 592 224) + (bus) +) +(connector + (pt 592 224) + (pt 848 224) + (bus) +) +(connector + (pt 544 240) + (pt 576 240) + (bus) +) +(connector + (pt 576 240) + (pt 848 240) + (bus) +) +(connector + (pt 544 256) + (pt 560 256) +) +(connector + (pt 560 256) + (pt 848 256) +) (junction (pt 608 152)) +(junction (pt 592 224)) +(junction (pt 576 240)) +(junction (pt 560 256)) diff --git a/MainController/RAM.bsf b/MainController/RAM.bsf index d809c24..c4b9206 100644 --- a/MainController/RAM.bsf +++ b/MainController/RAM.bsf @@ -20,9 +20,9 @@ applicable agreement for further details. */ (header "symbol" (version "1.2")) (symbol - (rect 64 64 288 208) + (rect 64 64 264 208) (text "RAM" (rect 5 0 28 12)(font "Arial" )) - (text "inst" (rect 8 128 25 140)(font "Arial" )) + (text "inst" (rect 24 128 41 140)(font "Arial" )) (port (pt 0 32) (input) @@ -31,48 +31,62 @@ applicable agreement for further details. (line (pt 0 32)(pt 16 32)) ) (port - (pt 224 48) + (pt 0 64) (input) - (text "data[15..0]" (rect 0 0 53 12)(font "Arial" )) - (text "data[15..0]" (rect 146 40 199 52)(font "Arial" )) - (line (pt 208 48)(pt 224 48)(line_width 3)) - ) - (port - (pt 224 64) - (input) - (text "address[7..0]" (rect 0 0 64 12)(font "Arial" )) - (text "address[7..0]" (rect 135 56 199 68)(font "Arial" )) - (line (pt 208 64)(pt 224 64)(line_width 3)) - ) - (port - (pt 0 80) - (input) - (text "clkMCU" (rect 0 0 38 12)(font "Arial" )) - (text "clkMCU" (rect 21 75 59 87)(font "Arial" )) - (line (pt 0 80)(pt 16 80)) + (text "address0[7..0]" (rect 0 0 70 12)(font "Arial" )) + (text "address0[7..0]" (rect 24 56 94 68)(font "Arial" )) + (line (pt 0 64)(pt 16 64)(line_width 3)) ) (port (pt 0 96) (input) - (text "wr" (rect 0 0 10 12)(font "Arial" )) - (text "wr" (rect 21 91 31 103)(font "Arial" )) + (text "wr0" (rect 0 0 16 12)(font "Arial" )) + (text "wr0" (rect 24 88 40 100)(font "Arial" )) (line (pt 0 96)(pt 16 96)) ) (port - (pt 0 48) - (bidir) - (text "dataMCU[15..0]" (rect 0 0 77 12)(font "Arial" )) - (text "dataMCU[15..0]" (rect 24 40 101 52)(font "Arial" )) - (line (pt 16 48)(pt 0 48)(line_width 3)) + (pt 0 112) + (input) + (text "clk0" (rect 0 0 20 12)(font "Arial" )) + (text "clk0" (rect 24 104 44 116)(font "Arial" )) + (line (pt 0 112)(pt 16 112)) ) (port - (pt 0 64) + (pt 200 64) + (input) + (text "address1[7..0]" (rect 0 0 70 12)(font "Arial" )) + (text "address1[7..0]" (rect 120 56 190 68)(font "Arial" )) + (line (pt 184 64)(pt 200 64)(line_width 3)) + ) + (port + (pt 200 96) + (input) + (text "wr1" (rect 0 0 16 12)(font "Arial" )) + (text "wr1" (rect 160 88 176 100)(font "Arial" )) + (line (pt 184 96)(pt 200 96)) + ) + (port + (pt 200 112) + (input) + (text "clk1" (rect 0 0 20 12)(font "Arial" )) + (text "clk1" (rect 160 104 180 116)(font "Arial" )) + (line (pt 184 112)(pt 200 112)) + ) + (port + (pt 0 80) (bidir) - (text "addressMCU[7..0]" (rect 0 0 89 12)(font "Arial" )) - (text "addressMCU[7..0]" (rect 24 56 113 68)(font "Arial" )) - (line (pt 16 64)(pt 0 64)(line_width 3)) + (text "data0[15..0]" (rect 0 0 59 12)(font "Arial" )) + (text "data0[15..0]" (rect 24 72 83 84)(font "Arial" )) + (line (pt 16 80)(pt 0 80)(line_width 3)) + ) + (port + (pt 200 80) + (bidir) + (text "data1[15..0]" (rect 0 0 59 12)(font "Arial" )) + (text "data1[15..0]" (rect 128 72 187 84)(font "Arial" )) + (line (pt 200 80)(pt 184 80)(line_width 3)) ) (drawing - (rectangle (rect 16 16 208 128)) + (rectangle (rect 16 16 184 128)) ) ) diff --git a/MainController/RAM.vhd b/MainController/RAM.vhd index 22a1c8a..6a354c6 100644 --- a/MainController/RAM.vhd +++ b/MainController/RAM.vhd @@ -1,17 +1,22 @@ library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; + +-- Блок памяти способен асинхронно принимать данные с двух устройств одновременно entity RAM is port( clk : in std_logic; - data : in std_logic_vector(15 downto 0); - address : in std_logic_vector(7 downto 0); - clkMCU : in std_logic; - dataMCU : inout std_logic_vector(15 downto 0); - addressMCU : inout std_logic_vector(7 downto 0); - -- write when 0, read when 1 - wr : in std_logic + + data0 : inout std_logic_vector(15 downto 0); + address0 : in std_logic_vector(7 downto 0); + wr0 : in std_logic; + clk0 : in std_logic; + + data1 : inout std_logic_vector(15 downto 0); + address1 : in std_logic_vector(7 downto 0); + wr1 : in std_logic; + clk1 : in std_logic ); end entity; @@ -20,23 +25,45 @@ architecture behavorial of RAM is type mem is array (255 downto 0) of std_logic_vector(15 downto 0); signal memory : mem; -signal clkMCUPrev : std_logic := '0'; +signal clk0Prev : std_logic := '0'; +signal clk1Prev : std_logic := '0'; begin process(clk) - variable addr : integer range 0 to 255; + variable addr0 : integer range 0 to 255; + variable addr1 : integer range 0 to 255; begin if rising_edge(clk) then - if clkMCU = '1' and clkMCUPrev = '0' then - addr := conv_integer(addressMCU); -- переменной addr присваивается новое значение сразу. Удобно для преобразования типов. - if (wr = '0') then - memory(addr) <= dataMCU; -- тут уже новое значение переменной addr + + if clk1 = '1' and clk1Prev = '0' then + addr1 := conv_integer(address1); -- переменной addr1 присваивается новое значение сразу. Удобно для преобразования типов. + if (wr1 = '0') then + memory(addr1) <= data1; -- тут уже новое значение переменной addr1 else - dataMCU <= memory(addr); + data1 <= memory(addr1); end if; end if; - clkMCUPrev <= clkMCU; + if clk1 = '0' and clk1Prev = '1' then + data1 <= (others => 'Z'); + end if; + + clk1Prev <= clk1; + + if clk0 = '1' and clk0Prev = '0' then + addr0 := conv_integer(address0); -- переменной addr0 присваивается новое значение сразу. Удобно для преобразования типов. + if (wr0 = '0') then + memory(addr0) <= data0; -- тут уже новое значение переменной addr0 + else + data0 <= memory(addr0); + end if; + end if; + if clk0 = '0' and clk0Prev = '1' then + data0 <= (others => 'Z'); + end if; + + clk0Prev <= clk0; + end if; end process;