Для конвертирования используем библиотеки use ieee.std_logic_arith.all; use ieee.std_logic_unsigned.all. Добавили ParallelBusMaster на схему. Изменили условия чтения и записи в блоках с адресным пространством. При 200МГц синхросигнале скорость передачи двух байт (за два такта) уменьшилась до 110 нс.

This commit is contained in:
sokolovstanislav 2024-03-28 13:47:49 +03:00
parent 2ece286472
commit 5370ab4575
6 changed files with 754 additions and 111 deletions

View File

@ -119,11 +119,11 @@ applicable agreement for further details.
(line (pt 109 12)(pt 113 8))
)
(text "VCC" (rect 128 7 148 17)(font "Arial" (font_size 6)))
(annotation_block (location)(rect 224 312 280 440))
(annotation_block (location)(rect 312 312 368 440))
)
(pin
(input)
(rect 376 648 544 664)
(rect 376 664 544 680)
(text "INPUT" (rect 125 0 153 10)(font "Arial" (font_size 6)))
(text "SBdatain" (rect 5 0 48 12)(font "Arial" ))
(pt 168 8)
@ -136,7 +136,24 @@ applicable agreement for further details.
(line (pt 109 12)(pt 113 8))
)
(text "VCC" (rect 128 7 148 17)(font "Arial" (font_size 6)))
(annotation_block (location)(rect 328 648 376 664))
(annotation_block (location)(rect 328 664 376 680))
)
(pin
(input)
(rect 368 984 536 1000)
(text "INPUT" (rect 125 0 153 10)(font "Arial" (font_size 6)))
(text "PBack" (rect 5 0 37 12)(font "Arial" ))
(pt 168 8)
(drawing
(line (pt 84 12)(pt 109 12))
(line (pt 84 4)(pt 109 4))
(line (pt 113 8)(pt 168 8))
(line (pt 84 12)(pt 84 4))
(line (pt 109 4)(pt 113 8))
(line (pt 109 12)(pt 113 8))
)
(text "VCC" (rect 128 7 148 17)(font "Arial" (font_size 6)))
(annotation_block (location)(rect 320 1000 368 1016))
)
(pin
(output)
@ -223,6 +240,74 @@ applicable agreement for further details.
)
(annotation_block (location)(rect 2024 600 2072 616))
)
(pin
(output)
(rect 1848 936 2024 952)
(text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
(text "PBdir[1..0]" (rect 90 0 141 12)(font "Arial" ))
(pt 0 8)
(drawing
(line (pt 0 8)(pt 52 8))
(line (pt 52 4)(pt 78 4))
(line (pt 52 12)(pt 78 12))
(line (pt 52 12)(pt 52 4))
(line (pt 78 4)(pt 82 8))
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(line (pt 78 12)(pt 82 8))
)
(annotation_block (location)(rect 2096 936 2144 968))
)
(pin
(output)
(rect 1848 904 2024 920)
(text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
(text "PBclk" (rect 90 0 118 12)(font "Arial" ))
(pt 0 8)
(drawing
(line (pt 0 8)(pt 52 8))
(line (pt 52 4)(pt 78 4))
(line (pt 52 12)(pt 78 12))
(line (pt 52 12)(pt 52 4))
(line (pt 78 4)(pt 82 8))
(line (pt 82 8)(pt 78 12))
(line (pt 78 12)(pt 82 8))
)
(annotation_block (location)(rect 2024 904 2072 920))
)
(pin
(output)
(rect 1848 920 2024 936)
(text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
(text "PBce" (rect 90 0 115 12)(font "Arial" ))
(pt 0 8)
(drawing
(line (pt 0 8)(pt 52 8))
(line (pt 52 4)(pt 78 4))
(line (pt 52 12)(pt 78 12))
(line (pt 52 12)(pt 52 4))
(line (pt 78 4)(pt 82 8))
(line (pt 82 8)(pt 78 12))
(line (pt 78 12)(pt 82 8))
)
(annotation_block (location)(rect 2024 920 2072 936))
)
(pin
(output)
(rect 1840 40 2016 56)
(text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
(text "DIRen" (rect 90 0 121 12)(font "Arial" ))
(pt 0 8)
(drawing
(line (pt 0 8)(pt 52 8))
(line (pt 52 4)(pt 78 4))
(line (pt 52 12)(pt 78 12))
(line (pt 52 12)(pt 52 4))
(line (pt 78 4)(pt 82 8))
(line (pt 82 8)(pt 78 12))
(line (pt 78 12)(pt 82 8))
)
(annotation_block (location)(rect 2016 56 2064 72))
)
(pin
(bidir)
(rect 1840 280 2016 296)
@ -239,7 +324,25 @@ applicable agreement for further details.
(line (pt 52 8)(pt 56 12))
)
(text "VCC" (rect 4 7 24 17)(font "Arial" (font_size 6)))
(annotation_block (location)(rect 2016 168 2072 280))
(annotation_block (location)(rect 2024 168 2080 280))
)
(pin
(bidir)
(rect 1848 952 2024 968)
(text "BIDIR" (rect 1 0 25 10)(font "Arial" (font_size 6)))
(text "PBdata[15..0]" (rect 90 0 157 12)(font "Arial" ))
(pt 0 8)
(drawing
(line (pt 56 4)(pt 78 4))
(line (pt 0 8)(pt 52 8))
(line (pt 56 12)(pt 78 12))
(line (pt 78 4)(pt 82 8))
(line (pt 78 12)(pt 82 8))
(line (pt 56 4)(pt 52 8))
(line (pt 52 8)(pt 56 12))
)
(text "VCC" (rect 4 7 24 17)(font "Arial" (font_size 6)))
(annotation_block (location)(rect 2096 968 2144 1200))
)
(symbol
(rect 704 88 856 200)
@ -323,60 +426,6 @@ applicable agreement for further details.
(line (pt 8 8)(pt 24 8))
)
)
(symbol
(rect 1040 256 1368 368)
(text "RAM" (rect 5 0 28 12)(font "Arial" ))
(text "inst1" (rect 8 96 31 108)(font "Arial" ))
(port
(pt 0 32)
(input)
(text "address[address_bus_width-1..0]" (rect 0 0 161 12)(font "Arial" ))
(text "address[address_bus_width-1..0]" (rect 21 27 182 39)(font "Arial" ))
(line (pt 0 32)(pt 16 32)(line_width 3))
)
(port
(pt 0 48)
(input)
(text "we" (rect 0 0 12 12)(font "Arial" ))
(text "we" (rect 21 43 33 55)(font "Arial" ))
(line (pt 0 48)(pt 16 48))
)
(port
(pt 0 64)
(input)
(text "oe" (rect 0 0 11 12)(font "Arial" ))
(text "oe" (rect 21 59 32 71)(font "Arial" ))
(line (pt 0 64)(pt 16 64))
)
(port
(pt 0 80)
(input)
(text "ce" (rect 0 0 11 12)(font "Arial" ))
(text "ce" (rect 21 75 32 87)(font "Arial" ))
(line (pt 0 80)(pt 16 80))
)
(port
(pt 328 32)
(bidir)
(text "data[data_bus_width-1..0]" (rect 0 0 126 12)(font "Arial" ))
(text "data[data_bus_width-1..0]" (rect 208 27 334 39)(font "Arial" ))
(line (pt 328 32)(pt 312 32)(line_width 3))
)
(parameter
"DATA_BUS_WIDTH"
"8"
""
(type "PARAMETER_SIGNED_DEC") )
(parameter
"ADDRESS_BUS_WIDTH"
"9"
""
(type "PARAMETER_SIGNED_DEC") )
(drawing
(rectangle (rect 16 16 312 96))
)
(annotation_block (parameter)(rect 1040 200 1280 248))
)
(symbol
(rect 704 208 936 336)
(text "DigitalFilterBlock" (rect 5 0 95 14)(font "Arial" (font_size 8)))
@ -560,6 +609,288 @@ applicable agreement for further details.
)
(annotation_block (parameter)(rect 1040 416 1360 544))
)
(symbol
(rect 712 624 856 704)
(text "DigitalFilter" (rect 5 0 60 12)(font "Arial" ))
(text "inst5" (rect 8 64 31 76)(font "Arial" ))
(port
(pt 0 32)
(input)
(text "clk" (rect 0 0 14 12)(font "Arial" ))
(text "clk" (rect 21 27 35 39)(font "Arial" ))
(line (pt 0 32)(pt 16 32))
)
(port
(pt 0 48)
(input)
(text "input" (rect 0 0 23 12)(font "Arial" ))
(text "input" (rect 21 43 44 55)(font "Arial" ))
(line (pt 0 48)(pt 16 48))
)
(port
(pt 144 32)
(output)
(text "output" (rect 0 0 30 12)(font "Arial" ))
(text "output" (rect 98 27 128 39)(font "Arial" ))
(line (pt 144 32)(pt 128 32))
)
(parameter
"PHASE_SHIFT"
"1"
""
(type "PARAMETER_SIGNED_DEC") )
(drawing
(rectangle (rect 16 16 128 64))
)
(annotation_block (parameter)(rect 712 592 912 624))
)
(symbol
(rect 712 944 856 1024)
(text "DigitalFilter" (rect 5 0 60 12)(font "Arial" ))
(text "inst6" (rect 8 64 31 76)(font "Arial" ))
(port
(pt 0 32)
(input)
(text "clk" (rect 0 0 14 12)(font "Arial" ))
(text "clk" (rect 21 27 35 39)(font "Arial" ))
(line (pt 0 32)(pt 16 32))
)
(port
(pt 0 48)
(input)
(text "input" (rect 0 0 23 12)(font "Arial" ))
(text "input" (rect 21 43 44 55)(font "Arial" ))
(line (pt 0 48)(pt 16 48))
)
(port
(pt 144 32)
(output)
(text "output" (rect 0 0 30 12)(font "Arial" ))
(text "output" (rect 98 27 128 39)(font "Arial" ))
(line (pt 144 32)(pt 128 32))
)
(parameter
"PHASE_SHIFT"
"1"
""
(type "PARAMETER_SIGNED_DEC") )
(drawing
(rectangle (rect 16 16 128 64))
)
(annotation_block (parameter)(rect 712 912 912 944))
)
(symbol
(rect 1040 256 1368 368)
(text "RAM" (rect 5 0 28 12)(font "Arial" ))
(text "inst1" (rect 8 96 31 108)(font "Arial" ))
(port
(pt 0 32)
(input)
(text "address[address_bus_width-1..0]" (rect 0 0 161 12)(font "Arial" ))
(text "address[address_bus_width-1..0]" (rect 21 27 182 39)(font "Arial" ))
(line (pt 0 32)(pt 16 32)(line_width 3))
)
(port
(pt 0 48)
(input)
(text "we" (rect 0 0 12 12)(font "Arial" ))
(text "we" (rect 21 43 33 55)(font "Arial" ))
(line (pt 0 48)(pt 16 48))
)
(port
(pt 0 64)
(input)
(text "oe" (rect 0 0 11 12)(font "Arial" ))
(text "oe" (rect 21 59 32 71)(font "Arial" ))
(line (pt 0 64)(pt 16 64))
)
(port
(pt 0 80)
(input)
(text "ce" (rect 0 0 11 12)(font "Arial" ))
(text "ce" (rect 21 75 32 87)(font "Arial" ))
(line (pt 0 80)(pt 16 80))
)
(port
(pt 328 32)
(bidir)
(text "data[data_bus_width-1..0]" (rect 0 0 126 12)(font "Arial" ))
(text "data[data_bus_width-1..0]" (rect 208 27 334 39)(font "Arial" ))
(line (pt 328 32)(pt 312 32)(line_width 3))
)
(parameter
"DATA_BUS_WIDTH"
"8"
""
(type "PARAMETER_SIGNED_DEC") )
(parameter
"ADDRESS_BUS_WIDTH"
"9"
""
(type "PARAMETER_SIGNED_DEC") )
(drawing
(rectangle (rect 16 16 312 96))
)
(annotation_block (parameter)(rect 1040 208 1280 256))
)
(symbol
(rect 1040 864 1368 1008)
(text "RAM9X8_ParallelBusMaster" (rect 5 0 139 12)(font "Arial" ))
(text "inst7" (rect 8 128 31 140)(font "Arial" ))
(port
(pt 0 32)
(input)
(text "clk" (rect 0 0 14 12)(font "Arial" ))
(text "clk" (rect 21 27 35 39)(font "Arial" ))
(line (pt 0 32)(pt 16 32))
)
(port
(pt 0 48)
(input)
(text "address[address_bus_width-1..0]" (rect 0 0 161 12)(font "Arial" ))
(text "address[address_bus_width-1..0]" (rect 21 43 182 55)(font "Arial" ))
(line (pt 0 48)(pt 16 48)(line_width 3))
)
(port
(pt 0 64)
(input)
(text "we" (rect 0 0 12 12)(font "Arial" ))
(text "we" (rect 21 59 33 71)(font "Arial" ))
(line (pt 0 64)(pt 16 64))
)
(port
(pt 0 80)
(input)
(text "oe" (rect 0 0 11 12)(font "Arial" ))
(text "oe" (rect 21 75 32 87)(font "Arial" ))
(line (pt 0 80)(pt 16 80))
)
(port
(pt 0 96)
(input)
(text "ce" (rect 0 0 11 12)(font "Arial" ))
(text "ce" (rect 21 91 32 103)(font "Arial" ))
(line (pt 0 96)(pt 16 96))
)
(port
(pt 0 112)
(input)
(text "pback" (rect 0 0 29 12)(font "Arial" ))
(text "pback" (rect 21 107 50 119)(font "Arial" ))
(line (pt 0 112)(pt 16 112))
)
(port
(pt 328 48)
(output)
(text "pbclk" (rect 0 0 25 12)(font "Arial" ))
(text "pbclk" (rect 286 43 311 55)(font "Arial" ))
(line (pt 328 48)(pt 312 48))
)
(port
(pt 328 64)
(output)
(text "pbce" (rect 0 0 23 12)(font "Arial" ))
(text "pbce" (rect 288 59 311 71)(font "Arial" ))
(line (pt 328 64)(pt 312 64))
)
(port
(pt 328 80)
(output)
(text "pbdir[1..0]" (rect 0 0 49 12)(font "Arial" ))
(text "pbdir[1..0]" (rect 266 75 315 87)(font "Arial" ))
(line (pt 328 80)(pt 312 80)(line_width 3))
)
(port
(pt 328 32)
(bidir)
(text "data[data_bus_width-1..0]" (rect 0 0 126 12)(font "Arial" ))
(text "data[data_bus_width-1..0]" (rect 208 27 334 39)(font "Arial" ))
(line (pt 328 32)(pt 312 32)(line_width 3))
)
(port
(pt 328 96)
(bidir)
(text "pbdata[15..0]" (rect 0 0 64 12)(font "Arial" ))
(text "pbdata[15..0]" (rect 258 91 322 103)(font "Arial" ))
(line (pt 328 96)(pt 312 96)(line_width 3))
)
(parameter
"REG_ADDR_FIRST_FREE_UPPER_BYTE"
"6"
""
(type "PARAMETER_SIGNED_DEC") )
(parameter
"REG_ADDR_FIRST_FREE_LOWER_BYTE"
"7"
""
(type "PARAMETER_SIGNED_DEC") )
(parameter
"REG_ADDR_CMD_UPPER_BYTE"
"8"
""
(type "PARAMETER_SIGNED_DEC") )
(parameter
"REG_ADDR_CMD_LOWER_BYTE"
"9"
""
(type "PARAMETER_SIGNED_DEC") )
(parameter
"REG_ADDR_FILL_ADDRESS_SPACE_UPPER_BYTE"
"10"
""
(type "PARAMETER_SIGNED_DEC") )
(parameter
"REG_ADDR_FILL_ADDRESS_SPACE_LOWER_BYTE"
"11"
""
(type "PARAMETER_SIGNED_DEC") )
(parameter
"REG_ADDR_CONTROL_UPPER_BYTE"
"12"
""
(type "PARAMETER_SIGNED_DEC") )
(parameter
"REG_ADDR_CONTROL_LOWER_BYTE"
"13"
""
(type "PARAMETER_SIGNED_DEC") )
(parameter
"ARRAY_LENGTH"
"128"
""
(type "PARAMETER_SIGNED_DEC") )
(parameter
"DATA_BUS_WIDTH"
"8"
""
(type "PARAMETER_SIGNED_DEC") )
(parameter
"ADDRESS_BUS_WIDTH"
"9"
""
(type "PARAMETER_SIGNED_DEC") )
(drawing
(rectangle (rect 16 16 312 128))
)
(annotation_block (parameter)(rect 1024 696 1408 864))
)
(symbol
(rect 1728 72 1760 104)
(text "GND" (rect 8 16 29 26)(font "Arial" (font_size 6)))
(text "inst9" (rect 3 21 26 33)(font "Arial" )(invisible))
(port
(pt 16 0)
(output)
(text "1" (rect 18 0 23 12)(font "Courier New" (bold))(invisible))
(text "1" (rect 18 0 23 12)(font "Courier New" (bold))(invisible))
(line (pt 16 8)(pt 16 0))
)
(drawing
(line (pt 8 8)(pt 16 16))
(line (pt 16 16)(pt 24 8))
(line (pt 8 8)(pt 24 8))
)
)
(connector
(pt 560 32)
(pt 608 32)
@ -580,10 +911,6 @@ applicable agreement for further details.
(pt 608 136)
(pt 704 136)
)
(connector
(pt 544 256)
(pt 704 256)
)
(connector
(pt 544 272)
(pt 704 272)
@ -621,11 +948,6 @@ applicable agreement for further details.
(pt 1040 304)
(pt 984 304)
)
(connector
(pt 1000 592)
(pt 1000 288)
(bus)
)
(connector
(pt 936 288)
(pt 1000 288)
@ -640,18 +962,6 @@ applicable agreement for further details.
(pt 984 272)
(pt 984 304)
)
(connector
(pt 984 304)
(pt 984 608)
)
(connector
(pt 968 320)
(pt 968 624)
)
(connector
(pt 952 336)
(pt 952 640)
)
(connector
(pt 1368 592)
(pt 1848 592)
@ -660,10 +970,6 @@ applicable agreement for further details.
(pt 1368 608)
(pt 1848 608)
)
(connector
(pt 1040 656)
(pt 544 656)
)
(connector
(pt 704 240)
(pt 680 240)
@ -692,10 +998,6 @@ applicable agreement for further details.
(pt 1040 576)
(pt 608 576)
)
(connector
(pt 608 136)
(pt 608 576)
)
(connector
(pt 1000 592)
(pt 1040 592)
@ -713,14 +1015,6 @@ applicable agreement for further details.
(pt 1040 640)
(pt 952 640)
)
(connector
(pt 856 136)
(pt 936 136)
)
(connector
(pt 936 -16)
(pt 936 136)
)
(connector
(pt 824 32)
(pt 1840 32)
@ -730,9 +1024,149 @@ applicable agreement for further details.
(pt 1368 288)
(bus)
)
(connector
(pt 712 656)
(pt 608 656)
)
(connector
(pt 608 136)
(pt 608 576)
)
(connector
(pt 544 672)
(pt 712 672)
)
(connector
(pt 856 656)
(pt 1040 656)
)
(connector
(pt 704 256)
(pt 544 256)
)
(connector
(pt 608 976)
(pt 712 976)
)
(connector
(pt 608 576)
(pt 608 656)
)
(connector
(pt 1000 912)
(pt 1040 912)
(bus)
)
(connector
(pt 984 928)
(pt 1040 928)
)
(connector
(pt 968 944)
(pt 1040 944)
)
(connector
(pt 952 960)
(pt 1040 960)
)
(connector
(pt 608 896)
(pt 1040 896)
)
(connector
(pt 856 976)
(pt 1040 976)
)
(connector
(pt 1000 288)
(pt 1000 592)
(bus)
)
(connector
(pt 1000 592)
(pt 1000 912)
(bus)
)
(connector
(pt 984 304)
(pt 984 608)
)
(connector
(pt 984 608)
(pt 984 928)
)
(connector
(pt 968 320)
(pt 968 624)
)
(connector
(pt 968 624)
(pt 968 944)
)
(connector
(pt 952 336)
(pt 952 640)
)
(connector
(pt 952 640)
(pt 952 960)
)
(connector
(pt 608 656)
(pt 608 896)
)
(connector
(pt 608 896)
(pt 608 976)
)
(connector
(pt 712 992)
(pt 536 992)
)
(connector
(pt 1368 912)
(pt 1848 912)
)
(connector
(pt 1368 928)
(pt 1848 928)
)
(connector
(pt 1368 944)
(pt 1848 944)
(bus)
)
(connector
(pt 1368 960)
(pt 1848 960)
(bus)
)
(connector
(pt 856 136)
(pt 936 136)
)
(connector
(pt 936 -16)
(pt 936 136)
)
(connector
(pt 1840 48)
(pt 1744 48)
)
(connector
(pt 1744 48)
(pt 1744 72)
)
(junction (pt 608 32))
(junction (pt 1000 288))
(junction (pt 984 304))
(junction (pt 968 320))
(junction (pt 952 336))
(junction (pt 608 136))
(junction (pt 608 576))
(junction (pt 608 656))
(junction (pt 1000 592))
(junction (pt 984 608))
(junction (pt 968 624))
(junction (pt 952 640))
(junction (pt 608 896))

View File

@ -123,4 +123,49 @@ set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to SBdataout
set_global_assignment -name VHDL_FILE DigitalFilter3.vhd
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to Address[8]
set_global_assignment -name VHDL_FILE DigitalFilter.vhd
set_global_assignment -name VHDL_FILE RAM9X8_ParallelBusMaster.vhd
set_location_assignment PIN_68 -to PBce
set_location_assignment PIN_56 -to PBclk
set_location_assignment PIN_49 -to PBack
set_location_assignment PIN_73 -to PBdata[15]
set_location_assignment PIN_80 -to PBdata[14]
set_location_assignment PIN_83 -to PBdata[13]
set_location_assignment PIN_76 -to PBdata[12]
set_location_assignment PIN_84 -to PBdata[11]
set_location_assignment PIN_87 -to PBdata[10]
set_location_assignment PIN_78 -to PBdata[9]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PBack
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PBce
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PBclk
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PBdata[15]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PBdata[14]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PBdata[13]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PBdata[12]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PBdata[11]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PBdata[10]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PBdata[9]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PBdata[8]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PBdata[7]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PBdata[6]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PBdata[5]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PBdata[4]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PBdata[3]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PBdata[2]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PBdata[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PBdata[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PBdir[1]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to PBdir[0]
set_location_assignment PIN_88 -to PBdata[8]
set_location_assignment PIN_103 -to PBdata[7]
set_location_assignment PIN_106 -to PBdata[6]
set_location_assignment PIN_107 -to PBdata[5]
set_location_assignment PIN_108 -to PBdata[4]
set_location_assignment PIN_109 -to PBdata[3]
set_location_assignment PIN_94 -to PBdata[2]
set_location_assignment PIN_99 -to PBdata[1]
set_location_assignment PIN_100 -to PBdata[0]
set_location_assignment PIN_98 -to DIRen
set_location_assignment PIN_95 -to PBdir[1]
set_location_assignment PIN_72 -to PBdir[0]
set_instance_assignment -name IO_STANDARD "3.3-V LVTTL" -to DIRen
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top

View File

@ -30,10 +30,10 @@ begin
begin
if (ce = '0') then -- Если микросхема выбрана
addr := conv_integer(address);
if (oe = '0') then -- Если сигнал чтения активен
if (oe = '0' and we = '1') then -- Если сигнал чтения активен, а записи нет
data <= memory(addr);
elsif (we = '0') then -- Если сигнал записи активен
memory(addr) <= data;
elsif (oe = '1' and we = '0') then -- Если сигнал записи активен, а чтения нет
memory(addr) <= data;
else
data <= (others => 'Z'); -- Запретить запись на шину
end if;

View File

@ -0,0 +1,162 @@
/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to occur.
*/
/*
Copyright (C) 1991-2013 Altera Corporation
Your use of Altera Corporation's design tools, logic functions
and other software and tools, and its AMPP partner logic
functions, and any output files from any of the foregoing
(including device programming or simulation files), and any
associated documentation or information are expressly subject
to the terms and conditions of the Altera Program License
Subscription Agreement, Altera MegaCore Function License
Agreement, or other applicable license agreement, including,
without limitation, that your use is for the sole purpose of
programming logic devices manufactured by Altera and sold by
Altera or its authorized distributors. Please refer to the
applicable agreement for further details.
*/
(header "symbol" (version "1.1"))
(symbol
(rect 16 16 344 160)
(text "RAM9X8_ParallelBusMaster" (rect 5 0 121 12)(font "Arial" ))
(text "inst" (rect 8 128 20 140)(font "Arial" ))
(port
(pt 0 32)
(input)
(text "clk" (rect 0 0 10 12)(font "Arial" ))
(text "clk" (rect 21 27 31 39)(font "Arial" ))
(line (pt 0 32)(pt 16 32)(line_width 1))
)
(port
(pt 0 48)
(input)
(text "address[address_bus_width-1..0]" (rect 0 0 129 12)(font "Arial" ))
(text "address[address_bus_width-1..0]" (rect 21 43 150 55)(font "Arial" ))
(line (pt 0 48)(pt 16 48)(line_width 3))
)
(port
(pt 0 64)
(input)
(text "we" (rect 0 0 10 12)(font "Arial" ))
(text "we" (rect 21 59 31 71)(font "Arial" ))
(line (pt 0 64)(pt 16 64)(line_width 1))
)
(port
(pt 0 80)
(input)
(text "oe" (rect 0 0 9 12)(font "Arial" ))
(text "oe" (rect 21 75 30 87)(font "Arial" ))
(line (pt 0 80)(pt 16 80)(line_width 1))
)
(port
(pt 0 96)
(input)
(text "ce" (rect 0 0 9 12)(font "Arial" ))
(text "ce" (rect 21 91 30 103)(font "Arial" ))
(line (pt 0 96)(pt 16 96)(line_width 1))
)
(port
(pt 0 112)
(input)
(text "pback" (rect 0 0 23 12)(font "Arial" ))
(text "pback" (rect 21 107 44 119)(font "Arial" ))
(line (pt 0 112)(pt 16 112)(line_width 1))
)
(port
(pt 328 48)
(output)
(text "pbclk" (rect 0 0 20 12)(font "Arial" ))
(text "pbclk" (rect 287 43 307 55)(font "Arial" ))
(line (pt 328 48)(pt 312 48)(line_width 1))
)
(port
(pt 328 64)
(output)
(text "pbce" (rect 0 0 18 12)(font "Arial" ))
(text "pbce" (rect 289 59 307 71)(font "Arial" ))
(line (pt 328 64)(pt 312 64)(line_width 1))
)
(port
(pt 328 80)
(output)
(text "pbdir[1..0]" (rect 0 0 37 12)(font "Arial" ))
(text "pbdir[1..0]" (rect 270 75 307 87)(font "Arial" ))
(line (pt 328 80)(pt 312 80)(line_width 3))
)
(port
(pt 328 32)
(bidir)
(text "data[data_bus_width-1..0]" (rect 0 0 99 12)(font "Arial" ))
(text "data[data_bus_width-1..0]" (rect 208 27 307 39)(font "Arial" ))
(line (pt 328 32)(pt 312 32)(line_width 3))
)
(port
(pt 328 96)
(bidir)
(text "pbdata[15..0]" (rect 0 0 49 12)(font "Arial" ))
(text "pbdata[15..0]" (rect 258 91 307 103)(font "Arial" ))
(line (pt 328 96)(pt 312 96)(line_width 3))
)
(parameter
"REG_ADDR_FIRST_FREE_UPPER_BYTE"
"6"
""
(type "PARAMETER_SIGNED_DEC") )
(parameter
"REG_ADDR_FIRST_FREE_LOWER_BYTE"
"7"
""
(type "PARAMETER_SIGNED_DEC") )
(parameter
"REG_ADDR_CMD_UPPER_BYTE"
"8"
""
(type "PARAMETER_SIGNED_DEC") )
(parameter
"REG_ADDR_CMD_LOWER_BYTE"
"9"
""
(type "PARAMETER_SIGNED_DEC") )
(parameter
"REG_ADDR_FILL_ADDRESS_SPACE_UPPER_BYTE"
"10"
""
(type "PARAMETER_SIGNED_DEC") )
(parameter
"REG_ADDR_FILL_ADDRESS_SPACE_LOWER_BYTE"
"11"
""
(type "PARAMETER_SIGNED_DEC") )
(parameter
"REG_ADDR_CONTROL_UPPER_BYTE"
"12"
""
(type "PARAMETER_SIGNED_DEC") )
(parameter
"REG_ADDR_CONTROL_LOWER_BYTE"
"13"
""
(type "PARAMETER_SIGNED_DEC") )
(parameter
"ARRAY_LENGTH"
"128"
""
(type "PARAMETER_SIGNED_DEC") )
(parameter
"DATA_BUS_WIDTH"
"8"
""
(type "PARAMETER_SIGNED_DEC") )
(parameter
"ADDRESS_BUS_WIDTH"
"9"
""
(type "PARAMETER_SIGNED_DEC") )
(drawing
(rectangle (rect 16 16 312 128)(line_width 1))
)
(annotation_block (parameter)(rect 344 -64 444 16))
)

View File

@ -1,5 +1,6 @@
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity RAM9X8_ParallelBusMaster is
@ -49,7 +50,7 @@ signal controlBuf : std_logic_vector(15 downto 0) := (others => '0');
signal updatedAddress : std_logic_vector(7 downto 0) := (others => '0');
signal errorBuf : std_logic_vector(7 downto 0) := x"00";
signal addrTemp : std_logic_vector(15 downto 0) := x"0000";
signal addrTemp : std_logic_vector(7 downto 0) := x"00";
signal dataTemp : std_logic_vector(15 downto 0) := x"0000";
type CommunicationState_start is (Waiting, TransmiteAddress, TransmiteCheck, PreparingToReceiveData, ReceiveData, ReceiveCheck, Timeout, ReceiveCheckTimeout);
@ -69,7 +70,7 @@ begin
addr := conv_integer(address);
if (addr = REG_ADDR_FIRST_FREE_UPPER_BYTE or addr = REG_ADDR_FIRST_FREE_LOWER_BYTE or addr = REG_ADDR_CMD_UPPER_BYTE or addr = REG_ADDR_CMD_LOWER_BYTE
or addr = REG_ADDR_FILL_ADDRESS_SPACE_UPPER_BYTE or addr = REG_ADDR_FILL_ADDRESS_SPACE_LOWER_BYTE or addr = REG_ADDR_CONTROL_UPPER_BYTE or addr = REG_ADDR_CONTROL_LOWER_BYTE) then
if (oe = '0') then -- Если сигнал чтения активен
if (oe = '0' and we = '1') then -- Если сигнал чтения активен, а записи нет
case addr is
when REG_ADDR_FIRST_FREE_UPPER_BYTE =>
data <= firstFreeBuf(15 downto 8);
@ -90,7 +91,7 @@ begin
when others =>
data <= (others => 'Z'); -- Запретить запись на шину
end case;
elsif (we = '0') then -- Если сигнал записи активен
elsif (oe = '1' and we = '0') then -- Если сигнал записи активен, а чтения нет
case addr is
when REG_ADDR_FIRST_FREE_UPPER_BYTE =>
firstFreeBuf(15 downto 8) <= data;
@ -136,11 +137,11 @@ begin
if cmdBuf(15) = '1' then
case CommunicationState is
when Waiting =>
if errorCount < cmdBuf(11 downto 8) then
addrTemp <= memoryAddress(position);
if errorCount < conv_integer(cmdBuf(11 downto 8)) then
addrTemp <= memoryAddress(position);
CommunicationState <= TransmiteAddress;
else
errorBuf(7 downto 4) <= cmdBuf(11 downto 8); ----------------- заменить на правильный пересчет
errorBuf(7 downto 4) <= conv_std_logic_vector(errorCount, 4);
end if;
pbclk <= '1';
pbce <= '1';
@ -209,8 +210,8 @@ begin
count := 0;
pbce <= '1';
countValue := 5;
if position + 1 < cmdBuf(7 downto 0) then
updatedAddress <= position;
if position + 1 < conv_integer(cmdBuf(7 downto 0)) then
updatedAddress <= conv_std_logic_vector(position, 8);
position := position + 2;
else
position := 0;
@ -241,7 +242,7 @@ begin
pbdata <= (others =>'Z');
pbdir <= b"11";
position := 0;
errorCount <= 0;
errorCount := 0;
errorBuf <= (others => '0');
end if;
end if;

View File

@ -1,5 +1,6 @@
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity RAM9X8_SerialBusMaster is
@ -64,7 +65,7 @@ begin
addr := conv_integer(address);
if (addr = REG_ADDR_DATA_UPPER_BYTE or addr = REG_ADDR_DATA_LOWER_BYTE or addr = REG_ADDR_CMD_UPPER_BYTE or addr = REG_ADDR_CMD_LOWER_BYTE
or addr = REG_ADDR_CONTROL_UPPER_BYTE or addr = REG_ADDR_CONTROL_LOWER_BYTE) then
if (oe = '0') then -- Если сигнал чтения активен
if (oe = '0' and we = '1') then -- Если сигнал чтения активен, а записи нет
case addr is
when REG_ADDR_DATA_UPPER_BYTE =>
data <= dataBufOut(15 downto 8);
@ -76,12 +77,12 @@ begin
data <= cmdBuf(7 downto 0);
when REG_ADDR_CONTROL_UPPER_BYTE =>
data <= controlBuf(15 downto 8);
when REG_ADDR_CONTROL_UPPER_BYTE =>
when REG_ADDR_CONTROL_LOWER_BYTE =>
data <= controlBuf(7 downto 0);
when others =>
data <= (others => 'Z'); -- Запретить запись на шину
end case;
elsif (we = '0') then -- Если сигнал записи активен
elsif (oe = '1' and we = '0') then -- Если сигнал записи активен, а чтения нет
case addr is
when REG_ADDR_DATA_UPPER_BYTE =>
dataBufIn(15 downto 8) <= data;
@ -172,7 +173,7 @@ begin
bitCnt := 3;
else
if count < countValue and state = 1 then
sbdataout <= data(bitCnt);
sbdataout <= dataToTransmit(bitCnt);
sbclk <= '0';
count := count + 1;
elsif count = countValue and state = 1 then