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Добавил регистр номера сборки в LedController.

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This commit is contained in:
sokolovstanislav 2024-04-04 16:27:31 +03:00
parent e0197a05ac
commit 4cb6771ea5
11 changed files with 522 additions and 485 deletions
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832
MainController/MainController.bdf
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File diff suppressed because it is too large Load Diff

30
MainController/RAM9X8_HWPBusMaster.bsf
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@ -88,44 +88,44 @@ applicable agreement for further details.
) )
(parameter (parameter
"REG_ADDR_CMD_2_UPPER_BYTE" "REG_ADDR_CMD_2_UPPER_BYTE"
"44"
""
(type "PARAMETER_SIGNED_DEC") )
(parameter
"REG_ADDR_CMD_2_LOWER_BYTE"
"45"
""
(type "PARAMETER_SIGNED_DEC") )
(parameter
"REG_ADDR_CMD_1_UPPER_BYTE"
"46" "46"
"" ""
(type "PARAMETER_SIGNED_DEC") ) (type "PARAMETER_SIGNED_DEC") )
(parameter (parameter
"REG_ADDR_CMD_1_LOWER_BYTE" "REG_ADDR_CMD_2_LOWER_BYTE"
"47" "47"
"" ""
(type "PARAMETER_SIGNED_DEC") ) (type "PARAMETER_SIGNED_DEC") )
(parameter (parameter
"REG_ADDR_DATA_2_UPPER_BYTE" "REG_ADDR_CMD_1_UPPER_BYTE"
"48" "48"
"" ""
(type "PARAMETER_SIGNED_DEC") ) (type "PARAMETER_SIGNED_DEC") )
(parameter (parameter
"REG_ADDR_DATA_2_LOWER_BYTE" "REG_ADDR_CMD_1_LOWER_BYTE"
"49" "49"
"" ""
(type "PARAMETER_SIGNED_DEC") ) (type "PARAMETER_SIGNED_DEC") )
(parameter (parameter
"REG_ADDR_DATA_1_UPPER_BYTE" "REG_ADDR_DATA_2_UPPER_BYTE"
"50" "50"
"" ""
(type "PARAMETER_SIGNED_DEC") ) (type "PARAMETER_SIGNED_DEC") )
(parameter (parameter
"REG_ADDR_DATA_1_LOWER_BYTE" "REG_ADDR_DATA_2_LOWER_BYTE"
"51" "51"
"" ""
(type "PARAMETER_SIGNED_DEC") ) (type "PARAMETER_SIGNED_DEC") )
(parameter
"REG_ADDR_DATA_1_UPPER_BYTE"
"52"
""
(type "PARAMETER_SIGNED_DEC") )
(parameter
"REG_ADDR_DATA_1_LOWER_BYTE"
"53"
""
(type "PARAMETER_SIGNED_DEC") )
(parameter (parameter
"DATA_BUS_WIDTH" "DATA_BUS_WIDTH"
"8" "8"

16
MainController/RAM9X8_HWPBusMaster.vhd
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@ -5,14 +5,14 @@ use ieee.std_logic_unsigned.all;
entity RAM9X8_HWPBusMaster is entity RAM9X8_HWPBusMaster is
generic( generic(
REG_ADDR_CMD_2_UPPER_BYTE : integer := 44; REG_ADDR_CMD_2_UPPER_BYTE : integer := 46;
REG_ADDR_CMD_2_LOWER_BYTE : integer := 45; REG_ADDR_CMD_2_LOWER_BYTE : integer := 47;
REG_ADDR_CMD_1_UPPER_BYTE : integer := 46; REG_ADDR_CMD_1_UPPER_BYTE : integer := 48;
REG_ADDR_CMD_1_LOWER_BYTE : integer := 47; REG_ADDR_CMD_1_LOWER_BYTE : integer := 49;
REG_ADDR_DATA_2_UPPER_BYTE : integer := 48; REG_ADDR_DATA_2_UPPER_BYTE : integer := 50;
REG_ADDR_DATA_2_LOWER_BYTE : integer := 49; REG_ADDR_DATA_2_LOWER_BYTE : integer := 51;
REG_ADDR_DATA_1_UPPER_BYTE : integer := 50; REG_ADDR_DATA_1_UPPER_BYTE : integer := 52;
REG_ADDR_DATA_1_LOWER_BYTE : integer := 51; REG_ADDR_DATA_1_LOWER_BYTE : integer := 53;
DATA_BUS_WIDTH : integer := 8; DATA_BUS_WIDTH : integer := 8;
ADDRESS_BUS_WIDTH : integer := 9 ADDRESS_BUS_WIDTH : integer := 9

10
MainController/RAM9X8_LedController.bsf
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@ -113,6 +113,16 @@ applicable agreement for further details.
"41" "41"
"" ""
(type "PARAMETER_SIGNED_DEC") ) (type "PARAMETER_SIGNED_DEC") )
(parameter
"REG_ADDR_VERSION_UPPER_BYTE"
"42"
""
(type "PARAMETER_SIGNED_DEC") )
(parameter
"REG_ADDR_VERSION_LOWER_BYTE"
"43"
""
(type "PARAMETER_SIGNED_DEC") )
(parameter (parameter
"DATA_BUS_WIDTH" "DATA_BUS_WIDTH"
"8" "8"

7
MainController/RAM9X8_LedController.vhd
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@ -9,6 +9,8 @@ entity RAM9X8_LedController is
REG_ADDR_ACTIVE_DEVICE_LOWER_BYTE : integer := 39; REG_ADDR_ACTIVE_DEVICE_LOWER_BYTE : integer := 39;
REG_ADDR_TEST_UPPER_BYTE : integer := 40; REG_ADDR_TEST_UPPER_BYTE : integer := 40;
REG_ADDR_TEST_LOWER_BYTE : integer := 41; REG_ADDR_TEST_LOWER_BYTE : integer := 41;
REG_ADDR_VERSION_UPPER_BYTE : integer := 42;
REG_ADDR_VERSION_LOWER_BYTE : integer := 43;
DATA_BUS_WIDTH : integer := 8; DATA_BUS_WIDTH : integer := 8;
ADDRESS_BUS_WIDTH : integer := 9 ADDRESS_BUS_WIDTH : integer := 9
@ -34,6 +36,7 @@ architecture behavorial of RAM9X8_LedController is
signal activeDeviceBuf : std_logic_vector(15 downto 0) := (others => '0'); signal activeDeviceBuf : std_logic_vector(15 downto 0) := (others => '0');
signal testBuf : std_logic_vector(15 downto 0) := (others => '0'); signal testBuf : std_logic_vector(15 downto 0) := (others => '0');
signal versionBuf : std_logic_vector(15 downto 0) := x"0004";
signal initBuf : std_logic := '0'; signal initBuf : std_logic := '0';
signal divClkBuf : std_logic := '0'; signal divClkBuf : std_logic := '0';
@ -69,6 +72,10 @@ begin
data <= not testBuf(15 downto 8); data <= not testBuf(15 downto 8);
when REG_ADDR_TEST_LOWER_BYTE => when REG_ADDR_TEST_LOWER_BYTE =>
data <= not testBuf(7 downto 0); data <= not testBuf(7 downto 0);
when REG_ADDR_VERSION_UPPER_BYTE =>
data <= versionBuf(15 downto 8);
when REG_ADDR_VERSION_LOWER_BYTE =>
data <= versionBuf(7 downto 0);
when others => when others =>
data <= (others => 'Z'); -- Запретить запись на шину data <= (others => 'Z'); -- Запретить запись на шину
end case; end case;

4
MainController/RAM9X8_Loader.bsf
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@ -144,12 +144,12 @@ applicable agreement for further details.
) )
(parameter (parameter
"REG_ADDR_LOADER_UPPER_BYTE" "REG_ADDR_LOADER_UPPER_BYTE"
"42" "44"
"" ""
(type "PARAMETER_SIGNED_DEC") ) (type "PARAMETER_SIGNED_DEC") )
(parameter (parameter
"REG_ADDR_LOADER_LOWER_BYTE" "REG_ADDR_LOADER_LOWER_BYTE"
"43" "45"
"" ""
(type "PARAMETER_SIGNED_DEC") ) (type "PARAMETER_SIGNED_DEC") )
(parameter (parameter

4
MainController/RAM9X8_Loader.vhd
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@ -5,8 +5,8 @@ use ieee.std_logic_unsigned.all;
entity RAM9X8_Loader is entity RAM9X8_Loader is
generic( generic(
REG_ADDR_LOADER_UPPER_BYTE : integer := 42; REG_ADDR_LOADER_UPPER_BYTE : integer := 44;
REG_ADDR_LOADER_LOWER_BYTE : integer := 43; REG_ADDR_LOADER_LOWER_BYTE : integer := 45;
DATA_BUS_WIDTH : integer := 8; DATA_BUS_WIDTH : integer := 8;
ADDRESS_BUS_WIDTH : integer := 9 ADDRESS_BUS_WIDTH : integer := 9

50
MainController/RAM9X8_OpticalBusMaster.bsf
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@ -81,94 +81,94 @@ applicable agreement for further details.
) )
(parameter (parameter
"REG_ADDR_CMD_UPPER_BYTE" "REG_ADDR_CMD_UPPER_BYTE"
"52"
""
(type "PARAMETER_SIGNED_DEC") )
(parameter
"REG_ADDR_CMD_LOWER_BYTE"
"53"
""
(type "PARAMETER_SIGNED_DEC") )
(parameter
"REG_ADDR_WORD_8_UPPER_BYTE"
"54" "54"
"" ""
(type "PARAMETER_SIGNED_DEC") ) (type "PARAMETER_SIGNED_DEC") )
(parameter (parameter
"REG_ADDR_WORD_8_LOWER_BYTE" "REG_ADDR_CMD_LOWER_BYTE"
"55" "55"
"" ""
(type "PARAMETER_SIGNED_DEC") ) (type "PARAMETER_SIGNED_DEC") )
(parameter (parameter
"REG_ADDR_WORD_7_UPPER_BYTE" "REG_ADDR_WORD_8_UPPER_BYTE"
"56" "56"
"" ""
(type "PARAMETER_SIGNED_DEC") ) (type "PARAMETER_SIGNED_DEC") )
(parameter (parameter
"REG_ADDR_WORD_7_LOWER_BYTE" "REG_ADDR_WORD_8_LOWER_BYTE"
"57" "57"
"" ""
(type "PARAMETER_SIGNED_DEC") ) (type "PARAMETER_SIGNED_DEC") )
(parameter (parameter
"REG_ADDR_WORD_6_UPPER_BYTE" "REG_ADDR_WORD_7_UPPER_BYTE"
"58" "58"
"" ""
(type "PARAMETER_SIGNED_DEC") ) (type "PARAMETER_SIGNED_DEC") )
(parameter (parameter
"REG_ADDR_WORD_6_LOWER_BYTE" "REG_ADDR_WORD_7_LOWER_BYTE"
"59" "59"
"" ""
(type "PARAMETER_SIGNED_DEC") ) (type "PARAMETER_SIGNED_DEC") )
(parameter (parameter
"REG_ADDR_WORD_5_UPPER_BYTE" "REG_ADDR_WORD_6_UPPER_BYTE"
"60" "60"
"" ""
(type "PARAMETER_SIGNED_DEC") ) (type "PARAMETER_SIGNED_DEC") )
(parameter (parameter
"REG_ADDR_WORD_5_LOWER_BYTE" "REG_ADDR_WORD_6_LOWER_BYTE"
"61" "61"
"" ""
(type "PARAMETER_SIGNED_DEC") ) (type "PARAMETER_SIGNED_DEC") )
(parameter (parameter
"REG_ADDR_WORD_4_UPPER_BYTE" "REG_ADDR_WORD_5_UPPER_BYTE"
"62" "62"
"" ""
(type "PARAMETER_SIGNED_DEC") ) (type "PARAMETER_SIGNED_DEC") )
(parameter (parameter
"REG_ADDR_WORD_4_LOWER_BYTE" "REG_ADDR_WORD_5_LOWER_BYTE"
"63" "63"
"" ""
(type "PARAMETER_SIGNED_DEC") ) (type "PARAMETER_SIGNED_DEC") )
(parameter (parameter
"REG_ADDR_WORD_3_UPPER_BYTE" "REG_ADDR_WORD_4_UPPER_BYTE"
"64" "64"
"" ""
(type "PARAMETER_SIGNED_DEC") ) (type "PARAMETER_SIGNED_DEC") )
(parameter (parameter
"REG_ADDR_WORD_3_LOWER_BYTE" "REG_ADDR_WORD_4_LOWER_BYTE"
"65" "65"
"" ""
(type "PARAMETER_SIGNED_DEC") ) (type "PARAMETER_SIGNED_DEC") )
(parameter (parameter
"REG_ADDR_WORD_2_UPPER_BYTE" "REG_ADDR_WORD_3_UPPER_BYTE"
"66" "66"
"" ""
(type "PARAMETER_SIGNED_DEC") ) (type "PARAMETER_SIGNED_DEC") )
(parameter (parameter
"REG_ADDR_WORD_2_LOWER_BYTE" "REG_ADDR_WORD_3_LOWER_BYTE"
"67" "67"
"" ""
(type "PARAMETER_SIGNED_DEC") ) (type "PARAMETER_SIGNED_DEC") )
(parameter (parameter
"REG_ADDR_WORD_1_UPPER_BYTE" "REG_ADDR_WORD_2_UPPER_BYTE"
"68" "68"
"" ""
(type "PARAMETER_SIGNED_DEC") ) (type "PARAMETER_SIGNED_DEC") )
(parameter (parameter
"REG_ADDR_WORD_1_LOWER_BYTE" "REG_ADDR_WORD_2_LOWER_BYTE"
"69" "69"
"" ""
(type "PARAMETER_SIGNED_DEC") ) (type "PARAMETER_SIGNED_DEC") )
(parameter
"REG_ADDR_WORD_1_UPPER_BYTE"
"70"
""
(type "PARAMETER_SIGNED_DEC") )
(parameter
"REG_ADDR_WORD_1_LOWER_BYTE"
"71"
""
(type "PARAMETER_SIGNED_DEC") )
(parameter (parameter
"DATA_BUS_WIDTH" "DATA_BUS_WIDTH"
"8" "8"

50
MainController/RAM9X8_OpticalBusMaster.vhd
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@ -5,24 +5,24 @@ use ieee.std_logic_unsigned.all;
entity RAM9X8_OpticalBusMaster is entity RAM9X8_OpticalBusMaster is
generic( generic(
REG_ADDR_CMD_UPPER_BYTE : integer := 52; REG_ADDR_CMD_UPPER_BYTE : integer := 54;
REG_ADDR_CMD_LOWER_BYTE : integer := 53; REG_ADDR_CMD_LOWER_BYTE : integer := 55;
REG_ADDR_WORD_8_UPPER_BYTE : integer := 54; REG_ADDR_WORD_8_UPPER_BYTE : integer := 56;
REG_ADDR_WORD_8_LOWER_BYTE : integer := 55; REG_ADDR_WORD_8_LOWER_BYTE : integer := 57;
REG_ADDR_WORD_7_UPPER_BYTE : integer := 56; REG_ADDR_WORD_7_UPPER_BYTE : integer := 58;
REG_ADDR_WORD_7_LOWER_BYTE : integer := 57; REG_ADDR_WORD_7_LOWER_BYTE : integer := 59;
REG_ADDR_WORD_6_UPPER_BYTE : integer := 58; REG_ADDR_WORD_6_UPPER_BYTE : integer := 60;
REG_ADDR_WORD_6_LOWER_BYTE : integer := 59; REG_ADDR_WORD_6_LOWER_BYTE : integer := 61;
REG_ADDR_WORD_5_UPPER_BYTE : integer := 60; REG_ADDR_WORD_5_UPPER_BYTE : integer := 62;
REG_ADDR_WORD_5_LOWER_BYTE : integer := 61; REG_ADDR_WORD_5_LOWER_BYTE : integer := 63;
REG_ADDR_WORD_4_UPPER_BYTE : integer := 62; REG_ADDR_WORD_4_UPPER_BYTE : integer := 64;
REG_ADDR_WORD_4_LOWER_BYTE : integer := 63; REG_ADDR_WORD_4_LOWER_BYTE : integer := 65;
REG_ADDR_WORD_3_UPPER_BYTE : integer := 64; REG_ADDR_WORD_3_UPPER_BYTE : integer := 66;
REG_ADDR_WORD_3_LOWER_BYTE : integer := 65; REG_ADDR_WORD_3_LOWER_BYTE : integer := 67;
REG_ADDR_WORD_2_UPPER_BYTE : integer := 66; REG_ADDR_WORD_2_UPPER_BYTE : integer := 68;
REG_ADDR_WORD_2_LOWER_BYTE : integer := 67; REG_ADDR_WORD_2_LOWER_BYTE : integer := 69;
REG_ADDR_WORD_1_UPPER_BYTE : integer := 68; REG_ADDR_WORD_1_UPPER_BYTE : integer := 70;
REG_ADDR_WORD_1_LOWER_BYTE : integer := 69; REG_ADDR_WORD_1_LOWER_BYTE : integer := 71;
DATA_BUS_WIDTH : integer := 8; DATA_BUS_WIDTH : integer := 8;
ADDRESS_BUS_WIDTH : integer := 9 ADDRESS_BUS_WIDTH : integer := 9
@ -46,7 +46,7 @@ architecture behavorial of RAM9X8_OpticalBusMaster is
signal dataBuf : std_logic_vector(127 downto 0) := (others => '0'); signal dataBuf : std_logic_vector(127 downto 0) := (others => '0');
signal dataToSend : std_logic_vector(127 downto 0) := (others => '0'); signal dataToSend : std_logic_vector(127 downto 0) := (others => '0');
signal cmdBuf : std_logic_vector(15 downto 0) := (others => '0'); signal cmdBuf : std_logic_vector(15 downto 0) := x"0004";
type CommunicationState_start is (Waiting, DataSending, CRCSending); type CommunicationState_start is (Waiting, DataSending, CRCSending);
signal CommunicationState : CommunicationState_start := Waiting ; signal CommunicationState : CommunicationState_start := Waiting ;
@ -192,7 +192,11 @@ begin
if start = '1' and startPrev = '0' then if start = '1' and startPrev = '0' then
dataToSend <= dataBuf; dataToSend <= dataBuf;
dataCRC <= dataBuf; dataCRC <= dataBuf;
bitCnt := (conv_integer(cmdBuf(2 downto 0)) * 16) - 1; if conv_integer(cmdBuf(3 downto 0)) < 9 and conv_integer(cmdBuf(3 downto 0)) > 0 then
bitCnt := (conv_integer(cmdBuf(3 downto 0)) * 16) - 1;
else
bitCnt := 63;
end if;
CommunicationState <= DataSending; CommunicationState <= DataSending;
resetCRC <= '0'; resetCRC <= '0';
end if; end if;
@ -254,7 +258,11 @@ begin
begin begin
if rising_edge(clk) then if rising_edge(clk) then
if resetCRC = '1' then if resetCRC = '1' then
bitCnt := (conv_integer(cmdBuf(2 downto 0)) * 16) - 1; if conv_integer(cmdBuf(3 downto 0)) < 9 and conv_integer(cmdBuf(3 downto 0)) > 0 then
bitCnt := (conv_integer(cmdBuf(3 downto 0)) * 16) - 1;
else
bitCnt := 63;
end if;
CRC <= x"0"; CRC <= x"0";
lacth := 0; lacth := 0;
readyCRC <= '0'; readyCRC <= '0';

2
MainController/RAM9X8_ParallelBusMaster.bsf
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@ -142,7 +142,7 @@ applicable agreement for further details.
(type "PARAMETER_SIGNED_DEC") ) (type "PARAMETER_SIGNED_DEC") )
(parameter (parameter
"ARRAY_LENGTH" "ARRAY_LENGTH"
"128" "256"
"" ""
(type "PARAMETER_SIGNED_DEC") ) (type "PARAMETER_SIGNED_DEC") )
(parameter (parameter

2
MainController/RAM9X8_ParallelBusMaster.vhd
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@ -14,7 +14,7 @@ entity RAM9X8_ParallelBusMaster is
REG_ADDR_CONTROL_UPPER_BYTE : integer := 12; REG_ADDR_CONTROL_UPPER_BYTE : integer := 12;
REG_ADDR_CONTROL_LOWER_BYTE : integer := 13; REG_ADDR_CONTROL_LOWER_BYTE : integer := 13;
ARRAY_LENGTH : integer := 128; ARRAY_LENGTH : integer := 256;
DATA_BUS_WIDTH : integer := 8; DATA_BUS_WIDTH : integer := 8;
ADDRESS_BUS_WIDTH : integer := 9 ADDRESS_BUS_WIDTH : integer := 9
); );