From 2b055193af495932d0bcf3fdd70242213eb173cc Mon Sep 17 00:00:00 2001 From: sokolovstanislav Date: Mon, 10 Jun 2024 17:52:14 +0300 Subject: [PATCH] =?UTF-8?q?=D0=AD=D1=82=D0=BE=D1=82=20=D0=B2=D0=B0=D1=80?= =?UTF-8?q?=D0=B8=D0=B0=D0=BD=D1=82=20=D1=80=D0=B0=D0=B1=D0=BE=D1=82=D0=B0?= =?UTF-8?q?=D0=B5=D1=82=20=D1=81=D1=82=D0=B0=D0=B1=D0=B8=D0=BB=D1=8C=D0=BD?= =?UTF-8?q?=D0=BE.=20=D0=A2=D0=B0=D0=B9=D0=BC=D0=B0=D1=83=D1=82=20=D0=BF?= =?UTF-8?q?=D0=B5=D1=80=D0=B5=D0=BD=D0=B5=D1=81=D0=BB=D0=B8=20=D0=B2=20?= =?UTF-8?q?=D0=BA=D0=BE=D0=BD=D0=B5=D1=86=20=D0=BB=D1=8E=D0=B1=D0=BE=D0=B9?= =?UTF-8?q?=20=D0=BF=D0=B5=D1=80=D0=B5=D0=B4=D0=B0=D1=87=D0=B8,=20=D1=87?= =?UTF-8?q?=D1=82=D0=BE=D0=B1=D1=8B=20=D0=B2=D1=8B=D0=B2=D0=B5=D1=81=D1=82?= =?UTF-8?q?=D0=B8=20=D0=BF=D0=B5=D1=80=D0=B8=D1=84=D0=B5=D1=80=D0=B8=D0=B9?= =?UTF-8?q?=D0=BD=D0=BE=D0=B5=20=D1=83=D1=81=D1=82=D1=80=D0=BE=D0=B9=D1=81?= =?UTF-8?q?=D1=82=D0=B2=D0=BE=20=D0=B2=20=D0=BD=D0=B0=D1=87=D0=B0=D0=BB?= =?UTF-8?q?=D1=8C=D0=BD=D0=BE=D0=B5=20=D1=81=D0=BE=D1=81=D1=82=D0=BE=D1=8F?= =?UTF-8?q?=D0=BD=D0=B8=D0=B5.=20=D0=9B=D0=B8=D0=BD=D0=B8=D1=8F=20=D0=B7?= =?UTF-8?q?=D0=B0=D0=BD=D1=8F=D1=82=D0=B0=20SB=5FCONTROL=5FLOWER(1)=20=3D?= =?UTF-8?q?=20'1'=20-=20=D0=BF=D0=BE=D1=8F=D0=B2=D0=B8=D1=82=D1=81=D1=8F?= =?UTF-8?q?=20=D0=B2=20=D0=BD=D0=B0=D1=87=D0=B0=D0=BB=D0=B5=20=D0=BF=D0=B5?= =?UTF-8?q?=D1=80=D0=B5=D0=B4=D0=B0=D1=87=D0=B8=20=D0=B8=20=D0=B7=D0=B0?= =?UTF-8?q?=D0=BA=D0=BE=D0=BD=D1=87=D0=B8=D1=82=D1=81=D1=8F=20=D0=BF=D0=BE?= =?UTF-8?q?=D1=81=D0=BB=D0=B5=20=D1=82=D0=B0=D0=B9=D0=BC=D0=B0=D1=83=D1=82?= =?UTF-8?q?=D0=B0.?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- MainController/RAM9X8_SerialBusMaster.vhd | 48 +++++++++-------------- 1 file changed, 19 insertions(+), 29 deletions(-) diff --git a/MainController/RAM9X8_SerialBusMaster.vhd b/MainController/RAM9X8_SerialBusMaster.vhd index 0055778..673d80c 100644 --- a/MainController/RAM9X8_SerialBusMaster.vhd +++ b/MainController/RAM9X8_SerialBusMaster.vhd @@ -44,7 +44,7 @@ signal dataToTransmit : std_logic_vector(15 downto 0) := x"0000"; signal dataFromDevices : std_logic_vector(15 downto 0) := x"0000"; type CommunicationState_start is (Waiting, TransmitAddress, TransmitData, TransmitCRC, TransmitCheck, ReceiveData, ReceiveCRC, ReceiveCheck, Timeout); -signal CommunicationState : CommunicationState_start := Waiting ; +signal CommunicationState : CommunicationState_start := Waiting; signal resetCRC : std_logic := '1'; signal CRC : std_logic_vector(3 downto 0) := x"0"; @@ -111,6 +111,7 @@ begin process(clk) is variable count : integer range 0 to 255 := 0; variable halfPeriod : integer range 0 to 255 := 50; + variable countPause : integer range 0 to 255 := 0; variable pause : integer range 0 to 255 := 200; variable state : integer range 0 to 1 := 1; variable bitCnt : integer range -1 to 31 := 0; @@ -123,6 +124,7 @@ begin bitCnt := 8; latch := 0; resetCRC <= '1'; + count := 0; sbdataout <= '0'; state := 1; if start = '1' and startPrev = '0' then @@ -132,32 +134,18 @@ begin dataCRC(23 downto 16) <= cmdBuf(7 downto 0); dataToTransmit <= dataBufIn; dataCRC(15 downto 0) <= dataBufIn; - controlBuf(15 downto 2) <= (others => '0'); - controlBuf(1) <= '1'; - controlBuf(0) <= '0'; - if count < pause then - CommunicationState <= Timeout; - count := count + 1; - else - CommunicationState <= TransmitAddress; - count:= 0; - end if; - else - if count < pause then - count := count + 1; - controlBuf(1) <= '1'; - else - controlBuf(1) <= '0'; - end if; + controlBuf(15 downto 0) <= (others => '0'); + CommunicationState <= TransmitAddress; end if; when Timeout => if count < pause then + sbclk <= '0'; count := count + 1; else - CommunicationState <= TransmitAddress; - count:= 0; + controlBuf(1) <= '0'; + CommunicationState <= Waiting; end if; - when TransmitAddress => + when TransmitAddress => if bitCnt = -1 then if direction = '1' then CommunicationState <= TransmitData; @@ -171,6 +159,7 @@ begin if count = 0 then if latch = 0 then sbdataout <= direction; + controlBuf(1) <= '1'; else sbdataout <= addressToTransmit(bitCnt); end if; @@ -242,9 +231,10 @@ begin bitCnt := bitCnt - 1; end if; end if; - else - count := 0; - CommunicationState <= Waiting; + else + --CommunicationState <= Waiting; + count := 0; + CommunicationState <= Timeout; controlBuf(15) <= '1'; end if; when TransmitCheck => @@ -255,13 +245,14 @@ begin count := count + 1; else count := 0; - state := 0; if sbdatain = '0' then controlBuf(0) <= '1'; else controlBuf(14) <= '1'; end if; - CommunicationState <= Waiting; + --CommunicationState <= Waiting; + count := 0; + CommunicationState <= Timeout; end if; when ReceiveData => if bitCnt = -1 then @@ -329,11 +320,10 @@ begin else controlBuf(12) <= '1'; end if; + --CommunicationState <= Waiting; count := 0; - CommunicationState <= Waiting; + CommunicationState <= Timeout; when others => - count := 0; - CommunicationState <= Waiting; end case; startPrev <= start; end if;