#include <adc_tools.h>
#include <detect_errors_adc.h>
#include <edrk_main.h>
#include <math.h>
#include <message_modbus.h>
#include <modbus_hmi.h>
#include <modbus_hmi_read.h>
#include <modbus_hmi_update.h>
#include <optical_bus.h>
#include <params.h>
#include <params_norma.h>
#include <project.h>
#include <protect_levels.h>
#include <pump_control.h>
#include <v_rotor.h>
#include <vector.h>
#include "edrk_main.h"
#include "global_time.h"
#include "control_station.h"
#include "CAN_Setup.h"
#include "global_time.h"
#include "RS_Functions.h"
#include "mathlib.h"
#include "logs_hmi.h"
#include "detect_errors.h"
/*
#include "mathlib.h"
#include <math.h>
#include "IQmathLib.h"
*/
int hmi_watch_dog = 0;
int prev_kvitir = 0;
int prev_sbor = 0;
int kvitir1 = 0;
int sbor1 = 0;
int razbor1 = 0;
//30001 ResetErrors command to controller to reset errors 1-reset
//30002 SchemeAssemble Command to change scheme state 0-scheme dissasemble 1- assemble
//30003 IsPowerSetMode 0-control enigine by turnovers, 1- by power
//30004 SpecifiedPower Power set by user
//30005 SpecifiedTurnovers Turnovers set by user
//30006 UserValueUpdated command to controller to update set value 1-ative
//30007 ReportGet Command to get report 1-get 0- nothinhg
//30008 ReportArraySaved Sets to 1 when HMI is ready to get array(part of report)
//30009 PumpsControlMode Pumps Control mode. 0 = auto, 1= pump 1, 2= pump 2
//30010 MotoHoursPanel �������� ������� (������)
//30011 MotoHoursFan1 �������� ������ ������������ 1 (������)
//30012 MotoHoursFan2 �������� ������ ������������ 2 (������)
//30013 MotoHoursPump1 �������� ��������� ������ (������)
//30014 MotoHoursPump2 �������� ���������� ������ (������)
//30015 MotoHoursInvertorCharged �������� � ��������� ""������� ����� �������"" (������)
//30016 MotoHoursInvertorGo �������� � ��������� ""���"" (������)
//30017 MotoHoursInvertorGoFault �������� � ��������� ""��� � ��������������"" (������)
//30018 MotoHoursInvertorAlarm �������� � ��������� ""������"" (������)
#define COUNT_ANALOG_DATA_FROM_INGETEAM SIZE_ANALOG_DATA_REMOUTE //(18+1)
///////////////////////////////////////////////////
///
///////////////////////////////////////////////////
void func_unpack_answer_from_Ingeteam(unsigned int cc)
{
// ����������y �����
unsigned int DataOut;
int Data, Data1, Data2, DataAnalog1, DataAnalog2, DataAnalog3, DataAnalog4, i;
unsigned int h;
volatile unsigned char *pByte;
// static int vs11,vs12,vs1;
// static int DataCnt=0;
// int GoT,Assemble_scheme;
// static int prev_temp_Rele1=0, temp_Rele1=0, prev_temp_Rele2=0, temp_Rele2=0;
static int flag_prev_turn_on = 0;
static int flag_prev_turn_off = 0;
static int prev_byte01_bit4 = 0;
static int prev_byte01_bit1 = 0;
static int flag_wait_revers_sbor = 1;
static int flag_wait_revers_go = 1;
static unsigned int count_transmited = 0;
// ��������� ���y �������
// ��� ��� ���� ������� ����
if (COUNT_ANALOG_DATA_FROM_INGETEAM > CONTROL_STATION_MAX_RAW_DATA)
xerror(main_er_ID(2),(void *)0);
for (h=1;h<COUNT_ANALOG_DATA_FROM_INGETEAM;h++)
control_station.raw_array_data[cc][h].all = modbus_table_analog_in[h].all;
}
///////////////////////////////////////////////////
///
///////////////////////////////////////////////////
void get_command_HMI(void)
{
int i;
static int prev_send_log = -1;
/////////////////
/////////////////
/////////////////
edrk.pult_cmd.kvitir = modbus_table_analog_in[1].all;
edrk.pult_cmd.sbor = modbus_table_analog_in[2].all;
edrk.pult_cmd.send_log = modbus_table_analog_in[7].all;
edrk.pult_cmd.pump_mode = modbus_table_analog_in[9].all;
// mode_pump = modbus_table_analog_in[9].all;
// 0 - auto on - rand pump
// 1 - auto on 1 pump
// 2 - auto on 2 pump
// 3 - manual on 1 pump
// 4 - manual on 2 pump
//////////////////////
pumps.pump1_engine_minutes = modbus_table_analog_in[13].all;
pumps.pump2_engine_minutes = modbus_table_analog_in[14].all;
edrk.pult_data.data_from_pult.nPCH = modbus_table_analog_in[34].all;
edrk.pult_data.data_from_pult.TimeToChangePump = modbus_table_analog_in[164].all;
edrk.pult_data.data_from_pult.count_build = modbus_table_analog_in[31].all;
edrk.pult_data.data_from_pult.count_revers = modbus_table_analog_in[32].all;
edrk.pult_data.data_from_pult.LastWorkPump = modbus_table_analog_in[36].all;
//
//������ ����� � ������ ����� ������ � �������� 30033:
//�������� 0 - ��� �� ������, �� �����;
//�������� 1 - ��� ������, ���� �����;
//�������� 2 - ���� ������, ��� �����;
//�������� 3 - ���� � ������ � �����;
edrk.pult_cmd.log_what_memory = modbus_table_analog_in[33].all;
edrk.pult_cmd.sdusb = modbus_table_analog_in[35].all;
//moto
for (i=0;i<COUNT_MOTO_PULT;i++)
edrk.pult_data.data_from_pult.moto[i] = modbus_table_analog_in[10+i].all;
/////////////////
/////////////////
/////////////////
/////////////////
/////////////////
if (edrk.pult_cmd.kvitir == 1)
{
if (prev_kvitir==0)
kvitir1 = 1;
}
else
kvitir1 = 0;
// edrk.KvitirDISPLAY = kvitir1;
// edrk.from_display.bits.KVITIR = kvitir1;
control_station.array_cmd[CONTROL_STATION_INGETEAM_PULT_RS485][CONTROL_STATION_CMD_CHECKBACK] = kvitir1;
prev_kvitir = edrk.pult_cmd.kvitir;
/////////////////
/////////////////
/////////////////
/////////////////
/////////////////
/////////////////
if (edrk.pult_cmd.sbor == 1)
{
if (prev_sbor==0)
{
sbor1 = 1;
}
razbor1 = 0;
}
else
{
if (prev_sbor==1)
{
razbor1 = 1;
}
sbor1 = 0;
}
edrk.from_display.bits.SBOR_SHEMA = sbor1;
// edrk.from_display.bits.RAZBOR_SHEMA = razbor1;
prev_sbor = edrk.pult_cmd.sbor;
/////////////////
/////////////////
/////////////////
/////////////////
if (prev_send_log>=0 && prev_send_log != edrk.pult_cmd.send_log)
{
if (edrk.pult_cmd.send_log)
log_to_HMI.send_log = edrk.pult_cmd.send_log;
log_to_HMI.sdusb = edrk.pult_cmd.sdusb;
}
// else
// log_to_HMI.send_log = 0;
prev_send_log = edrk.pult_cmd.send_log;
/////////////////
/////////////////
/////////////////
control_station.array_cmd[CONTROL_STATION_INGETEAM_PULT_RS485][CONTROL_STATION_CMD_MODE_PUMP] = edrk.pult_cmd.pump_mode;
//
// control_station.array_cmd[CONTROL_STATION_INGETEAM_PULT_RS485][CONTROL_STATION_CMD_DISABLE_ON_PUMP] = modbus_table_analog_in[188].all;
// control_station.array_cmd[CONTROL_STATION_INGETEAM_PULT_RS485][CONTROL_STATION_CMD_DISABLE_ON_QTV] = modbus_table_analog_in[189].all;
// control_station.array_cmd[CONTROL_STATION_INGETEAM_PULT_RS485][CONTROL_STATION_CMD_DISABLE_ON_UMP] = modbus_table_analog_in[190].all;
// control_station.array_cmd[CONTROL_STATION_INGETEAM_PULT_RS485][CONTROL_STATION_CMD_ENABLE_ON_CHARGE] = modbus_table_analog_in[191].all;
// control_station.array_cmd[CONTROL_STATION_INGETEAM_PULT_RS485][CONTROL_STATION_CMD_MANUAL_DISCHARGE] = modbus_table_analog_in[180].all;
// control_station.array_cmd[CONTROL_STATION_INGETEAM_PULT_RS485][CONTROL_STATION_CMD_GO] = !modbus_table_analog_in[192].all;
//
// control_station.array_cmd[CONTROL_STATION_INGETEAM_PULT_RS485][CONTROL_STATION_CMD_] = modbus_table_analog_in[188].all;
/////////////////
/////////////////
/////////////////
/////////////////
parse_protect_levels_HMI();
}
///////////////////////////////////////////////////
///
///////////////////////////////////////////////////
int update_progress_load_hmi(int proc_load)
{
static unsigned int old_time_5 = 0;
volatile int perc_load=0, final_code = 0, c_l = 0;
// return 0;
update_tables_HMI_on_inited(proc_load);
old_time_5 = global_time.miliseconds;
do
{
if (final_code >= 4)
{
return 1;
}
// if (control_station.flag_waiting_answer[CONTROL_STATION_INGETEAM_PULT_RS485]==0)
// final_code = modbusNetworkSharing(0);
// else
final_code = modbusNetworkSharing(1);
// RS232_WorkingWith(0,1,0);
}
while (detect_pause_milisec(1500, &old_time_5)==0);//(100,&old_time));
return 0;
}
///////////////////////////////////////////////////
///
///////////////////////////////////////////////////
void update_tables_HMI_on_inited(int perc_load)
{
Inverter_state state;
static int nn=0, ss=0;
static int prev_edrk_KVITIR=0;
int i,status;
// log_to_HMI.send_log = modbus_table_analog_in[7].all;
//setRegisterDiscreteOutput(log_to_HMI.flag_log_array_ready_sent, 310);
// LoadMode Read 00544 00544 ����� �������� ������������ �����������
setRegisterDiscreteOutput(0, 544);//
// Loading ReadWrite 30088 40088 ����������� �������� 0-10
modbus_table_analog_out[88].all = perc_load;
// ��� �������� ������ ������
modbus_table_analog_out[4].all++;
// build version
modbus_table_analog_out[219].all = edrk.buildYear;
modbus_table_analog_out[220].all = edrk.buildMonth;
modbus_table_analog_out[221].all = edrk.buildDay;
}
///////////////////////////////////////////////////
///
///////////////////////////////////////////////////
void update_tables_HMI_discrete(void)
{
int real_box;
// ��� ���� ������������ ���������!!!
// if (edrk.from_display.bits.KVITIR)
// setRegisterDiscreteOutput(edrk.from_display.bits.KVITIR, 301);
setRegisterDiscreteOutput(control_station.array_cmd[CONTROL_STATION_INGETEAM_PULT_RS485][CONTROL_STATION_CMD_CHECKBACK], 513);
// prev_edrk_KVITIR = edrk.from_display.bits.KVITIR;
/////
//setRegisterDiscreteOutput(edrk.RemouteFromDISPLAY, 302);
setRegisterDiscreteOutput(control_station.active_control_station[CONTROL_STATION_INGETEAM_PULT_RS485], 514);
setRegisterDiscreteOutput(hmi_watch_dog, 515);
setRegisterDiscreteOutput(edrk.StatusFunAll, 516);
setRegisterDiscreteOutput(edrk.StatusFunAll, 517);
setRegisterDiscreteOutput(edrk.StatusPump0, 518);
setRegisterDiscreteOutput(edrk.StatusPump1, 519);
setRegisterDiscreteOutput(edrk.from_shema_filter.bits.SVU,524);
setRegisterDiscreteOutput(edrk.from_shema_filter.bits.ZADA_DISPLAY,525);
// �������_�������������_����������_�� Read 00523
// �������_�������������_����������_��� Read 00524
// �������_��������_����� Read 00525
setRegisterDiscreteOutput(edrk.from_ing1.bits.OHLAD_UTE4KA_WATER, 526);//
setRegisterDiscreteOutput(edrk.from_ing1.bits.NASOS_NORMA, 527);//
setRegisterDiscreteOutput(edrk.from_ing1.bits.OP_PIT_NORMA, 528);//
setRegisterDiscreteOutput(edrk.from_ing1.bits.UPC_24V_NORMA, 529);//
setRegisterDiscreteOutput(edrk.from_ing1.bits.ALL_KNOPKA_AVARIA, 530);//
setRegisterDiscreteOutput(edrk.SumSbor, 531);//
setRegisterDiscreteOutput(edrk.from_ing1.bits.ZARYAD_ON, 532);//
setRegisterDiscreteOutput(edrk.from_ing1.bits.VIPR_PREDOHR_NORMA, 533);//
setRegisterDiscreteOutput(!edrk.temper_limit_koeffs.code_status, 534);//
// setRegisterDiscreteOutput(1, 331);//
setRegisterDiscreteOutput(edrk.from_ing1.bits.ZAZEML_ON, 535);//
setRegisterDiscreteOutput(edrk.from_ing1.bits.NAGREV_ON, 536);//
setRegisterDiscreteOutput(edrk.from_ing1.bits.BLOCK_IZOL_NORMA, 537);//
setRegisterDiscreteOutput(edrk.from_ing1.bits.BLOCK_IZOL_AVARIA, 538);//
//////////////
// schemeStateOnController ReadWrite 00539 00539 ��������� ����� �� ����������� 0 - ���������, 1-�������
// StateAnotherPowerChannel Read 00540 00540 ��������� ������� �������� ������: 0 - ��� ������, 1 ������
// InterfaceOpticalBus Read 00541 00541 ��������� ���������� ����: 0 - ��� ������, 1 - ���� �����
// StateDriver Read 00542 00542 ��������� �������: 0 - �� ��������� � ������� ���, 1 - ��������� � ������� ���
// NumberPowerChannel Read 00543 00543 ����� �������� ������: 0 - ������, 1 - ������
setRegisterDiscreteOutput(edrk.Status_Ready.bits.ready_final, 539);
setRegisterDiscreteOutput(edrk.errors.e7.bits.ANOTHER_BS_ALARM, 540);
setRegisterDiscreteOutput(optical_read_data.status == 1 && optical_write_data.status == 1 ? 1 : 0, 541);
setRegisterDiscreteOutput(edrk.Status_Rascepitel_Ok, 542);
if (edrk.flag_second_PCH==0)
setRegisterDiscreteOutput(0, 543);
else
setRegisterDiscreteOutput(1, 543);
// LoadMode Read 00544 00544 ����� �������� ������������ �����������
setRegisterDiscreteOutput(1, 544); //
// Loading ReadWrite 30088 40088 ����������� �������� 0-10
setRegisterDiscreteOutput(control_station.active_array_cmd[CONTROL_STATION_CMD_BLOCK_BS]
|| edrk.from_shema.bits.SVU_BLOCK_QTV, 545);
//////////////
setRegisterDiscreteOutput(project.cds_tk[2].read.sbus.status_protect_current_ack.bit.tk0_ack, 17);//
setRegisterDiscreteOutput(project.cds_tk[2].read.sbus.status_protect_current_ack.bit.tk1_ack, 18);//
setRegisterDiscreteOutput(project.cds_tk[2].read.sbus.status_protect_current_ack.bit.tk2_ack, 19);//
setRegisterDiscreteOutput(project.cds_tk[2].read.sbus.status_protect_current_ack.bit.tk3_ack, 20);//
setRegisterDiscreteOutput(project.cds_tk[2].read.sbus.status_protect_current_ack.bit.tk4_ack, 21);//
setRegisterDiscreteOutput(project.cds_tk[2].read.sbus.status_protect_current_ack.bit.tk5_ack, 22);//
setRegisterDiscreteOutput(project.cds_tk[2].read.sbus.status_protect_current_ack.bit.tk6_ack, 23);//
setRegisterDiscreteOutput(project.cds_tk[2].read.sbus.status_protect_current_ack.bit.tk7_ack, 24);//
setRegisterDiscreteOutput(project.cds_tk[3].read.sbus.status_protect_current_ack.bit.tk0_ack, 25);//
setRegisterDiscreteOutput(project.cds_tk[3].read.sbus.status_protect_current_ack.bit.tk1_ack, 26);//
/////////////////////
if (edrk.flag_second_PCH==0)
setRegisterDiscreteOutput(edrk.errors.e4.bits.ANOTHER_BS_POWER_OFF, 27);
else
setRegisterDiscreteOutput(edrk.errors.e4.bits.ANOTHER_BS_POWER_OFF, 28);
setRegisterDiscreteOutput(project.cds_tk[0].read.sbus.status_protect_current_ack.bit.tk0_current, 33);//
setRegisterDiscreteOutput(project.cds_tk[0].read.sbus.status_protect_current_ack.bit.tk1_current, 34);//
setRegisterDiscreteOutput(project.cds_tk[0].read.sbus.status_protect_current_ack.bit.tk2_current, 35);//
setRegisterDiscreteOutput(project.cds_tk[0].read.sbus.status_protect_current_ack.bit.tk3_current, 36);//
setRegisterDiscreteOutput(project.cds_tk[0].read.sbus.status_protect_current_ack.bit.tk4_current, 37);//
setRegisterDiscreteOutput(project.cds_tk[0].read.sbus.status_protect_current_ack.bit.tk5_current, 38);//
setRegisterDiscreteOutput(project.cds_tk[0].read.sbus.status_protect_current_ack.bit.tk6_current, 39);//
setRegisterDiscreteOutput(project.cds_tk[0].read.sbus.status_protect_current_ack.bit.tk7_current, 40);//
setRegisterDiscreteOutput(project.cds_tk[1].read.sbus.status_protect_current_ack.bit.tk0_current, 41);//
setRegisterDiscreteOutput(project.cds_tk[1].read.sbus.status_protect_current_ack.bit.tk1_current, 42);//
setRegisterDiscreteOutput(project.cds_tk[1].read.sbus.status_protect_current_ack.bit.tk2_current, 43);//
setRegisterDiscreteOutput(project.cds_tk[1].read.sbus.status_protect_current_ack.bit.tk3_current, 44);//
setRegisterDiscreteOutput(project.cds_tk[1].read.sbus.status_protect_current_ack.bit.tk4_current, 45);//
setRegisterDiscreteOutput(project.cds_tk[1].read.sbus.status_protect_current_ack.bit.tk5_current, 46);//
setRegisterDiscreteOutput(project.cds_tk[1].read.sbus.status_protect_current_ack.bit.tk6_current, 47);//
setRegisterDiscreteOutput(project.cds_tk[1].read.sbus.status_protect_current_ack.bit.tk7_current, 48);//
setRegisterDiscreteOutput(project.cds_tk[2].read.sbus.status_protect_current_ack.bit.tk0_current, 49);//
setRegisterDiscreteOutput(project.cds_tk[2].read.sbus.status_protect_current_ack.bit.tk1_current, 50);//
setRegisterDiscreteOutput(project.cds_tk[2].read.sbus.status_protect_current_ack.bit.tk2_current, 51);//
setRegisterDiscreteOutput(project.cds_tk[2].read.sbus.status_protect_current_ack.bit.tk3_current, 52);//
setRegisterDiscreteOutput(project.cds_tk[2].read.sbus.status_protect_current_ack.bit.tk4_current, 53);//
setRegisterDiscreteOutput(project.cds_tk[2].read.sbus.status_protect_current_ack.bit.tk5_current, 54);//
setRegisterDiscreteOutput(project.cds_tk[2].read.sbus.status_protect_current_ack.bit.tk6_current, 55);//
setRegisterDiscreteOutput(project.cds_tk[2].read.sbus.status_protect_current_ack.bit.tk7_current, 56);//
setRegisterDiscreteOutput(project.cds_tk[3].read.sbus.status_protect_current_ack.bit.tk0_current, 57);//
setRegisterDiscreteOutput(project.cds_tk[3].read.sbus.status_protect_current_ack.bit.tk1_current, 58);//
//////////////////////////
setRegisterDiscreteOutput(project.cds_tk[0].read.sbus.lock_status_error.bit.mintime_err_keys_3210, 65);//
setRegisterDiscreteOutput(project.cds_tk[0].read.sbus.lock_status_error.bit.mintime_err_keys_3210, 66);//
setRegisterDiscreteOutput(project.cds_tk[0].read.sbus.lock_status_error.bit.mintime_err_keys_3210, 67);//
setRegisterDiscreteOutput(project.cds_tk[0].read.sbus.lock_status_error.bit.mintime_err_keys_3210, 68);//
setRegisterDiscreteOutput(project.cds_tk[0].read.sbus.lock_status_error.bit.mintime_err_keys_7654, 69);//
setRegisterDiscreteOutput(project.cds_tk[0].read.sbus.lock_status_error.bit.mintime_err_keys_7654, 70);//
setRegisterDiscreteOutput(project.cds_tk[0].read.sbus.lock_status_error.bit.mintime_err_keys_7654, 71);//
setRegisterDiscreteOutput(project.cds_tk[0].read.sbus.lock_status_error.bit.mintime_err_keys_7654, 72);//
setRegisterDiscreteOutput(project.cds_tk[1].read.sbus.lock_status_error.bit.mintime_err_keys_3210, 73);//
setRegisterDiscreteOutput(project.cds_tk[1].read.sbus.lock_status_error.bit.mintime_err_keys_3210, 74);//
setRegisterDiscreteOutput(project.cds_tk[1].read.sbus.lock_status_error.bit.mintime_err_keys_3210, 75);//
setRegisterDiscreteOutput(project.cds_tk[1].read.sbus.lock_status_error.bit.mintime_err_keys_3210, 76);//
setRegisterDiscreteOutput(project.cds_tk[1].read.sbus.lock_status_error.bit.mintime_err_keys_7654, 77);//
setRegisterDiscreteOutput(project.cds_tk[1].read.sbus.lock_status_error.bit.mintime_err_keys_7654, 78);//
setRegisterDiscreteOutput(project.cds_tk[1].read.sbus.lock_status_error.bit.mintime_err_keys_7654, 79);//
setRegisterDiscreteOutput(project.cds_tk[1].read.sbus.lock_status_error.bit.mintime_err_keys_7654, 80);//
setRegisterDiscreteOutput(project.cds_tk[2].read.sbus.lock_status_error.bit.mintime_err_keys_3210, 81);//
setRegisterDiscreteOutput(project.cds_tk[2].read.sbus.lock_status_error.bit.mintime_err_keys_3210, 82);//
setRegisterDiscreteOutput(project.cds_tk[2].read.sbus.lock_status_error.bit.mintime_err_keys_3210, 83);//
setRegisterDiscreteOutput(project.cds_tk[2].read.sbus.lock_status_error.bit.mintime_err_keys_3210, 84);//
setRegisterDiscreteOutput(project.cds_tk[2].read.sbus.lock_status_error.bit.mintime_err_keys_7654, 85);//
setRegisterDiscreteOutput(project.cds_tk[2].read.sbus.lock_status_error.bit.mintime_err_keys_7654, 86);//
setRegisterDiscreteOutput(project.cds_tk[2].read.sbus.lock_status_error.bit.mintime_err_keys_7654, 87);//
setRegisterDiscreteOutput(project.cds_tk[2].read.sbus.lock_status_error.bit.mintime_err_keys_7654, 88);//
setRegisterDiscreteOutput(project.cds_tk[3].read.sbus.lock_status_error.bit.mintime_err_keys_3210, 89);//
setRegisterDiscreteOutput(project.cds_tk[3].read.sbus.lock_status_error.bit.mintime_err_keys_3210, 90);//
/////////////////
setRegisterDiscreteOutput(edrk.errors.e3.bits.NOT_READY_TK_0, 97);//
setRegisterDiscreteOutput(edrk.errors.e3.bits.NOT_READY_TK_1, 98);//
setRegisterDiscreteOutput(edrk.errors.e3.bits.NOT_READY_TK_2, 99);//
setRegisterDiscreteOutput(edrk.errors.e3.bits.NOT_READY_TK_3, 100);//
setRegisterDiscreteOutput(edrk.errors.e3.bits.NOT_READY_IN_0, 101);//
setRegisterDiscreteOutput(edrk.errors.e3.bits.NOT_READY_IN_1, 102);//
setRegisterDiscreteOutput(edrk.errors.e3.bits.NOT_READY_OUT_0, 103);//
// setRegisterDiscreteOutput(edrk.errors.e3.bits.NOT_READY_OUT_1, 105);//
setRegisterDiscreteOutput(edrk.errors.e3.bits.NOT_READY_ADC_0, 104);//
setRegisterDiscreteOutput(edrk.errors.e3.bits.NOT_READY_HWP_0, 105);//
setRegisterDiscreteOutput(edrk.errors.e3.bits.NOT_READY_ADC_1, 106);//
setRegisterDiscreteOutput(edrk.errors.e3.bits.NOT_READY_CONTR, 107);//
///////////////////
setRegisterDiscreteOutput(edrk.errors.e5.bits.KEY_AVARIA, 113);//
setRegisterDiscreteOutput(edrk.errors.e6.bits.QTV_ERROR_NOT_ANSWER, 114);
setRegisterDiscreteOutput(edrk.errors.e7.bits.SVU_BLOCK_ON_QTV
|| control_station.active_array_cmd[CONTROL_STATION_CMD_BLOCK_BS], 115);
setRegisterDiscreteOutput(edrk.errors.e7.bits.UMP_NOT_ANSWER, 116);
setRegisterDiscreteOutput(edrk.errors.e7.bits.UMP_NOT_READY, 117);
setRegisterDiscreteOutput(edrk.errors.e6.bits.RASCEPITEL_ERROR_NOT_ANSWER, 118);
setRegisterDiscreteOutput(edrk.errors.e7.bits.ANOTHER_RASCEPITEL_ON, 119);
setRegisterDiscreteOutput(edrk.errors.e7.bits.AUTO_SET_MASTER, 120);
setRegisterDiscreteOutput(edrk.errors.e7.bits.ANOTHER_PCH_NOT_ANSWER, 121);
setRegisterDiscreteOutput(edrk.errors.e8.bits.WDOG_OPTICAL_BUS, 122);
setRegisterDiscreteOutput(edrk.errors.e2.bits.ERROR_RAZBOR_SHEMA, 123);
setRegisterDiscreteOutput(edrk.errors.e1.bits.NO_CONFIRM_ON_RASCEPITEL, 124);
setRegisterDiscreteOutput(edrk.errors.e1.bits.ANOTHER_BS_NOT_ON_RASCEPITEL, 125);
setRegisterDiscreteOutput(edrk.errors.e1.bits.ANOTHER_BS_VERY_LONG_WAIT, 126);
setRegisterDiscreteOutput(edrk.errors.e1.bits.VERY_LONG_BOTH_READY2, 127);
setRegisterDiscreteOutput(edrk.errors.e1.bits.BOTH_KEYS_CHARGE_DISCHARGE, 128);
// setRegisterDiscreteOutput(edrk.errors.e5.bits.OP_PIT, 115);//
// setRegisterDiscreteOutput(edrk.errors.e5.bits.POWER_UPC, 116);//
///////////////////
setRegisterDiscreteOutput(!control_station.alive_control_station[CONTROL_STATION_ZADATCHIK_CAN], 129);
setRegisterDiscreteOutput(!control_station.alive_control_station[CONTROL_STATION_MPU_SVU_CAN], 130);
// setRegisterDiscreteOutput(CAN_timeout[get_real_in_mbox(UNITS_TYPE_BOX,UMU_CAN_DEVICE)], 131); �������� �� �����
real_box = get_real_in_mbox(UNITS_TYPE_BOX,BKSSD_CAN_DEVICE);
if (real_box != -1)
setRegisterDiscreteOutput(CAN_timeout[real_box], 132);
real_box = get_real_in_mbox(UNITS_TYPE_BOX,VPU_CAN);
if (real_box != -1)
setRegisterDiscreteOutput(CAN_timeout[real_box], 133);
real_box = get_real_in_mbox(UNITS_TYPE_BOX,ANOTHER_BSU1_CAN_DEVICE);
if (real_box != -1)
setRegisterDiscreteOutput(CAN_timeout[real_box], 134);
setRegisterDiscreteOutput(edrk.errors.e7.bits.CAN2CAN_BS, 135);
if (edrk.flag_second_PCH==0)
setRegisterDiscreteOutput(edrk.warnings.e4.bits.ANOTHER_BS_POWER_OFF, 137);
else
setRegisterDiscreteOutput(edrk.warnings.e4.bits.ANOTHER_BS_POWER_OFF, 136);
setRegisterDiscreteOutput(edrk.errors.e7.bits.ANOTHER_BS_ALARM, 138); // ; edrk.errors.e4.bits.FAST_OPTICAL_ALARM
setRegisterDiscreteOutput(edrk.warnings.e7.bits.ANOTHER_BS_ALARM, 139);// ; edrk.warnings.e4.bits.FAST_OPTICAL_ALARM
setRegisterDiscreteOutput(edrk.warnings.e7.bits.UMP_NOT_READY, 140);
setRegisterDiscreteOutput(edrk.warnings.e9.bits.SENSOR_ROTOR_1_BREAK, 141);
setRegisterDiscreteOutput(edrk.warnings.e9.bits.SENSOR_ROTOR_1_BREAK, 142);
setRegisterDiscreteOutput(edrk.errors.e9.bits.SENSOR_ROTOR_1_2_BREAK, 143);
///
setRegisterDiscreteOutput(project.cds_tk[0].read.sbus.status_protect_current_ack.bit.tk0_ack, 145);//
setRegisterDiscreteOutput(project.cds_tk[0].read.sbus.status_protect_current_ack.bit.tk1_ack, 146);//
setRegisterDiscreteOutput(project.cds_tk[0].read.sbus.status_protect_current_ack.bit.tk2_ack, 147);//
setRegisterDiscreteOutput(project.cds_tk[0].read.sbus.status_protect_current_ack.bit.tk3_ack, 148);//
setRegisterDiscreteOutput(project.cds_tk[0].read.sbus.status_protect_current_ack.bit.tk4_ack, 149);//
setRegisterDiscreteOutput(project.cds_tk[0].read.sbus.status_protect_current_ack.bit.tk5_ack, 150);//
setRegisterDiscreteOutput(project.cds_tk[0].read.sbus.status_protect_current_ack.bit.tk6_ack, 151);//
setRegisterDiscreteOutput(project.cds_tk[0].read.sbus.status_protect_current_ack.bit.tk7_ack, 152);//
setRegisterDiscreteOutput(project.cds_tk[1].read.sbus.status_protect_current_ack.bit.tk0_ack, 153);//
setRegisterDiscreteOutput(project.cds_tk[1].read.sbus.status_protect_current_ack.bit.tk1_ack, 154);//
setRegisterDiscreteOutput(project.cds_tk[1].read.sbus.status_protect_current_ack.bit.tk2_ack, 155);//
setRegisterDiscreteOutput(project.cds_tk[1].read.sbus.status_protect_current_ack.bit.tk3_ack, 156);//
setRegisterDiscreteOutput(project.cds_tk[1].read.sbus.status_protect_current_ack.bit.tk4_ack, 157);//
setRegisterDiscreteOutput(project.cds_tk[1].read.sbus.status_protect_current_ack.bit.tk5_ack, 158);//
setRegisterDiscreteOutput(project.cds_tk[1].read.sbus.status_protect_current_ack.bit.tk6_ack, 159);//
setRegisterDiscreteOutput(project.cds_tk[1].read.sbus.status_protect_current_ack.bit.tk7_ack, 160);//
// setRegisterDiscreteOutput(edrk.errors.e5.bits.KEY_AVARIA, 243);//
setRegisterDiscreteOutput(edrk.errors.e5.bits.OP_PIT, 161);//
setRegisterDiscreteOutput(edrk.errors.e5.bits.UTE4KA_WATER, 162);//
setRegisterDiscreteOutput(edrk.errors.e1.bits.BLOCK_DOOR, 163);//
setRegisterDiscreteOutput(edrk.errors.e5.bits.ERROR_PRE_CHARGE_ON, 164);//
setRegisterDiscreteOutput(edrk.errors.e5.bits.FAN, 165);//
setRegisterDiscreteOutput(edrk.errors.e5.bits.PUMP_1, 166);//
setRegisterDiscreteOutput(edrk.errors.e5.bits.PRE_READY_PUMP, 167);//
setRegisterDiscreteOutput(edrk.errors.e5.bits.ERROR_HEAT, 168);//
setRegisterDiscreteOutput(edrk.errors.e5.bits.ERROR_PRED_VIPR, 170);//
setRegisterDiscreteOutput(edrk.errors.e5.bits.ERROR_ISOLATE, 171);//
setRegisterDiscreteOutput(edrk.errors.e5.bits.POWER_UPC, 172);//
setRegisterDiscreteOutput(edrk.errors.e5.bits.ERROR_GROUND_NET, 173);//
setRegisterDiscreteOutput(edrk.errors.e5.bits.PUMP_2, 174);//
setRegisterDiscreteOutput(edrk.warnings.e5.bits.ERROR_ISOLATE, 175);//
setRegisterDiscreteOutput(edrk.warnings.e5.bits.PRE_READY_PUMP, 176);//
///////////////////
setRegisterDiscreteOutput(edrk.errors.e0.bits.U_1_MAX, 177);//
setRegisterDiscreteOutput(edrk.errors.e0.bits.U_2_MAX, 178);//
setRegisterDiscreteOutput(edrk.errors.e0.bits.U_1_MIN, 179);//
setRegisterDiscreteOutput(edrk.errors.e0.bits.U_2_MIN, 180);//
setRegisterDiscreteOutput(edrk.errors.e0.bits.U_A1B1_MAX, 181);//
setRegisterDiscreteOutput(edrk.errors.e0.bits.U_A2B2_MAX, 182);//
setRegisterDiscreteOutput(edrk.errors.e0.bits.U_B1C1_MAX, 183);//
setRegisterDiscreteOutput(edrk.errors.e0.bits.U_B2C2_MAX, 184);//
setRegisterDiscreteOutput(edrk.errors.e0.bits.U_A1B1_MIN, 185);//
setRegisterDiscreteOutput(edrk.errors.e0.bits.U_A2B2_MIN, 186);//
setRegisterDiscreteOutput(edrk.errors.e0.bits.U_B1C1_MIN, 187);//
setRegisterDiscreteOutput(edrk.errors.e0.bits.U_B2C2_MIN, 188);//
setRegisterDiscreteOutput(edrk.errors.e0.bits.U_IN_MAX, 189);//
setRegisterDiscreteOutput(edrk.errors.e0.bits.U_IN_MIN, 190);//
// setRegisterDiscreteOutput(edrk.errors.e0.bits.I_1_MAX, 191);//
// setRegisterDiscreteOutput(edrk.errors.e0.bits.I_2_MAX, 192);//
//////////////
setRegisterDiscreteOutput(edrk.errors.e1.bits.I_UO2_MAX, 193);//
setRegisterDiscreteOutput(edrk.errors.e1.bits.I_UO3_MAX, 194);//
setRegisterDiscreteOutput(edrk.errors.e1.bits.I_UO4_MAX, 195);//
setRegisterDiscreteOutput(edrk.errors.e1.bits.I_UO5_MAX, 196);//
setRegisterDiscreteOutput(edrk.errors.e1.bits.I_UO6_MAX, 197);//
setRegisterDiscreteOutput(edrk.errors.e1.bits.I_UO7_MAX, 198);//
setRegisterDiscreteOutput(edrk.errors.e1.bits.I_BREAK_1_MAX, 199);//
setRegisterDiscreteOutput(edrk.errors.e1.bits.I_BREAK_2_MAX, 200);//
// setRegisterDiscreteOutput(edrk.errors.e1.bits.HWP_ERROR, 201);//
////////////////////
setRegisterDiscreteOutput(edrk.warnings.e2.bits.T_AIR0_MAX, 203);//
setRegisterDiscreteOutput(edrk.warnings.e2.bits.T_AIR1_MAX, 204);//
setRegisterDiscreteOutput(edrk.warnings.e2.bits.T_AIR2_MAX, 205);//
setRegisterDiscreteOutput(edrk.warnings.e2.bits.T_AIR3_MAX, 206);//
setRegisterDiscreteOutput(edrk.power_limit.bits.limit_by_temper, 207);//
setRegisterDiscreteOutput(edrk.power_limit.bits.limit_from_freq, 211);//
setRegisterDiscreteOutput(edrk.power_limit.bits.limit_from_uom_fast, 212);//
setRegisterDiscreteOutput(edrk.power_limit.bits.limit_from_SVU, 213);//
setRegisterDiscreteOutput(edrk.power_limit.bits.limit_moment, 214);//
setRegisterDiscreteOutput(edrk.power_limit.bits.limit_Iout, 216);//
////////////////////
setRegisterDiscreteOutput(edrk.errors.e5.bits.ERROR_PRE_CHARGE_ON, 209);//
setRegisterDiscreteOutput(edrk.errors.e7.bits.ERROR_SBOR_SHEMA, 210);//
/////////////////////
setRegisterDiscreteOutput(project.hwp[0].read.comp_s.plus.bit.ch0, 225);//
setRegisterDiscreteOutput(project.hwp[0].read.comp_s.plus.bit.ch1, 226);//
setRegisterDiscreteOutput(project.hwp[0].read.comp_s.plus.bit.ch2, 227);//
setRegisterDiscreteOutput(project.hwp[0].read.comp_s.plus.bit.ch3, 228);//
setRegisterDiscreteOutput(project.hwp[0].read.comp_s.plus.bit.ch4, 229);//
setRegisterDiscreteOutput(project.hwp[0].read.comp_s.plus.bit.ch5, 230);//
setRegisterDiscreteOutput(project.hwp[0].read.comp_s.plus.bit.ch6, 231);//
setRegisterDiscreteOutput(project.hwp[0].read.comp_s.plus.bit.ch7, 232);//
setRegisterDiscreteOutput(project.hwp[0].read.comp_s.plus.bit.ch8, 234);//
setRegisterDiscreteOutput(project.hwp[0].read.comp_s.plus.bit.ch10, 235);//
setRegisterDiscreteOutput(project.hwp[0].read.comp_s.plus.bit.ch11, 236);//
setRegisterDiscreteOutput(project.hwp[0].read.comp_s.plus.bit.ch12, 237);//
setRegisterDiscreteOutput(project.hwp[0].read.comp_s.plus.bit.ch13, 238);//
setRegisterDiscreteOutput(project.hwp[0].read.comp_s.plus.bit.ch14, 239);//
setRegisterDiscreteOutput(project.hwp[0].read.comp_s.plus.bit.ch15, 240);//
////////////////////
setRegisterDiscreteOutput(edrk.errors.e5.bits.LINE_ERR0, 241);//
setRegisterDiscreteOutput(edrk.errors.e5.bits.LINE_HWP, 242);//
////////////////////
setRegisterDiscreteOutput(project.hwp[0].read.comp_s.minus.bit.ch2, 243);//
setRegisterDiscreteOutput(project.hwp[0].read.comp_s.minus.bit.ch3, 244);//
setRegisterDiscreteOutput(project.hwp[0].read.comp_s.minus.bit.ch4, 245);//
setRegisterDiscreteOutput(project.hwp[0].read.comp_s.minus.bit.ch5, 246);//
setRegisterDiscreteOutput(project.hwp[0].read.comp_s.minus.bit.ch6, 247);//
setRegisterDiscreteOutput(project.hwp[0].read.comp_s.minus.bit.ch7, 248);//
setRegisterDiscreteOutput(project.hwp[0].read.comp_s.minus.bit.ch8, 250);//
setRegisterDiscreteOutput(project.hwp[0].read.comp_s.minus.bit.ch10, 251);//
setRegisterDiscreteOutput(project.hwp[0].read.comp_s.minus.bit.ch11, 252);//
setRegisterDiscreteOutput(project.hwp[0].read.comp_s.minus.bit.ch12, 253);//
setRegisterDiscreteOutput(project.hwp[0].read.comp_s.minus.bit.ch13, 254);//
setRegisterDiscreteOutput(project.hwp[0].read.comp_s.minus.bit.ch14, 255);//
setRegisterDiscreteOutput(project.hwp[0].read.comp_s.minus.bit.ch15, 256);//
////////////////////
setRegisterDiscreteOutput(edrk.errors.e8.bits.LOSS_INPUT_A1B1, 257);//
setRegisterDiscreteOutput(edrk.errors.e8.bits.LOSS_INPUT_B1C1, 258);//
setRegisterDiscreteOutput(edrk.errors.e8.bits.LOSS_INPUT_A2B2, 259);//
setRegisterDiscreteOutput(edrk.errors.e8.bits.LOSS_INPUT_B2C2, 260);//
setRegisterDiscreteOutput(edrk.errors.e8.bits.LOW_FREQ_50HZ, 261);//
setRegisterDiscreteOutput(edrk.warnings.e8.bits.LOW_FREQ_50HZ, 262);//
setRegisterDiscreteOutput(edrk.errors.e7.bits.READ_OPTBUS || edrk.errors.e7.bits.WRITE_OPTBUS, 263);//
setRegisterDiscreteOutput(edrk.errors.e7.bits.MASTER_SLAVE_SYNC, 264); //
setRegisterDiscreteOutput(edrk.errors.e6.bits.ERR_SBUS, 265);//
setRegisterDiscreteOutput(edrk.errors.e6.bits.ERR_PBUS, 266);//
setRegisterDiscreteOutput(edrk.errors.e6.bits.ER_DISBAL_BATT, 267);//
setRegisterDiscreteOutput(edrk.errors.e6.bits.QTV_ERROR_NOT_U, 268);//
setRegisterDiscreteOutput(edrk.errors.e6.bits.ERROR_PRE_CHARGE_U, 269);//
setRegisterDiscreteOutput(edrk.errors.e8.bits.U_IN_20_PROCENTS_HIGH, 270);//
setRegisterDiscreteOutput(edrk.errors.e8.bits.U_IN_10_PROCENTS_LOW, 271);//
setRegisterDiscreteOutput(edrk.errors.e8.bits.U_IN_20_PROCENTS_LOW, 272);//
////////////////
setRegisterDiscreteOutput(project.cds_tk[0].read.sbus.lock_status_error.bit.err_power, 273);//
setRegisterDiscreteOutput(project.cds_tk[1].read.sbus.lock_status_error.bit.err_power, 274);//
setRegisterDiscreteOutput(project.cds_tk[2].read.sbus.lock_status_error.bit.err_power, 275);//
setRegisterDiscreteOutput(project.cds_tk[3].read.sbus.lock_status_error.bit.err_power, 276);//
setRegisterDiscreteOutput(project.cds_in[0].read.sbus.lock_status_error.bit.err_power, 277);//
setRegisterDiscreteOutput(project.cds_in[1].read.sbus.lock_status_error.bit.err_power, 278);//
setRegisterDiscreteOutput(project.cds_out[0].read.sbus.lock_status_error.bit.err_power, 279);//
setRegisterDiscreteOutput(edrk.errors.e7.bits.NOT_VALID_CONTROL_STATION, 280);//
////////////////
setRegisterDiscreteOutput(edrk.errors.e8.bits.LOSS_OUTPUT_U1, 281);//
setRegisterDiscreteOutput(edrk.errors.e8.bits.LOSS_OUTPUT_V1, 282);//
setRegisterDiscreteOutput(edrk.errors.e8.bits.LOSS_OUTPUT_W1, 283);//
setRegisterDiscreteOutput(edrk.errors.e8.bits.LOSS_OUTPUT_U2, 284);//
setRegisterDiscreteOutput(edrk.errors.e8.bits.LOSS_OUTPUT_V2, 285);//
setRegisterDiscreteOutput(edrk.errors.e8.bits.LOSS_OUTPUT_W2, 286);//
setRegisterDiscreteOutput(edrk.errors.e8.bits.DISBALANCE_IM1_IM2, 287);//
setRegisterDiscreteOutput(edrk.errors.e7.bits.VERY_FAST_GO_0to1, 288);//
////////////////
setRegisterDiscreteOutput(project.cds_tk[0].read.sbus.lock_status_error.bit.err_switch, 289);//
setRegisterDiscreteOutput(project.cds_tk[1].read.sbus.lock_status_error.bit.err_switch, 290);//
setRegisterDiscreteOutput(project.cds_tk[2].read.sbus.lock_status_error.bit.err_switch, 291);//
setRegisterDiscreteOutput(project.cds_tk[3].read.sbus.lock_status_error.bit.err_switch, 292);//
setRegisterDiscreteOutput(project.cds_in[0].read.sbus.lock_status_error.bit.err_switch, 293);//
setRegisterDiscreteOutput(project.cds_in[1].read.sbus.lock_status_error.bit.err_switch, 294);//
setRegisterDiscreteOutput(project.cds_out[0].read.sbus.lock_status_error.bit.err_switch, 295);//
setRegisterDiscreteOutput(project.adc[0].read.sbus.lock_status_error.bit.err_switch, 296);//
setRegisterDiscreteOutput(project.adc[1].read.sbus.lock_status_error.bit.err_switch, 298);//
////////////////
setRegisterDiscreteOutput(edrk.warnings.e2.bits.T_UO1_MAX, 305);//
setRegisterDiscreteOutput(edrk.warnings.e2.bits.T_UO2_MAX, 306);//
setRegisterDiscreteOutput(edrk.warnings.e2.bits.T_UO3_MAX, 307);//
setRegisterDiscreteOutput(edrk.warnings.e2.bits.T_UO4_MAX, 308);//
setRegisterDiscreteOutput(edrk.warnings.e2.bits.T_UO5_MAX, 309);//
setRegisterDiscreteOutput(edrk.warnings.e2.bits.T_UO6_MAX, 310);//
setRegisterDiscreteOutput(edrk.warnings.e2.bits.T_UO7_MAX, 311);//
setRegisterDiscreteOutput(edrk.errors.e2.bits.T_UO1_MAX, 312);//
setRegisterDiscreteOutput(edrk.errors.e2.bits.T_UO2_MAX, 313);//
setRegisterDiscreteOutput(edrk.errors.e2.bits.T_UO3_MAX, 314);//
setRegisterDiscreteOutput(edrk.errors.e2.bits.T_UO4_MAX, 315);//
setRegisterDiscreteOutput(edrk.errors.e2.bits.T_UO5_MAX, 316);//
setRegisterDiscreteOutput(edrk.errors.e2.bits.T_UO6_MAX, 317);//
setRegisterDiscreteOutput(edrk.errors.e2.bits.T_UO7_MAX, 318);//
/////////////////////
setRegisterDiscreteOutput(edrk.warnings.e7.bits.READ_OPTBUS || edrk.warnings.e7.bits.WRITE_OPTBUS, 321);//
setRegisterDiscreteOutput(edrk.warnings.e7.bits.MASTER_SLAVE_SYNC, 322);//
setRegisterDiscreteOutput(edrk.errors.e6.bits.ERROR_PRE_CHARGE_ANSWER, 323);//
setRegisterDiscreteOutput(edrk.warnings.e1.bits.NO_INPUT_SYNC_SIGNAL, 324);//
setRegisterDiscreteOutput(edrk.errors.e1.bits.NO_INPUT_SYNC_SIGNAL, 325);//
setRegisterDiscreteOutput(edrk.errors.e3.bits.ERR_INT_PWM_LONG
|| edrk.errors.e9.bits.ERR_PWM_WDOG
|| edrk.errors.e9.bits.ERR_INT_PWM_VERY_LONG, 326);//
setRegisterDiscreteOutput(edrk.errors.e5.bits.T_VIPR_MAX, 336);
setRegisterDiscreteOutput(edrk.errors.e2.bits.T_AIR0_MAX, 337);
setRegisterDiscreteOutput(edrk.errors.e2.bits.T_AIR1_MAX, 338);
setRegisterDiscreteOutput(edrk.errors.e2.bits.T_AIR2_MAX, 339);
setRegisterDiscreteOutput(edrk.errors.e2.bits.T_AIR3_MAX, 340);
setRegisterDiscreteOutput(edrk.warnings.e10.bits.T_BSU_Sensor_BK1, 341);
setRegisterDiscreteOutput(edrk.errors.e10.bits.T_BSU_Sensor_BK1, 342);
setRegisterDiscreteOutput(edrk.warnings.e10.bits.T_BSU_Sensor_BK2, 343);
setRegisterDiscreteOutput(edrk.errors.e10.bits.T_BSU_Sensor_BK2, 344);
//////
setRegisterDiscreteOutput(edrk.errors.e2.bits.T_WATER_EXT_MAX, 345);//
setRegisterDiscreteOutput(edrk.errors.e2.bits.T_WATER_INT_MAX, 346);//
setRegisterDiscreteOutput(edrk.warnings.e2.bits.T_WATER_EXT_MAX, 347);//
setRegisterDiscreteOutput(edrk.warnings.e2.bits.T_WATER_INT_MAX, 348);//
setRegisterDiscreteOutput(edrk.errors.e7.bits.T_ACDRIVE_BEAR_MAX_DNE, 349);//
setRegisterDiscreteOutput(edrk.errors.e9.bits.T_ACDRIVE_BEAR_MAX_NE, 350);//
setRegisterDiscreteOutput(edrk.warnings.e7.bits.T_ACDRIVE_BEAR_MAX_DNE, 351);//
setRegisterDiscreteOutput(edrk.warnings.e9.bits.T_ACDRIVE_BEAR_MAX_NE, 352);//
//////////////
setRegisterDiscreteOutput(edrk.errors.e10.bits.T_ACDRIVE_WINDING_U1, 353);//
setRegisterDiscreteOutput(edrk.errors.e10.bits.T_ACDRIVE_WINDING_V1, 354);//
setRegisterDiscreteOutput(edrk.errors.e10.bits.T_ACDRIVE_WINDING_W1, 355);//
setRegisterDiscreteOutput(edrk.errors.e10.bits.T_ACDRIVE_WINDING_U2, 356);//
setRegisterDiscreteOutput(edrk.errors.e10.bits.T_ACDRIVE_WINDING_V2, 357);//
setRegisterDiscreteOutput(edrk.errors.e10.bits.T_ACDRIVE_WINDING_W2, 358);//
setRegisterDiscreteOutput(edrk.warnings.e10.bits.T_ACDRIVE_WINDING_U1, 359);//
setRegisterDiscreteOutput(edrk.warnings.e10.bits.T_ACDRIVE_WINDING_V1, 360);//
setRegisterDiscreteOutput(edrk.warnings.e10.bits.T_ACDRIVE_WINDING_W1, 361);//
setRegisterDiscreteOutput(edrk.warnings.e10.bits.T_ACDRIVE_WINDING_U2, 362);//
setRegisterDiscreteOutput(edrk.warnings.e10.bits.T_ACDRIVE_WINDING_V2, 363);//
setRegisterDiscreteOutput(edrk.warnings.e10.bits.T_ACDRIVE_WINDING_W2, 364);//
////////////////////
setRegisterDiscreteOutput(edrk.errors.e2.bits.P_WATER_INT_MAX, 369);//
setRegisterDiscreteOutput(edrk.errors.e2.bits.P_WATER_INT_MIN, 370);//
setRegisterDiscreteOutput(edrk.warnings.e2.bits.P_WATER_INT_MAX, 371);//
setRegisterDiscreteOutput(edrk.warnings.e2.bits.P_WATER_INT_MIN, 372);//
setRegisterDiscreteOutput(edrk.warnings.e5.bits.PUMP_1, 373);//
setRegisterDiscreteOutput(edrk.warnings.e5.bits.PUMP_2, 374);//
////
setRegisterDiscreteOutput(edrk.errors.e11.bits.ERROR_PUMP_ON_SBOR, 385);
setRegisterDiscreteOutput(edrk.errors.e11.bits.ERROR_RESTART_PUMP_1_ON_SBOR, 386);
setRegisterDiscreteOutput(edrk.errors.e11.bits.ERROR_RESTART_PUMP_2_ON_SBOR, 387);
setRegisterDiscreteOutput(edrk.errors.e11.bits.ERROR_RESTART_PUMP_ALL_ON_SBOR, 388);
setRegisterDiscreteOutput(edrk.errors.e11.bits.ERROR_PRED_ZARYAD, 389);
setRegisterDiscreteOutput(edrk.errors.e11.bits.ERROR_PRED_ZARYAD_AFTER, 390);
setRegisterDiscreteOutput(edrk.errors.e11.bits.ERROR_READY_UMP_BEFORE_QTV, 391);
setRegisterDiscreteOutput(edrk.errors.e11.bits.ERROR_STATUS_QTV, 392);
setRegisterDiscreteOutput(edrk.errors.e11.bits.ERROR_UMP_ON_AFTER, 393);
setRegisterDiscreteOutput(edrk.errors.e11.bits.ERROR_UMP_NOT_ON, 394);
setRegisterDiscreteOutput(edrk.errors.e11.bits.ERROR_UMP_NOT_OFF, 395);
setRegisterDiscreteOutput(edrk.errors.e11.bits.ERROR_RASCEPITEL_WAIT_CMD, 396);
setRegisterDiscreteOutput(edrk.errors.e11.bits.ERROR_RASCEPITEL_ON_AFTER, 397);
setRegisterDiscreteOutput(edrk.errors.e11.bits.ERROR_DISABLE_SBOR, 398);
setRegisterDiscreteOutput(edrk.errors.e11.bits.ERROR_VERY_LONG_SBOR, 399);
setRegisterDiscreteOutput(edrk.errors.e11.bits.ERROR_CONTROLLER_BUS, 400);
setRegisterDiscreteOutput(edrk.warnings.e9.bits.BREAK_TEMPER_WARNING, 417);//
setRegisterDiscreteOutput(edrk.warnings.e9.bits.BREAK_TEMPER_ALARM, 418);//
setRegisterDiscreteOutput(edrk.warnings.e9.bits.BREAKER_GED_ON, 419);//
//////////////////
if (edrk.Mode_ScalarVectorUFConst == ALG_MODE_FOC_POWER ||
edrk.Mode_ScalarVectorUFConst == ALG_MODE_SCALAR_POWER) {
setRegisterDiscreteOutput(1, 520);
} else {
setRegisterDiscreteOutput(0, 520);
}
// setRegisterDiscreteOutput(TODO ���������� ���, 546);//
setRegisterDiscreteOutput(!edrk.from_ing1.bits.UPC_24V_NORMA, 546);//
setRegisterDiscreteOutput(edrk.from_ing2.bits.SOST_ZAMKA, 547);//
setRegisterDiscreteOutput(edrk.from_shema_filter.bits.READY_UMP, 548);//
////////////////
}
void update_tables_HMI_analog(void)
{
int power_kw_full;
int power_kw;
int oborots;
Inverter_state state;
static int nn=0, ss=0, pl = 0;
// static int prev_edrk_KVITIR=0;
int i,status;
// static int check = 0;
hmi_watch_dog = !hmi_watch_dog; //was transmitted, need to change
//log_to_HMI.send_log = modbus_table_analog_in[7].all;
//setRegisterDiscreteOutput(log_to_HMI.flag_log_array_ready_sent, 310);
// setRegisterDiscreteOutput(ss, nn);
// ��� �������� ������ ������
modbus_table_analog_out[4].all++;// = ++check;
// test
// setRegisterDiscreteOutput(1, 293);
// setRegisterDiscreteOutput(1, 294);
////////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////
if (edrk.summ_errors)
{
modbus_table_analog_out[1].all = 6; // ������
modbus_table_analog_out[2].all = 3; // red
}
else
{
if (edrk.SumSbor || edrk.Status_Ready.bits.ImitationReady2)
{
if (edrk.Status_Ready.bits.ready_final)
{
//modbus_table_analog_out[2].all = 1; // green
if (edrk.Go)
{
modbus_table_analog_out[1].all = 3; // ���
if (edrk.Provorot)
modbus_table_analog_out[1].all = 12; // �������� = 11
}
else
modbus_table_analog_out[1].all = 2; // ready2
}
else
modbus_table_analog_out[1].all = 4; // building
}
else
{
if (edrk.Status_Ready.bits.ready1)
modbus_table_analog_out[1].all = 1; // ready1
else
modbus_table_analog_out[1].all = 0; // waiting
}
if (edrk.RazborNotFinish)
modbus_table_analog_out[1].all = 11; // ������
if (edrk.Status_Perehod_Rascepitel==1 && edrk.cmd_to_rascepitel==1)
modbus_table_analog_out[1].all = 7; // ����������� �������
if (edrk.Status_Perehod_Rascepitel==1 && edrk.cmd_to_rascepitel==0)
modbus_table_analog_out[1].all = 8; // ���������� �������
if (edrk.RunZahvatRascepitel)
modbus_table_analog_out[1].all = 9; // ������ �� ����������� = 9
if (edrk.RunUnZahvatRascepitel)
modbus_table_analog_out[1].all = 10; // ������ �� ���������� = 10
//
//modbus_table_analog_out[1].all = 5; // �������������
if (modbus_table_analog_out[1].all == 1)
modbus_table_analog_out[2].all = 0; // gray
else
if (modbus_table_analog_out[1].all == 3 ||
modbus_table_analog_out[1].all == 12 ||
modbus_table_analog_out[1].all == 2)
modbus_table_analog_out[2].all = 1; // green
else
{
if (modbus_table_analog_out[2].all==0)
modbus_table_analog_out[2].all = 1; // green
else
modbus_table_analog_out[2].all = 0; // gray
}
}
if (edrk.errors.e6.bits.QTV_ERROR_NOT_ANSWER || edrk.errors.e6.bits.QTV_ERROR_NOT_U)
{
modbus_table_analog_out[10].all = 3;
modbus_table_analog_out[11].all = 3;
}
else
{
if (edrk.from_shema_filter.bits.QTV_ON_OFF)
{
modbus_table_analog_out[10].all = 1;
modbus_table_analog_out[11].all = 1;
}
else
{
modbus_table_analog_out[10].all = 0;
modbus_table_analog_out[11].all = 0;
}
}
if (edrk.from_ing1.bits.VIPR_PREDOHR_NORMA==1)
{
if (edrk.from_shema_filter.bits.QTV_ON_OFF==1)
modbus_table_analog_out[12].all = 1;
else
modbus_table_analog_out[12].all = 0;
}
else
modbus_table_analog_out[12].all = 3;
if (edrk.errors.e6.bits.UO1_KEYS || edrk.errors.e1.bits.I_BREAK_1_MAX || edrk.errors.e1.bits.I_BREAK_2_MAX || edrk.errors.e2.bits.T_UO1_MAX)
modbus_table_analog_out[13].all = 3;
else
if (edrk.warnings.e2.bits.T_UO1_MAX)
modbus_table_analog_out[13].all = 2;
else
modbus_table_analog_out[13].all = 1;
if (edrk.errors.e6.bits.UO2_KEYS || edrk.errors.e1.bits.I_UO2_MAX || edrk.errors.e2.bits.T_UO2_MAX)
modbus_table_analog_out[14].all = 3;
else
if (edrk.warnings.e2.bits.T_UO2_MAX)
modbus_table_analog_out[14].all = 2;
else
modbus_table_analog_out[14].all = 1;
if (edrk.errors.e6.bits.UO3_KEYS || edrk.errors.e1.bits.I_UO3_MAX || edrk.errors.e2.bits.T_UO3_MAX)
modbus_table_analog_out[15].all = 3;
else
if (edrk.warnings.e2.bits.T_UO3_MAX)
modbus_table_analog_out[15].all = 2;
else
modbus_table_analog_out[15].all = 1;
if (edrk.errors.e6.bits.UO4_KEYS || edrk.errors.e1.bits.I_UO4_MAX || edrk.errors.e2.bits.T_UO4_MAX)
modbus_table_analog_out[16].all = 3;
else
if (edrk.warnings.e2.bits.T_UO4_MAX)
modbus_table_analog_out[16].all = 2;
else
modbus_table_analog_out[16].all = 1;
if (edrk.errors.e6.bits.UO5_KEYS || edrk.errors.e1.bits.I_UO5_MAX || edrk.errors.e2.bits.T_UO5_MAX)
modbus_table_analog_out[17].all = 3;
else
if (edrk.warnings.e2.bits.T_UO5_MAX)
modbus_table_analog_out[17].all = 2;
else
modbus_table_analog_out[17].all = 1;
if (edrk.errors.e6.bits.UO6_KEYS || edrk.errors.e1.bits.I_UO6_MAX || edrk.errors.e2.bits.T_UO6_MAX)
modbus_table_analog_out[18].all = 3;
else
if (edrk.warnings.e2.bits.T_UO6_MAX)
modbus_table_analog_out[18].all = 2;
else
modbus_table_analog_out[18].all = 1;
if (edrk.errors.e6.bits.UO7_KEYS || edrk.errors.e1.bits.I_UO7_MAX || edrk.errors.e2.bits.T_UO7_MAX)
modbus_table_analog_out[19].all = 3;
else
if (edrk.warnings.e2.bits.T_UO7_MAX)
modbus_table_analog_out[19].all = 2;
else
modbus_table_analog_out[19].all = 1;
// motor_state
if (edrk.errors.e10.bits.T_ACDRIVE_WINDING_U1 || edrk.errors.e10.bits.T_ACDRIVE_WINDING_V1 ||
edrk.errors.e10.bits.T_ACDRIVE_WINDING_W1 || edrk.errors.e10.bits.T_ACDRIVE_WINDING_U2 ||
edrk.errors.e10.bits.T_ACDRIVE_WINDING_V2 || edrk.errors.e10.bits.T_ACDRIVE_WINDING_W2 ||
edrk.errors.e7.bits.T_ACDRIVE_BEAR_MAX_DNE || edrk.errors.e9.bits.T_ACDRIVE_BEAR_MAX_NE) {
modbus_table_analog_out[20].all = 3;
} else if (edrk.warnings.e10.bits.T_ACDRIVE_WINDING_U1 || edrk.warnings.e10.bits.T_ACDRIVE_WINDING_V1 ||
edrk.warnings.e10.bits.T_ACDRIVE_WINDING_W1 || edrk.warnings.e10.bits.T_ACDRIVE_WINDING_U2 ||
edrk.warnings.e10.bits.T_ACDRIVE_WINDING_V2 || edrk.warnings.e10.bits.T_ACDRIVE_WINDING_W2 ||
edrk.warnings.e7.bits.T_ACDRIVE_BEAR_MAX_DNE || edrk.warnings.e9.bits.T_ACDRIVE_BEAR_MAX_NE
|| edrk.power_limit.all
) {
modbus_table_analog_out[20].all = 2;
} else {
modbus_table_analog_out[20].all = 1;
}
// ump state
if (edrk.from_ing1.bits.ZARYAD_ON || edrk.from_shema_filter.bits.UMP_ON_OFF)
{
modbus_table_analog_out[21].all = 1; //green
}
else
{
if (edrk.errors.e7.bits.ERROR_SBOR_SHEMA || edrk.errors.e5.bits.ERROR_PRE_CHARGE_ON ||
edrk.errors.e6.bits.ERROR_PRE_CHARGE_ANSWER || edrk.errors.e6.bits.ERROR_PRE_CHARGE_U || edrk.errors.e7.bits.UMP_NOT_READY)
modbus_table_analog_out[21].all = 3; // alarm
else
if (edrk.warnings.e7.bits.UMP_NOT_READY)
modbus_table_analog_out[21].all = 2; //fault
else
{
if (edrk.Stage_Sbor == STAGE_SBOR_STATUS_UMP_ON && edrk.SumSbor)
{
if (modbus_table_analog_out[21].all==0)
modbus_table_analog_out[21].all = 1; //green
else
modbus_table_analog_out[21].all = 0; //gray
}
else
modbus_table_analog_out[21].all = 0;
}
}
modbus_table_analog_out[30].all = fast_round_with_limiter(_IQtoF(filter.iqUin_m1)*NORMA_ACP/1.41, LIMITER_U_I_PULT);
modbus_table_analog_out[31].all = fast_round_with_limiter(_IQtoF(filter.iqUin_m2)*NORMA_ACP/1.41, LIMITER_U_I_PULT);
// if (edrk.Status_Ready.bits.ready_final==0)
// {
// modbus_table_analog_out[32].all = edrk.Stage_Sbor;
// modbus_table_analog_out[33].all = edrk.Sbor_Mode;//_IQtoF(analog.iqIin_1)*NORMA_ACP;
// }
// else
// {
modbus_table_analog_out[32].all = fast_round_with_limiter(_IQtoF(analog.iqIin_1)*NORMA_ACP, LIMITER_U_I_PULT);
modbus_table_analog_out[33].all = fast_round_with_limiter(_IQtoF(analog.iqIin_2)*NORMA_ACP, LIMITER_U_I_PULT);
// }
// modbus_table_analog_out[34].all = _IQtoF(filter.iqU_1_long)*NORMA_ACP;
modbus_table_analog_out[35].all = fast_round_with_limiter(_IQtoF(filter.iqU_2_long)*NORMA_ACP, LIMITER_U_I_PULT);
modbus_table_analog_out[34].all = fast_round_with_limiter(_IQtoF(filter.iqU_1_long)*NORMA_ACP, LIMITER_U_I_PULT);
modbus_table_analog_out[36].all = fast_round_with_limiter(_IQtoF(analog.iqIbreak_1+analog.iqIbreak_2)*NORMA_ACP, LIMITER_U_I_PULT);//Ibreak
// modbus_table_analog_out[37].all = fast_round(_IQtoF(analog.iqIu_1_rms)*NORMA_ACP);
// modbus_table_analog_out[38].all = fast_round(_IQtoF(analog.iqIv_1_rms)*NORMA_ACP);
// modbus_table_analog_out[39].all = fast_round(_IQtoF(analog.iqIw_1_rms)*NORMA_ACP);
//
// modbus_table_analog_out[40].all = fast_round(_IQtoF(analog.iqIu_2_rms)*NORMA_ACP);
// modbus_table_analog_out[41].all = fast_round(_IQtoF(analog.iqIv_2_rms)*NORMA_ACP);
// modbus_table_analog_out[42].all = fast_round(_IQtoF(analog.iqIw_2_rms)*NORMA_ACP);
modbus_table_analog_out[37].all = //fast_round(_IQtoF(filter.iqIm_1)*NORMA_ACP_RMS);
modbus_table_analog_out[38].all = //fast_round(_IQtoF(filter.iqIm_1)*NORMA_ACP_RMS);
modbus_table_analog_out[39].all = fast_round_with_limiter(_IQtoF(filter.iqIm_1)*NORMA_ACP_RMS, LIMITER_U_I_PULT);
modbus_table_analog_out[40].all = //fast_round(_IQtoF(filter.iqIm_2)*NORMA_ACP_RMS);
modbus_table_analog_out[41].all = //fast_round(_IQtoF(filter.iqIm_2)*NORMA_ACP_RMS);
modbus_table_analog_out[42].all = fast_round_with_limiter(_IQtoF(filter.iqIm_2)*NORMA_ACP_RMS, LIMITER_U_I_PULT);
// if (edrk.flag_second_PCH == 0) {
// modbus_table_analog_out[43].all = modbus_table_analog_out[44].all = fast_round(_IQtoF(filter.iqIm_1 + filter.iqIm_2)*NORMA_ACP_RMS);
// //modbus_table_analog_out[44].all = fast_round(_IQtoF(filter.iqIm_1 + filter.iqIm_2)*NORMA_ACP_RMS);
// } else {
// modbus_table_analog_out[43].all = modbus_table_analog_out[44].all = fast_round(_IQtoF(filter.iqIm_1 + filter.iqIm_2)*NORMA_ACP_RMS);
// //modbus_table_analog_out[44].all = fast_round(_IQtoF(filter.iqIm_1 + filter.iqIm_2)*NORMA_ACP_RMS);
// }
modbus_table_analog_out[43].all = modbus_table_analog_out[44].all = fast_round_with_limiter(_IQtoF(filter.iqIm_1 + filter.iqIm_2)*NORMA_ACP_RMS, LIMITER_U_I_PULT);
modbus_table_analog_out[45].all = 0; //edrk.I_zad_vozbud_exp;
// modbus_table_analog_out[4].all = control_station.active_array_cmd[CONTROL_STATION_CMD_SET_ROTOR];
// modbus_table_analog_out[5].all = control_station.active_array_cmd[CONTROL_STATION_CMD_SET_POWER];
//#if (_FLOOR6__)
// power_kw_full = edrk.power_kw_full;
// power_kw = edrk.power_kw;
// oborots = edrk.oborots;
//
// if (edrk.oborots)
// oborots = edrk.oborots;
// else
// oborots = edrk.zadanie.oborots_zad;
//
//
// if (edrk.Mode_ScalarVectorUFConst==ALG_MODE_SCALAR_OBOROTS
// || (edrk.Mode_ScalarVectorUFConst==ALG_MODE_FOC_OBOROTS)
// || (edrk.Mode_ScalarVectorUFConst==ALG_MODE_UF_CONST)
// ) // oborots
// {
// power_kw_full = (edrk.zadanie.oborots_zad)*50;
// power_kw = (edrk.zadanie.oborots_zad)*25;
// }
// else
// {
// oborots = edrk.zadanie.power_zad/25;
//// modbus_table_analog_out[48].all = abs(edrk.zadanie.power_zad);
// }
//
//
//
//
//
//#else
power_kw_full = fast_round_with_limiter(edrk.power_kw_full, LIMITER_U_I_PULT);
power_kw = edrk.power_kw;
oborots = edrk.oborots;
//#endif
if (edrk.Mode_ScalarVectorUFConst==ALG_MODE_UF_CONST) // UFCONST
{
modbus_table_analog_out[47].all = 0;//fast_round(edrk.zadanie.fzad*100.0); //������� ��������� ��������
modbus_table_analog_out[46].all = 0; //�������� ��������� ��������
}
else
if (edrk.Mode_ScalarVectorUFConst==ALG_MODE_SCALAR_OBOROTS) // scalar oborots
{
modbus_table_analog_out[47].all = edrk.zadanie.oborots_zad; //������� ��������� ��������
if (oborots>=0)
modbus_table_analog_out[46].all = power_kw_full; //�������� ���� ������� ���������
else
modbus_table_analog_out[46].all = -power_kw_full; //�������� ��������� ��������
}
else
if (edrk.Mode_ScalarVectorUFConst==ALG_MODE_SCALAR_POWER) // scalar power
{
modbus_table_analog_out[47].all = oborots; //������� ��������� ��������
modbus_table_analog_out[46].all = edrk.zadanie.power_zad; //�������� ��������� ��������
}
else
if (edrk.Mode_ScalarVectorUFConst==ALG_MODE_FOC_OBOROTS) // foc oborots
{
modbus_table_analog_out[47].all = edrk.zadanie.oborots_zad; //������� ��������� ��������
if (oborots>=0)
modbus_table_analog_out[46].all = power_kw_full; //�������� ���� ������� ���������
else
modbus_table_analog_out[46].all = -power_kw_full; //�������� ��������� ��������
// modbus_table_analog_out[46].all = 0; //�������� ��������� ��������
}
else
if (edrk.Mode_ScalarVectorUFConst==ALG_MODE_FOC_POWER) // foc power
{
modbus_table_analog_out[47].all = oborots; //������� ��������� ��������
modbus_table_analog_out[46].all = edrk.zadanie.power_zad; //�������� ��������� ��������
}
else
{
modbus_table_analog_out[46].all = 0;//-1; //�������� ��������� ��������
modbus_table_analog_out[47].all = 0;//-1; //������� ��������� ��������
}
//#if (_FLOOR6___)
// if (edrk.Mode_ScalarVectorUFConst==ALG_MODE_SCALAR_OBOROTS
// || (edrk.Mode_ScalarVectorUFConst==ALG_MODE_FOC_OBOROTS)
// || (edrk.Mode_ScalarVectorUFConst==ALG_MODE_UF_CONST)
// ) // oborots
// {
// // �������� �������� ��� �����
// if (edrk.oborots == 0)
// {
// if (edrk.zadanie.oborots_zad>0)
// modbus_table_analog_out[49].all = edrk.zadanie.oborots_zad - 1;
// else if (edrk.zadanie.oborots_zad<0)
// modbus_table_analog_out[49].all = edrk.zadanie.oborots_zad + 1;
// else
// modbus_table_analog_out[49].all = 0;
//
// }
// else
// {
// modbus_table_analog_out[49].all = edrk.oborots; // ������� �������
// }
//
// if (edrk.zadanie.oborots_zad<0)
// modbus_table_analog_out[48].all = -(edrk.zadanie.oborots_zad)*25; //�������� ��������� ������� ���
// else
// modbus_table_analog_out[48].all = (edrk.zadanie.oborots_zad)*25; //�������� ��������� ������� ���
//
// }
// else
// {
// modbus_table_analog_out[49].all = edrk.zadanie.power_zad/25;
// modbus_table_analog_out[48].all = abs(edrk.zadanie.power_zad);
// }
//
// modbus_table_analog_out[5].all = abs(power_kw*2);//power_kw_full; //�������� ���� ������� ���������
//#else
modbus_table_analog_out[48].all = abs(power_kw); //�������� ��������� ������� ���
modbus_table_analog_out[49].all = oborots; // ������� �������
modbus_table_analog_out[5].all = abs(power_kw_full); //�������� ���� ������� ���������
modbus_table_analog_out[6].all = fast_round(_IQtoF(edrk.zadanie.iq_limit_power_zad_rmp)*NORMA_ACP*NORMA_ACP/1000.0);//abs(power_kw_full); //�������� ���� ������� ���������
//#endif
// modbus_table_analog_out[48].all = fast_round(_IQtoF((filter.Power) * NORMA_ACP * NORMA_ACP) / 1000.0); //�������� ��������� ������� ���
for (i=0;i<2;i++)
modbus_table_analog_out[50+i].all = fast_round_with_delta(modbus_table_analog_out[50+i].all, edrk.temper_edrk.real_int_temper_water[i]/10.0, 1);
modbus_table_analog_out[52].all = fast_round_with_delta(modbus_table_analog_out[52].all, edrk.p_water_edrk.filter_real_int_p_water[0]/10.0, 1);
for (i=0;i<6;i++)
modbus_table_analog_out[53+i].all = fast_round_with_delta(modbus_table_analog_out[53+i].all, edrk.temper_edrk.real_int_temper_u[1+i]/10.0, 1);
modbus_table_analog_out[59].all = fast_round_with_delta(modbus_table_analog_out[59].all, edrk.temper_edrk.real_int_temper_u[0]/10.0, 1);
for (i=0;i<4;i++)
modbus_table_analog_out[60+i].all = fast_round_with_delta(modbus_table_analog_out[60+i].all, edrk.temper_edrk.real_int_temper_air[i]/10.0, 1);
modbus_table_analog_out[8].all = fast_round_with_delta(modbus_table_analog_out[8].all, edrk.temper_edrk.max_real_int_temper_u/10.0, 1);
if (edrk.errors.e2.bits.T_AIR0_MAX)
modbus_table_analog_out[64].all = 3;
else
if (edrk.warnings.e2.bits.T_AIR0_MAX)
modbus_table_analog_out[64].all = 2;
else
modbus_table_analog_out[64].all = 1;
if (edrk.errors.e2.bits.T_AIR1_MAX)
modbus_table_analog_out[65].all = 3;
else
if (edrk.warnings.e2.bits.T_AIR1_MAX)
modbus_table_analog_out[65].all = 2;
else
modbus_table_analog_out[65].all = 1;
if (edrk.errors.e2.bits.T_AIR2_MAX)
modbus_table_analog_out[66].all = 3;
else
if (edrk.warnings.e2.bits.T_AIR2_MAX)
modbus_table_analog_out[66].all = 2;
else
modbus_table_analog_out[66].all = 1;
if (edrk.errors.e2.bits.T_AIR3_MAX)
modbus_table_analog_out[67].all = 3;
else
if (edrk.warnings.e2.bits.T_AIR3_MAX)
modbus_table_analog_out[67].all = 2;
else
modbus_table_analog_out[67].all = 1;
if (edrk.auto_master_slave.local.bits.master)
modbus_table_analog_out[68].all = 0; // master salve
else
if (edrk.auto_master_slave.local.bits.slave)
modbus_table_analog_out[68].all = 1; // master salve
else
if (edrk.auto_master_slave.local.bits.try_master)
modbus_table_analog_out[68].all = 3; // master salve
else
if (edrk.errors.e7.bits.AUTO_SET_MASTER)
modbus_table_analog_out[68].all = 4; // master salve
else
modbus_table_analog_out[68].all = 2; // master salve
for (i=0;i<6;i++)
modbus_table_analog_out[69+i].all = fast_round(edrk.temper_acdrive.winding.filter_real_temper[0+i]);
modbus_table_analog_out[9].all = fast_round(edrk.temper_acdrive.winding.max_real_int_temper/10.0);
modbus_table_analog_out[75].all = fast_round(edrk.temper_acdrive.bear.filter_real_temper[0]);
modbus_table_analog_out[76].all = fast_round(edrk.temper_acdrive.bear.filter_real_temper[1]);
modbus_table_analog_out[23].all = fast_round(edrk.temper_acdrive.bear.max_real_int_temper/10.0);
for (i=0;i<6;i++)
{
status = get_status_temper_acdrive_winding(i);
if (status==4)
modbus_table_analog_out[77+i].all = 3;
if (status==2)
modbus_table_analog_out[77+i].all = 2;
if (status==1)
modbus_table_analog_out[77+i].all = 1;
}
for (i=0;i<2;i++)
{
status = get_status_temper_acdrive_bear(i);
if (status==4)
modbus_table_analog_out[83+i].all = 3;
if (status==2)
modbus_table_analog_out[83+i].all = 2;
if (status==1)
modbus_table_analog_out[83+i].all = 1;
}
//UOM
modbus_table_analog_out[85].all = edrk.from_uom.level_value;
if (edrk.from_uom.ready==1)
{
if (edrk.from_uom.error)
modbus_table_analog_out[86].all = 1; // �������
else
{
if (edrk.from_uom.level_value==0)
modbus_table_analog_out[86].all = 2; // �������
else
{
if (edrk.power_limit.bits.limit_UOM || edrk.power_limit.bits.limit_from_uom_fast)
{
// ������� ������-�����
if (modbus_table_analog_out[86].all==0)
modbus_table_analog_out[86].all = 3; //������
else
modbus_table_analog_out[86].all = 0; //gray
}
else
modbus_table_analog_out[86].all = 3;
//modbus_table_analog_out[86].all = 3; // ������
}
}
}
else
modbus_table_analog_out[86].all = 0; // �����
// active control station
// CONTROL_STATION_TERMINAL_RS232 = 0, -
// CONTROL_STATION_TERMINAL_CAN, -
//
// CONTROL_STATION_INGETEAM_PULT_RS485, -
// CONTROL_STATION_MPU_SVU_CAN,
// CONTROL_STATION_MPU_KEY_CAN,
// CONTROL_STATION_MPU_SVU_RS485,
// CONTROL_STATION_MPU_KEY_RS485,
// CONTROL_STATION_ZADATCHIK_CAN,
// CONTROL_STATION_VPU_CAN,
modbus_table_analog_out[87].all = edrk.active_post_upravl;
// load procents
modbus_table_analog_out[88].all = 0; //error
// 0- �����, �������, ������, ������� - ���� ����� ���������� ��. [87].
if (modbus_table_analog_out[87].all == 10)
modbus_table_analog_out[89].all = 3; //red
else
modbus_table_analog_out[89].all = 1; //no error
/////////////////////////////
/////////////////////////////
if (edrk.warnings.e7.bits.READ_OPTBUS
&& edrk.warnings.e7.bits.WRITE_OPTBUS
&& edrk.warnings.e7.bits.MASTER_SLAVE_SYNC)
modbus_table_analog_out[90].all = 2; //warning
else
if (edrk.errors.e7.bits.READ_OPTBUS
|| edrk.errors.e7.bits.WRITE_OPTBUS
|| edrk.errors.e7.bits.MASTER_SLAVE_SYNC
|| edrk.errors.e1.bits.NO_INPUT_SYNC_SIGNAL)
modbus_table_analog_out[90].all = 3; //error
else
if (edrk.warnings.e7.bits.READ_OPTBUS
|| edrk.warnings.e7.bits.WRITE_OPTBUS
|| edrk.warnings.e7.bits.MASTER_SLAVE_SYNC
|| edrk.warnings.e1.bits.NO_INPUT_SYNC_SIGNAL)
modbus_table_analog_out[90].all = 5; //warning
else
if (edrk.ms.ready1==0)
modbus_table_analog_out[90].all = 1; //find
else
modbus_table_analog_out[90].all = 0; //ok
modbus_table_analog_out[91].all = protect_levels.abnormal_temper_acdrive_winding_U1 / 10;
modbus_table_analog_out[92].all = protect_levels.abnormal_temper_acdrive_winding_V1 / 10;
modbus_table_analog_out[93].all = protect_levels.abnormal_temper_acdrive_winding_W1 / 10;
modbus_table_analog_out[94].all = protect_levels.abnormal_temper_acdrive_winding_U2 / 10;
modbus_table_analog_out[95].all = protect_levels.abnormal_temper_acdrive_winding_V2 / 10;
modbus_table_analog_out[96].all = protect_levels.abnormal_temper_acdrive_winding_W2 / 10;
modbus_table_analog_out[97].all = protect_levels.abnormal_temper_acdrive_bear_DNE / 10;
modbus_table_analog_out[98].all = protect_levels.abnormal_temper_acdrive_bear_NE / 10;
modbus_table_analog_out[99].all = protect_levels.alarm_temper_acdrive_winding_U1 / 10;
modbus_table_analog_out[100].all = protect_levels.alarm_temper_acdrive_winding_V1 / 10;
modbus_table_analog_out[101].all = protect_levels.alarm_temper_acdrive_winding_W1 / 10;
modbus_table_analog_out[102].all = protect_levels.alarm_temper_acdrive_winding_U2 / 10;
modbus_table_analog_out[103].all = protect_levels.alarm_temper_acdrive_winding_V2 / 10;
modbus_table_analog_out[104].all = protect_levels.alarm_temper_acdrive_winding_W2 / 10;
modbus_table_analog_out[105].all = protect_levels.alarm_temper_acdrive_bear_DNE / 10;
modbus_table_analog_out[106].all = protect_levels.alarm_temper_acdrive_bear_NE / 10;
modbus_table_analog_out[107].all = protect_levels.abnormal_temper_u_01 / 10;
modbus_table_analog_out[108].all = protect_levels.abnormal_temper_u_02 / 10;
modbus_table_analog_out[109].all = protect_levels.abnormal_temper_u_03 / 10;
modbus_table_analog_out[110].all = protect_levels.abnormal_temper_u_04 / 10;
modbus_table_analog_out[111].all = protect_levels.abnormal_temper_u_05 / 10;
modbus_table_analog_out[112].all = protect_levels.abnormal_temper_u_06 / 10;
modbus_table_analog_out[113].all = protect_levels.abnormal_temper_u_07 / 10;
modbus_table_analog_out[114].all = protect_levels.alarm_temper_u_01 / 10;
modbus_table_analog_out[115].all = protect_levels.alarm_temper_u_02 / 10;
modbus_table_analog_out[116].all = protect_levels.alarm_temper_u_03 / 10;
modbus_table_analog_out[117].all = protect_levels.alarm_temper_u_04 / 10;
modbus_table_analog_out[118].all = protect_levels.alarm_temper_u_05 / 10;
modbus_table_analog_out[119].all = protect_levels.alarm_temper_u_06 / 10;
modbus_table_analog_out[120].all = protect_levels.alarm_temper_u_07 / 10;
modbus_table_analog_out[123].all = protect_levels.abnormal_temper_water_int / 10;
modbus_table_analog_out[124].all = protect_levels.abnormal_temper_water_ext / 10;
modbus_table_analog_out[125].all = protect_levels.alarm_p_water_min_int / 10;
modbus_table_analog_out[126].all = protect_levels.alarm_temper_water_int / 10;
modbus_table_analog_out[127].all = protect_levels.alarm_temper_water_ext / 10;
modbus_table_analog_out[128].all = protect_levels.alarm_p_water_max_int / 10;
modbus_table_analog_out[129].all = protect_levels.abnormal_temper_air_int_01 / 10;
modbus_table_analog_out[130].all = protect_levels.abnormal_temper_air_int_02 / 10;
modbus_table_analog_out[131].all = protect_levels.abnormal_temper_air_int_03 / 10;
modbus_table_analog_out[132].all = protect_levels.abnormal_temper_air_int_04 / 10;
modbus_table_analog_out[133].all = protect_levels.alarm_temper_air_int_01 / 10;
modbus_table_analog_out[134].all = protect_levels.alarm_temper_air_int_02 / 10;
modbus_table_analog_out[135].all = protect_levels.alarm_temper_air_int_03 / 10;
modbus_table_analog_out[136].all = protect_levels.alarm_temper_air_int_04 / 10;
// toControllerAlarmMinUlineA1B1C1 30137
// toControllerAlarmMinUlineA2B2C2 30138
// toControllerAlarmMinUdcUP 30139
// toControllerAlarmMinUdcDOWN 30140
// toControllerAlarmMaxUlineA1B1C1 30142
// toControllerAlarmMaxUlineA2B2C2 30143
// toControllerAlarmMaxUdcUP 30144
// toControllerAlarmMaxUdcDOWN 30145
modbus_table_analog_out[137].all = _IQtoF(analog_protect.in_voltage[0].setup.levels.iqNominal_minus20) * NORMA_ACP;//_IQtoF(edrk.iqMIN_U_IN) * NORMA_ACP;
modbus_table_analog_out[138].all = _IQtoF(analog_protect.in_voltage[1].setup.levels.iqNominal_minus20) * NORMA_ACP;
modbus_table_analog_out[139].all = _IQtoF(edrk.iqMIN_U_ZPT) * NORMA_ACP;
modbus_table_analog_out[140].all = _IQtoF(edrk.iqMIN_U_ZPT) * NORMA_ACP;
modbus_table_analog_out[142].all = _IQtoF(analog_protect.in_voltage[0].setup.levels.iqNominal_plus20) * NORMA_ACP;
modbus_table_analog_out[143].all = _IQtoF(analog_protect.in_voltage[1].setup.levels.iqNominal_plus20) * NORMA_ACP;
// modbus_table_analog_out[141].all = //_IQtoF(edrk.iqMAX_U_IN) * NORMA_ACP;
// modbus_table_analog_out[140].all = _IQtoF(edrk.iqMAX_U_IN) * NORMA_ACP;
modbus_table_analog_out[144].all = _IQtoF(edrk.iqMAX_U_ZPT) * NORMA_ACP;
modbus_table_analog_out[145].all = _IQtoF(edrk.iqMAX_U_ZPT) * NORMA_ACP;
modbus_table_analog_out[146].all = protect_levels.alarm_Izpt_max;
modbus_table_analog_out[155].all = protect_levels.alarm_Imax_U01;
modbus_table_analog_out[156].all = protect_levels.alarm_Imax_U02;
modbus_table_analog_out[157].all = protect_levels.alarm_Imax_U03;
modbus_table_analog_out[158].all = protect_levels.alarm_Imax_U04;
modbus_table_analog_out[159].all = protect_levels.alarm_Imax_U05;
modbus_table_analog_out[160].all = protect_levels.alarm_Imax_U06;
modbus_table_analog_out[161].all = protect_levels.alarm_Imax_U07;
modbus_table_analog_out[162].all = protect_levels.alarm_Iged_max;
// save nPCH TimeToChangePump
modbus_table_analog_out[163].all = edrk.pult_data.data_to_pult.nPCH;
modbus_table_analog_out[154].all = edrk.pult_data.data_to_pult.TimeToChangePump;
modbus_table_analog_out[222].all = edrk.pult_data.data_to_pult.count_build;
modbus_table_analog_out[223].all = edrk.pult_data.data_to_pult.count_revers;
modbus_table_analog_out[197].all = edrk.pult_data.flagSaveDataPCH;
// build version
modbus_table_analog_out[219].all = edrk.buildYear;
modbus_table_analog_out[220].all = edrk.buildMonth;
modbus_table_analog_out[221].all = edrk.buildDay;
//moto
for (i=0;i<COUNT_MOTO_PULT;i++)
modbus_table_analog_out[i+201].all = edrk.pult_data.data_to_pult.moto[i];
modbus_table_analog_out[200].all = edrk.pult_data.flagSaveDataMoto;
modbus_table_analog_out[198].all = edrk.pult_data.flagSaveSlowLogs;
// modbus_table_analog_out[198].all = edrk.pult_data.flagSaveParamLogs;
modbus_table_analog_out[7].all = edrk.freq_50hz_1;
//////////////// log////
update_logs_cmd_HMI();
/*
���������� ��������� � ����������� � ������ ��������.
��� �������� ������ �� � ��������� 30010-30027 ��������
�������������������� �������� FFFF.
�������� �������� �� ���������� �������� �����
��������� �������: �������� � �������� 40701-40718 ������, �
����� ��������� ������� � ������� 40700. ������ ����������,
����������� �� �������� "��������" � ������� ������� � �������� 30010-30027.
*/
// if ()
}
/*
* 40194 - ��������� ������ ������ �� ��������� 40300-40399 � ����� LOGS1;
40224 - ��������� ������ ������ �� ��������� 40400-40499 � ����� LOGS2;
40225 - ��������� ������ ������ �� ��������� 40500-40599 � ����� LOGS3;
40226 - ��������� ������ ������ �� ��������� 40600-40699 � ����� LOGS4;
40227 - ��������� ������ ������ �� ��������� 40700-40799 � ����� LOGS5;
*/
void update_LoggerParams(void)
{
int i;
for (i=0;i<28;i++)
{
modbus_table_analog_out[164+i].all = edrk.pult_data.logger_params[i];
}
}
void update_logs_cmd_HMI(void)
{
modbus_table_analog_out[192].all = log_to_HMI.enable_progress_bar; // stateLogsReport
modbus_table_analog_out[193].all = log_to_HMI.progress_bar; // controlProgressBar
modbus_table_analog_out[194].all = log_to_HMI.ReportLogOut; // ReportGetOut
modbus_table_analog_out[195].all = log_to_HMI.cleanLogs; // cleanLogs == 1
modbus_table_analog_out[196].all = log_to_HMI.saveLogsToSDCard; // saveLogsToSDCard 1-SD 2-USB
// modbus_table_analog_out[224].all = log_to_HMI.tick_step2;
// modbus_table_analog_out[225].all = log_to_HMI.tick_step3;
// modbus_table_analog_out[226].all = log_to_HMI.tick_step4;
// modbus_table_analog_out[227].all = log_to_HMI.tick_step5;
}
void update_tables_HMI(void)
{
update_tables_HMI_analog();
update_tables_HMI_discrete();
}
void setStateHMI(Inverter_state state) {
switch (state) {
case state_ready1:
modbus_table_analog_out[1].all = 1;
modbus_table_analog_out[2].all = 1;
break;
case state_ready2:
modbus_table_analog_out[1].all = 2;
modbus_table_analog_out[2].all = 1;
break;
case state_go:
modbus_table_analog_out[1].all = 3;
modbus_table_analog_out[2].all = 1;
break;
case state_assemble:
modbus_table_analog_out[1].all = 4;
modbus_table_analog_out[2].all = 1;
break;
case state_fault:
modbus_table_analog_out[1].all = 5;
modbus_table_analog_out[2].all = 2;
break;
case state_accident:
modbus_table_analog_out[1].all = 6;
modbus_table_analog_out[2].all = 3;
break;
default:
modbus_table_analog_out[1].all = 0;
modbus_table_analog_out[2].all = 0;
};
}
///////////////////////////////////////////////////
///
///////////////////////////////////////////////////
void setElementsColorsHMI(Inverter_state state) {
int i = 10;
if ((state == state_not_init) || (state == state_ready1)) {
//All grey
for (i = 10; i <= 22; ++i) {
modbus_table_analog_out[i].all = 0;
}
} else if (state == state_assemble) {
//UMP
for (i = 10; i <= 22; ++i) {
modbus_table_analog_out[i].all = 0;
}
modbus_table_analog_out[21].all = 1;
} else if (state == state_ready2) {
//All green
for (i = 10; i <= 22; ++i) {
modbus_table_analog_out[i].all = 0;
}
modbus_table_analog_out[10].all = 1;
modbus_table_analog_out[11].all = 1;
modbus_table_analog_out[12].all = 1;
} else if (state == state_go) {
//Almost all
for (i = 10; i <= 22; ++i) {
modbus_table_analog_out[i].all = 1;
}
modbus_table_analog_out[21].all = 0;
} else if (state == state_fault) {
for (i = 10; i <= 22; ++i) {
modbus_table_analog_out[i].all = 2;
}
} else if (state == state_accident) {
for (i = 10; i <= 22; ++i) {
modbus_table_analog_out[i].all = 3;
}
}
}
///////////////////////////////////////////////////
///
///////////////////////////////////////////////////
///////////////////////////////////////////////////
///
///////////////////////////////////////////////////
void inc_count_build(void)
{
// edrk.pult_data.data.count_build = edrk.pult_data.data_from_pult.moto[21];
edrk.pult_data.data.count_build++;
if (edrk.pult_data.data.count_build>32760)
edrk.pult_data.data.count_build = 1;
// edrk.pult_data.data_to_pult.count_build = edrk.pult_data.data.count_build;
// edrk.pult_data.data_to_pult.moto[21] = edrk.pult_data.data_to_pult.count_build;
}
void inc_count_revers(void)
{
// edrk.pult_data.data.count_revers = edrk.pult_data.data_from_pult.moto[22];
edrk.pult_data.data.count_revers++;
if (edrk.pult_data.data.count_revers>32760)
edrk.pult_data.data.count_revers = 1;
// edrk.pult_data.data_to_pult.count_revers = edrk.pult_data.data.count_revers;
// edrk.pult_data.data_to_pult.moto[22] = edrk.pult_data.data_to_pult.count_revers
}
void update_nPCH(void)
{
static int pause_w = 5, first_run = 1; // 10 ��� �������� �� ����� ������ �� ������
int flag_1 = 0, flag_2 = 0, i;
static int prev_active = 0;
if (control_station.alive_control_station[CONTROL_STATION_INGETEAM_PULT_RS485]==0)
{
pause_w = 5;
}
if (pause_w > 1)
{
pause_w--;
// if (edrk.pult_data.nPCH_from_pult)
// if (pause_w > 1)
// pause_w = 1;
prev_active = control_station.alive_control_station[CONTROL_STATION_INGETEAM_PULT_RS485];
return;
}
// �������� �� -1 � ������
// ���� � ������ -1 � �� ������ �����������, ������ ���� ��� ��������
// ����� ���������� �� ��� � ������
if (pause_w==1 && first_run)
{
//����� ��
if (edrk.pult_data.data_from_pult.nPCH==-1) // ��� �����
{
edrk.pult_data.data_to_pult.nPCH = edrk.pult_data.data.nPCH = 0;
}
else
edrk.pult_data.data_to_pult.nPCH = edrk.pult_data.data.nPCH = edrk.pult_data.data_from_pult.nPCH;
//�������� ������������ � ������ �� �����
if (edrk.pult_data.data_from_pult.TimeToChangePump == -1) // ��� �����
edrk.pult_data.data_to_pult.TimeToChangePump = edrk.pult_data.data.TimeToChangePump = 0;
else
edrk.pult_data.data_to_pult.TimeToChangePump = edrk.pult_data.data.TimeToChangePump = edrk.pult_data.data_from_pult.TimeToChangePump;
//�������� + ������ + ���-�� ������
for (i=0;i<COUNT_MOTO_PULT;i++)
{
if (edrk.pult_data.data_from_pult.moto[i] == -1) // ��� �����
edrk.pult_data.data_to_pult.moto[i] = edrk.pult_data.data.moto[i] = 0;
else
edrk.pult_data.data_to_pult.moto[i] = edrk.pult_data.data.moto[i] = edrk.pult_data.data_from_pult.moto[i];
}
// count_build
if (edrk.pult_data.data_from_pult.count_build==-1) // ��� �����
{
edrk.pult_data.data_to_pult.count_build = edrk.pult_data.data.count_build = 0;
}
else
edrk.pult_data.data_to_pult.count_build = edrk.pult_data.data.count_build = edrk.pult_data.data_from_pult.count_build;
// count_revers
if (edrk.pult_data.data_from_pult.count_revers == -1) // ��� �����
{
edrk.pult_data.data_to_pult.count_revers = edrk.pult_data.data.count_revers = 0;
}
else
edrk.pult_data.data_to_pult.count_revers = edrk.pult_data.data.count_revers = edrk.pult_data.data_from_pult.count_revers;
//
pause_w = 0;
first_run = 0;
}
//����� ��
// ����� ��������� �� ������
if (edrk.pult_data.data_from_pult.nPCH != edrk.pult_data.data.nPCH && edrk.pult_data.data_from_pult.nPCH>=0)
{
edrk.pult_data.data_to_pult.nPCH = edrk.pult_data.data_from_pult.nPCH;
flag_1 = 1;
edrk.pult_data.data.nPCH = edrk.pult_data.data_from_pult.nPCH;
}
// ��� ����� ����� -1 ������ �� ������� ��������
if (edrk.pult_data.data_from_pult.nPCH != edrk.pult_data.data.nPCH && edrk.pult_data.data_from_pult.nPCH == -1)
{
edrk.pult_data.data_to_pult.nPCH = edrk.pult_data.data.nPCH;
flag_1 = 1;
}
//�������� ������������ � ������ �� �����
// ����� ��������� �� ������
if (edrk.pult_data.data_from_pult.TimeToChangePump != edrk.pult_data.data.TimeToChangePump
&& edrk.pult_data.data_from_pult.TimeToChangePump >= 0)
{
edrk.pult_data.data_to_pult.TimeToChangePump = edrk.pult_data.data_from_pult.TimeToChangePump;
flag_1 = 1;
edrk.pult_data.data.TimeToChangePump = edrk.pult_data.data_from_pult.TimeToChangePump;
}
// ��� ����� ����� -1 ������ �� ������� ��������
if (edrk.pult_data.data_from_pult.TimeToChangePump != edrk.pult_data.data.TimeToChangePump
&& edrk.pult_data.data_from_pult.TimeToChangePump == -1)
{
edrk.pult_data.data_to_pult.TimeToChangePump = edrk.pult_data.data.TimeToChangePump;
flag_1 = 1;
}
// build
// ��� ����� ����� -1 ������ �� ������� ��������
if (edrk.pult_data.data_from_pult.count_build != edrk.pult_data.data.count_build
&& edrk.pult_data.data_from_pult.count_build == -1)
{
edrk.pult_data.data_to_pult.count_build = edrk.pult_data.data.count_build;
flag_1 = 1;
}
if (edrk.pult_data.data_from_pult.count_build != edrk.pult_data.data.count_build)
{
edrk.pult_data.data_to_pult.count_build = edrk.pult_data.data.count_build;
flag_1 = 1;
}
// revers
// ��� ����� ����� -1 ������ �� ������� ��������
if (edrk.pult_data.data_from_pult.count_revers != edrk.pult_data.data.count_revers
&& edrk.pult_data.data_from_pult.count_revers == -1)
{
edrk.pult_data.data_to_pult.count_revers = edrk.pult_data.data.count_revers;
flag_1 = 1;
}
if (edrk.pult_data.data_from_pult.count_revers != edrk.pult_data.data.count_revers )
{
edrk.pult_data.data_to_pult.count_revers = edrk.pult_data.data.count_revers;
flag_1 = 1;
}
// ���� ������� ���������
edrk.pult_data.flagSaveDataPCH = flag_1;
// moto
for (i=0;i<COUNT_MOTO_PULT;i++)
{
// ��� ����� ����� -1 ������ �� ������� ��������
if (edrk.pult_data.data_from_pult.moto[i] == -1)
flag_2 = 1;
else
edrk.pult_data.data.moto[i] = edrk.pult_data.data_from_pult.moto[i];
}
// ���� ���� ���� -1 � ������, ������ ��� ����� ��������, ��������� ��� ������
if (flag_2)
{
for (i=0;i<COUNT_MOTO_PULT;i++)
{
edrk.pult_data.data_to_pult.moto[i] = edrk.pult_data.data.moto[i];
}
}
// ���� ������� ���������
edrk.pult_data.flagSaveDataMoto = flag_2;
prev_active = control_station.alive_control_station[CONTROL_STATION_INGETEAM_PULT_RS485];
}
#define COUNT_WAIT_SAVE_LOG 3000
void set_write_slow_logs(int cmd)
{
static int prev_cmd = 0, flag_wait = 0, flag_clear = 0;
static unsigned int time_wait_save_log = 0, time_wait_clear_log = 0;
int to_store = 0;
if (edrk.pult_cmd.log_what_memory == 3)
to_store = 3;
else
if (edrk.pult_cmd.log_what_memory >= 2)
to_store = 2;
else
if (edrk.pult_cmd.log_what_memory >= 1)
to_store = 1;
else
to_store = 0;
//40198 - ���������� ���������� ������� (�������������� �����) �� ������ (2), �� ����� (1), �� �����+usb (3)
if (prev_cmd == 0 && cmd && to_store && flag_wait == 0)
{
edrk.pult_data.flagSaveSlowLogs = to_store;
flag_wait = 1;
time_wait_save_log = global_time.miliseconds;
}
if (flag_wait)
{
if (detect_pause_milisec(COUNT_WAIT_SAVE_LOG, &time_wait_save_log))
{
flag_wait = 0;
flag_clear = 1; // ���� ������� �� ��������
edrk.pult_data.flagSaveSlowLogs = 0;
time_wait_clear_log = global_time.miliseconds;
}
}
else
{
}
if (flag_clear) // �������
{
edrk.pult_data.flagSaveSlowLogs = 100;
if (detect_pause_milisec(COUNT_WAIT_SAVE_LOG, &time_wait_clear_log))
{
flag_wait = 0;
flag_clear = 0;
edrk.pult_data.flagSaveSlowLogs = 0;
}
}
//������ ����� � ������ ����� ������ � �������� 30033:
// �������� 0 - ��� �� ������, �� �����;
// �������� 1 - ��� ������, ���� �����;
// �������� 2 - ���� ������, ��� �����;
// �������� 3 - ���� � ������ � �����;
}