#ifndef XP_CDS_TK_22220_H
#define XP_CDS_TK_22220_H


#include <project_setup.h>

#include "x_basic_types.h"
#include "xp_cds_status_bus.h"
#include "xp_id_plate_info.h"



/////////////////////////////////////////////////////////////
/////////////////////////////////////////////////////////////
////  22220
/////////////////////////////////////////////////////////////
/////////////////////////////////////////////////////////////
//#define Cds_Tk_Xilinx_SP6	0

//#if Cds_Tk_Xilinx_SP6 == 1
#define T_CDS_TK_COUNT_ADR_PBUS_22220			4	// count max elements in parallel bus 
//#else
//	#define T_CDS_TK_COUNT_ADR_PBUS_22220		0	// count max elements in parallel bus 
//#endif //Cds_Tk_Xilinx_SP6

#define T_CDS_TK_SETUP_USE_ADR_PBUS_22220		0xffff // ïî óìîë÷àíèþ - íàñòðîéêà êàêèå ðåãèñòðû èñïîëüçîâàòü äëß PBUS, 0xffff - âñå âîçìîæíûå

/*-----------------------------------------------------------------------------
Define the types
-----------------------------------------------------------------------------*/
/////////////////////////////////////////////////////////////
//  write serial bus reg
/////////////////////////////////////////////////////////////
typedef struct {
//0
	union
	{
		UInt16 all;
		struct 
		{
		 UInt16 tk0 :1;
		 UInt16 tk1 :1;
		 UInt16 tk2 :1;
		 UInt16 tk3 :1;
		 UInt16 tk4 :1;
		 UInt16 tk5 :1;
		 UInt16 tk6 :1;
		 UInt16 tk7 :1;
		 UInt16 reserv :8;
		} bit;	
	} mask_tk_out_40pin;
//1
	union
	{
		UInt16 all;
		struct 
		{
		   UInt16 mintime  :8; // N=mintime  * fclk   fclk=5000kHz
		   UInt16 deadtime :8; // N=deadtime * fclk   fclk=5000kHz
		} bit;	
	} dead_min_time;
//2
	union
	{
		UInt16 all;
		struct 
		{
		   UInt16 delay_off :8;
		   UInt16 delay_on :8;				      	    
		} bit;	
	} ack_time;
//3
	union
	{
		UInt16 all;
		struct 
		{
		 UInt16 tk0_ack :1;
		 UInt16 tk1_ack :1;
		 UInt16 tk2_ack :1;
		 UInt16 tk3_ack :1;
		 UInt16 tk4_ack :1;
		 UInt16 tk5_ack :1;
		 UInt16 tk6_ack :1;
		 UInt16 tk7_ack :1;	    		      	    
		 UInt16 tk0_current :1;
		 UInt16 tk1_current :1;
		 UInt16 tk2_current :1;
		 UInt16 tk3_current :1;
		 UInt16 tk4_current :1;
		 UInt16 tk5_current :1;
		 UInt16 tk6_current :1;
		 UInt16 tk7_current :1;
		} bit;	
	} mask_protect_tk;
//4
	union
	{
		UInt16 all;
		struct 
		{
		   UInt16 reserv :5;
		   UInt16 enable_mask_err_serial_2 :1;			// for SP6
		   UInt16 enable_uksi_serial_2 :1;				// for SP6
		   UInt16 enable_mask_err_serial_1 :1;			// for SP6
		   UInt16 enable_uksi_serial_1 :1;				// for SP6
		   UInt16 reserv9 :1;
		   UInt16 enable_line_err :1;
		   UInt16 disable_err_mintime :1;
		   UInt16 disable_err_hwp :1;
		   UInt16 disable_err0_in :1;
		   UInt16 enable_err_switch :1;
		   UInt16 enable_err_power :1;
		} bit;	
	} protect_error;
//7
	UInt16 cmd_reset_error;
//9
	union
	{
		UInt16 all;
		struct 
		{
		   UInt16 filter_time :8; // fclk=5000kHz
		   UInt16 reserv 	  :8;  	  // 
		} bit;	
	} filter_time_current_protect;

//

} T_cds_tk_write_sbus_22220;

#define T_CDS_TK_WRITE_SBUS_DEFAULTS_22220			{0x0000,0x5f5f,0x0909,0x0000,0x0000,0x0000,0x0105}


/////////////////////////////////////////////////////////////
/////////////////////////////////////////////////////////////
// read reg serial bus
/////////////////////////////////////////////////////////////
/////////////////////////////////////////////////////////////
typedef struct {
//0
	union
	{
		UInt16 all;
		struct 
		{
		 UInt16 tk0 :1;
		 UInt16 tk1 :1;
		 UInt16 tk2 :1;
		 UInt16 tk3 :1;
		 UInt16 tk4 :1;
		 UInt16 tk5 :1;
		 UInt16 tk6 :1;
		 UInt16 tk7 :1;
		 UInt16 reserv :8;
		} bit;	
	} mask_tk_out_40pin;

//1
	union
	{
		UInt16 all;
		struct 
		{
		   UInt16 mintime  :8; // N=mintime  * fclk   fclk=5000kHz
		   UInt16 deadtime :8; // N=deadtime * fclk   fclk=5000kHz
		} bit;	
	} dead_min_time;

//2
	union
	{
		UInt16 all;
		struct 
		{
		   UInt16 delay_off :8;
		   UInt16 delay_on :8;				      	    
		} bit;	
	} ack_time;

//3
	union
	{
		UInt16 all;
		struct 
		{
		 UInt16 tk0_ack :1;
		 UInt16 tk1_ack :1;
		 UInt16 tk2_ack :1;
		 UInt16 tk3_ack :1;
		 UInt16 tk4_ack :1;
		 UInt16 tk5_ack :1;
		 UInt16 tk6_ack :1;
		 UInt16 tk7_ack :1;	    		      	    
		 UInt16 tk0_current :1;
		 UInt16 tk1_current :1;
		 UInt16 tk2_current :1;
		 UInt16 tk3_current :1;
		 UInt16 tk4_current :1;
		 UInt16 tk5_current :1;
		 UInt16 tk6_current :1;
		 UInt16 tk7_current :1;
		} bit;	
	} mask_protect_tk;

//4
	union
	{
		UInt16 all;
		struct 
		{
		   UInt16 reserv :5;
		   UInt16 enable_mask_err_serial_2 :1;				// for SP6
		   UInt16 enable_uksi_serial_2 :1;					// for SP6
		   UInt16 enable_mask_err_serial_1 :1;				// for SP6
		   UInt16 enable_uksi_serial_1 :1;					// for SP6
		   UInt16 reserv9 :1;
		   UInt16 enable_line_err :1;
		   UInt16 disable_err_mintime :1;
		   UInt16 disable_err_hwp :1;
		   UInt16 disable_err0_in :1;
		   UInt16 enable_err_switch :1;
		   UInt16 enable_err_power :1;
		} bit;	
	} protect_error;

//5
	union
	{
		UInt16 all;
		struct 
		{
		 UInt16 tk0_ack :1;
		 UInt16 tk1_ack :1;
		 UInt16 tk2_ack :1;
		 UInt16 tk3_ack :1;
		 UInt16 tk4_ack :1;
		 UInt16 tk5_ack :1;
		 UInt16 tk6_ack :1;
		 UInt16 tk7_ack :1;
		 UInt16 tk0 :1;
		 UInt16 tk1 :1;
		 UInt16 tk2 :1;
		 UInt16 tk3 :1;
		 UInt16 tk4 :1;
		 UInt16 tk5 :1;
		 UInt16 tk6 :1;
		 UInt16 tk7 :1;	    		      	    
		} bit;	
	} status_tk_40pin;

//6
	union
	{
		UInt16 all;
		struct 
		{
		 UInt16 tk0_a4 :1;
		 UInt16 tk1_b4 :1;
		 UInt16 tk2_c4 :1;
		 UInt16 tk3_a5 :1;
		 UInt16 tk4_b5 :1;
		 UInt16 tk5_c5 :1;
		 UInt16 tk6_a6 :1;
		 UInt16 tk7_b6 :1;
		 UInt16 tk8_c6 :1;
		 UInt16 tk9_a7 :1;
		 UInt16 tk10_b7 :1;
		 UInt16 tk11_c7 :1;
		 UInt16 tk12_a8 :1;
		 UInt16 tk13_b8 :1;
		 UInt16 tk14_a9 :1;
		 UInt16 tk15_b9 :1;	    		      	    
		} bit;	
	} status_tk_96pin;

//7
	union
	{
		UInt16 all;
		struct 
		{
		   UInt16 reserv     :5;
		   UInt16 sp6_err_recive_serial_2     :1;		// for SP6
		   UInt16 sp6_err_recive_serial_1     :1;		// for SP6
		   UInt16 line_err_keys_3210 :1;
		   UInt16 line_err_keys_7654 :1;
		   UInt16 mintime_err_keys_3210 :1;
		   UInt16 mintime_err_keys_7654 :1;
		   UInt16 err0_local :1;
		   UInt16 err_hwp    :1;		      	    
		   UInt16 err0_in    :1;
		   UInt16 err_switch :1;
		   UInt16 err_power  :1;
		} bit;	
	} lock_status_error;

//8
	union
	{
		UInt16 all;
		struct 
		{
		 UInt16 tk0_ack :1;
		 UInt16 tk1_ack :1;
		 UInt16 tk2_ack :1;
		 UInt16 tk3_ack :1;
		 UInt16 tk4_ack :1;
		 UInt16 tk5_ack :1;
		 UInt16 tk6_ack :1;
		 UInt16 tk7_ack :1;	    		      	    
		 UInt16 tk0_current :1;
		 UInt16 tk1_current :1;
		 UInt16 tk2_current :1;
		 UInt16 tk3_current :1;
		 UInt16 tk4_current :1;
		 UInt16 tk5_current :1;
		 UInt16 tk6_current :1;
		 UInt16 tk7_current :1;
		} bit;	
	} status_protect_current_ack;

//9
	union
	{
		UInt16 all;
		struct 
		{
		   UInt16 filter_time :8; // fclk=5000kHz
		   UInt16 reserv  	  :8;  // fclk=5000kHz
		} bit;	
	} filter_time_current_protect;

//11
	union
	{
		UInt16 all;
		struct 
		{
		   UInt16 tk_3210     :8;
		   UInt16 tk_7654     :8;
		} bit;	
	} time_err_tk_all;

//15
	union
	{
		UInt16 all;
		struct 
		{
		   UInt16 reserv :9;
		   UInt16 sp6_err_recive_UKSI_2     :1;
		   UInt16 sp6_err_recive_UKSI_1     :1;
		   UInt16 err0_local :1;
		   UInt16 err_hwp :1;
		   UInt16 err0_in :1;
		   UInt16 err_switch :1;
		   UInt16 err_power :1;
		} bit;	
	} current_status_error;

} T_cds_tk_read_sbus_22220;


#define T_CDS_TK_READ_SBUS_DEFAULTS_22220  		{0,0,0,0,0,0,0,0,0,0,0,0}



/////////////////////////////////////////////////////////////
/////////////////////////////////////////////////////////////
// read reg parallel bus
/////////////////////////////////////////////////////////////
/////////////////////////////////////////////////////////////


typedef struct {
	//0
	union {
		UInt16 all;
		struct {
			UInt16 UKSI_upper_bits:15;
			UInt16 parity_bit:1;
		} bit;
	} DataReg0;
	//1
	union {
		UInt16 all;
		struct {
			UInt16 reserved:6;
			UInt16 UKSI_upper_bits:9;
			UInt16 parity_bit:1;
		} bit;
	} DataReg1;
	//2
	union {
		UInt16 all;
		struct {
			UInt16 UKSI_upper_bits:15;
			UInt16 parity_bit:1;
		} bit;
	} DataReg2;
	//3
	union {
		UInt16 all;
		struct {
			UInt16 reserved:6;
			UInt16 UKSI_upper_bits:9;
			UInt16 parity_bit:1;
		} bit;
	} DataReg3;
} T_cds_tk_read_pbus_22220;

#define T_CDS_TK_READ_PBUS_DEFAULTS_22220  		{0,0,0,0}


/////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////
/////////////////////////////////////////////////////////////
/////////////////////////////////////////////////////////////
//setup parallel bus
/////////////////////////////////////////////////////////////
/////////////////////////////////////////////////////////////
typedef struct {
	UInt16	count_elements_pbus;
// use_or_not?
	union
	{
		UInt16 all;
		struct{
			UInt16 reg0		: 1;
			UInt16 reg1		: 1;
			UInt16 reg2		: 1;
			UInt16 reg3		: 1;

			UInt16 res		: 12;
		}bit;
	} use_reg_in_pbus;	

} T_cds_tk_setup_pbus_22220;

#define T_CDS_TK_SETUP_PBUS_DEFAULTS_22220  	{T_CDS_TK_COUNT_ADR_PBUS_22220,T_CDS_TK_SETUP_USE_ADR_PBUS_22220}
//////////////////////////////////////////////////////////////




typedef struct{
	T_cds_tk_write_sbus_22220			sbus;
} T_cds_tk_write_22220;

typedef struct{
	T_cds_tk_read_sbus_22220			sbus;
	T_cds_tk_read_pbus_22220			pbus;
	Int16								type_cds_xilinx;
} T_cds_tk_read_22220;

#define T_CDS_TK_READ_DEFAULTS_22220			{T_CDS_TK_READ_SBUS_DEFAULTS_22220,T_CDS_TK_READ_PBUS_DEFAULTS_22220,TYPE_CDS_XILINX_DEFAULTS}

typedef struct {
		UInt16 adr_table[T_CDS_TK_COUNT_ADR_PBUS_22220];
} T_cds_tk_adr_pbus_22220;

#define T_CDS_TK_ADR_PBUS_DEFAULTS_22220  		{0,0,0,0}


//////////////////////////////////////////////////////////////
/////////////////////////////////////////////////////////////////
/////////////////////////////////////////////////////////////////

typedef struct  {
	UInt16						plane_address; // 0 to 15
	UInt16						useit;
	Int16						type_cds_xilinx;
	T_cds_tk_setup_pbus_22220	setup_pbus;
	T_cds_status_serial_bus 	status_serial_bus;
	T_cds_status_parallel_bus 	status_parallel_bus;
	T_component_status			status;
    T_local_status              local_status;

	T_cds_tk_write_22220		write;
	T_cds_tk_read_22220			read;
//#if Cds_Tk_Xilinx_SP6 == 1
	T_cds_tk_adr_pbus_22220			adr_pbus;
//#endif
	UInt16						store_protect_error;

	void (*init)();	    // Pointer to calculation function

	int (*read_all)();	    // Pointer to calculation function
	int (*write_all)();	    // Pointer to calculation function

	int (*read_sbus)();	        // Pointer to calculation function
	int (*write_sbus)();	    // Pointer to calculation function

	int (*read_pbus)();	        // Pointer to calculation function
	int (*write_pbus)();	    // Pointer to calculation function

	void (*reset_error)();	    // Pointer to calculation function
	void (*store_disable_error)();    // Pointer to calculation function
	void (*restore_enable_error)();	    // Pointer to calculation function

} T_cds_tk_22220;
	


#define T_cds_tk_DEFAULTS_22220	{0,\
							0,\
							TYPE_CDS_XILINX_DEFAULTS,\
							T_CDS_TK_SETUP_PBUS_DEFAULTS_22220,\
							T_cds_status_serial_bus_DEFAULT,\
							T_cds_status_parallel_bus_DEFAULT,\
							component_NotReady,\
                            local_status_NotReady,\
							{T_CDS_TK_WRITE_SBUS_DEFAULTS_22220},\
							T_CDS_TK_READ_DEFAULTS_22220,\
							T_CDS_TK_ADR_PBUS_DEFAULTS_22220,\
							0,\
							(void (*)(Uint32))cds_tk_init,\
							(int (*)(Uint32))cds_tk_read_all,\
							(int (*)(Uint32))cds_tk_write_all,\
							(int (*)(Uint32))cds_tk_read_sbus_22220,\
							(int (*)(Uint32))cds_tk_write_sbus_22220,\
							(int (*)(Uint32))cds_tk_read_pbus_22220,\
							(int (*)(Uint32))cds_tk_write_pbus,\
							(void (*)(Uint32))cds_tk_reset_error,\
							(void (*)(Uint32))cds_tk_store_disable_error,\
							(void (*)(Uint32))cds_tk_restore_enable_error\
							}






typedef T_cds_tk_22220 *T_cds_tk_handle_22220;


#endif // XP_CDS_TK_22220_H