
#include "xp_adc.h"

#include "MemoryFunctions.h"
#include "Spartan2E_Adr.h"
#include "TuneUpPlane.h"
#include "x_parallel_bus.h"
#include "x_serial_bus.h"
#include "xp_tools.h"
#include "xerror.h"

///////////////////////////////////////////////
///////////////////////////////////////////////
///////////////////////////////////////////////

void adc_init(T_adc *v)
{
	int old_started = 0;
	unsigned int i, k;

    if (v->useit == 0) 
	{
	  clear_adr_sync_table(v->plane_address);
	  return ;
	}
	set_adr_sync_table(v->plane_address);

	if (x_parallel_bus_project.flags.bit.init==0)
      x_parallel_bus_project.init(&x_parallel_bus_project);

	
	old_started = x_parallel_bus_project.flags.bit.started;

	if (x_parallel_bus_project.flags.bit.started)
	  x_parallel_bus_project.stop(&x_parallel_bus_project);
	  

	x_parallel_bus_project.slave_addr = v->plane_address;

	//  for (i=0;i<v->setup_pbus.count_elements_pbus;i++)
	    for (i=0;i<16;i++)
	    {
	        if (v->setup_pbus.use_reg_in_pbus.all & (1<<i))
	        {
	            if (x_parallel_bus_project.check_free_table(&x_parallel_bus_project))
	            {
	                x_parallel_bus_project.reg_addr = i;
	                v->adr_pbus.adr_table[i] = x_parallel_bus_project.setup.size_table;
	                x_parallel_bus_project.add_table(&x_parallel_bus_project);
	                x_parallel_bus_project.reg_addr++;
	                x_parallel_bus_project.setup.size_table++;
	            }
	            else
	            {
	                // места в таблице нет!!!
	                xerror(xparall_bus_er_ID(1),(void *)0);
	                v->setup_pbus.use_reg_in_pbus.all &= (~(1<<i));
	            }
	        }
	    }

//////
	if (old_started)
	  x_parallel_bus_project.start(&x_parallel_bus_project);

}

///////////////////////////////////////////////
///////////////////////////////////////////////
///////////////////////////////////////////////


int adc_read_all(T_adc *v)
{
  if (v->useit == 0) 
	  return 0;

  adc_read_sbus(v);
  adc_read_pbus(v);
  return 0;

}

///////////////////////////////////////////////
///////////////////////////////////////////////
///////////////////////////////////////////////


int adc_write_all(T_adc *v)
{
  if (v->useit == 0) 
	  return 0;

  adc_write_sbus(v);
  adc_write_pbus(v);
  return 0;

}

///////////////////////////////////////////////
///////////////////////////////////////////////
///////////////////////////////////////////////

int adc_write_sbus(T_adc *v)
{
	unsigned int old_err, err = 0, err_ready = 0;

    if (v->useit == 0) 
	  return 0;

	old_err = v->status_serial_bus.count_write_error;
	x_serial_bus_project.slave_addr = v->plane_address; // number plate

//0 test reg
    x_serial_bus_project.reg_addr 	= 0;   				 			// adr memory in plate
	x_serial_bus_project.write_data = v->write.sbus.test;   // write data

    if  (x_serial_bus_project.write(&x_serial_bus_project))              // make write
		v->status_serial_bus.count_write_error++;


    if (v->type_cds_xilinx == TYPE_CDS_XILINX_SP6)
	{


//6 protect_error
    if (v->read.type_cds_xilinx == TYPE_CDS_XILINX_SP6)
        v->write.sbus.protect_error.bit.err_switch = 0; // для SP6 отключаем ошибку по разъему, т.к. ее нет пока

    x_serial_bus_project.reg_addr 	= 6;   				 			// adr memory in plate
	x_serial_bus_project.write_data = v->write.sbus.protect_error.all;   // write data

    if  (x_serial_bus_project.write(&x_serial_bus_project))              // make write
		v->status_serial_bus.count_write_error++;




	}

////

	if (old_err == v->status_serial_bus.count_write_error)// no errors
	{
	  v->status_serial_bus.count_write_ok++;
	  err = 0; // no errors
	}
	else
	  err = 1; // !errors!

    err_ready = check_cds_ready_sbus( err, ITS_WRITE_BUS, &v->status_serial_bus);
	set_status_cds(err_ready, &v->status);

	return err_ready;
 
}

///////////////////////////////////////////////
///////////////////////////////////////////////
///////////////////////////////////////////////

int adc_write_pbus(T_adc *v)
{
  if (v->useit == 0) 
	  return 0;

  return 0;
}

///////////////////////////////////////////////
///////////////////////////////////////////////
///////////////////////////////////////////////

int adc_read_sbus(T_adc *v)
{

	unsigned int old_err, err = 0, err_ready = 0;
  
    if (v->useit == 0) 
	  return 0;

	old_err = v->status_serial_bus.count_read_error;

	x_serial_bus_project.slave_addr = v->plane_address; 			// number plate

//0 test
    x_serial_bus_project.reg_addr 	= 0;   				 			// adr memory in plate
	x_serial_bus_project.read(&x_serial_bus_project); 				// read

	if (x_serial_bus_project.flags.bit.read_error == 0) // check error
		v->read.sbus.test = x_serial_bus_project.read_data;
	else
	 	v->status_serial_bus.count_read_error++;

//14 id_plate
    x_serial_bus_project.reg_addr 	= 14;   				 			// adr memory in plate
	x_serial_bus_project.read(&x_serial_bus_project); 				// read

	if (x_serial_bus_project.flags.bit.read_error == 0) // check error
		v->read.sbus.id_plate.all = x_serial_bus_project.read_data;
	else
	 	v->status_serial_bus.count_read_error++;

//15 current_status_error
    x_serial_bus_project.reg_addr   = 15;                               // adr memory in plate
    x_serial_bus_project.read(&x_serial_bus_project);               // read

    if (x_serial_bus_project.flags.bit.read_error == 0) // check error
    {
        v->read.type_cds_xilinx = x_serial_bus_project.read_data & 0x1;
        v->type_cds_xilinx = v->read.type_cds_xilinx;
        if (v->read.type_cds_xilinx == TYPE_CDS_XILINX_SP6) // SP6
            v->read.sbus.current_status_error.all = x_serial_bus_project.read_data & 0xfffe;
    }
    else
        v->status_serial_bus.count_read_error++;


    if (v->read.type_cds_xilinx == TYPE_CDS_XILINX_SP2)
	{
    //6 protect_error
        v->read.sbus.protect_error.all = 0;
    //7 lock_status_error
        v->read.sbus.lock_status_error.all = 0;
	}
	else // TYPE_CDS_XILINX_SP6
	{
    //6 protect_error
        x_serial_bus_project.reg_addr 	= 6;   				 			// adr memory in plate
        x_serial_bus_project.read(&x_serial_bus_project); 				// read

        if (x_serial_bus_project.flags.bit.read_error == 0) // check error
            v->read.sbus.protect_error.all = x_serial_bus_project.read_data;
        else
            v->status_serial_bus.count_read_error++;

    //7 lock_status_error
        x_serial_bus_project.reg_addr 	= 7;   				 			// adr memory in plate
        x_serial_bus_project.read(&x_serial_bus_project); 				// read

        if (x_serial_bus_project.flags.bit.read_error == 0) // check error
            v->read.sbus.lock_status_error.all = x_serial_bus_project.read_data;
        else
            v->status_serial_bus.count_read_error++;
	}
///////////

	if (old_err == v->status_serial_bus.count_read_error)// no errors
	{
	  v->status_serial_bus.count_read_ok++;
	  err = 0; // no errors
	}
	else
	  err = 1; // !errors!

	err_ready = check_cds_ready_sbus( err, ITS_READ_BUS, &v->status_serial_bus);
	set_status_cds(err_ready, &v->status);

	return err_ready;

}

///////////////////////////////////////////////
///////////////////////////////////////////////
///////////////////////////////////////////////
#pragma CODE_SECTION(adc_read_pbus,".fast_run");
int adc_read_pbus(T_adc *v)
{
	unsigned int i,k;

	if (v->useit == 0) 
	  return 0;

	if (v->status & (component_Started | component_Ready | component_Error | component_ErrorSBus))
	{


	for (i=0,k=0;i<v->setup_pbus.count_elements_pbus;i++)
	{
	    if (v->setup_pbus.use_reg_in_pbus.all & (1<<i))
		{
			x_parallel_bus_project.adr_table_read = v->adr_pbus.adr_table[k];
			x_parallel_bus_project.read_one_data(&x_parallel_bus_project);
			v->read.pbus.adc_value[i] = (x_parallel_bus_project.data_table_read & 0xfff);  // наложили маску, т.к. в данных присутствует адрес канала.		
			k++;
		}
		else
		{
		  v->read.pbus.adc_value[i] = 0xffff;
		}
	}

	}
	else
	{

	        v->read.pbus.adc_value[0] = 0;
	        v->read.pbus.adc_value[1] = 0;
	        v->read.pbus.adc_value[2] = 0;
	        v->read.pbus.adc_value[3] = 0;
	        v->read.pbus.adc_value[4] = 0;
	        v->read.pbus.adc_value[5] = 0;
	        v->read.pbus.adc_value[6] = 0;
	        v->read.pbus.adc_value[7] = 0;
	        v->read.pbus.adc_value[8] = 0;
	        v->read.pbus.adc_value[9] = 0;
	        v->read.pbus.adc_value[10] = 0;
	        v->read.pbus.adc_value[11] = 0;
	        v->read.pbus.adc_value[12] = 0;
	        v->read.pbus.adc_value[13] = 0;
	        v->read.pbus.adc_value[14] = 0;
	        v->read.pbus.adc_value[15] = 0;

	}
  return 0;
}



//#define read_adc_value(bit,adr,res)  {if (bit) res = i_ReadMemory(adr++) & 0xfff; else res = 0xffff; }
//#define read_adc_value(bit,adr,res)  {if (bit) res = i_ReadMemory(adr++) & 0xfff; }
//#define read_adc_value_full(bit,adr,res)  {res = i_ReadMemory(adr++) & 0xfff; }



#pragma CODE_SECTION(adc_read_pbus_without_cycle,".fast_run");
int adc_read_pbus_without_cycle(T_adc *v)
{
	unsigned long adr_adc;
	unsigned int a_adc,i;

	if (v->useit == 0) 
	  return 0;

    if (v->status & (component_Started | component_Ready | component_Error | component_ErrorSBus))
    {
//i_led2_on();
	adr_adc = v->adr_pbus.adr_table[0] + ADR_FIRST_FREE;
//	a_adc = 0;
/*
    v->read.pbus.adc_value[0] = i_ReadMemory(ADR_FIRST_FREE);
	v->read.pbus.adc_value[1] = i_ReadMemory(ADR_FIRST_FREE);
	v->read.pbus.adc_value[2] = i_ReadMemory(ADR_FIRST_FREE);
	v->read.pbus.adc_value[3] = i_ReadMemory(ADR_FIRST_FREE);
	v->read.pbus.adc_value[4] = i_ReadMemory(ADR_FIRST_FREE);
	v->read.pbus.adc_value[5] = i_ReadMemory(ADR_FIRST_FREE);
	v->read.pbus.adc_value[6] = i_ReadMemory(ADR_FIRST_FREE);
	v->read.pbus.adc_value[7] = i_ReadMemory(ADR_FIRST_FREE);
	v->read.pbus.adc_value[8] = i_ReadMemory(ADR_FIRST_FREE);
	v->read.pbus.adc_value[9] = i_ReadMemory(ADR_FIRST_FREE);
	v->read.pbus.adc_value[10] = i_ReadMemory(ADR_FIRST_FREE);
	v->read.pbus.adc_value[11] = i_ReadMemory(ADR_FIRST_FREE);
	v->read.pbus.adc_value[12] = i_ReadMemory(ADR_FIRST_FREE);
	v->read.pbus.adc_value[13] = i_ReadMemory(ADR_FIRST_FREE);
	v->read.pbus.adc_value[14] = i_ReadMemory(ADR_FIRST_FREE);
	v->read.pbus.adc_value[15] = i_ReadMemory(ADR_FIRST_FREE);
*/

// 	if (v->setup_pbus.use_reg_in_pbus.all == 0xffff)
//	{
    read_pbus_adc_value_full(v->setup_pbus.use_reg_in_pbus.bit.reg0,adr_adc,v->read.pbus.adc_value[0]);
    read_pbus_adc_value_full(v->setup_pbus.use_reg_in_pbus.bit.reg1,adr_adc,v->read.pbus.adc_value[1]);
    read_pbus_adc_value_full(v->setup_pbus.use_reg_in_pbus.bit.reg2,adr_adc,v->read.pbus.adc_value[2]);
    read_pbus_adc_value_full(v->setup_pbus.use_reg_in_pbus.bit.reg3,adr_adc,v->read.pbus.adc_value[3]);
    read_pbus_adc_value_full(v->setup_pbus.use_reg_in_pbus.bit.reg4,adr_adc,v->read.pbus.adc_value[4]);
    read_pbus_adc_value_full(v->setup_pbus.use_reg_in_pbus.bit.reg5,adr_adc,v->read.pbus.adc_value[5]);
    read_pbus_adc_value_full(v->setup_pbus.use_reg_in_pbus.bit.reg6,adr_adc,v->read.pbus.adc_value[6]);
    read_pbus_adc_value_full(v->setup_pbus.use_reg_in_pbus.bit.reg7,adr_adc,v->read.pbus.adc_value[7]);
    read_pbus_adc_value_full(v->setup_pbus.use_reg_in_pbus.bit.reg8,adr_adc,v->read.pbus.adc_value[8]);
    read_pbus_adc_value_full(v->setup_pbus.use_reg_in_pbus.bit.reg9,adr_adc,v->read.pbus.adc_value[9]);
    read_pbus_adc_value_full(v->setup_pbus.use_reg_in_pbus.bit.reg10,adr_adc,v->read.pbus.adc_value[10]);
    read_pbus_adc_value_full(v->setup_pbus.use_reg_in_pbus.bit.reg11,adr_adc,v->read.pbus.adc_value[11]);
    read_pbus_adc_value_full(v->setup_pbus.use_reg_in_pbus.bit.reg12,adr_adc,v->read.pbus.adc_value[12]);
    read_pbus_adc_value_full(v->setup_pbus.use_reg_in_pbus.bit.reg13,adr_adc,v->read.pbus.adc_value[13]);
    read_pbus_adc_value_full(v->setup_pbus.use_reg_in_pbus.bit.reg14,adr_adc,v->read.pbus.adc_value[14]);
    read_pbus_adc_value_full(v->setup_pbus.use_reg_in_pbus.bit.reg15,adr_adc,v->read.pbus.adc_value[15]);
//	}
//	else
//	{
//    read_pbus_adc_value(v->setup_pbus.use_reg_in_pbus.bit.reg0,adr_adc,v->read.pbus.adc_value[0]);
//    read_pbus_adc_value(v->setup_pbus.use_reg_in_pbus.bit.reg1,adr_adc,v->read.pbus.adc_value[1]);
//    read_pbus_adc_value(v->setup_pbus.use_reg_in_pbus.bit.reg2,adr_adc,v->read.pbus.adc_value[2]);
//    read_pbus_adc_value(v->setup_pbus.use_reg_in_pbus.bit.reg3,adr_adc,v->read.pbus.adc_value[3]);
//    read_pbus_adc_value(v->setup_pbus.use_reg_in_pbus.bit.reg4,adr_adc,v->read.pbus.adc_value[4]);
//    read_pbus_adc_value(v->setup_pbus.use_reg_in_pbus.bit.reg5,adr_adc,v->read.pbus.adc_value[5]);
//    read_pbus_adc_value(v->setup_pbus.use_reg_in_pbus.bit.reg6,adr_adc,v->read.pbus.adc_value[6]);
//    read_pbus_adc_value(v->setup_pbus.use_reg_in_pbus.bit.reg7,adr_adc,v->read.pbus.adc_value[7]);
//    read_pbus_adc_value(v->setup_pbus.use_reg_in_pbus.bit.reg8,adr_adc,v->read.pbus.adc_value[8]);
//    read_pbus_adc_value(v->setup_pbus.use_reg_in_pbus.bit.reg9,adr_adc,v->read.pbus.adc_value[9]);
//    read_pbus_adc_value(v->setup_pbus.use_reg_in_pbus.bit.reg10,adr_adc,v->read.pbus.adc_value[10]);
//    read_pbus_adc_value(v->setup_pbus.use_reg_in_pbus.bit.reg11,adr_adc,v->read.pbus.adc_value[11]);
//    read_pbus_adc_value(v->setup_pbus.use_reg_in_pbus.bit.reg12,adr_adc,v->read.pbus.adc_value[12]);
//    read_pbus_adc_value(v->setup_pbus.use_reg_in_pbus.bit.reg13,adr_adc,v->read.pbus.adc_value[13]);
//    read_pbus_adc_value(v->setup_pbus.use_reg_in_pbus.bit.reg14,adr_adc,v->read.pbus.adc_value[14]);
//    read_pbus_adc_value(v->setup_pbus.use_reg_in_pbus.bit.reg15,adr_adc,v->read.pbus.adc_value[15]);
//	}

/*
	if (v->setup_pbus.use_reg_in_pbus.bit.reg0)
	{
//	  v->read.pbus.adc_value[0] = i_ReadMemory(ADR_FIRST_FREE + adr_adc + a_adc) & 0xfff;
	  v->read.pbus.adc_value[0] = i_ReadMemory(adr_adc++) & 0xfff;
//	  a_adc++;
	}
	else
	 v->read.pbus.adc_value[0] = 0xffff;

	if (v->setup_pbus.use_reg_in_pbus.bit.reg1)
	{
//	  v->read.pbus.adc_value[1] = i_ReadMemory(ADR_FIRST_FREE + adr_adc + a_adc) & 0xfff;
	  v->read.pbus.adc_value[1] = i_ReadMemory(adr_adc++) & 0xfff;
	  a_adc++;
	}
	else
	 v->read.pbus.adc_value[1] = 0xffff;

	if (v->setup_pbus.use_reg_in_pbus.bit.reg2)
	{
	  v->read.pbus.adc_value[2] = i_ReadMemory(ADR_FIRST_FREE + adr_adc + a_adc) & 0xfff;
	  v->read.pbus.adc_value[0] = i_ReadMemory(adr_adc++) & 0xfff;
	  a_adc++;
	}
	else
	 v->read.pbus.adc_value[2] = 0xffff;

	if (v->setup_pbus.use_reg_in_pbus.bit.reg3)
	{
	  v->read.pbus.adc_value[3] = i_ReadMemory(ADR_FIRST_FREE + adr_adc + a_adc) & 0xfff;
	  v->read.pbus.adc_value[0] = i_ReadMemory(adr_adc++) & 0xfff;
	  a_adc++;
	}
	else
	 v->read.pbus.adc_value[3] = 0xffff;

	if (v->setup_pbus.use_reg_in_pbus.bit.reg4)
	{
	  v->read.pbus.adc_value[4] = i_ReadMemory(ADR_FIRST_FREE + adr_adc + a_adc) & 0xfff;
	  v->read.pbus.adc_value[0] = i_ReadMemory(adr_adc++) & 0xfff;
	  a_adc++;
	}
	else
	 v->read.pbus.adc_value[4] = 0xffff;

	if (v->setup_pbus.use_reg_in_pbus.bit.reg5)
	{
	  v->read.pbus.adc_value[5] = i_ReadMemory(ADR_FIRST_FREE + adr_adc + a_adc) & 0xfff;
	  v->read.pbus.adc_value[0] = i_ReadMemory(adr_adc++) & 0xfff;
	  a_adc++;
	}
	else
	 v->read.pbus.adc_value[5] = 0xffff;

	if (v->setup_pbus.use_reg_in_pbus.bit.reg6)
	{
	  v->read.pbus.adc_value[6] = i_ReadMemory(ADR_FIRST_FREE + adr_adc + a_adc) & 0xfff;
	  v->read.pbus.adc_value[0] = i_ReadMemory(adr_adc++) & 0xfff;
	  a_adc++;
	}
	else
	 v->read.pbus.adc_value[6] = 0xffff;

	if (v->setup_pbus.use_reg_in_pbus.bit.reg7)
	{
	  v->read.pbus.adc_value[7] = i_ReadMemory(ADR_FIRST_FREE + adr_adc + a_adc) & 0xfff;
	  v->read.pbus.adc_value[0] = i_ReadMemory(adr_adc++) & 0xfff;
	  a_adc++;
	}
	else
	 v->read.pbus.adc_value[7] = 0xffff;

	if (v->setup_pbus.use_reg_in_pbus.bit.reg8)
	{
	  v->read.pbus.adc_value[8] = i_ReadMemory(ADR_FIRST_FREE + adr_adc + a_adc) & 0xfff;
	  v->read.pbus.adc_value[0] = i_ReadMemory(adr_adc++) & 0xfff;
	  a_adc++;
	}
	else
	 v->read.pbus.adc_value[8] = 0xffff;

	if (v->setup_pbus.use_reg_in_pbus.bit.reg9)
	{
	  v->read.pbus.adc_value[9] = i_ReadMemory(ADR_FIRST_FREE + adr_adc + a_adc) & 0xfff;
	  v->read.pbus.adc_value[0] = i_ReadMemory(adr_adc++) & 0xfff;
	  a_adc++;
	}
	else
	 v->read.pbus.adc_value[9] = 0xffff;

	if (v->setup_pbus.use_reg_in_pbus.bit.reg10)
	{
	  v->read.pbus.adc_value[10] = i_ReadMemory(ADR_FIRST_FREE + adr_adc + a_adc) & 0xfff;
	  v->read.pbus.adc_value[0] = i_ReadMemory(adr_adc++) & 0xfff;
	  a_adc++;
	}
	else
	 v->read.pbus.adc_value[10] = 0xffff;

	if (v->setup_pbus.use_reg_in_pbus.bit.reg11)
	{
	  v->read.pbus.adc_value[11] = i_ReadMemory(ADR_FIRST_FREE + adr_adc + a_adc) & 0xfff;
	  v->read.pbus.adc_value[0] = i_ReadMemory(adr_adc++) & 0xfff;
	  a_adc++;
	}
	else
	 v->read.pbus.adc_value[11] = 0xffff;

	if (v->setup_pbus.use_reg_in_pbus.bit.reg12)
	{
	  v->read.pbus.adc_value[12] = i_ReadMemory(ADR_FIRST_FREE + adr_adc + a_adc) & 0xfff;
	  v->read.pbus.adc_value[0] = i_ReadMemory(adr_adc++) & 0xfff;
	  a_adc++;
	}
	else
	 v->read.pbus.adc_value[12] = 0xffff;

	if (v->setup_pbus.use_reg_in_pbus.bit.reg13)
	{
	  v->read.pbus.adc_value[13] = i_ReadMemory(ADR_FIRST_FREE + adr_adc + a_adc) & 0xfff;
	  v->read.pbus.adc_value[0] = i_ReadMemory(adr_adc++) & 0xfff;
	  a_adc++;
	}
	else
	 v->read.pbus.adc_value[13] = 0xffff;

	if (v->setup_pbus.use_reg_in_pbus.bit.reg14)
	{
	  v->read.pbus.adc_value[14] = i_ReadMemory(ADR_FIRST_FREE + adr_adc + a_adc) & 0xfff;
	  a_adc++;
	}
	else
	 v->read.pbus.adc_value[14] = 0xffff;

	if (v->setup_pbus.use_reg_in_pbus.bit.reg15)
	{
	  v->read.pbus.adc_value[15] = i_ReadMemory(ADR_FIRST_FREE + adr_adc + a_adc) & 0xfff;
	  a_adc++;
	}
	else
	 v->read.pbus.adc_value[15] = 0xffff;
*/
//i_led2_off();
    }
    else
    {
        v->read.pbus.adc_value[0] = 0;
        v->read.pbus.adc_value[1] = 0;
        v->read.pbus.adc_value[2] = 0;
        v->read.pbus.adc_value[3] = 0;
        v->read.pbus.adc_value[4] = 0;
        v->read.pbus.adc_value[5] = 0;
        v->read.pbus.adc_value[6] = 0;
        v->read.pbus.adc_value[7] = 0;
        v->read.pbus.adc_value[8] = 0;
        v->read.pbus.adc_value[9] = 0;
        v->read.pbus.adc_value[10] = 0;
        v->read.pbus.adc_value[11] = 0;
        v->read.pbus.adc_value[12] = 0;
        v->read.pbus.adc_value[13] = 0;
        v->read.pbus.adc_value[14] = 0;
        v->read.pbus.adc_value[15] = 0;
    }
  return 0;
}


///////////////////////////////////////////////
///////////////////////////////////////////////
///////////////////////////////////////////////

void adc_reset_error(T_adc *v)
{
  if (v->useit == 0) 
	  return ;

  if (v->status == component_Error || v->status == component_ErrorSBus)
     v->status = component_Started;

  clear_cur_stat_sbus(&v->status_serial_bus);

  if (v->type_cds_xilinx == TYPE_CDS_XILINX_SP6)
  {

	clear_cur_stat_pbus(&v->status_parallel_bus);

	x_serial_bus_project.slave_addr = v->plane_address; // number plate

//7 cmd_reset_error

    x_serial_bus_project.reg_addr 	= 7;   				 			// adr memory in plate
	x_serial_bus_project.write_data = v->write.sbus.cmd_reset_error;   // write data

    if  (x_serial_bus_project.write(&x_serial_bus_project))              // make write
		v->status_serial_bus.count_write_error++;

  }

}

///////////////////////////////////////////////
///////////////////////////////////////////////

void adc_store_disable_error(T_adc *v)
{
  if (v->useit == 0) 
	  return ;

  if (v->type_cds_xilinx == TYPE_CDS_XILINX_SP6)
  {

   v->store_protect_error = v->write.sbus.protect_error.all;
   v->write.sbus.protect_error.all = 0; // disable all error.

   adc_write_sbus(v);

  }

}

///////////////////////////////////////////////
///////////////////////////////////////////////
void adc_restore_enable_error(T_adc *v)
{
  if (v->useit == 0) 
	  return ;

  if (v->type_cds_xilinx == TYPE_CDS_XILINX_SP6)
  {

   v->write.sbus.protect_error.all = v->store_protect_error; // restore all setup error.   
   adc_write_sbus(v);

  }

}

///////////////////////////////////////////////
///////////////////////////////////////////////






