Глобальная переделка. тест сделан по длине импульса и заданной частоте шим, а не меандру
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@@ -17,8 +17,8 @@
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constexpr uint32_t PWM_OUTPUT_TEST_FREQUENCY_HZ = 1000;
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constexpr uint32_t PWM_OUTPUT_TEST_SWEEP_PERIOD_MS = 2000;
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constexpr uint32_t PWM_OUTPUT_TEST_UPDATE_MS = 10;
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constexpr uint8_t PWM_OUTPUT_TEST_MIN_DUTY_PCT = 5;
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constexpr uint8_t PWM_OUTPUT_TEST_MAX_DUTY_PCT = 95;
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constexpr uint32_t PWM_OUTPUT_TEST_MIN_PULSE_NS = 1000;
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constexpr uint32_t PWM_OUTPUT_TEST_MAX_PULSE_NS = 10000;
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#if CONFIG_IDF_TARGET_ESP32C3
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constexpr bool TARGET_IS_C3 = true;
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@@ -66,17 +66,21 @@ constexpr uint8_t OLED_ROTATION = 0;
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constexpr uint8_t OLED_ADDRESS = 0x3C;
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constexpr uint8_t ESPNOW_WIFI_CHANNEL = 6;
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constexpr uint32_t SERIAL_BAUD = 115200;
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// Native USB CDC may keep a stale "connected" state after light sleep. Keep
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// logging non-blocking so a missing host can never delay button polling.
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constexpr uint32_t SERIAL_TX_TIMEOUT_MS = 2;
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constexpr bool SERIAL_ACTION_LOG = true;
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constexpr bool SERIAL_LOG_TIMESTAMPS = true;
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constexpr bool SERIAL_MINIMAL_LOG = true;
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#define BUTTON_ACTIVE_LEVEL LOW
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// Raw GPIO_RX level that means the optical receiver is active.
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#define RX_ACTIVE_LEVEL LOW
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// PWM_SAFE_LEVEL must switch the optical transmitter fully off and is used
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// during tests whenever PWM is stopped, and while the controller sleeps.
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// PWM_ACTIVE_LEVEL intentionally keeps the transmitter active while the
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// controller is awake and no test is in progress.
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#define RX_ACTIVE_LEVEL HIGH
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// PWM_ACTIVE_LEVEL is the electrical level of the active test pulse and is
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// also used for the constant active output while awake outside a test. During
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// the remainder of a running PWM period the output is !PWM_ACTIVE_LEVEL.
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// PWM_SAFE_LEVEL is used only while PWM is stopped and during sleep; it is
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// independent of the PWM inactive level and may equal PWM_ACTIVE_LEVEL.
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#define PWM_SAFE_LEVEL HIGH
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#define PWM_ACTIVE_LEVEL LOW
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#define PWM_SETTLE_CYCLES 5U
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@@ -99,14 +103,10 @@ constexpr uint32_t LINK_HEARTBEAT_TIMEOUT_MS = 2500;
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constexpr uint32_t FINAL_ACK_RETRY_INTERVAL_MS = 50;
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constexpr uint8_t FINAL_ACK_RETRIES = 2;
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constexpr uint8_t NO_SIGNAL_TIMEOUT_PERIODS = 8;
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constexpr uint16_t RMT_MIN_RECEIVE_SYMBOLS = 48;
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constexpr uint16_t RMT_MAX_RECEIVE_SYMBOLS = 512;
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constexpr uint32_t RMT_TARGET_CHUNK_US = 5000;
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constexpr uint8_t RMT_QUEUE_BLOCKS = 8;
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constexpr uint16_t PERIOD_BATCH_SIZE = 128;
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// Frequency and duty are validated only by their averages over this many
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// complete periods. Individual tick variation is retained for diagnostics but
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// is not itself a test failure.
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// Retained as the minimum statistical depth used by the hardware-resolution
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// calculation and diagnostics. PASS/FAIL is evaluated for every complete
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// pulse independently; accumulated values are used only for display.
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constexpr uint16_t MEASUREMENT_AVERAGING_PERIODS = 100;
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static_assert(MEASUREMENT_AVERAGING_PERIODS > 0,
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"Averaging window must contain at least one period");
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@@ -123,38 +123,40 @@ constexpr uint32_t RX_PROCESSING_PERIODS_PER_SECOND = 300000;
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constexpr uint32_t C3_STRICT_MAX_HZ = 1000000;
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constexpr uint32_t S3_STRICT_MAX_HZ = 1000000;
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// RMT stores each HIGH/LOW duration in 15 bits. Select the fastest clock that
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// still fits both levels of the current PWM signal: 20, 40 or 80 MHz.
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constexpr uint32_t CAPTURE_RESOLUTION_OPTIONS_HZ[] = {20000000, 40000000, 80000000};
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constexpr uint32_t RMT_MAX_LEVEL_TICKS = 32766;
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// S3 MCPWM Capture uses one 32-bit 80 MHz timer for both edges. Unlike RMT,
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// its width does not constrain long LOW/HIGH intervals, so capture precision
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// stays at 12.5 ns for every selectable PWM frequency and pulse length.
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constexpr uint32_t MCPWM_CAPTURE_RESOLUTION_HZ = 80000000;
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// C3 uses the 40 MHz crystal as the LEDC clock.
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// Keep this explicit so the resolution calculation never asks LEDC for an
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// impossible frequency/resolution combination.
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constexpr uint32_t LEDC_SOURCE_CLOCK_HZ = 40000000;
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constexpr uint8_t LEDC_CHANNEL = 0;
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constexpr uint8_t LEDC_MAX_BITS = 14;
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// S3 uses the dedicated MCPWM peripheral. A 40 MHz timer clock keeps the
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// longest 1 kHz period within the S3's 16-bit MCPWM counter and makes every
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// frequency in TEST_FREQUENCIES_HZ exact.
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constexpr uint32_t MCPWM_RESOLUTION_HZ = 40000000;
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// S3 uses the dedicated MCPWM peripheral. A 20 MHz timer clock keeps the
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// selectable 500 Hz period within the S3's 16-bit counter while retaining
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// 50 ns pulse resolution and exact periods for every menu frequency.
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constexpr uint32_t MCPWM_RESOLUTION_HZ = 20000000;
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constexpr uint32_t MCPWM_MAX_PERIOD_TICKS = 65535;
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// -------------------------- Menu value arrays -----------------------------
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// START and END deliberately have separate, independently cycling menu lists.
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// Every value is exactly achievable from a 40 MHz timer clock. The test walks
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// TEST_FREQUENCIES_HZ between the selected endpoints, so there is no
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// separately configurable step.
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constexpr uint32_t START_FREQ_OPTIONS_HZ[] = {1000, 10000, 100000};
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constexpr uint32_t END_FREQ_OPTIONS_HZ[] = {100000, 500000, 1000000};
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// All achievable whole-number frequencies in the supported 1 kHz..1 MHz
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// range, used for adjacent test stages rather than direct menu selection.
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constexpr uint32_t TEST_FREQUENCIES_HZ[] = {
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1000, 2000, 5000, 10000, 25000, 50000,
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100000, 200000, 312500, 400000, 500000, 625000, 800000, 1000000
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// The test uses one selected PWM frequency and walks the pulse-width list from
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// the selected maximum down to the selected minimum. Widths are stored in
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// nanoseconds so sub-microsecond pulses remain representable without floats.
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constexpr uint32_t PWM_FREQUENCY_OPTIONS_HZ[] = {
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500, 1000, 2000, 5000, 10000, 25000,
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};
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constexpr uint32_t MAX_PULSE_OPTIONS_NS[] = {
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20000, 50000, 100000, 200000, 500000
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};
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constexpr uint32_t MIN_PULSE_OPTIONS_NS[] = {
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250, 500, 1000, 2000, 5000, 10000
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};
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constexpr uint32_t TEST_PULSE_WIDTHS_NS[] = {
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250, 500, 1000, 2000, 5000, 10000, 20000, 50000,
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100000, 200000, 500000, 1000000
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};
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constexpr float ACCURACY_OPTIONS_PCT[] = {1.0f, 2.0f, 5.0f, 10.0f};
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constexpr uint32_t TEST_TIME_OPTIONS_MS[] = {100, 250, 500, 1000, 2000, 5000};
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constexpr uint8_t TEST_DUTY_PCT = 50;
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template <typename T, size_t N> constexpr size_t countOf(const T (&)[N]) { return N; }
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