init работает
This commit is contained in:
89
Core/Src/gpio.c
Normal file
89
Core/Src/gpio.c
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@@ -0,0 +1,89 @@
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/* USER CODE BEGIN Header */
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/**
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******************************************************************************
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* @file gpio.c
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* @brief This file provides code for the configuration
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* of all used GPIO pins.
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2026 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* USER CODE END Header */
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/* Includes ------------------------------------------------------------------*/
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#include "gpio.h"
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/* USER CODE BEGIN 0 */
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/* USER CODE END 0 */
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/*----------------------------------------------------------------------------*/
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/* Configure GPIO */
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/*----------------------------------------------------------------------------*/
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/* USER CODE BEGIN 1 */
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/* USER CODE END 1 */
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/** Configure pins as
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* Analog
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* Input
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* Output
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* EVENT_OUT
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* EXTI
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*/
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void MX_GPIO_Init(void)
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{
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GPIO_InitTypeDef GPIO_InitStruct = {0};
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/* GPIO Ports Clock Enable */
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__HAL_RCC_GPIOC_CLK_ENABLE();
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__HAL_RCC_GPIOD_CLK_ENABLE();
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__HAL_RCC_GPIOA_CLK_ENABLE();
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__HAL_RCC_GPIOB_CLK_ENABLE();
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/*Configure GPIO pin Output Level */
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HAL_GPIO_WritePin(GPIOA, DIGIT_HOUR_H_Pin|DIGIT_HOUR_L_Pin|DIGIT_MIN_H_Pin|DIGIT_MIN_L_Pin
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|DIGIT_SEC_H_Pin|DIGIT_SEC_L_Pin, GPIO_PIN_RESET);
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/*Configure GPIO pin Output Level */
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HAL_GPIO_WritePin(GPIOB, SEGMENT_A_Pin|SEGMENT_C_Pin|SEGMENT_B_Pin|SEGMENT_D_Pin
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|SEGMENT_E_Pin|SEGMENT_F_Pin|SEGMENT_G_Pin, GPIO_PIN_RESET);
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/*Configure GPIO pins : PAPin PAPin PAPin PAPin
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PAPin PAPin */
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GPIO_InitStruct.Pin = DIGIT_HOUR_H_Pin|DIGIT_HOUR_L_Pin|DIGIT_MIN_H_Pin|DIGIT_MIN_L_Pin
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|DIGIT_SEC_H_Pin|DIGIT_SEC_L_Pin;
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GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
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HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
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/*Configure GPIO pins : PBPin PBPin PBPin PBPin
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PBPin PBPin PBPin */
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GPIO_InitStruct.Pin = SEGMENT_A_Pin|SEGMENT_C_Pin|SEGMENT_B_Pin|SEGMENT_D_Pin
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|SEGMENT_E_Pin|SEGMENT_F_Pin|SEGMENT_G_Pin;
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GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
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HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
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/*Configure GPIO pins : PAPin PAPin PAPin PAPin */
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GPIO_InitStruct.Pin = SW_ENTER_Pin|SW_UP_Pin|SW_DOWN_Pin|SW_BACK_Pin;
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GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
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}
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/* USER CODE BEGIN 2 */
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/* USER CODE END 2 */
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216
Core/Src/main.c
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216
Core/Src/main.c
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@@ -0,0 +1,216 @@
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/* USER CODE BEGIN Header */
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/**
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******************************************************************************
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* @file : main.c
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* @brief : Main program body
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2026 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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*/
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/* USER CODE END Header */
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/* Includes ------------------------------------------------------------------*/
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#include "main.h"
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#include "rtc.h"
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#include "tim.h"
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#include "gpio.h"
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/* Private includes ----------------------------------------------------------*/
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/* USER CODE BEGIN Includes */
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#include "clock_manager.h"
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#include "menu.h"
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#include "segment.h"
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/* USER CODE END Includes */
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/* Private typedef -----------------------------------------------------------*/
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/* USER CODE BEGIN PTD */
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/* USER CODE END PTD */
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/* Private define ------------------------------------------------------------*/
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/* USER CODE BEGIN PD */
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/* USER CODE END PD */
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/* Private macro -------------------------------------------------------------*/
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/* USER CODE BEGIN PM */
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/* USER CODE END PM */
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/* Private variables ---------------------------------------------------------*/
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/* USER CODE BEGIN PV */
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/* USER CODE END PV */
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/* Private function prototypes -----------------------------------------------*/
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void SystemClock_Config(void);
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/* USER CODE BEGIN PFP */
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/* USER CODE END PFP */
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/* Private user code ---------------------------------------------------------*/
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/* USER CODE BEGIN 0 */
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int ReadButton(int i){
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switch(i)
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{
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case BUTTON_UP:
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return !HAL_GPIO_ReadPin(SW_UP_GPIO_Port, SW_UP_Pin);
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case BUTTON_DOWN:
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return !HAL_GPIO_ReadPin(SW_DOWN_GPIO_Port, SW_DOWN_Pin);
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case BUTTON_SELECT:
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return !HAL_GPIO_ReadPin(SW_ENTER_GPIO_Port, SW_ENTER_Pin);
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case BUTTON_BACK:
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return !HAL_GPIO_ReadPin(SW_BACK_GPIO_Port, SW_BACK_Pin);
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}
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return 0;
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}
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void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) {
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if (htim->Instance == TIM2) {
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Segment_Process();
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}
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}
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/* USER CODE END 0 */
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/**
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* @brief The application entry point.
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* @retval int
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*/
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int main(void)
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{
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/* USER CODE BEGIN 1 */
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/* USER CODE END 1 */
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/* MCU Configuration--------------------------------------------------------*/
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/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
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HAL_Init();
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/* USER CODE BEGIN Init */
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/* USER CODE END Init */
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/* Configure the system clock */
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SystemClock_Config();
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/* USER CODE BEGIN SysInit */
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/* USER CODE END SysInit */
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/* Initialize all configured peripherals */
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MX_GPIO_Init();
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MX_RTC_Init();
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MX_TIM2_Init();
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/* USER CODE BEGIN 2 */
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/* USER CODE END 2 */
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/* Infinite loop */
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/* USER CODE BEGIN WHILE */
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Segment_Init();
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ClockManager_Init();
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Menu_Init();
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HAL_TIM_Base_Start_IT(&htim2);
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while (1)
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{
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Menu_Process();
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/* USER CODE END WHILE */
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/* USER CODE BEGIN 3 */
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}
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/* USER CODE END 3 */
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}
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/**
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* @brief System Clock Configuration
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* @retval None
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*/
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void SystemClock_Config(void)
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{
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RCC_OscInitTypeDef RCC_OscInitStruct = {0};
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RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
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RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
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/** Initializes the RCC Oscillators according to the specified parameters
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* in the RCC_OscInitTypeDef structure.
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*/
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE|RCC_OSCILLATORTYPE_LSE;
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RCC_OscInitStruct.HSEState = RCC_HSE_ON;
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RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
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RCC_OscInitStruct.LSEState = RCC_LSE_ON;
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RCC_OscInitStruct.HSIState = RCC_HSI_ON;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
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RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
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RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
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if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
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{
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Error_Handler();
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}
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/** Initializes the CPU, AHB and APB buses clocks
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*/
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RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
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|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
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RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
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RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
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if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
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{
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Error_Handler();
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}
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PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_RTC;
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PeriphClkInit.RTCClockSelection = RCC_RTCCLKSOURCE_LSE;
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if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
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{
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Error_Handler();
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}
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}
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/* USER CODE BEGIN 4 */
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/* USER CODE END 4 */
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/**
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* @brief This function is executed in case of error occurrence.
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* @retval None
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*/
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void Error_Handler(void)
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{
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/* USER CODE BEGIN Error_Handler_Debug */
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/* User can add his own implementation to report the HAL error return state */
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__disable_irq();
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while (1)
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{
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}
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/* USER CODE END Error_Handler_Debug */
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}
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#ifdef USE_FULL_ASSERT
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/**
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* @brief Reports the name of the source file and the source line number
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* where the assert_param error has occurred.
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* @param file: pointer to the source file name
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* @param line: assert_param error line source number
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* @retval None
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*/
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void assert_failed(uint8_t *file, uint32_t line)
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{
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/* USER CODE BEGIN 6 */
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/* User can add his own implementation to report the file name and line number,
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ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
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/* USER CODE END 6 */
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}
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#endif /* USE_FULL_ASSERT */
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93
Core/Src/rtc.c
Normal file
93
Core/Src/rtc.c
Normal file
@@ -0,0 +1,93 @@
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/* USER CODE BEGIN Header */
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/**
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******************************************************************************
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* @file rtc.c
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* @brief This file provides code for the configuration
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* of the RTC instances.
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******************************************************************************
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* @attention
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*
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||||
* Copyright (c) 2026 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
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||||
*/
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/* USER CODE END Header */
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/* Includes ------------------------------------------------------------------*/
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#include "rtc.h"
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/* USER CODE BEGIN 0 */
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/* USER CODE END 0 */
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RTC_HandleTypeDef hrtc;
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/* RTC init function */
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void MX_RTC_Init(void)
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{
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/* USER CODE BEGIN RTC_Init 0 */
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/* USER CODE END RTC_Init 0 */
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/* USER CODE BEGIN RTC_Init 1 */
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/* USER CODE END RTC_Init 1 */
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/** Initialize RTC Only
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*/
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hrtc.Instance = RTC;
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hrtc.Init.AsynchPrediv = RTC_AUTO_1_SECOND;
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hrtc.Init.OutPut = RTC_OUTPUTSOURCE_ALARM;
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if (HAL_RTC_Init(&hrtc) != HAL_OK)
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{
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Error_Handler();
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}
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/* USER CODE BEGIN RTC_Init 2 */
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/* USER CODE END RTC_Init 2 */
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}
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void HAL_RTC_MspInit(RTC_HandleTypeDef* rtcHandle)
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{
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if(rtcHandle->Instance==RTC)
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{
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/* USER CODE BEGIN RTC_MspInit 0 */
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/* USER CODE END RTC_MspInit 0 */
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HAL_PWR_EnableBkUpAccess();
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/* Enable BKP CLK enable for backup registers */
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__HAL_RCC_BKP_CLK_ENABLE();
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/* RTC clock enable */
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__HAL_RCC_RTC_ENABLE();
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/* USER CODE BEGIN RTC_MspInit 1 */
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/* USER CODE END RTC_MspInit 1 */
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}
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}
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void HAL_RTC_MspDeInit(RTC_HandleTypeDef* rtcHandle)
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{
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if(rtcHandle->Instance==RTC)
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{
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/* USER CODE BEGIN RTC_MspDeInit 0 */
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||||
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/* USER CODE END RTC_MspDeInit 0 */
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/* Peripheral clock disable */
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||||
__HAL_RCC_RTC_DISABLE();
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/* USER CODE BEGIN RTC_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END RTC_MspDeInit 1 */
|
||||
}
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN 1 */
|
||||
|
||||
/* USER CODE END 1 */
|
||||
331
Core/Src/segment_tim.c
Normal file
331
Core/Src/segment_tim.c
Normal file
@@ -0,0 +1,331 @@
|
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#include "segment.h"
|
||||
#include "main.h"
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||||
|
||||
// ==================== ТАЙМЕР ДЛЯ ПРЕРЫВАНИЙ ====================
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#define SEGMENT_PROCESS_TIMER htim1
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// ==================== КОНФИГУРАЦИЯ ДИСПЛЕЯ ====================
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#define DIGITS_COUNT 6
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#define MULTIPLEX_FREQ_HZ 10000
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#define PWM_FREQUENCY_HZ 10000
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#define PWM_RESOLUTION 100
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#define TIMER_BUS_FREQ_MHZ 72
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||||
|
||||
#define SWAP_BIT5_BIT6(x) (((x) & 0x9F) | (((x) & 0x20) << 1) | (((x) & 0x40) >> 1))
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|
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// ==================== ИНИЦИАЛИЗАЦИЯ СЕГМЕНТОВ ====================
|
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SegCtrl_t segments[7] = {
|
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SEG_A_CONFIG,
|
||||
SEG_B_CONFIG,
|
||||
SEG_C_CONFIG,
|
||||
SEG_D_CONFIG,
|
||||
SEG_E_CONFIG,
|
||||
SEG_F_CONFIG,
|
||||
SEG_G_CONFIG
|
||||
};
|
||||
|
||||
// ==================== ТАБЛИЦА СЕГМЕНТОВ ====================
|
||||
// 1 - сегмент включен, 0 - выключен
|
||||
static const uint8_t segmentTable[10] = {
|
||||
0x3F, // 0: 0011 1111 - A,B,C,D,E,F
|
||||
0x06, // 1: 0000 0110 - B,C
|
||||
0x5B, // 2: 0101 1011 - A,B,D,E,G
|
||||
0x4F, // 3: 0100 1111 - A,B,C,D,G
|
||||
0x66, // 4: 0110 0110 - B,C,F,G
|
||||
0x6D, // 5: 0110 1101 - A,C,D,F,G
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||||
0x7D, // 6: 0111 1101 - A,C,D,E,F,G
|
||||
0x07, // 7: 0000 0111 - A,B,C
|
||||
0x7F, // 8: 0111 1111 - все сегменты
|
||||
0x6F // 9: 0110 1111 - A,B,C,D,F,G
|
||||
};
|
||||
|
||||
static const uint8_t activeSegmentsCount[10] = {
|
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6, 2, 5, 5, 4, 5, 6, 3, 7, 6
|
||||
};
|
||||
|
||||
// ==================== ПЕРЕМЕННЫЕ ====================
|
||||
static uint8_t displayBuffer[DIGITS_COUNT];
|
||||
static uint8_t currentPos = 0;
|
||||
static TimeStruct currentTime;
|
||||
static uint8_t globalBrightness = 100;
|
||||
static uint8_t digitCompensation[10];
|
||||
static uint32_t switchIntervalTicks;
|
||||
static uint32_t tickCounter = 0;
|
||||
|
||||
// ==================== ФУНКЦИИ УПРАВЛЕНИЯ РАЗРЯДАМИ ====================
|
||||
|
||||
static void DisableAllDigits(void) {
|
||||
DIGIT_HOUR_H_GPIO_Port->BSRR = DIGIT_HOUR_H_Pin << 16;
|
||||
DIGIT_HOUR_L_GPIO_Port->BSRR = DIGIT_HOUR_L_Pin << 16;
|
||||
DIGIT_MIN_H_GPIO_Port->BSRR = DIGIT_MIN_H_Pin << 16;
|
||||
DIGIT_MIN_L_GPIO_Port->BSRR = DIGIT_MIN_L_Pin << 16;
|
||||
DIGIT_SEC_H_GPIO_Port->BSRR = DIGIT_SEC_H_Pin << 16;
|
||||
DIGIT_SEC_L_GPIO_Port->BSRR = DIGIT_SEC_L_Pin << 16;
|
||||
}
|
||||
|
||||
static void EnableDigit(uint8_t pos) {
|
||||
switch(pos) {
|
||||
case 0: DIGIT_HOUR_H_GPIO_Port->BSRR = DIGIT_HOUR_H_Pin; break;
|
||||
case 1: DIGIT_HOUR_L_GPIO_Port->BSRR = DIGIT_HOUR_L_Pin; break;
|
||||
case 2: DIGIT_MIN_H_GPIO_Port->BSRR = DIGIT_MIN_H_Pin; break;
|
||||
case 3: DIGIT_MIN_L_GPIO_Port->BSRR = DIGIT_MIN_L_Pin; break;
|
||||
case 4: DIGIT_SEC_H_GPIO_Port->BSRR = DIGIT_SEC_H_Pin; break;
|
||||
case 5: DIGIT_SEC_L_GPIO_Port->BSRR = DIGIT_SEC_L_Pin; break;
|
||||
}
|
||||
}
|
||||
|
||||
// ==================== ИНИЦИАЛИЗАЦИЯ CCMR ДЛЯ КАЖДОГО СЕГМЕНТА ====================
|
||||
|
||||
static void InitChannel(SegCtrl_t *seg) {
|
||||
// Определяем указатель на CCMR регистр и сдвиг в зависимости от канала
|
||||
if (seg->channel == TIM_CHANNEL_1) {
|
||||
seg->ccmr_ptr = (uint32_t*)&seg->htim->Instance->CCMR1;
|
||||
seg->ccmr_shift = 0;
|
||||
if(!seg->isComplementary)
|
||||
seg->htim->Instance->CCER &= ~TIM_CCER_CC1P; // Сброс бита CC1P
|
||||
else
|
||||
seg->htim->Instance->CCER |= TIM_CCER_CC1P; // Установка бита CC1P
|
||||
|
||||
} else if (seg->channel == TIM_CHANNEL_2) {
|
||||
seg->ccmr_ptr = (uint32_t*)&seg->htim->Instance->CCMR1;
|
||||
seg->ccmr_shift = 8;
|
||||
if(!seg->isComplementary)
|
||||
seg->htim->Instance->CCER &= ~TIM_CCER_CC2P; // Сброс бита CC2P
|
||||
else
|
||||
seg->htim->Instance->CCER |= TIM_CCER_CC2P; // Установка бита CC2P
|
||||
|
||||
} else if (seg->channel == TIM_CHANNEL_3) {
|
||||
seg->ccmr_ptr = (uint32_t*)&seg->htim->Instance->CCMR2;
|
||||
seg->ccmr_shift = 0;
|
||||
if(!seg->isComplementary)
|
||||
seg->htim->Instance->CCER &= ~TIM_CCER_CC3P; // Сброс бита CC3P
|
||||
else
|
||||
seg->htim->Instance->CCER |= TIM_CCER_CC3P; // Установка бита CC3P
|
||||
|
||||
} else if (seg->channel == TIM_CHANNEL_4) {
|
||||
seg->ccmr_ptr = (uint32_t*)&seg->htim->Instance->CCMR2;
|
||||
seg->ccmr_shift = 8;
|
||||
if(!seg->isComplementary)
|
||||
seg->htim->Instance->CCER &= ~TIM_CCER_CC4P; // Сброс бита CC4P
|
||||
else
|
||||
seg->htim->Instance->CCER |= TIM_CCER_CC4P; // Установка бита CC4P
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
// ==================== ФУНКЦИИ УПРАВЛЕНИЯ ШИМ ====================
|
||||
|
||||
static inline void PWM_StartChannel(SegCtrl_t *seg) {
|
||||
if (seg->isComplementary) {
|
||||
HAL_TIMEx_PWMN_Start(seg->htim, seg->channel);
|
||||
} else {
|
||||
HAL_TIM_PWM_Start(seg->htim, seg->channel);
|
||||
}
|
||||
}
|
||||
|
||||
static inline void PWM_SetMode(SegCtrl_t *seg, uint32_t mode) {
|
||||
uint32_t mask = 0x7 << (seg->ccmr_shift+4);
|
||||
*seg->ccmr_ptr &= ~mask;
|
||||
*seg->ccmr_ptr |= (mode << seg->ccmr_shift);
|
||||
}
|
||||
|
||||
static inline void PWM_SetDuty(SegCtrl_t *seg, uint32_t duty) {
|
||||
uint32_t final_duty = duty;
|
||||
|
||||
if (duty > PWM_RESOLUTION) duty = PWM_RESOLUTION;
|
||||
|
||||
if (final_duty == 0) {
|
||||
PWM_SetMode(seg, TIM_OCMODE_FORCED_INACTIVE);
|
||||
} else {
|
||||
PWM_SetMode(seg, TIM_OCMODE_PWM1);
|
||||
__HAL_TIM_SET_COMPARE(seg->htim, seg->channel, final_duty);
|
||||
}
|
||||
}
|
||||
|
||||
// ==================== АВТОНАСТРОЙКА ТАЙМЕРА ====================
|
||||
|
||||
static void TimerAutoConfig(TIM_HandleTypeDef *htim) {
|
||||
uint32_t timer_clock_hz = TIMER_BUS_FREQ_MHZ * 1000000;
|
||||
|
||||
uint32_t arr = PWM_RESOLUTION - 1;
|
||||
uint32_t prescaler_plus1 = timer_clock_hz / (PWM_FREQUENCY_HZ * PWM_RESOLUTION);
|
||||
|
||||
if (prescaler_plus1 < 1) prescaler_plus1 = 1;
|
||||
if (prescaler_plus1 > 65535) prescaler_plus1 = 65535;
|
||||
|
||||
uint32_t prescaler = prescaler_plus1 - 1;
|
||||
|
||||
__HAL_TIM_SET_PRESCALER(htim, prescaler);
|
||||
__HAL_TIM_SET_AUTORELOAD(htim, arr);
|
||||
}
|
||||
|
||||
// ==================== ФУНКЦИИ УПРАВЛЕНИЯ СЕГМЕНТАМИ ====================
|
||||
|
||||
static void SetSegment(uint8_t segIndex, uint8_t state) {
|
||||
SegCtrl_t *seg = &segments[segIndex];
|
||||
seg->isActive = state;
|
||||
if (state) {
|
||||
PWM_SetDuty(seg, seg->Duty);
|
||||
} else {
|
||||
PWM_SetDuty(seg, 0);
|
||||
}
|
||||
}
|
||||
|
||||
static void SetSegmentBrightness(uint8_t segIndex, uint8_t percent) {
|
||||
SegCtrl_t *seg = &segments[segIndex];
|
||||
if (percent > 100) percent = 100;
|
||||
seg->Duty = (percent * PWM_RESOLUTION) / 100;
|
||||
}
|
||||
|
||||
static void DisplayDigit(uint8_t digit, uint8_t pos) {
|
||||
if (digit > 9) digit = 0;
|
||||
uint8_t segmentMask = segmentTable[digit];
|
||||
|
||||
if (pos == 5) {
|
||||
segmentMask = SWAP_BIT5_BIT6(segmentMask);
|
||||
}
|
||||
|
||||
// Применяем компенсацию для текущей цифры
|
||||
uint8_t comp = digitCompensation[digit];
|
||||
uint8_t finalBrightness = (globalBrightness * comp) / 100;
|
||||
|
||||
for (int i = 0; i < 7; i++) {
|
||||
SetSegmentBrightness(i, finalBrightness);
|
||||
if ((segmentMask >> i) & 1) {
|
||||
SetSegment(i, 1);
|
||||
} else {
|
||||
SetSegment(i, 0);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// ==================== ФУНКЦИИ ОБНОВЛЕНИЯ БУФЕРА ====================
|
||||
|
||||
static void UpdateDisplayBuffer(void) {
|
||||
uint8_t hours = currentTime.hours;
|
||||
uint8_t minutes = currentTime.minutes;
|
||||
uint8_t seconds = currentTime.seconds;
|
||||
|
||||
static const uint8_t div10[100] = {
|
||||
0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,
|
||||
2,2,2,2,2,2,2,2,2,2,3,3,3,3,3,3,3,3,3,3,
|
||||
4,4,4,4,4,4,4,4,4,4,5,5,5,5,5,5,5,5,5,5,
|
||||
6,6,6,6,6,6,6,6,6,6,7,7,7,7,7,7,7,7,7,7,
|
||||
8,8,8,8,8,8,8,8,8,8,9,9,9,9,9,9,9,9,9,9
|
||||
};
|
||||
|
||||
static const uint8_t mod10[100] = {
|
||||
0,1,2,3,4,5,6,7,8,9,0,1,2,3,4,5,6,7,8,9,
|
||||
0,1,2,3,4,5,6,7,8,9,0,1,2,3,4,5,6,7,8,9,
|
||||
0,1,2,3,4,5,6,7,8,9,0,1,2,3,4,5,6,7,8,9,
|
||||
0,1,2,3,4,5,6,7,8,9,0,1,2,3,4,5,6,7,8,9,
|
||||
0,1,2,3,4,5,6,7,8,9,0,1,2,3,4,5,6,7,8,9
|
||||
};
|
||||
|
||||
displayBuffer[0] = div10[hours];
|
||||
displayBuffer[1] = mod10[hours];
|
||||
displayBuffer[2] = div10[minutes];
|
||||
displayBuffer[3] = mod10[minutes];
|
||||
displayBuffer[4] = div10[seconds];
|
||||
displayBuffer[5] = mod10[seconds];
|
||||
}
|
||||
|
||||
static void NextDigit(void) {
|
||||
DisableAllDigits();
|
||||
|
||||
currentPos++;
|
||||
if (currentPos >= DIGITS_COUNT) {
|
||||
currentPos = 0;
|
||||
}
|
||||
|
||||
DisplayDigit(displayBuffer[currentPos], currentPos);
|
||||
EnableDigit(currentPos);
|
||||
}
|
||||
|
||||
// ==================== ПУБЛИЧНЫЕ ФУНКЦИИ ====================
|
||||
|
||||
void Segment_Init(void) {
|
||||
TIM_HandleTypeDef* configuredTimers[10] = {0};
|
||||
int timerCount = 0;
|
||||
|
||||
// Инициализируем CCMR для каждого сегмента
|
||||
for (int i = 0; i < 7; i++) {
|
||||
InitChannel(&segments[i]);
|
||||
}
|
||||
|
||||
// Настраиваем и запускаем все уникальные таймеры для ШИМ
|
||||
for (int i = 0; i < 7; i++) {
|
||||
TIM_HandleTypeDef *htim = segments[i].htim;
|
||||
|
||||
int alreadyConfigured = 0;
|
||||
for (int j = 0; j < timerCount; j++) {
|
||||
if (configuredTimers[j] == htim) {
|
||||
alreadyConfigured = 1;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (!alreadyConfigured) {
|
||||
TimerAutoConfig(htim);
|
||||
configuredTimers[timerCount++] = htim;
|
||||
}
|
||||
|
||||
PWM_StartChannel(&segments[i]);
|
||||
}
|
||||
|
||||
// Инициализация сегментов
|
||||
for (int i = 0; i < 7; i++) {
|
||||
segments[i].Duty = 0;
|
||||
segments[i].isActive = 0;
|
||||
PWM_SetDuty(&segments[i], 0);
|
||||
}
|
||||
|
||||
// Рассчитываем компенсацию яркости для каждой цифры
|
||||
// Чем меньше сегментов у цифры, тем ярче должен гореть каждый сегмент
|
||||
for (int i = 0; i < 10; i++) {
|
||||
// Максимальное количество сегментов = 7 (цифра 8)
|
||||
// Коэффициент = (7 / количество_сегментов_у_цифры) * 100
|
||||
digitCompensation[i] = (activeSegmentsCount[i] * 100) / 7;
|
||||
if (digitCompensation[i] > 200) digitCompensation[i] = 200; // Ограничиваем
|
||||
}
|
||||
|
||||
currentTime.hours = 0;
|
||||
currentTime.minutes = 0;
|
||||
currentTime.seconds = 0;
|
||||
UpdateDisplayBuffer();
|
||||
|
||||
switchIntervalTicks = PWM_FREQUENCY_HZ / MULTIPLEX_FREQ_HZ;
|
||||
if (switchIntervalTicks < 1) switchIntervalTicks = 1;
|
||||
tickCounter = 0;
|
||||
|
||||
DisplayDigit(displayBuffer[0], 0);
|
||||
EnableDigit(0);
|
||||
|
||||
// Запускаем таймер прерываний
|
||||
HAL_TIM_Base_Start_IT(&SEGMENT_PROCESS_TIMER);
|
||||
}
|
||||
|
||||
void Segment_SetBrightness(uint8_t percent) {
|
||||
if (percent > 100) percent = 100;
|
||||
globalBrightness = percent;
|
||||
DisplayDigit(displayBuffer[currentPos], currentPos);
|
||||
}
|
||||
|
||||
void Segment_SetTime(uint8_t hours, uint8_t minutes, uint8_t seconds) {
|
||||
if (hours > 23) hours = 23;
|
||||
if (minutes > 59) minutes = 59;
|
||||
if (seconds > 59) seconds = 59;
|
||||
|
||||
currentTime.hours = hours;
|
||||
currentTime.minutes = minutes;
|
||||
currentTime.seconds = seconds;
|
||||
UpdateDisplayBuffer();
|
||||
}
|
||||
|
||||
void Segment_Process(void) {
|
||||
tickCounter++;
|
||||
if (tickCounter >= switchIntervalTicks) {
|
||||
tickCounter = 0;
|
||||
NextDigit();
|
||||
}
|
||||
}
|
||||
87
Core/Src/stm32f1xx_hal_msp.c
Normal file
87
Core/Src/stm32f1xx_hal_msp.c
Normal file
@@ -0,0 +1,87 @@
|
||||
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f1xx_hal_msp.c
|
||||
* @brief This file provides code for the MSP Initialization
|
||||
* and de-Initialization codes.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2026 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "main.h"
|
||||
/* USER CODE BEGIN Includes */
|
||||
|
||||
/* USER CODE END Includes */
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN TD */
|
||||
|
||||
/* USER CODE END TD */
|
||||
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Define */
|
||||
|
||||
/* USER CODE END Define */
|
||||
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Macro */
|
||||
|
||||
/* USER CODE END Macro */
|
||||
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PV */
|
||||
|
||||
/* USER CODE END PV */
|
||||
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* USER CODE BEGIN PFP */
|
||||
|
||||
/* USER CODE END PFP */
|
||||
|
||||
/* External functions --------------------------------------------------------*/
|
||||
/* USER CODE BEGIN ExternalFunctions */
|
||||
|
||||
/* USER CODE END ExternalFunctions */
|
||||
|
||||
/* USER CODE BEGIN 0 */
|
||||
|
||||
/* USER CODE END 0 */
|
||||
/**
|
||||
* Initializes the Global MSP.
|
||||
*/
|
||||
void HAL_MspInit(void)
|
||||
{
|
||||
|
||||
/* USER CODE BEGIN MspInit 0 */
|
||||
|
||||
/* USER CODE END MspInit 0 */
|
||||
|
||||
__HAL_RCC_AFIO_CLK_ENABLE();
|
||||
__HAL_RCC_PWR_CLK_ENABLE();
|
||||
|
||||
/* System interrupt init*/
|
||||
|
||||
/** NOJTAG: JTAG-DP Disabled and SW-DP Enabled
|
||||
*/
|
||||
__HAL_AFIO_REMAP_SWJ_NOJTAG();
|
||||
|
||||
/* USER CODE BEGIN MspInit 1 */
|
||||
|
||||
/* USER CODE END MspInit 1 */
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN 1 */
|
||||
|
||||
/* USER CODE END 1 */
|
||||
218
Core/Src/stm32f1xx_it.c
Normal file
218
Core/Src/stm32f1xx_it.c
Normal file
@@ -0,0 +1,218 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f1xx_it.c
|
||||
* @brief Interrupt Service Routines.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2026 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "main.h"
|
||||
#include "stm32f1xx_it.h"
|
||||
/* Private includes ----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Includes */
|
||||
#include "segment.h"
|
||||
/* USER CODE END Includes */
|
||||
|
||||
/* Private typedef -----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN TD */
|
||||
|
||||
/* USER CODE END TD */
|
||||
|
||||
/* Private define ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PD */
|
||||
|
||||
/* USER CODE END PD */
|
||||
|
||||
/* Private macro -------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PM */
|
||||
|
||||
/* USER CODE END PM */
|
||||
|
||||
/* Private variables ---------------------------------------------------------*/
|
||||
/* USER CODE BEGIN PV */
|
||||
|
||||
/* USER CODE END PV */
|
||||
|
||||
/* Private function prototypes -----------------------------------------------*/
|
||||
/* USER CODE BEGIN PFP */
|
||||
|
||||
/* USER CODE END PFP */
|
||||
|
||||
/* Private user code ---------------------------------------------------------*/
|
||||
/* USER CODE BEGIN 0 */
|
||||
|
||||
/* USER CODE END 0 */
|
||||
|
||||
/* External variables --------------------------------------------------------*/
|
||||
extern TIM_HandleTypeDef htim2;
|
||||
/* USER CODE BEGIN EV */
|
||||
|
||||
/* USER CODE END EV */
|
||||
|
||||
/******************************************************************************/
|
||||
/* Cortex-M3 Processor Interruption and Exception Handlers */
|
||||
/******************************************************************************/
|
||||
/**
|
||||
* @brief This function handles Non maskable interrupt.
|
||||
*/
|
||||
void NMI_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
|
||||
|
||||
/* USER CODE END NonMaskableInt_IRQn 0 */
|
||||
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
|
||||
while (1)
|
||||
{
|
||||
}
|
||||
/* USER CODE END NonMaskableInt_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Hard fault interrupt.
|
||||
*/
|
||||
void HardFault_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN HardFault_IRQn 0 */
|
||||
|
||||
/* USER CODE END HardFault_IRQn 0 */
|
||||
while (1)
|
||||
{
|
||||
/* USER CODE BEGIN W1_HardFault_IRQn 0 */
|
||||
/* USER CODE END W1_HardFault_IRQn 0 */
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Memory management fault.
|
||||
*/
|
||||
void MemManage_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
|
||||
|
||||
/* USER CODE END MemoryManagement_IRQn 0 */
|
||||
while (1)
|
||||
{
|
||||
/* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
|
||||
/* USER CODE END W1_MemoryManagement_IRQn 0 */
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Prefetch fault, memory access fault.
|
||||
*/
|
||||
void BusFault_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN BusFault_IRQn 0 */
|
||||
|
||||
/* USER CODE END BusFault_IRQn 0 */
|
||||
while (1)
|
||||
{
|
||||
/* USER CODE BEGIN W1_BusFault_IRQn 0 */
|
||||
/* USER CODE END W1_BusFault_IRQn 0 */
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Undefined instruction or illegal state.
|
||||
*/
|
||||
void UsageFault_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN UsageFault_IRQn 0 */
|
||||
|
||||
/* USER CODE END UsageFault_IRQn 0 */
|
||||
while (1)
|
||||
{
|
||||
/* USER CODE BEGIN W1_UsageFault_IRQn 0 */
|
||||
/* USER CODE END W1_UsageFault_IRQn 0 */
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles System service call via SWI instruction.
|
||||
*/
|
||||
void SVC_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN SVCall_IRQn 0 */
|
||||
|
||||
/* USER CODE END SVCall_IRQn 0 */
|
||||
/* USER CODE BEGIN SVCall_IRQn 1 */
|
||||
|
||||
/* USER CODE END SVCall_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Debug monitor.
|
||||
*/
|
||||
void DebugMon_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN DebugMonitor_IRQn 0 */
|
||||
|
||||
/* USER CODE END DebugMonitor_IRQn 0 */
|
||||
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
|
||||
|
||||
/* USER CODE END DebugMonitor_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles Pendable request for system service.
|
||||
*/
|
||||
void PendSV_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN PendSV_IRQn 0 */
|
||||
|
||||
/* USER CODE END PendSV_IRQn 0 */
|
||||
/* USER CODE BEGIN PendSV_IRQn 1 */
|
||||
|
||||
/* USER CODE END PendSV_IRQn 1 */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief This function handles System tick timer.
|
||||
*/
|
||||
void SysTick_Handler(void)
|
||||
{
|
||||
/* USER CODE BEGIN SysTick_IRQn 0 */
|
||||
|
||||
/* USER CODE END SysTick_IRQn 0 */
|
||||
HAL_IncTick();
|
||||
/* USER CODE BEGIN SysTick_IRQn 1 */
|
||||
|
||||
/* USER CODE END SysTick_IRQn 1 */
|
||||
}
|
||||
|
||||
/******************************************************************************/
|
||||
/* STM32F1xx Peripheral Interrupt Handlers */
|
||||
/* Add here the Interrupt Handlers for the used peripherals. */
|
||||
/* For the available peripheral interrupt handler names, */
|
||||
/* please refer to the startup file (startup_stm32f1xx.s). */
|
||||
/******************************************************************************/
|
||||
|
||||
/**
|
||||
* @brief This function handles TIM2 global interrupt.
|
||||
*/
|
||||
void TIM2_IRQHandler(void)
|
||||
{
|
||||
/* USER CODE BEGIN TIM2_IRQn 0 */
|
||||
|
||||
/* USER CODE END TIM2_IRQn 0 */
|
||||
HAL_TIM_IRQHandler(&htim2);
|
||||
/* USER CODE BEGIN TIM2_IRQn 1 */
|
||||
|
||||
/* USER CODE END TIM2_IRQn 1 */
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN 1 */
|
||||
|
||||
/* USER CODE END 1 */
|
||||
406
Core/Src/system_stm32f1xx.c
Normal file
406
Core/Src/system_stm32f1xx.c
Normal file
@@ -0,0 +1,406 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file system_stm32f1xx.c
|
||||
* @author MCD Application Team
|
||||
* @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File.
|
||||
*
|
||||
* 1. This file provides two functions and one global variable to be called from
|
||||
* user application:
|
||||
* - SystemInit(): Setups the system clock (System clock source, PLL Multiplier
|
||||
* factors, AHB/APBx prescalers and Flash settings).
|
||||
* This function is called at startup just after reset and
|
||||
* before branch to main program. This call is made inside
|
||||
* the "startup_stm32f1xx_xx.s" file.
|
||||
*
|
||||
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
|
||||
* by the user application to setup the SysTick
|
||||
* timer or configure other parameters.
|
||||
*
|
||||
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
|
||||
* be called whenever the core clock is changed
|
||||
* during program execution.
|
||||
*
|
||||
* 2. After each device reset the HSI (8 MHz) is used as system clock source.
|
||||
* Then SystemInit() function is called, in "startup_stm32f1xx_xx.s" file, to
|
||||
* configure the system clock before to branch to main program.
|
||||
*
|
||||
* 4. The default value of HSE crystal is set to 8 MHz (or 25 MHz, depending on
|
||||
* the product used), refer to "HSE_VALUE".
|
||||
* When HSE is used as system clock source, directly or through PLL, and you
|
||||
* are using different crystal you have to adapt the HSE value to your own
|
||||
* configuration.
|
||||
*
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2017-2021 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/** @addtogroup CMSIS
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup stm32f1xx_system
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F1xx_System_Private_Includes
|
||||
* @{
|
||||
*/
|
||||
|
||||
#include "stm32f1xx.h"
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F1xx_System_Private_TypesDefinitions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F1xx_System_Private_Defines
|
||||
* @{
|
||||
*/
|
||||
|
||||
#if !defined (HSE_VALUE)
|
||||
#define HSE_VALUE 8000000U /*!< Default value of the External oscillator in Hz.
|
||||
This value can be provided and adapted by the user application. */
|
||||
#endif /* HSE_VALUE */
|
||||
|
||||
#if !defined (HSI_VALUE)
|
||||
#define HSI_VALUE 8000000U /*!< Default value of the Internal oscillator in Hz.
|
||||
This value can be provided and adapted by the user application. */
|
||||
#endif /* HSI_VALUE */
|
||||
|
||||
/*!< Uncomment the following line if you need to use external SRAM */
|
||||
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
|
||||
/* #define DATA_IN_ExtSRAM */
|
||||
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
|
||||
|
||||
/* Note: Following vector table addresses must be defined in line with linker
|
||||
configuration. */
|
||||
/*!< Uncomment the following line if you need to relocate the vector table
|
||||
anywhere in Flash or Sram, else the vector table is kept at the automatic
|
||||
remap of boot address selected */
|
||||
/* #define USER_VECT_TAB_ADDRESS */
|
||||
|
||||
#if defined(USER_VECT_TAB_ADDRESS)
|
||||
/*!< Uncomment the following line if you need to relocate your vector Table
|
||||
in Sram else user remap will be done in Flash. */
|
||||
/* #define VECT_TAB_SRAM */
|
||||
#if defined(VECT_TAB_SRAM)
|
||||
#define VECT_TAB_BASE_ADDRESS SRAM_BASE /*!< Vector Table base address field.
|
||||
This value must be a multiple of 0x200. */
|
||||
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
|
||||
This value must be a multiple of 0x200. */
|
||||
#else
|
||||
#define VECT_TAB_BASE_ADDRESS FLASH_BASE /*!< Vector Table base address field.
|
||||
This value must be a multiple of 0x200. */
|
||||
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
|
||||
This value must be a multiple of 0x200. */
|
||||
#endif /* VECT_TAB_SRAM */
|
||||
#endif /* USER_VECT_TAB_ADDRESS */
|
||||
|
||||
/******************************************************************************/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F1xx_System_Private_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F1xx_System_Private_Variables
|
||||
* @{
|
||||
*/
|
||||
|
||||
/* This variable is updated in three ways:
|
||||
1) by calling CMSIS function SystemCoreClockUpdate()
|
||||
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
|
||||
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
|
||||
Note: If you use this function to configure the system clock; then there
|
||||
is no need to call the 2 first functions listed above, since SystemCoreClock
|
||||
variable is updated automatically.
|
||||
*/
|
||||
uint32_t SystemCoreClock = 8000000;
|
||||
const uint8_t AHBPrescTable[16U] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
|
||||
const uint8_t APBPrescTable[8U] = {0, 0, 0, 0, 1, 2, 3, 4};
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F1xx_System_Private_FunctionPrototypes
|
||||
* @{
|
||||
*/
|
||||
|
||||
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
|
||||
#ifdef DATA_IN_ExtSRAM
|
||||
static void SystemInit_ExtMemCtl(void);
|
||||
#endif /* DATA_IN_ExtSRAM */
|
||||
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F1xx_System_Private_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Setup the microcontroller system
|
||||
* Initialize the Embedded Flash Interface, the PLL and update the
|
||||
* SystemCoreClock variable.
|
||||
* @note This function should be used only after reset.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SystemInit (void)
|
||||
{
|
||||
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
|
||||
#ifdef DATA_IN_ExtSRAM
|
||||
SystemInit_ExtMemCtl();
|
||||
#endif /* DATA_IN_ExtSRAM */
|
||||
#endif
|
||||
|
||||
/* Configure the Vector Table location -------------------------------------*/
|
||||
#if defined(USER_VECT_TAB_ADDRESS)
|
||||
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
|
||||
#endif /* USER_VECT_TAB_ADDRESS */
|
||||
}
|
||||
|
||||
/**
|
||||
* @brief Update SystemCoreClock variable according to Clock Register Values.
|
||||
* The SystemCoreClock variable contains the core clock (HCLK), it can
|
||||
* be used by the user application to setup the SysTick timer or configure
|
||||
* other parameters.
|
||||
*
|
||||
* @note Each time the core clock (HCLK) changes, this function must be called
|
||||
* to update SystemCoreClock variable value. Otherwise, any configuration
|
||||
* based on this variable will be incorrect.
|
||||
*
|
||||
* @note - The system frequency computed by this function is not the real
|
||||
* frequency in the chip. It is calculated based on the predefined
|
||||
* constant and the selected clock source:
|
||||
*
|
||||
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
|
||||
*
|
||||
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
|
||||
*
|
||||
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
|
||||
* or HSI_VALUE(*) multiplied by the PLL factors.
|
||||
*
|
||||
* (*) HSI_VALUE is a constant defined in stm32f1xx.h file (default value
|
||||
* 8 MHz) but the real value may vary depending on the variations
|
||||
* in voltage and temperature.
|
||||
*
|
||||
* (**) HSE_VALUE is a constant defined in stm32f1xx.h file (default value
|
||||
* 8 MHz or 25 MHz, depending on the product used), user has to ensure
|
||||
* that HSE_VALUE is same as the real frequency of the crystal used.
|
||||
* Otherwise, this function may have wrong result.
|
||||
*
|
||||
* - The result of this function could be not correct when using fractional
|
||||
* value for HSE crystal.
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SystemCoreClockUpdate (void)
|
||||
{
|
||||
uint32_t tmp = 0U, pllmull = 0U, pllsource = 0U;
|
||||
|
||||
#if defined(STM32F105xC) || defined(STM32F107xC)
|
||||
uint32_t prediv1source = 0U, prediv1factor = 0U, prediv2factor = 0U, pll2mull = 0U;
|
||||
#endif /* STM32F105xC */
|
||||
|
||||
#if defined(STM32F100xB) || defined(STM32F100xE)
|
||||
uint32_t prediv1factor = 0U;
|
||||
#endif /* STM32F100xB or STM32F100xE */
|
||||
|
||||
/* Get SYSCLK source -------------------------------------------------------*/
|
||||
tmp = RCC->CFGR & RCC_CFGR_SWS;
|
||||
|
||||
switch (tmp)
|
||||
{
|
||||
case 0x00U: /* HSI used as system clock */
|
||||
SystemCoreClock = HSI_VALUE;
|
||||
break;
|
||||
case 0x04U: /* HSE used as system clock */
|
||||
SystemCoreClock = HSE_VALUE;
|
||||
break;
|
||||
case 0x08U: /* PLL used as system clock */
|
||||
|
||||
/* Get PLL clock source and multiplication factor ----------------------*/
|
||||
pllmull = RCC->CFGR & RCC_CFGR_PLLMULL;
|
||||
pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
|
||||
|
||||
#if !defined(STM32F105xC) && !defined(STM32F107xC)
|
||||
pllmull = ( pllmull >> 18U) + 2U;
|
||||
|
||||
if (pllsource == 0x00U)
|
||||
{
|
||||
/* HSI oscillator clock divided by 2 selected as PLL clock entry */
|
||||
SystemCoreClock = (HSI_VALUE >> 1U) * pllmull;
|
||||
}
|
||||
else
|
||||
{
|
||||
#if defined(STM32F100xB) || defined(STM32F100xE)
|
||||
prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U;
|
||||
/* HSE oscillator clock selected as PREDIV1 clock entry */
|
||||
SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
|
||||
#else
|
||||
/* HSE selected as PLL clock entry */
|
||||
if ((RCC->CFGR & RCC_CFGR_PLLXTPRE) != (uint32_t)RESET)
|
||||
{/* HSE oscillator clock divided by 2 */
|
||||
SystemCoreClock = (HSE_VALUE >> 1U) * pllmull;
|
||||
}
|
||||
else
|
||||
{
|
||||
SystemCoreClock = HSE_VALUE * pllmull;
|
||||
}
|
||||
#endif
|
||||
}
|
||||
#else
|
||||
pllmull = pllmull >> 18U;
|
||||
|
||||
if (pllmull != 0x0DU)
|
||||
{
|
||||
pllmull += 2U;
|
||||
}
|
||||
else
|
||||
{ /* PLL multiplication factor = PLL input clock * 6.5 */
|
||||
pllmull = 13U / 2U;
|
||||
}
|
||||
|
||||
if (pllsource == 0x00U)
|
||||
{
|
||||
/* HSI oscillator clock divided by 2 selected as PLL clock entry */
|
||||
SystemCoreClock = (HSI_VALUE >> 1U) * pllmull;
|
||||
}
|
||||
else
|
||||
{/* PREDIV1 selected as PLL clock entry */
|
||||
|
||||
/* Get PREDIV1 clock source and division factor */
|
||||
prediv1source = RCC->CFGR2 & RCC_CFGR2_PREDIV1SRC;
|
||||
prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U;
|
||||
|
||||
if (prediv1source == 0U)
|
||||
{
|
||||
/* HSE oscillator clock selected as PREDIV1 clock entry */
|
||||
SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
|
||||
}
|
||||
else
|
||||
{/* PLL2 clock selected as PREDIV1 clock entry */
|
||||
|
||||
/* Get PREDIV2 division factor and PLL2 multiplication factor */
|
||||
prediv2factor = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> 4U) + 1U;
|
||||
pll2mull = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> 8U) + 2U;
|
||||
SystemCoreClock = (((HSE_VALUE / prediv2factor) * pll2mull) / prediv1factor) * pllmull;
|
||||
}
|
||||
}
|
||||
#endif /* STM32F105xC */
|
||||
break;
|
||||
|
||||
default:
|
||||
SystemCoreClock = HSI_VALUE;
|
||||
break;
|
||||
}
|
||||
|
||||
/* Compute HCLK clock frequency ----------------*/
|
||||
/* Get HCLK prescaler */
|
||||
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)];
|
||||
/* HCLK clock frequency */
|
||||
SystemCoreClock >>= tmp;
|
||||
}
|
||||
|
||||
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
|
||||
/**
|
||||
* @brief Setup the external memory controller. Called in startup_stm32f1xx.s
|
||||
* before jump to __main
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
#ifdef DATA_IN_ExtSRAM
|
||||
/**
|
||||
* @brief Setup the external memory controller.
|
||||
* Called in startup_stm32f1xx_xx.s/.c before jump to main.
|
||||
* This function configures the external SRAM mounted on STM3210E-EVAL
|
||||
* board (STM32 High density devices). This SRAM will be used as program
|
||||
* data memory (including heap and stack).
|
||||
* @param None
|
||||
* @retval None
|
||||
*/
|
||||
void SystemInit_ExtMemCtl(void)
|
||||
{
|
||||
__IO uint32_t tmpreg;
|
||||
/*!< FSMC Bank1 NOR/SRAM3 is used for the STM3210E-EVAL, if another Bank is
|
||||
required, then adjust the Register Addresses */
|
||||
|
||||
/* Enable FSMC clock */
|
||||
RCC->AHBENR = 0x00000114U;
|
||||
|
||||
/* Delay after an RCC peripheral clock enabling */
|
||||
tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_FSMCEN);
|
||||
|
||||
/* Enable GPIOD, GPIOE, GPIOF and GPIOG clocks */
|
||||
RCC->APB2ENR = 0x000001E0U;
|
||||
|
||||
/* Delay after an RCC peripheral clock enabling */
|
||||
tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPDEN);
|
||||
|
||||
(void)(tmpreg);
|
||||
|
||||
/* --------------- SRAM Data lines, NOE and NWE configuration ---------------*/
|
||||
/*---------------- SRAM Address lines configuration -------------------------*/
|
||||
/*---------------- NOE and NWE configuration --------------------------------*/
|
||||
/*---------------- NE3 configuration ----------------------------------------*/
|
||||
/*---------------- NBL0, NBL1 configuration ---------------------------------*/
|
||||
|
||||
GPIOD->CRL = 0x44BB44BBU;
|
||||
GPIOD->CRH = 0xBBBBBBBBU;
|
||||
|
||||
GPIOE->CRL = 0xB44444BBU;
|
||||
GPIOE->CRH = 0xBBBBBBBBU;
|
||||
|
||||
GPIOF->CRL = 0x44BBBBBBU;
|
||||
GPIOF->CRH = 0xBBBB4444U;
|
||||
|
||||
GPIOG->CRL = 0x44BBBBBBU;
|
||||
GPIOG->CRH = 0x444B4B44U;
|
||||
|
||||
/*---------------- FSMC Configuration ---------------------------------------*/
|
||||
/*---------------- Enable FSMC Bank1_SRAM Bank ------------------------------*/
|
||||
|
||||
FSMC_Bank1->BTCR[4U] = 0x00001091U;
|
||||
FSMC_Bank1->BTCR[5U] = 0x00110212U;
|
||||
}
|
||||
#endif /* DATA_IN_ExtSRAM */
|
||||
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
111
Core/Src/tim.c
Normal file
111
Core/Src/tim.c
Normal file
@@ -0,0 +1,111 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file tim.c
|
||||
* @brief This file provides code for the configuration
|
||||
* of the TIM instances.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* Copyright (c) 2026 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software is licensed under terms that can be found in the LICENSE file
|
||||
* in the root directory of this software component.
|
||||
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "tim.h"
|
||||
|
||||
/* USER CODE BEGIN 0 */
|
||||
|
||||
/* USER CODE END 0 */
|
||||
|
||||
TIM_HandleTypeDef htim2;
|
||||
|
||||
/* TIM2 init function */
|
||||
void MX_TIM2_Init(void)
|
||||
{
|
||||
|
||||
/* USER CODE BEGIN TIM2_Init 0 */
|
||||
|
||||
/* USER CODE END TIM2_Init 0 */
|
||||
|
||||
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
|
||||
TIM_MasterConfigTypeDef sMasterConfig = {0};
|
||||
|
||||
/* USER CODE BEGIN TIM2_Init 1 */
|
||||
|
||||
/* USER CODE END TIM2_Init 1 */
|
||||
htim2.Instance = TIM2;
|
||||
htim2.Init.Prescaler = 0;
|
||||
htim2.Init.CounterMode = TIM_COUNTERMODE_UP;
|
||||
htim2.Init.Period = 72*10-1;
|
||||
htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
|
||||
htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
|
||||
if (HAL_TIM_Base_Init(&htim2) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
|
||||
if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
|
||||
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
|
||||
if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK)
|
||||
{
|
||||
Error_Handler();
|
||||
}
|
||||
/* USER CODE BEGIN TIM2_Init 2 */
|
||||
|
||||
/* USER CODE END TIM2_Init 2 */
|
||||
|
||||
}
|
||||
|
||||
void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* tim_baseHandle)
|
||||
{
|
||||
|
||||
if(tim_baseHandle->Instance==TIM2)
|
||||
{
|
||||
/* USER CODE BEGIN TIM2_MspInit 0 */
|
||||
|
||||
/* USER CODE END TIM2_MspInit 0 */
|
||||
/* TIM2 clock enable */
|
||||
__HAL_RCC_TIM2_CLK_ENABLE();
|
||||
|
||||
/* TIM2 interrupt Init */
|
||||
HAL_NVIC_SetPriority(TIM2_IRQn, 0, 0);
|
||||
HAL_NVIC_EnableIRQ(TIM2_IRQn);
|
||||
/* USER CODE BEGIN TIM2_MspInit 1 */
|
||||
|
||||
/* USER CODE END TIM2_MspInit 1 */
|
||||
}
|
||||
}
|
||||
|
||||
void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef* tim_baseHandle)
|
||||
{
|
||||
|
||||
if(tim_baseHandle->Instance==TIM2)
|
||||
{
|
||||
/* USER CODE BEGIN TIM2_MspDeInit 0 */
|
||||
|
||||
/* USER CODE END TIM2_MspDeInit 0 */
|
||||
/* Peripheral clock disable */
|
||||
__HAL_RCC_TIM2_CLK_DISABLE();
|
||||
|
||||
/* TIM2 interrupt Deinit */
|
||||
HAL_NVIC_DisableIRQ(TIM2_IRQn);
|
||||
/* USER CODE BEGIN TIM2_MspDeInit 1 */
|
||||
|
||||
/* USER CODE END TIM2_MspDeInit 1 */
|
||||
}
|
||||
}
|
||||
|
||||
/* USER CODE BEGIN 1 */
|
||||
|
||||
/* USER CODE END 1 */
|
||||
Reference in New Issue
Block a user