511 lines
11 KiB
C
511 lines
11 KiB
C
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#include "DSP281x_Examples.h" // DSP281x Examples Include File
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#include "DSP281x_Device.h" // DSP281x Headerfile Include File
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#include <f281xpwm.h>
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#include <params.h>
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#include <project.h>
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#include <PWMTMSHandle.h>
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#include <PWMTools.h>
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#include <v_pwm24_v2.h>
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#include "CAN_Setup.h"
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#include "global_time.h"
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#include "RS_Functions.h"
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int
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m_PWM = 1, /* 1-ØÈÌ çàêðûò, 0-ØÈÌ îòêðûò */
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Dpwm = 12500,
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Fpwm = 1000,
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Dpwm2 = 6250,
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Dpwm4 = 3125,
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Zpwm = 1; // äåëèòåëü
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//TODO èñïðàâèòü ëîãè÷åñêèé êîñßê
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static int mPWM_a = 0, mPWM_b = 0; //ØÈÌ îáìîòêè à è b 1 - âêë., 0 - âûêë.
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PWMGEND pwmd = PWMGEND_DEFAULTS;
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#if (TMSPWMGEN==1)
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#define DMIN 750 // 15mks Dminimum
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interrupt void PWM_Handler(void)
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{
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// static unsigned int time_tick_sec_mks=0;
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static unsigned int pwm_run=0;
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// Enable more interrupts from this timer
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EvaRegs.EVAIMRA.bit.T1PINT = 1;
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// Note: To be safe, use a mask value to write to the entire
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// EVAIFRA register. Writing to one bit will cause a read-modify-write
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// operation that may have the result of writing 1's to clear
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// bits other then those intended.
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EvaRegs.EVAIFRA.all = BIT7;
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// Acknowledge interrupt to receive more interrupts from PIE group 2
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PieCtrlRegs.PIEACK.all = PIEACK_GROUP2;
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// PWM_ticks++;
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if (pwm_run==1)
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{
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// stop_pwm();
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}
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else
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{
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pwm_run=1;
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EnableInterrupts();
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// if (time_tick_sec_mks>FREQ_PWM)
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// {
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// time_tick_sec++;
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// time_tick_sec_mks=0;
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// }
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// else
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// time_tick_sec_mks++;
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// rs_a.time_wait_rs_out++;
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// rs_b.time_wait_rs_out++;
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// rs_a.time_wait_rs_out_mpu++;
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// rs_b.time_wait_rs_out_mpu++;
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global_time.calc(&global_time);
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inc_RS_timeout_cicle();
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inc_CAN_timeout_cicle();
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// led1_on_off(1);
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PWM_interrupt(); /* Âûçîâ ôóíêöèè óïðàâëåíèy ØÈÌîì */
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// led1_on_off(0);
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pwm_run=0;
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}
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/*
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// Enable more interrupts from this timer
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EvaRegs.EVAIMRA.bit.T1PINT = 1;
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// Note: To be safe, use a mask value to write to the entire
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// EVAIFRA register. Writing to one bit will cause a read-modify-write
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// operation that may have the result of writing 1's to clear
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// bits other then those intended.
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EvaRegs.EVAIFRA.all = BIT7;
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// Acknowledge interrupt to receive more interrupts from PIE group 2
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PieCtrlRegs.PIEACK.all = PIEACK_GROUP2;
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*/
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// led2_on_off(0);
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// disable(); /* çàïðåùàåì ïðåðûâàíèy TMS */
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// SCIb_RX_Int_enable();
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// SCIa_RX_Int_enable();
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}
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#endif
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#if (TMSPWMGEN==1)
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void init_eva_evb()
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{
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// unsigned int tload;
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// stop_pwm();
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EALLOW;
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// EVA Configure T1PWM, T2PWM, PWM1-PWM6
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// Initalize the timers
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// Initalize EVA Timer1
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PieVectTable.T1PINT=&PWM_Handler;
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EvaRegs.EVAIMRA.bit.T1PINT = 1;
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EvaRegs.EVAIFRA.bit.T1PINT = 1;
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// Enable PIE group 2 interrupt 4 for T1PINT
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PieCtrlRegs.PIEIER2.bit.INTx4 = 1;
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// EvaRegs.EVAIFRA.bit.T1OFINT=1;
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// PieVectTable.T1OFINT = &PWM_Handler2;
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// EvaRegs.EVAIMRA.bit.T1OFINT = 1;
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// EvaRegs.EVAIFRA.bit.T1OFINT = 1;
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// Enable PIE group 2 interrupt 7 for T1PINT
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// PieCtrlRegs.PIEIER2.bit.INTx7 = 1;
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//#ifdef DOUBLE_UPDATE_PWM
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// PieVectTable.T1UFINT = &PWM_Handler2;
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// EvaRegs.EVAIMRA.bit.T1UFINT = 1;
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// EvaRegs.EVAIFRA.bit.T1UFINT = 1;
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// Enable PIE group 2 interrupt 7 for T1PINT
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// PieCtrlRegs.PIEIER2.bit.INTx6 = 1;
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//#endif
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// EvaRegs.EVAIFRA.bit.T1CINT=1;
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// PieVectTable.T1CINT = &PWM_Handler2;
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// EvaRegs.EVAIMRA.bit.T1CINT = 1;
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// EvaRegs.EVAIFRA.bit.T1CINT = 1;
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// Enable PIE group 2 interrupt 7 for T1PINT
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// PieCtrlRegs.PIEIER2.bit.INTx5 = 1;
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IER |= M_INT2;
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EDIS;
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// start_pwm();
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}
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#endif
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#if (TMSPWMGEN==1)
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void setup_tms_pwm_int(int pwm_freq, int one_two, int pwm_protect)
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{
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float64 pwm_period;
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// pwm_tick;
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// int prev_interrupt;
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// init_vector();
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// f_disable(); /* çàïðåùàåì ïðåðûâàíèy TMS */
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// *(int *)(VECT_TABLE + VECT_INT2) = (int)PWM_Handler; /* óñòàíàâëèâàåì îáðàáîò÷èê */
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// SET_IEMASK_INT2(); /* Ìàñêà íà ïðåðûâàíèy */
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pwm_period = (float64)HSPCLK/(float64)pwm_freq/2.0;
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Fpwm = (int)pwm_freq;
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Dpwm = (int)pwm_period;
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Dpwm2 = (int)(pwm_period/2);
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Dpwm4 = (int)(pwm_period/4);
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// stop_pwm(); /* Çàïðåùåíèå âûõîäîâ ØÈÌ */
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// setup_pwm_out();
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init_eva_evb();
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EvbRegs.EVBIFRA.bit.PDPINTB=1;
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EvaRegs.EVAIFRA.bit.PDPINTA=1;
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// EVBIFRB
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// Initialize PWM module
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pwmd.PeriodMax = Dpwm; // Perscaler X1 (T1), ISR period = T x 1
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pwmd.PeriodMin = DMIN; // Perscaler X1 (T1), ISR period = T x 1
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// ARpwmd.PeriodMax = Dpwm;
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// ARpwmd.PeriodMin = DMIN;
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//
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pwmd.ShiftPhaseA = 0;//Dpwm/6.0;
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pwmd.ShiftPhaseB = 0;
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pwmd.init(&pwmd);
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// ARpwmd.init(&pwmd);
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// m.m2.bit.WDog_pwm = 0;
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/* pwm1.PeriodMax = Dpwm; // Perscaler X1 (T1), ISR period = T x 1
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pwm1.init(&pwm1);
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pwm2.PeriodMax = Dpwm; // Perscaler X1 (T1), ISR period = T x 1
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pwm2.init(&pwm2); */
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// if(one_two < 1.5) one_two = 0;
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// if(one_two > 1.5) one_two = 0x80000000;
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// addr_xilinx(WG_COUNT) = pwm_divisor; /* Äåëèòåëü ÷àñòîòû ØÈÌà */
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// addr_xilinx(WG_PERIOD) = Dpwm<<16; /* Ïåðèîä ØÈÌ */
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// addr_xilinx(ADR_INT) = one_two; /* Ïðåðûâàíèé çà ïåðèîä */
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// addr_xilinx(WG_PROTECT) = pwm_protect; /* Ðàçðåøåíèå áëîêèðîâêè ØÈÌ */
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//Invoking the computation function
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//svgen_mf1.
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// Initialize the SVGEN_MF module
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/*
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svgen_mf1.FreqMax = _IQ(6*BASE_FREQ*T);
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svgen_mf2.FreqMax = _IQ(6*BASE_FREQ*T);
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svgen_mf2.Offset=_IQ(0);
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svgen_mf1.Offset=_IQ(0);
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svgen_mf1.Alpha = _IQ(0);
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svgen_mf2.Alpha = _IQ(0.52359877559829887307710723054658);
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k=0.1; //0.9;
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freq = 0.499;
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*/
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//svgen_mf1.calc(&svgen_mf1);
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//svgen_mf2.calc(&svgen_mf2);
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// start_pwm_a();
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// start_pwm_b();
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i_WriteMemory(ADR_PWM_DRIVE_MODE, 0x0000); //Âûáèðàåì â êà÷åñòâå èñòî÷íèêà ØÈÌ TMS
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}
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#endif
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/********************************************************************/
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/* Ðàçðåøåíèå âûõîäîâ ØÈÌà */
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/********************************************************************/
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void start_tms_pwm_a()
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{
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unsigned int mask_tk_lines;
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mPWM_a = 1;
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EALLOW;
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EvaRegs.COMCONA.all = 0xa600;//0xA600; // Init COMCONA Register
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EvaRegs.ACTRA.all = 0x0999;
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EDIS;
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}
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void start_tms_pwm_b()
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{
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unsigned int mask_tk_lines;
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mPWM_b = 1;
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EALLOW;
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EvbRegs.COMCONB.all = 0xa600;//0xA600; // Init COMCONA Register
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EvbRegs.ACTRB.all = 0x0999;
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EDIS;
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}
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void start_tms_pwm(void)
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{
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mPWM_a = 1;
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mPWM_b = 1;
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m_PWM = 0;
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// m.m1.bit.PWM=0;
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// m.m1.bit.PWM_A=0;
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// m.m1.bit.PWM_B=0;
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EALLOW;
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// addr_xilinx(WG_OUT)=0x00;
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EvaRegs.COMCONA.all = 0xa600;//0xA600; // Init COMCONA Register
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EvbRegs.COMCONB.all = 0xa600;//0xA600; // Init COMCONA Register
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EvaRegs.ACTRA.all = 0x0999;
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EvbRegs.ACTRB.all = 0x0999;
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// EvaRegs.GPTCONA.bit.TCMPOE=0;
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// EvbRegs.GPTCONB.bit.TCMPOE=0;
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// EvaRegs.T1CON.bit.TECMPR=1;
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// EvbRegs.T3CON.bit.TECMPR=1;
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EDIS;
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}
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/********************************************************************/
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/* Ðàçðåøåíèå îïðåäåëåííûõ âûõîäîâ ØÈÌà */
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/********************************************************************/
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void start_select_tms_pwm(unsigned int mask)
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{
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unsigned int mask_pwm_a,mask_pwm_b;
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unsigned char b,i;
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EALLOW;
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EvaRegs.ACTRA.all = 0x0fff;
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EvbRegs.ACTRB.all = 0x0fff;
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EvaRegs.COMCONA.all = 0xa600;//0xA600; // Init COMCONA Register
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EvbRegs.COMCONB.all = 0xa600;//0xA600; // Init COMCONA Register
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mask_pwm_a=0;
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for (i=0;i<6;i++)
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{
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b=(mask >> i) & 1;
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if (b==0)
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mask_pwm_a |= (1 << (2*i) );
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else
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mask_pwm_a |= (3 << (2*i) );
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}
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mask_pwm_b=0;
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for (i=0;i<6;i++)
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{
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b=(mask >> (i+8)) & 1;
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if (b==0)
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mask_pwm_b |= (1 << (2*i) );
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else
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mask_pwm_b |= (3 << (2*i) );
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}
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EvaRegs.ACTRA.all = mask_pwm_a;
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EvbRegs.ACTRB.all = mask_pwm_b;
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EDIS;
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}
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/********************************************************************/
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/* Çàïðåùåíèå âûõîäîâ ØÈÌà */
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/********************************************************************/
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//#pragma CODE_SECTION(stop_pwm,".fast_run");
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void stop_tms_pwm(void)
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{
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mPWM_a = 0;
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mPWM_b = 0;
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m_PWM = 1;
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// m.m1.bit.PWM=1;
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// m.m1.bit.PWM_A=1;
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// m.m1.bit.PWM_B=1;
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EALLOW;
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// EvaRegs.GPTCONA.bit.TCMPOE=1;
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// EvbRegs.GPTCONB.bit.TCMPOE=1;
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// EvaRegs.T1CON.bit.TECMPR=0;
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// EvbRegs.T3CON.bit.TECMPR=0;
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// addr_xilinx(WG_OUT)=0x0fff; // Òàêîæäå òîðìîçíîé êëþ÷
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EvaRegs.ACTRA.all = 0x0fff;
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EvbRegs.ACTRB.all = 0x0fff;
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// EvaRegs.COMCONA.all = 0xa400;//0xA600; // Init COMCONA Register
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// EvbRegs.COMCONB.all = 0xa400;//0xA600; // Init COMCONA Register
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// EvaRegs.COMCONA.bit.FCMP6OE=0;
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//EvbRegs.COMCONB.bit.FCOMPOE=0;
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//EvaRegs.COMCONA.bit.CENABLE=0;
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//EvbRegs.COMCONB.bit.CENABLE=0;
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EDIS;
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}
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void stop_tms_pwm_a()
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{
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unsigned int mask_tk_lines;
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// m_PWM = 1;
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mPWM_a = 0;
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EALLOW;
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EvaRegs.ACTRA.all = 0x0fff;
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EDIS;
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}
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void stop_tms_pwm_b()
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{
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unsigned int mask_tk_lines;
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m_PWM = 1;
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mPWM_b = 0;
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EALLOW;
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EvbRegs.ACTRB.all = 0x0fff;
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EDIS;
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}
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void setup_tms_pwm_out(void)
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{
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//int b;
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#if (TMSPWMGEN==1)
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EALLOW;
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// GpioMuxRegs.GPDMUX.bit.T3CTRIP_PDPB_GPIOD5=0;
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// GpioMuxRegs.GPDDIR.bit.GPIOD5=0;
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// GpioDataRegs.GPDSET.bit.GPIOD5=1;
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// GpioDataRegs.GPDCLEAR.bit.GPIOD5=1;
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GpioMuxRegs.GPAMUX.bit.PWM1_GPIOA0=1;
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GpioMuxRegs.GPAMUX.bit.PWM2_GPIOA1=1;
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GpioMuxRegs.GPAMUX.bit.PWM3_GPIOA2=1;
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GpioMuxRegs.GPAMUX.bit.PWM4_GPIOA3=1;
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GpioMuxRegs.GPAMUX.bit.PWM5_GPIOA4=1;
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GpioMuxRegs.GPAMUX.bit.PWM6_GPIOA5=1;
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GpioMuxRegs.GPBMUX.bit.PWM7_GPIOB0=1;
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GpioMuxRegs.GPBMUX.bit.PWM8_GPIOB1=1;
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GpioMuxRegs.GPBMUX.bit.PWM9_GPIOB2=1;
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GpioMuxRegs.GPBMUX.bit.PWM10_GPIOB3=1;
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GpioMuxRegs.GPBMUX.bit.PWM11_GPIOB4=1;
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GpioMuxRegs.GPBMUX.bit.PWM12_GPIOB5=1;
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EDIS;
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// îòêðûâàåì áóôåðû
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// write_memory(adr_oe_buf_v,0);
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#endif
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}
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