Razvalyaev
7e0063eee0
Все основные файлы подтянуты без изменений Изменены (только папка main_matlab): - заглушки для ненужных функций (main_matlab.c) - iq библиотека (IQmathLib_matlab.c) - библиотеки DSP281x
463 lines
13 KiB
C
463 lines
13 KiB
C
#ifndef XP_PROJECT_H
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#define XP_PROJECT_H
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#include <project_setup.h>
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#include "DSP281x_Examples.h" // DSP281x Examples Include File
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#include "DSP281x_GlobalPrototypes.h"
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#include "DSP281x_SWPrioritizedIsrLevels.h" // DSP281x Examples Include File
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#include "DSP281x_Device.h"
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#include "DSP281x_Ev.h" // DSP281x Examples Include File
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#include "MemoryFunctions.h"
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#include "Spartan2E_Adr.h"
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#include "Spartan2E_Functions.h"
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#include "TuneUpPlane.h"
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#include "x_int13.h"
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#include "x_parallel_bus.h"
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#include "x_serial_bus.h"
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#include "xerror.h"
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#include "xp_adc.h"
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#include "xp_cds_in.h"
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#include "xp_cds_out.h"
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#include "xp_cds_rs.h"
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#include "xp_cds_tk.h"
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#include "xp_controller.h"
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#include "xp_hwp.h"
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#include "xp_inc_sensor.h"
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#include "xPeriphSP6_loader.h"
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#define WITH_RESET_ALL_PLATES 1
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#define WITHOUT_RESET_ALL_PLATES 0
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#define WITHOUT_RESET_ALL_PLATES_NO_STOP_ERROR 2
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#define WITH_RESET_ALL_PLATES_NO_STOP_ERROR 3
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/////////////////////////////////////////////////////////////
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/////////////////////////////////////////////////////////////
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// Ñóììàðíûå ñòàòóñû ïî âñåì ïëàòàì
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/////////////////////////////////////////////////////////////
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/////////////////////////////////////////////////////////////
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typedef struct {
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#if(C_cds_tk_number>=1)
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T_component_status tk0;
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#endif
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#if(C_cds_tk_number>=2)
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T_component_status tk1;
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#endif
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#if(C_cds_tk_number>=3)
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T_component_status tk2;
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#endif
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#if(C_cds_tk_number>=4)
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T_component_status tk3;
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#endif
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#if(C_cds_tk_number>=5)
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T_component_status tk4;
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#endif
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#if(C_cds_tk_number>=6)
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T_component_status tk5;
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#endif
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#if(C_cds_tk_number>=7)
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T_component_status tk6;
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#endif
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#if(C_cds_tk_number>=8)
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T_component_status tk7;
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#endif
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#if(C_adc_number>=1)
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T_component_status adc0;
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#endif
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#if(C_adc_number>=2)
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T_component_status adc1;
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#endif
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#if(C_adc_number>=3)
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T_component_status adc2;
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#endif
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#if(C_cds_in_number>=1)
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T_component_status in0;
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#endif
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#if(C_cds_in_number>=2)
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T_component_status in1;
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#endif
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#if(C_cds_in_number>=3)
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T_component_status in2;
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#endif
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#if(C_cds_out_number>=1)
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T_component_status out0;
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#endif
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#if(C_cds_out_number>=2)
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T_component_status out1;
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#endif
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#if(C_cds_out_number>=3)
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T_component_status out2;
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#endif
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#if (C_cds_rs_number>=1)
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T_component_status rs0;
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#endif
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#if(C_hwp_number>=1)
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T_component_status hwp0;
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#endif
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#if(C_hwp_number>=2)
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T_component_status hwp1;
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#endif
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#if(C_hwp_number>=3)
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T_component_status hwp2;
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#endif
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} T_project_all_status_plates;
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typedef struct {
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union
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{
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UInt16 all;
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struct
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{
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#if(C_cds_tk_number>=1)
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UInt16 tk0 :1;
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#endif
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#if(C_cds_tk_number>=2)
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UInt16 tk1 :1;
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#endif
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#if(C_cds_tk_number>=3)
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UInt16 tk2 :1;
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#endif
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#if(C_cds_tk_number>=4)
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UInt16 tk3 :1;
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#endif
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#if(C_cds_tk_number>=5)
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UInt16 tk4 :1;
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#endif
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#if(C_cds_tk_number>=6)
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UInt16 tk5 :1;
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#endif
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#if(C_cds_tk_number>=7)
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UInt16 tk6 :1;
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#endif
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#if(C_cds_tk_number>=8)
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UInt16 tk7 :1;
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#endif
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UInt16 res :(16-C_cds_tk_number);
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} bit;
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} errors_tk;
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union
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{
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UInt16 all;
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struct
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{
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#if(C_adc_number>=1)
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UInt16 adc0 :1;
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#endif
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#if(C_adc_number>=2)
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UInt16 adc1 :1;
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#endif
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#if(C_adc_number>=3)
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UInt16 adc2 :1;
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#endif
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#if(C_cds_in_number>=1)
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UInt16 in0 :1;
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#endif
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#if(C_cds_in_number>=2)
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UInt16 in1 :1;
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#endif
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#if(C_cds_in_number>=3)
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UInt16 in2 :1;
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#endif
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#if(C_cds_out_number>=1)
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UInt16 out0 :1;
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#endif
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#if(C_cds_out_number>=2)
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UInt16 out1 :1;
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#endif
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#if(C_cds_out_number>=3)
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UInt16 out2 :1;
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#endif
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#if (C_cds_rs_number>=1)
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UInt16 rs0 :1;
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#endif
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#if(C_hwp_number>=1)
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UInt16 hwp0 :1;
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#endif
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#if(C_hwp_number>=2)
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UInt16 hwp1 :1;
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#endif
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#if(C_hwp_number>=3)
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UInt16 hwp2 :1;
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#endif
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UInt16 res :1;
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} bit;
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} errors;
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} T_project_all_errors_plates;
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#define T_PROJECT_ALL_ERRORS_PLATES_DEFAULTS {0,0}
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/////////////////////////////////////////////////////////////
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/////////////////////////////////////////////////////////////
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typedef struct TS_project{
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T_controller controller;
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// int controller;
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T_project_all_errors_plates all_err_plates;
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T_project_all_status_plates all_status_plates;
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T_cds_tk cds_tk[C_cds_tk_number];
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T_adc adc[C_adc_number];
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T_cds_in cds_in[C_cds_in_number];
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T_cds_out cds_out[C_cds_out_number];
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#if (C_cds_rs_number>=1)
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T_cds_rs cds_rs[C_cds_rs_number];
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#endif
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T_hwp hwp[C_hwp_number];
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// T_omega omega[C_omega_number];
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// T_dispatcher dispatcher;
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// T_project_soft_info soft_info;
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X_SERIAL_BUS *x_serial_bus;
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X_PARALLEL_BUS *x_parallel_bus;
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int inited;
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void (*init)(); // Pointer to calculation function
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void (*read_all_sbus)(); // Pointer to calculation function
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void (*read_all_pbus)();
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void (*write_all_sbus)();
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void (*reload_all_plates_with_reset)(); // ñî ñáðîñîì ïëàò
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void (*reload_all_plates_without_reset)(); // áåç ñáðîñà
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void (*reload_all_plates_with_reset_no_stop_error)(); // ñî ñáðîñîì ïëàò è áåç ñòîïà íà îøèáêàõ
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void (*reload_all_plates_without_reset_no_stop_error)(); // áåç ñáðîñà è áåç ñòîïà íà îøèáêàõ
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void (*write_all_hwp)();
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void (*read_all_hwp)();
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void (*send_reset_all_plates)();
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void (*stop_parallel_bus)();
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void (*start_parallel_bus)();
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void (*clear)();
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void (*read_errors_controller)();
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void (*reset_errors_controller)();
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void (*load_cfg_to_plates)();
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void (*clear_errors_all_plates)();
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void (*disable_all_interrupt)();
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void (*enable_all_interrupt)();
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void (*enable_int13)();
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void (*disable_int13)();
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void (*find_all_cds)();
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} T_project;
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extern T_project project;
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#if(C_cds_tk_number==8)
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#define PROJECT_DEFAULTS_CDS_TK {T_cds_tk_DEFAULTS,T_cds_tk_DEFAULTS,T_cds_tk_DEFAULTS,T_cds_tk_DEFAULTS,T_cds_tk_DEFAULTS, T_cds_tk_DEFAULTS, T_cds_tk_DEFAULTS, T_cds_tk_DEFAULTS}
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#define CDS_TK_STATUS_PLATES_DEFAULTS component_NotReady,component_NotReady,component_NotReady,component_NotReady,component_NotReady,component_NotReady,component_NotReady,component_NotReady
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#endif
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#if(C_cds_tk_number==7)
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#define PROJECT_DEFAULTS_CDS_TK {T_cds_tk_DEFAULTS,T_cds_tk_DEFAULTS,T_cds_tk_DEFAULTS,T_cds_tk_DEFAULTS,T_cds_tk_DEFAULTS, T_cds_tk_DEFAULTS, T_cds_tk_DEFAULTS}
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#define CDS_TK_STATUS_PLATES_DEFAULTS component_NotReady,component_NotReady,component_NotReady,component_NotReady,component_NotReady,component_NotReady,component_NotReady
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#endif
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#if(C_cds_tk_number==6)
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#define PROJECT_DEFAULTS_CDS_TK {T_cds_tk_DEFAULTS,T_cds_tk_DEFAULTS,T_cds_tk_DEFAULTS,T_cds_tk_DEFAULTS,T_cds_tk_DEFAULTS, T_cds_tk_DEFAULTS}
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#define CDS_TK_STATUS_PLATES_DEFAULTS component_NotReady,component_NotReady,component_NotReady,component_NotReady,component_NotReady,component_NotReady
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#endif
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#if(C_cds_tk_number==5)
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#define PROJECT_DEFAULTS_CDS_TK {T_cds_tk_DEFAULTS,T_cds_tk_DEFAULTS,T_cds_tk_DEFAULTS,T_cds_tk_DEFAULTS,T_cds_tk_DEFAULTS}
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#define CDS_TK_STATUS_PLATES_DEFAULTS component_NotReady,component_NotReady,component_NotReady,component_NotReady,component_NotReady
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#endif
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#if(C_cds_tk_number==4)
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#define PROJECT_DEFAULTS_CDS_TK {T_cds_tk_DEFAULTS,T_cds_tk_DEFAULTS,T_cds_tk_DEFAULTS,T_cds_tk_DEFAULTS}
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#define CDS_TK_STATUS_PLATES_DEFAULTS component_NotReady,component_NotReady,component_NotReady,component_NotReady
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#endif
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#if(C_cds_tk_number==3)
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#define PROJECT_DEFAULTS_CDS_TK {T_cds_tk_DEFAULTS,T_cds_tk_DEFAULTS,T_cds_tk_DEFAULTS}
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#define CDS_TK_STATUS_PLATES_DEFAULTS component_NotReady,component_NotReady,component_NotReady
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#endif
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#if(C_cds_tk_number==2)
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#define PROJECT_DEFAULTS_CDS_TK {T_cds_tk_DEFAULTS,T_cds_tk_DEFAULTS}
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#define CDS_TK_STATUS_PLATES_DEFAULTS component_NotReady,component_NotReady
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#endif
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#if(C_cds_tk_number==1)
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#define PROJECT_DEFAULTS_CDS_TK {T_cds_tk_DEFAULTS}
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#define CDS_TK_STATUS_PLATES_DEFAULTS component_NotReady
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#endif
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#if(C_adc_number==1)
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#define PROJECT_DEFAULTS_ADC {T_adc_DEFAULTS}
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#define ADC_STATUS_PLATES_DEFAULTS component_NotReady
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#endif
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#if(C_adc_number==2)
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#define PROJECT_DEFAULTS_ADC {T_adc_DEFAULTS,T_adc_DEFAULTS}
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#define ADC_STATUS_PLATES_DEFAULTS component_NotReady,component_NotReady
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#endif
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#if(C_adc_number==3)
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#define PROJECT_DEFAULTS_ADC {T_adc_DEFAULTS,T_adc_DEFAULTS,T_adc_DEFAULTS}
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#define ADC_STATUS_PLATES_DEFAULTS component_NotReady,component_NotReady,component_NotReady
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#endif
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#if(C_hwp_number==1)
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#define PROJECT_DEFAULTS_HWP T_hwp_DEFAULTS
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#define HWP_STATUS_PLATES_DEFAULTS component_NotReady
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#endif
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#if(C_hwp_number==2)
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#define PROJECT_DEFAULTS_HWP {T_hwp_DEFAULTS, T_hwp_DEFAULTS}
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#define HWP_STATUS_PLATES_DEFAULTS component_NotReady,component_NotReady
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#endif
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#if(C_hwp_number==3)
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#define PROJECT_DEFAULTS_HWP {T_hwp_DEFAULTS, T_hwp_DEFAULTS, T_hwp_DEFAULTS}
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#define HWP_STATUS_PLATES_DEFAULTS component_NotReady,component_NotReady,component_NotReady
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#endif
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#if(C_cds_out_number==1)
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#define PROJECT_DEFAULTS_OUT {T_cds_out_DEFAULTS}
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#define OUT_STATUS_PLATES_DEFAULTS component_NotReady
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#endif
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#if(C_cds_out_number==2)
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#define PROJECT_DEFAULTS_OUT {T_cds_out_DEFAULTS,T_cds_out_DEFAULTS}
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#define OUT_STATUS_PLATES_DEFAULTS component_NotReady,component_NotReady
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#endif
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#if(C_cds_out_number==3)
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#define PROJECT_DEFAULTS_OUT {T_cds_out_DEFAULTS,T_cds_out_DEFAULTS,T_cds_out_DEFAULTS}
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#define OUT_STATUS_PLATES_DEFAULTS component_NotReady,component_NotReady,component_NotReady
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#endif
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#if(C_cds_in_number==1)
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#define PROJECT_DEFAULTS_IN {T_cds_in_DEFAULTS}
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#define IN_STATUS_PLATES_DEFAULTS component_NotReady
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#endif
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#if(C_cds_in_number==2)
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#define PROJECT_DEFAULTS_IN {T_cds_in_DEFAULTS,T_cds_in_DEFAULTS}
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#define IN_STATUS_PLATES_DEFAULTS component_NotReady,component_NotReady
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#endif
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#if(C_cds_in_number==3)
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#define PROJECT_DEFAULTS_IN {T_cds_in_DEFAULTS,T_cds_in_DEFAULTS,T_cds_in_DEFAULTS}
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#define IN_STATUS_PLATES_DEFAULTS component_NotReady,component_NotReady,component_NotReady
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#endif
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#if(C_cds_rs_number>=1)
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#define PROJECT_DEFAULTS_CDS_RS {T_cds_rs_DEFAULTS},
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#define CDS_RS_STATUS_PLATES_DEFAULTS ,component_NotReady
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#else
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#define PROJECT_DEFAULTS_CDS_RS
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#define CDS_RS_STATUS_PLATES_DEFAULTS
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#endif
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#define T_PROJECT_ALL_STATUS_PLATES_DEFAULTS {HWP_STATUS_PLATES_DEFAULTS, ADC_STATUS_PLATES_DEFAULTS, CDS_TK_STATUS_PLATES_DEFAULTS, OUT_STATUS_PLATES_DEFAULTS, IN_STATUS_PLATES_DEFAULTS CDS_RS_STATUS_PLATES_DEFAULTS}
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#define PROJECT_DEFAULTS { T_controller_DEFAULTS, \
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T_PROJECT_ALL_ERRORS_PLATES_DEFAULTS, T_PROJECT_ALL_STATUS_PLATES_DEFAULTS, \
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PROJECT_DEFAULTS_CDS_TK, \
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PROJECT_DEFAULTS_ADC, \
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PROJECT_DEFAULTS_IN, \
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PROJECT_DEFAULTS_OUT, \
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PROJECT_DEFAULTS_CDS_RS \
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PROJECT_DEFAULTS_HWP, \
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NULL, NULL, \
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0,\
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(void (*)(Uint32))project_init, \
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(void (*)(Uint32))project_read_all_sbus, \
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(void (*)(Uint32))project_read_all_pbus,\
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(void (*)(Uint32))project_write_all_sbus,\
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(void (*)(Uint32))project_reload_all_plates_with_reset, \
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(void (*)(Uint32))project_reload_all_plates_without_reset, \
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(void (*)(Uint32))project_reload_all_plates_with_reset_no_stop_error, \
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(void (*)(Uint32))project_reload_all_plates_without_reset_no_stop_error, \
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(void (*)(Uint32))project_write_all_hwp, \
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(void (*)(Uint32))project_read_all_hwp, \
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(void (*)(Uint32))send_reset_all_plates, \
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(void (*)(Uint32))project_stop_parallel_bus, \
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(void (*)(Uint32))project_start_parallel_bus, \
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(void (*)(Uint32))project_clear, \
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(void (*)(Uint32))project_read_errors_controller,\
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(void (*)(Uint32))project_reset_errors_controller, \
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(void (*)(Uint32))project_load_cfg_to_plates, \
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(void (*)(Uint32))project_clear_errors_all_plates, \
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(void (*)(Uint32))project_disable_all_interrupts, \
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(void (*)(Uint32))project_enable_all_interrupts,\
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(void (*)(Uint32))project_enable_int13,\
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(void (*)(Uint32))project_disable_int13,\
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(void (*)(Uint32))project_find_all_cds\
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}
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void project_init(void);
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void project_read_all_sbus(void);
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void project_read_all_pbus(void);
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void project_write_all_sbus(void);
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void project_reload_all_plates_with_reset(void);
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void project_reload_all_plates_without_reset(void);
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void project_reload_all_plates_with_reset_no_stop_error(void);
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void project_reload_all_plates_without_reset_no_stop_error(void);
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void project_write_all_hwp(void);
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void project_read_all_hwp(void);
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void project_autospeed_all_hwp(void);
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void send_reset_all_plates(void);
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unsigned int project_wait_load_all_cds(int flag_reset);
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void project_find_all_cds(void);
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void project_stop_parallel_bus(void);
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void project_start_parallel_bus(void);
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void project_load_cfg_to_plates(void);
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void project_clear(void);
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void project_read_errors_controller(void);
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void project_reset_errors_controller(void);
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void project_reload_all_plates(int reset);
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void project_clear_errors_all_plates(void);
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void project_all_test_hwp(void);
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//////////////////////////////////////////////////////////////////////
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// Îáíîâëåíèå ñóììàðíîãî ñòàòóñà ãîòîâíîñòè è îøèáîê ïî âñåì ïëàòàì
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//////////////////////////////////////////////////////////////////////
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void project_update_all_err_status_plates(void);
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void project_enable_all_interrupts(void);
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void project_disable_all_interrupts(void);
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void project_enable_int13(void);
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void project_disable_int13(void);
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void project_run_init_all_plates(void);
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#endif // end XP_PROJECT_H
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