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matlab_23550/Inu/Src/N12_Xilinx/xp_project.c

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#include "xp_project.h"
#include "x_serial_bus.h"
#include "xp_controller.h"
#pragma DATA_SECTION(project,".fast_vars");
//#pragma DATA_SECTION(project,".slow_vars");
T_project project = PROJECT_DEFAULTS;
void project_enable_all_interrupts(void)
{
KickDog();
EDIS;
EnableInterrupts();
ERTM;// Enable Global realtime interrupt DBGM
KickDog();
}
void project_disable_all_interrupts(void)
{
// KickDog();
DINT;
// DRTM;
// DisableInterrupts();
}
//////////////////////////////////////////////////////////////////////
// Îáíîâëåíèå ñóììàðíîãî ñòàòóñà ãîòîâíîñòè è îøèáîê ïî âñåì ïëàòàì
//////////////////////////////////////////////////////////////////////
#define get_status_err_plates(p) ((p.local_status & ( local_status_Error)) != 0)
void project_update_all_err_status_plates(void)
{
#if(C_cds_tk_number>=1)
project.all_status_plates.tk0 = project.cds_tk[0].status;
project.all_err_plates.errors_tk.bit.tk0 = get_status_err_plates(project.cds_tk[0]);// ((project.cds_tk[0].status & ( component_Error | component_ErrorSBus)) != 0) ;// (project.cds_tk[0].status == component_Error);
#endif
#if(C_cds_tk_number>=2)
project.all_status_plates.tk1 = project.cds_tk[1].status;
project.all_err_plates.errors_tk.bit.tk1 = get_status_err_plates(project.cds_tk[1]);// == component_Error);
#endif
#if(C_cds_tk_number>=3)
project.all_status_plates.tk2 = project.cds_tk[2].status;
project.all_err_plates.errors_tk.bit.tk2 = get_status_err_plates(project.cds_tk[2]);// == component_Error);
#endif
#if(C_cds_tk_number>=4)
project.all_status_plates.tk3 = project.cds_tk[3].status;
project.all_err_plates.errors_tk.bit.tk3 = get_status_err_plates(project.cds_tk[3]);// == component_Error);
#endif
#if(C_cds_tk_number>=5)
project.all_status_plates.tk4 = project.cds_tk[3].status;
project.all_err_plates.errors_tk.bit.tk4 = get_status_err_plates(project.cds_tk[4]);// == component_Error);
#endif
#if(C_cds_tk_number>=6)
project.all_status_plates.tk5 = project.cds_tk[3].status;
project.all_err_plates.errors_tk.bit.tk5 = get_status_err_plates(project.cds_tk[5]);// == component_Error);
#endif
#if(C_cds_tk_number>=7)
project.all_status_plates.tk6 = project.cds_tk[3].status;
project.all_err_plates.errors_tk.bit.tk6 = get_status_err_plates(project.cds_tk[6]);// == component_Error);
#endif
#if(C_cds_tk_number>=8)
project.all_status_plates.tk7 = project.cds_tk[3].status;
project.all_err_plates.errors_tk.bit.tk7 = get_status_err_plates(project.cds_tk[7]);// == component_Error);
#endif
#if(C_cds_out_number>=1)
project.all_status_plates.out0 = project.cds_out[0].status;
project.all_err_plates.errors.bit.out0 = get_status_err_plates(project.cds_out[0]);// == component_Error);
#endif
#if(C_cds_out_number>=2)
project.all_status_plates.out1 = project.cds_out[1].status;
project.all_err_plates.errors.bit.out1 = get_status_err_plates(project.cds_out[1]);// == component_Error);
#endif
#if(C_cds_out_number>=3)
project.all_status_plates.out2 = project.cds_out[2].status;
project.all_err_plates.errors.bit.out2 = get_status_err_plates(project.cds_out[2]);// == component_Error);
#endif
#if(C_cds_in_number>=1)
project.all_status_plates.in0 = project.cds_in[0].status;
project.all_err_plates.errors.bit.in0 = get_status_err_plates(project.cds_in[0]);// == component_Error);
#endif
#if(C_cds_in_number>=2)
project.all_status_plates.in1 = project.cds_in[1].status;
project.all_err_plates.errors.bit.in1 = get_status_err_plates(project.cds_in[1]);// == component_Error);
#endif
#if(C_cds_in_number>=3)
project.all_status_plates.in2 = project.cds_in[2].status;
project.all_err_plates.errors.bit.in2 = get_status_err_plates(project.cds_in[2]);// == component_Error);
#endif
#if(C_adc_number>=1)
project.all_status_plates.adc0 = project.adc[0].status;
project.all_err_plates.errors.bit.adc0 = get_status_err_plates(project.adc[0]);// == component_Error);
#endif
#if(C_adc_number>=2)
project.all_status_plates.adc1 = project.adc[1].status;
project.all_err_plates.errors.bit.adc1 = get_status_err_plates(project.adc[1]);// == component_Error);
#endif
#if(C_adc_number>=3)
project.all_status_plates.adc2 = project.adc[2].status;
project.all_err_plates.errors.bit.adc2 = get_status_err_plates(project.adc[2]);// == component_Error);
#endif
#if(C_hwp_number>=1)
project.all_status_plates.hwp0 = project.hwp[0].status;
project.all_err_plates.errors.bit.hwp0 = get_status_err_plates(project.hwp[0]);// == component_Error);
#endif
#if(C_hwp_number>=2)
project.all_status_plates.hwp1 = project.hwp[1].status;
project.all_err_plates.errors.bit.hwp1 = get_status_err_plates(project.hwp[1]);// == component_Error);
#endif
#if(C_hwp_number>=3)
project.all_status_plates.hwp2 = project.hwp[2].status;
project.all_err_plates.errors.bit.hwp2 = get_status_err_plates(project.hwp[2]);// == component_Error);
#endif
#if(C_cds_rs_number>=1)
project.all_status_plates.rs0 = project.cds_rs[0].status;
project.all_err_plates.errors.bit.rs0 = get_status_err_plates(project.cds_rs[0]);// == component_Error);
#endif
}
void project_all_test_hwp(void)
{
if (project.controller.status != component_Ready)
return;
project.write_all_hwp();
#if(C_hwp_number>=1)
project.hwp[0].internal_test(&project.hwp[0]);
#endif
#if(C_hwp_number>=2)
project.hwp[1].internal_test(&project.hwp[1]);
#endif
#if(C_hwp_number>=3)
project.hwp[2].internal_test(&project.hwp[2]);
#endif
}
////////////////////////////////////////////////////////////////
// ãðóçèì íàñòðîéêè â ïåðèôåð. ïëàòû è HWP
////////////////////////////////////////////////////////////////
void project_load_cfg_to_plates(void)
{
if (project.controller.status != component_Ready)
return;
project.write_all_hwp();
project.write_all_sbus();
}
/////////////////////////////////////////////////////
/////////////////////////////////////////////////////
/////////////////////////////////////////////////////
/////////////////////////////////////////////////////
void project_clear(void)
{
// UInt16 i;
// for(i=0;i<sizeof(T_project);i++)
// *(((UInt16*)(&project)) + i) = 0x0000;
}
void project_reset_errors_controller(void)
{
WriteMemory(ADR_BUS_ERROR_READ, 0x0000);
DELAY_US(100);
}
void project_read_errors_controller(void)
{
project.controller.read_all(&project.controller);
}
void project_start_parallel_bus(void)
{
if (project.controller.status != component_Ready)
return;
x_parallel_bus_project.start(&x_parallel_bus_project);
}
void project_stop_parallel_bus(void)
{
if (project.controller.status != component_Ready)
return;
x_parallel_bus_project.stop(&x_parallel_bus_project);
}
////////////////////////////////////////////////////////////////
// ïîäà÷à îáùåãî ðåñåòà íà ïåðèôåð. ïëàòû
////////////////////////////////////////////////////////////////
void send_reset_all_plates(void)
{
if (project.controller.status == component_Ready)
{
WriteMemory(ADR_CONTR_REG_FOR_WRITE, 0x0000);
DELAY_US(100);
WriteMemory(ADR_CONTR_REG_FOR_WRITE, 0xffff);
}
}
void project_reload_all_plates_with_reset(void)
{
project_reload_all_plates(WITH_RESET_ALL_PLATES);
}
void project_reload_all_plates_with_reset_no_stop_error(void)
{
project_reload_all_plates(WITH_RESET_ALL_PLATES_NO_STOP_ERROR);
}
void project_reload_all_plates_without_reset(void)
{
project_reload_all_plates(WITHOUT_RESET_ALL_PLATES);
}
void project_reload_all_plates_without_reset_no_stop_error(void)
{
project_reload_all_plates(WITHOUT_RESET_ALL_PLATES_NO_STOP_ERROR);
}
////////////////////////////////////////////////////////////////
// ïåðåçàãðóçêà êîíôèã. â ïåðèôåð. ïëàòû:
// 1. ïîäàåì ðåñåò(åñëè íàäî),
// 2. æäåì ãîòîâíîñòè âñåõ ïëàò
// 3. ãðóçèì íàñòðîéêè.
// çàïóñêàåì ïàðàë. øèíó åñëè áûëà çàïóùåíà ðàíüøå.
////////////////////////////////////////////////////////////////
void project_reload_all_plates(int reset)
{
int old_started;
int wait_after_reset = 1;
WriteMemory(ADR_CONTR_REG_FOR_WRITE, 0xffff);
if (project.controller.status == component_Ready)
{
old_started = x_parallel_bus_project.flags.bit.started;
x_parallel_bus_project.stop(&x_parallel_bus_project);
if (reset == WITH_RESET_ALL_PLATES || reset == WITH_RESET_ALL_PLATES_NO_STOP_ERROR)
{
// æäåì ïðîãðóçêè âñåõ ïëàò, ÷òîá íå äàâàòü ñáðîñ êîãäà ïëàòû â ñîñòîßíèè çàãðóçêè
project_wait_load_all_cds(1);
send_reset_all_plates();
}
i_led1_on_off(1);
// îïðåäåëÿåì ñêîðîñòü äëÿ HWP åñëè ñòîèò àâòîâûáîð
DELAY_US(100000);// áåç ýòîé ïàóçû èíîãäà íå ïðîõîäèë àâòîäåòåêò ñêîðîñòè, ñêîðåå âñåãî íå äîæèäàëèñü çàãðóçêè ïëàòû ÌÀÇ
project_autospeed_all_hwp();
// DELAY_US(wait_after_reset);
if (reset == WITHOUT_RESET_ALL_PLATES_NO_STOP_ERROR || reset == WITH_RESET_ALL_PLATES_NO_STOP_ERROR)
project_wait_load_all_cds(1);
else
project_wait_load_all_cds(0);
//project_all_test_hwp();
i_led1_on_off(0);
project.load_cfg_to_plates();
project.reset_errors_controller();
if (old_started)
x_parallel_bus_project.start(&x_parallel_bus_project);
}
project_update_all_err_status_plates();
}
//////////////////////////////////////////////////////////////////
// èíèöèàëèçàöèß ñòðóêòóð äëß ïàðàë. ñåðèàëüí. øèí
// ïðîèçâîäèòñß òîëüêî ïîñëå çàãðóçêè è ñòàðòà XILINX
//////////////////////////////////////////////////////////////////
void project_init(void)
{
project_clear();
x_serial_bus_project.init(&x_serial_bus_project);
x_parallel_bus_project.init(&x_parallel_bus_project);
project.x_serial_bus = &x_serial_bus_project;
project.x_parallel_bus = &x_parallel_bus_project;
///////////////////////////////////////////////////////
///////////////////////////////////////////////////////
///////////////////////////////////////////////////////
///////////////////////////////////////////////////////
#if USE_IN_0
#ifndef TYPE_CDS_XILINX_IN_0
#error "íå îïðåäåëåí TYPE_CDS_XILINX_IN_0 â /main/project_setup.h"
#endif
#if (TYPE_CDS_XILINX_IN_0 == TYPE_CDS_XILINX_SP2)
project.cds_in[0].setup_pbus.count_elements_pbus = T_CDS_IN_COUNT_ADR_PBUS_SP2;
#endif
#if (TYPE_CDS_XILINX_IN_0 == TYPE_CDS_XILINX_SP6)
project.cds_in[0].setup_pbus.count_elements_pbus = T_CDS_IN_COUNT_ADR_PBUS_SP6;
#endif
project.cds_in[0].type_cds_xilinx = TYPE_CDS_XILINX_IN_0;
project.cds_in[0].useit = 1;
#endif
///////////////////////////////////////////////////////
///////////////////////////////////////////////////////
#if USE_IN_1
#ifndef TYPE_CDS_XILINX_IN_1
#error "íå îïðåäåëåí TYPE_CDS_XILINX_IN_1 â /main/project_setup.h"
#endif
project.cds_in[1].type_cds_xilinx = TYPE_CDS_XILINX_IN_1;
project.cds_in[1].useit = 1;
project.cds_in[1].setup_pbus.count_elements_pbus = 1;
#endif
///////////////////////////////////////////////////////
///////////////////////////////////////////////////////
#if USE_IN_2
#ifndef TYPE_CDS_XILINX_IN_2
#error "íå îïðåäåëåí TYPE_CDS_XILINX_IN_2 â /main/project_setup.h"
#endif
project.cds_in[2].type_cds_xilinx = TYPE_CDS_XILINX_IN_2;
project.cds_in[2].useit = 1;
project.cds_in[2].setup_pbus.count_elements_pbus = 1;
#endif
///////////////////////////////////////////////////////
///////////////////////////////////////////////////////
#if USE_ADC_0
#if(C_adc_number<1)
#error "íåïðàâèëüíî îïðåäåëåíî C_adc_number â xp_plane_adr.h"
#endif
#ifndef TYPE_CDS_XILINX_ADC_0
#error "íå îïðåäåëåí TYPE_CDS_XILINX_ADC_0 â /main/project_setup.h"
#endif
project.adc[0].type_cds_xilinx = TYPE_CDS_XILINX_ADC_0;
project.adc[0].useit = 1;
// project.adc[0].count_elements_pbus = 14;
#endif
///////////////////////////////////////////////////////
///////////////////////////////////////////////////////
#if USE_ADC_1
#ifndef TYPE_CDS_XILINX_ADC_1
#error "íå îïðåäåëåí TYPE_CDS_XILINX_ADC_1 â /main/project_setup.h"
#endif
#if(C_adc_number<2)
#error "íåïðàâèëüíî îïðåäåëåíî C_adc_number â xp_plane_adr.h"
#endif
project.adc[1].type_cds_xilinx = TYPE_CDS_XILINX_ADC_1;
project.adc[1].useit = 1;
#endif
///////////////////////////////////////////////////////
///////////////////////////////////////////////////////
#if USE_ADC_2
#ifndef TYPE_CDS_XILINX_ADC_2
#error "íå îïðåäåëåí TYPE_CDS_XILINX_ADC_2 â /main/project_setup.h"
#endif
#if(C_adc_number<3)
#error "íåïðàâèëüíî îïðåäåëåíî C_adc_number â xp_plane_adr.h"
#endif
project.adc[2].type_cds_xilinx = TYPE_CDS_XILINX_ADC_2;
project.adc[2].useit = 1;
#endif
///////////////////////////////////////////////////////
///////////////////////////////////////////////////////
#if USE_OUT_0
#ifndef TYPE_CDS_XILINX_OUT_0
#error "íå îïðåäåëåí TYPE_CDS_XILINX_OUT_0 â /main/project_setup.h"
#endif
project.cds_out[0].type_cds_xilinx = TYPE_CDS_XILINX_OUT_0;
project.cds_out[0].useit = 1;
#endif
///////////////////////////////////////////////////////
///////////////////////////////////////////////////////
#if USE_OUT_1
#ifndef TYPE_CDS_XILINX_OUT_1
#error "íå îïðåäåëåí TYPE_CDS_XILINX_OUT_1 â /main/project_setup.h"
#endif
project.cds_out[1].type_cds_xilinx = TYPE_CDS_XILINX_OUT_1;
project.cds_out[1].useit = 1;
#endif
///////////////////////////////////////////////////////
///////////////////////////////////////////////////////
#if USE_OUT_2
#ifndef TYPE_CDS_XILINX_OUT_2
#error "íå îïðåäåëåí TYPE_CDS_XILINX_OUT_2 â /main/project_setup.h"
#endif
project.cds_out[2].type_cds_xilinx = TYPE_CDS_XILINX_OUT_2;
project.cds_out[2].useit = 1;
#endif
///////////////////////////////////////////////////////
///////////////////////////////////////////////////////
#if USE_TK_0
#ifndef TYPE_CDS_XILINX_TK_0
#error "íå îïðåäåëåí TYPE_CDS_XILINX_TK_0 â /main/project_setup.h"
#endif
#if(C_cds_tk_number<1)
#error "íåïðàâèëüíî îïðåäåëåíî C_cds_tk_number â xp_plane_adr.h"
#endif
project.cds_tk[0].type_cds_xilinx = TYPE_CDS_XILINX_TK_0;
project.cds_tk[0].useit = 1;
#endif
///////////////////////////////////////////////////////
///////////////////////////////////////////////////////
#if USE_TK_1
#ifndef TYPE_CDS_XILINX_TK_1
#error "íå îïðåäåëåí TYPE_CDS_XILINX_TK_1 â /main/project_setup.h"
#endif
#if(C_cds_tk_number<2)
#error "íåïðàâèëüíî îïðåäåëåíî C_cds_tk_number â xp_plane_adr.h"
#endif
project.cds_tk[1].type_cds_xilinx = TYPE_CDS_XILINX_TK_1;
project.cds_tk[1].useit = 1;
#endif
///////////////////////////////////////////////////////
///////////////////////////////////////////////////////
#if USE_TK_2
#ifndef TYPE_CDS_XILINX_TK_2
#error "íå îïðåäåëåí TYPE_CDS_XILINX_TK_2 â /main/project_setup.h"
#endif
#if(C_cds_tk_number<3)
#error "íåïðàâèëüíî îïðåäåëåíî C_cds_tk_number â xp_plane_adr.h"
#endif
project.cds_tk[2].type_cds_xilinx = TYPE_CDS_XILINX_TK_2;
project.cds_tk[2].useit = 1;
#endif
///////////////////////////////////////////////////////
///////////////////////////////////////////////////////
#if USE_TK_3
#ifndef TYPE_CDS_XILINX_TK_3
#error "íå îïðåäåëåí TYPE_CDS_XILINX_TK_3 â /main/project_setup.h"
#endif
#if(C_cds_tk_number<4)
#error "íåïðàâèëüíî îïðåäåëåíî C_cds_tk_number â xp_plane_adr.h"
#endif
project.cds_tk[3].type_cds_xilinx = TYPE_CDS_XILINX_TK_3;
project.cds_tk[3].useit = 1;
#endif
///////////////////////////////////////////////////////
///////////////////////////////////////////////////////
#if USE_TK_4
#ifndef TYPE_CDS_XILINX_TK_4
#error "íå îïðåäåëåí TYPE_CDS_XILINX_TK_4 â /main/project_setup.h"
#endif
#if(C_cds_tk_number<5)
#error "íåïðàâèëüíî îïðåäåëåíî C_cds_tk_number â xp_plane_adr.h"
#endif
project.cds_tk[4].type_cds_xilinx = TYPE_CDS_XILINX_TK_4;
project.cds_tk[4].useit = 1;
#endif
///////////////////////////////////////////////////////
///////////////////////////////////////////////////////
#if USE_TK_5
#ifndef TYPE_CDS_XILINX_TK_5
#error "íå îïðåäåëåí TYPE_CDS_XILINX_TK_5 â /main/project_setup.h"
#endif
#if(C_cds_tk_number<6)
#error "íåïðàâèëüíî îïðåäåëåíî C_cds_tk_number â xp_plane_adr.h"
#endif
project.cds_tk[5].type_cds_xilinx = TYPE_CDS_XILINX_TK_5;
project.cds_tk[5].useit = 1;
#endif
///////////////////////////////////////////////////////
///////////////////////////////////////////////////////
#if USE_TK_6
#ifndef TYPE_CDS_XILINX_TK_6
#error "íå îïðåäåëåí TYPE_CDS_XILINX_TK_6 â /main/project_setup.h"
#endif
#if(C_cds_tk_number<7)
#error "íåïðàâèëüíî îïðåäåëåíî C_cds_tk_number â xp_plane_adr.h"
#endif
project.cds_tk[6].type_cds_xilinx = TYPE_CDS_XILINX_TK_6;
project.cds_tk[6].useit = 1;
#endif
///////////////////////////////////////////////////////
///////////////////////////////////////////////////////
#if USE_TK_7
#ifndef TYPE_CDS_XILINX_TK_7
#error "íå îïðåäåëåí TYPE_CDS_XILINX_TK_7 â /main/project_setup.h"
#endif
#if(C_cds_tk_number<8)
#error "íåïðàâèëüíî îïðåäåëåíî C_cds_tk_number â xp_plane_adr.h"
#endif
project.cds_tk[7].type_cds_xilinx = TYPE_CDS_XILINX_TK_7;
project.cds_tk[7].useit = 1;
#endif
///////////////////////////////////////////////////////
///////////////////////////////////////////////////////
#if USE_ROT_1
#ifndef TYPE_CDS_XILINX_RS_0
#error "íå îïðåäåëåí TYPE_CDS_XILINX_RS_0 â /main/project_setup.h"
#endif
project.cds_rs[0].type_cds_xilinx = TYPE_CDS_XILINX_RS_0;
project.cds_rs[0].useit = 1;
#endif
///////////////////////////////////////////////////////
///////////////////////////////////////////////////////
#if USE_HWP_0
#if(C_hwp_number<1)
#error "íåïðàâèëüíî îïðåäåëåíî C_hwp_number â xp_plane_adr.h"
#endif
project.hwp[0].useit = 1;
#endif
///////////////////////////////////////////////////////
///////////////////////////////////////////////////////
#if USE_HWP_1
#if(C_hwp_number<2)
#error "íåïðàâèëüíî îïðåäåëåíî C_hwp_number â xp_plane_adr.h"
#endif
project.hwp[1].useit = 1;
#endif
///////////////////////////////////////////////////////
///////////////////////////////////////////////////////
#if USE_HWP_2
#if(C_hwp_number<3)
#error "íåïðàâèëüíî îïðåäåëåíî C_hwp_number â xp_plane_adr.h"
#endif
project.hwp[2].useit = 1;
#endif
///////////////////////////////////////////////////////
///////////////////////////////////////////////////////
///////////////////////////////////////////////////////
///////////////////////////////////////////////////////
#if(C_adc_number>=1)
project.adc[0].plane_address = C_adc0_address;
#endif
#if(C_adc_number>=2)
project.adc[1].plane_address = C_adc1_address;
#endif
#if(C_adc_number>=3)
project.adc[2].plane_address = C_adc2_address;
#endif
#if(C_cds_in_number>=1)
project.cds_in[0].plane_address = C_cds_in0_address;
#endif
#if(C_cds_in_number>=2)
project.cds_in[1].plane_address = C_cds_in1_address;
#endif
#if(C_cds_in_number>=3)
project.cds_in[2].plane_address = C_cds_in2_address;
#endif
#if(C_cds_out_number>=1)
project.cds_out[0].plane_address = C_cds_out0_address;
#endif
#if(C_cds_out_number>=2)
project.cds_out[1].plane_address = C_cds_out1_address;
#endif
#if(C_cds_out_number>=3)
project.cds_out[2].plane_address = C_cds_out2_address;
#endif
#if(C_cds_tk_number>=1)
#if(C_cds_tk0_address<1)
#error "íåïðàâèëüíî îïðåäåëåíî C_cds_tk0_address â xp_plane_adr.h"
#endif
project.cds_tk[0].plane_address = C_cds_tk0_address;
#endif
#if(C_cds_tk_number>=2)
#if(C_cds_tk1_address<1)
#error "íåïðàâèëüíî îïðåäåëåíî C_cds_tk1_address â xp_plane_adr.h"
#endif
project.cds_tk[1].plane_address = C_cds_tk1_address;
#endif
#if(C_cds_tk_number>=3)
#if(C_cds_tk2_address<1)
#error "íåïðàâèëüíî îïðåäåëåíî C_cds_tk2_address â xp_plane_adr.h"
#endif
project.cds_tk[2].plane_address = C_cds_tk2_address;
#endif
#if(C_cds_tk_number>=4)
#if(C_cds_tk3_address<1)
#error "íåïðàâèëüíî îïðåäåëåíî C_cds_tk3_address â xp_plane_adr.h"
#endif
project.cds_tk[3].plane_address = C_cds_tk3_address;
#endif
#if(C_cds_tk_number>=5)
#if(C_cds_tk4_address<1)
#error "íåïðàâèëüíî îïðåäåëåíî C_cds_tk4_address â xp_plane_adr.h"
#endif
project.cds_tk[4].plane_address = C_cds_tk4_address;
#endif
#if(C_cds_tk_number>=6)
#if(C_cds_tk5_address<1)
#error "íåïðàâèëüíî îïðåäåëåíî C_cds_tk5_address â xp_plane_adr.h"
#endif
project.cds_tk[5].plane_address = C_cds_tk5_address;
#endif
#if(C_cds_tk_number>=7)
#if(C_cds_tk6_address<1)
#error "íåïðàâèëüíî îïðåäåëåíî C_cds_tk6_address â xp_plane_adr.h"
#endif
project.cds_tk[6].plane_address = C_cds_tk6_address;
#endif
#if(C_cds_tk_number>=8)
#if(C_cds_tk7_address<1)
#error "íåïðàâèëüíî îïðåäåëåíî C_cds_tk7_address â xp_plane_adr.h"
#endif
project.cds_tk[7].plane_address = C_cds_tk7_address;
#endif
#if(C_cds_rs_number>=1)
project.cds_rs[0].plane_address = C_cds_rs0_address;
#endif
#if(C_hwp_number>=1)
project.hwp[0].plane_address = C_hwp0_address;
project.hwp[0].init(&project.hwp[0]);
#endif
#if(C_hwp_number>=2)
project.hwp[1].plane_address = C_hwp1_address;
project.hwp[1].init(&project.hwp[1]);
#endif
#if(C_hwp_number>=3)
project.hwp[2].plane_address = C_hwp2_address;
project.hwp[2].init(&project.hwp[2]);
#endif
if (project.controller.status == component_Ready)
project.controller.build = i_ReadMemory(ADR_CONTROLLER_BUILD);
else
project.controller.build = 0xffff;
project.inited = 1; // åñòü èíèöèàëèçàöèß äàííûõ!
}
///////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////
// èíèöèàëèçàöèß ñòðóêòóð äëß ïåðèôåð. ïëàò
///////////////////////////////////////////////////////////
void project_run_init_all_plates(void)
{
if (project.controller.status == component_Ready)
{
#if(C_adc_number>=1)
if (project.adc[0].status & (component_Started | component_Ready | component_Error ))
project.adc[0].init(&project.adc[0]);
#endif
#if(C_adc_number>=2)
if (project.adc[1].status & (component_Started | component_Ready | component_Error ))
project.adc[1].init(&project.adc[1]);
#endif
#if(C_adc_number>=3)
if (project.adc[2].status & (component_Started | component_Ready | component_Error ))
project.adc[2].init(&project.adc[2]);
#endif
#if(C_cds_tk_number>=1)
if (project.cds_tk[0].status & (component_Started | component_Ready | component_Error ))
project.cds_tk[0].init(&project.cds_tk[0]);
#endif
#if(C_cds_tk_number>=2)
if (project.cds_tk[1].status & (component_Started | component_Ready | component_Error ))
project.cds_tk[1].init(&project.cds_tk[1]);
#endif
#if(C_cds_tk_number>=3)
if (project.cds_tk[2].status & (component_Started | component_Ready | component_Error ))
project.cds_tk[2].init(&project.cds_tk[2]);
#endif
#if(C_cds_tk_number>=4)
if (project.cds_tk[3].status & (component_Started | component_Ready | component_Error ))
project.cds_tk[3].init(&project.cds_tk[3]);
#endif
#if(C_cds_tk_number>=5)
if (project.cds_tk[4].status & (component_Started | component_Ready | component_Error ))
project.cds_tk[4].init(&project.cds_tk[4]);
#endif
#if(C_cds_tk_number>=6)
if (project.cds_tk[5].status & (component_Started | component_Ready | component_Error ))
project.cds_tk[5].init(&project.cds_tk[5]);
#endif
#if(C_cds_tk_number>=7)
if (project.cds_tk[6].status & (component_Started | component_Ready | component_Error ))
project.cds_tk[6].init(&project.cds_tk[6]);
#endif
#if(C_cds_tk_number>=8)
if (project.cds_tk[7].status & (component_Started | component_Ready | component_Error ))
project.cds_tk[7].init(&project.cds_tk[7]);
#endif
#if(C_cds_in_number>=1)
if (project.cds_in[0].status & (component_Started | component_Ready | component_Error ))
project.cds_in[0].init(&project.cds_in[0]);
#endif
#if(C_cds_in_number>=2)
if (project.cds_in[1].status & (component_Started | component_Ready | component_Error ))
project.cds_in[1].init(&project.cds_in[1]);
#endif
#if(C_cds_in_number>=3)
if (project.cds_in[2].status & (component_Started | component_Ready | component_Error ))
project.cds_in[2].init(&project.cds_in[2]);
#endif
#if(C_cds_out_number>=1)
if (project.cds_out[0].status & (component_Started | component_Ready | component_Error ))
project.cds_out[0].init(&project.cds_out[0]);
#endif
#if(C_cds_out_number>=2)
if (project.cds_out[1].status & (component_Started | component_Ready | component_Error ))
project.cds_out[1].init(&project.cds_out[1]);
#endif
#if(C_cds_out_number>=3)
if (project.cds_out[2].status & (component_Started | component_Ready | component_Error ))
project.cds_out[2].init(&project.cds_out[2]);
#endif
#if(C_cds_rs_number>=1)
if (project.cds_rs[0].status & (component_Started | component_Ready | component_Error ))
project.cds_rs[0].init(&project.cds_rs[0]);
#endif
project_all_test_hwp();
//
//#if(C_hwp_number>=1)
// if (project.hwp[0].status & (component_Started | component_Ready | component_Error ))
// project.hwp[0].init(&project.hwp[0]);
//#endif
//#if(C_hwp_number>=2)
// if (project.hwp[1].status & (component_Started | component_Ready | component_Error ))
// project.hwp[1].init(&project.hwp[1]);
//#endif
//#if(C_hwp_number>=3)
// if (project.hwp[2].status & (component_Started | component_Ready | component_Error ))
// project.hwp[2].init(&project.hwp[2]);
//#endif
}
}
///////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////
#define set_local_status(p) p.local_status = p.read.sbus.lock_status_error.all ? local_status_Error : local_status_Ok
#define set_local_status_hwp(p) p.local_status = (p.read.comp_s.minus.all || p.read.comp_s.plus.all) ? local_status_Error : local_status_Ok
///////////////////////////////////////////////////////////
void project_read_all_sbus(void)
{
if (project.controller.status == component_Ready)
{
#if(C_adc_number>=1)
if (project.adc[0].status & (component_Started | component_Ready | component_Error | component_ErrorSBus))
{
project.adc[0].read_sbus(&project.adc[0]);
set_local_status(project.adc[0]);
}
#endif
#if(C_adc_number>=2)
if (project.adc[1].status & (component_Started | component_Ready | component_Error | component_ErrorSBus ))
{
project.adc[1].read_sbus(&project.adc[1]);
set_local_status(project.adc[1]);
}
#endif
#if(C_adc_number>=3)
if (project.adc[2].status & (component_Started | component_Ready | component_Error | component_ErrorSBus ))
{
project.adc[2].read_sbus(&project.adc[2]);
set_local_status(project.adc[2]);
}
#endif
#if(C_cds_tk_number>=1)
if (project.cds_tk[0].status & (component_Started | component_Ready | component_Error | component_ErrorSBus ))
{
project.cds_tk[0].read_sbus(&project.cds_tk[0]);
set_local_status(project.cds_tk[0]);
}
#endif
#if(C_cds_tk_number>=2)
if (project.cds_tk[1].status & (component_Started | component_Ready | component_Error | component_ErrorSBus ))
{
project.cds_tk[1].read_sbus(&project.cds_tk[1]);
set_local_status(project.cds_tk[1]);
}
#endif
#if(C_cds_tk_number>=3)
if (project.cds_tk[2].status & (component_Started | component_Ready | component_Error | component_ErrorSBus ))
{
project.cds_tk[2].read_sbus(&project.cds_tk[2]);
set_local_status(project.cds_tk[2]);
}
#endif
#if(C_cds_tk_number>=4)
if (project.cds_tk[3].status & (component_Started | component_Ready | component_Error | component_ErrorSBus ))
{
project.cds_tk[3].read_sbus(&project.cds_tk[3]);
set_local_status(project.cds_tk[3]);
}
#endif
#if(C_cds_tk_number>=5)
if (project.cds_tk[4].status & (component_Started | component_Ready | component_Error | component_ErrorSBus ))
{
project.cds_tk[4].read_sbus(&project.cds_tk[4]);
set_local_status(project.cds_tk[4]);
}
#endif
#if(C_cds_tk_number>=6)
if (project.cds_tk[5].status & (component_Started | component_Ready | component_Error | component_ErrorSBus ))
{
project.cds_tk[5].read_sbus(&project.cds_tk[5]);
set_local_status(project.cds_tk[5]);
}
#endif
#if(C_cds_tk_number>=7)
if (project.cds_tk[6].status & (component_Started | component_Ready | component_Error | component_ErrorSBus ))
{
project.cds_tk[6].read_sbus(&project.cds_tk[6]);
set_local_status(project.cds_tk[6]);
}
#endif
#if(C_cds_tk_number>=8)
if (project.cds_tk[7].status & (component_Started | component_Ready | component_Error | component_ErrorSBus ))
{
project.cds_tk[7].read_sbus(&project.cds_tk[7]);
set_local_status(project.cds_tk[7]);
}
#endif
#if(C_cds_in_number>=1)
if (project.cds_in[0].status & (component_Started | component_Ready | component_Error | component_ErrorSBus ))
{
project.cds_in[0].read_sbus(&project.cds_in[0]);
set_local_status(project.cds_in[0]);
}
#endif
#if(C_cds_in_number>=2)
if (project.cds_in[1].status & (component_Started | component_Ready | component_Error | component_ErrorSBus ))
{
project.cds_in[1].read_sbus(&project.cds_in[1]);
set_local_status(project.cds_in[1]);
}
#endif
#if(C_cds_in_number>=3)
if (project.cds_in[2].status & (component_Started | component_Ready | component_Error | component_ErrorSBus ))
{
project.cds_in[2].read_sbus(&project.cds_in[2]);
set_local_status(project.cds_in[2]);
}
#endif
#if(C_cds_rs_number>=1)
if (project.cds_rs[0].status & (component_Started | component_Ready | component_Error | component_ErrorSBus ))
{
project.cds_rs[0].read_sbus(&project.cds_rs[0]);
// set_local_status(project.cds_rs[0]);
}
#endif
#if(C_cds_out_number>=1)
if (project.cds_out[0].status & (component_Started | component_Ready | component_Error | component_ErrorSBus ))
{
project.cds_out[0].read_sbus(&project.cds_out[0]);
set_local_status(project.cds_out[0]);
}
#endif
#if(C_cds_out_number>=2)
if (project.cds_out[1].status & (component_Started | component_Ready | component_Error | component_ErrorSBus ))
{
project.cds_out[1].read_sbus(&project.cds_out[1]);
set_local_status(project.cds_out[1]);
}
#endif
#if(C_cds_out_number>=3)
if (project.cds_out[2].status & (component_Started | component_Ready | component_Error | component_ErrorSBus ))
{
project.cds_out[2].read_sbus(&project.cds_out[2]);
set_local_status(project.cds_out[2]);
}
#endif
#if(C_hwp_number>=1)
if (project.hwp[0].status & (component_Started | component_Ready | component_Error | component_ErrorSBus ))
{
// project.cds_out[0].read_sbus(&project.cds_out[0]);
set_local_status_hwp(project.hwp[0]);
}
#endif
#if(C_hwp_number>=2)
if (project.hwp[1].status & (component_Started | component_Ready | component_Error | component_ErrorSBus ))
{
// project.cds_out[0].read_sbus(&project.cds_out[0]);
set_local_status_hwp(project.hwp[1]);
}
#endif
#if(C_hwp_number>=3)
if (project.hwp[2].status & (component_Started | component_Ready | component_Error | component_ErrorSBus ))
{
// project.cds_out[0].read_sbus(&project.cds_out[0]);
set_local_status_hwp(project.hwp[2]);
}
#endif
project_update_all_err_status_plates();
}
}
void project_read_all_pbus(void)
{
if (project.controller.status == component_Ready)
{
x_parallel_bus_project.read_status(&x_parallel_bus_project);
#if(C_adc_number>=1)
project.adc[0].read_pbus(&project.adc[0]);
#endif
#if(C_adc_number>=2)
project.adc[1].read_pbus(&project.adc[1]);
#endif
#if(C_adc_number>=3)
project.adc[2].read_pbus(&project.adc[2]);
#endif
#if(C_cds_tk_number>=1)
project.cds_tk[0].read_pbus(&project.cds_tk[0]);
#endif
#if(C_cds_tk_number>=2)
project.cds_tk[1].read_pbus(&project.cds_tk[1]);
#endif
#if(C_cds_tk_number>=3)
project.cds_tk[2].read_pbus(&project.cds_tk[2]);
#endif
#if(C_cds_tk_number>=4)
project.cds_tk[3].read_pbus(&project.cds_tk[3]);
#endif
#if(C_cds_tk_number>=5)
project.cds_tk[4].read_pbus(&project.cds_tk[4]);
#endif
#if(C_cds_tk_number>=6)
project.cds_tk[5].read_pbus(&project.cds_tk[5]);
#endif
#if(C_cds_tk_number>=7)
project.cds_tk[6].read_pbus(&project.cds_tk[6]);
#endif
#if(C_cds_tk_number>=8)
project.cds_tk[7].read_pbus(&project.cds_tk[7]);
#endif
#if(C_cds_in_number>=1)
project.cds_in[0].read_pbus(&project.cds_in[0]);
#endif
#if(C_cds_in_number>=2)
project.cds_in[1].read_pbus(&project.cds_in[1]);
#endif
#if(C_cds_in_number>=3)
project.cds_in[2].read_pbus(&project.cds_in[2]);
#endif
#if(C_cds_rs_number>=1)
project.cds_rs[0].read_pbus(&project.cds_rs[0]);
#endif
#if(C_cds_out_number>=1)
project.cds_out[0].read_pbus(&project.cds_out[0]);
#endif
#if(C_cds_out_number>=2)
project.cds_out[1].read_pbus(&project.cds_out[1]);
#endif
#if(C_cds_out_number>=3)
project.cds_out[2].read_pbus(&project.cds_out[2]);
#endif
}
}
/////////////////////////////////////////////////////
// çàïèñûâàåì íàñòðîéêè â ïëàòû ïî ñåðèàëü. êàíàëó
/////////////////////////////////////////////////////
void project_write_all_sbus(void)
{
if (project.controller.status == component_Ready)
{
#if(C_adc_number>=1)
if (project.adc[0].status & (component_Started | component_Ready | component_Error | component_ErrorSBus ))
project.adc[0].write_sbus(&project.adc[0]);
#endif
#if(C_adc_number>=2)
if (project.adc[1].status & (component_Started | component_Ready | component_Error | component_ErrorSBus ))
project.adc[1].write_sbus(&project.adc[1]);
#endif
#if(C_adc_number>=3)
if (project.adc[2].status & (component_Started | component_Ready | component_Error | component_ErrorSBus ))
project.adc[2].write_sbus(&project.adc[2]);
#endif
#if(C_cds_tk_number>=1)
if (project.cds_tk[0].status & (component_Started | component_Ready | component_Error | component_ErrorSBus ))
project.cds_tk[0].write_sbus(&project.cds_tk[0]);
#endif
#if(C_cds_tk_number>=2)
if (project.cds_tk[1].status & (component_Started | component_Ready | component_Error | component_ErrorSBus ))
project.cds_tk[1].write_sbus(&project.cds_tk[1]);
#endif
#if(C_cds_tk_number>=3)
if (project.cds_tk[2].status & (component_Started | component_Ready | component_Error | component_ErrorSBus ))
project.cds_tk[2].write_sbus(&project.cds_tk[2]);
#endif
#if(C_cds_tk_number>=4)
if (project.cds_tk[3].status & (component_Started | component_Ready | component_Error | component_ErrorSBus ))
project.cds_tk[3].write_sbus(&project.cds_tk[3]);
#endif
#if(C_cds_tk_number>=5)
if (project.cds_tk[4].status & (component_Started | component_Ready | component_Error | component_ErrorSBus ))
project.cds_tk[4].write_sbus(&project.cds_tk[4]);
#endif
#if(C_cds_tk_number>=6)
if (project.cds_tk[5].status & (component_Started | component_Ready | component_Error | component_ErrorSBus ))
project.cds_tk[5].write_sbus(&project.cds_tk[5]);
#endif
#if(C_cds_tk_number>=7)
if (project.cds_tk[6].status & (component_Started | component_Ready | component_Error | component_ErrorSBus ))
project.cds_tk[6].write_sbus(&project.cds_tk[6]);
#endif
#if(C_cds_tk_number>=8)
if (project.cds_tk[7].status & (component_Started | component_Ready | component_Error | component_ErrorSBus ))
project.cds_tk[7].write_sbus(&project.cds_tk[7]);
#endif
#if(C_cds_in_number>=1)
if (project.cds_in[0].status & (component_Started | component_Ready | component_Error | component_ErrorSBus ))
project.cds_in[0].write_sbus(&project.cds_in[0]);
#endif
#if(C_cds_in_number>=2)
if (project.cds_in[1].status & (component_Started | component_Ready | component_Error | component_ErrorSBus ))
project.cds_in[1].write_sbus(&project.cds_in[1]);
#endif
#if(C_cds_in_number>=3)
if (project.cds_in[2].status & (component_Started | component_Ready | component_Error | component_ErrorSBus ))
project.cds_in[2].write_sbus(&project.cds_in[2]);
#endif
#if(C_cds_rs_number>=1)
if (project.cds_rs[0].status & (component_Started | component_Ready | component_Error | component_ErrorSBus ))
project.cds_rs[0].write_sbus(&project.cds_rs[0]);
#endif
#if(C_cds_out_number>=1)
if (project.cds_out[0].status & (component_Started | component_Ready | component_Error | component_ErrorSBus ))
project.cds_out[0].write_sbus(&project.cds_out[0]);
#endif
#if(C_cds_out_number>=2)
if (project.cds_out[1].status & (component_Started | component_Ready | component_Error | component_ErrorSBus ))
project.cds_out[1].write_sbus(&project.cds_out[1]);
#endif
#if(C_cds_out_number>=3)
if (project.cds_out[2].status & (component_Started | component_Ready | component_Error | component_ErrorSBus ))
project.cds_out[2].write_sbus(&project.cds_out[2]);
#endif
project_update_all_err_status_plates();
}
}
/////////////////////////////////////////////////////
// çàïèñûâàåì íàñòðîéêè â HWP ïëàòû ïî hwp êàíàëó
/////////////////////////////////////////////////////
void project_write_all_hwp(void)
{
if (project.controller.status == component_Ready)
{
#if(C_hwp_number>=1)
project.hwp[0].write_all(&project.hwp[0]);
#endif
#if(C_hwp_number>=2)
project.hwp[1].write_all(&project.hwp[1]);
#endif
#if(C_hwp_number>=3)
project.hwp[2].write_all(&project.hwp[2]);
#endif
}
}
/////////////////////////////////////////////////////
// ÷òåíèå èç HWP ïëàòû ïî hwp êàíàëó
/////////////////////////////////////////////////////
void project_read_all_hwp(void)
{
if (project.controller.status == component_Ready)
{
#if(C_hwp_number>=1)
project.hwp[0].read_all(&project.hwp[0]);
#endif
#if(C_hwp_number>=2)
project.hwp[1].read_all(&project.hwp[1]);
#endif
#if(C_hwp_number>=3)
project.hwp[2].read_all(&project.hwp[2]);
#endif
}
}
/////////////////////////////////////////////////////
// ÷òåíèå èç HWP ïëàòû ïî hwp êàíàëó
/////////////////////////////////////////////////////
void project_autospeed_all_hwp(void)
{
if (project.controller.status == component_Ready)
{
#if(C_hwp_number>=1)
project.hwp[0].autospeed_detect(&project.hwp[0]);
#endif
#if(C_hwp_number>=2)
project.hwp[1].autospeed_detect(&project.hwp[1]);
#endif
#if(C_hwp_number>=3)
project.hwp[2].autospeed_detect(&project.hwp[2]);
#endif
}
}
#define PAUSE_WAIT_SBUS 10000
#define MAX_COUNT_ERR_READ_SBUS 1100 //2000 çàïàñ ïî âðåìåíè 2õ îòíîñèòåëüíî íîðìàëüíîãî ïåðèîäà çàãðóçêè âñåé êîðçèíû
#define MAX_COUNT_OR_READ_SBUS 20//200
//////////////////////////////////////////////////////////////
// îæèäàíèå çàãðóçêè è ñòàðòà ïåðåôèð. ïëàò.
// åñëè flag_reset == 1 òî íå äàåì îøèáêó ïðè îæèäàíèè ïëàò
// enable_find_all_plates = 1 ðàçðåøàåì ïîèñê îòêëþ÷åííûõ ïëàò ïî USE_????
//////////////////////////////////////////////////////////////
unsigned int project_wait_load_all_cds(int flag_reset)
{
unsigned long counterErr = 0;
unsigned int counterOk = 0, err;
unsigned int i,count_find_plat;
unsigned int old_status_max_read_error = 0;
// unsigned int erReg, rd;
/*
for (i=0;i<C_adc_number;i++)
{
project.adc[i].timer_wait_load = 0; // î÷èùàåì ñ÷åò÷èê îæèäàíèß çàãðóçêè ïëàòû ADC
}
*/
err = 0;
for(;;)
{
count_find_plat = 0;
///////////////////////////////////////
//ADC
#if(C_adc_number>=1)
for (i=0;i<C_adc_number;i++)
{
if (project.adc[i].useit)
{
count_find_plat++;
old_status_max_read_error = project.adc[i].status_serial_bus.max_read_error;
project.adc[i].status_serial_bus.max_read_error = 1;
if (project.adc[i].read_sbus(&project.adc[i]) != 0)
{
DELAY_US(PAUSE_WAIT_SBUS);
counterErr++;
counterOk = 0;
project.adc[i].status = component_NotFinded; //component_NotReady;
}
else
{
counterOk++;
project.adc[i].status = component_Started;
}
project.adc[i].status_serial_bus.max_read_error = old_status_max_read_error;
}
}
#endif
///////////////////////////////////////
//TK
#if(C_cds_tk_number>=1)
for (i=0;i<C_cds_tk_number;i++)
{
if (project.cds_tk[i].useit)
{
count_find_plat++;
old_status_max_read_error = project.cds_tk[i].status_serial_bus.max_read_error;
project.cds_tk[i].status_serial_bus.max_read_error = 1;
if (project.cds_tk[i].read_sbus(&project.cds_tk[i]) != 0)
{
DELAY_US(PAUSE_WAIT_SBUS);
counterErr++;
counterOk = 0;
project.cds_tk[i].status = component_NotFinded; //component_NotReady;
}
else
{
counterOk++;
project.cds_tk[i].status = component_Started;
}
project.cds_tk[i].status_serial_bus.max_read_error = old_status_max_read_error;
}
}
#endif
///////////////////////////////////////
//IN
#if(C_cds_in_number>=1)
for (i=0;i<C_cds_in_number;i++)
{
if (project.cds_in[i].useit)
{
count_find_plat++;
old_status_max_read_error = project.cds_in[i].status_serial_bus.max_read_error;
project.cds_in[i].status_serial_bus.max_read_error = 1;
if (project.cds_in[i].read_sbus(&project.cds_in[i]) != 0)
{
DELAY_US(PAUSE_WAIT_SBUS);
counterErr++;
counterOk = 0;
project.cds_in[i].status = component_NotFinded; //component_NotReady;
}
else
{
counterOk++;
project.cds_in[i].status = component_Started;
}
project.cds_in[i].status_serial_bus.max_read_error = old_status_max_read_error;
}
}
#endif
///////////////////////////////////////
//OUT
#if(C_cds_out_number>=1)
for (i=0;i<C_cds_out_number;i++)
{
if (project.cds_out[i].useit)
{
count_find_plat++;
old_status_max_read_error = project.cds_out[i].status_serial_bus.max_read_error;
project.cds_out[i].status_serial_bus.max_read_error = 1;
if (project.cds_out[i].read_sbus(&project.cds_out[i]) != 0)
{
DELAY_US(PAUSE_WAIT_SBUS);
counterErr++;
counterOk = 0;
project.cds_out[i].status = component_NotFinded; //component_NotReady;
}
else
{
counterOk++;
project.cds_out[i].status = component_Started;
}
project.cds_out[i].status_serial_bus.max_read_error = old_status_max_read_error;
}
}
#endif
///////////////////////////////////////
//RS
#if(C_cds_rs_number>=1)
for (i=0;i<C_cds_rs_number;i++)
{
if (project.cds_rs[i].useit)
{
count_find_plat++;
old_status_max_read_error = project.cds_rs[i].status_serial_bus.max_read_error;
project.cds_rs[i].status_serial_bus.max_read_error = 1;
if (project.cds_rs[i].read_sbus(&project.cds_rs[i]) != 0)
{
DELAY_US(PAUSE_WAIT_SBUS);
counterErr++;
counterOk = 0;
project.cds_rs[i].status = component_NotFinded; //component_NotReady;
}
else
{
counterOk++;
project.cds_rs[i].status = component_Started;
}
project.cds_rs[i].status_serial_bus.max_read_error = old_status_max_read_error;
}
}
#endif
//HWP
#if(C_hwp_number>=1)
for (i=0;i<C_hwp_number;i++)
{
if (project.hwp[i].useit && project.hwp[i].write.HWP_Speed != MODE_HWP_SPEED_AUTO)
{
project.hwp[i].status = component_NotReady;
count_find_plat++;
old_status_max_read_error = project.hwp[i].status_hwp_bus.max_read_error;
// project.cds_rs[i].status_serial_bus.max_read_error = 1;
if (project.hwp[i].read_all(&project.hwp[i]) != 0)
{
DELAY_US(PAUSE_WAIT_SBUS);
counterErr++;
counterOk = 0;
project.hwp[i].status = component_NotFinded; //component_NotReady;
}
else
{
counterOk++;
project.hwp[i].status = component_Started;
}
project.hwp[i].status_hwp_bus.max_read_error = old_status_max_read_error;
}
}
#endif
///////////////////////////////////////
// test error - timeout?
if (counterErr >= MAX_COUNT_ERR_READ_SBUS)
{
if (flag_reset == 0)
xerror(xserial_bus_er_ID(2), (void *)0);
err = 1;
break;
}
// test ok read - stable?
if (counterOk >= MAX_COUNT_OR_READ_SBUS)
{
err = 0;
// all ok!
break;
}
if (count_find_plat == 0) // nothing find!
{
err = 0;
// all ok!
break;
}
}
// clear statistics on serial bus
x_serial_bus_project.clear_stat(&x_serial_bus_project);
///////////////////////////////////////
//ADC
#if(C_adc_number>=1)
for (i=0;i<C_adc_number;i++)
{
clear_stat_sbus(&project.adc[i].status_serial_bus);
clear_stat_pbus(&project.adc[i].status_parallel_bus);
}
#endif
///////////////////////////////////////
//TK
#if(C_cds_tk_number>=1)
for (i=0;i<C_cds_tk_number;i++)
{
clear_stat_sbus(&project.cds_tk[i].status_serial_bus);
clear_stat_pbus(&project.cds_tk[i].status_parallel_bus);
}
#endif
///////////////////////////////////////
//IN
#if(C_cds_in_number>=1)
for (i=0;i<C_cds_in_number;i++)
{
clear_stat_sbus(&project.cds_in[i].status_serial_bus);
clear_stat_pbus(&project.cds_in[i].status_parallel_bus);
}
#endif
///////////////////////////////////////
//OUT
#if(C_cds_out_number>=1)
for (i=0;i<C_cds_out_number;i++)
{
clear_stat_sbus(&project.cds_out[i].status_serial_bus);
clear_stat_pbus(&project.cds_out[i].status_parallel_bus);
}
#endif
////////////
///////////////////////////////////////
//RS
#if(C_cds_rs_number>=1)
for (i=0;i<C_cds_rs_number;i++)
{
clear_stat_sbus(&project.cds_rs[i].status_serial_bus);
clear_stat_pbus(&project.cds_rs[i].status_parallel_bus);
}
#endif
////////////
///////////////////////////////////////
//HWP
#if(C_hwp_number>=1)
for (i=0;i<C_hwp_number;i++)
{
// project.hwp[i].status = component_NotReady;
clear_stat_hwpbus(&project.hwp[i].status_hwp_bus);
}
#endif
////////////
project_update_all_err_status_plates();
return err;
}
//////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////
// ïîèñê äàæå îòêëþ÷åííûõ ïëàò
//////////////////////////////////////////////////////////////////////
void project_find_all_cds(void)
{
unsigned long counterErr = 0;
unsigned int counterOk = 0;
unsigned int i,count_find_plat;
unsigned int old_status_max_read_error = 0;
/// detect off plates
///////////////////////////////////////
//ADC
#if(C_adc_number>=1)
for (i=0;i<C_adc_number;i++)
{
DELAY_US(PAUSE_WAIT_SBUS);
if (project.adc[i].useit == 0)
{
project.adc[i].useit = 1;
old_status_max_read_error = project.adc[i].status_serial_bus.max_read_error;
project.adc[i].status_serial_bus.max_read_error = 1;
if (project.adc[i].read_sbus(&project.adc[i]) == 0)
project.adc[i].status = component_Detected;
else
project.adc[i].status = component_NotDetected;//component_NotReady;
project.adc[i].useit = 0;
project.adc[i].status_serial_bus.max_read_error = old_status_max_read_error;
}
}
#endif
///////////////////////////////////////
//TK
#if(C_cds_tk_number>=1)
for (i=0;i<C_cds_tk_number;i++)
{
DELAY_US(PAUSE_WAIT_SBUS);
if (project.cds_tk[i].useit == 0)
{
project.cds_tk[i].useit = 1;
old_status_max_read_error = project.cds_tk[i].status_serial_bus.max_read_error;
project.cds_tk[i].status_serial_bus.max_read_error = 1;
if (project.cds_tk[i].read_sbus(&project.cds_tk[i]) == 0)
project.cds_tk[i].status = component_Detected;
else
project.cds_tk[i].status = component_NotDetected;//component_NotReady;
project.cds_tk[i].useit = 0;
project.cds_tk[i].status_serial_bus.max_read_error = old_status_max_read_error;
}
}
#endif
///////////////////////////////////////
//IN
#if(C_cds_in_number>=1)
for (i=0;i<C_cds_in_number;i++)
{
DELAY_US(PAUSE_WAIT_SBUS);
if (project.cds_in[i].useit == 0)
{
project.cds_in[i].useit = 1;
old_status_max_read_error = project.cds_in[i].status_serial_bus.max_read_error;
project.cds_in[i].status_serial_bus.max_read_error = 1;
if (project.cds_in[i].read_sbus(&project.cds_in[i]) == 0)
project.cds_in[i].status = component_Detected;
else
project.cds_in[i].status = component_NotDetected;//component_NotReady;
project.cds_in[i].useit = 0;
project.cds_in[i].status_serial_bus.max_read_error = old_status_max_read_error;
}
}
#endif
///////////////////////////////////////
//OUT
#if(C_cds_out_number>=1)
for (i=0;i<C_cds_out_number;i++)
{
DELAY_US(PAUSE_WAIT_SBUS);
if (project.cds_out[i].useit == 0)
{
project.cds_out[i].useit = 1;
old_status_max_read_error = project.cds_out[i].status_serial_bus.max_read_error;
project.cds_out[i].status_serial_bus.max_read_error = 1;
if (project.cds_out[i].read_sbus(&project.cds_out[i]) == 0)
project.cds_out[i].status = component_Detected;
else
project.cds_out[i].status = component_NotDetected;//component_NotReady;
project.cds_out[i].useit = 0;
project.cds_out[i].status_serial_bus.max_read_error = old_status_max_read_error;
}
}
#endif
///////////////////////////////////////
//RS
#if(C_cds_rs_number>=1)
for (i=0;i<C_cds_rs_number;i++)
{
DELAY_US(PAUSE_WAIT_SBUS);
if (project.cds_rs[i].useit == 0)
{
project.cds_rs[i].useit = 1;
old_status_max_read_error = project.cds_rs[i].status_serial_bus.max_read_error;
project.cds_rs[i].status_serial_bus.max_read_error = 1;
if (project.cds_rs[i].read_sbus(&project.cds_rs[i]) == 0)
project.cds_rs[i].status = component_Detected;
else
project.cds_rs[i].status = component_NotDetected;//component_NotReady;
project.cds_rs[i].useit = 0;
project.cds_rs[i].status_serial_bus.max_read_error = old_status_max_read_error;
}
}
#endif
/// end detect
// clear statistics on serial bus
x_serial_bus_project.clear_stat(&x_serial_bus_project);
///////////////////////////////////////
//ADC
#if(C_adc_number>=1)
for (i=0;i<C_adc_number;i++)
{
clear_stat_sbus(&project.adc[i].status_serial_bus);
clear_stat_pbus(&project.adc[i].status_parallel_bus);
}
#endif
///////////////////////////////////////
//TK
#if(C_cds_tk_number>=1)
for (i=0;i<C_cds_tk_number;i++)
{
clear_stat_sbus(&project.cds_tk[i].status_serial_bus);
clear_stat_pbus(&project.cds_tk[i].status_parallel_bus);
}
#endif
///////////////////////////////////////
//IN
#if(C_cds_in_number>=1)
for (i=0;i<C_cds_in_number;i++)
{
clear_stat_sbus(&project.cds_in[i].status_serial_bus);
clear_stat_pbus(&project.cds_in[i].status_parallel_bus);
}
#endif
///////////////////////////////////////
//OUT
#if(C_cds_out_number>=1)
for (i=0;i<C_cds_out_number;i++)
{
clear_stat_sbus(&project.cds_out[i].status_serial_bus);
clear_stat_pbus(&project.cds_out[i].status_parallel_bus);
}
#endif
////////////
///////////////////////////////////////
//RS
#if(C_cds_rs_number>=1)
for (i=0;i<C_cds_rs_number;i++)
{
clear_stat_sbus(&project.cds_rs[i].status_serial_bus);
clear_stat_pbus(&project.cds_rs[i].status_parallel_bus);
}
#endif
///////////////////////////////////////
//HWP
#if(C_hwp_number>=1)
for (i=0;i<C_hwp_number;i++)
{
project.hwp[i].status = component_NotReady;
clear_stat_hwpbus(&project.hwp[i].status_hwp_bus);
}
#endif
////////////
}
/////////////////////////////////////////////////////
// ñáðîñ îøèáîê â ïåðåô. ïëàòàõ
/////////////////////////////////////////////////////
void project_clear_errors_all_plates(void)
{
unsigned int i;
int old_started;
if (project.controller.status != component_Ready)
return;
//
old_started = x_parallel_bus_project.flags.bit.started || x_parallel_bus_project.flags.bit.was_started;
x_parallel_bus_project.stop(&x_parallel_bus_project);
project_read_errors_controller();
project_reset_errors_controller();
// store and disable external error in plates
///////////////////////////////////////
//ADC
#if(C_adc_number>=1)
for (i=0;i<C_adc_number;i++)
{
if (project.adc[i].status & (component_Started | component_Ready | component_Error | component_ErrorSBus ))
project.adc[i].store_disable_error(&project.adc[i]);
}
#endif
///////////////////////////////////////
//TK
#if(C_cds_tk_number>=1)
for (i=0;i<C_cds_tk_number;i++)
{
if (project.cds_tk[i].status & (component_Started | component_Ready | component_Error | component_ErrorSBus ))
project.cds_tk[i].store_disable_error(&project.cds_tk[i]);
}
#endif
///////////////////////////////////////
//IN
#if(C_cds_in_number>=1)
for (i=0;i<C_cds_in_number;i++)
{
if (project.cds_in[i].status & (component_Started | component_Ready | component_Error | component_ErrorSBus ))
project.cds_in[i].store_disable_error(&project.cds_in[i]);
}
#endif
///////////////////////////////////////
//OUT
#if(C_cds_out_number>=1)
for (i=0;i<C_cds_out_number;i++)
{
if (project.cds_out[i].status & (component_Started | component_Ready | component_Error | component_ErrorSBus ))
project.cds_out[i].store_disable_error(&project.cds_out[i]);
}
#endif
///////////////////////////////////////
//HWP
#if(C_hwp_number>=1)
for (i=0;i<C_hwp_number;i++)
{
if (project.hwp[i].status & (component_Started | component_Ready /*| component_Error*/ | component_ErrorSBus ))
project.hwp[i].store_disable_error(&project.hwp[i]);
}
#endif
////////////
///////////////////////////////////////
//RS
#if(C_cds_rs_number>=1)
for (i=0;i<C_cds_rs_number;i++)
{
if (project.cds_rs[i].status & (component_Started | component_Ready | component_Error | component_ErrorSBus ))
project.cds_rs[i].store_disable_error(&project.cds_rs[i]);
}
#endif
///////////////////////////////////////
// send signal reset error in plates
///////////////////////////////////////
//ADC
#if(C_adc_number>=1)
for (i=0;i<C_adc_number;i++)
{
if (project.adc[i].status & (component_Started | component_Ready | component_Error | component_ErrorSBus ))
project.adc[i].reset_error(&project.adc[i]);
}
#endif
///////////////////////////////////////
//TK
#if(C_cds_tk_number>=1)
for (i=0;i<C_cds_tk_number;i++)
{
if (project.cds_tk[i].status & (component_Started | component_Ready | component_Error | component_ErrorSBus ))
project.cds_tk[i].reset_error(&project.cds_tk[i]);
}
#endif
///////////////////////////////////////
//IN
#if(C_cds_in_number>=1)
for (i=0;i<C_cds_in_number;i++)
{
if (project.cds_in[i].status & (component_Started | component_Ready | component_Error | component_ErrorSBus ))
project.cds_in[i].reset_error(&project.cds_in[i]);
}
#endif
///////////////////////////////////////
//OUT
#if(C_cds_out_number>=1)
for (i=0;i<C_cds_out_number;i++)
{
if (project.cds_out[i].status & (component_Started | component_Ready | component_Error | component_ErrorSBus ))
project.cds_out[i].reset_error(&project.cds_out[i]);
}
#endif
///////////////////////////////////////
//HWP
#if(C_hwp_number>=1)
for (i=0;i<C_hwp_number;i++)
{
if (project.hwp[i].status & (component_Started | component_Ready | /*component_Error |*/ component_ErrorSBus ))
project.hwp[i].reset_error(&project.hwp[i]);
}
#endif
///////////////////////////////////////
//RS
#if(C_cds_rs_number>=1)
for (i=0;i<C_cds_rs_number;i++)
{
if (project.cds_rs[i].status & (component_Started | component_Ready | component_Error | component_ErrorSBus ))
project.cds_rs[i].reset_error(&project.cds_rs[i]);
}
#endif
///////////////////////////////////////
////////////
// restore external error in plates
///////////////////////////////////////
//ADC
#if(C_adc_number>=1)
for (i=0;i<C_adc_number;i++)
{
if (project.adc[i].status & (component_Started | component_Ready | component_Error | component_ErrorSBus ))
project.adc[i].restore_enable_error(&project.adc[i]);
}
#endif
///////////////////////////////////////
//TK
#if(C_cds_tk_number>=1)
for (i=0;i<C_cds_tk_number;i++)
{
if (project.cds_tk[i].status & (component_Started | component_Ready | component_Error | component_ErrorSBus ))
project.cds_tk[i].restore_enable_error(&project.cds_tk[i]);
}
#endif
///////////////////////////////////////
//IN
#if(C_cds_in_number>=1)
for (i=0;i<C_cds_in_number;i++)
{
if (project.cds_in[i].status & (component_Started | component_Ready | component_Error | component_ErrorSBus ))
project.cds_in[i].restore_enable_error(&project.cds_in[i]);
}
#endif
///////////////////////////////////////
//OUT
#if(C_cds_out_number>=1)
for (i=0;i<C_cds_out_number;i++)
{
if (project.cds_out[i].status & (component_Started | component_Ready | component_Error | component_ErrorSBus ))
project.cds_out[i].restore_enable_error(&project.cds_out[i]);
}
#endif
///////////////////////////////////////
//HWP
#if(C_hwp_number>=1)
for (i=0;i<C_hwp_number;i++)
{
if (project.hwp[i].status & (component_Started | component_Ready |/* component_Error |*/ component_ErrorSBus ))
project.hwp[i].restore_enable_error(&project.hwp[i]);
}
#endif
////////////
///////////////////////////////////////
//RS
#if(C_cds_rs_number>=1)
for (i=0;i<C_cds_rs_number;i++)
{
if (project.cds_rs[i].status & (component_Started | component_Ready | component_Error | component_ErrorSBus ))
project.cds_rs[i].restore_enable_error(&project.cds_rs[i]);
}
#endif
project_reset_errors_controller();
if (old_started)
x_parallel_bus_project.start(&x_parallel_bus_project);
project_update_all_err_status_plates();
}
////////////////////////////////////////////////
////////////////////////////////////////////////
////////////////////////////////////////////////
void project_enable_int13(void)
{
project.controller.enable_int13(&project.controller);
}
void project_disable_int13(void)
{
project.controller.disable_int13(&project.controller);
}
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