Razvalyaev
7e0063eee0
Все основные файлы подтянуты без изменений Изменены (только папка main_matlab): - заглушки для ненужных функций (main_matlab.c) - iq библиотека (IQmathLib_matlab.c) - библиотеки DSP281x
245 lines
9.2 KiB
C
245 lines
9.2 KiB
C
/* ==================================================================================
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File name: F281XBMSK.H
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Originator: Digital Control Systems Group
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Texas Instruments
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Description:
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Header file containing handy bitmasks for setting up register values.
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This file defines the bitmasks for F281X.
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Target: TMS320F281x family
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=====================================================================================
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History:
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-------------------------------------------------------------------------------------
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04-15-2005 Version 3.20: Using DSP281x v. 1.00 or higher
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---------------------------------------------------------------------------------- */
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#ifndef __F281X_BMSK_H__
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#define __F281X_BMSK_H__
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/*------------------------------------------------------------------------------
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F281X Register TxCON
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------------------------------------------------------------------------------*/
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#define FREE_RUN_FLAG 0x8000
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#define SOFT_STOP_FLAG 0x4000
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#define TIMER_STOP 0x0000
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#define TIMER_CONT_UPDN 0x0800
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#define TIMER_CONT_UP 0x1000
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#define TIMER_DIR_UPDN 0x1800
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#define TIMER_CLK_PRESCALE_X_1 0x0000
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#define TIMER_CLK_PRESCALE_X_2 0x0100
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#define TIMER_CLK_PRESCALE_X_4 0x0200
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#define TIMER_CLK_PRESCALE_X_8 0x0300
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#define TIMER_CLK_PRESCALE_X_16 0x0400
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#define TIMER_CLK_PRESCALE_X_32 0x0500
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#define TIMER_CLK_PRESCALE_X_64 0x0600
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#define TIMER_CLK_PRESCALE_X_128 0x0700
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#define TIMER_ENABLE_BY_OWN 0x0000
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#define TIMER_ENABLE_BY_T1 0x0080
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#define TIMER_ENABLE 0x0040
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#define TIMER_DISABLE 0x0000
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#define TIMER_CLOCK_SRC_INTERNAL 0x0000
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#define TIMER_CLOCK_SRC_EXTERNAL 0x0010
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#define TIMER_CLOCK_SRC_QEP 0x0030
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#define TIMER_COMPARE_LD_ON_ZERO 0x0000
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#define TIMER_COMPARE_LD_ON_ZERO_OR_PRD 0x0004
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#define TIMER_COMPARE_LD_IMMEDIATE 0x0008
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#define TIMER_ENABLE_COMPARE 0x0002
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#define TIMER_SELECT_T1_PERIOD 0x0001
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/*------------------------------------------------------------------------------
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F281X Register ACTR 0x7413 BIT FIELD MASKS
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------------------------------------------------------------------------------*/
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/*------------------------------------------------------------------------------
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Space Vector Direction Commands
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------------------------------------------------------------------------------*/
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#define SV_DIRECTION_CW 0x8000
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#define SV_DIRECTION_CCW 0x0000
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/*------------------------------------------------------------------------------
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Space Vector Generation Vectors
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------------------------------------------------------------------------------*/
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//------------------------------------------------------------------------------
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#define SPACE_VECTOR_0 0x0000
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#define SPACE_VECTOR_1 0x1000
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#define SPACE_VECTOR_2 0x2000
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#define SPACE_VECTOR_3 0x3000
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#define SPACE_VECTOR_4 0x4000
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#define SPACE_VECTOR_5 0x5000
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#define SPACE_VECTOR_6 0x6000
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#define SPACE_VECTOR_7 0x7000
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/*------------------------------------------------------------------------------
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Compare action definitions
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------------------------------------------------------------------------------*/
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#define COMPARE6_FL 0x0000
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#define COMPARE6_AL 0x0400
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#define COMPARE6_AH 0x0800
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#define COMPARE6_FH 0x0C00
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//------------------------------------------------------------------------------
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#define COMPARE5_FL 0x0000
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#define COMPARE5_AL 0x0100
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#define COMPARE5_AH 0x0200
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#define COMPARE5_FH 0x0300
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//------------------------------------------------------------------------------
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#define COMPARE4_FL 0x0000
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#define COMPARE4_AL 0x0040
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#define COMPARE4_AH 0x0080
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#define COMPARE4_FH 0x00C0
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//------------------------------------------------------------------------------
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#define COMPARE3_FL 0x0000
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#define COMPARE3_AL 0x0010
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#define COMPARE3_AH 0x0020
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#define COMPARE3_FH 0x0030
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//------------------------------------------------------------------------------
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#define COMPARE2_FL 0x0000
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#define COMPARE2_AL 0x0004
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#define COMPARE2_AH 0x0008
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#define COMPARE2_FH 0x000C
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//------------------------------------------------------------------------------
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#define COMPARE1_FL 0x0000
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#define COMPARE1_AL 0x0001
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#define COMPARE1_AH 0x0002
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#define COMPARE1_FH 0x0003
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//------------------------------------------------------------------------------
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/*------------------------------------------------------------------------------
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F281X Register COMCONA/COMCONB
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------------------------------------------------------------------------------*/
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#define CMPR_ENABLE 0x8000
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#define CMPR_LD_ON_ZERO 0x0000
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#define CMPR_LD_ON_ZERO_OR_PRD 0x2000
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#define CMPR_LD_IMMEDIATE 0x4000
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#define SVENABLE 0x1000
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#define SVDISABLE 0x0000
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#define ACTR_LD_ON_ZERO 0x0000
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#define ACTR_LD_ON_ZERO_OR_PRD 0x0400
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#define ACTR_LD_IMMEDIATE 0x0800
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#define FCOMPOE 0x0100
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/*------------------------------------------------------------------------------
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F281X Register DBTCON
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------------------------------------------------------------------------------*/
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#define DBT_VAL_0 0x0000
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#define DBT_VAL_1 0x0100
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#define DBT_VAL_2 0x0200
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#define DBT_VAL_3 0x0300
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#define DBT_VAL_4 0x0400
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#define DBT_VAL_5 0x0500
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#define DBT_VAL_6 0x0600
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#define DBT_VAL_7 0x0700
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#define DBT_VAL_8 0x0800
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#define DBT_VAL_9 0x0900
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#define DBT_VAL_10 0x0A00
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#define DBT_VAL_11 0x0B00
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#define DBT_VAL_12 0x0C00
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#define DBT_VAL_13 0x0D00
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#define DBT_VAL_14 0x0E00
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#define DBT_VAL_15 0x0F00
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#define EDBT3_DIS 0x0000
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#define EDBT3_EN 0x0080
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#define EDBT2_DIS 0x0000
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#define EDBT2_EN 0x0040
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#define EDBT1_DIS 0x0000
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#define EDBT1_EN 0x0020
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#define DBTPS_X32 0x0014
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#define DBTPS_X16 0x0010
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#define DBTPS_X8 0x000C
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#define DBTPS_X4 0x0008
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#define DBTPS_X2 0x0004
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#define DBTPS_X1 0x0000
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/*------------------------------------------------------------------------------
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F281X Register ADCTRL1
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------------------------------------------------------------------------------*/
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#define ADC_SUS_MODE0 0x0000
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#define ADC_SUS_MODE1 0X1000
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#define ADC_SUS_MODE2 0x2000
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#define ADC_SUS_MODE3 0X3000
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#define ADC_RESET_FLAG 0x4000
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#define ADC_ACQ_PS_1 0x0000
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#define ADC_ACQ_PS_2 0x0100
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#define ADC_ACQ_PS_3 0x0200
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#define ADC_ACQ_PS_4 0x0300
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#define ADC_ACQ_PS_5 0x0400
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#define ADC_ACQ_PS_6 0x0500
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#define ADC_ACQ_PS_7 0x0600
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#define ADC_ACQ_PS_8 0x0700
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#define ADC_ACQ_PS_9 0x0800
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#define ADC_ACQ_PS_10 0x0900
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#define ADC_ACQ_PS_11 0x0A00
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#define ADC_ACQ_PS_12 0x0B00
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#define ADC_ACQ_PS_13 0x0C00
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#define ADC_ACQ_PS_14 0x0D00
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#define ADC_ACQ_PS_15 0x0E00
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#define ADC_ACQ_PS_16 0x0F00
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#define ADC_CPS_1 0x0000
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#define ADC_CPS_2 0x0080
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#define ADC_CONT_RUN 0x0040
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#define ADC_SEQ_CASC 0x0010
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#define ADC_SEQ_DUAL 0x0000
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/*------------------------------------------------------------------------------
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F281X Register ADCTRL2
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------------------------------------------------------------------------------*/
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#define ADC_EVB_SOC 0x8000
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#define ADC_RST_SEQ1 0x4000
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#define ADC_SOC_SEQ1 0x2000
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#define ADC_INT_ENA_SEQ1 0x0800
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#define ADC_INT_MODE_SEQ1 0X0400
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#define ADC_EVA_SOC_SEQ1 0x0100
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#define ADC_EXT_SOC_SEQ1 0x0080
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#define ADC_RST_SEQ2 0x0040
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#define ADC_SOC_SEQ2 0x0020
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#define ADC_INT_ENA_SEQ2 0x0008
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#define ADC_INT_MODE_SEQ2 0x0004
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#define ADC_EVB_SOC_SEQ2 0x0001
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/*------------------------------------------------------------------------------
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F281X Register ADCTRL3
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------------------------------------------------------------------------------*/
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#define ADC_RFDN 0x0080
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#define ADC_BGDN 0x0040
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#define ADC_PWDN 0x0020
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#define ADC_CLKPS_X_1 0x0000
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#define ADC_CLKPS_X_2 0x0002
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#define ADC_CLKPS_X_4 0x0004
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#define ADC_CLKPS_X_6 0x0006
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#define ADC_CLKPS_X_8 0x0008
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#define ADC_CLKPS_X_10 0x000A
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#define ADC_CLKPS_X_12 0x000C
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#define ADC_CLKPS_X_14 0x000E
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#define ADC_CLKPS_X_16 0x0010
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#define ADC_CLKPS_X_18 0x0012
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#define ADC_CLKPS_X_20 0x0014
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#define ADC_CLKPS_X_22 0x0016
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#define ADC_CLKPS_X_24 0x0018
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#define ADC_CLKPS_X_26 0x001A
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#define ADC_CLKPS_X_28 0x001C
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#define ADC_CLKPS_X_30 0x001E
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#define ADC_SMODE_SIMULTANEOUS 0x0001
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#define ADC_SMODE_SEQUENTIAL 0x0000
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#endif // __F281X_BMSK_H__
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// EOF
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