#include "x_parallel_bus.h" #include "xp_cds_tk.h" #include "x_parallel_bus.h" #include "x_serial_bus.h" #include "xp_tools.h" #include "xerror.h" /* òóò ëåæàò óíèâåðñàëüíûå ôóíêöèè äëß ðàáîòû ïëàò tk íå çàâèñßùèå îò òèïà ïðîåêòà */ /////////////////////////////////////////////// /////////////////////////////////////////////// /////////////////////////////////////////////// void cds_tk_init(T_cds_tk *v) { //#if (Cds_Tk_Xilinx_SP6 == 1) && (C_PROJECT_TYPE == PROJECT_22220) int old_started = 0; unsigned int i; //#endif if (v->useit == 0) { clear_adr_sync_table(v->plane_address); return ; } set_adr_sync_table(v->plane_address); //#if (Cds_Tk_Xilinx_SP6 == 1) && (C_PROJECT_TYPE == PROJECT_22220) #if (C_PROJECT_TYPE == PROJECT_22220) || (C_PROJECT_TYPE == PROJECT_23550) if (v->type_cds_xilinx == TYPE_CDS_XILINX_SP6) { if (x_parallel_bus_project.flags.bit.init==0) x_parallel_bus_project.init(&x_parallel_bus_project); old_started = x_parallel_bus_project.flags.bit.started; if (x_parallel_bus_project.flags.bit.started) x_parallel_bus_project.stop(&x_parallel_bus_project); x_parallel_bus_project.slave_addr = v->plane_address; // for (i=0;isetup_pbus.count_elements_pbus;i++) for (i=0;i<16;i++) { if (v->setup_pbus.use_reg_in_pbus.all & (1<adr_pbus.adr_table[i] = x_parallel_bus_project.setup.size_table; x_parallel_bus_project.add_table(&x_parallel_bus_project); x_parallel_bus_project.reg_addr++; x_parallel_bus_project.setup.size_table++; } else { // ìåñòà â òàáëèöå íåò!!! xerror(xparall_bus_er_ID(1),(void *)0); v->setup_pbus.use_reg_in_pbus.all &= (~(1<useit == 0) return 0; err = v->read_sbus(v); err |= v->read_pbus(v); return err; } /////////////////////////////////////////////// /////////////////////////////////////////////// /////////////////////////////////////////////// int cds_tk_write_all(T_cds_tk *v) { int err = 0; if (v->useit == 0) return 0; err = v->write_sbus(v); err |= v->write_pbus(v); return err; } /////////////////////////////////////////////// /////////////////////////////////////////////// /////////////////////////////////////////////// int cds_tk_write_pbus(T_cds_tk *v) { if (v->useit == 0) return 0; return 0; } /////////////////////////////////////////////// /////////////////////////////////////////////// /////////////////////////////////////////////// int cds_tk_read_pbus(T_cds_tk *v) { if (v->useit == 0) return 0; return 0; } /////////////////////////////////////////////// /////////////////////////////////////////////// /////////////////////////////////////////////// void cds_tk_reset_error(T_cds_tk *v) { if (v->useit == 0) return ; if (v->status == component_Error || v->status == component_ErrorSBus) v->status = component_Started; clear_cur_stat_sbus(&v->status_serial_bus); clear_cur_stat_pbus(&v->status_parallel_bus); x_serial_bus_project.slave_addr = v->plane_address; // number plate //7 cmd_reset_error x_serial_bus_project.reg_addr = 7; // adr memory in plate x_serial_bus_project.write_data = v->write.sbus.cmd_reset_error; // write data if (x_serial_bus_project.write(&x_serial_bus_project)) // make write v->status_serial_bus.count_write_error++; } /////////////////////////////////////////////// /////////////////////////////////////////////// void cds_tk_store_disable_error(T_cds_tk *v) { if (v->useit == 0) return ; v->store_protect_error = v->write.sbus.protect_error.all; v->write.sbus.protect_error.all = 0; // disable all error. v->write_sbus(v); } /////////////////////////////////////////////// /////////////////////////////////////////////// void cds_tk_restore_enable_error(T_cds_tk *v) { if (v->useit == 0) return ; v->write.sbus.protect_error.all = v->store_protect_error; // restore all setup error. v->write_sbus(v); } /////////////////////////////////////////////// ///////////////////////////////////////////////