Coal56AB/matlab_23550
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Чет не получается запустить simple_scalar

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Razvalyaev 2025-01-16 09:27:10 +03:00
parent 2163dad313
commit 444252c465
10 changed files with 139 additions and 41 deletions
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2
Inu/Src/main/params_pwm24.h
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@ -15,7 +15,7 @@
#define FREQ_PWM 450 //800 /* ÷àñòîòà ØÈÌà */ //3138 // 2360//2477 //
#endif
#define DEF_PERIOD_MIN_MKS 60 // 80 //60 // áåðåì ìèíèìàëüíîå âðåìÿ ðàáîòû êëþ÷à = 2*TK_MIN_TIME_MKS = 30 ñ çàïàñîì
#define DEF_PERIOD_MIN_MKS 0 // 80 //60 // áåðåì ìèíèìàëüíîå âðåìÿ ðàáîòû êëþ÷à = 2*TK_MIN_TIME_MKS = 30 ñ çàïàñîì
// + TK_DEAD_TIME_MKS + 5mks çàïàñ = 60
#define DEF_PERIOD_MIN_BR_XTICS 165

2
Inu/def.h
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@ -11,7 +11,7 @@
// раскомментировать, если есть сдвиг между обмотками ГЭД (30 град.)
#define SHIFT
#define SIMULINK_SEQUENCE V_PWM24_PHASE_SEQ_NORMAL_BCA
#define SIMULINK_SEQUENCE V_PWM24_PHASE_SEQ_NORMAL_ABC
/* V_PWM24_PHASE_SEQ_NORMAL_ABC, - не то
V_PWM24_PHASE_SEQ_NORMAL_BCA, - похоже на правду
V_PWM24_PHASE_SEQ_NORMAL_CAB, - жопа

3
Inu/main_matlab/init28335.c
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@ -25,8 +25,9 @@ void init28335(void) {
svgen_pwm24_1.phase_sequence = SIMULINK_SEQUENCE;
svgen_pwm24_2.phase_sequence = SIMULINK_SEQUENCE;
edrk.zadanie.iq_Izad = _IQ(0.5);
edrk.zadanie.iq_Izad = _IQ(1);
edrk.disable_alg_u_disbalance = 1;
edrk.zadanie.iq_limit_power_zad = _IQ(1);
//analog_zero.iqU_1 = 2048;
//analog_zero.iqU_2 = 2048;
} //void init28335(void)

121
Inu/main_matlab/main_matlab.c
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@ -55,26 +55,109 @@ void mcu_simulate_step(void)
calc_norm_ADC_0(0);
vectorControlConstId(edrk.zadanie.iq_power_zad_rmp, edrk.zadanie.iq_oborots_zad_hz_rmp,
WRotor.RotorDirectionSlow, WRotor.iqWRotorSumFilter,
edrk.Mode_ScalarVectorUFConst,
edrk.MasterSlave, edrk.zadanie.iq_Izad, wd,
edrk.master_theta, edrk.master_Iq, edrk.iq_power_kw_another_bs,
&edrk.tetta_to_slave, &edrk.Iq_to_slave, &edrk.P_to_master,
0, 0);
test_calc_vect_dq_pwm24_Ing(vect_control.iqTheta, vect_control.iqUdKm, vect_control.iqUqKm,
edrk.disable_alg_u_disbalance,
edrk.zadanie.iq_kplus_u_disbalance_rmp, edrk.zadanie.iq_k_u_disbalance_rmp,
filter.iqU_1_fast, filter.iqU_2_fast,
0,
edrk.Uzad_max,
edrk.MasterSlave,
edrk.flag_second_PCH,
&edrk.Kplus, &edrk.Uzad_to_slave);
analog.PowerFOC = edrk.P_to_master;
Fzad = vect_control.iqFstator;
Izad_out = edrk.Iq_to_slave;
if (edrk.Mode_ScalarVectorUFConst == ALG_MODE_SCALAR_OBOROTS || edrk.Mode_ScalarVectorUFConst == ALG_MODE_SCALAR_POWER)
{
#if(_ENABLE_PWM_LINES_FOR_TESTS_PWM)
PWM_LINES_TK_20_ON;
#endif
simple_scalar(1,
0,
WRotor.RotorDirectionSlow,
WRotor.iqWRotorSumFilter, //rotor_22220.iqFlong * rotor_22220.direct_rotor;
WRotor.iqWRotorSumFilter, //rotor_22220.iqFout * rotor_22220.direct_rotor;
//0, 0,
edrk.zadanie.iq_oborots_zad_hz_rmp,
edrk.all_limit_koeffs.sum_limit,
edrk.zadanie.iq_Izad_rmp,
edrk.iq_bpsi_normal,
analog.iqIm,
// analog.iqU_1_long+analog.iqU_2_long,
edrk.zadanie.iq_ZadanieU_Charge_rmp + edrk.zadanie.iq_ZadanieU_Charge_rmp,
analog.iqIin_sum,
edrk.zadanie.iq_power_zad_rmp,
edrk.iq_power_kw_full_znak,//(filter.PowerScalar+edrk.iq_power_kw_another_bs),
edrk.zadanie.iq_limit_power_zad_rmp, edrk.Mode_ScalarVectorUFConst,
edrk.master_Izad,
edrk.MasterSlave,
edrk.count_bs_work + 1,
&Fzad,
&Uzad1,
&Uzad2,
&Izad_out);
if (edrk.cmd_disable_calc_km_on_slave)
Uzad_from_master = edrk.master_Uzad;
else
{
#if (DISABLE_CALC_KM_ON_SLAVE==1)
Uzad_from_master = edrk.master_Uzad;
#else
Uzad_from_master = Uzad1;
#endif
}
test_calc_simple_dq_pwm24_Ing(Fzad, Uzad1, edrk.disable_alg_u_disbalance,
edrk.zadanie.iq_kplus_u_disbalance, edrk.zadanie.iq_k_u_disbalance, filter.iqU_1_fast, filter.iqU_2_fast,
0,
edrk.Uzad_max,
edrk.master_theta,
Uzad_from_master,
edrk.MasterSlave,
edrk.flag_second_PCH,
&edrk.Kplus, &edrk.tetta_to_slave, &edrk.Uzad_to_slave);
} // end ALG_MODE_SCALAR
else
{
if (edrk.flag_second_PCH == 0) {
wd = uf_alg.winding_displacement_bs1;
}
else {
wd = uf_alg.winding_displacement_bs2;
}
analog_dq_calc_external(wd, uf_alg.tetta);
vectorControlConstId(edrk.zadanie.iq_power_zad_rmp, edrk.zadanie.iq_oborots_zad_hz_rmp,
WRotor.RotorDirectionSlow, WRotor.iqWRotorSumFilter,
edrk.Mode_ScalarVectorUFConst,
edrk.MasterSlave, edrk.zadanie.iq_Izad, wd,
edrk.master_theta, edrk.master_Iq, edrk.iq_power_kw_another_bs,
&edrk.tetta_to_slave, &edrk.Iq_to_slave, &edrk.P_to_master,
0, 0);
test_calc_vect_dq_pwm24_Ing(vect_control.iqTheta, vect_control.iqUdKm, vect_control.iqUqKm,
edrk.disable_alg_u_disbalance,
edrk.zadanie.iq_kplus_u_disbalance_rmp, edrk.zadanie.iq_k_u_disbalance_rmp,
filter.iqU_1_fast, filter.iqU_2_fast,
0,
edrk.Uzad_max,
edrk.MasterSlave,
edrk.flag_second_PCH,
&edrk.Kplus, &edrk.Uzad_to_slave);
analog.PowerFOC = edrk.P_to_master;
Fzad = vect_control.iqFstator;
Izad_out = edrk.Iq_to_slave;
}// end ALG_MODE_FOC
if (xpwm_time.one_or_two_interrupts_run == PWM_ONE_INTERRUPT_RUN)
write_swgen_pwm_times(PWM_MODE_RELOAD_FORCE);

14
Inu/main_matlab/param.c
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@ -32,15 +32,15 @@ void readInputParameters(const real_T *u) {
edrk.Go = u[nn++];
u[nn++];
edrk.Mode_ScalarVectorUFConst = ALG_MODE_FOC_POWER;
edrk.Mode_ScalarVectorUFConst = ALG_MODE_SCALAR_OBOROTS;
edrk.zadanie.iq_power_zad = _IQ(0.5);
edrk.zadanie.iq_oborots_zad_hz = _IQ(0.5);
edrk.zadanie.iq_power_zad = _IQ(1);
edrk.zadanie.iq_oborots_zad_hz = _IQ(1);
edrk.MasterSlave = MODE_MASTER;
edrk.master_theta;
edrk.master_Iq;
edrk.iq_power_kw_another_bs;
edrk.iq_power_kw_another_bs = edrk.P_to_master;
edrk.tetta_to_slave;
edrk.Iq_to_slave;
edrk.P_to_master;
@ -84,6 +84,12 @@ void writeOutputParameters(real_T* xD) {
xD[nn++] = t12sim.ciB;
// Òîëüêî äëÿ ïðîñìîòðà
//xD[nn++] = t1sim.ciA;
//xD[nn++] = t1sim.dtsim.ciA_DT;
//xD[nn++] = t1sim.cmpA;
//xD[nn++] = t1sim.tcnt;
//xD[nn++] = 0;
//xD[nn++] = 0;
xD[nn++] = xpwm_time.Ta0_0;
xD[nn++] = xpwm_time.Ta0_1;
xD[nn++] = xpwm_time.Tb0_0;

1
Inu/main_matlab/param.h
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@ -6,6 +6,7 @@
void readInputParameters(const real_T* u);
void writeOutputParameters(real_T* xD);
extern int Unites[UNIT_QUA_UNITS][UNIT_LEN];
extern int CAN_timeout[UNIT_QUA];

12
Inu/main_matlab/pwm_sim.c
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@ -55,11 +55,15 @@ void initSimulateTim(TimerSimHandle* tsim, int period, double step)
tsim->TxCntPlus = step;
tsim->dtsim.DtCntPeriod = (int)(DT / hmcu.SimSampleTime);
}
double tickprev;
void SimulateMainPWM(TimerSimHandle* tsim, int compare)
{
if (simulateTimAndGetCompare(tsim, compare))
{
mcu_simulate_step();
tickprev = hmcu.SimTime;
}
simulateActionActionQualifierSubmodule(tsim);
simulateDeadBendSubmodule(tsim);
simulateTripZoneSubmodule(tsim);
@ -69,8 +73,6 @@ void SimulatePWM(TimerSimHandle* tsim, int compare)
{
simulateTimAndGetCompare(tsim, compare);
simulateActionActionQualifierSubmodule(tsim);
//tsim->ciA = tsim->dtsim.ciA_DT;
//tsim->ciB = tsim->dtsim.ciB_DT;
simulateDeadBendSubmodule(tsim);
simulateTripZoneSubmodule(tsim);
}
@ -112,6 +114,10 @@ void simulateActionActionQualifierSubmodule(TimerSimHandle* tsim)
void simulateDeadBendSubmodule(TimerSimHandle* tsim)
{
tsim->ciA = tsim->dtsim.ciA_DT;
tsim->ciB = tsim->dtsim.ciB_DT;
return;
// Ìîäåëèðóåì Dead-Band Submodule
if (tsim->dtsim.stateDt == 1) {
tsim->ciA = tsim->dtsim.ciA_DT;

24
Inu/mcu_wrapper.c
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@ -156,19 +156,21 @@ void SIM_deInitialize_Simulation(void)
*/
void SIM_writeOutputs(SimStruct* S)
{
real_T* GPIO;
real_T* Output = ssGetOutputPortRealSignal(S,0);
real_T* Out_Buff = ssGetDiscStates(S);
//-------------WRITTING GPIOS---------------
for (int j = 0; j < OUT_PORT_NUMB; j++)
{
GPIO = ssGetOutputPortRealSignal(S, j);
for (int i = 0; i < OUT_PORT_WIDTH; i++)
{
GPIO[i] = Out_Buff[j * OUT_PORT_WIDTH + i];
Out_Buff[j * OUT_PORT_WIDTH + i] = 0;
}
}
//-------------WRITTING OUTPUT--------------
for (int i = 0; i < OUT_PORT_WIDTH; i++)
Output[i] = Out_Buff[i];
//for (int j = 0; j < OUT_PORT_NUMB; j++)
//{
// GPIO = ssGetOutputPortRealSignal(S, j);
// for (int i = 0; i < OUT_PORT_WIDTH; i++)
// {
// GPIO[i] = Out_Buff[j * OUT_PORT_WIDTH + i];
// Out_Buff[j * OUT_PORT_WIDTH + i] = 0;
// }
//}
//------------------------------------------
}
//-------------------------------------------------------------//

1
Inu/mcu_wrapper_conf.h
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@ -58,7 +58,6 @@
#define OUT_PORT_NUMB 1 ///< number of output ports
#define DISC_STATES_WIDTH OUT_PORT_WIDTH*OUT_PORT_NUMB ///< width of discrete states array
#define NPARAMS 1 //кол-во параметров (скаляров и векторов)
#define RWORK_0_WIDTH 5 //width of the real-work vector
#define IWORK_0_WIDTH 5 //width of the integer-work vector

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inu_im_2wnd_3lvl.slx
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