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#4 Улучшен модуль ШИМ

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Теперь он имеет отдельные структуры для таймеров (TimerSimHandle) и структуры для управления каждой фазой (PWMPhaseSimHandle)

Поддерживает режимы формирвоания ШИМ:
- для каждого таймера отдельно (PWM_SIMULATION_MODE_REGULAR_PWM)
- через линии ТК для всей фазы разом (PWM_SIMULATION_MODE_TK_LINES).
За основу взяты из функции улитковского

В целом картина трехфазноого напряжения похожая, но ТК режим работает чуть ровнее и синхронее
This commit is contained in:
Razvalyaev 2025-01-17 12:50:59 +03:00
parent 20a0a62cc8
commit 324c42f823
7 changed files with 258 additions and 213 deletions
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2
Inu/app_wrapper/app_init.h
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@ -1,7 +1,7 @@
#ifndef INIT28335 #ifndef INIT28335
#define INIT28335 #define INIT28335
#include "mcu_wrapper_conf.h" #include "app_includes.h"
void app_init(void); void app_init(void);

48
Inu/app_wrapper/app_io.c
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@ -68,36 +68,36 @@ void writeOutputParameters(real_T* xD) {
//xD[nn++] = t5sim.ciA; //xD[nn++] = t5sim.ciA;
//xD[nn++] = t6sim.ciA; //xD[nn++] = t6sim.ciA;
xD[nn++] = t1sim.ciA; xD[nn++] = PWMPhaseA1.pwmOut.ci1A;
xD[nn++] = t2sim.ciA; xD[nn++] = PWMPhaseA1.pwmOut.ci2A;
xD[nn++] = t1sim.ciB; xD[nn++] = PWMPhaseA1.pwmOut.ci1B;
xD[nn++] = t2sim.ciB; xD[nn++] = PWMPhaseA1.pwmOut.ci2B;
xD[nn++] = t3sim.ciA; xD[nn++] = PWMPhaseB1.pwmOut.ci1A;
xD[nn++] = t4sim.ciA; xD[nn++] = PWMPhaseB1.pwmOut.ci2A;
xD[nn++] = t3sim.ciB; xD[nn++] = PWMPhaseB1.pwmOut.ci1B;
xD[nn++] = t4sim.ciB; xD[nn++] = PWMPhaseB1.pwmOut.ci2B;
xD[nn++] = t5sim.ciA; xD[nn++] = PWMPhaseC1.pwmOut.ci1A;
xD[nn++] = t6sim.ciA; xD[nn++] = PWMPhaseC1.pwmOut.ci2A;
xD[nn++] = t5sim.ciB; xD[nn++] = PWMPhaseC1.pwmOut.ci1B;
xD[nn++] = t6sim.ciB; xD[nn++] = PWMPhaseC1.pwmOut.ci2B;
xD[nn++] = t7sim.ciA; xD[nn++] = PWMPhaseA2.pwmOut.ci1A;
xD[nn++] = t8sim.ciA; xD[nn++] = PWMPhaseA2.pwmOut.ci2A;
xD[nn++] = t7sim.ciB; xD[nn++] = PWMPhaseA2.pwmOut.ci1B;
xD[nn++] = t8sim.ciB; xD[nn++] = PWMPhaseA2.pwmOut.ci2B;
xD[nn++] = t9sim.ciA; xD[nn++] = PWMPhaseB2.pwmOut.ci1A;
xD[nn++] = t10sim.ciA; xD[nn++] = PWMPhaseB2.pwmOut.ci2A;
xD[nn++] = t9sim.ciB; xD[nn++] = PWMPhaseB2.pwmOut.ci1B;
xD[nn++] = t10sim.ciB; xD[nn++] = PWMPhaseB2.pwmOut.ci2B;
xD[nn++] = t11sim.ciA; xD[nn++] = PWMPhaseC2.pwmOut.ci1A;
xD[nn++] = t12sim.ciA; xD[nn++] = PWMPhaseC2.pwmOut.ci2A;
xD[nn++] = t11sim.ciB; xD[nn++] = PWMPhaseC2.pwmOut.ci1B;
xD[nn++] = t12sim.ciB; xD[nn++] = PWMPhaseC2.pwmOut.ci2B;
// Òîëüêî äëÿ ïðîñìîòðà // Òîëüêî äëÿ ïðîñìîòðà
xD[nn++] = xpwm_time.Ta0_0; xD[nn++] = xpwm_time.Ta0_0;

2
Inu/app_wrapper/app_io.h
View File

@ -1,5 +1,5 @@
#include "simstruc.h" #include "simstruc.h"
#include "mcu_wrapper_conf.h" #include "app_includes.h"
#ifndef PARAM #ifndef PARAM
#define PARAM #define PARAM

4
Inu/mcu_wrapper.c
View File

@ -79,7 +79,7 @@ void MCU_Step_Simulation(SimStruct* S, time_T time)
*/ */
void MCU_Periph_Simulation(void) void MCU_Periph_Simulation(void)
{ {
Simulate_Timers(); Simulate_PWM();
} }
/* READ INPUTS S-FUNCTION TO MCU REGS */ /* READ INPUTS S-FUNCTION TO MCU REGS */
@ -130,7 +130,7 @@ void SIM_Initialize_Simulation(void)
#endif //RUN_APP_MAIN_FUNC_THREAD #endif //RUN_APP_MAIN_FUNC_THREAD
/* user initialization */ /* user initialization */
Init_Timers(); Init_PWM_Simulation();
app_init(); app_init();
/* clock step initialization */ /* clock step initialization */

330
Inu/xilinx_wrapper/pwm_sim.c
View File

@ -13,88 +13,83 @@ TimerSimHandle t10sim;
TimerSimHandle t11sim; TimerSimHandle t11sim;
TimerSimHandle t12sim; TimerSimHandle t12sim;
#ifdef SIMULATION_MODE_XILINX PWMPhaseSimHandle PWMPhaseA1;
XilinkTkPhaseSimHandle XilinxTkPhaseA1; PWMPhaseSimHandle PWMPhaseB1;
XilinkTkPhaseSimHandle XilinxTkPhaseB1; PWMPhaseSimHandle PWMPhaseC1;
XilinkTkPhaseSimHandle XilinxTkPhaseC1; PWMPhaseSimHandle PWMPhaseA2;
XilinkTkPhaseSimHandle XilinxTkPhaseA2; PWMPhaseSimHandle PWMPhaseB2;
XilinkTkPhaseSimHandle XilinxTkPhaseB2; PWMPhaseSimHandle PWMPhaseC2;
XilinkTkPhaseSimHandle XilinxTkPhaseC2;
void Simulate_PWM(void)
{
Simulate_PWMPhase(&PWMPhaseA1, xpwm_time.Ta0_1, xpwm_time.Ta0_0);
Simulate_PWMPhase(&PWMPhaseB1, xpwm_time.Tb0_1, xpwm_time.Tb0_0);
Simulate_PWMPhase(&PWMPhaseC1, xpwm_time.Tc0_1, xpwm_time.Tc0_0);
Simulate_PWMPhase(&PWMPhaseA2, xpwm_time.Ta1_1, xpwm_time.Ta1_0);
Simulate_PWMPhase(&PWMPhaseB2, xpwm_time.Tb1_1, xpwm_time.Tb1_0);
Simulate_PWMPhase(&PWMPhaseC2, xpwm_time.Tc1_1, xpwm_time.Tc1_0);
}
void Init_PWM_Simulation(void)
{
Init_PWMPhase_Simulation(&PWMPhaseA1, &t1sim, &t2sim,
PWM_PERIOD, PWM_TICK_STEP);
Init_PWMPhase_Simulation(&PWMPhaseB1, &t3sim, &t4sim,
PWM_PERIOD, PWM_TICK_STEP);
Init_PWMPhase_Simulation(&PWMPhaseC1, &t5sim, &t6sim,
PWM_PERIOD, PWM_TICK_STEP);
Init_PWMPhase_Simulation(&PWMPhaseA2, &t7sim, &t8sim,
PWM_PERIOD, PWM_TICK_STEP);
Init_PWMPhase_Simulation(&PWMPhaseB2, &t9sim, &t10sim,
PWM_PERIOD, PWM_TICK_STEP);
Init_PWMPhase_Simulation(&PWMPhaseC2, &t11sim, &t12sim,
PWM_PERIOD, PWM_TICK_STEP);
t1sim.simulatePwm = (void (*)())Simulate_MainTIM;
}
void Simulate_PWMPhase(PWMPhaseSimHandle* tksim, int T1, int T0)
{
tksim->tsim1->simulatePwm(tksim->tsim1, T1);
tksim->tsim2->simulatePwm(tksim->tsim2, T0);
#ifdef PWM_SIMULATION_MODE_TK_LINES
convertSVGenTimesToTkLines(tksim);
xilinxPwm3LevelSimulation(tksim);
#endif #endif
void Simulate_Timers(void) #ifdef PWM_SIMULATION_MODE_REGULAR_PWM
{ simulateActionActionQualifierSubmodule(tksim->tsim1);
SimulateMainPWM(&t1sim, xpwm_time.Ta0_1); simulateDeadBendSubmodule(tksim->tsim1, &tksim->pwmOut.ci1A, &tksim->pwmOut.ci1B);
SimulateSimplePWM(&t2sim, xpwm_time.Ta0_0); simulateTripZoneSubmodule(tksim->tsim1);
SimulateSimplePWM(&t3sim, xpwm_time.Tb0_1);
SimulateSimplePWM(&t4sim, xpwm_time.Tb0_0); simulateActionActionQualifierSubmodule(tksim->tsim2);
SimulateSimplePWM(&t5sim, xpwm_time.Tc0_1); simulateDeadBendSubmodule(tksim->tsim2, &tksim->pwmOut.ci2A, &tksim->pwmOut.ci2B);
SimulateSimplePWM(&t6sim, xpwm_time.Tc0_0); simulateTripZoneSubmodule(tksim->tsim2);
SimulateSimplePWM(&t7sim, xpwm_time.Ta1_1); #endif
SimulateSimplePWM(&t8sim, xpwm_time.Ta1_0);
SimulateSimplePWM(&t9sim, xpwm_time.Tb1_1);
SimulateSimplePWM(&t10sim, xpwm_time.Tb1_0);
SimulateSimplePWM(&t11sim, xpwm_time.Tc1_1);
SimulateSimplePWM(&t12sim, xpwm_time.Tc1_0);
} }
void Init_Timers(void) void Simulate_MainTIM(TimerSimHandle* tsim, int compare)
{ {
initSimulateTim(&t1sim, FREQ_INTERNAL_GENERATOR_XILINX_TMS / FREQ_PWM, FREQ_INTERNAL_GENERATOR_XILINX_TMS * hmcu.sSimSampleTime); #ifdef ENABLE_UNITED_COUNTER_FOR_ALL_PWM
initSimulateTim(&t2sim, FREQ_INTERNAL_GENERATOR_XILINX_TMS / FREQ_PWM, FREQ_INTERNAL_GENERATOR_XILINX_TMS * hmcu.sSimSampleTime);
initSimulateTim(&t3sim, FREQ_INTERNAL_GENERATOR_XILINX_TMS / FREQ_PWM, FREQ_INTERNAL_GENERATOR_XILINX_TMS * hmcu.sSimSampleTime);
initSimulateTim(&t4sim, FREQ_INTERNAL_GENERATOR_XILINX_TMS / FREQ_PWM, FREQ_INTERNAL_GENERATOR_XILINX_TMS * hmcu.sSimSampleTime);
initSimulateTim(&t5sim, FREQ_INTERNAL_GENERATOR_XILINX_TMS / FREQ_PWM, FREQ_INTERNAL_GENERATOR_XILINX_TMS * hmcu.sSimSampleTime);
initSimulateTim(&t6sim, FREQ_INTERNAL_GENERATOR_XILINX_TMS / FREQ_PWM, FREQ_INTERNAL_GENERATOR_XILINX_TMS * hmcu.sSimSampleTime);
initSimulateTim(&t7sim, FREQ_INTERNAL_GENERATOR_XILINX_TMS / FREQ_PWM, FREQ_INTERNAL_GENERATOR_XILINX_TMS * hmcu.sSimSampleTime);
initSimulateTim(&t8sim, FREQ_INTERNAL_GENERATOR_XILINX_TMS / FREQ_PWM, FREQ_INTERNAL_GENERATOR_XILINX_TMS * hmcu.sSimSampleTime);
initSimulateTim(&t9sim, FREQ_INTERNAL_GENERATOR_XILINX_TMS / FREQ_PWM, FREQ_INTERNAL_GENERATOR_XILINX_TMS * hmcu.sSimSampleTime);
initSimulateTim(&t10sim, FREQ_INTERNAL_GENERATOR_XILINX_TMS / FREQ_PWM, FREQ_INTERNAL_GENERATOR_XILINX_TMS * hmcu.sSimSampleTime);
initSimulateTim(&t11sim, FREQ_INTERNAL_GENERATOR_XILINX_TMS / FREQ_PWM, FREQ_INTERNAL_GENERATOR_XILINX_TMS * hmcu.sSimSampleTime);
initSimulateTim(&t12sim, FREQ_INTERNAL_GENERATOR_XILINX_TMS / FREQ_PWM, FREQ_INTERNAL_GENERATOR_XILINX_TMS * hmcu.sSimSampleTime);
}
void Init_Xilinx(XilinkTkPhaseSimHandle tksim)
{
initSimulateTim(&t1sim, FREQ_INTERNAL_GENERATOR_XILINX_TMS / FREQ_PWM, FREQ_INTERNAL_GENERATOR_XILINX_TMS * hmcu.sSimSampleTime);
initSimulateTim(&t2sim, FREQ_INTERNAL_GENERATOR_XILINX_TMS / FREQ_PWM, FREQ_INTERNAL_GENERATOR_XILINX_TMS * hmcu.sSimSampleTime);
}
void initSimulateTim(TimerSimHandle* tsim, int period, double step)
{
tsim->dtsim.stateDt = 1;
tsim->TPr = period;
tsim->TxCntPlus = step * 2;
tsim->dtsim.DtCntPeriod = (int)(DT / hmcu.sSimSampleTime);
}
void SimulateMainPWM(TimerSimHandle* tsim, int compare)
{
#ifdef UNITED_COUNTER
tsim->tcntAuxPrev = tsim->tcntAux; tsim->tcntAuxPrev = tsim->tcntAux;
tsim->tcntAux += tsim->TxCntPlus; tsim->tcntAux += tsim->TxCntPlus;
#endif #endif
if (simulateTimAndGetCompare(tsim, compare)) if (simulateTimAndGetCompare(tsim, compare))
mcu_simulate_step(); mcu_simulate_step();
#ifdef SIMULATION_MODE_REGULAR_PWM
simulateActionActionQualifierSubmodule(tsim);
simulateDeadBendSubmodule(tsim);
simulateTripZoneSubmodule(tsim);
#endif
} }
void SimulateSimplePWM(TimerSimHandle* tsim, int compare) void Simulate_SimpleTIM(TimerSimHandle* tsim, int compare)
{ {
simulateTimAndGetCompare(tsim, compare, 0); simulateTimAndGetCompare(tsim, compare);
simulateActionActionQualifierSubmodule(tsim);
#ifdef SIMULATION_MODE_REGULAR_PWM
simulateActionActionQualifierSubmodule(tsim);
simulateDeadBendSubmodule(tsim);
simulateTripZoneSubmodule(tsim);
#endif
} }
@ -102,7 +97,7 @@ int simulateTimAndGetCompare(TimerSimHandle* tsim, int compare)
{ {
int interruptflag = 0; int interruptflag = 0;
#ifdef UNITED_COUNTER #ifdef ENABLE_UNITED_COUNTER_FOR_ALL_PWM
tsim->tcntAuxPrev = t1sim.tcntAuxPrev; tsim->tcntAuxPrev = t1sim.tcntAuxPrev;
tsim->tcntAux = t1sim.tcntAux; tsim->tcntAux = t1sim.tcntAux;
#else #else
@ -110,8 +105,8 @@ int simulateTimAndGetCompare(TimerSimHandle* tsim, int compare)
tsim->tcntAux += tsim->TxCntPlus; tsim->tcntAux += tsim->TxCntPlus;
#endif #endif
if (tsim->tcntAux > tsim->TPr) { if (tsim->tcntAux > tsim->TxPeriod) {
tsim->tcntAux -= tsim->TPr * 2.; tsim->tcntAux -= tsim->TxPeriod * 2.;
tsim->cmpA = compare; tsim->cmpA = compare;
interruptflag = 1; interruptflag = 1;
} }
@ -124,146 +119,142 @@ int simulateTimAndGetCompare(TimerSimHandle* tsim, int compare)
} }
void convertSVGenTimesToTkLines(PWMPhaseSimHandle *tksim) {
void convertSVGenTimesToTkLines(XilinkTkPhaseSimHandle *tksim) {
TimerSimHandle* tsim1 = tksim->tsim1; TimerSimHandle* tsim1 = tksim->tsim1;
TimerSimHandle* tsim2 = tksim->tsim2; TimerSimHandle* tsim2 = tksim->tsim2;
//Phase Uni //Phase Uni
if ((tsim1->cmpA < tsim1->tcnt) && (tsim2->cmpA < tsim2->tcnt)) { if ((tsim1->cmpA < tsim1->tcnt) && (tsim2->cmpA < tsim2->tcnt)) {
tsim1->tkLine = 0; tksim->tkLineA = 0;
tsim2->tkLine = 1; tksim->tkLineB = 1;
} }
else if ((tsim1->cmpA > tsim1->tcnt) && (tsim2->cmpA > tsim2->tcnt)) { else if ((tsim1->cmpA > tsim1->tcnt) && (tsim2->cmpA > tsim2->tcnt)) {
tsim1->tkLine = 1; tksim->tkLineA = 1;
tsim2->tkLine = 0; tksim->tkLineB = 0;
} }
else if ((tsim1->cmpA < tsim1->tcnt) && (tsim2->cmpA > tsim2->tcnt)) { else if ((tsim1->cmpA < tsim1->tcnt) && (tsim2->cmpA > tsim2->tcnt)) {
//Îøèáêà. Çàäàíèå íà îòêðûòèå âåðõíèõ è íèæíèõ êëþ÷åé îäíîâðåìåííî. Çàêðûâàåì. //Îøèáêà. Çàäàíèå íà îòêðûòèå âåðõíèõ è íèæíèõ êëþ÷åé îäíîâðåìåííî. Çàêðûâàåì.
tsim1->tkLine = 1; tksim->tkLineA = 1;
tsim2->tkLine = 1; tksim->tkLineB = 1;
} }
else { else {
tsim1->tkLine = 0; tksim->tkLineA = 0;
tsim2->tkLine = 1; tksim->tkLineB = 0;
} }
} }
void xilinxPwm3LevelSimulation(XilinkTkPhaseSimHandle *tksim) { void xilinxPwm3LevelSimulation(PWMPhaseSimHandle *tksim) {
TimerSimHandle* tsim1 = tksim->tsim1; TimerSimHandle* tsim1 = tksim->tsim1;
TimerSimHandle* tsim2 = tksim->tsim2; TimerSimHandle* tsim2 = tksim->tsim2;
DeadTimeSimHandle* deadtime = &tksim->deadtime;
PWMPhaseOutput* pwmOut = &tksim->pwmOut;
//Ïðåîáðàçóåì ñîñòîÿíèå ëèíèé ÒÊ â ñèãíàëû óïðàâëåíèÿ êëþ÷àìè //Ïðåîáðàçóåì ñîñòîÿíèå ëèíèé ÒÊ â ñèãíàëû óïðàâëåíèÿ êëþ÷àìè
//PhaseA Uni1 //PhaseA Uni1
if (tsim1->tkLine == 0 && tsim2->tkLine == 1) { if (tksim->tkLineB == 0 && tksim->tkLineA == 1) {
if ((tsim1->ciA == 0 || tsim1->ciB == 0) && tksim->dtsim.stateDt == stateDtReady) { if ((pwmOut->ci1A == 0 || pwmOut->ci2A == 0) && deadtime->stateDt == stateDtReady) {
tsim2->ciA = 0; pwmOut->ci1B = 0;
tsim2->ciB = 0; pwmOut->ci2B = 0;
tksim->dtsim.dtcnt = tksim->dtsim.DtCntPeriod; deadtime->dtcnt = deadtime->DtPeriod;
tksim->dtsim.stateDt = stateDtWait; deadtime->stateDt = stateDtWait;
} }
if (tksim->dtsim.stateDt == stateDtWait) { if (deadtime->stateDt == stateDtWait) {
if (tksim->dtsim.dtcnt > 0) if (deadtime->dtcnt > 0)
tksim->dtsim.dtcnt--; deadtime->dtcnt--;
else else
tksim->dtsim.stateDt = stateDtReady; deadtime->stateDt = stateDtReady;
} }
if (tksim->dtsim.stateDt == stateDtReady) { if (deadtime->stateDt == stateDtReady) {
tsim1->ciA = 1; pwmOut->ci1A = 1;
tsim1->ciB = 1; pwmOut->ci2A = 1;
tsim2->ciA = 0; pwmOut->ci1B = 0;
tsim2->ciB = 0; pwmOut->ci2B = 0;
} }
} }
else if (tsim1->tkLine == 1 && tsim2->tkLine == 0) { else if (tksim->tkLineB == 1 && tksim->tkLineA == 0) {
if ((tsim2->ciA == 0 || tsim2->ciB == 0) && tksim->dtsim.stateDt == stateDtReady) { if ((pwmOut->ci1B == 0 || pwmOut->ci2B == 0) && deadtime->stateDt == stateDtReady) {
tsim1->ciA = 0; pwmOut->ci1A = 0;
tsim1->ciB = 0; pwmOut->ci2B = 0;
tksim->dtsim.dtcnt = tksim->dtsim.DtCntPeriod; deadtime->dtcnt = deadtime->DtPeriod;
tksim->dtsim.stateDt = stateDtWait; deadtime->stateDt = stateDtWait;
} }
if (tksim->dtsim.stateDt == stateDtWait) { if (deadtime->stateDt == stateDtWait) {
if (tksim->dtsim.dtcnt > 0) if (deadtime->dtcnt > 0)
tksim->dtsim.dtcnt--; deadtime->dtcnt--;
else else
tksim->dtsim.stateDt = stateDtReady; deadtime->stateDt = stateDtReady;
} }
if (tksim->dtsim.stateDt == stateDtReady) { if (deadtime->stateDt == stateDtReady) {
tsim1->ciA = 0; pwmOut->ci1A = 0;
tsim1->ciB = 0; pwmOut->ci2A = 0;
tsim2->ciA = 1; pwmOut->ci1B = 1;
tsim2->ciB = 1; pwmOut->ci2B = 1;
} }
} }
else if (tsim1->tkLine == 0 && tsim2->tkLine == 0) { else if (tksim->tkLineA == 0 && tksim->tkLineB == 0) {
if ((tsim1->ciB == 0 || tsim2->ciA == 0) && tksim->dtsim.stateDt == stateDtReady) { if ((pwmOut->ci1B == 0 || pwmOut->ci2A == 0) && deadtime->stateDt == stateDtReady) {
tsim1->ciA = 0; pwmOut->ci1A = 0;
tsim2->ciB = 0; pwmOut->ci2B = 0;
tksim->dtsim.dtcnt = tksim->dtsim.DtCntPeriod; deadtime->dtcnt = deadtime->DtPeriod;
tksim->dtsim.stateDt = stateDtWait; deadtime->stateDt = stateDtWait;
} }
if (tksim->dtsim.stateDt == stateDtWait) { if (deadtime->stateDt == stateDtWait) {
if (tksim->dtsim.dtcnt > 0) if (deadtime->dtcnt > 0)
tksim->dtsim.dtcnt--; deadtime->dtcnt--;
else else
tksim->dtsim.stateDt = stateDtReady; deadtime->stateDt = stateDtReady;
} }
if (tksim->dtsim.stateDt == stateDtReady) { if (deadtime->stateDt == stateDtReady) {
tsim1->ciA = 0; pwmOut->ci1A = 0;
tsim1->ciB = 1; pwmOut->ci2A = 1;
tsim2->ciA = 1; pwmOut->ci1B = 1;
tsim2->ciB = 0; pwmOut->ci2B = 0;
} }
} }
else { else {
tsim1->ciA = 0; pwmOut->ci1A = 0;
tsim1->ciB = 0; pwmOut->ci2A = 0;
tsim2->ciA = 0; pwmOut->ci1B = 0;
tsim2->ciB = 0; pwmOut->ci2B = 0;
} }
} }
void simulateActionActionQualifierSubmodule(TimerSimHandle* tsim) void simulateActionActionQualifierSubmodule(TimerSimHandle* tsim)
{ {
// Ìîäåëèðóåì Action-Qualifier Submodule // Ìîäåëèðóåì Action-Qualifier Submodule
if (tsim->cmpA > tsim->tcnt) { if (tsim->cmpA > tsim->tcnt) {
tsim->dtsim.pre_ciA = 0; tsim->deadtime.pre_ciA = 0;
tsim->dtsim.pre_ciB = 1; tsim->deadtime.pre_ciB = 1;
} }
else if (tsim->cmpA < tsim->tcnt) { else if (tsim->cmpA < tsim->tcnt) {
tsim->dtsim.pre_ciA = 1; tsim->deadtime.pre_ciA = 1;
tsim->dtsim.pre_ciB = 0; tsim->deadtime.pre_ciB = 0;
} }
} }
void simulateDeadBendSubmodule(TimerSimHandle* tsim) void simulateDeadBendSubmodule(TimerSimHandle* tsim, int* ciA, int* ciB)
{ {
// Ìîäåëèðóåì Dead-Band Submodule // Ìîäåëèðóåì Dead-Band Submodule
if (tsim->dtsim.stateDt == 1) { if (tsim->deadtime.stateDt == 0) {
tsim->ciA = tsim->dtsim.pre_ciA; *ciA = tsim->deadtime.pre_ciA;
tsim->ciB = 0; *ciB = 0;
if (tsim->dtsim.pre_ciA == 1) if (tsim->deadtime.pre_ciA == 1)
tsim->dtsim.dtcnt = tsim->dtsim.DtCntPeriod; tsim->deadtime.dtcnt = tsim->deadtime.DtPeriod;
if (tsim->dtsim.dtcnt > 0) if (tsim->deadtime.dtcnt > 0)
tsim->dtsim.dtcnt--; tsim->deadtime.dtcnt--;
else else
tsim->dtsim.stateDt = 2; tsim->deadtime.stateDt = 1;
} }
else if (tsim->dtsim.stateDt == 2) { else if (tsim->deadtime.stateDt == 1) {
tsim->ciA = 0; *ciA = 0;
tsim->ciB = tsim->dtsim.pre_ciB; *ciB = tsim->deadtime.pre_ciB;
if (tsim->dtsim.pre_ciB == 1) if (tsim->deadtime.pre_ciB == 1)
tsim->dtsim.dtcnt = tsim->dtsim.DtCntPeriod; tsim->deadtime.dtcnt = tsim->deadtime.DtPeriod;
if (tsim->dtsim.dtcnt > 0) if (tsim->deadtime.dtcnt > 0)
tsim->dtsim.dtcnt--; tsim->deadtime.dtcnt--;
else else
tsim->dtsim.stateDt = 1; tsim->deadtime.stateDt = 0;
} }
} }
@ -278,4 +269,23 @@ void simulateTripZoneSubmodule(TimerSimHandle* tsim)
//} // ... forces a one-shot trip event //} // ... forces a one-shot trip event
//if (EPwm1Regs.TZFRC.all == 0x0004) //if (EPwm1Regs.TZFRC.all == 0x0004)
// ci1A_DT = ci1B_DT = 0; // ci1A_DT = ci1B_DT = 0;
}
void Init_PWMPhase_Simulation(PWMPhaseSimHandle* tksim, TimerSimHandle* tsim1, TimerSimHandle* tsim2, int period, double step)
{
tksim->tsim1 = tsim1;
tksim->tsim2 = tsim2;
Init_TIM_Simulation(tksim->tsim1, period, step);
Init_TIM_Simulation(tksim->tsim2, period, step);
}
void Init_TIM_Simulation(TimerSimHandle* tsim, int period, double step)
{
tsim->deadtime.stateDt = stateDtWait;
tsim->TxPeriod = period;
tsim->TxCntPlus = step * 2;
tsim->deadtime.DtPeriod = (int)(DT / hmcu.sSimSampleTime);
tsim->simulatePwm = (void (*)())Simulate_SimpleTIM;
} }

85
Inu/xilinx_wrapper/pwm_sim.h
View File

@ -5,53 +5,71 @@
#define UNITED_COUNTER #define ENABLE_UNITED_COUNTER_FOR_ALL_PWM
#define SIMULATION_MODE_XILINX #define PWM_SIMULATION_MODE_TK_LINES
//#define SIMULATION_MODE_REGULAR_PWM //#define PWM_SIMULATION_MODE_REGULAR_PWM
// Для моделирования Event Manager #define PWM_PERIOD (FREQ_INTERNAL_GENERATOR_XILINX_TMS / FREQ_PWM)
// ... Dead-Band Submodule #define PWM_TICK_STEP (FREQ_INTERNAL_GENERATOR_XILINX_TMS * hmcu.sSimSampleTime)
// Для моделирования ШИМ
/**
* @brief 3lvl PWM One Phase Simulation handle
*/
typedef struct typedef struct
{ {
int DtCntPeriod; int ci1A;
int ci1B;
int ci2A;
int ci2B;
}PWMPhaseOutput;
/**
* @brief DeadTime Simulation Handle
*/
typedef struct
{
int DtPeriod;
int stateDt; int stateDt;
int dtcnt; int dtcnt;
int pre_ciA; int pre_ciA;
int pre_ciB; int pre_ciB;
}DeadBandSimHandle; }DeadTimeSimHandle;
enum StateDeadTime { enum StateDeadTime {
stateDtWait = 0, stateDtWait = 0,
stateDtReady stateDtReady
}; };
// ... Time-Base Submodule, Counter-Compare Submodule и Event-Trigger Submodule /**
* @brief Tim Simulation Handle
*/
typedef struct typedef struct
{ {
double TxCntPlus; double TxCntPlus;
double TPr; double TxPeriod;
double tcntAux; double tcntAux;
double tcntAuxPrev; double tcntAuxPrev;
double tcnt; double tcnt;
double cmpA; double cmpA;
double cmpB; double cmpB;
int ciA; DeadTimeSimHandle deadtime;
int ciB;
DeadBandSimHandle dtsim;
int tkLine;
void *simulatePwm() void (*simulatePwm)();
}TimerSimHandle; }TimerSimHandle;
/**
// ... Time-Base Submodule, Counter-Compare Submodule и Event-Trigger Submodule * @brief PWM Phase Simulation Handle
*/
typedef struct typedef struct
{ {
PWMPhaseOutput pwmOut;
TimerSimHandle* tsim1; TimerSimHandle* tsim1;
TimerSimHandle* tsim2; TimerSimHandle* tsim2;
DeadBandSimHandle dtsim; int tkLineA;
}XilinkTkPhaseSimHandle; int tkLineB;
DeadTimeSimHandle deadtime;
}PWMPhaseSimHandle;
extern TimerSimHandle t1sim; extern TimerSimHandle t1sim;
extern TimerSimHandle t2sim; extern TimerSimHandle t2sim;
@ -66,16 +84,33 @@ extern TimerSimHandle t10sim;
extern TimerSimHandle t11sim; extern TimerSimHandle t11sim;
extern TimerSimHandle t12sim; extern TimerSimHandle t12sim;
extern PWMPhaseSimHandle PWMPhaseA1;
extern PWMPhaseSimHandle PWMPhaseB1;
extern PWMPhaseSimHandle PWMPhaseC1;
extern PWMPhaseSimHandle PWMPhaseA2;
extern PWMPhaseSimHandle PWMPhaseB2;
extern PWMPhaseSimHandle PWMPhaseC2;
void Simulate_Timers(void); void Simulate_PWM(void);
void Init_Timers(void); void Init_PWM_Simulation(void);
void Simulate_PWMPhase(PWMPhaseSimHandle* tksim, int T1, int T0);
void Simulate_MainTIM(TimerSimHandle* tsim, int compare);
void Simulate_SimpleTIM(TimerSimHandle* tsim, int compare);
void initSimulateTim(TimerSimHandle* tsim, int period, double step);
void SimulateMainPWM(TimerSimHandle* tsim, int compare);
void SimulateSimplePWM(TimerSimHandle* tsim, int compare);
int simulateTimAndGetCompare(TimerSimHandle* tsim, int compare); int simulateTimAndGetCompare(TimerSimHandle* tsim, int compare);
void simulateActionActionQualifierSubmodule(TimerSimHandle* tsim); void simulateActionActionQualifierSubmodule(TimerSimHandle* tsim);
void simulateDeadBendSubmodule(TimerSimHandle* tsim); void simulateDeadBendSubmodule(TimerSimHandle* tsim, int* ciA, int* ciB);
void simulateTripZoneSubmodule(TimerSimHandle* tsim); void simulateTripZoneSubmodule(TimerSimHandle* tsim);
void Init_TIM_Simulation(TimerSimHandle* tsim, int period, double step);
void Init_PWMPhase_Simulation(PWMPhaseSimHandle* tksim, TimerSimHandle* tsim1, TimerSimHandle* tsim2, int period, double step);
void convertSVGenTimesToTkLines(PWMPhaseSimHandle* tksim);
void xilinxPwm3LevelSimulation(PWMPhaseSimHandle* tksim);
#if defined(PWM_SIMULATION_MODE_REGULAR_PWM) && defined(PWM_SIMULATION_MODE_TK_LINES)
#error Choose only one PWM simulation mode!
#endif
#endif //PWM_SIM #endif //PWM_SIM

BIN
inu_23550.slx
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