561 lines
19 KiB
C
561 lines
19 KiB
C
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#include "MemoryFunctions.h"
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#include "Spartan2E_Adr.h"
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#include "TuneUpPlane.h"
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#include "x_parallel_bus.h"
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#include "x_serial_bus.h"
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#include "xp_cds_tk.h"
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#include "xp_tools.h"
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///////////////////////////////////////////////
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///////////////////////////////////////////////
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///////////////////////////////////////////////
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// 23550
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///////////////////////////////////////////////
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///////////////////////////////////////////////
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int cds_tk_write_sbus_23550(T_cds_tk_23550 *v)
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{
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unsigned int old_err, err = 0, err_ready = 0;
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if (v->useit == 0)
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return 0;
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old_err = v->status_serial_bus.count_write_error;
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x_serial_bus_project.slave_addr = v->plane_address; // number plate
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//3 mask_protect_tk
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x_serial_bus_project.reg_addr = 3; // adr memory in plate
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x_serial_bus_project.write_data = v->write.sbus.mask_protect_tk.all; // write data
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if (x_serial_bus_project.write(&x_serial_bus_project)) // make write
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v->status_serial_bus.count_write_error++;
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//4 protect_error
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// if (v->read.type_cds_xilinx == TYPE_CDS_XILINX_SP6)
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// v->write.sbus.protect_error.bit.enable_err_switch = 0; // <20><><EFBFBD> SP6 <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>, <20>.<2E>. <20><> <20><><EFBFBD> <20><><EFBFBD><EFBFBD>
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x_serial_bus_project.reg_addr = 4; // adr memory in plate
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x_serial_bus_project.write_data = v->write.sbus.protect_error.all; // write data
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if (x_serial_bus_project.write(&x_serial_bus_project)) // make write
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v->status_serial_bus.count_write_error++;
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//0 mask_tk_out_40pin
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x_serial_bus_project.reg_addr = 0; // adr memory in plate
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x_serial_bus_project.write_data = v->write.sbus.mask_tk_out_40pin.all; // write data
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if (x_serial_bus_project.write(&x_serial_bus_project)) // make write
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v->status_serial_bus.count_write_error++;
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//1 dead_min_time
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x_serial_bus_project.reg_addr = 1; // adr memory in plate
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x_serial_bus_project.write_data = v->write.sbus.dead_min_time.all; // write data
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if (x_serial_bus_project.write(&x_serial_bus_project)) // make write
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v->status_serial_bus.count_write_error++;
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//2 ack_time
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x_serial_bus_project.reg_addr = 2; // adr memory in plate
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x_serial_bus_project.write_data = v->write.sbus.ack_time.all; // write data
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if (x_serial_bus_project.write(&x_serial_bus_project)) // make write
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v->status_serial_bus.count_write_error++;
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//10 time_after_err
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x_serial_bus_project.reg_addr = 10; // adr memory in plate
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x_serial_bus_project.write_data = v->write.sbus.time_after_err; // write data
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if (x_serial_bus_project.write(&x_serial_bus_project)) // make write
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v->status_serial_bus.count_write_error++;
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//7 cmd_reset_error
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/*
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x_serial_bus_project.reg_addr = 7; // adr memory in plate
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x_serial_bus_project.write_data = v->write.sbus.cmd_reset_error; // write data
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if (x_serial_bus_project.write(&x_serial_bus_project)) // make write
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v->status_serial_bus.count_error++;
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*/
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if (old_err == v->status_serial_bus.count_write_error)// no errors
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{
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v->status_serial_bus.count_write_ok++;
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err = 0; // no errors
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}
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else
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err = 1; // !errors!
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err_ready = check_cds_ready_sbus( err, ITS_WRITE_BUS, &v->status_serial_bus);
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set_status_cds(err_ready, &v->status);
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return err_ready;
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}
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///////////////////////////////////////////////
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///////////////////////////////////////////////
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///////////////////////////////////////////////
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int cds_tk_read_sbus_23550(T_cds_tk_23550 *v)
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{
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unsigned int old_err, err = 0, err_ready = 0;
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if (v->useit == 0)
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return 0;
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old_err = v->status_serial_bus.count_read_error;
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x_serial_bus_project.slave_addr = v->plane_address; // number plate
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//0 mask_tk_out_40pin
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x_serial_bus_project.reg_addr = 0; // adr memory in plate
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x_serial_bus_project.read(&x_serial_bus_project); // read
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if (x_serial_bus_project.flags.bit.read_error == 0) // check error
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v->read.sbus.mask_tk_out_40pin.all = x_serial_bus_project.read_data;
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else
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v->status_serial_bus.count_read_error++;
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//1 dead_min_time
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x_serial_bus_project.reg_addr = 1; // adr memory in plate
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x_serial_bus_project.read(&x_serial_bus_project); // read
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if (x_serial_bus_project.flags.bit.read_error == 0) // check error
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v->read.sbus.dead_min_time.all = x_serial_bus_project.read_data;
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else
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v->status_serial_bus.count_read_error++;
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//2 ack_time
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x_serial_bus_project.reg_addr = 2; // adr memory in plate
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x_serial_bus_project.read(&x_serial_bus_project); // read
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if (x_serial_bus_project.flags.bit.read_error == 0) // check error
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v->read.sbus.ack_time.all = x_serial_bus_project.read_data;
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else
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v->status_serial_bus.count_read_error++;
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//3 mask_protect_tk
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x_serial_bus_project.reg_addr = 3; // adr memory in plate
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x_serial_bus_project.read(&x_serial_bus_project); // read
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if (x_serial_bus_project.flags.bit.read_error == 0) // check error
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v->read.sbus.mask_protect_tk.all = x_serial_bus_project.read_data;
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else
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v->status_serial_bus.count_read_error++;
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//4 protect_error
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x_serial_bus_project.reg_addr = 4; // adr memory in plate
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x_serial_bus_project.read(&x_serial_bus_project); // read
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if (x_serial_bus_project.flags.bit.read_error == 0) // check error
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v->read.sbus.protect_error.all = x_serial_bus_project.read_data;
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else
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v->status_serial_bus.count_read_error++;
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//5 status_tk_40pin
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x_serial_bus_project.reg_addr = 5; // adr memory in plate
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x_serial_bus_project.read(&x_serial_bus_project); // read
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if (x_serial_bus_project.flags.bit.read_error == 0) // check error
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v->read.sbus.status_tk_40pin.all = x_serial_bus_project.read_data;
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else
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v->status_serial_bus.count_read_error++;
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//6 status_tk_96pin
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x_serial_bus_project.reg_addr = 6; // adr memory in plate
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x_serial_bus_project.read(&x_serial_bus_project); // read
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if (x_serial_bus_project.flags.bit.read_error == 0) // check error
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v->read.sbus.status_tk_96pin.all = x_serial_bus_project.read_data;
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else
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v->status_serial_bus.count_read_error++;
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//7 lock_status_error
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x_serial_bus_project.reg_addr = 7; // adr memory in plate
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x_serial_bus_project.read(&x_serial_bus_project); // read
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if (x_serial_bus_project.flags.bit.read_error == 0) // check error
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v->read.sbus.lock_status_error.all = x_serial_bus_project.read_data;
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else
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v->status_serial_bus.count_read_error++;
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//8 status_protect_current_ack
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x_serial_bus_project.reg_addr = 8; // adr memory in plate
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x_serial_bus_project.read(&x_serial_bus_project); // read
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if (x_serial_bus_project.flags.bit.read_error == 0) // check error
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v->read.sbus.status_protect_current_ack.all = x_serial_bus_project.read_data;
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else
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v->status_serial_bus.count_read_error++;
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//9 id_plate
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x_serial_bus_project.reg_addr = 9; // adr memory in plate
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x_serial_bus_project.read(&x_serial_bus_project); // read
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if (x_serial_bus_project.flags.bit.read_error == 0) // check error
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v->read.sbus.id_plate.all = x_serial_bus_project.read_data;
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else
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v->status_serial_bus.count_read_error++;
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//10 time_after_err
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x_serial_bus_project.reg_addr = 10; // adr memory in plate
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x_serial_bus_project.read(&x_serial_bus_project); // read
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if (x_serial_bus_project.flags.bit.read_error == 0) // check error
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v->read.sbus.time_after_err = x_serial_bus_project.read_data;
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else
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v->status_serial_bus.count_read_error++;
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//11 time_err_tk_all
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x_serial_bus_project.reg_addr = 11; // adr memory in plate
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x_serial_bus_project.read(&x_serial_bus_project); // read
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if (x_serial_bus_project.flags.bit.read_error == 0) // check error
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v->read.sbus.time_err_tk_all.all = x_serial_bus_project.read_data;
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else
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v->status_serial_bus.count_read_error++;
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//15 current_status_error
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x_serial_bus_project.reg_addr = 15; // adr memory in plate
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x_serial_bus_project.read(&x_serial_bus_project); // read
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if (x_serial_bus_project.flags.bit.read_error == 0) // check error
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{
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v->read.type_cds_xilinx = x_serial_bus_project.read_data & 0x1;
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v->type_cds_xilinx = v->read.type_cds_xilinx;
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v->read.sbus.current_status_error.all = x_serial_bus_project.read_data & 0xfffe;
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}
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else
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v->status_serial_bus.count_read_error++;
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///////////
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if (old_err == v->status_serial_bus.count_read_error)// no errors
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{
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v->status_serial_bus.count_read_ok++;
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err = 0; // no errors
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}
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else
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err = 1; // !errors!
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err_ready = check_cds_ready_sbus( err, ITS_READ_BUS, &v->status_serial_bus);
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set_status_cds(err_ready, &v->status);
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return err_ready;
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}
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///////////////////////////////////////////////
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///////////////////////////////////////////////
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///////////////////////////////////////////////
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#pragma CODE_SECTION(cds_tk_read_pbus_23550,".fast_run2");
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int cds_tk_read_pbus_23550(T_cds_tk_23550 *v)
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{
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unsigned long adr_pbus;
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if (v->useit == 0 || v->setup_pbus.use_reg_in_pbus.all==0)
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return 0;
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if (v->status & (component_Started | component_Ready | component_Error | component_ErrorSBus))
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{
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//#if (Cds_Tk_Xilinx_SP6 == 1) && (C_PROJECT_TYPE == PROJECT_23550)
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if (v->type_cds_xilinx == TYPE_CDS_XILINX_SP6)
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{
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adr_pbus = v->adr_pbus.adr_table[0] + ADR_FIRST_FREE;
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read_pbus_value_full_v3(v->setup_pbus.use_reg_in_pbus.bit.reg0,adr_pbus,v->read.pbus.status1.all);
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read_pbus_value_full_v3(v->setup_pbus.use_reg_in_pbus.bit.reg1,adr_pbus,v->read.pbus.DataReg0.all);
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read_pbus_value_full_v3(v->setup_pbus.use_reg_in_pbus.bit.reg2,adr_pbus,v->read.pbus.DataReg1.all);
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read_pbus_value_full_v3(v->setup_pbus.use_reg_in_pbus.bit.reg3,adr_pbus,v->read.pbus.DataReg2.all);
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read_pbus_value_full_v3(v->setup_pbus.use_reg_in_pbus.bit.reg4,adr_pbus,v->read.pbus.DataReg3.all);
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read_pbus_value_full_v3(v->setup_pbus.use_reg_in_pbus.bit.reg5,adr_pbus,v->read.pbus.status2.all);
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}
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}
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else
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{
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v->read.pbus.status1.all = 0;
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v->read.pbus.DataReg0.all = 0;
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v->read.pbus.DataReg1.all = 0;
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v->read.pbus.DataReg2.all = 0;
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v->read.pbus.DataReg3.all = 0;
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v->read.pbus.status2.all = 0;
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}
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//#endif
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return 0;
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}
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///////////////////////////////////////////////
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///////////////////////////////////////////////
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#pragma CODE_SECTION(cds_tk_optical_bus_write_data,".fast_run");
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void cds_tk_optical_bus_write_data(T_cds_tk_23550 *v)
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{
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if (v->useit == 0)
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return ;
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i_WriteMemory(SI_OPTICS_WORD_TO_SEND_1,v->optical_data_out.buf[0]);
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i_WriteMemory(SI_OPTICS_WORD_TO_SEND_2,v->optical_data_out.buf[1]);
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i_WriteMemory(SI_OPTICS_WORD_TO_SEND_3,v->optical_data_out.buf[2]);
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i_WriteMemory(SI_OPTICS_WORD_TO_SEND_4,v->optical_data_out.buf[3]);
|
|||
|
|
v->optical_data_out.count_send++;
|
|||
|
|
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
|
|||
|
|
///////////////////////////////////////////////
|
|||
|
|
///////////////////////////////////////////////
|
|||
|
|
#pragma CODE_SECTION(cds_tk_optical_bus_check_error_read,".fast_run");
|
|||
|
|
void cds_tk_optical_bus_check_error_read(T_cds_tk_23550 *v)
|
|||
|
|
{
|
|||
|
|
unsigned int delta_id_sbus = 0;
|
|||
|
|
// static unsigned int prev_id_sbus = 0;
|
|||
|
|
|
|||
|
|
if (v->useit == 0)
|
|||
|
|
return ;
|
|||
|
|
|
|||
|
|
// i_led2_on_off(1);
|
|||
|
|
|
|||
|
|
v->optical_data_in.status_1.all = v->read.pbus.status1.all;
|
|||
|
|
v->optical_data_in.status_2.all = v->read.pbus.status2.all;
|
|||
|
|
|
|||
|
|
// if ( (v->read.pbus.status1.all == v->read.pbus.status2.all)
|
|||
|
|
// && (v->read.pbus.status1.bit.receiver_busy==0)
|
|||
|
|
// && (v->read.pbus.status1.bit.receiver_error==0)
|
|||
|
|
// )
|
|||
|
|
|
|||
|
|
if ( v->optical_data_in.status_1.bit.id_sbus == v->optical_data_in.status_2.bit.id_sbus
|
|||
|
|
&& v->optical_data_in.status_1.bit.id == v->optical_data_in.status_2.bit.id
|
|||
|
|
// && (v->read.pbus.status1.bit.receiver_error==0)
|
|||
|
|
// && (v->read.pbus.status2.bit.receiver_error==0)
|
|||
|
|
)
|
|||
|
|
{
|
|||
|
|
// <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD>, <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>, <20><> <20>.<2E>. <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><> PBUS <20> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
|
// <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>, <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>, <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>.
|
|||
|
|
v->optical_data_in.status_read.bit.receiver_busy = v->optical_data_in.status_1.bit.receiver_busy || v->optical_data_in.status_2.bit.receiver_busy;
|
|||
|
|
|
|||
|
|
// may be data new and ok?
|
|||
|
|
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
|
if (v->optical_data_in.status_1.bit.id_sbus == v->optical_data_in.prev_id_sbus) {
|
|||
|
|
// data old
|
|||
|
|
v->optical_data_in.status_read.bit.old_data = 1;
|
|||
|
|
v->optical_data_in.same_id_count += 1;
|
|||
|
|
|
|||
|
|
if (v->optical_data_in.same_id_count_between < v->optical_data_in.setup_count_error_between)
|
|||
|
|
v->optical_data_in.same_id_count_between += 1;
|
|||
|
|
else
|
|||
|
|
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>, <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><> <20><><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>?
|
|||
|
|
v->optical_data_in.ready = 0;
|
|||
|
|
}
|
|||
|
|
else
|
|||
|
|
{
|
|||
|
|
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
|
v->optical_data_in.same_id_count_between = 0;
|
|||
|
|
v->optical_data_in.local_count_error = 0;
|
|||
|
|
v->optical_data_in.raw_local_error = 0;
|
|||
|
|
v->optical_data_in.ready = 1;
|
|||
|
|
|
|||
|
|
// <20><><EFBFBD><EFBFBD> <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>?
|
|||
|
|
if (v->optical_data_in.status_1.bit.id_sbus >= v->optical_data_in.prev_id_sbus)
|
|||
|
|
delta_id_sbus = v->optical_data_in.status_1.bit.id_sbus - v->optical_data_in.prev_id_sbus;
|
|||
|
|
else
|
|||
|
|
delta_id_sbus = 0x10 + v->optical_data_in.status_1.bit.id_sbus - v->optical_data_in.prev_id_sbus;
|
|||
|
|
|
|||
|
|
if (delta_id_sbus == 1 )
|
|||
|
|
{
|
|||
|
|
// <20><><EFBFBD> <20><><EFBFBD> <20><>.
|
|||
|
|
v->optical_data_in.count_ok++;
|
|||
|
|
}
|
|||
|
|
else
|
|||
|
|
{
|
|||
|
|
// <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
|
v->optical_data_in.count_lost += (delta_id_sbus - 1);
|
|||
|
|
v->optical_data_in.count_ok++;
|
|||
|
|
v->optical_data_in.status_read.bit.lost_data = 1;
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
// <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><> <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>?
|
|||
|
|
if (v->optical_data_in.status_read.bit.new_data_ready)
|
|||
|
|
v->optical_data_in.status_read.bit.overfull_new_data = 1; // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>, <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
|
|
|||
|
|
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
|
v->optical_data_in.buf[0] = v->read.pbus.DataReg0.all;
|
|||
|
|
v->optical_data_in.buf[1] = v->read.pbus.DataReg1.all;
|
|||
|
|
v->optical_data_in.buf[2] = v->read.pbus.DataReg2.all;
|
|||
|
|
v->optical_data_in.buf[3] = v->read.pbus.DataReg3.all;
|
|||
|
|
|
|||
|
|
|
|||
|
|
v->optical_data_in.status_read.bit.new_data_ready = 1;
|
|||
|
|
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
v->optical_data_in.prev_id_sbus = v->read.pbus.status1.bit.id_sbus;
|
|||
|
|
}
|
|||
|
|
else
|
|||
|
|
{
|
|||
|
|
if ((v->optical_data_in.status_1.bit.id_sbus != v->optical_data_in.status_2.bit.id_sbus)
|
|||
|
|
|| (v->optical_data_in.status_1.bit.id != v->optical_data_in.status_2.bit.id) )
|
|||
|
|
v->optical_data_in.status_read.bit.bad_status12 = 1;
|
|||
|
|
|
|||
|
|
if (v->read.pbus.status1.bit.receiver_error==1 || v->read.pbus.status2.bit.receiver_error==1)
|
|||
|
|
v->optical_data_in.status_read.bit.receiver_error = 1;
|
|||
|
|
|
|||
|
|
v->optical_data_in.raw_local_error = 1;
|
|||
|
|
v->optical_data_in.full_count_error++;
|
|||
|
|
|
|||
|
|
if (v->optical_data_in.local_count_error >= v->optical_data_in.setup_count_error)
|
|||
|
|
{
|
|||
|
|
v->optical_data_in.ready = 0;
|
|||
|
|
|
|||
|
|
// v->optical_data_in.buf[0] = 0;
|
|||
|
|
// v->optical_data_in.buf[1] = 0;
|
|||
|
|
// v->optical_data_in.buf[2] = 0;
|
|||
|
|
// v->optical_data_in.buf[3] = 0;
|
|||
|
|
}
|
|||
|
|
else
|
|||
|
|
{
|
|||
|
|
v->optical_data_in.local_count_error++;
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
|
|||
|
|
//
|
|||
|
|
//
|
|||
|
|
// if ( (v->read.pbus.status1.all == v->read.pbus.status2.all)
|
|||
|
|
// && (v->read.pbus.status1.bit.id_sbus != v->optical_data_in.prev_id_sbus )
|
|||
|
|
// && (v->read.pbus.status1.bit.receiver_busy==0)
|
|||
|
|
// && (v->read.pbus.status1.bit.receiver_error==0)
|
|||
|
|
// )
|
|||
|
|
// {
|
|||
|
|
//
|
|||
|
|
//
|
|||
|
|
// if (v->read.pbus.status1.bit.id_sbus >= v->optical_data_in.prev_id_sbus)
|
|||
|
|
// delta_id_sbus = v->read.pbus.status1.bit.id_sbus - v->optical_data_in.prev_id_sbus;
|
|||
|
|
// else
|
|||
|
|
// delta_id_sbus = 0x10 + v->read.pbus.status1.bit.id_sbus - v->optical_data_in.prev_id_sbus;
|
|||
|
|
//
|
|||
|
|
// v->optical_data_in.local_count_error = 0;
|
|||
|
|
// v->optical_data_in.raw_local_error = 0;
|
|||
|
|
// v->optical_data_in.ready = 1;
|
|||
|
|
//
|
|||
|
|
//
|
|||
|
|
//
|
|||
|
|
// if (delta_id_sbus == 1 )
|
|||
|
|
// v->optical_data_in.count_ok++;
|
|||
|
|
// else
|
|||
|
|
// {
|
|||
|
|
// v->optical_data_in.count_lost += (delta_id_sbus - 1);
|
|||
|
|
// v->optical_data_in.count_ok++;
|
|||
|
|
// }
|
|||
|
|
//
|
|||
|
|
// v->optical_data_in.buf[0] = v->read.pbus.DataReg0.all;
|
|||
|
|
// v->optical_data_in.buf[1] = v->read.pbus.DataReg1.all;
|
|||
|
|
// v->optical_data_in.buf[2] = v->read.pbus.DataReg2.all;
|
|||
|
|
// v->optical_data_in.buf[3] = v->read.pbus.DataReg3.all;
|
|||
|
|
//
|
|||
|
|
// // <20><><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><> <20><> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>?
|
|||
|
|
// if (v->optical_data_in.new_data_ready)
|
|||
|
|
// v->optical_data_in.overfull_new_data = 1; // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>, <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
|
//
|
|||
|
|
// v->optical_data_in.new_data_ready = 1;
|
|||
|
|
//
|
|||
|
|
// }
|
|||
|
|
// else
|
|||
|
|
// {
|
|||
|
|
//// Led1_Toggle();
|
|||
|
|
//
|
|||
|
|
//// i_led1_on_off(1);
|
|||
|
|
//
|
|||
|
|
// v->optical_data_in.raw_local_error = 1;
|
|||
|
|
//
|
|||
|
|
// if (v->read.pbus.status1.bit.id_sbus != v->optical_data_in.prev_id_sbus) {
|
|||
|
|
// v->optical_data_in.same_id_count += 1;
|
|||
|
|
// }
|
|||
|
|
// v->optical_data_in.full_count_error++;
|
|||
|
|
// if (v->optical_data_in.local_count_error >= v->optical_data_in.setup_count_error)
|
|||
|
|
// {
|
|||
|
|
// v->optical_data_in.ready = 0;
|
|||
|
|
//
|
|||
|
|
// v->optical_data_in.buf[0] = 0;
|
|||
|
|
// v->optical_data_in.buf[1] = 0;
|
|||
|
|
// v->optical_data_in.buf[2] = 0;
|
|||
|
|
// v->optical_data_in.buf[3] = 0;
|
|||
|
|
//
|
|||
|
|
// }
|
|||
|
|
// else
|
|||
|
|
// {
|
|||
|
|
// v->optical_data_in.local_count_error++;
|
|||
|
|
//// i_led2_toggle();
|
|||
|
|
// }
|
|||
|
|
//
|
|||
|
|
//// i_led1_on_off(0);
|
|||
|
|
// }
|
|||
|
|
// v->optical_data_in.prev_id_sbus = v->read.pbus.status1.bit.id_sbus;
|
|||
|
|
// // i_led2_on_off(0);
|
|||
|
|
//
|
|||
|
|
//
|
|||
|
|
//// v->write.sbus.protect_error.all = v->store_protect_error; // restore all setup error.
|
|||
|
|
//// v->write_sbus(v);
|
|||
|
|
//
|
|||
|
|
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
///////////////////////////////////////////////
|
|||
|
|
///////////////////////////////////////////////
|
|||
|
|
///////////////////////////////////////////////
|
|||
|
|
#pragma CODE_SECTION(cds_tk_optical_bus_check_error_write,".fast_run");
|
|||
|
|
void cds_tk_optical_bus_check_error_write(T_cds_tk_23550 *v)
|
|||
|
|
{
|
|||
|
|
if (v->useit == 0)
|
|||
|
|
return ;
|
|||
|
|
|
|||
|
|
if ( (v->read.pbus.status1.all == v->read.pbus.status2.all)
|
|||
|
|
&& (v->read.pbus.status1.bit.trans_busy==0)
|
|||
|
|
&& (v->read.pbus.status1.bit.trans_error==0)
|
|||
|
|
)
|
|||
|
|
{
|
|||
|
|
v->optical_data_out.local_count_error = 0;
|
|||
|
|
v->optical_data_out.ready = 1;
|
|||
|
|
v->optical_data_out.raw_local_error = 0;
|
|||
|
|
}
|
|||
|
|
else
|
|||
|
|
{
|
|||
|
|
v->optical_data_out.raw_local_error = 1;
|
|||
|
|
v->optical_data_out.full_count_error++;
|
|||
|
|
if (v->optical_data_out.local_count_error >= v->optical_data_out.setup_count_error)
|
|||
|
|
v->optical_data_out.ready = 0;
|
|||
|
|
else
|
|||
|
|
{
|
|||
|
|
v->optical_data_out.local_count_error++;
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
// v->write.sbus.protect_error.all = v->store_protect_error; // restore all setup error.
|
|||
|
|
// v->write_sbus(v);
|
|||
|
|
|
|||
|
|
|
|||
|
|
}
|
|||
|
|
|
|||
|
|
///////////////////////////////////////////////
|
|||
|
|
///////////////////////////////////////////////
|
|||
|
|
///////////////////////////////////////////////
|
|||
|
|
///////////////////////////////////////////////
|
|||
|
|
///////////////////////////////////////////////
|
|||
|
|
|
|||
|
|
|
|||
|
|
|