#ifndef G474_BOOT_IMAGE_H
#define G474_BOOT_IMAGE_H
#include "boot_port.h"
#include <string.h>
/* SRAM1+SRAM2: 96 KB; CCM: 32 KB, also aliased after SRAM2. */
static inline bool g474_vectors_valid(const uint8_t *image, uint32_t size)
{
    uint32_t sp, pc;
    if (size < 8 || size > G474_APP_SIZE) return false;
    memcpy(&sp, image, 4); memcpy(&pc, image + 4, 4);
    return !(sp & 7U) &&
        ((sp > 0x20000000UL && sp <= 0x20020000UL) ||
         (sp > 0x10000000UL && sp <= 0x10008000UL)) &&
        (pc & 1U) && (pc & ~1UL) >= G474_APP_BASE &&
        (pc & ~1UL) < G474_APP_BASE + size;
}
/* A contiguous xB slot at 0x08010000 exists only with DBANK=0.
 * In dual mode the upper 64 KB is at 0x08040000, not at this slot address. */
static inline bool g474_geometry_supported(uint16_t flash_kb, bool dual, bool swapped)
{
    return flash_kb == 128U && !dual && !swapped;
}
static inline bool g474_flash_page(uint32_t address, bool dual,
                                    uint32_t *bank, uint32_t *page)
{
    uint32_t offset;
    if (dual || address < G474_META_BASE || address >= G474_APP_BASE + G474_APP_SIZE)
        return false;
    offset = address - 0x08000000UL;
    *bank = 1U;
    *page = offset / 4096U;
    return true;
}
#endif