#ifndef SET_EMU_IGBT_H
#define SET_EMU_IGBT_H
#include "set_regmap.h"
#ifdef __cplusplus
extern "C" {
#endif
#define SET_IGBT_CHANNELS 8u
#define SET_IGBT_WORDS 112u
#define SET_IGBT_CHANNEL_WORDS 12u
typedef struct {
    uint16_t flags, mode, on_delay, on_width, off_delay, off_width;
    uint16_t tx_width, edges, fault_width, count;
} set_igbt_channel;
typedef struct {
    uint8_t enabled, tx, previous_tx, rx, fault, injected_tx, input_source;
    uint16_t pending[SET_IGBT_CHANNELS], active[SET_IGBT_CHANNELS];
    uint16_t delay_ms, width_ms, event_count;
    uint8_t logical_rx;
    uint16_t pulse[SET_IGBT_CHANNELS], response_width[SET_IGBT_CHANNELS];
    set_igbt_channel channel[SET_IGBT_CHANNELS];
} set_igbt_emu;
PCAN_ABI_API void set_igbt_init(set_igbt_emu *);
/* One model tick = 1 ms, no system clock. This coarse logical model does NOT
 * reproduce the sub-microsecond timing of 1SP/1SD DSLogic hardware profiles.
 * input_source=0 takes the supplied pins, 1 uses register-injected TX. */
PCAN_ABI_API void set_igbt_tick(set_igbt_emu *, uint8_t pins);
PCAN_ABI_API unsigned set_igbt_read(void *, uint16_t offset, uint16_t count, uint16_t *);
PCAN_ABI_API unsigned set_igbt_write(void *, uint16_t offset, uint16_t value);
#ifdef __cplusplus
}
#endif
#endif