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Checkpoint EEPROM, firmware analysis and instrument protocol updates

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This commit is contained in:
Andrey
2026-10-08 21:51:44 +03:00
parent b0c0c05cfa
commit fe9b5a246e
24 changed files with 848 additions and 62 deletions
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16
c/set-protocol/include/periph28335.h
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@@ -50,6 +50,22 @@ size_t periph28335_eeprom_request(const periph28335_eeprom_reader *reader,
int periph28335_eeprom_accept(periph28335_eeprom_reader *reader,
const uint8_t *reply, size_t size, uint8_t *output, size_t capacity);
/* FC03 block reader uses the same state/physical byte range as legacy PEEK.
* expected() is the exact response length. No state advance on CRC/size error. */
size_t periph28335_eeprom_block_expected(const periph28335_eeprom_reader *r);
size_t periph28335_eeprom_block_request(const periph28335_eeprom_reader *r, uint8_t *out, size_t cap);
int periph28335_eeprom_block_accept(periph28335_eeprom_reader *r,
const uint8_t *reply, size_t size, uint8_t *out, size_t cap);
/* Profile 0 = AT25256B, 1 = M95M02; stable additional API for every host port.
* State remains four uint32_t fields. M95 requires block mode, no PEEK fallback. */
uint32_t periph28335_eeprom_capacity_profile(unsigned profile);
int periph28335_eeprom_begin_profile(periph28335_eeprom_reader *r, uint32_t c, uint32_t a, uint32_t n, unsigned profile);
size_t periph28335_eeprom_block_expected_profile(const periph28335_eeprom_reader *r, unsigned profile);
size_t periph28335_eeprom_block_request_profile(const periph28335_eeprom_reader *r, uint8_t *o, size_t n, unsigned profile);
int periph28335_eeprom_block_accept_profile(periph28335_eeprom_reader *r, const uint8_t *p, size_t n, uint8_t *o, size_t cap, unsigned profile);
size_t periph28335_eeprom_write_profile(uint32_t controller, uint32_t destination, uint32_t source, uint32_t length, unsigned profile, uint8_t *out, size_t cap);
typedef enum {
PERIPH28335_OK = 0,
PERIPH28335_ERROR_ARGUMENT = -1,