Checkpoint EEPROM, firmware analysis and instrument protocol updates
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44
c/set-protocol/include/balsam167_eeprom_block.h
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44
c/set-protocol/include/balsam167_eeprom_block.h
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/* Private PM35 FC03 EEPROM window; not standard Modbus register quantities.
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* AT25256B keeps its existing 0x8000..0xBFFF / count 1..120 requests.
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* M95M02 uses four 64-KiB windows: count bit15 marks the profile, bits9:8
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* select bank 0..3, bits7:0 carry word count. Address 0x8000..0xFFFF is
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* the word offset within a bank. Every request is self-contained; no global
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* bank register can be changed by another client. Old firmware rejects the
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* marked quantity. Neither profile silently reads the other memory type.
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*/
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#ifndef BALSAM167_EEPROM_BLOCK_H
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#define BALSAM167_EEPROM_BLOCK_H
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#include "balsam167_eeprom_layout.h"
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#define BALSAM167_EEPROM_RTU_BASE 0x8000U
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#define BALSAM167_EEPROM_BLOCK_WORDS 120U
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#define BALSAM167_EEPROM_M95_MARKER 0x8000U
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#define BALSAM167_EEPROM_WRITE_M95 0x44U
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static unsigned long balsam167_eeprom_capacity(unsigned profile)
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{
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return profile == 0 ? 32768UL : (profile == 1 ? 262144UL : 0UL);
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}
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static unsigned long balsam167_eeprom_block_word(unsigned address, unsigned count)
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{
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return ((unsigned long)(count & 0x0300U) << 7) + (address - 0x8000U);
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}
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static unsigned balsam167_eeprom_block_valid_profile(unsigned fn, unsigned address,
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unsigned count, unsigned profile)
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{
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unsigned n = count & 255U;
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unsigned long word;
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if (fn != 3 || address < 0x8000U || !n || n > 120U) return 0;
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if (profile == 0) return count == n && address < 0xC000U && n <= 0xC000U-address;
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if (profile != 1 || (count & 0xFC00U) != 0x8000U) return 0;
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word = balsam167_eeprom_block_word(address, count);
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return n <= 0x10000UL-address && word+n <= 131072UL;
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}
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static unsigned balsam167_eeprom_block_valid(unsigned fn, unsigned address, unsigned count)
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{
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#if EEPROM_M95M02
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return balsam167_eeprom_block_valid_profile(fn, address, count, 1);
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#else
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return fn == 3 && address >= 0x8000U && address < 0xC000U &&
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count && count <= 120U && count <= 0xC000U-address;
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#endif
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}
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#endif
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@@ -5,8 +5,20 @@
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*/
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#ifndef BALSAM167_EEPROM_LAYOUT_H
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#define BALSAM167_EEPROM_LAYOUT_H
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#define BALSAM167_EEPROM_BYTES 0x8000
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/* EEPROM_M95M02 is selected by the board configuration, never autodetected
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* by writing test patterns. Keep numeric constants usable by the TI linker. */
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#define BALSAM167_AT25256_BYTES 0x8000
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#define BALSAM167_M95M02_BYTES 0x40000
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#ifndef EEPROM_M95M02
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#define EEPROM_M95M02 0
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#endif
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#if EEPROM_M95M02
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#define BALSAM167_EEPROM_BYTES BALSAM167_M95M02_BYTES
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#define BALSAM167_EEPROM_PAGE_BYTES 256
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#else
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#define BALSAM167_EEPROM_BYTES BALSAM167_AT25256_BYTES
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#define BALSAM167_EEPROM_PAGE_BYTES 64
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#endif
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#define BALSAM167_EEPROM_PARAM_WORDS 129
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#define BALSAM167_EEPROM_WORDS (BALSAM167_EEPROM_BYTES / 2)
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/* Preserve the historical end-exclusive parameter boundary. The final word
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@@ -91,6 +91,16 @@ PCAN_ABI_API size_t pcan_abi_periph28335_eeprom_request(const void *state,
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PCAN_ABI_API int pcan_abi_periph28335_eeprom_accept(void *state,
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const uint8_t *reply, size_t size, uint8_t *output, size_t capacity);
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PCAN_ABI_API uint32_t pcan_abi_periph28335_eeprom_capacity(void);
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PCAN_ABI_API uint32_t pcan_abi_periph28335_eeprom_capacity_profile(unsigned profile);
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PCAN_ABI_API int pcan_abi_periph28335_eeprom_begin_profile(void *r, uint32_t c, uint32_t a, uint32_t n, unsigned profile);
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PCAN_ABI_API size_t pcan_abi_periph28335_eeprom_block_expected_profile(const void *r, unsigned profile);
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PCAN_ABI_API size_t pcan_abi_periph28335_eeprom_block_request_profile(const void *r, uint8_t *o, size_t n, unsigned profile);
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PCAN_ABI_API int pcan_abi_periph28335_eeprom_block_accept_profile(void *r, const uint8_t *p, size_t n, uint8_t *o, size_t cap, unsigned profile);
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PCAN_ABI_API size_t pcan_abi_periph28335_eeprom_write_profile(uint32_t controller, uint32_t destination, uint32_t source, uint32_t length, unsigned profile, uint8_t *out, size_t cap);
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PCAN_ABI_API size_t pcan_abi_periph28335_eeprom_block_expected(const void *state);
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PCAN_ABI_API size_t pcan_abi_periph28335_eeprom_block_request(const void *state, uint8_t *out, size_t cap);
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PCAN_ABI_API int pcan_abi_periph28335_eeprom_block_accept(void *state, const uint8_t *reply, size_t size, uint8_t *out, size_t cap);
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PCAN_ABI_API size_t pcan_abi_periph28335_append_crc(
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const uint8_t *payload, size_t payload_size,
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uint8_t *output, size_t output_size);
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@@ -50,6 +50,22 @@ size_t periph28335_eeprom_request(const periph28335_eeprom_reader *reader,
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int periph28335_eeprom_accept(periph28335_eeprom_reader *reader,
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const uint8_t *reply, size_t size, uint8_t *output, size_t capacity);
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/* FC03 block reader uses the same state/physical byte range as legacy PEEK.
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* expected() is the exact response length. No state advance on CRC/size error. */
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size_t periph28335_eeprom_block_expected(const periph28335_eeprom_reader *r);
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size_t periph28335_eeprom_block_request(const periph28335_eeprom_reader *r, uint8_t *out, size_t cap);
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int periph28335_eeprom_block_accept(periph28335_eeprom_reader *r,
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const uint8_t *reply, size_t size, uint8_t *out, size_t cap);
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/* Profile 0 = AT25256B, 1 = M95M02; stable additional API for every host port.
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* State remains four uint32_t fields. M95 requires block mode, no PEEK fallback. */
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uint32_t periph28335_eeprom_capacity_profile(unsigned profile);
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int periph28335_eeprom_begin_profile(periph28335_eeprom_reader *r, uint32_t c, uint32_t a, uint32_t n, unsigned profile);
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size_t periph28335_eeprom_block_expected_profile(const periph28335_eeprom_reader *r, unsigned profile);
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size_t periph28335_eeprom_block_request_profile(const periph28335_eeprom_reader *r, uint8_t *o, size_t n, unsigned profile);
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int periph28335_eeprom_block_accept_profile(periph28335_eeprom_reader *r, const uint8_t *p, size_t n, uint8_t *o, size_t cap, unsigned profile);
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size_t periph28335_eeprom_write_profile(uint32_t controller, uint32_t destination, uint32_t source, uint32_t length, unsigned profile, uint8_t *out, size_t cap);
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typedef enum {
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PERIPH28335_OK = 0,
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PERIPH28335_ERROR_ARGUMENT = -1,
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