Add C28x RS boot ports for F2812 and F28335

c/rs485-boot/ports/c28x/rs_boot_transport.h

@@ -0,0 +1,62 @@
+#ifndef RS_BOOT_TRANSPORT_H
+#define RS_BOOT_TRANSPORT_H
+
+/*
+ * ProtoCAN RS boot transport for TI C28x.
+ * A C28x char is 16 bits, therefore every wire byte is stored in the low
+ * eight bits of rsbt_byte_t.  Never use sizeof() as a wire-byte count.
+ */
+typedef unsigned int  rsbt_byte_t;
+typedef unsigned int  rsbt_u16_t;
+typedef unsigned long rsbt_u32_t;
+
+#define RSBT_MAX_PAYLOAD 512U
+#define RSBT_MAX_FRAME   (8U + RSBT_MAX_PAYLOAD + 4U)
+#define RSBT_MAX_BLOCK   (RSBT_MAX_PAYLOAD - 8U)
+#define RSBT_FLAG_MIRROR_RAM 0x01U
+
+typedef enum {
+    RSBT_IDLE = 0U,
+    RSBT_RECEIVING = 1U,
+    RSBT_READY = 2U,
+    RSBT_FAILED = 3U
+} rsbt_state_t;
+
+typedef struct {
+    int (*transmit)(void *, const rsbt_byte_t *, rsbt_u16_t);
+    int (*erase)(void *, rsbt_u32_t);
+    int (*write)(void *, rsbt_u32_t, const rsbt_byte_t *, rsbt_u16_t);
+    int (*read)(void *, rsbt_u32_t, rsbt_byte_t *, rsbt_u16_t);
+    int (*write_ram)(void *, rsbt_u32_t, const rsbt_byte_t *, rsbt_u16_t);
+    int (*image_valid)(void *, rsbt_u32_t, rsbt_u32_t);
+    void (*reboot)(void *);
+} rsbt_port_t;
+
+typedef struct {
+    rsbt_u32_t app_address;
+    rsbt_u32_t app_size;
+    rsbt_u16_t max_block;
+} rsbt_config_t;
+
+typedef struct {
+    rsbt_config_t config;
+    rsbt_port_t port;
+    void *user;
+    rsbt_byte_t parser[RSBT_MAX_FRAME];
+    rsbt_byte_t tx[RSBT_MAX_FRAME];
+    rsbt_byte_t scratch[32];
+    rsbt_u16_t parser_length;
+    rsbt_u32_t image_size;
+    rsbt_u32_t image_crc;
+    rsbt_u32_t next_offset;
+    rsbt_u32_t crc_errors;
+    rsbt_byte_t flags;
+    rsbt_state_t state;
+} rsbt_t;
+
+int rsbt_init(rsbt_t *, const rsbt_config_t *, const rsbt_port_t *, void *);
+void rsbt_feed(rsbt_t *, rsbt_byte_t);
+void rsbt_abort(rsbt_t *);
+rsbt_u32_t rsbt_crc32(const rsbt_byte_t *, rsbt_u16_t);
+
+#endif