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Add DSLogic capture, signal conversion and DSView decoders

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andrey
2026-09-27 01:45:08 +03:00
parent cc22c803d1
commit 513e79b127
44 changed files with 5982 additions and 36 deletions
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22
python/tests/test_logic_analyzer_analysis.py
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@@ -71,7 +71,7 @@ class LogicAnalysisTests(unittest.TestCase):
self.assertTrue(result.events)
self.assertTrue(all(e.kind == 'error' for e in result.events))
result = analyze_capture(uart_capture(b'\xa5', bad_stop=True), dict(mode='UART'))
self.assertTrue(any('стопового' in e.text for e in result.events))
self.assertTrue(any('стопового' in e.text for e in result.events))
def test_set_ping_bridge_crc_and_resynchronization(self):
damaged = bytearray(PING)
@@ -146,7 +146,7 @@ class LogicAnalysisTests(unittest.TestCase):
def test_can_incomplete_end(self):
bits = [1] * 10 + can_packet(0x123, b'\x55', extended=False)[:-8]
events = analyze_capture(capture_bits(bits, 1000000), dict(mode='CAN')).events
self.assertTrue(any('Неполный' in e.text for e in events))
self.assertTrue(any('Неполный' in e.text for e in events))
self.assertFalse(any(e.kind == 'can' for e in events))
def test_gate_profiles_and_truncated_window(self):
@@ -162,6 +162,24 @@ class LogicAnalysisTests(unittest.TestCase):
with self.assertRaises(ValueError):
analyze_capture(cap, dict(mode='1SP0635', status_channel=0))
def test_gate_pair_is_opt_in(self):
vin1 = DigitalChannel('Vin1', 0, array('d', [1e-6, 2e-6, 4e-6]))
status = DigitalChannel('Vstat', 0, array('d'))
vin2 = DigitalChannel('Vin2', 0, array('d', [2.2e-6, 3.2e-6]))
cap = DigitalCapture('test', 'test', [vin1, status, vin2], 0, 6e-6)
options = dict(mode='1SP0635', vin2_channel=2, vin2_mintime_ns=1500)
self.assertFalse(any(e.kind == 'deadtime' for e in analyze_capture(cap, options).events))
options['pair_analysis'] = True
with self.assertRaises(ValueError):
analyze_capture(cap, options)
options['mode'] = 'Transistor pair'
events = analyze_capture(cap, options).events
self.assertEqual(sum(e.kind == 'deadtime' for e in events), 2)
self.assertEqual(sum(e.kind == 'mintime_fail' for e in events), 1)
options['vin2_channel'] = 0
with self.assertRaises(ValueError):
analyze_capture(cap, options)
def test_measurements_cycle_and_clipped_pulse(self):
ch = DigitalChannel('D0', 0, array('d', [1e-6, 2e-6, 5e-6, 6e-6]))
measured = pulse_measurements(ch, 1.5e-6, 0, 8e-6)